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Diffstat (limited to 'watch-library/include/instance/wdt.h')
| -rw-r--r-- | watch-library/include/instance/wdt.h | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/watch-library/include/instance/wdt.h b/watch-library/include/instance/wdt.h deleted file mode 100644 index 2bb1d1ba..00000000 --- a/watch-library/include/instance/wdt.h +++ /dev/null @@ -1,55 +0,0 @@ -/** - * \file - * - * \brief Instance description for WDT - * - * Copyright (c) 2018 Microchip Technology Inc. - * - * \asf_license_start - * - * \page License - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the Licence at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * \asf_license_stop - * - */ - -#ifndef _SAML22_WDT_INSTANCE_ -#define _SAML22_WDT_INSTANCE_ - -/* ========== Register definition for WDT peripheral ========== */ -#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) -#define REG_WDT_CTRLA (0x40002000) /**< \brief (WDT) Control */ -#define REG_WDT_CONFIG (0x40002001) /**< \brief (WDT) Configuration */ -#define REG_WDT_EWCTRL (0x40002002) /**< \brief (WDT) Early Warning Interrupt Control */ -#define REG_WDT_INTENCLR (0x40002004) /**< \brief (WDT) Interrupt Enable Clear */ -#define REG_WDT_INTENSET (0x40002005) /**< \brief (WDT) Interrupt Enable Set */ -#define REG_WDT_INTFLAG (0x40002006) /**< \brief (WDT) Interrupt Flag Status and Clear */ -#define REG_WDT_SYNCBUSY (0x40002008) /**< \brief (WDT) Synchronization Busy */ -#define REG_WDT_CLEAR (0x4000200C) /**< \brief (WDT) Clear */ -#else -#define REG_WDT_CTRLA (*(RwReg8 *)0x40002000UL) /**< \brief (WDT) Control */ -#define REG_WDT_CONFIG (*(RwReg8 *)0x40002001UL) /**< \brief (WDT) Configuration */ -#define REG_WDT_EWCTRL (*(RwReg8 *)0x40002002UL) /**< \brief (WDT) Early Warning Interrupt Control */ -#define REG_WDT_INTENCLR (*(RwReg8 *)0x40002004UL) /**< \brief (WDT) Interrupt Enable Clear */ -#define REG_WDT_INTENSET (*(RwReg8 *)0x40002005UL) /**< \brief (WDT) Interrupt Enable Set */ -#define REG_WDT_INTFLAG (*(RwReg8 *)0x40002006UL) /**< \brief (WDT) Interrupt Flag Status and Clear */ -#define REG_WDT_SYNCBUSY (*(RoReg *)0x40002008UL) /**< \brief (WDT) Synchronization Busy */ -#define REG_WDT_CLEAR (*(WoReg8 *)0x4000200CUL) /**< \brief (WDT) Clear */ -#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ - - -#endif /* _SAML22_WDT_INSTANCE_ */ |