summaryrefslogtreecommitdiffstats
path: root/watch-library/hardware/hal
diff options
context:
space:
mode:
Diffstat (limited to 'watch-library/hardware/hal')
-rw-r--r--watch-library/hardware/hal/include/hpl_sleep.h10
-rw-r--r--watch-library/hardware/hal/src/hal_sleep.c9
2 files changed, 19 insertions, 0 deletions
diff --git a/watch-library/hardware/hal/include/hpl_sleep.h b/watch-library/hardware/hal/include/hpl_sleep.h
index 6731ec30..4106fb73 100644
--- a/watch-library/hardware/hal/include/hpl_sleep.h
+++ b/watch-library/hardware/hal/include/hpl_sleep.h
@@ -71,6 +71,16 @@ extern "C" {
int32_t _set_sleep_mode(const uint8_t mode);
/**
+ * \brief Get the sleep mode for the device
+ *
+ * This function gets the sleep mode for the device.
+ *
+ * \return the current value of the sleep mode configuration bits
+ */
+int32_t _get_sleep_mode(void);
+
+
+/**
* \brief Reset MCU
*/
void _reset_mcu(void);
diff --git a/watch-library/hardware/hal/src/hal_sleep.c b/watch-library/hardware/hal/src/hal_sleep.c
index 89472f15..2fac64d5 100644
--- a/watch-library/hardware/hal/src/hal_sleep.c
+++ b/watch-library/hardware/hal/src/hal_sleep.c
@@ -57,6 +57,15 @@ int sleep(const uint8_t mode)
if (ERR_NONE != _set_sleep_mode(mode))
return ERR_INVALID_ARG;
+ // wait for the mode set to actually take, per note in Microchip data
+ // sheet DS60001465, section 19.8.2:
+ //
+ // A small latency happens between the store instruction and actual
+ // writing of the SLEEPCFG register due to bridges. Software has to make
+ // sure the SLEEPCFG register reads the wanted value before issuing WFI
+ // instruction.
+ while(_get_sleep_mode() != mode);
+
_go_to_sleep();
return ERR_NONE;