Commit message (Collapse) | Author | Age | Files | Lines | |
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* | sysclk back to 168MHz, 10Mhz -> TIM2old-master | fishsoupisgood | 2019-05-08 | 1 | -12/+21 |
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* | cut #1 | fishsoupisgood | 2019-05-04 | 1 | -39/+277 |
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* | switch to stlink, blinky | root | 2019-02-22 | 1 | -1/+1 |
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* | use OCXO, and auto fail-over between different clock sources | fishsoupisgood | 2019-02-20 | 1 | -11/+20 |
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* | fix offsets | root | 2019-02-19 | 1 | -14/+13 |
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* | Working | root | 2019-02-19 | 1 | -16/+21 |
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* | everything working, even with fucked phy | root | 2019-02-19 | 1 | -41/+64 |
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* | working ethernet | root | 2019-02-19 | 1 | -0/+839 |