aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/bcm63xx/patches-5.4/532-board_hw556.patch
blob: deab30731916ffe307c962ab9e4f02c38324a51c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/string.h>
+#include <linux/pci_ids.h>
 #include <asm/addrspace.h>
 #include <bcm63xx_board.h>
 #include <bcm63xx_cpu.h>
@@ -1100,6 +1101,94 @@ static struct board_info __initdata boar
 	},
 };
 
+static struct board_info __initdata board_HW556_A = {
+	.name = "HW556_A",
+	.expected_cpu_id = 0x6358,
+
+	.has_pci = 1,
+	.has_ohci0 = 1,
+	.has_ehci0 = 1,
+	.num_usbh_ports = 2,
+
+	.has_caldata = 1,
+	.caldata = {
+		{
+			.vendor = PCI_VENDOR_ID_ATHEROS,
+			.caldata_offset = 0xf7e000,
+			.slot = 1,
+			.endian_check = 1,
+			.led_pin = 2,
+			.led_active_high = 1,
+		},
+	},
+
+	.has_enet1 = 1,
+	.enet1 = {
+		.has_phy = 1,
+		.phy_id = 0,
+		.force_speed_100 = 1,
+		.force_duplex_full = 1,
+	},
+};
+
+static struct board_info __initdata board_HW556_B = {
+	.name = "HW556_B",
+	.expected_cpu_id = 0x6358,
+
+	.has_pci = 1,
+	.has_ohci0 = 1,
+	.has_ehci0 = 1,
+	.num_usbh_ports = 2,
+
+	.has_caldata = 1,
+	.caldata = {
+		{
+			.vendor = PCI_VENDOR_ID_ATHEROS,
+			.caldata_offset = 0xefe000,
+			.slot = 1,
+			.endian_check = 1,
+			.led_pin = 2,
+			.led_active_high = 1,
+		},
+	},
+
+	.has_enet1 = 1,
+	.enet1 = {
+		.has_phy = 1,
+		.phy_id = 0,
+		.force_speed_100 = 1,
+		.force_duplex_full = 1,
+	},
+};
+
+static struct board_info __initdata board_HW556_C = {
+	.name = "HW556_C",
+	.expected_cpu_id = 0x6358,
+
+	.has_pci = 1,
+	.has_ohci0 = 1,
+	.has_ehci0 = 1,
+	.num_usbh_ports = 2,
+
+	.has_caldata = 1,
+	.caldata = {
+		{
+			.vendor = PCI_VENDOR_ID_RALINK,
+			.caldata_offset = 0xeffe00,
+			.slot = 1,
+			.eeprom = "rt2x00.eeprom",
+		},
+	},
+
+	.has_enet1 = 1,
+	.enet1 = {
+		.has_phy = 1,
+		.phy_id = 0,
+		.force_speed_100 = 1,
+		.force_duplex_full = 1,
+	},
+};
+
  /* T-Home Speedport W 303V Typ B */
 static struct board_info __initdata board_spw303v = {
 	.name = "96358-502V",
@@ -1304,6 +1393,9 @@ static const struct board_info __initcon
 	&board_nb4_fxc_r1,
 	&board_ct6373_1,
 	&board_HW553,
+	&board_HW556_A,
+	&board_HW556_B,
+	&board_HW556_C,
 	&board_spw303v,
 	&board_DVAG3810BN,
 #endif /* CONFIG_BCM63XX_CPU_6358 */
@@ -1374,6 +1466,9 @@ static struct of_device_id const bcm963x
 	{ .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
 	{ .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
 	{ .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+	{ .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
+	{ .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
+	{ .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, },
 	{ .compatible = "pirelli,a226g", .data = &board_DWVS0, },
 	{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
 	{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },