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--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -430,6 +430,23 @@ static struct clk clk_pcie = {
};
/*
+ * NAND clock
+ */
+static void nand_set(struct clk *clk, int enable)
+{
+ if (BCMCPU_IS_6362())
+ bcm_hwclock_set(CKCTL_6362_NAND_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_NAND_EN, enable);
+ else if (BCMCPU_IS_63268())
+ bcm_hwclock_set(CKCTL_63268_NAND_EN, enable);
+}
+
+static struct clk clk_nand = {
+ .set = nand_set,
+};
+
+/*
* Internal peripheral clock
*/
static struct clk clk_periph = {
@@ -626,6 +643,7 @@ static struct clk_lookup bcm6362_clks[]
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
/* gated clocks */
+ CLKDEV_INIT(NULL, "nand", &clk_nand),
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
@@ -643,6 +661,7 @@ static struct clk_lookup bcm6368_clks[]
CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
/* gated clocks */
+ CLKDEV_INIT(NULL, "nand", &clk_nand),
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
@@ -661,6 +680,7 @@ static struct clk_lookup bcm63268_clks[]
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
/* gated clocks */
+ CLKDEV_INIT(NULL, "nand", &clk_nand),
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
CLKDEV_INIT(NULL, "usbd", &clk_usbd),
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