#
# Copyright (C) 2008-2015 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk

PKG_NAME:=bison
PKG_VERSION:=3.3.2

PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@GNU/$(PKG_NAME)
PKG_HASH:=039ee45b61d95e5003e7e8376f9080001b4066ff357bde271b7faace53b9d804

HOST_BUILD_PARALLEL:=1

include $(INCLUDE_DIR)/host-build.mk

HOST_CONFIGURE_ARGS += --enable-threads=pth

define Host/Clean
	-$(MAKE) -C $(HOST_BUILD_DIR) uninstall
	$(call Host/Clean/Default)
endef

define Host/Install
	$(call Host/Install/Default)
	$(INSTALL_BIN) ./scripts/yacc $(STAGING_DIR_HOST)/bin/yacc
endef

$(eval $(call HostBuild))
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</select>
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<div class='path'>path: <a href='/cgit/openwrt/upstream/tree/?h=chaos_calmer&amp;id=1348284297797909edf086d766d16ddf734d9476'>root</a>/<a href='/cgit/openwrt/upstream/tree/target?h=chaos_calmer&amp;id=1348284297797909edf086d766d16ddf734d9476'>target</a>/<a href='/cgit/openwrt/upstream/tree/target/linux?h=chaos_calmer&amp;id=1348284297797909edf086d766d16ddf734d9476'>linux</a>/<a href='/cgit/openwrt/upstream/tree/target/linux/ar71xx?h=chaos_calmer&amp;id=1348284297797909edf086d766d16ddf734d9476'>ar71xx</a>/<a href='/cgit/openwrt/upstream/tree/target/linux/ar71xx/patches-3.18?h=chaos_calmer&amp;id=1348284297797909edf086d766d16ddf734d9476'>patches-3.18</a>/<a href='/cgit/openwrt/upstream/tree/target/linux/ar71xx/patches-3.18/605-MIPS-ath79-db120-fixes.patch?h=chaos_calmer&amp;id=1348284297797909edf086d766d16ddf734d9476'>605-MIPS-ath79-db120-fixes.patch</a></div><div class='content'>blob: 080165a80278a47c2236d818efb2019a0d131ee4 (<a href='/cgit/openwrt/upstream/plain/target/linux/ar71xx/patches-3.18/605-MIPS-ath79-db120-fixes.patch?h=chaos_calmer&amp;id=1348284297797909edf086d766d16ddf734d9476'>plain</a>)
<table summary='blob content' class='blob'>
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</pre></td>
<td class='lines'><pre><code><style>pre { line-height: 125%; margin: 0; }
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.highlight .il { color: #0000DD; font-weight: bold } /* Literal.Number.Integer.Long */</style><div class="highlight"><pre><span></span><span class="gd">--- a/arch/mips/ath79/mach-db120.c</span>
<span class="gi">+++ b/arch/mips/ath79/mach-db120.c</span>
<span class="gu">@@ -2,7 +2,7 @@</span>
  * Atheros DB120 reference board support
  *
  * Copyright (c) 2011 Qualcomm Atheros
<span class="gd">- * Copyright (c) 2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</span>
<span class="gi">+ * Copyright (c) 2011-2012 Gabor Juhos &lt;juhosg@openwrt.org&gt;</span>
  *
  * Permission to use, copy, modify, and/or distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
<span class="gu">@@ -19,16 +19,26 @@</span>
  */
 
 #include &lt;linux/pci.h&gt;
<span class="gi">+#include &lt;linux/phy.h&gt;</span>
<span class="gi">+#include &lt;linux/platform_device.h&gt;</span>
 #include &lt;linux/ath9k_platform.h&gt;
<span class="gi">+#include &lt;linux/ar8216_platform.h&gt;</span>
 
<span class="gd">-#include &quot;machtypes.h&quot;</span>
<span class="gi">+#include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</span>
<span class="gi">+</span>
<span class="gi">+#include &quot;common.h&quot;</span>
<span class="gi">+#include &quot;dev-ap9x-pci.h&quot;</span>
<span class="gi">+#include &quot;dev-eth.h&quot;</span>
 #include &quot;dev-gpio-buttons.h&quot;
 #include &quot;dev-leds-gpio.h&quot;
<span class="gi">+#include &quot;dev-m25p80.h&quot;</span>
<span class="gi">+#include &quot;dev-nfc.h&quot;</span>
 #include &quot;dev-spi.h&quot;
 #include &quot;dev-usb.h&quot;
 #include &quot;dev-wmac.h&quot;
<span class="gd">-#include &quot;pci.h&quot;</span>
<span class="gi">+#include &quot;machtypes.h&quot;</span>
 
<span class="gi">+#define DB120_GPIO_LED_USB		11</span>
 #define DB120_GPIO_LED_WLAN_5G		12
 #define DB120_GPIO_LED_WLAN_2G		13
 #define DB120_GPIO_LED_STATUS		14
<span class="gu">@@ -39,8 +49,10 @@</span>
 #define DB120_KEYS_POLL_INTERVAL	20	/* msecs */
 #define DB120_KEYS_DEBOUNCE_INTERVAL	(3 * DB120_KEYS_POLL_INTERVAL)
 
<span class="gd">-#define DB120_WMAC_CALDATA_OFFSET 0x1000</span>
<span class="gd">-#define DB120_PCIE_CALDATA_OFFSET 0x5000</span>
<span class="gi">+#define DB120_MAC0_OFFSET		0</span>
<span class="gi">+#define DB120_MAC1_OFFSET		6</span>
<span class="gi">+#define DB120_WMAC_CALDATA_OFFSET	0x1000</span>
<span class="gi">+#define DB120_PCIE_CALDATA_OFFSET	0x5000</span>
 
 static struct gpio_led db120_leds_gpio[] __initdata = {
 	{
<span class="gu">@@ -63,6 +75,11 @@ static struct gpio_led db120_leds_gpio[]</span>
 		.gpio		= DB120_GPIO_LED_WLAN_2G,
 		.active_low	= 1,
 	},
<span class="gi">+	{</span>
<span class="gi">+		.name		= &quot;db120:green:usb&quot;,</span>
<span class="gi">+		.gpio		= DB120_GPIO_LED_USB,</span>
<span class="gi">+		.active_low	= 1,</span>
<span class="gi">+	}</span>
 };
 
 static struct gpio_keys_button db120_gpio_keys[] __initdata = {
<span class="gu">@@ -76,60 +93,85 @@ static struct gpio_keys_button db120_gpi</span>
 	},
 };
 
<span class="gd">-static struct spi_board_info db120_spi_info[] = {</span>
<span class="gd">-	{</span>
<span class="gd">-		.bus_num	= 0,</span>
<span class="gd">-		.chip_select	= 0,</span>
<span class="gd">-		.max_speed_hz	= 25000000,</span>
<span class="gd">-		.modalias	= &quot;s25sl064a&quot;,</span>
<span class="gd">-	}</span>
<span class="gi">+static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = {</span>
<span class="gi">+	.mode = AR8327_PAD_MAC_RGMII,</span>
<span class="gi">+	.txclk_delay_en = true,</span>
<span class="gi">+	.rxclk_delay_en = true,</span>
<span class="gi">+	.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,</span>
<span class="gi">+	.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,</span>
 };
 
<span class="gd">-static struct ath79_spi_platform_data db120_spi_data = {</span>
<span class="gd">-	.bus_num	= 0,</span>
<span class="gd">-	.num_chipselect = 1,</span>
<span class="gi">+static struct ar8327_led_cfg db120_ar8327_led_cfg = {</span>
<span class="gi">+	.led_ctrl0 = 0x00000000,</span>
<span class="gi">+	.led_ctrl1 = 0xc737c737,</span>
<span class="gi">+	.led_ctrl2 = 0x00000000,</span>
<span class="gi">+	.led_ctrl3 = 0x00c30c00,</span>
<span class="gi">+	.open_drain = true,</span>
 };
 
<span class="gd">-#ifdef CONFIG_PCI</span>
<span class="gd">-static struct ath9k_platform_data db120_ath9k_data;</span>
<span class="gd">-</span>
<span class="gd">-static int db120_pci_plat_dev_init(struct pci_dev *dev)</span>
<span class="gd">-{</span>
<span class="gd">-	switch (PCI_SLOT(dev-&gt;devfn)) {</span>
<span class="gd">-	case 0:</span>
<span class="gd">-		dev-&gt;dev.platform_data = &amp;db120_ath9k_data;</span>
<span class="gd">-		break;</span>
<span class="gd">-	}</span>
<span class="gd">-</span>
<span class="gd">-	return 0;</span>
<span class="gd">-}</span>
<span class="gd">-</span>
<span class="gd">-static void __init db120_pci_init(u8 *eeprom)</span>
<span class="gd">-{</span>
<span class="gd">-	memcpy(db120_ath9k_data.eeprom_data, eeprom,</span>
<span class="gd">-	       sizeof(db120_ath9k_data.eeprom_data));</span>
<span class="gi">+static struct ar8327_platform_data db120_ar8327_data = {</span>
<span class="gi">+	.pad0_cfg = &amp;db120_ar8327_pad0_cfg,</span>
<span class="gi">+	.port0_cfg = {</span>
<span class="gi">+		.force_link = 1,</span>
<span class="gi">+		.speed = AR8327_PORT_SPEED_1000,</span>
<span class="gi">+		.duplex = 1,</span>
<span class="gi">+		.txpause = 1,</span>
<span class="gi">+		.rxpause = 1,</span>
<span class="gi">+	},</span>
<span class="gi">+	.led_cfg = &amp;db120_ar8327_led_cfg,</span>
<span class="gi">+};</span>
 
<span class="gd">-	ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);</span>
<span class="gd">-	ath79_register_pci();</span>
<span class="gd">-}</span>
<span class="gd">-#else</span>
<span class="gd">-static inline void db120_pci_init(u8 *eeprom) {}</span>
<span class="gd">-#endif /* CONFIG_PCI */</span>
<span class="gi">+static struct mdio_board_info db120_mdio0_info[] = {</span>
<span class="gi">+	{</span>
<span class="gi">+		.bus_id = &quot;ag71xx-mdio.0&quot;,</span>
<span class="gi">+		.phy_addr = 0,</span>
<span class="gi">+		.platform_data = &amp;db120_ar8327_data,</span>
<span class="gi">+	},</span>
<span class="gi">+};</span>
 
 static void __init db120_setup(void)
 {
 	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 
<span class="gi">+	ath79_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO);</span>
<span class="gi">+	ath79_register_m25p80(NULL);</span>
<span class="gi">+</span>
 	ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
 				 db120_leds_gpio);
 	ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
 					ARRAY_SIZE(db120_gpio_keys),
 					db120_gpio_keys);
<span class="gd">-	ath79_register_spi(&amp;db120_spi_data, db120_spi_info,</span>
<span class="gd">-			   ARRAY_SIZE(db120_spi_info));</span>
 	ath79_register_usb();
 	ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL);
<span class="gd">-	db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);</span>
<span class="gi">+	ap91_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL);</span>
<span class="gi">+</span>
<span class="gi">+	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |</span>
<span class="gi">+				   AR934X_ETH_CFG_SW_ONLY_MODE);</span>
<span class="gi">+</span>
<span class="gi">+	ath79_register_mdio(1, 0x0);</span>
<span class="gi">+	ath79_register_mdio(0, 0x0);</span>
<span class="gi">+</span>
<span class="gi">+	ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0);</span>
<span class="gi">+</span>
<span class="gi">+	mdiobus_register_board_info(db120_mdio0_info,</span>
<span class="gi">+				    ARRAY_SIZE(db120_mdio0_info));</span>
<span class="gi">+</span>
<span class="gi">+	/* GMAC0 is connected to an AR8327 switch */</span>
<span class="gi">+	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;</span>
<span class="gi">+	ath79_eth0_data.phy_mask = BIT(0);</span>
<span class="gi">+	ath79_eth0_data.mii_bus_dev = &amp;ath79_mdio0_device.dev;</span>
<span class="gi">+	ath79_eth0_pll_data.pll_1000 = 0x06000000;</span>
<span class="gi">+	ath79_register_eth(0);</span>
<span class="gi">+</span>
<span class="gi">+	/* GMAC1 is connected to the internal switch */</span>
<span class="gi">+	ath79_init_mac(ath79_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0);</span>
<span class="gi">+	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;</span>
<span class="gi">+	ath79_eth1_data.speed = SPEED_1000;</span>
<span class="gi">+	ath79_eth1_data.duplex = DUPLEX_FULL;</span>
<span class="gi">+</span>
<span class="gi">+	ath79_register_eth(1);</span>
<span class="gi">+</span>
<span class="gi">+	ath79_register_nfc();</span>
 }
 
 MIPS_MACHINE(ATH79_MACH_DB120, &quot;DB120&quot;, &quot;Atheros DB120 reference board&quot;,
<span class="gd">--- a/arch/mips/ath79/Kconfig</span>
<span class="gi">+++ b/arch/mips/ath79/Kconfig</span>
<span class="gu">@@ -43,9 +43,12 @@ config ATH79_MACH_AP81</span>
 config ATH79_MACH_DB120
 	bool &quot;Atheros DB120 reference board&quot;
 	select SOC_AR934X
<span class="gi">+	select ATH79_DEV_AP9X_PCI if PCI</span>
<span class="gi">+	select ATH79_DEV_ETH</span>
 	select ATH79_DEV_GPIO_BUTTONS
 	select ATH79_DEV_LEDS_GPIO
<span class="gd">-	select ATH79_DEV_SPI</span>
<span class="gi">+	select ATH79_DEV_M25P80</span>
<span class="gi">+	select ATH79_DEV_NFC</span>
 	select ATH79_DEV_USB
 	select ATH79_DEV_WMAC
 	help
</pre></div>
</code></pre></td></tr></table>
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