/*
 * This file is part of the flashrom project.
 *
 * Copyright (C) 2020 The Chromium OS Authors
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <stdlib.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <time.h>
#include <errno.h>

#include "programmer.h"
#include "spi.h"
#include "i2c_helper.h"

#define REGISTER_ADDRESS	(0x94 >> 1)
#define PAGE_ADDRESS		(0x9e >> 1)
#define LSPCON_PAGE_SIZE	256
#define MAX_SPI_WAIT_RETRIES	1000

#define CLT2_SPI		0x82
#define SPIEDID_BASE_ADDR2	0x8d
#define ROMADDR_BYTE1		0x8e
#define ROMADDR_BYTE2		0x8f
#define SWSPI_WDATA		0x90
 #define SWSPI_WDATA_CLEAR_STATUS		0x00
 #define SWSPI_WDATA_WRITE_REGISTER		0x01
 #define SWSPI_WDATA_READ_REGISTER		0x05
 #define SWSPI_WDATA_ENABLE_REGISTER		0x06
 #define SWSPI_WDATA_SECTOR_ERASE		0x20
 #define SWSPI_WDATA_PROTECT_BP			0x8c
#define SWSPI_RDATA		0x91
#define SWSPI_LEN		0x92
#define SWSPICTL		0x93
 #define SWSPICTL_ACCESS_TRIGGER			1
 #define SWSPICTL_CLEAR_PTR			(1 << 1)
 #define SWSPICTL_NO_READ			(1 << 2)
 #define SWSPICTL_ENABLE_READBACK		(1 << 3)
 #define SWSPICTL_MOT				(1 << 4)
#define SPISTATUS		0x9e
 #define SPISTATUS_BYTE_PROGRAM_FINISHED		0
 #define SPISTATUS_BYTE_PROGRAM_IN_IF		1
 #define SPISTATUS_BYTE_PROGRAM_SEND_DONE	(1 << 1)
 #define SPISTATUS_SECTOR_ERASE_FINISHED		0
 #define SPISTATUS_SECTOR_ERASE_IN_IF		(1 << 2)
 #define SPISTATUS_SECTOR_ERASE_SEND_DONE	(1 << 3)
 #define SPISTATUS_CHIP_ERASE_FINISHED		0
 #define SPISTATUS_CHIP_ERASE_IN_IF		(1 << 4)
 #define SPISTATUS_CHIP_ERASE_SEND_DONE		(1 << 5)
 #define SPISTATUS_FW_UPDATE_ENABLE		(1 << 6)
#define WRITE_PROTECTION	0xb3
 #define WRITE_PROTECTION_ON			0
 #define WRITE_PROTECTION_OFF			0x10
#define MPU			0xbc
#define PAGE_HW_WRITE		0xda
 #define PAGE_HW_WRITE_DISABLE			0
 #define PAGE_HW_COFIG_REGISTER			0xaa
 #define PAGE_HW_WRITE_ENABLE			0x55

struct lspcon_i2c_spi_data {
	int fd;
};

typedef struct {
	uint8_t command;
	const uint8_t *data;
	uint8_t data_size;
	uint8_t control;
} packet_t;

static int lspcon_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
{
	i2c_buffer_t data;
	if (i2c_buffer_t_fill(&data, buf, len))
		return SPI_GENERIC_ERROR;

	return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
}

static int lspcon_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
{
	i2c_buffer_t data;
	if (i2c_buffer_t_fill(&data, buf, len))
		return SPI_GENERIC_ERROR;

	return i2c_read(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
}

static int get_fd_from_context(const struct flashctx *flash)
{
	if (!flash || !flash->mst || !flash->mst->spi.data) {
		msg_perr("Unable to extract fd from flash context.\n");
		return SPI_GENERIC_ERROR;
	}
        const struct lspcon_i2c_spi_data *data =
		(const struct lspcon_i2c_spi_data *)flash->mst->spi.data;

	return data->fd;
}

static int lspcon_i2c_spi_write_register(int fd, uint8_t i2c_register, uint8_t value)
{
	uint8_t command[] = { i2c_register, value };
	return lspcon_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2);
}

static int lspcon_i2c_spi_read_register(int fd, uint8_t i2c_register, uint8_t *value)
{
	uint8_t command[] = { i2c_register };
	int ret = lspcon_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1);
	ret |= lspcon_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1);

	return ret ? SPI_GENERIC_ERROR : 0;
}

static int lspcon_i2c_spi_register_control(int fd, packet_t *packet)
{
	int i;
	int ret = lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->command);
	if (ret)
		return ret;

	/* Higher 4 bits are read size. */
	int write_size = packet->data_size & 0x0f;
	for (i = 0; i < write_size; ++i) {
		ret |= lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->data[i]);
	}

	ret |= lspcon_i2c_spi_write_register(fd, SWSPI_LEN, packet->data_size);
	ret |= lspcon_i2c_spi_write_register(fd, SWSPICTL, packet->control);

	return ret;
}

static int lspcon_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask)
{
	uint8_t val;
	int tried = 0;
	int ret = 0;
	do {
		ret |= lspcon_i2c_spi_read_register(fd, offset, &val);
	} while (!ret && (val & mask) && ++tried < MAX_SPI_WAIT_RETRIES);

	if (tried == MAX_SPI_WAIT_RETRIES) {
		msg_perr("%s: Time out on sending command.\n", __func__);
		return -MAX_SPI_WAIT_RETRIES;
	}

	return (val & mask) ? SPI_GENERIC_ERROR : ret;
}

static int lspcon_i2c_spi_wait_rom_free(int fd)
{
	uint8_t val;
	int tried = 0;
	int ret = 0;
	ret |= lspcon_i2c_spi_wait_command_done(fd, SPISTATUS,
		SPISTATUS_SECTOR_ERASE_IN_IF | SPISTATUS_SECTOR_ERASE_SEND_DONE);
	if (ret)
		return ret;

	do {
		packet_t packet = { SWSPI_WDATA_READ_REGISTER, NULL, 0,  SWSPICTL_ACCESS_TRIGGER };
		ret |= lspcon_i2c_spi_register_control(fd, &packet);
		ret |= lspcon_i2c_spi_wait_command_done(fd, SWSPICTL, SWSPICTL_ACCESS_TRIGGER);
		ret |= lspcon_i2c_spi_read_register(fd, SWSPI_RDATA, &val);
	} while (!ret && (val & SWSPICTL_ACCESS_TRIGGER) && ++tried < MAX_SPI_WAIT_RETRIES);

	if (tried == MAX_SPI_WAIT_RETRIES) {
		msg_perr("%s: Time out on waiting ROM free.\n", __func__);
		return -MAX_SPI_WAIT_RETRIES;
	}

	return (val & SWSPICTL_ACCESS_TRIGGER) ? SPI_GENERIC_ERROR : ret;
}

static int lspcon_i2c_spi_toggle_register_protection(int fd, int toggle)
{
	return lspcon_i2c_spi_write_register(fd, WRITE_PROTECTION,
		toggle ? WRITE_PROTECTION_OFF : WRITE_PROTECTION_ON);
}

static int lspcon_i2c_spi_enable_write_status_register(int fd)
{
	int ret = lspcon_i2c_spi_toggle_register_protection(fd, 1);
	packet_t packet = {
		SWSPI_WDATA_ENABLE_REGISTER, NULL, 0, SWSPICTL_ACCESS_TRIGGER | SWSPICTL_NO_READ };
	ret |= lspcon_i2c_spi_register_control(fd, &packet);
	ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);

	return ret;
}

static int lspcon_i2c_spi_enable_write_status_register_protection(int fd)
{
	int ret = lspcon_i2c_spi_toggle_register_protection(fd, 1);
	uint8_t data[] = { SWSPI_WDATA_PROTECT_BP };
	packet_t packet = {
		SWSPI_WDATA_WRITE_REGISTER, data, 1, SWSPICTL_ACCESS_TRIGGER | SWSPICTL_NO_READ };
	ret |= lspcon_i2c_spi_register_control(fd, &packet);
	ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);

	return ret;
}

static int lspcon_i2c_spi_disable_protection(int fd)
{
	int ret = lspcon_i2c_spi_toggle_register_protection(fd, 1);
	uint8_t data[] = { SWSPI_WDATA_CLEAR_STATUS };
	packet_t packet = {
		SWSPI_WDATA_WRITE_REGISTER, data, 1, SWSPICTL_ACCESS_TRIGGER | SWSPICTL_NO_READ };
	ret |= lspcon_i2c_spi_register_control(fd, &packet);
	ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0);

	return ret;
}

static int lspcon_i2c_spi_disable_hw_write(int fd)
{
	return lspcon_i2c_spi_write_register(fd, PAGE_HW_WRITE, PAGE_HW_WRITE_DISABLE);
}

static int lspcon_i2c_spi_enable_write_protection(int fd)
{
	int ret = lspcon_i2c_spi_enable_write_status_register(fd);
	ret |= lspcon_i2c_spi_enable_write_status_register_protection(fd);
	ret |= lspcon_i2c_spi_wait_rom_free(fd);
	ret |= lspcon_i2c_spi_disable_hw_write(fd);

	return ret;
}

static int lspcon_i2c_spi_disable_all_protection(int fd)
{
	int ret = lspcon_i2c_spi_enable_write_status_register(fd);
	ret |= lspcon_i2c_spi_disable_protection(fd);
	ret |= lspcon_i2c_spi_wait_rom_free(fd);

	return ret;
}

static int lspcon_i2c_spi_send_command(const struct flashctx *flash,
				unsigned int writecnt, unsigned int readcnt,
				const unsigned char *writearr,
				unsigned char