blob: 458915d5eb85106b62a8943330a68c0b8be258e3 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
|
#ifndef __PERF_MUSL_COMPAT_H
#define __PERF_MUSL_COMPAT_H
#ifndef __ASSEMBLER__
#include <sys/ioctl.h>
#include <unistd.h>
#include <stdio.h>
#include <syscall.h>
#include <sched.h>
#undef _IOWR
#undef _IOR
#undef _IOW
#undef _IOC
#undef _IO
#define _SC_LEVEL1_DCACHE_LINESIZE -1
static inline long sysconf_wrap(int name)
{
FILE *f;
int val;
switch (name) {
case _SC_LEVEL1_DCACHE_LINESIZE:
f = fopen("/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size", "r");
if (!f)
return 0;
if (fscanf(f, "%d", &val) != 1)
return 0;
fclose(f);
return val;
default:
return sysconf(name);
}
}
#define sysconf(_n) sysconf_wrap(_n)
static inline int compat_sched_getcpu(void)
{
#ifdef __NR_getcpu
unsigned int val;
if (syscall(__NR_getcpu, &val))
return -1;
return val;
#else
return -1;
#endif
}
#define sched_getcpu compat_sched_getcpu
#endif
#endif
|
