#include "mt7620a_phicomm_k2x.dtsi" / { compatible = "phicomm,k2g", "ralink,mt7620a-soc"; model = "Phicomm K2G"; }; &partitions { partition@50000 { reg = <0x50000 0x50000>; label = "permanent_config"; read-only; }; partition@a0000 { compatible = "denx,uimage"; reg = <0xa0000 0x760000>; label = "firmware"; }; }; ðernet { pinctrl-names = "default"; pinctrl-0 = <&rgmii2_pins &mdio_pins>; mtd-mac-address = <&factory 0x28>; mediatek,portmap = "llllw"; port@5 { status = "okay"; phy-handle = <&phy5>; phy-mode = "rgmii"; }; mdio-bus { status = "okay"; phy5: ethernet-phy@5 { reg = <5>; phy-mode = "rgmii"; }; }; }; &wmac { pinctrl-names = "default"; pinctrl-0 = <&pa_pins>; }; rt/upstream' href='/cgit.cgi/openwrt/upstream/'>openwrt/upstream
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