From 2790ba4aa3e487ac29d6027eb226ed986f0e2769 Mon Sep 17 00:00:00 2001
From: Li Yang <leoyang.li@nxp.com>
Date: Thu, 2 May 2019 16:10:03 -0500
Subject: [PATCH] arm64: dts: ls1088a: accumulated change to ls1088a boards
commit f967940f2fb73bc7ec676dbad9f32fbf4e7fea2b
Author: Pengbo Mu <pengbo.mu@nxp.com>
Date: Fri Jul 13 16:19:36 2018 +0800
arm64: dts: ls1088a: add snps incr burst type adjustment in usb0 &
usb1
This property could fix the defect that external usb device always
prints this error log --- 'reset SuperSpeed USB device number n
using
xhci_hcd' when system power on.
Signed-off-by: Pengbo Mu <pengbo.mu@nxp.com>
commit 46123df3a174f0d76c8b954a0386e64841453836
Author: Florinel Iordache <florinel.iordache@nxp.com>
Date: Thu Aug 9 12:29:18 2018 +0300
arm64: dts: updates for Unified Backplane driver
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
commit 3b214bd42d47ebe7b6af925a3ffcf09aaaaabfb9
Author: Nipun Gupta <nipun.gupta@nxp.com>
Date: Sat Apr 28 00:20:48 2018 +0530
arm64: dts: ls1088: add dma-cohernet property in fsl-mc node
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
commit 240b04a98171f6774d1c3c498f8cb21f4411ac5f
Author: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Date: Thu Apr 26 12:26:54 2018 +0300
arm64: dts: ls1088a: move fsl-mc node as a child of soc
Move the fsl-mc hardware manager node in the soc node because all
the
soc settings (such as 'dma-ranges') also apply to the fsl-mc and
need
to be propagated to it.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
commit 3f2f50950f763d1335181ce374a11ed118abf0fa
Author: Nipun Gupta <nipun.gupta@nxp.com>
Date: Wed Apr 25 09:43:47 2018 +0530
arm64: dts: ls1088: add dma ranges property
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
commit 6afd0157e8fa2510790537855c86f8a7c1431abe
Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Date: Mon Apr 2 16:25:38 2018 +0800
arm64: dts: ls1088a: add dts entry for A-010650
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
commit 0f8432c30c44771f9180aa7bf7580ad1d7e7c9d3
Author: Nipun Gupta <nipun.gupta@nxp.com>
Date: Mon Feb 26 10:40:37 2018 +0530
arm64: dts: ls1088a: add dma coherent property in smmu node
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
commit 6417c66b823ab380cf73ee252a998d98b28f0180
Author: Suresh Gupta <suresh.gupta@nxp.com>
Date: Fri Feb 2 00:04:41 2018 +0530
arm64: dts: freescale: ls1088a: Modify DT nodes for qspi
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
commit 01a1ea9e781d307ab87da95043ec898736495fff
Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Date: Thu Nov 2 10:36:48 2017 +0800
arm64: dts: ls1088a: correct the i2c clock to 1/8 platform pll
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
commit 60122f1192e1cc23e5952468cc5a884287d64907
Author: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Date: Thu Sep 7 10:08:31 2017 +0530
arm64: dts: ls1088a: Add iommu-map property for pci
This patch adds iommu-map property for PCIe, which enables
SMMU for these devices on LS1088.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
commit 43c4d0cf074106b411280c5b2be75d5d6e63fb01
Author: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
Date: Mon Aug 21 11:43:07 2017 +0300
arm64: dts: ls1088a: add backplane support
Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
commit 57d49424694f72adbf7cf1dbeff38704f0d65359
Author: Ashish Kumar <Ashish.Kumar@nxp.com>
Date: Mon Jun 19 18:32:13 2017 +0530
arm64: dts: ls1088: Add Reboot node in dtsi
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
commit ee950989a7babc240153a20fe468573e13d61f98
Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Date: Thu May 11 14:59:28 2017 +0800
arm64: dts: ls1088a: add ftm0 nodes
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
commit 6d3a96446a7ffccb0b9936b616d855c8d5572bce
Author: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Date: Wed May 3 14:26:35 2017 +0000
arm64: dts: fsl/ls1088,ls208x: Add mdio and phy nodes
Add mdio and phy nodes for the following FSL platforms:
- LS1088A RDB
- LS2080A QDS & RDB
- LS2088A QDS, RDB & simu
Contains contributions from patches by the following authors:
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava
<pratiyush.srivastava@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
commit 971ff2e74cfebb84286ec3e191f5910dded4bd41
Author: Suresh Gupta <suresh.gupta@nxp.com>
Date: Thu May 4 18:04:44 2017 +0530
arm64: dts: ls1088a: Add QSPI node for QDS, RDB
This is temporary patch, will rewrite for open source
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
commit c61036e6dfe264d61cc213293040d873d863e8ac
Author: Nipun Gupta <nipun.gupta@nxp.com>
Date: Thu Apr 27 23:35:15 2017 +0530
arm64: dts: add iommu-map property in fsl-mc node
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
commit a4412cc510162a900d10c8ca4add71defb3f2d97
Author: Nipun Gupta <nipun.gupta@nxp.com>
Date: Wed Apr 19 22:26:15 2017 +0530
arm64: dts: add smmu device node in LS1088 devicetree
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 50 ++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 104 +++++++++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 108 +++++++++++++++++++++-
3 files changed, 261 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
@@ -131,6 +131,30 @@
};
};
+&qspi {
+ status = "okay";
+ fsl,qspi-has-second-chip;
+ qflash0: s25fs512s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+
+ qflash1: s25fs512s@1 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <1>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+};
+
&duart0 {
status = "okay";
};
@@ -146,3 +170,29 @@
&sata {
status = "okay";
};
+
+&pcs_mdio1 {
+ pcs_phy1: ethernet-phy@0 {
+ backplane-mode = "10gbase-kr";
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x0>;
+ fsl,lane-handle = <&serdes1>;
+ fsl,lane-reg = <0x840 0x40>;/* lane B */
+ };
+};
+
+&pcs_mdio2 {
+ pcs_phy2: ethernet-phy@0 {
+ backplane-mode = "10gbase-kr";
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x0>;
+ fsl,lane-handle = <&serdes1>;
+ fsl,lane-reg = <0x800 0x40>;/* lane A */
+ };
+};
+
+/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
+ * &dpmac1 {
+ * phy-handle = <&pcs_phy1>;
+ * };
+ */
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -74,6 +74,31 @@
};
};
+&qspi {
+ status = "okay";
+ fsl,qspi-has-second-chip;
+ qflash0: s25fs512s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+
+ qflash1: s25fs512s@1 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <1>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+
+};
+
&duart0 {
status = "okay";
};
@@ -97,3 +122,82 @@
&usb1 {
status = "okay";
};
+
+&emdio1 {
+ /* Freescale F104 PHY1 */
+ mdio1_phy1: emdio1_phy@1 {
+ reg = <0x1c>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy2: emdio1_phy@2 {
+ reg = <0x1d>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy3: emdio1_phy@3 {
+ reg = <0x1e>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy4: emdio1_phy@4 {
+ reg = <0x1f>;
+ phy-connection-type = "qsgmii";
+ };
+ /* F104 PHY2 */
+ mdio1_phy5: emdio1_phy@5 {
+ reg = <0x0c>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy6: emdio1_phy@6 {
+ reg = <0x0d>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy7: emdio1_phy@7 {
+ reg = <0x0e>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy8: emdio1_phy@8 {
+ reg = <0x0f>;
+ phy-connection-type = "qsgmii";
+ };
+};
+
+&emdio2 {
+ /* Aquantia AQR105 10G PHY */
+ mdio2_phy1: emdio2_phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ interrupts = <0 2 0x4>;
+ reg = <0x0>;
+ phy-connection-type = "xfi";
+ };
+};
+
+/* DPMAC connections to external PHYs
+ * based on LS1088A RM RevC - $24.1.2 SerDes Options
+ */
+/* DPMAC1 is 10G SFP+, fixed link */
+&dpmac2 {
+ phy-handle = <&mdio2_phy1>;
+};
+&dpmac3 {
+ phy-handle = <&mdio1_phy5>;
+};
+&dpmac4 {
+ phy-handle = <&mdio1_phy6>;
+};
+&dpmac5 {
+ phy-handle = <&mdio1_phy7>;
+};
+&dpmac6 {
+ phy-handle = <&mdio1_phy8>;
+};
+&dpmac7 {
+ phy-handle = <&mdio1_phy1>;
+};
+&dpmac8 {
+ phy-handle = <&mdio1_phy2>;
+};
+&dpmac9 {
+ phy-handle = <&mdio1_phy3>;
+};
+&dpmac10 {
+ phy-handle = <&mdio1_phy4>;
+};
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -185,6 +185,19 @@
clock-output-names = "sysclk";
};
+ rstcr: syscon@1e60000 {
+ compatible = "fsl,ls1088a-rstcr", "syscon";
+ reg = <0x0 0x1e60000 0x0 0x4>;
+ };
+
+ reboot {
+ compatible = "syscon-reboot";
+ regmap = <&rstcr>;
+ offset = <0x0>;
+ mask = <0x02>;
+ };
+
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -205,6 +218,11 @@
little-endian;
};
+ serdes1: serdes@1ea0000 {
+ reg = <0x0 0x1ea0000 0 0x00002000>;
+ compatible = "fsl,serdes-10g";
+ };
+
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
@@ -325,6 +343,72 @@
#interrupt-cells = <2>;
};
+ /* TODO: WRIOP (CCSR?) */
+ emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO1: 0x1_6000
+ */
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8B96000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian; /* force the driver in LE mode */
+
+ /* Not necessary on the QDS, but needed on the RDB */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO2: 0x1_7000
+ */
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8B97000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian; /* force the driver in LE mode */
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio1: mdio@0x8c07000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c07000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio2: mdio@0x8c0b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0b000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio3: mdio@0x8c0f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio4: mdio@0x8c13000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c13000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
ifc: ifc@2240000 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x2240000 0x0 0x20000>;
@@ -335,13 +419,20 @@
status = "disabled";
};
+ ftm0: ftm0@2800000 {
+ compatible = "fsl,ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ interrupts = <0 44 4>;
+ };
+
i2c0: i2c@2000000 {
- compatible = "fsl,vf610-i2c";
+ compatible = "fsl,vf610-i2c", "fsl,ls1088a-vf610-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2000000 0x0 0x10000>;
interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 7>;
+ scl-gpios = <&gpio3 30 0>;
status = "disabled";
};
@@ -405,6 +496,7 @@
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
@@ -418,6 +510,17 @@
dma-coherent;
status = "disabled";
};
+ qspi: spi@20c0000 {
+ compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x20c0000 0x0 0x10000>,
+ <0x0 0x20000000 0x0 0x10000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ interrupts = <0 25 0x4>; /* Level high type */
+ clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clock-names = "qspi_en", "qspi";
+ };
crypto: crypto@8000000 {
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
@@ -474,6 +577,7 @@
ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&its>;
+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
@@ -499,6 +603,7 @@
ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&its>;
+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
@@ -524,6 +629,7 @@
ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&its>;
+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,