From 4d1515070baeca64fedaca957b6b4156976f3b3a Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Fri, 27 Jan 2017 15:18:00 +0100 Subject: kernel: bump to 4.4.45 Refreshed patches for all supported targets. Compiled & tested on cns3xxx & imx6 Signed-off-by: Koen Vandeputte --- .../ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch | 4 ++-- ...nd-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch | 2 +- target/linux/cns3xxx/patches-4.4/200-broadcom_phy_reinit.patch | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'target') diff --git a/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch b/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch index 71649cacd6..8972c40772 100644 --- a/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch +++ b/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch @@ -1,6 +1,6 @@ --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -644,6 +644,7 @@ +@@ -649,6 +649,7 @@ #define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) #define AR933X_BOOTSTRAP_EEPBUSY BIT(4) @@ -8,7 +8,7 @@ #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -@@ -673,6 +674,8 @@ +@@ -678,6 +679,8 @@ #define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2) diff --git a/target/linux/cns3xxx/patches-4.4/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch b/target/linux/cns3xxx/patches-4.4/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch index c58830ac6f..db2c29fc92 100644 --- a/target/linux/cns3xxx/patches-4.4/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch +++ b/target/linux/cns3xxx/patches-4.4/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch @@ -1,6 +1,6 @@ --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c -@@ -1964,7 +1964,8 @@ static void pcie_write_mrrs(struct pci_d +@@ -1966,7 +1966,8 @@ static void pcie_write_mrrs(struct pci_d /* In the "safe" case, do not configure the MRRS. There appear to be * issues with setting MRRS to 0 on a number of devices. */ diff --git a/target/linux/cns3xxx/patches-4.4/200-broadcom_phy_reinit.patch b/target/linux/cns3xxx/patches-4.4/200-broadcom_phy_reinit.patch index 1c7215051d..0d8ff5997b 100644 --- a/target/linux/cns3xxx/patches-4.4/200-broadcom_phy_reinit.patch +++ b/target/linux/cns3xxx/patches-4.4/200-broadcom_phy_reinit.patch @@ -1,6 +1,6 @@ --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c -@@ -332,6 +332,11 @@ static int bcm5481_config_aneg(struct ph +@@ -362,6 +362,11 @@ static int bcm5481_config_aneg(struct ph /* Write bits 14:0. */ reg |= (1 << 15); phy_write(phydev, 0x18, reg); @@ -11,4 +11,4 @@ + phy_write(phydev, 0x1c, 0xa41f); } - return ret; + if (of_property_read_bool(np, "enet-phy-lane-swap")) { -- cgit v1.2.3