From 278512665094888d3c007fdd74e090496d6c811d Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Fri, 9 Oct 2020 21:53:35 +0200 Subject: kernel: remove support for kernel 4.19 We use 5.4 on all targets by default, and 4.19 has never been released in a stable version. There is no reason to keep it. Signed-off-by: Adrian Schmutzler --- target/linux/apm821xx/config-4.19 | 335 - ...-dmaengine-dw-dmac-add-protection-control.patch | 74 - ...-mask-CRYPTO_ALG_ASYNC-from-cipher-tfm-al.patch | 34 - ...rypto4xx_core-don-t-abuse-__dma_sync_page.patch | 30 - ...-cross-tree-phase-out-dma_zalloc_coherent.patch | 40 - ...-crypto-crypto4xx-add-prng-crypto-support.patch | 199 - ...to4xx-get-rid-of-redundant-using_sd-varia.patch | 63 - .../140-GPIO-add-named-gpio-exports.patch | 169 - .../201-add-amcc-apollo3g-support.patch | 30 - .../202-add-netgear-wndr4700-support.patch | 32 - .../300-fix-atheros-nics-on-apm82181.patch | 51 - .../patches-4.19/301-fix-memory-map-wndr4700.patch | 14 - ...d-firmware-loader-for-uPD720201-and-uPD72.patch | 545 - .../802-usb-xhci-force-msi-renesas-xhci.patch | 53 - .../803-hwmon-tc654-add-detection-routine.patch | 65 - ...04-hwmon-tc654-add-thermal_cooling-device.patch | 174 - target/linux/armvirt/32/config-4.19 | 91 - target/linux/armvirt/64/config-4.19 | 230 - target/linux/armvirt/config-4.19 | 218 - target/linux/ath79/config-4.19 | 239 - .../0002-watchdog-ath79-fix-maximum-timeout.patch | 32 - ...03-leds-add-reset-controller-based-driver.patch | 186 - .../patches-4.19/0004-phy-add-ath79-usb-phys.patch | 333 - .../0005-usb-add-more-OF-quirk-properties.patch | 24 - ...-ath79-intc-add-irq-cascade-driver-for-QC.patch | 168 - ...irqchip-irq-ath79-cpu-drop-OF-init-helper.patch | 23 - ...1-MIPS-ath79-select-the-PINCTRL-subsystem.patch | 24 - ...bindings-PCI-qcom-ar7100-adds-binding-doc.patch | 57 - .../0018-MIPS-pci-ar71xx-convert-to-OF.patch | 202 - ...bindings-PCI-qcom-ar7240-adds-binding-doc.patch | 61 - .../0020-MIPS-pci-ar724x-convert-to-OF.patch | 205 - ...add-helpers-for-setting-clocks-and-expose.patch | 243 - ...move-legacy-wdt-and-uart-clock-aliases-ou.patch | 114 - ...h79-pass-PLL-base-to-clock-init-functions.patch | 242 - ...make-specifying-the-reference-clock-in-DT.patch | 229 - ...support-setting-up-clock-via-DT-on-all-So.patch | 77 - ...-ath79-export-switch-MDIO-reference-clock.patch | 59 - .../0027-MIPS-ath79-drop-legacy-IRQ-code.patch | 233 - .../0028-MIPS-ath79-drop-machfiles.patch | 1048 -- .../0029-MIPS-ath79-drop-legacy-pci-code.patch | 379 - ...79-drop-platform-device-registration-code.patch | 933 -- .../0031-MIPS-ath79-drop-OF-clock-code.patch | 95 - .../0032-MIPS-ath79-sanitize-symbols.patch | 93 - .../0033-spi-ath79-drop-pdata-support.patch | 73 - .../0034-MIPS-ath79-ath9k-exports.patch | 27 - .../0036-GPIO-add-named-gpio-exports.patch | 165 - .../0036-MIPS-ath79-remove-irq-code-from-pci.patch | 139 - .../patches-4.19/0037-missing-registers.patch | 21 - ...-ath79-add-missing-QCA955x-GMAC-registers.patch | 90 - .../patches-4.19/0038-at803x-disable-delays.patch | 27 - ...9-MIPS-ath79-export-UART1-reference-clock.patch | 52 - .../004-register_gpio_driver_earlier.patch | 18 - ...rs-provide-devm_platform_ioremap_resource.patch | 61 - ...-spi-add-driver-for-ar934x-spi-controller.patch | 283 - ...933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch | 64 - .../0061-tty-serial-ar933x-uart-rs485-gpio.patch | 267 - ...IPS-pci-ar724x-add-QCA9550-reset-sequence.patch | 130 - .../patches-4.19/404-mtd-cybertan-trx-parser.patch | 21 - .../408-mtd-redboot_partition_scan.patch | 44 - ...spi-ath79-Implement-the-spi_mem-interface.patch | 68 - .../patches-4.19/420-net-ar71xx_mac_driver.patch | 28 - .../425-at803x-allow-sgmii-aneg-override.patch | 16 - .../430-drivers-link-spi-before-mtd.patch | 12 - .../patches-4.19/440-mtd-ar934x-nand-driver.patch | 25 - ...MIPS-ath79-swizzle-pci-address-for-ar71xx.patch | 98 - .../700-net-phy-add-reset-controller-support.patch | 107 - ...dio-bus-dont-use-managed-reset-controller.patch | 44 - .../900-mdio_bitbang_ignore_ta_value.patch | 32 - ...tbang-prevent-rescheduling-during-command.patch | 61 - .../patches-4.19/910-unaligned_access_hacks.patch | 891 -- .../ath79/patches-4.19/920-mikrotik-rb4xx.patch | 69 - ...-add-support-for-boot-console-with-arbitr.patch | 54 - target/linux/bcm47xx/config-4.19 | 208 - ...xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch | 34 - ...S-BCM47XX-Add-support-for-Netgear-R6200v1.patch | 46 - .../linux/bcm47xx/patches-4.19/159-cpu_fixes.patch | 510 - .../bcm47xx/patches-4.19/160-kmap_coherent.patch | 78 - .../patches-4.19/209-b44-register-adm-switch.patch | 121 - .../bcm47xx/patches-4.19/210-b44_phy_fix.patch | 54 - .../280-activate_ssb_support_in_usb.patch | 25 - .../bcm47xx/patches-4.19/300-fork_cacheflush.patch | 21 - .../bcm47xx/patches-4.19/310-no_highpage.patch | 74 - ...S-BCM47XX-Devices-database-update-for-4.x.patch | 185 - .../400-mtd-bcm47xxpart-get-nvram.patch | 34 - .../bcm47xx/patches-4.19/610-pci_ide_fix.patch | 41 - .../patches-4.19/791-tg3-no-pci-sleep.patch | 17 - ...ble-of-serial-flashes-with-smaller-blocks.patch | 73 - .../patches-4.19/820-wgt634u-nvram-fix.patch | 304 - .../patches-4.19/830-huawei_e970_support.patch | 101 - .../bcm47xx/patches-4.19/831-old_gpio_wdt.patch | 360 - ...PCI-writes-setting-CardBus-bridge-resourc.patch | 30 - .../bcm47xx/patches-4.19/940-bcm47xx-yenta.patch | 46 - .../patches-4.19/976-ssb_increase_pci_delay.patch | 11 - .../bcm47xx/patches-4.19/999-wl_exports.patch | 22 - target/linux/bcm53xx/config-4.19 | 362 - ...ARM-dts-BCM5301X-Specify-flash-partitions.patch | 167 - ...5301X-Relicense-BCM47081-BCM4709-files-to.patch | 58 - ...5301X-Relicense-BCM47094-file-to-the-GPL-.patch | 33 - ...53573-Relicense-Tenda-AC9-file-to-the-GPL.patch | 32 - ...53573-Relicense-SoC-file-to-the-GPL-2.0-M.patch | 33 - ...M5301X-Add-basic-DT-for-Linksys-EA6500-V2.patch | 75 - ...5301X-Describe-Northstar-pins-mux-control.patch | 77 - ...53573-Relicense-Luxul-files-to-the-GPL-2..patch | 41 - ...-dts-BCM5301X-Add-basic-DT-for-Phicomm-K3.patch | 107 - ....20-0001-pinctrl-bcm-add-Northstar-driver.patch | 427 - ...trl-bcm-ns-Use-uintptr_t-for-casting-data.patch | 38 - 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.../0008-ARM-dts-Enable-Gemini-flash-access.patch | 153 - ...td-partitions-Add-RedBoot-FIS-DT-bindings.patch | 45 - ...titions-Add-second-compatible-for-redboot.patch | 72 - .../0011-ARM-dts-Fix-up-SQ201-flash-access.patch | 26 - ...0012-ARM-dts-Blank-D-Link-DIR-685-console.patch | 25 - ...usb-host-fotg2-add-silicon-clock-handling.patch | 116 - ...sb-host-add-DT-bindings-for-faraday-fotg2.patch | 63 - ...15-usb-host-fotg2-add-device-tree-probing.patch | 43 - ...b-host-fotg2-add-Gemini-specific-handling.patch | 131 - ...Add-the-FOTG210-USB-host-to-Gemini-boards.patch | 191 - ...dts-gemini-Indent-DIR-685-partition-table.patch | 105 - ...gment-DIR-685-partition-table-for-OpenWrt.patch | 37 - ...emini-Switch-to-redboot-partition-parsing.patch | 104 - ...-ARM-dts-gemini-Mount-root-from-mtdblock3.patch | 36 - ...M-dts-gemini-Fix-up-confused-pin-settings.patch | 54 - ...t-hardcode-path-to-awk-in-scripts-ld-vers.patch | 30 - .../backport-4.19/011-kbuild-export-SUBARCH.patch | 23 - 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...-phy-allow-Clause-45-access-via-mii-ioctl.patch | 77 - ...-mandatory-attach-detach-methods-for-sfp-.patch | 94 - ...5.3-net-sfp-remove-sfp-bus-use-of-netdevs.patch | 118 - ...2-net-phylink-avoid-reducing-support-mask.patch | 84 - ...p-SFP-polling-and-interrupt-handling-duri.patch | 94 - ...-don-t-start-and-stop-SGMII-PHYs-in-SFP-m.patch | 141 - ...fp-move-fwnode-parsing-into-sfp-bus-layer.patch | 179 - ...17-v5.5-net-sfp-rework-upstream-interface.patch | 254 - ...-sfp-fix-sfp_bus_put-kernel-documentation.patch | 27 - ...-net-sfp-fix-sfp_bus_add_upstream-warning.patch | 27 - ...e-sfp-sub-state-machines-into-separate-fu.patch | 124 - ...e-tx-disable-on-device-down-to-main-state.patch | 41 - ...rename-sfp_sm_ins_next-as-sfp_sm_mod_next.patch | 71 - ...andle-module-remove-outside-state-machine.patch | 53 - ...5-net-sfp-rename-T_PROBE_WAIT-to-T_SERIAL.patch | 51 - ...t-sfp-parse-SFP-power-requirement-earlier.patch | 115 - ...id-power-switch-on-address-change-modules.patch | 65 - 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...4xx-update-driver-to-be-device-tree-aware.patch | 60 - target/linux/generic/config-4.19 | 6099 ------- .../linux/generic/hack-4.19/204-module_strip.patch | 206 - .../generic/hack-4.19/207-disable-modorder.patch | 44 - .../hack-4.19/210-darwin_scripts_include.patch | 3053 ---- .../hack-4.19/212-byteshift_portability.patch | 65 - .../hack-4.19/214-spidev_h_portability.patch | 24 - .../linux/generic/hack-4.19/220-gc_sections.patch | 192 - .../generic/hack-4.19/221-module_exports.patch | 101 - .../hack-4.19/230-openwrt_lzma_options.patch | 71 - .../generic/hack-4.19/250-netfilter_depends.patch | 27 - .../generic/hack-4.19/251-sound_kconfig.patch | 197 - .../generic/hack-4.19/259-regmap_dynamic.patch | 110 - .../hack-4.19/260-crypto_test_dependencies.patch | 60 - .../linux/generic/hack-4.19/280-rfkill-stubs.patch | 84 - ...90-nvmem-make-CONFIG_NVMEM-tristate-again.patch | 33 - ...-r4k_cache-use-more-efficient-cache-blast.patch | 66 - .../hack-4.19/301-mips_image_cmdline_hack.patch | 38 - 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deleted file mode 100644 index 6d4c30b55d..0000000000 --- a/target/linux/apm821xx/config-4.19 +++ /dev/null @@ -1,335 +0,0 @@ -# CONFIG_40x is not set -CONFIG_44x=y -CONFIG_460EX=y -CONFIG_4xx=y -CONFIG_4xx_SOC=y -# CONFIG_ADVANCED_OPTIONS is not set -CONFIG_APM821xx=y -CONFIG_APOLLO3G=y -# CONFIG_ARCHES is not set -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_WALK_MEMORY=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_MMAP_RND_BITS=11 -CONFIG_ARCH_MMAP_RND_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y -CONFIG_AUDIT_ARCH=y -# CONFIG_BAMBOO is not set -CONFIG_BCH=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_MQ_PCI=y -CONFIG_BLUESTONE=y -CONFIG_BOOKE=y -CONFIG_BOOKE_WDT=y -# CONFIG_BOUNCE is not set -CONFIG_BUILD_SALT="" -# CONFIG_CANYONLANDS is not set -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -CONFIG_CC_HAS_STACKPROTECTOR_NONE=y -CONFIG_CLANG_VERSION=0 -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs noinitrd" -CONFIG_CMDLINE_BOOL=y -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_CCM=y -CONFIG_CRYPTO_CFB=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_PPC4XX=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GCM=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_GHASH=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MD5_PPC=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1_PPC=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DTC=y -# CONFIG_E200 is not set -CONFIG_EARLY_PRINTK=y -# CONFIG_EBONY is not set -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -# CONFIG_EIGER is not set -CONFIG_EXTRA_TARGETS="uImage" -CONFIG_FIXED_PHY=y -CONFIG_FREEZER=y -# CONFIG_FSL_LBC is not set -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_NVRAM=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GEN_RTC is not set -# CONFIG_GLACIER is not set -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KPROBES_ON_FTRACE=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_PPC4XX=y -CONFIG_HZ=1000 -CONFIG_HZ_1000=y -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IBM_IIC=y -CONFIG_IBM_EMAC=y -CONFIG_IBM_EMAC_EMAC4=y -CONFIG_IBM_EMAC_POLL_WEIGHT=32 -CONFIG_IBM_EMAC_RGMII=y -CONFIG_IBM_EMAC_RXB=128 -CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256 -CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0 -CONFIG_IBM_EMAC_TAH=y -CONFIG_IBM_EMAC_TXB=128 -# CONFIG_ICE is not set -# CONFIG_ICON is not set -CONFIG_ILLEGAL_POINTER_VALUE=0 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_ISA_DMA_API=y -# CONFIG_JFFS2_FS is not set -# CONFIG_KATMAI is not set -CONFIG_KERNEL_GZIP=y -CONFIG_KERNEL_START=0xc0000000 -CONFIG_LEDS_TRIGGER_MTD=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_MATH_EMULATION is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_BCH=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_BCH=y -CONFIG_MTD_NAND_ECC_SMC=y -CONFIG_MTD_NAND_NDFC=y -# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NEED_SG_DMA_LENGTH=y -# CONFIG_NF_LOG_BRIDGE is not set -CONFIG_NOT_COHERENT_CACHE=y -CONFIG_NO_BOOTMEM=y -CONFIG_NR_IRQS=512 -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND=y -# CONFIG_OVERLAY_FS_METACOPY is not set -CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y -# CONFIG_OVERLAY_FS_XINO_AUTO is not set -CONFIG_PAGE_OFFSET=0xc0000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_MSI=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYSICAL_START=0x00000000 -CONFIG_PHYS_64BIT=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PM=y -CONFIG_PM_AUTOSLEEP=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_PPC44x_SIMPLE=y -CONFIG_PPC4xx_CPM=y -CONFIG_PPC4xx_GPIO=y -CONFIG_PPC4xx_MSI=y -CONFIG_PPC4xx_OCM=y -CONFIG_PPC4xx_PCI_EXPRESS=y -# CONFIG_PPC64 is not set -# CONFIG_PPC_47x is not set -# CONFIG_PPC_85xx is not set -# CONFIG_PPC_8xx is not set -CONFIG_PPC_ADV_DEBUG_DACS=2 -CONFIG_PPC_ADV_DEBUG_DAC_RANGE=y -CONFIG_PPC_ADV_DEBUG_DVCS=2 -CONFIG_PPC_ADV_DEBUG_IACS=4 -CONFIG_PPC_ADV_DEBUG_REGS=y -# CONFIG_PPC_BOOK3S_32 is not set -CONFIG_PPC_DCR=y -CONFIG_PPC_DCR_NATIVE=y -# CONFIG_PPC_EARLY_DEBUG is not set -CONFIG_PPC_FPU=y -CONFIG_PPC_INDIRECT_PCI=y -# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set -CONFIG_PPC_LIB_RHEAP=y -CONFIG_PPC_MMU_NOHASH=y -CONFIG_PPC_MSI_BITMAP=y -CONFIG_PPC_PCI_CHOICE=y -# CONFIG_PPC_PTDUMP is not set -CONFIG_PPC_UDBG_16550=y -CONFIG_PPC_WERROR=y -CONFIG_PTE_64BIT=y -# CONFIG_RAINIER is not set -# CONFIG_RANDOM_TRUST_CPU is not set -CONFIG_RAS=y -CONFIG_RD_GZIP=y -# CONFIG_RENESAS_PHY is not set -# CONFIG_RPMSG_VIRTIO is not set -CONFIG_RSEQ=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SAM440EP is not set -# CONFIG_SEQUOIA is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SGL_ALLOC=y -CONFIG_SIMPLE_GPIO=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -# CONFIG_TAISHAN is not set -CONFIG_TASK_SIZE=0xc0000000 -CONFIG_THREAD_SHIFT=13 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -CONFIG_USB_SUPPORT=y -CONFIG_VDSO32=y -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set -# CONFIG_WARP is not set -CONFIG_WATCHDOG_CORE=y -# CONFIG_WNDR4700 is not set -# CONFIG_XILINX_SYSACE is not set -# CONFIG_XILINX_VCU is not set -# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set -# CONFIG_XIL_AXIS_FIFO is not set -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_POWERPC=y -# CONFIG_YOSEMITE is not set -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/apm821xx/patches-4.19/010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch b/target/linux/apm821xx/patches-4.19/010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch deleted file mode 100644 index 572b8b6522..0000000000 --- a/target/linux/apm821xx/patches-4.19/010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 538098281ce884a51d2aa4ab445056a41741c6ad Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sat, 17 Nov 2018 17:17:20 +0100 -Subject: [PATCH] dt-bindings: dmaengine: dw-dmac: add protection control - property - -This patch for the DesignWare AHB Central -Direct Memory Access Controller adds the dma -protection control property: - "snps,dma-protection-control" - -as well as the properties specific values defines into -a new include file: include/dt-bindings/dma/dw-dmac.h - -Note: The protection control signals are one-to-one -mapped to the AHB HPROT[1:3] signals for this controller. -The HPROT0 (Data Access) is always hardwired to 1. - -Reviewed-by: Andy Shevchenko -Reviewed-by: Rob Herring -Signed-off-by: Christian Lamparter -Signed-off-by: Vinod Koul ---- - Documentation/devicetree/bindings/dma/snps-dma.txt | 4 ++++ - MAINTAINERS | 4 +++- - include/dt-bindings/dma/dw-dmac.h | 14 ++++++++++++++ - 3 files changed, 21 insertions(+), 1 deletion(-) - create mode 100644 include/dt-bindings/dma/dw-dmac.h - ---- a/Documentation/devicetree/bindings/dma/snps-dma.txt -+++ b/Documentation/devicetree/bindings/dma/snps-dma.txt -@@ -27,6 +27,10 @@ Optional properties: - general purpose DMA channel allocator. False if not passed. - - multi-block: Multi block transfers supported by hardware. Array property with - one cell per channel. 0: not supported, 1 (default): supported. -+- snps,dma-protection-control: AHB HPROT[3:1] protection setting. -+ The default value is 0 (for non-cacheable, non-buffered, -+ unprivileged data access). -+ Refer to include/dt-bindings/dma/dw-dmac.h for possible values. - - Example: - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -14075,9 +14075,11 @@ SYNOPSYS DESIGNWARE DMAC DRIVER - M: Viresh Kumar - R: Andy Shevchenko - S: Maintained -+F: Documentation/devicetree/bindings/dma/snps-dma.txt -+F: drivers/dma/dw/ -+F: include/dt-bindings/dma/dw-dmac.h - F: include/linux/dma/dw.h - F: include/linux/platform_data/dma-dw.h --F: drivers/dma/dw/ - - SYNOPSYS DESIGNWARE ENTERPRISE ETHERNET DRIVER - M: Jose Abreu ---- /dev/null -+++ b/include/dt-bindings/dma/dw-dmac.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ -+ -+#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__ -+#define __DT_BINDINGS_DMA_DW_DMAC_H__ -+ -+/* -+ * Protection Control bits provide protection against illegal transactions. -+ * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals. -+ */ -+#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */ -+#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */ -+#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */ -+ -+#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */ diff --git a/target/linux/apm821xx/patches-4.19/023-0003-crypto-drop-mask-CRYPTO_ALG_ASYNC-from-cipher-tfm-al.patch b/target/linux/apm821xx/patches-4.19/023-0003-crypto-drop-mask-CRYPTO_ALG_ASYNC-from-cipher-tfm-al.patch deleted file mode 100644 index 36aeb33d59..0000000000 --- a/target/linux/apm821xx/patches-4.19/023-0003-crypto-drop-mask-CRYPTO_ALG_ASYNC-from-cipher-tfm-al.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 1ad0f1603a6b2afb62a1c065409aaa4e43ca7627 Mon Sep 17 00:00:00 2001 -From: Eric Biggers -Date: Wed, 14 Nov 2018 12:19:39 -0800 -Subject: [PATCH 03/15] crypto: drop mask=CRYPTO_ALG_ASYNC from 'cipher' tfm - allocations - -'cipher' algorithms (single block ciphers) are always synchronous, so -passing CRYPTO_ALG_ASYNC in the mask to crypto_alloc_cipher() has no -effect. Many users therefore already don't pass it, but some still do. -This inconsistency can cause confusion, especially since the way the -'mask' argument works is somewhat counterintuitive. - -Thus, just remove the unneeded CRYPTO_ALG_ASYNC flags. - -This patch shouldn't change any actual behavior. - -Signed-off-by: Eric Biggers -Signed-off-by: Herbert Xu ---- - drivers/crypto/amcc/crypto4xx_alg.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/crypto/amcc/crypto4xx_alg.c -+++ b/drivers/crypto/amcc/crypto4xx_alg.c -@@ -540,8 +540,7 @@ static int crypto4xx_compute_gcm_hash_ke - uint8_t src[16] = { 0 }; - int rc = 0; - -- aes_tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC | -- CRYPTO_ALG_NEED_FALLBACK); -+ aes_tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_NEED_FALLBACK); - if (IS_ERR(aes_tfm)) { - rc = PTR_ERR(aes_tfm); - pr_warn("could not load aes cipher driver: %d\n", rc); diff --git a/target/linux/apm821xx/patches-4.19/023-0004-crypto4xx_core-don-t-abuse-__dma_sync_page.patch b/target/linux/apm821xx/patches-4.19/023-0004-crypto4xx_core-don-t-abuse-__dma_sync_page.patch deleted file mode 100644 index d1849aefbb..0000000000 --- a/target/linux/apm821xx/patches-4.19/023-0004-crypto4xx_core-don-t-abuse-__dma_sync_page.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 67d8208fba1324fa0198f9fc58a9edbe09596947 Mon Sep 17 00:00:00 2001 -From: Christoph Hellwig -Date: Sun, 16 Dec 2018 18:19:46 +0100 -Subject: [PATCH 04/15] crypto4xx_core: don't abuse __dma_sync_page - -This function is internal to the DMA API implementation. Instead use -the DMA API to properly unmap. Note that the DMA API usage in this -driver is a disaster and urgently needs some work - it is missing all -the unmaps, seems to do a secondary map where it looks like it should -to a unmap in one place to work around cache coherency and the -directions passed in seem to be partially wrong. - -Signed-off-by: Christoph Hellwig -Tested-by: Christian Lamparter -Signed-off-by: Michael Ellerman ---- - drivers/crypto/amcc/crypto4xx_core.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/crypto/amcc/crypto4xx_core.c -+++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -592,7 +592,7 @@ static void crypto4xx_aead_done(struct c - pd->pd_ctl_len.bf.pkt_len, - dst); - } else { -- __dma_sync_page(sg_page(dst), dst->offset, dst->length, -+ dma_unmap_page(dev->core_dev->device, pd->dest, dst->length, - DMA_FROM_DEVICE); - } - diff --git a/target/linux/apm821xx/patches-4.19/023-0005-cross-tree-phase-out-dma_zalloc_coherent.patch b/target/linux/apm821xx/patches-4.19/023-0005-cross-tree-phase-out-dma_zalloc_coherent.patch deleted file mode 100644 index 857578bb93..0000000000 --- a/target/linux/apm821xx/patches-4.19/023-0005-cross-tree-phase-out-dma_zalloc_coherent.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 750afb08ca71310fcf0c4e2cb1565c63b8235b60 Mon Sep 17 00:00:00 2001 -From: Luis Chamberlain -Date: Fri, 4 Jan 2019 09:23:09 +0100 -Subject: [PATCH 05/15] cross-tree: phase out dma_zalloc_coherent() - -We already need to zero out memory for dma_alloc_coherent(), as such -using dma_zalloc_coherent() is superflous. Phase it out. - -This change was generated with the following Coccinelle SmPL patch: - -@ replace_dma_zalloc_coherent @ -expression dev, size, data, handle, flags; -@@ - --dma_zalloc_coherent(dev, size, handle, flags) -+dma_alloc_coherent(dev, size, handle, flags) - -Suggested-by: Christoph Hellwig -Signed-off-by: Luis Chamberlain -[hch: re-ran the script on the latest tree] -Signed-off-by: Christoph Hellwig ---- - drivers/crypto/amcc/crypto4xx_core.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/crypto/amcc/crypto4xx_core.c -+++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -283,9 +283,9 @@ static u32 crypto4xx_put_pd_to_pdr(struc - */ - static u32 crypto4xx_build_gdr(struct crypto4xx_device *dev) - { -- dev->gdr = dma_zalloc_coherent(dev->core_dev->device, -- sizeof(struct ce_gd) * PPC4XX_NUM_GD, -- &dev->gdr_pa, GFP_ATOMIC); -+ dev->gdr = dma_alloc_coherent(dev->core_dev->device, -+ sizeof(struct ce_gd) * PPC4XX_NUM_GD, -+ &dev->gdr_pa, GFP_ATOMIC); - if (!dev->gdr) - return -ENOMEM; - diff --git a/target/linux/apm821xx/patches-4.19/023-0006-crypto-crypto4xx-add-prng-crypto-support.patch b/target/linux/apm821xx/patches-4.19/023-0006-crypto-crypto4xx-add-prng-crypto-support.patch deleted file mode 100644 index cf7f92c2d0..0000000000 --- a/target/linux/apm821xx/patches-4.19/023-0006-crypto-crypto4xx-add-prng-crypto-support.patch +++ /dev/null @@ -1,199 +0,0 @@ -From d072bfa4885354fff86aa1fb1dbc4f1533c9e0bf Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 23 Dec 2018 02:16:13 +0100 -Subject: [PATCH 06/15] crypto: crypto4xx - add prng crypto support - -This patch adds support for crypto4xx's ANSI X9.17 Annex C compliant -pseudo random number generator which provides a pseudo random source -for the purpose of generating Initialization Vectors (IV's) for AES -algorithms to the Packet Engine and other pseudo random number -requirements. - -Signed-off-by: Christian Lamparter -Signed-off-by: Herbert Xu ---- - drivers/crypto/amcc/crypto4xx_core.c | 87 +++++++++++++++++++++++++ - drivers/crypto/amcc/crypto4xx_core.h | 4 ++ - drivers/crypto/amcc/crypto4xx_reg_def.h | 1 + - 3 files changed, 92 insertions(+) - ---- a/drivers/crypto/amcc/crypto4xx_core.c -+++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -40,9 +40,11 @@ - #include - #include - #include -+#include - #include - #include - #include -+#include - #include - #include "crypto4xx_reg_def.h" - #include "crypto4xx_core.h" -@@ -1042,6 +1044,10 @@ static int crypto4xx_register_alg(struct - rc = crypto_register_ahash(&alg->alg.u.hash); - break; - -+ case CRYPTO_ALG_TYPE_RNG: -+ rc = crypto_register_rng(&alg->alg.u.rng); -+ break; -+ - default: - rc = crypto_register_skcipher(&alg->alg.u.cipher); - break; -@@ -1071,6 +1077,10 @@ static void crypto4xx_unregister_alg(str - crypto_unregister_aead(&alg->alg.u.aead); - break; - -+ case CRYPTO_ALG_TYPE_RNG: -+ crypto_unregister_rng(&alg->alg.u.rng); -+ break; -+ - default: - crypto_unregister_skcipher(&alg->alg.u.cipher); - } -@@ -1129,6 +1139,69 @@ static irqreturn_t crypto4xx_ce_interrup - PPC4XX_TMO_ERR_INT); - } - -+static int ppc4xx_prng_data_read(struct crypto4xx_device *dev, -+ u8 *data, unsigned int max) -+{ -+ unsigned int i, curr = 0; -+ u32 val[2]; -+ -+ do { -+ /* trigger PRN generation */ -+ writel(PPC4XX_PRNG_CTRL_AUTO_EN, -+ dev->ce_base + CRYPTO4XX_PRNG_CTRL); -+ -+ for (i = 0; i < 1024; i++) { -+ /* usually 19 iterations are enough */ -+ if ((readl(dev->ce_base + CRYPTO4XX_PRNG_STAT) & -+ CRYPTO4XX_PRNG_STAT_BUSY)) -+ continue; -+ -+ val[0] = readl_be(dev->ce_base + CRYPTO4XX_PRNG_RES_0); -+ val[1] = readl_be(dev->ce_base + CRYPTO4XX_PRNG_RES_1); -+ break; -+ } -+ if (i == 1024) -+ return -ETIMEDOUT; -+ -+ if ((max - curr) >= 8) { -+ memcpy(data, &val, 8); -+ data += 8; -+ curr += 8; -+ } else { -+ /* copy only remaining bytes */ -+ memcpy(data, &val, max - curr); -+ break; -+ } -+ } while (curr < max); -+ -+ return curr; -+} -+ -+static int crypto4xx_prng_generate(struct crypto_rng *tfm, -+ const u8 *src, unsigned int slen, -+ u8 *dstn, unsigned int dlen) -+{ -+ struct rng_alg *alg = crypto_rng_alg(tfm); -+ struct crypto4xx_alg *amcc_alg; -+ struct crypto4xx_device *dev; -+ int ret; -+ -+ amcc_alg = container_of(alg, struct crypto4xx_alg, alg.u.rng); -+ dev = amcc_alg->dev; -+ -+ mutex_lock(&dev->core_dev->rng_lock); -+ ret = ppc4xx_prng_data_read(dev, dstn, dlen); -+ mutex_unlock(&dev->core_dev->rng_lock); -+ return ret; -+} -+ -+ -+static int crypto4xx_prng_seed(struct crypto_rng *tfm, const u8 *seed, -+ unsigned int slen) -+{ -+ return 0; -+} -+ - /** - * Supported Crypto Algorithms - */ -@@ -1298,6 +1371,18 @@ static struct crypto4xx_alg_common crypt - .cra_module = THIS_MODULE, - }, - } }, -+ { .type = CRYPTO_ALG_TYPE_RNG, .u.rng = { -+ .base = { -+ .cra_name = "stdrng", -+ .cra_driver_name = "crypto4xx_rng", -+ .cra_priority = 300, -+ .cra_ctxsize = 0, -+ .cra_module = THIS_MODULE, -+ }, -+ .generate = crypto4xx_prng_generate, -+ .seed = crypto4xx_prng_seed, -+ .seedsize = 0, -+ } }, - }; - - /** -@@ -1367,6 +1452,7 @@ static int crypto4xx_probe(struct platfo - core_dev->dev->core_dev = core_dev; - core_dev->dev->is_revb = is_revb; - core_dev->device = dev; -+ mutex_init(&core_dev->rng_lock); - spin_lock_init(&core_dev->lock); - INIT_LIST_HEAD(&core_dev->dev->alg_list); - ratelimit_default_init(&core_dev->dev->aead_ratelimit); -@@ -1446,6 +1532,7 @@ static int crypto4xx_remove(struct platf - tasklet_kill(&core_dev->tasklet); - /* Un-register with Linux CryptoAPI */ - crypto4xx_unregister_alg(core_dev->dev); -+ mutex_destroy(&core_dev->rng_lock); - /* Free all allocated memory */ - crypto4xx_stop_all(core_dev); - ---- a/drivers/crypto/amcc/crypto4xx_core.h -+++ b/drivers/crypto/amcc/crypto4xx_core.h -@@ -23,8 +23,10 @@ - #define __CRYPTO4XX_CORE_H__ - - #include -+#include - #include - #include -+#include - #include - #include "crypto4xx_reg_def.h" - #include "crypto4xx_sa.h" -@@ -119,6 +121,7 @@ struct crypto4xx_core_device { - u32 irq; - struct tasklet_struct tasklet; - spinlock_t lock; -+ struct mutex rng_lock; - }; - - struct crypto4xx_ctx { -@@ -143,6 +146,7 @@ struct crypto4xx_alg_common { - struct skcipher_alg cipher; - struct ahash_alg hash; - struct aead_alg aead; -+ struct rng_alg rng; - } u; - }; - ---- a/drivers/crypto/amcc/crypto4xx_reg_def.h -+++ b/drivers/crypto/amcc/crypto4xx_reg_def.h -@@ -100,6 +100,7 @@ - #define CRYPTO4XX_ENDIAN_CFG 0x000600d8 - - #define CRYPTO4XX_PRNG_STAT 0x00070000 -+#define CRYPTO4XX_PRNG_STAT_BUSY 0x1 - #define CRYPTO4XX_PRNG_CTRL 0x00070004 - #define CRYPTO4XX_PRNG_SEED_L 0x00070008 - #define CRYPTO4XX_PRNG_SEED_H 0x0007000c diff --git a/target/linux/apm821xx/patches-4.19/023-0012-crypto-crypto4xx-get-rid-of-redundant-using_sd-varia.patch b/target/linux/apm821xx/patches-4.19/023-0012-crypto-crypto4xx-get-rid-of-redundant-using_sd-varia.patch deleted file mode 100644 index 24e34edd58..0000000000 --- a/target/linux/apm821xx/patches-4.19/023-0012-crypto-crypto4xx-get-rid-of-redundant-using_sd-varia.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 38cf5533d7a876f75088bacc1277046f30005f28 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Mon, 22 Apr 2019 13:26:01 +0200 -Subject: [PATCH 12/15] crypto: crypto4xx - get rid of redundant using_sd - variable - -using_sd is used as a stand-in for sa_command_0.bf.scatter -that we need to set anyway, so we might as well just prevent -double-accounting. - -Signed-off-by: Christian Lamparter -Signed-off-by: Herbert Xu ---- - drivers/crypto/amcc/crypto4xx_core.c | 6 ++---- - drivers/crypto/amcc/crypto4xx_core.h | 1 - - 2 files changed, 2 insertions(+), 5 deletions(-) - ---- a/drivers/crypto/amcc/crypto4xx_core.c -+++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -535,7 +535,7 @@ static void crypto4xx_cipher_done(struct - - req = skcipher_request_cast(pd_uinfo->async_req); - -- if (pd_uinfo->using_sd) { -+ if (pd_uinfo->sa_va->sa_command_0.bf.scatter) { - crypto4xx_copy_pkt_to_dst(dev, pd, pd_uinfo, - req->cryptlen, req->dst); - } else { -@@ -589,7 +589,7 @@ static void crypto4xx_aead_done(struct c - u32 icv[AES_BLOCK_SIZE]; - int err = 0; - -- if (pd_uinfo->using_sd) { -+ if (pd_uinfo->sa_va->sa_command_0.bf.scatter) { - crypto4xx_copy_pkt_to_dst(dev, pd, pd_uinfo, - pd->pd_ctl_len.bf.pkt_len, - dst); -@@ -883,7 +883,6 @@ int crypto4xx_build_pd(struct crypto_asy - * we know application give us dst a whole piece of memory - * no need to use scatter ring. - */ -- pd_uinfo->using_sd = 0; - pd_uinfo->first_sd = 0xffffffff; - sa->sa_command_0.bf.scatter = 0; - pd->dest = (u32)dma_map_page(dev->core_dev->device, -@@ -897,7 +896,6 @@ int crypto4xx_build_pd(struct crypto_asy - u32 sd_idx = fst_sd; - nbytes = datalen; - sa->sa_command_0.bf.scatter = 1; -- pd_uinfo->using_sd = 1; - pd_uinfo->first_sd = fst_sd; - sd = crypto4xx_get_sdp(dev, &sd_dma, sd_idx); - pd->dest = sd_dma; ---- a/drivers/crypto/amcc/crypto4xx_core.h -+++ b/drivers/crypto/amcc/crypto4xx_core.h -@@ -64,7 +64,6 @@ union shadow_sa_buf { - struct pd_uinfo { - struct crypto4xx_device *dev; - u32 state; -- u32 using_sd; - u32 first_gd; /* first gather discriptor - used by this packet */ - u32 num_gd; /* number of gather discriptor diff --git a/target/linux/apm821xx/patches-4.19/140-GPIO-add-named-gpio-exports.patch b/target/linux/apm821xx/patches-4.19/140-GPIO-add-named-gpio-exports.patch deleted file mode 100644 index 8e3060d768..0000000000 --- a/target/linux/apm821xx/patches-4.19/140-GPIO-add-named-gpio-exports.patch +++ /dev/null @@ -1,169 +0,0 @@ -From cc809a441d8f2924f785eb863dfa6aef47a25b0b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 12 Aug 2014 20:49:27 +0200 -Subject: [PATCH 30/36] GPIO: add named gpio exports - -Signed-off-by: John Crispin ---- - drivers/gpio/gpiolib-of.c | 68 +++++++++++++++++++++++++++++++++++++++++ - drivers/gpio/gpiolib.c | 11 +++++-- - include/asm-generic/gpio.h | 5 +++ - include/linux/gpio/consumer.h | 8 +++++ - 4 files changed, 90 insertions(+), 2 deletions(-) - ---- a/drivers/gpio/gpiolib-of.c -+++ b/drivers/gpio/gpiolib-of.c -@@ -23,6 +23,8 @@ - #include - #include - #include -+#include -+#include - - #include "gpiolib.h" - -@@ -660,3 +662,72 @@ void of_gpiochip_remove(struct gpio_chip - gpiochip_remove_pin_ranges(chip); - of_node_put(chip->of_node); - } -+ -+#ifdef CONFIG_GPIO_SYSFS -+ -+static struct of_device_id gpio_export_ids[] = { -+ { .compatible = "gpio-export" }, -+ { /* sentinel */ } -+}; -+ -+static int of_gpio_export_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *cnp; -+ u32 val; -+ int nb = 0; -+ -+ for_each_child_of_node(np, cnp) { -+ const char *name = NULL; -+ int gpio; -+ bool dmc; -+ int max_gpio = 1; -+ int i; -+ -+ of_property_read_string(cnp, "gpio-export,name", &name); -+ -+ if (!name) -+ max_gpio = of_gpio_count(cnp); -+ -+ for (i = 0; i < max_gpio; i++) { -+ unsigned flags = 0; -+ enum of_gpio_flags of_flags; -+ -+ gpio = of_get_gpio_flags(cnp, i, &of_flags); -+ if (!gpio_is_valid(gpio)) -+ return gpio; -+ -+ if (of_flags == OF_GPIO_ACTIVE_LOW) -+ flags |= GPIOF_ACTIVE_LOW; -+ -+ if (!of_property_read_u32(cnp, "gpio-export,output", &val)) -+ flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; -+ else -+ flags |= GPIOF_IN; -+ -+ if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np))) -+ continue; -+ -+ dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change"); -+ gpio_export_with_name(gpio, dmc, name); -+ nb++; -+ } -+ } -+ -+ dev_info(&pdev->dev, "%d gpio(s) exported\n", nb); -+ -+ return 0; -+} -+ -+static struct platform_driver gpio_export_driver = { -+ .driver = { -+ .name = "gpio-export", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(gpio_export_ids), -+ }, -+ .probe = of_gpio_export_probe, -+}; -+ -+module_platform_driver(gpio_export_driver); -+ -+#endif ---- a/include/asm-generic/gpio.h -+++ b/include/asm-generic/gpio.h -@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g - return gpiod_export(gpio_to_desc(gpio), direction_may_change); - } - -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); -+static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name) -+{ -+ return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name); -+} -+ - static inline int gpio_export_link(struct device *dev, const char *name, - unsigned gpio) - { ---- a/include/linux/gpio/consumer.h -+++ b/include/linux/gpio/consumer.h -@@ -533,6 +533,7 @@ struct gpio_desc *devm_fwnode_get_gpiod_ - - #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) - -+int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); - int gpiod_export(struct gpio_desc *desc, bool direction_may_change); - int gpiod_export_link(struct device *dev, const char *name, - struct gpio_desc *desc); -@@ -540,6 +541,13 @@ void gpiod_unexport(struct gpio_desc *de - - #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ - -+static inline int _gpiod_export(struct gpio_desc *desc, -+ bool direction_may_change, -+ const char *name) -+{ -+ return -ENOSYS; -+} -+ - static inline int gpiod_export(struct gpio_desc *desc, - bool direction_may_change) - { ---- a/drivers/gpio/gpiolib-sysfs.c -+++ b/drivers/gpio/gpiolib-sysfs.c -@@ -568,7 +568,7 @@ static struct class gpio_class = { - * - * Returns zero on success, else an error. - */ --int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) - { - struct gpio_chip *chip; - struct gpio_device *gdev; -@@ -630,6 +630,8 @@ int gpiod_export(struct gpio_desc *desc, - offset = gpio_chip_hwgpio(desc); - if (chip->names && chip->names[offset]) - ioname = chip->names[offset]; -+ if (name) -+ ioname = name; - - dev = device_create_with_groups(&gpio_class, &gdev->dev, - MKDEV(0, 0), data, gpio_groups, -@@ -651,6 +653,12 @@ err_unlock: - gpiod_dbg(desc, "%s: status %d\n", __func__, status); - return status; - } -+EXPORT_SYMBOL_GPL(__gpiod_export); -+ -+int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+{ -+ return __gpiod_export(desc, direction_may_change, NULL); -+} - EXPORT_SYMBOL_GPL(gpiod_export); - - static int match_export(struct device *dev, const void *desc) diff --git a/target/linux/apm821xx/patches-4.19/201-add-amcc-apollo3g-support.patch b/target/linux/apm821xx/patches-4.19/201-add-amcc-apollo3g-support.patch deleted file mode 100644 index 18f4c72de8..0000000000 --- a/target/linux/apm821xx/patches-4.19/201-add-amcc-apollo3g-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/44x/Kconfig -+++ b/arch/powerpc/platforms/44x/Kconfig -@@ -131,6 +131,17 @@ config CANYONLANDS - help - This option enables support for the AMCC PPC460EX evaluation board. - -+config APOLLO3G -+ bool "Apollo3G" -+ depends on 44x -+ default n -+ select PPC44x_SIMPLE -+ select APM821xx -+ select IBM_EMAC_RGMII -+ select 460EX -+ help -+ This option enables support for the AMCC Apollo 3G board. -+ - config GLACIER - bool "Glacier" - depends on 44x ---- a/arch/powerpc/platforms/44x/ppc44x_simple.c -+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c -@@ -50,6 +50,7 @@ machine_device_initcall(ppc44x_simple, p - * board.c file for it rather than adding it to this list. - */ - static char *board[] __initdata = { -+ "amcc,apollo3g", - "amcc,arches", - "amcc,bamboo", - "apm,bluestone", diff --git a/target/linux/apm821xx/patches-4.19/202-add-netgear-wndr4700-support.patch b/target/linux/apm821xx/patches-4.19/202-add-netgear-wndr4700-support.patch deleted file mode 100644 index 536a74ef00..0000000000 --- a/target/linux/apm821xx/patches-4.19/202-add-netgear-wndr4700-support.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/arch/powerpc/platforms/44x/Makefile -+++ b/arch/powerpc/platforms/44x/Makefile -@@ -4,6 +4,7 @@ ifneq ($(CONFIG_PPC4xx_CPM),y) - obj-y += idle.o - endif - obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o -+obj-$(CONFIG_WNDR4700) += wndr4700.o - obj-$(CONFIG_EBONY) += ebony.o - obj-$(CONFIG_SAM440EP) += sam440ep.o - obj-$(CONFIG_WARP) += warp.o ---- a/arch/powerpc/platforms/44x/Kconfig -+++ b/arch/powerpc/platforms/44x/Kconfig -@@ -260,6 +260,19 @@ config ICON - help - This option enables support for the AMCC PPC440SPe evaluation board. - -+config WNDR4700 -+ bool "WNDR4700" -+ depends on 44x -+ default n -+ select APM821xx -+ select PCI_MSI -+ select PPC4xx_MSI -+ select PPC4xx_PCI_EXPRESS -+ select IBM_EMAC_RGMII -+ select 460EX -+ help -+ This option enables support for the Netgear WNDR4700/WNDR4720 board. -+ - config XILINX_VIRTEX440_GENERIC_BOARD - bool "Generic Xilinx Virtex 5 FXT board support" - depends on 44x diff --git a/target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch b/target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch deleted file mode 100644 index 110726d258..0000000000 --- a/target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch +++ /dev/null @@ -1,51 +0,0 @@ ---- a/arch/powerpc/platforms/4xx/pci.c -+++ b/arch/powerpc/platforms/4xx/pci.c -@@ -1060,15 +1060,24 @@ static int __init apm821xx_pciex_init_po - u32 val; - - /* -- * Do a software reset on PCIe ports. -- * This code is to fix the issue that pci drivers doesn't re-assign -- * bus number for PCIE devices after Uboot -- * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 -- * PT quad port, SAS LSI 1064E) -+ * Only reset the PHY when no link is currently established. -+ * This is for the Atheros PCIe board which has problems to establish -+ * the link (again) after this PHY reset. All other currently tested -+ * PCIe boards don't show this problem. - */ -- -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); -- mdelay(10); -+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); -+ if (!(val & 0x00001000)) { -+ /* -+ * Do a software reset on PCIe ports. -+ * This code is to fix the issue that pci drivers doesn't re-assign -+ * bus number for PCIE devices after Uboot -+ * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 -+ * PT quad port, SAS LSI 1064E) -+ */ -+ -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); -+ mdelay(10); -+ } - - if (port->endpoint) - val = PTYPE_LEGACY_ENDPOINT << 20; -@@ -1085,9 +1094,12 @@ static int __init apm821xx_pciex_init_po - mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130); - mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); - -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); -- mdelay(50); -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); -+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); -+ if (!(val & 0x00001000)) { -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); -+ mdelay(50); -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); -+ } - - mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, - mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | diff --git a/target/linux/apm821xx/patches-4.19/301-fix-memory-map-wndr4700.patch b/target/linux/apm821xx/patches-4.19/301-fix-memory-map-wndr4700.patch deleted file mode 100644 index 0c9fb370f1..0000000000 --- a/target/linux/apm821xx/patches-4.19/301-fix-memory-map-wndr4700.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/arch/powerpc/platforms/4xx/pci.c -+++ b/arch/powerpc/platforms/4xx/pci.c -@@ -1903,9 +1903,9 @@ static void __init ppc4xx_configure_pcie - * if it works - */ - out_le32(mbase + PECFG_PIM0LAL, 0x00000000); -- out_le32(mbase + PECFG_PIM0LAH, 0x00000000); -+ out_le32(mbase + PECFG_PIM0LAH, 0x00000008); - out_le32(mbase + PECFG_PIM1LAL, 0x00000000); -- out_le32(mbase + PECFG_PIM1LAH, 0x00000000); -+ out_le32(mbase + PECFG_PIM1LAH, 0x0000000c); - out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); - out_le32(mbase + PECFG_PIM01SAL, 0x00000000); - diff --git a/target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch b/target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch deleted file mode 100644 index e5000c911f..0000000000 --- a/target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch +++ /dev/null @@ -1,545 +0,0 @@ -From 419992bae5aaa4e06402e0b7c79fcf7bcb6b4764 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Thu, 2 Jun 2016 00:48:46 +0200 -Subject: [PATCH] usb: xhci: add firmware loader for uPD720201 and uPD720202 - w/o ROM - -This patch adds a firmware loader for the uPD720201K8-711-BAC-A -and uPD720202K8-711-BAA-A variant. Both of these chips are listed -in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as -devices which need the firmware loader on page 2 in order to -work as they "do not support the External ROM". - -The "Firmware Download Sequence" is describe in chapter -"7.1 FW Download Interface" R19UH0078EJ0500 Rev.5.00 page 131. - -The firmware "K2013080.mem" is available from a USB3.0 Host to -PCIe Adapter (PP2U-E card) "Firmware download" archive. An -alternative version can be sourced from Netgear's WNDR4700 GPL -archives. - -The release notes of the PP2U-E's "Firmware Download" ver 2.0.1.3 -(2012-06-15) state that the firmware is for the following devices: - - uPD720201 ES 2.0 sample whose revision ID is 2. - - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3. - - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2. - -If someone from Renesas is listening: It would be great, if these -firmwares could be added to linux-firmware.git. - -Cc: Yoshihiro Shimoda -Signed-off-by: Christian Lamparter ---- - drivers/usb/host/xhci-pci.c | 492 ++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 492 insertions(+) - ---- a/drivers/usb/host/xhci-pci.c -+++ b/drivers/usb/host/xhci-pci.c -@@ -12,6 +12,8 @@ - #include - #include - #include -+#include -+#include - - #include "xhci.h" - #include "xhci-trace.h" -@@ -268,6 +270,458 @@ static void xhci_pme_acpi_rtd3_enable(st - static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { } - #endif /* CONFIG_ACPI */ - -+static const struct renesas_fw_entry { -+ const char *firmware_name; -+ u16 device; -+ u8 revision; -+ u16 expected_version; -+} renesas_fw_table[] = { -+ /* -+ * Only the uPD720201K8-711-BAC-A or uPD720202K8-711-BAA-A -+ * are listed in R19UH0078EJ0500 Rev.5.00 as devices which -+ * need the software loader. -+ * -+ * PP2U/ReleaseNote_USB3-201-202-FW.txt: -+ * -+ * Note: This firmware is for the following devices. -+ * - uPD720201 ES 2.0 sample whose revision ID is 2. -+ * - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3. -+ * - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2. -+ */ -+ { "K2013080.mem", 0x0014, 0x02, 0x2013 }, -+ { "K2013080.mem", 0x0014, 0x03, 0x2013 }, -+ { "K2013080.mem", 0x0015, 0x02, 0x2013 }, -+}; -+ -+static const struct renesas_fw_entry *renesas_needs_fw_dl(struct pci_dev *dev) -+{ -+ const struct renesas_fw_entry *entry; -+ size_t i; -+ -+ /* This loader will only work with a RENESAS device. */ -+ if (!(dev->vendor == PCI_VENDOR_ID_RENESAS)) -+ return NULL; -+ -+ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) { -+ entry = &renesas_fw_table[i]; -+ if (entry->device == dev->device && -+ entry->revision == dev->revision) -+ return entry; -+ } -+ -+ return NULL; -+} -+ -+static int renesas_fw_download_image(struct pci_dev *dev, -+ const u32 *fw, -+ size_t step) -+{ -+ size_t i; -+ int err; -+ u8 fw_status; -+ bool data0_or_data1; -+ -+ /* -+ * The hardware does alternate between two 32-bit pages. -+ * (This is because each row of the firmware is 8 bytes). -+ * -+ * for even steps we use DATA0, for odd steps DATA1. -+ */ -+ data0_or_data1 = (step & 1) == 1; -+ -+ /* step+1. Read "Set DATAX" and confirm it is cleared. */ -+ for (i = 0; i < 10000; i++) { -+ err = pci_read_config_byte(dev, 0xF5, &fw_status); -+ if (err) -+ return pcibios_err_to_errno(err); -+ if (!(fw_status & BIT(data0_or_data1))) -+ break; -+ -+ udelay(1); -+ } -+ if (i == 10000) -+ return -ETIMEDOUT; -+ -+ /* -+ * step+2. Write FW data to "DATAX". -+ * "LSB is left" => force little endian -+ */ -+ err = pci_write_config_dword(dev, data0_or_data1 ? 0xFC : 0xF8, -+ (__force u32) cpu_to_le32(fw[step])); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ udelay(100); -+ -+ /* step+3. Set "Set DATAX". */ -+ err = pci_write_config_byte(dev, 0xF5, BIT(data0_or_data1)); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ return 0; -+} -+ -+static int renesas_fw_verify(struct pci_dev *dev, -+ const void *fw_data, -+ size_t length) -+{ -+ const struct renesas_fw_entry *entry = renesas_needs_fw_dl(dev); -+ u16 fw_version_pointer; -+ u16 fw_version; -+ -+ if (!entry) -+ return -EINVAL; -+ -+ /* -+ * The Firmware's Data Format is describe in -+ * "6.3 Data Format" R19UH0078EJ0500 Rev.5.00 page 124 -+ */ -+ -+ /* "Each row is 8 bytes". => firmware size must be a multiple of 8. */ -+ if (length % 8 != 0) { -+ dev_err(&dev->dev, "firmware size is not a multipe of 8."); -+ return -EINVAL; -+ } -+ -+ /* -+ * The bootrom chips of the big brother have sizes up to 64k, let's -+ * assume that's the biggest the firmware can get. -+ */ -+ if (length < 0x1000 || length >= 0x10000) { -+ dev_err(&dev->dev, "firmware is size %zd is not (4k - 64k).", -+ length); -+ return -EINVAL; -+ } -+ -+ /* The First 2 bytes are fixed value (55aa). "LSB on Left" */ -+ if (get_unaligned_le16(fw_data) != 0x55aa) { -+ dev_err(&dev->dev, "no valid firmware header found."); -+ return -EINVAL; -+ } -+ -+ /* verify the firmware version position and print it. */ -+ fw_version_pointer = get_unaligned_le16(fw_data + 4); -+ if (fw_version_pointer + 2 >= length) { -+ dev_err(&dev->dev, "firmware version pointer is outside of the firmware image."); -+ return -EINVAL; -+ } -+ -+ fw_version = get_unaligned_le16(fw_data + fw_version_pointer); -+ dev_dbg(&dev->dev, "got firmware version: %02x.", fw_version); -+ -+ if (fw_version != entry->expected_version) { -+ dev_err(&dev->dev, "firmware version mismatch, expected version: %02x.", -+ entry->expected_version); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int renesas_fw_check_running(struct pci_dev *pdev) -+{ -+ int err; -+ u8 fw_state; -+ -+ /* -+ * Test if the device is actually needing the firmware. As most -+ * BIOSes will initialize the device for us. If the device is -+ * initialized. -+ */ -+ err = pci_read_config_byte(pdev, 0xF4, &fw_state); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ /* -+ * Check if "FW Download Lock" is locked. If it is and the FW is -+ * ready we can simply continue. If the FW is not ready, we have -+ * to give up. -+ */ -+ if (fw_state & BIT(1)) { -+ dev_dbg(&pdev->dev, "FW Download Lock is engaged."); -+ -+ if (fw_state & BIT(4)) -+ return 0; -+ -+ dev_err(&pdev->dev, "FW Download Lock is set and FW is not ready. Giving Up."); -+ return -EIO; -+ } -+ -+ /* -+ * Check if "FW Download Enable" is set. If someone (us?) tampered -+ * with it and it can't be resetted, we have to give up too... and -+ * ask for a forgiveness and a reboot. -+ */ -+ if (fw_state & BIT(0)) { -+ dev_err(&pdev->dev, "FW Download Enable is stale. Giving Up (poweroff/reboot needed)."); -+ return -EIO; -+ } -+ -+ /* Otherwise, Check the "Result Code" Bits (6:4) and act accordingly */ -+ switch ((fw_state & 0x70)) { -+ case 0: /* No result yet */ -+ dev_dbg(&pdev->dev, "FW is not ready/loaded yet."); -+ -+ /* tell the caller, that this device needs the firmware. */ -+ return 1; -+ -+ case BIT(4): /* Success, device should be working. */ -+ dev_dbg(&pdev->dev, "FW is ready."); -+ return 0; -+ -+ case BIT(5): /* Error State */ -+ dev_err(&pdev->dev, "hardware is in an error state. Giving up (poweroff/reboot needed)."); -+ return -ENODEV; -+ -+ default: /* All other states are marked as "Reserved states" */ -+ dev_err(&pdev->dev, "hardware is in an invalid state %x. Giving up (poweroff/reboot needed).", -+ (fw_state & 0x70) >> 4); -+ return -EINVAL; -+ } -+} -+ -+static int renesas_hw_check_run_stop_busy(struct pci_dev *pdev) -+{ -+#if 0 -+ u32 val; -+ -+ /* -+ * 7.1.3 Note 3: "... must not set 'FW Download Enable' when -+ * 'RUN/STOP' of USBCMD Register is set" -+ */ -+ val = readl(hcd->regs + 0x20); -+ if (val & BIT(0)) { -+ dev_err(&pdev->dev, "hardware is busy and can't receive a FW."); -+ return -EBUSY; -+ } -+#endif -+ return 0; -+} -+ -+static int renesas_fw_download(struct pci_dev *pdev, -+ const struct firmware *fw, unsigned int retry_counter) -+{ -+ const u32 *fw_data = (const u32 *) fw->data; -+ size_t i; -+ int err; -+ u8 fw_status; -+ -+ /* -+ * For more information and the big picture: please look at the -+ * "Firmware Download Sequence" in "7.1 FW Download Interface" -+ * of R19UH0078EJ0500 Rev.5.00 page 131 -+ */ -+ err = renesas_hw_check_run_stop_busy(pdev); -+ if (err) -+ return err; -+ -+ /* -+ * 0. Set "FW Download Enable" bit in the -+ * "FW Download Control & Status Register" at 0xF4 -+ */ -+ err = pci_write_config_byte(pdev, 0xF4, BIT(0)); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ /* 1 - 10 follow one step after the other. */ -+ for (i = 0; i < fw->size / 4; i++) { -+ err = renesas_fw_download_image(pdev, fw_data, i); -+ if (err) { -+ dev_err(&pdev->dev, "Firmware Download Step %zd failed at position %zd bytes with (%d).", -+ i, i * 4, err); -+ return err; -+ } -+ } -+ -+ /* -+ * This sequence continues until the last data is written to -+ * "DATA0" or "DATA1". Naturally, we wait until "SET DATA0/1" -+ * is cleared by the hardware beforehand. -+ */ -+ for (i = 0; i < 10000; i++) { -+ err = pci_read_config_byte(pdev, 0xF5, &fw_status); -+ if (err) -+ return pcibios_err_to_errno(err); -+ if (!(fw_status & (BIT(0) | BIT(1)))) -+ break; -+ -+ udelay(1); -+ } -+ if (i == 10000) -+ dev_warn(&pdev->dev, "Final Firmware Download step timed out."); -+ -+ /* -+ * 11. After finishing writing the last data of FW, the -+ * System Software must clear "FW Download Enable" -+ */ -+ err = pci_write_config_byte(pdev, 0xF4, 0); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ /* 12. Read "Result Code" and confirm it is good. */ -+ for (i = 0; i < 10000; i++) { -+ err = pci_read_config_byte(pdev, 0xF4, &fw_status); -+ if (err) -+ return pcibios_err_to_errno(err); -+ if (fw_status & BIT(4)) -+ break; -+ -+ udelay(1); -+ } -+ if (i == 10000) { -+ /* Timed out / Error - let's see if we can fix this */ -+ err = renesas_fw_check_running(pdev); -+ switch (err) { -+ case 0: /* -+ * we shouldn't end up here. -+ * maybe it took a little bit longer. -+ * But all should be well? -+ */ -+ break; -+ -+ case 1: /* (No result yet? - we can try to retry) */ -+ if (retry_counter < 10) { -+ retry_counter++; -+ dev_warn(&pdev->dev, "Retry Firmware download: %d try.", -+ retry_counter); -+ return renesas_fw_download(pdev, fw, -+ retry_counter); -+ } -+ return -ETIMEDOUT; -+ -+ default: -+ return err; -+ } -+ } -+ /* -+ * Optional last step: Engage Firmware Lock -+ * -+ * err = pci_write_config_byte(pdev, 0xF4, BIT(2)); -+ * if (err) -+ * return pcibios_err_to_errno(err); -+ */ -+ -+ return 0; -+} -+ -+struct renesas_fw_ctx { -+ struct pci_dev *pdev; -+ const struct pci_device_id *id; -+ bool resume; -+}; -+ -+static int xhci_pci_probe(struct pci_dev *pdev, -+ const struct pci_device_id *id); -+ -+static void renesas_fw_callback(const struct firmware *fw, -+ void *context) -+{ -+ struct renesas_fw_ctx *ctx = context; -+ struct pci_dev *pdev = ctx->pdev; -+ struct device *parent = pdev->dev.parent; -+ int err = -ENOENT; -+ -+ if (fw) { -+ err = renesas_fw_verify(pdev, fw->data, fw->size); -+ if (!err) { -+ err = renesas_fw_download(pdev, fw, 0); -+ release_firmware(fw); -+ if (!err) { -+ if (ctx->resume) -+ return; -+ -+ err = xhci_pci_probe(pdev, ctx->id); -+ if (!err) { -+ /* everything worked */ -+ devm_kfree(&pdev->dev, ctx); -+ return; -+ } -+ -+ /* in case of an error - fall through */ -+ } else { -+ dev_err(&pdev->dev, "firmware failed to download (%d).", -+ err); -+ } -+ } -+ } else { -+ dev_err(&pdev->dev, "firmware failed to load (%d).", err); -+ } -+ -+ dev_info(&pdev->dev, "Unloading driver"); -+ -+ if (parent) -+ device_lock(parent); -+ -+ device_release_driver(&pdev->dev); -+ -+ if (parent) -+ device_unlock(parent); -+ -+ pci_dev_put(pdev); -+} -+ -+static int renesas_fw_alive_check(struct pci_dev *pdev) -+{ -+ const struct renesas_fw_entry *entry; -+ int err; -+ -+ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */ -+ entry = renesas_needs_fw_dl(pdev); -+ if (!entry) -+ return 0; -+ -+ err = renesas_fw_check_running(pdev); -+ /* Also go ahead, if the firmware is running */ -+ if (err == 0) -+ return 0; -+ -+ /* At this point, we can be sure that the FW isn't ready. */ -+ return err; -+} -+ -+static int renesas_fw_download_to_hw(struct pci_dev *pdev, -+ const struct pci_device_id *id, -+ bool do_resume) -+{ -+ const struct renesas_fw_entry *entry; -+ struct renesas_fw_ctx *ctx; -+ int err; -+ -+ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */ -+ entry = renesas_needs_fw_dl(pdev); -+ if (!entry) -+ return 0; -+ -+ err = renesas_fw_check_running(pdev); -+ /* Continue ahead, if the firmware is already running. */ -+ if (err == 0) -+ return 0; -+ -+ if (err != 1) -+ return err; -+ -+ ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); -+ if (!ctx) -+ return -ENOMEM; -+ ctx->pdev = pdev; -+ ctx->resume = do_resume; -+ ctx->id = id; -+ -+ pci_dev_get(pdev); -+ err = request_firmware_nowait(THIS_MODULE, 1, entry->firmware_name, -+ &pdev->dev, GFP_KERNEL, ctx, renesas_fw_callback); -+ if (err) { -+ pci_dev_put(pdev); -+ return err; -+ } -+ -+ /* -+ * The renesas_fw_callback() callback will continue the probe -+ * process, once it aquires the firmware. -+ */ -+ return 1; -+} -+ - /* called during probe() after chip reset completes */ - static int xhci_pci_setup(struct usb_hcd *hcd) - { -@@ -309,6 +763,22 @@ static int xhci_pci_probe(struct pci_dev - struct hc_driver *driver; - struct usb_hcd *hcd; - -+ /* -+ * Check if this device is a RENESAS uPD720201/2 device. -+ * Otherwise, we can continue with xhci_pci_probe as usual. -+ */ -+ retval = renesas_fw_download_to_hw(dev, id, false); -+ switch (retval) { -+ case 0: -+ break; -+ -+ case 1: /* let it load the firmware and recontinue the probe. */ -+ return 0; -+ -+ default: -+ return retval; -+ } -+ - driver = (struct hc_driver *)id->driver_data; - - /* Prevent runtime suspending between USB-2 and USB-3 initialization */ -@@ -367,6 +837,16 @@ static void xhci_pci_remove(struct pci_d - { - struct xhci_hcd *xhci; - -+ if (renesas_fw_alive_check(dev)) { -+ /* -+ * bail out early, if this was a renesas device w/o FW. -+ * Else we might hit the NMI watchdog in xhci_handsake -+ * during xhci_reset as part of the driver's unloading. -+ * which we forced in the renesas_fw_callback(). -+ */ -+ return; -+ } -+ - xhci = hcd_to_xhci(pci_get_drvdata(dev)); - xhci->xhc_state |= XHCI_STATE_REMOVING; - if (xhci->shared_hcd) { diff --git a/target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch b/target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch deleted file mode 100644 index 8ada844214..0000000000 --- a/target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch +++ /dev/null @@ -1,53 +0,0 @@ -From a0dc613140bab907a3d5787a7ae7b0638bf674d0 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Thu, 23 Jun 2016 20:28:20 +0200 -Subject: [PATCH] usb: xhci: force MSI for uPD720201 and - uPD720202 - -The APM82181 does not support MSI-X. When probed, it will -produce a noisy warning. - ---- - drivers/usb/host/pci-quirks.c | 362 ++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 362 insertions(+) - ---- a/drivers/usb/host/xhci-pci.c -+++ b/drivers/usb/host/xhci-pci.c -@@ -218,6 +218,7 @@ static void xhci_pci_quirks(struct devic - pdev->device == 0x0015) { - xhci->quirks |= XHCI_RESET_ON_RESUME; - xhci->quirks |= XHCI_ZERO_64B_REGS; -+ xhci->quirks |= XHCI_FORCE_MSI; - } - if (pdev->vendor == PCI_VENDOR_ID_VIA) - xhci->quirks |= XHCI_RESET_ON_RESUME; ---- a/drivers/usb/host/xhci.c -+++ b/drivers/usb/host/xhci.c -@@ -422,10 +422,14 @@ static int xhci_try_enable_msi(struct us - free_irq(hcd->irq, hcd); - hcd->irq = 0; - -- ret = xhci_setup_msix(xhci); -- if (ret) -- /* fall back to msi*/ -+ if (xhci->quirks & XHCI_FORCE_MSI) { - ret = xhci_setup_msi(xhci); -+ } else { -+ ret = xhci_setup_msix(xhci); -+ if (ret) -+ /* fall back to msi*/ -+ ret = xhci_setup_msi(xhci); -+ } - - if (!ret) { - hcd->msi_enabled = 1; ---- a/drivers/usb/host/xhci.h -+++ b/drivers/usb/host/xhci.h -@@ -1883,6 +1883,7 @@ struct xhci_hcd { - /* support xHCI 0.96 spec USB2 software LPM */ - unsigned sw_lpm_support:1; - /* support xHCI 1.0 spec USB2 hardware LPM */ -+#define XHCI_FORCE_MSI (1 << 24) - unsigned hw_lpm_support:1; - /* Broken Suspend flag for SNPS Suspend resume issue */ - unsigned broken_suspend:1; diff --git a/target/linux/apm821xx/patches-4.19/803-hwmon-tc654-add-detection-routine.patch b/target/linux/apm821xx/patches-4.19/803-hwmon-tc654-add-detection-routine.patch deleted file mode 100644 index f8b30ae1b3..0000000000 --- a/target/linux/apm821xx/patches-4.19/803-hwmon-tc654-add-detection-routine.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 694f9bfb8efaef8a33e8992015ff9d0866faf4a2 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 17 Dec 2017 17:27:15 +0100 -Subject: [PATCH 1/2] hwmon: tc654 add detection routine - -This patch adds a detection routine for the TC654/TC655 -chips. Both IDs are listed in the Datasheet. - -Signed-off-by: Christian Lamparter ---- - drivers/hwmon/tc654.c | 29 +++++++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - ---- a/drivers/hwmon/tc654.c -+++ b/drivers/hwmon/tc654.c -@@ -64,6 +64,11 @@ enum tc654_regs { - /* Register data is read (and cached) at most once per second. */ - #define TC654_UPDATE_INTERVAL HZ - -+/* Manufacturer and Version Identification Register Values */ -+#define TC654_MFR_ID_MICROCHIP 0x84 -+#define TC654_VER_ID 0x00 -+#define TC655_VER_ID 0x01 -+ - struct tc654_data { - struct i2c_client *client; - -@@ -497,6 +502,29 @@ static const struct i2c_device_id tc654_ - {} - }; - -+static int -+tc654_detect(struct i2c_client *new_client, struct i2c_board_info *info) -+{ -+ struct i2c_adapter *adapter = new_client->adapter; -+ int manufacturer, product; -+ -+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) -+ return -ENODEV; -+ -+ manufacturer = i2c_smbus_read_byte_data(new_client, TC654_REG_MFR_ID); -+ if (manufacturer != TC654_MFR_ID_MICROCHIP) -+ return -ENODEV; -+ -+ product = i2c_smbus_read_byte_data(new_client, TC654_REG_VER_ID); -+ if (!((product == TC654_VER_ID) || (product == TC655_VER_ID))) -+ return -ENODEV; -+ -+ strlcpy(info->type, product == TC654_VER_ID ? "tc654" : "tc655", -+ I2C_NAME_SIZE); -+ return 0; -+} -+ -+ - MODULE_DEVICE_TABLE(i2c, tc654_id); - - static struct i2c_driver tc654_driver = { -@@ -505,6 +533,7 @@ static struct i2c_driver tc654_driver = - }, - .probe = tc654_probe, - .id_table = tc654_id, -+ .detect = tc654_detect, - }; - - module_i2c_driver(tc654_driver); diff --git a/target/linux/apm821xx/patches-4.19/804-hwmon-tc654-add-thermal_cooling-device.patch b/target/linux/apm821xx/patches-4.19/804-hwmon-tc654-add-thermal_cooling-device.patch deleted file mode 100644 index 18ed8aecce..0000000000 --- a/target/linux/apm821xx/patches-4.19/804-hwmon-tc654-add-thermal_cooling-device.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 15ae701189744d321d3a1264ff46f8871e8765ee Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 17 Dec 2017 17:29:13 +0100 -Subject: [PATCH] hwmon: tc654: add thermal_cooling device - -This patch adds a thermaL_cooling device to the tc654 driver. -This allows the chip to be used for DT-based cooling. - -Signed-off-by: Christian Lamparter ---- - drivers/hwmon/tc654.c | 103 +++++++++++++++++++++++++++++++++++++++++--------- - 1 file changed, 86 insertions(+), 17 deletions(-) - ---- a/drivers/hwmon/tc654.c -+++ b/drivers/hwmon/tc654.c -@@ -24,6 +24,7 @@ - #include - #include - #include -+#include - #include - - enum tc654_regs { -@@ -141,6 +142,9 @@ struct tc654_data { - * writable register used to control the duty - * cycle of the V OUT output. - */ -+ -+ /* optional cooling device */ -+ struct thermal_cooling_device *cdev; - }; - - /* helper to grab and cache data, at most one time per second */ -@@ -376,36 +380,30 @@ static ssize_t set_pwm_mode(struct devic - static const int tc654_pwm_map[16] = { 77, 88, 102, 112, 124, 136, 148, 160, - 172, 184, 196, 207, 219, 231, 243, 255}; - -+static int get_pwm(struct tc654_data *data) -+{ -+ if (data->config & TC654_REG_CONFIG_SDM) -+ return 0; -+ else -+ return tc654_pwm_map[data->duty_cycle]; -+} -+ - static ssize_t show_pwm(struct device *dev, struct device_attribute *da, - char *buf) - { - struct tc654_data *data = tc654_update_client(dev); -- int pwm; - - if (IS_ERR(data)) - return PTR_ERR(data); - -- if (data->config & TC654_REG_CONFIG_SDM) -- pwm = 0; -- else -- pwm = tc654_pwm_map[data->duty_cycle]; -- -- return sprintf(buf, "%d\n", pwm); -+ return sprintf(buf, "%d\n", get_pwm(data)); - } - --static ssize_t set_pwm(struct device *dev, struct device_attribute *da, -- const char *buf, size_t count) -+static int _set_pwm(struct tc654_data *data, unsigned long val) - { -- struct tc654_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; -- unsigned long val; - int ret; - -- if (kstrtoul(buf, 10, &val)) -- return -EINVAL; -- if (val > 255) -- return -EINVAL; -- - mutex_lock(&data->update_lock); - - if (val == 0) -@@ -425,6 +423,22 @@ static ssize_t set_pwm(struct device *de - - out: - mutex_unlock(&data->update_lock); -+ return ret; -+} -+ -+static ssize_t set_pwm(struct device *dev, struct device_attribute *da, -+ const char *buf, size_t count) -+{ -+ struct tc654_data *data = dev_get_drvdata(dev); -+ unsigned long val; -+ int ret; -+ -+ if (kstrtoul(buf, 10, &val)) -+ return -EINVAL; -+ if (val > 255) -+ return -EINVAL; -+ -+ ret = _set_pwm(data, val); - return ret < 0 ? ret : count; - } - -@@ -462,6 +476,47 @@ static struct attribute *tc654_attrs[] = - - ATTRIBUTE_GROUPS(tc654); - -+/* cooling device */ -+ -+static int tc654_get_max_state(struct thermal_cooling_device *cdev, -+ unsigned long *state) -+{ -+ *state = 255; -+ return 0; -+} -+ -+static int tc654_get_cur_state(struct thermal_cooling_device *cdev, -+ unsigned long *state) -+{ -+ struct tc654_data *data = tc654_update_client(cdev->devdata); -+ -+ if (IS_ERR(data)) -+ return PTR_ERR(data); -+ -+ *state = get_pwm(data); -+ return 0; -+} -+ -+static int tc654_set_cur_state(struct thermal_cooling_device *cdev, -+ unsigned long state) -+{ -+ struct tc654_data *data = tc654_update_client(cdev->devdata); -+ -+ if (IS_ERR(data)) -+ return PTR_ERR(data); -+ -+ if (state > 255) -+ return -EINVAL; -+ -+ return _set_pwm(data, state); -+} -+ -+static const struct thermal_cooling_device_ops tc654_fan_cool_ops = { -+ .get_max_state = tc654_get_max_state, -+ .get_cur_state = tc654_get_cur_state, -+ .set_cur_state = tc654_set_cur_state, -+}; -+ - /* - * device probe and removal - */ -@@ -493,7 +548,21 @@ static int tc654_probe(struct i2c_client - hwmon_dev = - devm_hwmon_device_register_with_groups(dev, client->name, data, - tc654_groups); -- return PTR_ERR_OR_ZERO(hwmon_dev); -+ if (IS_ERR(hwmon_dev)) -+ return PTR_ERR(hwmon_dev); -+ -+#if IS_ENABLED(CONFIG_OF) -+ /* Optional cooling device register for Device tree platforms */ -+ data->cdev = thermal_of_cooling_device_register(client->dev.of_node, -+ "tc654", hwmon_dev, -+ &tc654_fan_cool_ops); -+#else /* CONFIG_OF */ -+ /* Optional cooling device register for non Device tree platforms */ -+ data->cdev = thermal_cooling_device_register("tc654", hwmon_dev, -+ &tc654_fan_cool_ops); -+#endif /* CONFIG_OF */ -+ -+ return PTR_ERR_OR_ZERO(data->cdev); - } - - static const struct i2c_device_id tc654_id[] = { diff --git a/target/linux/armvirt/32/config-4.19 b/target/linux/armvirt/32/config-4.19 deleted file mode 100644 index 735839cc40..0000000000 --- a/target/linux/armvirt/32/config-4.19 +++ /dev/null @@ -1,91 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_ARCH_AXXIA is not set -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_VIRT=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_LPAE=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_PSCI=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_VIRT_EXT=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_CACHE_L2X0=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_USER is not set -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_SMP=y -# CONFIG_HUGETLBFS is not set -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_NEON=y -CONFIG_NR_CPUS=4 -CONFIG_OLD_SIGACTION=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_USE_VMALLOC=y -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set -CONFIG_RTC_MC146818_LIB=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SMP_ON_UP=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 diff --git a/target/linux/armvirt/64/config-4.19 b/target/linux/armvirt/64/config-4.19 deleted file mode 100644 index 8bcef5bed6..0000000000 --- a/target/linux/armvirt/64/config-4.19 +++ /dev/null @@ -1,230 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_VEXPRESS=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARM64=y -# CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_64K_PAGES is not set -CONFIG_ARM64_CONT_SHIFT=4 -CONFIG_ARM64_CRYPTO=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_HW_AFDBM=y -# CONFIG_ARM64_LSE_ATOMICS is not set -CONFIG_ARM64_MODULE_PLTS=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PAN=y -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -# CONFIG_ARM64_PMEM is not set -# CONFIG_ARM64_PTDUMP_DEBUGFS is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -CONFIG_ARM64_SSBD=y -CONFIG_ARM64_SVE=y -CONFIG_ARM64_UAO=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -# CONFIG_ARM64_VA_BITS_48 is not set -CONFIG_ARM64_VHE=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -CONFIG_ATOMIC64_SELFTEST=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_VERSATILE=y -CONFIG_CLK_SP810=y -CONFIG_CLK_VEXPRESS_OSC=y -CONFIG_COMMON_CLK_VERSATILE=y -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_IDLE=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_PM=y -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_BS=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y -CONFIG_CRYPTO_CHACHA20=y -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32_ARM64_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -# CONFIG_CRYPTO_SHA3_ARM64 is not set -CONFIG_CRYPTO_SHA512_ARM64=y -# CONFIG_CRYPTO_SHA512_ARM64_CE is not set -CONFIG_CRYPTO_SIMD=y -# CONFIG_CRYPTO_SM3_ARM64_CE is not set -# CONFIG_CRYPTO_SM4_ARM64_CE is not set -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DRM=y -CONFIG_DRM_BOCHS=y -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_PANEL_SIMPLE is not set -CONFIG_DRM_QXL=y -CONFIG_DRM_TTM=y -CONFIG_DRM_VIRTIO_GPU=y -CONFIG_FB=y -CONFIG_FB_ARMCLCD=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FLATMEM_MANUAL is not set -CONFIG_FSL_ERRATUM_A008585=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_HDMI=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HUGETLBFS is not set -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_VIRTIO=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_PLATFORM is not set -CONFIG_MFD_CORE=y -CONFIG_MFD_SYSCON=y -CONFIG_MFD_VEXPRESS_SYSREG=y -CONFIG_MMC=y -CONFIG_MMC_ARMMMCI=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MTD_PHYSMAP_OF is not set -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=64 -# CONFIG_NUMA is not set -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_VEXPRESS=y -CONFIG_POWER_SUPPLY=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_SMC91X=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SYNC_FILE=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VEXPRESS_CONFIG=y -CONFIG_VEXPRESS_SYSCFG=y -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_VMAP_STACK=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/armvirt/config-4.19 b/target/linux/armvirt/config-4.19 deleted file mode 100644 index 6dbc5aecfd..0000000000 --- a/target/linux/armvirt/config-4.19 +++ /dev/null @@ -1,218 +0,0 @@ -CONFIG_9P_FS=y -# CONFIG_9P_FS_POSIX_ACL is not set -# CONFIG_9P_FS_SECURITY is not set -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_BALLOON_COMPACTION=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_MQ_VIRTIO=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -CONFIG_CPU_RMAP=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DTC=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXT4_FS=y -CONFIG_F2FS_FS=y -CONFIG_FAILOVER=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_PL061=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARM_SMCCC=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HVC_DRIVER=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IOMMU_HELPER=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_MEMORY_BALLOON=y -CONFIG_MEMFD_CREATE=y -CONFIG_MIGRATION=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_9P=y -# CONFIG_NET_9P_DEBUG is not set -CONFIG_NET_9P_VIRTIO=y -CONFIG_NET_FAILOVER=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NO_BOOTMEM=y -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PADATA=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_ECAM=y -CONFIG_PCI_HOST_COMMON=y -CONFIG_PCI_HOST_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_RATIONAL=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_REFCOUNT_FULL=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_PL031=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCHED_INFO is not set -CONFIG_SCSI=y -CONFIG_SCSI_VIRTIO=y -CONFIG_SERIAL_8250_FSL=y -# CONFIG_SERIAL_AMBA_PL010 is not set -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_SWIOTLB=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_USB_SUPPORT=y -CONFIG_VIRTIO=y -CONFIG_VIRTIO_BALLOON=y -CONFIG_VIRTIO_BLK=y -CONFIG_VIRTIO_CONSOLE=y -CONFIG_VIRTIO_MMIO=y -# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set -CONFIG_VIRTIO_NET=y -CONFIG_VIRTIO_PCI=y -CONFIG_VIRTIO_PCI_LEGACY=y -CONFIG_XPS=y diff --git a/target/linux/ath79/config-4.19 b/target/linux/ath79/config-4.19 deleted file mode 100644 index 3679f0c0c9..0000000000 --- a/target/linux/ath79/config-4.19 +++ /dev/null @@ -1,239 +0,0 @@ -CONFIG_AG71XX=y -# CONFIG_AG71XX_DEBUG is not set -CONFIG_AG71XX_DEBUG_FS=y -CONFIG_AR8216_PHY=y -CONFIG_AR8216_PHY_LEDS=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_AT803X_PHY=y -CONFIG_ATH79=y -CONFIG_ATH79_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_CEVT_R4K=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_BOSTON is not set -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPSR2=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_R4K_FPU=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CPU_SUPPORTS_MSA=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_NONCOHERENT_OPS=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_FIXED_PHY=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_74X164=y -CONFIG_GPIO_ATH79=y -CONFIG_GPIO_GENERIC=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HW_HAS_PCI=y -CONFIG_HZ_PERIODIC=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_RESET is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_GPIO=y -CONFIG_MEMFD_CREATE=y -# CONFIG_MFD_RB4XX_CPLD is not set -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CBPF_JIT=y -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set -# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -# CONFIG_MIPS_ELF_APPENDED_DTB is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MIPS_SPRAM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I2 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_M25P80=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set -CONFIG_MTD_PARSER_CYBERTAN=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_ELF_FW=y -CONFIG_MTD_SPLIT_LZMA_FW=y -CONFIG_MTD_SPLIT_SEAMA_FW=y -CONFIG_MTD_SPLIT_TPLINK_FW=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_SPLIT_WRGG_FW=y -CONFIG_MTD_VIRT_CONCAT=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_PCI=y -CONFIG_PCI_AR71XX=y -CONFIG_PCI_AR724X=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -# CONFIG_PHY_AR7100_USB is not set -# CONFIG_PHY_AR7200_USB is not set -# CONFIG_PHY_ATH79_USB is not set -CONFIG_PINCTRL=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RESET_ATH79=y -CONFIG_RESET_CONTROLLER=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -CONFIG_SERIAL_AR933X=y -CONFIG_SERIAL_AR933X_CONSOLE=y -CONFIG_SERIAL_AR933X_NR_UARTS=2 -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SPI=y -CONFIG_SPI_AR934X=y -CONFIG_SPI_ATH79=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -# CONFIG_SPI_RB4XX is not set -CONFIG_SRCU=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R2=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_MIPS16=y -CONFIG_SYS_SUPPORTS_ZBOOT=y -CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y diff --git a/target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch b/target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch deleted file mode 100644 index 36234d8d83..0000000000 --- a/target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 5f5c9858af167f842ee8df053920b98387a71af1 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 5 Mar 2018 11:41:25 +0100 -Subject: [PATCH 02/27] watchdog: ath79: fix maximum timeout - -If the userland tries to set a timeout higher than the max_timeout, -then we should fallback to max_timeout. - -Signed-off-by: John Crispin ---- - drivers/watchdog/ath79_wdt.c | 8 ++++++-- - 1 file changed, 6 insertions(+), 2 deletions(-) - ---- a/drivers/watchdog/ath79_wdt.c -+++ b/drivers/watchdog/ath79_wdt.c -@@ -115,10 +115,14 @@ static inline void ath79_wdt_disable(voi - - static int ath79_wdt_set_timeout(int val) - { -- if (val < 1 || val > max_timeout) -+ if (val < 1) - return -EINVAL; - -- timeout = val; -+ if (val > max_timeout) -+ timeout = max_timeout; -+ else -+ timeout = val; -+ - ath79_wdt_keepalive(); - - return 0; diff --git a/target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch deleted file mode 100644 index b909d57fce..0000000000 --- a/target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch +++ /dev/null @@ -1,186 +0,0 @@ -From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:03:03 +0100 -Subject: [PATCH 03/27] leds: add reset-controller based driver - -Signed-off-by: John Crispin ---- - drivers/leds/Kconfig | 11 ++++ - drivers/leds/Makefile | 1 + - drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 149 insertions(+) - create mode 100644 drivers/leds/leds-reset.c - ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -756,6 +756,17 @@ config LEDS_NIC78BX - To compile this driver as a module, choose M here: the module - will be called leds-nic78bx. - -+config LEDS_RESET -+ tristate "LED support for reset-controller API" -+ depends on LEDS_CLASS -+ depends on RESET_CONTROLLER -+ help -+ This option enables support for LEDs connected to pins driven by reset -+ controllers. Yes, DNI actual built HW like that. -+ -+ To compile this driver as a module, choose M here: the module -+ will be called leds-reset. -+ - comment "LED Triggers" - source "drivers/leds/trigger/Kconfig" - ---- /dev/null -+++ b/drivers/leds/leds-reset.c -@@ -0,0 +1,140 @@ -+/* -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct reset_led_data { -+ struct led_classdev cdev; -+ struct reset_control *rst; -+}; -+ -+static inline struct reset_led_data * -+ cdev_to_reset_led_data(struct led_classdev *led_cdev) -+{ -+ return container_of(led_cdev, struct reset_led_data, cdev); -+} -+ -+static void reset_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev); -+ -+ if (value == LED_OFF) -+ reset_control_assert(led_dat->rst); -+ else -+ reset_control_deassert(led_dat->rst); -+} -+ -+struct reset_leds_priv { -+ int num_leds; -+ struct reset_led_data leds[]; -+}; -+ -+static inline int sizeof_reset_leds_priv(int num_leds) -+{ -+ return sizeof(struct reset_leds_priv) + -+ (sizeof(struct reset_led_data) * num_leds); -+} -+ -+static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct fwnode_handle *child; -+ struct reset_leds_priv *priv; -+ int count, ret; -+ -+ count = device_get_child_node_count(dev); -+ if (!count) -+ return ERR_PTR(-ENODEV); -+ -+ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL); -+ if (!priv) -+ return ERR_PTR(-ENOMEM); -+ -+ device_for_each_child_node(dev, child) { -+ struct reset_led_data *led = &priv->leds[priv->num_leds]; -+ struct device_node *np = to_of_node(child); -+ -+ ret = fwnode_property_read_string(child, "label", &led->cdev.name); -+ if (!led->cdev.name) { -+ fwnode_handle_put(child); -+ return ERR_PTR(-EINVAL); -+ } -+ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0); -+ if (IS_ERR(led->rst)) -+ return ERR_PTR(-EINVAL); -+ -+ fwnode_property_read_string(child, "linux,default-trigger", -+ &led->cdev.default_trigger); -+ -+ led->cdev.brightness_set = reset_led_set; -+ ret = devm_of_led_classdev_register(&pdev->dev, np, &led->cdev); -+ if (ret < 0) -+ return ERR_PTR(ret); -+ led->cdev.dev->of_node = np; -+ priv->num_leds++; -+ } -+ -+ return priv; -+} -+ -+static const struct of_device_id of_reset_leds_match[] = { -+ { .compatible = "reset-leds", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, of_reset_leds_match); -+ -+static int reset_led_probe(struct platform_device *pdev) -+{ -+ struct reset_leds_priv *priv; -+ -+ priv = reset_leds_create(pdev); -+ if (IS_ERR(priv)) -+ return PTR_ERR(priv); -+ -+ platform_set_drvdata(pdev, priv); -+ -+ return 0; -+} -+ -+static void reset_led_shutdown(struct platform_device *pdev) -+{ -+ struct reset_leds_priv *priv = platform_get_drvdata(pdev); -+ int i; -+ -+ for (i = 0; i < priv->num_leds; i++) { -+ struct reset_led_data *led = &priv->leds[i]; -+ -+ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN)) -+ reset_led_set(&led->cdev, LED_OFF); -+ } -+} -+ -+static struct platform_driver reset_led_driver = { -+ .probe = reset_led_probe, -+ .shutdown = reset_led_shutdown, -+ .driver = { -+ .name = "leds-reset", -+ .of_match_table = of_reset_leds_match, -+ }, -+}; -+ -+module_platform_driver(reset_led_driver); -+ -+MODULE_AUTHOR("John Crispin "); -+MODULE_DESCRIPTION("reset controller LED driver"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:leds-reset"); ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -78,6 +78,7 @@ obj-$(CONFIG_LEDS_MT6323) += leds-mt632 - obj-$(CONFIG_LEDS_LM3692X) += leds-lm3692x.o - obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o - obj-$(CONFIG_LEDS_LM3601X) += leds-lm3601x.o -+obj-$(CONFIG_LEDS_RESET) += leds-reset.o - - # LED SPI Drivers - obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o diff --git a/target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch b/target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch deleted file mode 100644 index 3629e6e875..0000000000 --- a/target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch +++ /dev/null @@ -1,333 +0,0 @@ -From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:04:05 +0100 -Subject: [PATCH 04/27] phy: add ath79 usb phys - -Signed-off-by: John Crispin ---- - drivers/phy/Kconfig | 16 ++++++ - drivers/phy/Makefile | 2 + - drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++ - drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++ - 4 files changed, 250 insertions(+) - create mode 100644 drivers/phy/phy-ar7100-usb.c - create mode 100644 drivers/phy/phy-ar7200-usb.c - ---- a/drivers/phy/Kconfig -+++ b/drivers/phy/Kconfig -@@ -15,6 +15,22 @@ config GENERIC_PHY - phy users can obtain reference to the PHY. All the users of this - framework should select this config. - -+config PHY_AR7100_USB -+ tristate "Atheros AR7100 USB PHY driver" -+ depends on ATH79 || COMPILE_TEST -+ default y if USB_EHCI_HCD_PLATFORM -+ select PHY_SIMPLE -+ help -+ Enable this to support the USB PHY on Atheros AR7100 SoCs. -+ -+config PHY_AR7200_USB -+ tristate "Atheros AR7200 USB PHY driver" -+ depends on ATH79 || COMPILE_TEST -+ default y if USB_EHCI_HCD_PLATFORM -+ select PHY_SIMPLE -+ help -+ Enable this to support the USB PHY on Atheros AR7200 SoCs. -+ - config PHY_LPC18XX_USB_OTG - tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" - depends on OF && (ARCH_LPC18XX || COMPILE_TEST) ---- a/drivers/phy/Makefile -+++ b/drivers/phy/Makefile -@@ -4,6 +4,8 @@ - # - - obj-$(CONFIG_GENERIC_PHY) += phy-core.o -+obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o -+obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o - obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o - obj-$(CONFIG_PHY_XGENE) += phy-xgene.o - obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o ---- /dev/null -+++ b/drivers/phy/phy-ar7100-usb.c -@@ -0,0 +1,140 @@ -+/* -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+struct ar7100_usb_phy { -+ struct reset_control *rst_phy; -+ struct reset_control *rst_host; -+ struct reset_control *rst_ohci_dll; -+ void __iomem *io_base; -+ struct phy *phy; -+ int gpio; -+}; -+ -+static int ar7100_usb_phy_power_off(struct phy *phy) -+{ -+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ err |= reset_control_assert(priv->rst_host); -+ err |= reset_control_assert(priv->rst_phy); -+ err |= reset_control_assert(priv->rst_ohci_dll); -+ -+ return err; -+} -+ -+static int ar7100_usb_phy_power_on(struct phy *phy) -+{ -+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ err |= ar7100_usb_phy_power_off(phy); -+ mdelay(100); -+ err |= reset_control_deassert(priv->rst_ohci_dll); -+ err |= reset_control_deassert(priv->rst_phy); -+ err |= reset_control_deassert(priv->rst_host); -+ mdelay(500); -+ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG); -+ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ); -+ -+ return err; -+} -+ -+static const struct phy_ops ar7100_usb_phy_ops = { -+ .power_on = ar7100_usb_phy_power_on, -+ .power_off = ar7100_usb_phy_power_off, -+ .owner = THIS_MODULE, -+}; -+ -+static int ar7100_usb_phy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *phy_provider; -+ struct resource *res; -+ struct ar7100_usb_phy *priv; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ priv->io_base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(priv->io_base)) -+ return PTR_ERR(priv->io_base); -+ -+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); -+ if (IS_ERR(priv->rst_phy)) { -+ dev_err(&pdev->dev, "phy reset is missing\n"); -+ return PTR_ERR(priv->rst_phy); -+ } -+ -+ priv->rst_host = devm_reset_control_get(&pdev->dev, "usb-host"); -+ if (IS_ERR(priv->rst_host)) { -+ dev_err(&pdev->dev, "host reset is missing\n"); -+ return PTR_ERR(priv->rst_host); -+ } -+ -+ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll"); -+ if (IS_ERR(priv->rst_ohci_dll)) { -+ dev_err(&pdev->dev, "ohci-dll reset is missing\n"); -+ return PTR_ERR(priv->rst_host); -+ } -+ -+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops); -+ if (IS_ERR(priv->phy)) { -+ dev_err(&pdev->dev, "failed to create PHY\n"); -+ return PTR_ERR(priv->phy); -+ } -+ -+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); -+ if (priv->gpio >= 0) { -+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); -+ -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request gpio\n"); -+ return ret; -+ } -+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); -+ gpio_set_value(priv->gpio, 1); -+ } -+ -+ phy_set_drvdata(priv->phy, priv); -+ -+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); -+ -+ -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id ar7100_usb_phy_of_match[] = { -+ { .compatible = "qca,ar7100-usb-phy" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match); -+ -+static struct platform_driver ar7100_usb_phy_driver = { -+ .probe = ar7100_usb_phy_probe, -+ .driver = { -+ .of_match_table = ar7100_usb_phy_of_match, -+ .name = "ar7100-usb-phy", -+ } -+}; -+module_platform_driver(ar7100_usb_phy_driver); -+ -+MODULE_DESCRIPTION("ATH79 USB PHY driver"); -+MODULE_AUTHOR("Alban Bedel "); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/drivers/phy/phy-ar7200-usb.c -@@ -0,0 +1,136 @@ -+/* -+ * Copyright (C) 2015 Alban Bedel -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+struct ar7200_usb_phy { -+ struct reset_control *rst_phy; -+ struct reset_control *rst_phy_analog; -+ struct reset_control *suspend_override; -+ struct phy *phy; -+ int gpio; -+}; -+ -+static int ar7200_usb_phy_power_on(struct phy *phy) -+{ -+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ if (priv->suspend_override) -+ err = reset_control_assert(priv->suspend_override); -+ if (priv->rst_phy) -+ err |= reset_control_deassert(priv->rst_phy); -+ if (priv->rst_phy_analog) -+ err |= reset_control_deassert(priv->rst_phy_analog); -+ -+ return err; -+} -+ -+static int ar7200_usb_phy_power_off(struct phy *phy) -+{ -+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ if (priv->suspend_override) -+ err = reset_control_deassert(priv->suspend_override); -+ if (priv->rst_phy) -+ err |= reset_control_assert(priv->rst_phy); -+ if (priv->rst_phy_analog) -+ err |= reset_control_assert(priv->rst_phy_analog); -+ -+ return err; -+} -+ -+static const struct phy_ops ar7200_usb_phy_ops = { -+ .power_on = ar7200_usb_phy_power_on, -+ .power_off = ar7200_usb_phy_power_off, -+ .owner = THIS_MODULE, -+}; -+ -+static int ar7200_usb_phy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *phy_provider; -+ struct ar7200_usb_phy *priv; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); -+ if (IS_ERR(priv->rst_phy)) { -+ if (PTR_ERR(priv->rst_phy) != -EPROBE_DEFER) -+ dev_err(&pdev->dev, "phy reset is missing\n"); -+ return PTR_ERR(priv->rst_phy); -+ } -+ -+ priv->rst_phy_analog = devm_reset_control_get_optional( -+ &pdev->dev, "usb-phy-analog"); -+ if (IS_ERR(priv->rst_phy_analog)) { -+ if (PTR_ERR(priv->rst_phy_analog) == -ENOENT) -+ priv->rst_phy_analog = NULL; -+ else -+ return PTR_ERR(priv->rst_phy_analog); -+ } -+ -+ priv->suspend_override = devm_reset_control_get_optional( -+ &pdev->dev, "usb-suspend-override"); -+ if (IS_ERR(priv->suspend_override)) { -+ if (PTR_ERR(priv->suspend_override) == -ENOENT) -+ priv->suspend_override = NULL; -+ else -+ return PTR_ERR(priv->suspend_override); -+ } -+ -+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops); -+ if (IS_ERR(priv->phy)) { -+ dev_err(&pdev->dev, "failed to create PHY\n"); -+ return PTR_ERR(priv->phy); -+ } -+ -+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); -+ if (priv->gpio >= 0) { -+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); -+ -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request gpio\n"); -+ return ret; -+ } -+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); -+ gpio_set_value(priv->gpio, 1); -+ } -+ -+ phy_set_drvdata(priv->phy, priv); -+ -+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); -+ -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id ar7200_usb_phy_of_match[] = { -+ { .compatible = "qca,ar7200-usb-phy" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match); -+ -+static struct platform_driver ar7200_usb_phy_driver = { -+ .probe = ar7200_usb_phy_probe, -+ .driver = { -+ .of_match_table = ar7200_usb_phy_of_match, -+ .name = "ar7200-usb-phy", -+ } -+}; -+module_platform_driver(ar7200_usb_phy_driver); -+ -+MODULE_DESCRIPTION("ATH79 USB PHY driver"); -+MODULE_AUTHOR("Alban Bedel "); -+MODULE_LICENSE("GPL"); diff --git a/target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch deleted file mode 100644 index 82e563b29c..0000000000 --- a/target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:01:43 +0100 -Subject: [PATCH 05/27] usb: add more OF/quirk properties - -Signed-off-by: John Crispin ---- - drivers/usb/host/ehci-platform.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/usb/host/ehci-platform.c -+++ b/drivers/usb/host/ehci-platform.c -@@ -271,6 +271,11 @@ static int ehci_platform_probe(struct pl - ehci = hcd_to_ehci(hcd); - - if (pdata == &ehci_platform_defaults && dev->dev.of_node) { -+ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset); -+ -+ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug")) -+ pdata->has_synopsys_hc_bug = 1; -+ - if (of_property_read_bool(dev->dev.of_node, "big-endian-regs")) - ehci->big_endian_mmio = 1; - diff --git a/target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch b/target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch deleted file mode 100644 index bd26107af5..0000000000 --- a/target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch +++ /dev/null @@ -1,168 +0,0 @@ -From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 09:55:13 +0100 -Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for - QCA9556 SoCs - -Signed-off-by: John Crispin ---- - drivers/irqchip/Makefile | 1 + - drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++ - 2 files changed, 143 insertions(+) - create mode 100644 drivers/irqchip/irq-ath79-intc.c - ---- a/drivers/irqchip/Makefile -+++ b/drivers/irqchip/Makefile -@@ -3,6 +3,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o - - obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o - obj-$(CONFIG_ATH79) += irq-ath79-cpu.o -+obj-$(CONFIG_ATH79) += irq-ath79-intc.o - obj-$(CONFIG_ATH79) += irq-ath79-misc.o - obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o - obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o ---- /dev/null -+++ b/drivers/irqchip/irq-ath79-intc.c -@@ -0,0 +1,142 @@ -+/* -+ * Atheros AR71xx/AR724x/AR913x specific interrupt handling -+ * -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define ATH79_MAX_INTC_CASCADE 3 -+ -+struct ath79_intc { -+ struct irq_chip chip; -+ u32 irq; -+ u32 pending_mask; -+ u32 int_status; -+ u32 irq_mask[ATH79_MAX_INTC_CASCADE]; -+ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE]; -+}; -+ -+static void ath79_intc_irq_handler(struct irq_desc *desc) -+{ -+ struct irq_domain *domain = irq_desc_get_handler_data(desc); -+ struct ath79_intc *intc = domain->host_data; -+ u32 pending; -+ -+ pending = ath79_reset_rr(intc->int_status); -+ pending &= intc->pending_mask; -+ -+ if (pending) { -+ int i; -+ -+ for (i = 0; i < domain->hwirq_max; i++) -+ if (pending & intc->irq_mask[i]) { -+ if (intc->irq_wb_chan[i] != 0xffffffff) -+ ath79_ddr_wb_flush(intc->irq_wb_chan[i]); -+ generic_handle_irq(irq_find_mapping(domain, i)); -+ } -+ } else { -+ spurious_interrupt(); -+ } -+} -+ -+static void ath79_intc_irq_enable(struct irq_data *d) -+{ -+ struct ath79_intc *intc = d->domain->host_data; -+ enable_irq(intc->irq); -+} -+ -+static void ath79_intc_irq_disable(struct irq_data *d) -+{ -+ struct ath79_intc *intc = d->domain->host_data; -+ disable_irq(intc->irq); -+} -+ -+static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ath79_intc *intc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ath79_irq_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ath79_intc_map, -+}; -+ -+static int __init ath79_intc_of_init( -+ struct device_node *node, struct device_node *parent) -+{ -+ struct irq_domain *domain; -+ struct ath79_intc *intc; -+ int cnt, cntwb, i, err; -+ -+ cnt = of_property_count_u32_elems(node, "qca,pending-bits"); -+ if (cnt > ATH79_MAX_INTC_CASCADE) -+ panic("Too many INTC pending bits\n"); -+ -+ intc = kzalloc(sizeof(*intc), GFP_KERNEL); -+ if (!intc) -+ panic("Failed to allocate INTC memory\n"); -+ intc->chip = dummy_irq_chip; -+ intc->chip.name = "INTC"; -+ intc->chip.irq_disable = ath79_intc_irq_disable; -+ intc->chip.irq_enable = ath79_intc_irq_enable; -+ -+ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) { -+ panic("Missing address of interrupt status register\n"); -+ } -+ -+ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt); -+ for (i = 0; i < cnt; i++) { -+ intc->pending_mask |= intc->irq_mask[i]; -+ intc->irq_wb_chan[i] = 0xffffffff; -+ } -+ -+ cntwb = of_count_phandle_with_args( -+ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); -+ -+ for (i = 0; i < cntwb; i++) { -+ struct of_phandle_args args; -+ u32 irq = i; -+ -+ of_property_read_u32_index( -+ node, "qca,ddr-wb-channel-interrupts", i, &irq); -+ if (irq >= ATH79_MAX_INTC_CASCADE) -+ continue; -+ -+ err = of_parse_phandle_with_args( -+ node, "qca,ddr-wb-channels", -+ "#qca,ddr-wb-channel-cells", -+ i, &args); -+ if (err) -+ return err; -+ -+ intc->irq_wb_chan[irq] = args.args[0]; -+ } -+ -+ intc->irq = irq_of_parse_and_map(node, 0); -+ if (!intc->irq) -+ panic("Failed to get INTC IRQ"); -+ -+ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc); -+ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain); -+ -+ return 0; -+} -+IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc", -+ ath79_intc_of_init); diff --git a/target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch b/target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch deleted file mode 100644 index b5ad731d06..0000000000 --- a/target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch +++ /dev/null @@ -1,23 +0,0 @@ -From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 09:58:19 +0100 -Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper - -Signed-off-by: John Crispin ---- - drivers/irqchip/irq-ath79-cpu.c | 7 ------- - 1 file changed, 7 deletions(-) - ---- a/drivers/irqchip/irq-ath79-cpu.c -+++ b/drivers/irqchip/irq-ath79-cpu.c -@@ -88,10 +88,3 @@ static int __init ar79_cpu_intc_of_init( - } - IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc", - ar79_cpu_intc_of_init); -- --void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3) --{ -- irq_wb_chan[2] = irq_wb_chan2; -- irq_wb_chan[3] = irq_wb_chan3; -- mips_cpu_irq_init(); --} diff --git a/target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch b/target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch deleted file mode 100644 index 05db5060b1..0000000000 --- a/target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 0c8856211d26f84277f7fcb0b9595e5c646bc464 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:00:55 +0100 -Subject: [PATCH 11/33] MIPS: ath79: select the PINCTRL subsystem - -The pinmux on QCA SoCs is controlled by a single register. The -"pinctrl-single" driver can be used but requires the target -to select PINCTRL. - -Signed-off-by: John Crispin ---- - arch/mips/Kconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -288,6 +288,7 @@ config BCM63XX - select SYS_HAS_EARLY_PRINTK - select SWAP_IO_SPACE - select GPIOLIB -+ select PINCTRL - select HAVE_CLK - select MIPS_L1_CACHE_SHIFT_4 - select CLKDEV_LOOKUP diff --git a/target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch deleted file mode 100644 index bf7eb691a5..0000000000 --- a/target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:10 +0200 -Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc - -With the driver being converted from platform_data to pure OF, we need to -also add some docs. - -Cc: Rob Herring -Cc: devicetree@vger.kernel.org -Signed-off-by: John Crispin ---- - .../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++ - 1 file changed, 38 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt -@@ -0,0 +1,38 @@ -+* Qualcomm Atheros AR7100 PCI express root complex -+ -+Required properties: -+- compatible: should contain "qcom,ar7100-pci" to identify the core. -+- reg: Should contain the register ranges as listed in the reg-names property. -+- reg-names: Definition: Must include the following entries -+ - "cfg_base" IO Memory -+- #address-cells: set to <3> -+- #size-cells: set to <2> -+- ranges: ranges for the PCI memory and I/O regions -+- interrupt-map-mask and interrupt-map: standard PCI -+ properties to define the mapping of the PCIe interface to interrupt -+ numbers. -+- #interrupt-cells: set to <1> -+- interrupt-controller: define to enable the builtin IRQ cascade. -+ -+Optional properties: -+- interrupt-parent: phandle to the MIPS IRQ controller -+ -+* Example for ar7100 -+ pcie-controller@180c0000 { -+ compatible = "qca,ar7100-pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x0 0x0>; -+ reg = <0x17010000 0x100>; -+ reg-names = "cfg_base"; -+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 -+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; -+ interrupt-parent = <&cpuintc>; -+ interrupts = <2>; -+ -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ -+ interrupt-map-mask = <0 0 0 1>; -+ interrupt-map = <0 0 0 0 &pcie0 0>; -+ }; diff --git a/target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch b/target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch deleted file mode 100644 index 91796a12f0..0000000000 --- a/target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch +++ /dev/null @@ -1,202 +0,0 @@ -From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:07:23 +0200 -Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF - -With the ath79 target getting converted to pure OF, we can drop all the -platform data code and add the missing OF bits to the driver. We also add -a irq domain for the PCI/e controllers cascade, thus making it usable from -dts files. - -Signed-off-by: John Crispin ---- - arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++----------------------- - 1 file changed, 41 insertions(+), 41 deletions(-) - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -18,8 +18,11 @@ - #include - #include - #include -+#include - #include - #include -+#include -+#include - - #include - #include -@@ -49,12 +52,13 @@ - #define AR71XX_PCI_IRQ_COUNT 5 - - struct ar71xx_pci_controller { -+ struct device_node *np; - void __iomem *cfg_base; - int irq; -- int irq_base; - struct pci_controller pci_ctrl; - struct resource io_res; - struct resource mem_res; -+ struct irq_domain *domain; - }; - - /* Byte lane enable bits */ -@@ -228,29 +232,30 @@ static struct pci_ops ar71xx_pci_ops = { - - static void ar71xx_pci_irq_handler(struct irq_desc *desc) - { -- struct ar71xx_pci_controller *apc; - void __iomem *base = ath79_reset_base; -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); - u32 pending; - -- apc = irq_desc_get_handler_data(desc); -- -+ chained_irq_enter(chip, desc); - pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & - __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - - if (pending & AR71XX_PCI_INT_DEV0) -- generic_handle_irq(apc->irq_base + 0); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); - - else if (pending & AR71XX_PCI_INT_DEV1) -- generic_handle_irq(apc->irq_base + 1); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 2)); - - else if (pending & AR71XX_PCI_INT_DEV2) -- generic_handle_irq(apc->irq_base + 2); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 3)); - - else if (pending & AR71XX_PCI_INT_CORE) -- generic_handle_irq(apc->irq_base + 4); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 4)); - - else - spurious_interrupt(); -+ chained_irq_exit(chip, desc); - } - - static void ar71xx_pci_irq_unmask(struct irq_data *d) -@@ -261,7 +266,7 @@ static void ar71xx_pci_irq_unmask(struct - u32 t; - - apc = irq_data_get_irq_chip_data(d); -- irq = d->irq - apc->irq_base; -+ irq = irq_linear_revmap(apc->domain, d->irq); - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -@@ -278,7 +283,7 @@ static void ar71xx_pci_irq_mask(struct i - u32 t; - - apc = irq_data_get_irq_chip_data(d); -- irq = d->irq - apc->irq_base; -+ irq = irq_linear_revmap(apc->domain, d->irq); - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -@@ -294,24 +299,31 @@ static struct irq_chip ar71xx_pci_irq_ch - .irq_mask_ack = ar71xx_pci_irq_mask, - }; - -+static int ar71xx_pci_irq_map(struct irq_domain *d, -+ unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ar71xx_pci_controller *apc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); -+ irq_set_chip_data(irq, apc); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ar71xx_pci_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ar71xx_pci_irq_map, -+}; -+ - static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) - { - void __iomem *base = ath79_reset_base; -- int i; - - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); - -- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT); -- -- apc->irq_base = ATH79_PCI_IRQ_BASE; -- for (i = apc->irq_base; -- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) { -- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, -- handle_level_irq); -- irq_set_chip_data(i, apc); -- } -- -+ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, -+ &ar71xx_pci_domain_ops, apc); - irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, - apc); - } -@@ -328,6 +340,11 @@ static void ar71xx_pci_reset(void) - mdelay(100); - } - -+static const struct of_device_id ar71xx_pci_ids[] = { -+ { .compatible = "qca,ar7100-pci" }, -+ {}, -+}; -+ - static int ar71xx_pci_probe(struct platform_device *pdev) - { - struct ar71xx_pci_controller *apc; -@@ -348,26 +365,6 @@ static int ar71xx_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); -- if (!res) -- return -EINVAL; -- -- apc->io_res.parent = res; -- apc->io_res.name = "PCI IO space"; -- apc->io_res.start = res->start; -- apc->io_res.end = res->end; -- apc->io_res.flags = IORESOURCE_IO; -- -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); -- if (!res) -- return -EINVAL; -- -- apc->mem_res.parent = res; -- apc->mem_res.name = "PCI memory space"; -- apc->mem_res.start = res->start; -- apc->mem_res.end = res->end; -- apc->mem_res.flags = IORESOURCE_MEM; -- - ar71xx_pci_reset(); - - /* setup COMMAND register */ -@@ -380,9 +377,11 @@ static int ar71xx_pci_probe(struct platf - - ar71xx_pci_irq_init(apc); - -+ apc->np = pdev->dev.of_node; - apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; - apc->pci_ctrl.mem_resource = &apc->mem_res; - apc->pci_ctrl.io_resource = &apc->io_res; -+ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node); - - register_pci_controller(&apc->pci_ctrl); - -@@ -393,6 +392,7 @@ static struct platform_driver ar71xx_pci - .probe = ar71xx_pci_probe, - .driver = { - .name = "ar71xx-pci", -+ .of_match_table = of_match_ptr(ar71xx_pci_ids), - }, - }; - diff --git a/target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch b/target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch deleted file mode 100644 index a0af79cb4d..0000000000 --- a/target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch +++ /dev/null @@ -1,61 +0,0 @@ -From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:02 +0200 -Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc - -With the driver being converted from platform_data to pure OF, we need to -also add some docs. - -Cc: Rob Herring -Cc: devicetree@vger.kernel.org -Signed-off-by: John Crispin ---- - .../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++ - 1 file changed, 42 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt -@@ -0,0 +1,42 @@ -+* Qualcomm Atheros AR724X PCI express root complex -+ -+Required properties: -+- compatible: should contain "qcom,ar7240-pci" to identify the core. -+- reg: Should contain the register ranges as listed in the reg-names property. -+- reg-names: Definition: Must include the following entries -+ - "crp_base" Configuration registers -+ - "ctrl_base" Control registers -+ - "cfg_base" IO Memory -+- #address-cells: set to <3> -+- #size-cells: set to <2> -+- ranges: ranges for the PCI memory and I/O regions -+- interrupt-map-mask and interrupt-map: standard PCI -+ properties to define the mapping of the PCIe interface to interrupt -+ numbers. -+- #interrupt-cells: set to <1> -+- interrupt-parent: phandle to the MIPS IRQ controller -+ -+Optional properties: -+- interrupt-controller: define to enable the builtin IRQ cascade. -+ -+* Example for qca9557 -+ pcie-controller@180c0000 { -+ compatible = "qcom,ar7240-pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x0 0x0>; -+ reg = <0x180c0000 0x1000>, -+ <0x180f0000 0x100>, -+ <0x14000000 0x1000>; -+ reg-names = "crp_base", "ctrl_base", "cfg_base"; -+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 -+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; -+ interrupt-parent = <&intc2>; -+ interrupts = <1>; -+ -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ -+ interrupt-map-mask = <0 0 0 1>; -+ interrupt-map = <0 0 0 0 &pcie0 0>; -+ }; diff --git a/target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch b/target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch deleted file mode 100644 index 936bfd4816..0000000000 --- a/target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch +++ /dev/null @@ -1,205 +0,0 @@ -From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:07:37 +0200 -Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF - -With the ath79 target getting converted to pure OF, we can drop all the -platform data code and add the missing OF bits to the driver. We also add -a irq domain for the PCI/e controllers cascade, thus making it usable from -dts files. - -Signed-off-by: John Crispin ---- - arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------ - 1 file changed, 42 insertions(+), 46 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -14,8 +14,11 @@ - #include - #include - #include -+#include - #include - #include -+#include -+#include - - #define AR724X_PCI_REG_APP 0x00 - #define AR724X_PCI_REG_RESET 0x18 -@@ -45,17 +48,20 @@ struct ar724x_pci_controller { - void __iomem *crp_base; - - int irq; -- int irq_base; - - bool link_up; - bool bar0_is_cached; - u32 bar0_value; - -+ struct device_node *np; - struct pci_controller pci_controller; -+ struct irq_domain *domain; - struct resource io_res; - struct resource mem_res; - }; - -+static struct irq_chip ar724x_pci_irq_chip; -+ - static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) - { - u32 reset; -@@ -231,35 +237,31 @@ static struct pci_ops ar724x_pci_ops = { - - static void ar724x_pci_irq_handler(struct irq_desc *desc) - { -- struct ar724x_pci_controller *apc; -- void __iomem *base; -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc); - u32 pending; - -- apc = irq_desc_get_handler_data(desc); -- base = apc->ctrl_base; -- -- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & -- __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ chained_irq_enter(chip, desc); -+ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) & -+ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK); - - if (pending & AR724X_PCI_INT_DEV0) -- generic_handle_irq(apc->irq_base + 0); -- -+ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); - else - spurious_interrupt(); -+ chained_irq_exit(chip, desc); - } - - static void ar724x_pci_irq_unmask(struct irq_data *d) - { - struct ar724x_pci_controller *apc; - void __iomem *base; -- int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -- offset = apc->irq_base - d->irq; - -- switch (offset) { -+ switch (irq_linear_revmap(apc->domain, d->irq)) { - case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t | AR724X_PCI_INT_DEV0, -@@ -273,14 +275,12 @@ static void ar724x_pci_irq_mask(struct i - { - struct ar724x_pci_controller *apc; - void __iomem *base; -- int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -- offset = apc->irq_base - d->irq; - -- switch (offset) { -+ switch (irq_linear_revmap(apc->domain, d->irq)) { - case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t & ~AR724X_PCI_INT_DEV0, -@@ -305,26 +305,34 @@ static struct irq_chip ar724x_pci_irq_ch - .irq_mask_ack = ar724x_pci_irq_mask, - }; - -+static int ar724x_pci_irq_map(struct irq_domain *d, -+ unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ar724x_pci_controller *apc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq); -+ irq_set_chip_data(irq, apc); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ar724x_pci_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ar724x_pci_irq_map, -+}; -+ - static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc, - int id) - { - void __iomem *base; -- int i; - - base = apc->ctrl_base; - - __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); - __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); - -- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); -- -- for (i = apc->irq_base; -- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { -- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, -- handle_level_irq); -- irq_set_chip_data(i, apc); -- } -- -+ apc->domain = irq_domain_add_linear(apc->np, 2, -+ &ar724x_pci_domain_ops, apc); - irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler, - apc); - } -@@ -394,29 +402,11 @@ static int ar724x_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); -- if (!res) -- return -EINVAL; -- -- apc->io_res.parent = res; -- apc->io_res.name = "PCI IO space"; -- apc->io_res.start = res->start; -- apc->io_res.end = res->end; -- apc->io_res.flags = IORESOURCE_IO; -- -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); -- if (!res) -- return -EINVAL; -- -- apc->mem_res.parent = res; -- apc->mem_res.name = "PCI memory space"; -- apc->mem_res.start = res->start; -- apc->mem_res.end = res->end; -- apc->mem_res.flags = IORESOURCE_MEM; -- -+ apc->np = pdev->dev.of_node; - apc->pci_controller.pci_ops = &ar724x_pci_ops; - apc->pci_controller.io_resource = &apc->io_res; - apc->pci_controller.mem_resource = &apc->mem_res; -+ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node); - - /* - * Do the full PCIE Root Complex Initialization Sequence if the PCIe -@@ -438,10 +428,16 @@ static int ar724x_pci_probe(struct platf - return 0; - } - -+static const struct of_device_id ar724x_pci_ids[] = { -+ { .compatible = "qcom,ar7240-pci" }, -+ {}, -+}; -+ - static struct platform_driver ar724x_pci_driver = { - .probe = ar724x_pci_probe, - .driver = { - .name = "ar724x-pci", -+ .of_match_table = of_match_ptr(ar724x_pci_ids), - }, - }; - diff --git a/target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch b/target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch deleted file mode 100644 index c273140dfc..0000000000 --- a/target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch +++ /dev/null @@ -1,243 +0,0 @@ -From 288a8eb0d41f09fda242e05f8a7bd1f5b3489477 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Tue, 6 Mar 2018 13:19:26 +0100 -Subject: [PATCH 21/33] MIPS: ath79: add helpers for setting clocks and expose - the ref clock - -Preparation for transitioning the legacy clock setup code over -to OF. - -Signed-off-by: Felix Fietkau -Signed-off-by: John Crispin ---- - arch/mips/ath79/clock.c | 128 ++++++++++++++++++---------------- - include/dt-bindings/clock/ath79-clk.h | 3 +- - 2 files changed, 68 insertions(+), 63 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -37,20 +37,46 @@ static struct clk_onecell_data clk_data - .clk_num = ARRAY_SIZE(clks), - }; - --static struct clk *__init ath79_add_sys_clkdev( -- const char *id, unsigned long rate) -+static const char * const clk_names[ATH79_CLK_END] = { -+ [ATH79_CLK_CPU] = "cpu", -+ [ATH79_CLK_DDR] = "ddr", -+ [ATH79_CLK_AHB] = "ahb", -+ [ATH79_CLK_REF] = "ref", -+}; -+ -+static const char * __init ath79_clk_name(int type) - { -- struct clk *clk; -- int err; -+ BUG_ON(type >= ARRAY_SIZE(clk_names) || !clk_names[type]); -+ return clk_names[type]; -+} - -- clk = clk_register_fixed_rate(NULL, id, NULL, 0, rate); -+static void __init __ath79_set_clk(int type, const char *name, struct clk *clk) -+{ - if (IS_ERR(clk)) -- panic("failed to allocate %s clock structure", id); -+ panic("failed to allocate %s clock structure", clk_names[type]); - -- err = clk_register_clkdev(clk, id, NULL); -- if (err) -- panic("unable to register %s clock device", id); -+ clks[type] = clk; -+ clk_register_clkdev(clk, name, NULL); -+} - -+static struct clk * __init ath79_set_clk(int type, unsigned long rate) -+{ -+ const char *name = ath79_clk_name(type); -+ struct clk *clk; -+ -+ clk = clk_register_fixed_rate(NULL, name, NULL, 0, rate); -+ __ath79_set_clk(type, name, clk); -+ return clk; -+} -+ -+static struct clk * __init ath79_set_ff_clk(int type, const char *parent, -+ unsigned int mult, unsigned int div) -+{ -+ const char *name = ath79_clk_name(type); -+ struct clk *clk; -+ -+ clk = clk_register_fixed_factor(NULL, name, parent, 0, mult, div); -+ __ath79_set_clk(type, name, clk); - return clk; - } - -@@ -80,27 +106,15 @@ static void __init ar71xx_clocks_init(vo - div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; - ahb_rate = cpu_rate / div; - -- ath79_add_sys_clkdev("ref", ref_rate); -- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate); -- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate); -- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate); -+ ath79_set_clk(ATH79_CLK_REF, ref_rate); -+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); -+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); -+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - - clk_add_alias("wdt", NULL, "ahb", NULL); - clk_add_alias("uart", NULL, "ahb", NULL); - } - --static struct clk * __init ath79_reg_ffclk(const char *name, -- const char *parent_name, unsigned int mult, unsigned int div) --{ -- struct clk *clk; -- -- clk = clk_register_fixed_factor(NULL, name, parent_name, 0, mult, div); -- if (IS_ERR(clk)) -- panic("failed to allocate %s clock structure", name); -- -- return clk; --} -- - static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base) - { - u32 pll; -@@ -114,24 +128,19 @@ static void __init ar724x_clk_init(struc - ddr_div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1; - ahb_div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2; - -- clks[ATH79_CLK_CPU] = ath79_reg_ffclk("cpu", "ref", mult, div); -- clks[ATH79_CLK_DDR] = ath79_reg_ffclk("ddr", "ref", mult, div * ddr_div); -- clks[ATH79_CLK_AHB] = ath79_reg_ffclk("ahb", "ref", mult, div * ahb_div); -+ ath79_set_ff_clk(ATH79_CLK_CPU, "ref", mult, div); -+ ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div); -+ ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div); - } - - static void __init ar724x_clocks_init(void) - { - struct clk *ref_clk; - -- ref_clk = ath79_add_sys_clkdev("ref", AR724X_BASE_FREQ); -+ ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); - - ar724x_clk_init(ref_clk, ath79_pll_base); - -- /* just make happy plat_time_init() from arch/mips/ath79/setup.c */ -- clk_register_clkdev(clks[ATH79_CLK_CPU], "cpu", NULL); -- clk_register_clkdev(clks[ATH79_CLK_DDR], "ddr", NULL); -- clk_register_clkdev(clks[ATH79_CLK_AHB], "ahb", NULL); -- - clk_add_alias("wdt", NULL, "ahb", NULL); - clk_add_alias("uart", NULL, "ahb", NULL); - } -@@ -186,12 +195,12 @@ static void __init ar9330_clk_init(struc - AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1; - } - -- clks[ATH79_CLK_CPU] = ath79_reg_ffclk("cpu", "ref", -- ninit_mul, ref_div * out_div * cpu_div); -- clks[ATH79_CLK_DDR] = ath79_reg_ffclk("ddr", "ref", -- ninit_mul, ref_div * out_div * ddr_div); -- clks[ATH79_CLK_AHB] = ath79_reg_ffclk("ahb", "ref", -- ninit_mul, ref_div * out_div * ahb_div); -+ ath79_set_ff_clk(ATH79_CLK_CPU, "ref", ninit_mul, -+ ref_div * out_div * cpu_div); -+ ath79_set_ff_clk(ATH79_CLK_DDR, "ref", ninit_mul, -+ ref_div * out_div * ddr_div); -+ ath79_set_ff_clk(ATH79_CLK_AHB, "ref", ninit_mul, -+ ref_div * out_div * ahb_div); - } - - static void __init ar933x_clocks_init(void) -@@ -206,15 +215,10 @@ static void __init ar933x_clocks_init(vo - else - ref_rate = (25 * 1000 * 1000); - -- ref_clk = ath79_add_sys_clkdev("ref", ref_rate); -+ ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate); - - ar9330_clk_init(ref_clk, ath79_pll_base); - -- /* just make happy plat_time_init() from arch/mips/ath79/setup.c */ -- clk_register_clkdev(clks[ATH79_CLK_CPU], "cpu", NULL); -- clk_register_clkdev(clks[ATH79_CLK_DDR], "ddr", NULL); -- clk_register_clkdev(clks[ATH79_CLK_AHB], "ahb", NULL); -- - clk_add_alias("wdt", NULL, "ahb", NULL); - clk_add_alias("uart", NULL, "ref", NULL); - } -@@ -344,10 +348,10 @@ static void __init ar934x_clocks_init(vo - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_add_sys_clkdev("ref", ref_rate); -- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate); -- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate); -- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate); -+ ath79_set_clk(ATH79_CLK_REF, ref_rate); -+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); -+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); -+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - - clk_add_alias("wdt", NULL, "ref", NULL); - clk_add_alias("uart", NULL, "ref", NULL); -@@ -431,10 +435,10 @@ static void __init qca953x_clocks_init(v - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_add_sys_clkdev("ref", ref_rate); -- ath79_add_sys_clkdev("cpu", cpu_rate); -- ath79_add_sys_clkdev("ddr", ddr_rate); -- ath79_add_sys_clkdev("ahb", ahb_rate); -+ ath79_set_clk(ATH79_CLK_REF, ref_rate); -+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); -+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); -+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - - clk_add_alias("wdt", NULL, "ref", NULL); - clk_add_alias("uart", NULL, "ref", NULL); -@@ -516,10 +520,10 @@ static void __init qca955x_clocks_init(v - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_add_sys_clkdev("ref", ref_rate); -- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate); -- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate); -- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate); -+ ath79_set_clk(ATH79_CLK_REF, ref_rate); -+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); -+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); -+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - - clk_add_alias("wdt", NULL, "ref", NULL); - clk_add_alias("uart", NULL, "ref", NULL); -@@ -620,10 +624,10 @@ static void __init qca956x_clocks_init(v - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_add_sys_clkdev("ref", ref_rate); -- ath79_add_sys_clkdev("cpu", cpu_rate); -- ath79_add_sys_clkdev("ddr", ddr_rate); -- ath79_add_sys_clkdev("ahb", ahb_rate); -+ ath79_set_clk(ATH79_CLK_REF, ref_rate); -+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); -+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); -+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - - clk_add_alias("wdt", NULL, "ref", NULL); - clk_add_alias("uart", NULL, "ref", NULL); ---- a/include/dt-bindings/clock/ath79-clk.h -+++ b/include/dt-bindings/clock/ath79-clk.h -@@ -13,7 +13,8 @@ - #define ATH79_CLK_CPU 0 - #define ATH79_CLK_DDR 1 - #define ATH79_CLK_AHB 2 -+#define ATH79_CLK_REF 3 - --#define ATH79_CLK_END 3 -+#define ATH79_CLK_END 4 - - #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch b/target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch deleted file mode 100644 index 389edc45a8..0000000000 --- a/target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch +++ /dev/null @@ -1,114 +0,0 @@ -From 339c191a95e978353c9ba3aafab0261e14de109b Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Tue, 6 Mar 2018 13:22:43 +0100 -Subject: [PATCH 22/33] MIPS: ath79: move legacy "wdt" and "uart" clock aliases - out of soc init - -Preparation for reusing functions for DT - -Signed-off-by: Felix Fietkau -Signed-off-by: John Crispin ---- - arch/mips/ath79/clock.c | 38 +++++++++++++++++--------------------- - 1 file changed, 17 insertions(+), 21 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -110,9 +110,6 @@ static void __init ar71xx_clocks_init(vo - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -- -- clk_add_alias("wdt", NULL, "ahb", NULL); -- clk_add_alias("uart", NULL, "ahb", NULL); - } - - static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base) -@@ -140,9 +137,6 @@ static void __init ar724x_clocks_init(vo - ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); - - ar724x_clk_init(ref_clk, ath79_pll_base); -- -- clk_add_alias("wdt", NULL, "ahb", NULL); -- clk_add_alias("uart", NULL, "ahb", NULL); - } - - static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base) -@@ -218,9 +212,6 @@ static void __init ar933x_clocks_init(vo - ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate); - - ar9330_clk_init(ref_clk, ath79_pll_base); -- -- clk_add_alias("wdt", NULL, "ahb", NULL); -- clk_add_alias("uart", NULL, "ref", NULL); - } - - static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, -@@ -353,9 +344,6 @@ static void __init ar934x_clocks_init(vo - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - -- clk_add_alias("wdt", NULL, "ref", NULL); -- clk_add_alias("uart", NULL, "ref", NULL); -- - iounmap(dpll_base); - } - -@@ -439,9 +427,6 @@ static void __init qca953x_clocks_init(v - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -- -- clk_add_alias("wdt", NULL, "ref", NULL); -- clk_add_alias("uart", NULL, "ref", NULL); - } - - static void __init qca955x_clocks_init(void) -@@ -524,9 +509,6 @@ static void __init qca955x_clocks_init(v - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -- -- clk_add_alias("wdt", NULL, "ref", NULL); -- clk_add_alias("uart", NULL, "ref", NULL); - } - - static void __init qca956x_clocks_init(void) -@@ -628,13 +610,13 @@ static void __init qca956x_clocks_init(v - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -- -- clk_add_alias("wdt", NULL, "ref", NULL); -- clk_add_alias("uart", NULL, "ref", NULL); - } - - void __init ath79_clocks_init(void) - { -+ const char *wdt; -+ const char *uart; -+ - if (soc_is_ar71xx()) - ar71xx_clocks_init(); - else if (soc_is_ar724x() || soc_is_ar913x()) -@@ -651,6 +633,20 @@ void __init ath79_clocks_init(void) - qca956x_clocks_init(); - else - BUG(); -+ -+ if (soc_is_ar71xx() || soc_is_ar724x() || soc_is_ar913x()) { -+ wdt = "ahb"; -+ uart = "ahb"; -+ } else if (soc_is_ar933x()) { -+ wdt = "ahb"; -+ uart = "ref"; -+ } else { -+ wdt = "ref"; -+ uart = "ref"; -+ } -+ -+ clk_add_alias("wdt", NULL, wdt, NULL); -+ clk_add_alias("uart", NULL, uart, NULL); - } - - unsigned long __init diff --git a/target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch b/target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch deleted file mode 100644 index 6c0f2ad54c..0000000000 --- a/target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch +++ /dev/null @@ -1,242 +0,0 @@ -From 6350b2c36c522fecbc91a80b63f49319dafd2a72 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Tue, 6 Mar 2018 13:23:20 +0100 -Subject: [PATCH 23/33] MIPS: ath79: pass PLL base to clock init functions - -Preparation for passing the mapped base via DT - -Signed-off-by: Felix Fietkau -Signed-off-by: John Crispin ---- - arch/mips/ath79/clock.c | 60 ++++++++++++++++++++++++------------------------- - 1 file changed, 30 insertions(+), 30 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -80,7 +80,7 @@ static struct clk * __init ath79_set_ff_ - return clk; - } - --static void __init ar71xx_clocks_init(void) -+static void __init ar71xx_clocks_init(void __iomem *pll_base) - { - unsigned long ref_rate; - unsigned long cpu_rate; -@@ -92,7 +92,7 @@ static void __init ar71xx_clocks_init(vo - - ref_rate = AR71XX_BASE_FREQ; - -- pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG); -+ pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG); - - div = ((pll >> AR71XX_PLL_FB_SHIFT) & AR71XX_PLL_FB_MASK) + 1; - freq = div * ref_rate; -@@ -130,13 +130,13 @@ static void __init ar724x_clk_init(struc - ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div); - } - --static void __init ar724x_clocks_init(void) -+static void __init ar724x_clocks_init(void __iomem *pll_base) - { - struct clk *ref_clk; - - ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); - -- ar724x_clk_init(ref_clk, ath79_pll_base); -+ ar724x_clk_init(ref_clk, pll_base); - } - - static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base) -@@ -197,7 +197,7 @@ static void __init ar9330_clk_init(struc - ref_div * out_div * ahb_div); - } - --static void __init ar933x_clocks_init(void) -+static void __init ar933x_clocks_init(void __iomem *pll_base) - { - struct clk *ref_clk; - unsigned long ref_rate; -@@ -234,7 +234,7 @@ static u32 __init ar934x_get_pll_freq(u3 - return ret; - } - --static void __init ar934x_clocks_init(void) -+static void __init ar934x_clocks_init(void __iomem *pll_base) - { - unsigned long ref_rate; - unsigned long cpu_rate; -@@ -265,7 +265,7 @@ static void __init ar934x_clocks_init(vo - AR934X_SRIF_DPLL1_REFDIV_MASK; - frac = 1 << 18; - } else { -- pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG); -+ pll = __raw_readl(pll_base + AR934X_PLL_CPU_CONFIG_REG); - out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - AR934X_PLL_CPU_CONFIG_OUTDIV_MASK; - ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -@@ -292,7 +292,7 @@ static void __init ar934x_clocks_init(vo - AR934X_SRIF_DPLL1_REFDIV_MASK; - frac = 1 << 18; - } else { -- pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); -+ pll = __raw_readl(pll_base + AR934X_PLL_DDR_CONFIG_REG); - out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & - AR934X_PLL_DDR_CONFIG_OUTDIV_MASK; - ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -@@ -307,7 +307,7 @@ static void __init ar934x_clocks_init(vo - ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint, - nfrac, frac, out_div); - -- clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); -+ clk_ctrl = __raw_readl(pll_base + AR934X_PLL_CPU_DDR_CLK_CTRL_REG); - - postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & - AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK; -@@ -347,7 +347,7 @@ static void __init ar934x_clocks_init(vo - iounmap(dpll_base); - } - --static void __init qca953x_clocks_init(void) -+static void __init qca953x_clocks_init(void __iomem *pll_base) - { - unsigned long ref_rate; - unsigned long cpu_rate; -@@ -363,7 +363,7 @@ static void __init qca953x_clocks_init(v - else - ref_rate = 25 * 1000 * 1000; - -- pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); -+ pll = __raw_readl(pll_base + QCA953X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -@@ -377,7 +377,7 @@ static void __init qca953x_clocks_init(v - cpu_pll += frac * (ref_rate >> 6) / ref_div; - cpu_pll /= (1 << out_div); - -- pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); -+ pll = __raw_readl(pll_base + QCA953X_PLL_DDR_CONFIG_REG); - out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & - QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -@@ -391,7 +391,7 @@ static void __init qca953x_clocks_init(v - ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); - ddr_pll /= (1 << out_div); - -- clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); -+ clk_ctrl = __raw_readl(pll_base + QCA953X_PLL_CLK_CTRL_REG); - - postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & - QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -@@ -429,7 +429,7 @@ static void __init qca953x_clocks_init(v - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - } - --static void __init qca955x_clocks_init(void) -+static void __init qca955x_clocks_init(void __iomem *pll_base) - { - unsigned long ref_rate; - unsigned long cpu_rate; -@@ -445,7 +445,7 @@ static void __init qca955x_clocks_init(v - else - ref_rate = 25 * 1000 * 1000; - -- pll = ath79_pll_rr(QCA955X_PLL_CPU_CONFIG_REG); -+ pll = __raw_readl(pll_base + QCA955X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -@@ -459,7 +459,7 @@ static void __init qca955x_clocks_init(v - cpu_pll += frac * ref_rate / (ref_div * (1 << 6)); - cpu_pll /= (1 << out_div); - -- pll = ath79_pll_rr(QCA955X_PLL_DDR_CONFIG_REG); -+ pll = __raw_readl(pll_base + QCA955X_PLL_DDR_CONFIG_REG); - out_div = (pll >> QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & - QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -@@ -473,7 +473,7 @@ static void __init qca955x_clocks_init(v - ddr_pll += frac * ref_rate / (ref_div * (1 << 10)); - ddr_pll /= (1 << out_div); - -- clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG); -+ clk_ctrl = __raw_readl(pll_base + QCA955X_PLL_CLK_CTRL_REG); - - postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & - QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -@@ -511,7 +511,7 @@ static void __init qca955x_clocks_init(v - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - } - --static void __init qca956x_clocks_init(void) -+static void __init qca956x_clocks_init(void __iomem *pll_base) - { - unsigned long ref_rate; - unsigned long cpu_rate; -@@ -537,13 +537,13 @@ static void __init qca956x_clocks_init(v - else - ref_rate = 25 * 1000 * 1000; - -- pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG_REG); -+ pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) & - QCA956X_PLL_CPU_CONFIG_REFDIV_MASK; - -- pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG1_REG); -+ pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG1_REG); - nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) & - QCA956X_PLL_CPU_CONFIG1_NINT_MASK; - hfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT) & -@@ -556,12 +556,12 @@ static void __init qca956x_clocks_init(v - cpu_pll += (hfrac >> 13) * ref_rate / ref_div; - cpu_pll /= (1 << out_div); - -- pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG); -+ pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG_REG); - out_div = (pll >> QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & - QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) & - QCA956X_PLL_DDR_CONFIG_REFDIV_MASK; -- pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG); -+ pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG1_REG); - nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) & - QCA956X_PLL_DDR_CONFIG1_NINT_MASK; - hfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT) & -@@ -574,7 +574,7 @@ static void __init qca956x_clocks_init(v - ddr_pll += (hfrac >> 13) * ref_rate / ref_div; - ddr_pll /= (1 << out_div); - -- clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG); -+ clk_ctrl = __raw_readl(pll_base + QCA956X_PLL_CLK_CTRL_REG); - - postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & - QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -@@ -618,19 +618,19 @@ void __init ath79_clocks_init(void) - const char *uart; - - if (soc_is_ar71xx()) -- ar71xx_clocks_init(); -+ ar71xx_clocks_init(ath79_pll_base); - else if (soc_is_ar724x() || soc_is_ar913x()) -- ar724x_clocks_init(); -+ ar724x_clocks_init(ath79_pll_base); - else if (soc_is_ar933x()) -- ar933x_clocks_init(); -+ ar933x_clocks_init(ath79_pll_base); - else if (soc_is_ar934x()) -- ar934x_clocks_init(); -+ ar934x_clocks_init(ath79_pll_base); - else if (soc_is_qca953x()) -- qca953x_clocks_init(); -+ qca953x_clocks_init(ath79_pll_base); - else if (soc_is_qca955x()) -- qca955x_clocks_init(); -+ qca955x_clocks_init(ath79_pll_base); - else if (soc_is_qca956x() || soc_is_tp9343()) -- qca956x_clocks_init(); -+ qca956x_clocks_init(ath79_pll_base); - else - BUG(); - diff --git a/target/linux/ath79/patches-4.19/0024-MIPS-ath79-make-specifying-the-reference-clock-in-DT.patch b/target/linux/ath79/patches-4.19/0024-MIPS-ath79-make-specifying-the-reference-clock-in-DT.patch deleted file mode 100644 index 9ceb643803..0000000000 --- a/target/linux/ath79/patches-4.19/0024-MIPS-ath79-make-specifying-the-reference-clock-in-DT.patch +++ /dev/null @@ -1,229 +0,0 @@ -From 5fadb2544ed0bb72ddddd846aa303bb9ed2d211c Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Tue, 6 Mar 2018 13:24:07 +0100 -Subject: [PATCH 24/33] MIPS: ath79: make specifying the reference clock in DT - optional - -It can be autodetected for many SoCs using the strapping options. -If the clock is specified in DT, the autodetected value is ignored - -Signed-off-by: Felix Fietkau -Signed-off-by: John Crispin ---- - arch/mips/ath79/clock.c | 84 +++++++++++++++++++++++-------------------------- - 1 file changed, 40 insertions(+), 44 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -80,6 +80,18 @@ static struct clk * __init ath79_set_ff_ - return clk; - } - -+static unsigned long __init ath79_setup_ref_clk(unsigned long rate) -+{ -+ struct clk *clk = clks[ATH79_CLK_REF]; -+ -+ if (clk) -+ rate = clk_get_rate(clk); -+ else -+ clk = ath79_set_clk(ATH79_CLK_REF, rate); -+ -+ return rate; -+} -+ - static void __init ar71xx_clocks_init(void __iomem *pll_base) - { - unsigned long ref_rate; -@@ -90,7 +102,7 @@ static void __init ar71xx_clocks_init(vo - u32 freq; - u32 div; - -- ref_rate = AR71XX_BASE_FREQ; -+ ref_rate = ath79_setup_ref_clk(AR71XX_BASE_FREQ); - - pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG); - -@@ -106,16 +118,17 @@ static void __init ar71xx_clocks_init(vo - div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; - ahb_rate = cpu_rate / div; - -- ath79_set_clk(ATH79_CLK_REF, ref_rate); - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - } - --static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base) -+static void __init ar724x_clocks_init(void __iomem *pll_base) - { -- u32 pll; - u32 mult, div, ddr_div, ahb_div; -+ u32 pll; -+ -+ ath79_setup_ref_clk(AR71XX_BASE_FREQ); - - pll = __raw_readl(pll_base + AR724X_PLL_REG_CPU_CONFIG); - -@@ -130,17 +143,9 @@ static void __init ar724x_clk_init(struc - ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div); - } - --static void __init ar724x_clocks_init(void __iomem *pll_base) --{ -- struct clk *ref_clk; -- -- ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); -- -- ar724x_clk_init(ref_clk, pll_base); --} -- --static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base) -+static void __init ar933x_clocks_init(void __iomem *pll_base) - { -+ unsigned long ref_rate; - u32 clock_ctrl; - u32 ref_div; - u32 ninit_mul; -@@ -149,6 +154,15 @@ static void __init ar9330_clk_init(struc - u32 cpu_div; - u32 ddr_div; - u32 ahb_div; -+ u32 t; -+ -+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ if (t & AR933X_BOOTSTRAP_REF_CLK_40) -+ ref_rate = (40 * 1000 * 1000); -+ else -+ ref_rate = (25 * 1000 * 1000); -+ -+ ath79_setup_ref_clk(ref_rate); - - clock_ctrl = __raw_readl(pll_base + AR933X_PLL_CLOCK_CTRL_REG); - if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) { -@@ -197,23 +211,6 @@ static void __init ar9330_clk_init(struc - ref_div * out_div * ahb_div); - } - --static void __init ar933x_clocks_init(void __iomem *pll_base) --{ -- struct clk *ref_clk; -- unsigned long ref_rate; -- u32 t; -- -- t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -- if (t & AR933X_BOOTSTRAP_REF_CLK_40) -- ref_rate = (40 * 1000 * 1000); -- else -- ref_rate = (25 * 1000 * 1000); -- -- ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate); -- -- ar9330_clk_init(ref_clk, ath79_pll_base); --} -- - static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, - u32 frac, u32 out_div) - { -@@ -253,6 +250,8 @@ static void __init ar934x_clocks_init(vo - else - ref_rate = 25 * 1000 * 1000; - -+ ref_rate = ath79_setup_ref_clk(ref_rate); -+ - pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL2_REG); - if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { - out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) & -@@ -339,7 +338,6 @@ static void __init ar934x_clocks_init(vo - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_set_clk(ATH79_CLK_REF, ref_rate); - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -@@ -363,6 +361,8 @@ static void __init qca953x_clocks_init(v - else - ref_rate = 25 * 1000 * 1000; - -+ ref_rate = ath79_setup_ref_clk(ref_rate); -+ - pll = __raw_readl(pll_base + QCA953X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; -@@ -423,7 +423,6 @@ static void __init qca953x_clocks_init(v - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_set_clk(ATH79_CLK_REF, ref_rate); - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -@@ -445,6 +444,8 @@ static void __init qca955x_clocks_init(v - else - ref_rate = 25 * 1000 * 1000; - -+ ref_rate = ath79_setup_ref_clk(ref_rate); -+ - pll = __raw_readl(pll_base + QCA955X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK; -@@ -505,7 +506,6 @@ static void __init qca955x_clocks_init(v - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_set_clk(ATH79_CLK_REF, ref_rate); - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -@@ -537,6 +537,8 @@ static void __init qca956x_clocks_init(v - else - ref_rate = 25 * 1000 * 1000; - -+ ref_rate = ath79_setup_ref_clk(ref_rate); -+ - pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; -@@ -606,7 +608,6 @@ static void __init qca956x_clocks_init(v - else - ahb_rate = cpu_pll / (postdiv + 1); - -- ath79_set_clk(ATH79_CLK_REF, ref_rate); - ath79_set_clk(ATH79_CLK_CPU, cpu_rate); - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); -@@ -682,10 +683,8 @@ static void __init ath79_clocks_init_dt_ - void __iomem *pll_base; - - ref_clk = of_clk_get(np, 0); -- if (IS_ERR(ref_clk)) { -- pr_err("%pOF: of_clk_get failed\n", np); -- goto err; -- } -+ if (!IS_ERR(ref_clk)) -+ clks[ATH79_CLK_REF] = ref_clk; - - pll_base = of_iomap(np, 0); - if (!pll_base) { -@@ -694,9 +693,9 @@ static void __init ath79_clocks_init_dt_ - } - - if (of_device_is_compatible(np, "qca,ar9130-pll")) -- ar724x_clk_init(ref_clk, pll_base); -+ ar724x_clocks_init(pll_base); - else if (of_device_is_compatible(np, "qca,ar9330-pll")) -- ar9330_clk_init(ref_clk, pll_base); -+ ar933x_clocks_init(pll_base); - else { - pr_err("%pOF: could not find any appropriate clk_init()\n", np); - goto err_iounmap; -@@ -714,9 +713,6 @@ err_iounmap: - - err_clk: - clk_put(ref_clk); -- --err: -- return; - } - CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt_ng); - CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt_ng); diff --git a/target/linux/ath79/patches-4.19/0025-MIPS-ath79-support-setting-up-clock-via-DT-on-all-So.patch b/target/linux/ath79/patches-4.19/0025-MIPS-ath79-support-setting-up-clock-via-DT-on-all-So.patch deleted file mode 100644 index 13f46a9146..0000000000 --- a/target/linux/ath79/patches-4.19/0025-MIPS-ath79-support-setting-up-clock-via-DT-on-all-So.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 6325626de001df98aebe51f3008b1aca05798d19 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Tue, 6 Mar 2018 13:26:27 +0100 -Subject: [PATCH 25/33] MIPS: ath79: support setting up clock via DT on all SoC - types - -Use the same functions as the legacy code - -Signed-off-by: Felix Fietkau -Signed-off-by: John Crispin ---- - arch/mips/ath79/clock.c | 39 ++++++++++++++++++++++----------------- - 1 file changed, 22 insertions(+), 17 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -669,16 +669,6 @@ ath79_get_sys_clk_rate(const char *id) - #ifdef CONFIG_OF - static void __init ath79_clocks_init_dt(struct device_node *np) - { -- of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); --} -- --CLK_OF_DECLARE(ar7100, "qca,ar7100-pll", ath79_clocks_init_dt); --CLK_OF_DECLARE(ar7240, "qca,ar7240-pll", ath79_clocks_init_dt); --CLK_OF_DECLARE(ar9340, "qca,ar9340-pll", ath79_clocks_init_dt); --CLK_OF_DECLARE(ar9550, "qca,qca9550-pll", ath79_clocks_init_dt); -- --static void __init ath79_clocks_init_dt_ng(struct device_node *np) --{ - struct clk *ref_clk; - void __iomem *pll_base; - -@@ -692,14 +682,21 @@ static void __init ath79_clocks_init_dt_ - goto err_clk; - } - -- if (of_device_is_compatible(np, "qca,ar9130-pll")) -+ if (of_device_is_compatible(np, "qca,ar7100-pll")) -+ ar71xx_clocks_init(pll_base); -+ else if (of_device_is_compatible(np, "qca,ar7240-pll") || -+ of_device_is_compatible(np, "qca,ar9130-pll")) - ar724x_clocks_init(pll_base); - else if (of_device_is_compatible(np, "qca,ar9330-pll")) - ar933x_clocks_init(pll_base); -- else { -- pr_err("%pOF: could not find any appropriate clk_init()\n", np); -- goto err_iounmap; -- } -+ else if (of_device_is_compatible(np, "qca,ar9340-pll")) -+ ar934x_clocks_init(pll_base); -+ else if (of_device_is_compatible(np, "qca,qca9530-pll")) -+ qca953x_clocks_init(pll_base); -+ else if (of_device_is_compatible(np, "qca,qca9550-pll")) -+ qca955x_clocks_init(pll_base); -+ else if (of_device_is_compatible(np, "qca,qca9560-pll")) -+ qca956x_clocks_init(pll_base); - - if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { - pr_err("%pOF: could not register clk provider\n", np); -@@ -714,6 +711,14 @@ err_iounmap: - err_clk: - clk_put(ref_clk); - } --CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt_ng); --CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt_ng); -+ -+CLK_OF_DECLARE(ar7100_clk, "qca,ar7100-pll", ath79_clocks_init_dt); -+CLK_OF_DECLARE(ar7240_clk, "qca,ar7240-pll", ath79_clocks_init_dt); -+CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt); -+CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt); -+CLK_OF_DECLARE(ar9340_clk, "qca,ar9340-pll", ath79_clocks_init_dt); -+CLK_OF_DECLARE(ar9530_clk, "qca,qca9530-pll", ath79_clocks_init_dt); -+CLK_OF_DECLARE(ar9550_clk, "qca,qca9550-pll", ath79_clocks_init_dt); -+CLK_OF_DECLARE(ar9560_clk, "qca,qca9560-pll", ath79_clocks_init_dt); -+ - #endif diff --git a/target/linux/ath79/patches-4.19/0026-MIPS-ath79-export-switch-MDIO-reference-clock.patch b/target/linux/ath79/patches-4.19/0026-MIPS-ath79-export-switch-MDIO-reference-clock.patch deleted file mode 100644 index 27adb56f56..0000000000 --- a/target/linux/ath79/patches-4.19/0026-MIPS-ath79-export-switch-MDIO-reference-clock.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 78538d673801902108797f2c813e70cfbce280c9 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Tue, 6 Mar 2018 13:27:28 +0100 -Subject: [PATCH 26/33] MIPS: ath79: export switch MDIO reference clock - -On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz -clock. If that feature is not used, it defaults to the main reference -clock, like on all other SoC. - -Signed-off-by: Felix Fietkau -Signed-off-by: John Crispin ---- - arch/mips/ath79/clock.c | 8 ++++++++ - include/dt-bindings/clock/ath79-clk.h | 3 ++- - 2 files changed, 10 insertions(+), 1 deletion(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -42,6 +42,7 @@ static const char * const clk_names[ATH7 - [ATH79_CLK_DDR] = "ddr", - [ATH79_CLK_AHB] = "ahb", - [ATH79_CLK_REF] = "ref", -+ [ATH79_CLK_MDIO] = "mdio", - }; - - static const char * __init ath79_clk_name(int type) -@@ -342,6 +343,10 @@ static void __init ar934x_clocks_init(vo - ath79_set_clk(ATH79_CLK_DDR, ddr_rate); - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - -+ clk_ctrl = __raw_readl(pll_base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); -+ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) -+ ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); -+ - iounmap(dpll_base); - } - -@@ -698,6 +703,9 @@ static void __init ath79_clocks_init_dt( - else if (of_device_is_compatible(np, "qca,qca9560-pll")) - qca956x_clocks_init(pll_base); - -+ if (!clks[ATH79_CLK_MDIO]) -+ clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; -+ - if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { - pr_err("%pOF: could not register clk provider\n", np); - goto err_iounmap; ---- a/include/dt-bindings/clock/ath79-clk.h -+++ b/include/dt-bindings/clock/ath79-clk.h -@@ -14,7 +14,8 @@ - #define ATH79_CLK_DDR 1 - #define ATH79_CLK_AHB 2 - #define ATH79_CLK_REF 3 -+#define ATH79_CLK_MDIO 4 - --#define ATH79_CLK_END 4 -+#define ATH79_CLK_END 5 - - #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-4.19/0027-MIPS-ath79-drop-legacy-IRQ-code.patch b/target/linux/ath79/patches-4.19/0027-MIPS-ath79-drop-legacy-IRQ-code.patch deleted file mode 100644 index 6586f08431..0000000000 --- a/target/linux/ath79/patches-4.19/0027-MIPS-ath79-drop-legacy-IRQ-code.patch +++ /dev/null @@ -1,233 +0,0 @@ -From 3765b1f79593a0a9098ed15e48074c95403a53ee Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:05:08 +0200 -Subject: [PATCH 27/33] MIPS: ath79: drop legacy IRQ code - -With the target now being fully OF based, we can drop the legacy IRQ code. -All IRQs are now handled via the new irqchip drivers. - -Signed-off-by: John Crispin ---- - arch/mips/ath79/Makefile | 2 +- - arch/mips/ath79/irq.c | 169 ------------------------------- - arch/mips/ath79/setup.c | 6 ++ - arch/mips/include/asm/mach-ath79/ath79.h | 4 - - 4 files changed, 7 insertions(+), 174 deletions(-) - delete mode 100644 arch/mips/ath79/irq.c - ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -8,7 +8,7 @@ - # under the terms of the GNU General Public License version 2 as published - # by the Free Software Foundation. - --obj-y := prom.o setup.o irq.o common.o clock.o -+obj-y := prom.o setup.o common.o clock.o - - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o - obj-$(CONFIG_PCI) += pci.o ---- a/arch/mips/ath79/irq.c -+++ /dev/null -@@ -1,169 +0,0 @@ --/* -- * Atheros AR71xx/AR724x/AR913x specific interrupt handling -- * -- * Copyright (C) 2010-2011 Jaiganesh Narayanan -- * Copyright (C) 2008-2011 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include --#include --#include -- --#include --#include -- --#include --#include --#include "common.h" --#include "machtypes.h" -- -- --static void ar934x_ip2_irq_dispatch(struct irq_desc *desc) --{ -- u32 status; -- -- status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); -- -- if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) { -- ath79_ddr_wb_flush(3); -- generic_handle_irq(ATH79_IP2_IRQ(0)); -- } else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) { -- ath79_ddr_wb_flush(4); -- generic_handle_irq(ATH79_IP2_IRQ(1)); -- } else { -- spurious_interrupt(); -- } --} -- --static void ar934x_ip2_irq_init(void) --{ -- int i; -- -- for (i = ATH79_IP2_IRQ_BASE; -- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -- -- irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); --} -- --static void qca955x_ip2_irq_dispatch(struct irq_desc *desc) --{ -- u32 status; -- -- status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); -- status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL; -- -- if (status == 0) { -- spurious_interrupt(); -- return; -- } -- -- if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) { -- /* TODO: flush DDR? */ -- generic_handle_irq(ATH79_IP2_IRQ(0)); -- } -- -- if (status & QCA955X_EXT_INT_WMAC_ALL) { -- /* TODO: flush DDR? */ -- generic_handle_irq(ATH79_IP2_IRQ(1)); -- } --} -- --static void qca955x_ip3_irq_dispatch(struct irq_desc *desc) --{ -- u32 status; -- -- status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); -- status &= QCA955X_EXT_INT_PCIE_RC2_ALL | -- QCA955X_EXT_INT_USB1 | -- QCA955X_EXT_INT_USB2; -- -- if (status == 0) { -- spurious_interrupt(); -- return; -- } -- -- if (status & QCA955X_EXT_INT_USB1) { -- /* TODO: flush DDR? */ -- generic_handle_irq(ATH79_IP3_IRQ(0)); -- } -- -- if (status & QCA955X_EXT_INT_USB2) { -- /* TODO: flush DDR? */ -- generic_handle_irq(ATH79_IP3_IRQ(1)); -- } -- -- if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) { -- /* TODO: flush DDR? */ -- generic_handle_irq(ATH79_IP3_IRQ(2)); -- } --} -- --static void qca955x_irq_init(void) --{ -- int i; -- -- for (i = ATH79_IP2_IRQ_BASE; -- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -- -- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch); -- -- for (i = ATH79_IP3_IRQ_BASE; -- i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -- -- irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); --} -- --void __init arch_init_irq(void) --{ -- unsigned irq_wb_chan2 = -1; -- unsigned irq_wb_chan3 = -1; -- bool misc_is_ar71xx; -- -- if (mips_machtype == ATH79_MACH_GENERIC_OF) { -- irqchip_init(); -- return; -- } -- -- if (soc_is_ar71xx() || soc_is_ar724x() || -- soc_is_ar913x() || soc_is_ar933x()) { -- irq_wb_chan2 = 3; -- irq_wb_chan3 = 2; -- } else if (soc_is_ar934x()) { -- irq_wb_chan3 = 2; -- } -- -- ath79_cpu_irq_init(irq_wb_chan2, irq_wb_chan3); -- -- if (soc_is_ar71xx() || soc_is_ar913x()) -- misc_is_ar71xx = true; -- else if (soc_is_ar724x() || -- soc_is_ar933x() || -- soc_is_ar934x() || -- soc_is_qca955x()) -- misc_is_ar71xx = false; -- else -- BUG(); -- ath79_misc_irq_init( -- ath79_reset_base + AR71XX_RESET_REG_MISC_INT_STATUS, -- ATH79_CPU_IRQ(6), ATH79_MISC_IRQ_BASE, misc_is_ar71xx); -- -- if (soc_is_ar934x()) -- ar934x_ip2_irq_init(); -- else if (soc_is_qca955x()) -- qca955x_irq_init(); --} ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -305,6 +306,11 @@ void __init plat_time_init(void) - mips_hpt_frequency = cpu_clk_rate / 2; - } - -+void __init arch_init_irq(void) -+{ -+ irqchip_init(); -+} -+ - static int __init ath79_setup(void) - { - if (mips_machtype == ATH79_MACH_GENERIC_OF) ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -178,8 +178,4 @@ static inline u32 ath79_reset_rr(unsigne - void ath79_device_reset_set(u32 mask); - void ath79_device_reset_clear(u32 mask); - --void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3); --void ath79_misc_irq_init(void __iomem *regs, int irq, -- int irq_base, bool is_ar71xx); -- - #endif /* __ASM_MACH_ATH79_H */ diff --git a/target/linux/ath79/patches-4.19/0028-MIPS-ath79-drop-machfiles.patch b/target/linux/ath79/patches-4.19/0028-MIPS-ath79-drop-machfiles.patch deleted file mode 100644 index 1901e6e437..0000000000 --- a/target/linux/ath79/patches-4.19/0028-MIPS-ath79-drop-machfiles.patch +++ /dev/null @@ -1,1048 +0,0 @@ -From badf28957b6dc400dff27bd23ba2ae75d9514be5 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:04:09 +0200 -Subject: [PATCH 28/33] MIPS: ath79: drop machfiles - -With the target now being fully OF based, we can drop the legacy mach -files. Boards can now boot fully of devicetree files. - -Signed-off-by: John Crispin ---- - arch/mips/Kconfig | 1 - - arch/mips/ath79/Kconfig | 73 ------------------- - arch/mips/ath79/Makefile | 10 --- - arch/mips/ath79/clock.c | 1 - - arch/mips/ath79/mach-ap121.c | 92 ------------------------ - arch/mips/ath79/mach-ap136.c | 156 ----------------------------------------- - arch/mips/ath79/mach-ap81.c | 100 -------------------------- - arch/mips/ath79/mach-db120.c | 136 ----------------------------------- - arch/mips/ath79/mach-pb44.c | 128 --------------------------------- - arch/mips/ath79/mach-ubnt-xm.c | 126 --------------------------------- - arch/mips/ath79/machtypes.h | 28 -------- - arch/mips/ath79/setup.c | 77 +++----------------- - 12 files changed, 9 insertions(+), 919 deletions(-) - delete mode 100644 arch/mips/ath79/mach-ap121.c - delete mode 100644 arch/mips/ath79/mach-ap136.c - delete mode 100644 arch/mips/ath79/mach-ap81.c - delete mode 100644 arch/mips/ath79/mach-db120.c - delete mode 100644 arch/mips/ath79/mach-pb44.c - delete mode 100644 arch/mips/ath79/mach-ubnt-xm.c - delete mode 100644 arch/mips/ath79/machtypes.h - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -202,7 +202,6 @@ config ATH79 - select COMMON_CLK - select CLKDEV_LOOKUP - select IRQ_MIPS_CPU -- select MIPS_MACHINE - select SYS_HAS_CPU_MIPS32_R2 - select SYS_HAS_EARLY_PRINTK - select SYS_SUPPORTS_32BIT_KERNEL ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -1,79 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0 - if ATH79 - --menu "Atheros AR71XX/AR724X/AR913X machine selection" -- --config ATH79_MACH_AP121 -- bool "Atheros AP121 reference board" -- select SOC_AR933X -- select ATH79_DEV_GPIO_BUTTONS -- select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -- select ATH79_DEV_USB -- select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros AP121 reference board. -- --config ATH79_MACH_AP136 -- bool "Atheros AP136 reference board" -- select SOC_QCA955X -- select ATH79_DEV_GPIO_BUTTONS -- select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -- select ATH79_DEV_USB -- select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros AP136 reference board. -- --config ATH79_MACH_AP81 -- bool "Atheros AP81 reference board" -- select SOC_AR913X -- select ATH79_DEV_GPIO_BUTTONS -- select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -- select ATH79_DEV_USB -- select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros AP81 reference board. -- --config ATH79_MACH_DB120 -- bool "Atheros DB120 reference board" -- select SOC_AR934X -- select ATH79_DEV_GPIO_BUTTONS -- select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -- select ATH79_DEV_USB -- select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros DB120 reference board. -- --config ATH79_MACH_PB44 -- bool "Atheros PB44 reference board" -- select SOC_AR71XX -- select ATH79_DEV_GPIO_BUTTONS -- select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -- select ATH79_DEV_USB -- help -- Say 'Y' here if you want your kernel to support the -- Atheros PB44 reference board. -- --config ATH79_MACH_UBNT_XM -- bool "Ubiquiti Networks XM (rev 1.0) board" -- select SOC_AR724X -- select ATH79_DEV_GPIO_BUTTONS -- select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -- help -- Say 'Y' here if you want your kernel to support the -- Ubiquiti Networks XM (rev 1.0) board. -- --endmenu -- - config SOC_AR71XX - select HW_HAS_PCI - def_bool n ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -22,13 +22,3 @@ obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev - obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o - obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o - obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o -- --# --# Machines --# --obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o --obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o --obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o --obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o --obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o --obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -26,7 +26,6 @@ - #include - #include - #include "common.h" --#include "machtypes.h" - - #define AR71XX_BASE_FREQ 40000000 - #define AR724X_BASE_FREQ 40000000 ---- a/arch/mips/ath79/mach-ap121.c -+++ /dev/null -@@ -1,92 +0,0 @@ --/* -- * Atheros AP121 board support -- * -- * Copyright (C) 2011 Gabor Juhos -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include "machtypes.h" --#include "dev-gpio-buttons.h" --#include "dev-leds-gpio.h" --#include "dev-spi.h" --#include "dev-usb.h" --#include "dev-wmac.h" -- --#define AP121_GPIO_LED_WLAN 0 --#define AP121_GPIO_LED_USB 1 -- --#define AP121_GPIO_BTN_JUMPSTART 11 --#define AP121_GPIO_BTN_RESET 12 -- --#define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ --#define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) -- --#define AP121_CAL_DATA_ADDR 0x1fff1000 -- --static struct gpio_led ap121_leds_gpio[] __initdata = { -- { -- .name = "ap121:green:usb", -- .gpio = AP121_GPIO_LED_USB, -- .active_low = 0, -- }, -- { -- .name = "ap121:green:wlan", -- .gpio = AP121_GPIO_LED_WLAN, -- .active_low = 0, -- }, --}; -- --static struct gpio_keys_button ap121_gpio_keys[] __initdata = { -- { -- .desc = "jumpstart button", -- .type = EV_KEY, -- .code = KEY_WPS_BUTTON, -- .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -- .gpio = AP121_GPIO_BTN_JUMPSTART, -- .active_low = 1, -- }, -- { -- .desc = "reset button", -- .type = EV_KEY, -- .code = KEY_RESTART, -- .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -- .gpio = AP121_GPIO_BTN_RESET, -- .active_low = 1, -- } --}; -- --static struct spi_board_info ap121_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l1606e", -- } --}; -- --static struct ath79_spi_platform_data ap121_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --static void __init ap121_setup(void) --{ -- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR); -- -- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), -- ap121_leds_gpio); -- ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(ap121_gpio_keys), -- ap121_gpio_keys); -- -- ath79_register_spi(&ap121_spi_data, ap121_spi_info, -- ARRAY_SIZE(ap121_spi_info)); -- ath79_register_usb(); -- ath79_register_wmac(cal_data); --} -- --MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", -- ap121_setup); ---- a/arch/mips/ath79/mach-ap136.c -+++ /dev/null -@@ -1,156 +0,0 @@ --/* -- * Qualcomm Atheros AP136 reference board support -- * -- * Copyright (c) 2012 Qualcomm Atheros -- * Copyright (c) 2012-2013 Gabor Juhos -- * -- * Permission to use, copy, modify, and/or distribute this software for any -- * purpose with or without fee is hereby granted, provided that the above -- * copyright notice and this permission notice appear in all copies. -- * -- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -- * -- */ -- --#include --#include -- --#include "machtypes.h" --#include "dev-gpio-buttons.h" --#include "dev-leds-gpio.h" --#include "dev-spi.h" --#include "dev-usb.h" --#include "dev-wmac.h" --#include "pci.h" -- --#define AP136_GPIO_LED_STATUS_RED 14 --#define AP136_GPIO_LED_STATUS_GREEN 19 --#define AP136_GPIO_LED_USB 4 --#define AP136_GPIO_LED_WLAN_2G 13 --#define AP136_GPIO_LED_WLAN_5G 12 --#define AP136_GPIO_LED_WPS_RED 15 --#define AP136_GPIO_LED_WPS_GREEN 20 -- --#define AP136_GPIO_BTN_WPS 16 --#define AP136_GPIO_BTN_RFKILL 21 -- --#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ --#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) -- --#define AP136_WMAC_CALDATA_OFFSET 0x1000 --#define AP136_PCIE_CALDATA_OFFSET 0x5000 -- --static struct gpio_led ap136_leds_gpio[] __initdata = { -- { -- .name = "qca:green:status", -- .gpio = AP136_GPIO_LED_STATUS_GREEN, -- .active_low = 1, -- }, -- { -- .name = "qca:red:status", -- .gpio = AP136_GPIO_LED_STATUS_RED, -- .active_low = 1, -- }, -- { -- .name = "qca:green:wps", -- .gpio = AP136_GPIO_LED_WPS_GREEN, -- .active_low = 1, -- }, -- { -- .name = "qca:red:wps", -- .gpio = AP136_GPIO_LED_WPS_RED, -- .active_low = 1, -- }, -- { -- .name = "qca:red:wlan-2g", -- .gpio = AP136_GPIO_LED_WLAN_2G, -- .active_low = 1, -- }, -- { -- .name = "qca:red:usb", -- .gpio = AP136_GPIO_LED_USB, -- .active_low = 1, -- } --}; -- --static struct gpio_keys_button ap136_gpio_keys[] __initdata = { -- { -- .desc = "WPS button", -- .type = EV_KEY, -- .code = KEY_WPS_BUTTON, -- .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL, -- .gpio = AP136_GPIO_BTN_WPS, -- .active_low = 1, -- }, -- { -- .desc = "RFKILL button", -- .type = EV_KEY, -- .code = KEY_RFKILL, -- .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL, -- .gpio = AP136_GPIO_BTN_RFKILL, -- .active_low = 1, -- }, --}; -- --static struct spi_board_info ap136_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -- } --}; -- --static struct ath79_spi_platform_data ap136_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --#ifdef CONFIG_PCI --static struct ath9k_platform_data ap136_ath9k_data; -- --static int ap136_pci_plat_dev_init(struct pci_dev *dev) --{ -- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) -- dev->dev.platform_data = &ap136_ath9k_data; -- -- return 0; --} -- --static void __init ap136_pci_init(u8 *eeprom) --{ -- memcpy(ap136_ath9k_data.eeprom_data, eeprom, -- sizeof(ap136_ath9k_data.eeprom_data)); -- -- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void ap136_pci_init(u8 *eeprom) {} --#endif /* CONFIG_PCI */ -- --static void __init ap136_setup(void) --{ -- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -- -- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), -- ap136_leds_gpio); -- ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(ap136_gpio_keys), -- ap136_gpio_keys); -- ath79_register_spi(&ap136_spi_data, ap136_spi_info, -- ARRAY_SIZE(ap136_spi_info)); -- ath79_register_usb(); -- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); -- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); --} -- --MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", -- "Atheros AP136-010 reference board", -- ap136_setup); ---- a/arch/mips/ath79/mach-ap81.c -+++ /dev/null -@@ -1,100 +0,0 @@ --/* -- * Atheros AP81 board support -- * -- * Copyright (C) 2009-2010 Gabor Juhos -- * Copyright (C) 2009 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include "machtypes.h" --#include "dev-wmac.h" --#include "dev-gpio-buttons.h" --#include "dev-leds-gpio.h" --#include "dev-spi.h" --#include "dev-usb.h" -- --#define AP81_GPIO_LED_STATUS 1 --#define AP81_GPIO_LED_AOSS 3 --#define AP81_GPIO_LED_WLAN 6 --#define AP81_GPIO_LED_POWER 14 -- --#define AP81_GPIO_BTN_SW4 12 --#define AP81_GPIO_BTN_SW1 21 -- --#define AP81_KEYS_POLL_INTERVAL 20 /* msecs */ --#define AP81_KEYS_DEBOUNCE_INTERVAL (3 * AP81_KEYS_POLL_INTERVAL) -- --#define AP81_CAL_DATA_ADDR 0x1fff1000 -- --static struct gpio_led ap81_leds_gpio[] __initdata = { -- { -- .name = "ap81:green:status", -- .gpio = AP81_GPIO_LED_STATUS, -- .active_low = 1, -- }, { -- .name = "ap81:amber:aoss", -- .gpio = AP81_GPIO_LED_AOSS, -- .active_low = 1, -- }, { -- .name = "ap81:green:wlan", -- .gpio = AP81_GPIO_LED_WLAN, -- .active_low = 1, -- }, { -- .name = "ap81:green:power", -- .gpio = AP81_GPIO_LED_POWER, -- .active_low = 1, -- } --}; -- --static struct gpio_keys_button ap81_gpio_keys[] __initdata = { -- { -- .desc = "sw1", -- .type = EV_KEY, -- .code = BTN_0, -- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL, -- .gpio = AP81_GPIO_BTN_SW1, -- .active_low = 1, -- } , { -- .desc = "sw4", -- .type = EV_KEY, -- .code = BTN_1, -- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL, -- .gpio = AP81_GPIO_BTN_SW4, -- .active_low = 1, -- } --}; -- --static struct spi_board_info ap81_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "m25p64", -- } --}; -- --static struct ath79_spi_platform_data ap81_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --static void __init ap81_setup(void) --{ -- u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR); -- -- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio), -- ap81_leds_gpio); -- ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(ap81_gpio_keys), -- ap81_gpio_keys); -- ath79_register_spi(&ap81_spi_data, ap81_spi_info, -- ARRAY_SIZE(ap81_spi_info)); -- ath79_register_wmac(cal_data); -- ath79_register_usb(); --} -- --MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board", -- ap81_setup); ---- a/arch/mips/ath79/mach-db120.c -+++ /dev/null -@@ -1,136 +0,0 @@ --/* -- * Atheros DB120 reference board support -- * -- * Copyright (c) 2011 Qualcomm Atheros -- * Copyright (c) 2011 Gabor Juhos -- * -- * Permission to use, copy, modify, and/or distribute this software for any -- * purpose with or without fee is hereby granted, provided that the above -- * copyright notice and this permission notice appear in all copies. -- * -- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -- * -- */ -- --#include --#include -- --#include "machtypes.h" --#include "dev-gpio-buttons.h" --#include "dev-leds-gpio.h" --#include "dev-spi.h" --#include "dev-usb.h" --#include "dev-wmac.h" --#include "pci.h" -- --#define DB120_GPIO_LED_WLAN_5G 12 --#define DB120_GPIO_LED_WLAN_2G 13 --#define DB120_GPIO_LED_STATUS 14 --#define DB120_GPIO_LED_WPS 15 -- --#define DB120_GPIO_BTN_WPS 16 -- --#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ --#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) -- --#define DB120_WMAC_CALDATA_OFFSET 0x1000 --#define DB120_PCIE_CALDATA_OFFSET 0x5000 -- --static struct gpio_led db120_leds_gpio[] __initdata = { -- { -- .name = "db120:green:status", -- .gpio = DB120_GPIO_LED_STATUS, -- .active_low = 1, -- }, -- { -- .name = "db120:green:wps", -- .gpio = DB120_GPIO_LED_WPS, -- .active_low = 1, -- }, -- { -- .name = "db120:green:wlan-5g", -- .gpio = DB120_GPIO_LED_WLAN_5G, -- .active_low = 1, -- }, -- { -- .name = "db120:green:wlan-2g", -- .gpio = DB120_GPIO_LED_WLAN_2G, -- .active_low = 1, -- }, --}; -- --static struct gpio_keys_button db120_gpio_keys[] __initdata = { -- { -- .desc = "WPS button", -- .type = EV_KEY, -- .code = KEY_WPS_BUTTON, -- .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL, -- .gpio = DB120_GPIO_BTN_WPS, -- .active_low = 1, -- }, --}; -- --static struct spi_board_info db120_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "s25sl064a", -- } --}; -- --static struct ath79_spi_platform_data db120_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --#ifdef CONFIG_PCI --static struct ath9k_platform_data db120_ath9k_data; -- --static int db120_pci_plat_dev_init(struct pci_dev *dev) --{ -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &db120_ath9k_data; -- break; -- } -- -- return 0; --} -- --static void __init db120_pci_init(u8 *eeprom) --{ -- memcpy(db120_ath9k_data.eeprom_data, eeprom, -- sizeof(db120_ath9k_data.eeprom_data)); -- -- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void db120_pci_init(u8 *eeprom) {} --#endif /* CONFIG_PCI */ -- --static void __init db120_setup(void) --{ -- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -- -- ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), -- db120_leds_gpio); -- ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(db120_gpio_keys), -- db120_gpio_keys); -- ath79_register_spi(&db120_spi_data, db120_spi_info, -- ARRAY_SIZE(db120_spi_info)); -- ath79_register_usb(); -- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); -- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); --} -- --MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", -- db120_setup); ---- a/arch/mips/ath79/mach-pb44.c -+++ /dev/null -@@ -1,128 +0,0 @@ --/* -- * Atheros PB44 reference board support -- * -- * Copyright (C) 2009-2010 Gabor Juhos -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include --#include --#include -- --#include "machtypes.h" --#include "dev-gpio-buttons.h" --#include "dev-leds-gpio.h" --#include "dev-spi.h" --#include "dev-usb.h" --#include "pci.h" -- --#define PB44_GPIO_I2C_SCL 0 --#define PB44_GPIO_I2C_SDA 1 -- --#define PB44_GPIO_EXP_BASE 16 --#define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) --#define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) --#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) --#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + 10) -- --#define PB44_KEYS_POLL_INTERVAL 20 /* msecs */ --#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL) -- --static struct gpiod_lookup_table pb44_i2c_gpiod_table = { -- .dev_id = "i2c-gpio.0", -- .table = { -- GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA, -- NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), -- GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SCL, -- NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), -- }, --}; -- --static struct platform_device pb44_i2c_gpio_device = { -- .name = "i2c-gpio", -- .id = 0, -- .dev = { -- .platform_data = NULL, -- } --}; -- --static struct pcf857x_platform_data pb44_pcf857x_data = { -- .gpio_base = PB44_GPIO_EXP_BASE, --}; -- --static struct i2c_board_info pb44_i2c_board_info[] __initdata = { -- { -- I2C_BOARD_INFO("pcf8575", 0x20), -- .platform_data = &pb44_pcf857x_data, -- }, --}; -- --static struct gpio_led pb44_leds_gpio[] __initdata = { -- { -- .name = "pb44:amber:jump1", -- .gpio = PB44_GPIO_LED_JUMP1, -- .active_low = 1, -- }, { -- .name = "pb44:green:jump2", -- .gpio = PB44_GPIO_LED_JUMP2, -- .active_low = 1, -- }, --}; -- --static struct gpio_keys_button pb44_gpio_keys[] __initdata = { -- { -- .desc = "soft_reset", -- .type = EV_KEY, -- .code = KEY_RESTART, -- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL, -- .gpio = PB44_GPIO_SW_RESET, -- .active_low = 1, -- } , { -- .desc = "jumpstart", -- .type = EV_KEY, -- .code = KEY_WPS_BUTTON, -- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL, -- .gpio = PB44_GPIO_SW_JUMP, -- .active_low = 1, -- } --}; -- --static struct spi_board_info pb44_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "m25p64", -- }, --}; -- --static struct ath79_spi_platform_data pb44_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --static void __init pb44_init(void) --{ -- gpiod_add_lookup_table(&pb44_i2c_gpiod_table); -- i2c_register_board_info(0, pb44_i2c_board_info, -- ARRAY_SIZE(pb44_i2c_board_info)); -- platform_device_register(&pb44_i2c_gpio_device); -- -- ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio), -- pb44_leds_gpio); -- ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(pb44_gpio_keys), -- pb44_gpio_keys); -- ath79_register_spi(&pb44_spi_data, pb44_spi_info, -- ARRAY_SIZE(pb44_spi_info)); -- ath79_register_usb(); -- ath79_register_pci(); --} -- --MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", -- pb44_init); ---- a/arch/mips/ath79/mach-ubnt-xm.c -+++ /dev/null -@@ -1,126 +0,0 @@ --/* -- * Ubiquiti Networks XM (rev 1.0) board support -- * -- * Copyright (C) 2011 René Bolldorf -- * -- * Derived from: mach-pb44.c -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include -- --#include -- --#include "machtypes.h" --#include "dev-gpio-buttons.h" --#include "dev-leds-gpio.h" --#include "dev-spi.h" --#include "pci.h" -- --#define UBNT_XM_GPIO_LED_L1 0 --#define UBNT_XM_GPIO_LED_L2 1 --#define UBNT_XM_GPIO_LED_L3 11 --#define UBNT_XM_GPIO_LED_L4 7 -- --#define UBNT_XM_GPIO_BTN_RESET 12 -- --#define UBNT_XM_KEYS_POLL_INTERVAL 20 --#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) -- --#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) -- --static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { -- { -- .name = "ubnt-xm:red:link1", -- .gpio = UBNT_XM_GPIO_LED_L1, -- .active_low = 0, -- }, { -- .name = "ubnt-xm:orange:link2", -- .gpio = UBNT_XM_GPIO_LED_L2, -- .active_low = 0, -- }, { -- .name = "ubnt-xm:green:link3", -- .gpio = UBNT_XM_GPIO_LED_L3, -- .active_low = 0, -- }, { -- .name = "ubnt-xm:green:link4", -- .gpio = UBNT_XM_GPIO_LED_L4, -- .active_low = 0, -- }, --}; -- --static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = { -- { -- .desc = "reset", -- .type = EV_KEY, -- .code = KEY_RESTART, -- .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -- .gpio = UBNT_XM_GPIO_BTN_RESET, -- .active_low = 1, -- } --}; -- --static struct spi_board_info ubnt_xm_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -- } --}; -- --static struct ath79_spi_platform_data ubnt_xm_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- --#ifdef CONFIG_PCI --static struct ath9k_platform_data ubnt_xm_eeprom_data; -- --static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) --{ -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &ubnt_xm_eeprom_data; -- break; -- } -- -- return 0; --} -- --static void __init ubnt_xm_pci_init(void) --{ -- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, -- sizeof(ubnt_xm_eeprom_data.eeprom_data)); -- -- ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void ubnt_xm_pci_init(void) {} --#endif /* CONFIG_PCI */ -- --static void __init ubnt_xm_init(void) --{ -- ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), -- ubnt_xm_leds_gpio); -- -- ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(ubnt_xm_gpio_keys), -- ubnt_xm_gpio_keys); -- -- ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, -- ARRAY_SIZE(ubnt_xm_spi_info)); -- -- ubnt_xm_pci_init(); --} -- --MIPS_MACHINE(ATH79_MACH_UBNT_XM, -- "UBNT-XM", -- "Ubiquiti Networks XM (rev 1.0) board", -- ubnt_xm_init); ---- a/arch/mips/ath79/machtypes.h -+++ /dev/null -@@ -1,28 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X machine type definitions -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_MACHTYPE_H --#define _ATH79_MACHTYPE_H -- --#include -- --enum ath79_mach_type { -- ATH79_MACH_GENERIC_OF = -1, /* Device tree board */ -- ATH79_MACH_GENERIC = 0, -- ATH79_MACH_AP121, /* Atheros AP121 reference board */ -- ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */ -- ATH79_MACH_AP81, /* Atheros AP81 reference board */ -- ATH79_MACH_DB120, /* Atheros DB120 reference board */ -- ATH79_MACH_PB44, /* Atheros PB44 reference board */ -- ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ --}; -- --#endif /* _ATH79_MACHTYPE_H */ ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -33,7 +33,6 @@ - #include - #include "common.h" - #include "dev-common.h" --#include "machtypes.h" - - #define ATH79_SYS_TYPE_LEN 64 - -@@ -230,25 +229,21 @@ void __init plat_mem_setup(void) - else if (fw_passed_dtb) - __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb)); - -- if (mips_machtype != ATH79_MACH_GENERIC_OF) { -- ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, -- AR71XX_RESET_SIZE); -- ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE, -- AR71XX_PLL_SIZE); -- ath79_detect_sys_type(); -- ath79_ddr_ctrl_init(); -+ ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, -+ AR71XX_RESET_SIZE); -+ ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE, -+ AR71XX_PLL_SIZE); -+ ath79_detect_sys_type(); -+ ath79_ddr_ctrl_init(); - -- detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX); -- -- /* OF machines should use the reset driver */ -- _machine_restart = ath79_restart; -- } -+ detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX); - -+ _machine_restart = ath79_restart; - _machine_halt = ath79_halt; - pm_power_off = ath79_halt; - } - --static void __init ath79_of_plat_time_init(void) -+void __init plat_time_init(void) - { - struct device_node *np; - struct clk *clk; -@@ -278,66 +273,12 @@ static void __init ath79_of_plat_time_in - clk_put(clk); - } - --void __init plat_time_init(void) --{ -- unsigned long cpu_clk_rate; -- unsigned long ahb_clk_rate; -- unsigned long ddr_clk_rate; -- unsigned long ref_clk_rate; -- -- if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) { -- ath79_of_plat_time_init(); -- return; -- } -- -- ath79_clocks_init(); -- -- cpu_clk_rate = ath79_get_sys_clk_rate("cpu"); -- ahb_clk_rate = ath79_get_sys_clk_rate("ahb"); -- ddr_clk_rate = ath79_get_sys_clk_rate("ddr"); -- ref_clk_rate = ath79_get_sys_clk_rate("ref"); -- -- pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n", -- cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000, -- ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000, -- ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000, -- ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000); -- -- mips_hpt_frequency = cpu_clk_rate / 2; --} -- - void __init arch_init_irq(void) - { - irqchip_init(); - } - --static int __init ath79_setup(void) --{ -- if (mips_machtype == ATH79_MACH_GENERIC_OF) -- return 0; -- -- ath79_gpio_init(); -- ath79_register_uart(); -- ath79_register_wdt(); -- -- mips_machine_setup(); -- -- return 0; --} -- --arch_initcall(ath79_setup); -- - void __init device_tree_init(void) - { - unflatten_and_copy_device_tree(); - } -- --MIPS_MACHINE(ATH79_MACH_GENERIC, -- "Generic", -- "Generic AR71XX/AR724X/AR913X based board", -- NULL); -- --MIPS_MACHINE(ATH79_MACH_GENERIC_OF, -- "DTB", -- "Generic AR71XX/AR724X/AR913X based board (DT)", -- NULL); diff --git a/target/linux/ath79/patches-4.19/0029-MIPS-ath79-drop-legacy-pci-code.patch b/target/linux/ath79/patches-4.19/0029-MIPS-ath79-drop-legacy-pci-code.patch deleted file mode 100644 index 254f2f9253..0000000000 --- a/target/linux/ath79/patches-4.19/0029-MIPS-ath79-drop-legacy-pci-code.patch +++ /dev/null @@ -1,379 +0,0 @@ -From d0f1420702ed47a82572aaf39e7407055518d14e Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:05:19 +0200 -Subject: [PATCH 29/33] MIPS: ath79: drop legacy pci code - -With the target now being fully OF based, we can drop the legacy pci -platform code. The only bits that we need to keep is the fixup code -which we move to its own code file. - -Signed-off-by: John Crispin ---- - arch/mips/ath79/Makefile | 1 - - arch/mips/ath79/pci.c | 273 -------------------------------------------- - arch/mips/ath79/pci.h | 35 ------ - arch/mips/pci/Makefile | 1 + - arch/mips/pci/fixup-ath79.c | 21 ++++ - 5 files changed, 22 insertions(+), 309 deletions(-) - delete mode 100644 arch/mips/ath79/pci.c - delete mode 100644 arch/mips/ath79/pci.h - create mode 100644 arch/mips/pci/fixup-ath79.c - ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -11,7 +11,6 @@ - obj-y := prom.o setup.o common.o clock.o - - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o --obj-$(CONFIG_PCI) += pci.o - - # - # Devices ---- a/arch/mips/ath79/pci.c -+++ /dev/null -@@ -1,273 +0,0 @@ --/* -- * Atheros AR71XX/AR724X specific PCI setup code -- * -- * Copyright (C) 2011 René Bolldorf -- * Copyright (C) 2008-2011 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * Parts of this file are based on Atheros' 2.6.15 BSP -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include "pci.h" -- --static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev); --static const struct ath79_pci_irq *ath79_pci_irq_map; --static unsigned ath79_pci_nr_irqs; -- --static const struct ath79_pci_irq ar71xx_pci_irq_map[] = { -- { -- .slot = 17, -- .pin = 1, -- .irq = ATH79_PCI_IRQ(0), -- }, { -- .slot = 18, -- .pin = 1, -- .irq = ATH79_PCI_IRQ(1), -- }, { -- .slot = 19, -- .pin = 1, -- .irq = ATH79_PCI_IRQ(2), -- } --}; -- --static const struct ath79_pci_irq ar724x_pci_irq_map[] = { -- { -- .slot = 0, -- .pin = 1, -- .irq = ATH79_PCI_IRQ(0), -- } --}; -- --static const struct ath79_pci_irq qca955x_pci_irq_map[] = { -- { -- .bus = 0, -- .slot = 0, -- .pin = 1, -- .irq = ATH79_PCI_IRQ(0), -- }, -- { -- .bus = 1, -- .slot = 0, -- .pin = 1, -- .irq = ATH79_PCI_IRQ(1), -- }, --}; -- --int pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) --{ -- int irq = -1; -- int i; -- -- if (ath79_pci_nr_irqs == 0 || -- ath79_pci_irq_map == NULL) { -- if (soc_is_ar71xx()) { -- ath79_pci_irq_map = ar71xx_pci_irq_map; -- ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map); -- } else if (soc_is_ar724x() || -- soc_is_ar9342() || -- soc_is_ar9344()) { -- ath79_pci_irq_map = ar724x_pci_irq_map; -- ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); -- } else if (soc_is_qca955x()) { -- ath79_pci_irq_map = qca955x_pci_irq_map; -- ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); -- } else { -- pr_crit("pci %s: invalid irq map\n", -- pci_name((struct pci_dev *) dev)); -- return irq; -- } -- } -- -- for (i = 0; i < ath79_pci_nr_irqs; i++) { -- const struct ath79_pci_irq *entry; -- -- entry = &ath79_pci_irq_map[i]; -- if (entry->bus == dev->bus->number && -- entry->slot == slot && -- entry->pin == pin) { -- irq = entry->irq; -- break; -- } -- } -- -- if (irq < 0) -- pr_crit("pci %s: no irq found for pin %u\n", -- pci_name((struct pci_dev *) dev), pin); -- else -- pr_info("pci %s: using irq %d for pin %u\n", -- pci_name((struct pci_dev *) dev), irq, pin); -- -- return irq; --} -- --int pcibios_plat_dev_init(struct pci_dev *dev) --{ -- if (ath79_pci_plat_dev_init) -- return ath79_pci_plat_dev_init(dev); -- -- return 0; --} -- --void __init ath79_pci_set_irq_map(unsigned nr_irqs, -- const struct ath79_pci_irq *map) --{ -- ath79_pci_nr_irqs = nr_irqs; -- ath79_pci_irq_map = map; --} -- --void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)) --{ -- ath79_pci_plat_dev_init = func; --} -- --static struct platform_device * --ath79_register_pci_ar71xx(void) --{ -- struct platform_device *pdev; -- struct resource res[4]; -- -- memset(res, 0, sizeof(res)); -- -- res[0].name = "cfg_base"; -- res[0].flags = IORESOURCE_MEM; -- res[0].start = AR71XX_PCI_CFG_BASE; -- res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1; -- -- res[1].flags = IORESOURCE_IRQ; -- res[1].start = ATH79_CPU_IRQ(2); -- res[1].end = ATH79_CPU_IRQ(2); -- -- res[2].name = "io_base"; -- res[2].flags = IORESOURCE_IO; -- res[2].start = 0; -- res[2].end = 0; -- -- res[3].name = "mem_base"; -- res[3].flags = IORESOURCE_MEM; -- res[3].start = AR71XX_PCI_MEM_BASE; -- res[3].end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1; -- -- pdev = platform_device_register_simple("ar71xx-pci", -1, -- res, ARRAY_SIZE(res)); -- return pdev; --} -- --static struct platform_device * --ath79_register_pci_ar724x(int id, -- unsigned long cfg_base, -- unsigned long ctrl_base, -- unsigned long crp_base, -- unsigned long mem_base, -- unsigned long mem_size, -- unsigned long io_base, -- int irq) --{ -- struct platform_device *pdev; -- struct resource res[6]; -- -- memset(res, 0, sizeof(res)); -- -- res[0].name = "cfg_base"; -- res[0].flags = IORESOURCE_MEM; -- res[0].start = cfg_base; -- res[0].end = cfg_base + AR724X_PCI_CFG_SIZE - 1; -- -- res[1].name = "ctrl_base"; -- res[1].flags = IORESOURCE_MEM; -- res[1].start = ctrl_base; -- res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1; -- -- res[2].flags = IORESOURCE_IRQ; -- res[2].start = irq; -- res[2].end = irq; -- -- res[3].name = "mem_base"; -- res[3].flags = IORESOURCE_MEM; -- res[3].start = mem_base; -- res[3].end = mem_base + mem_size - 1; -- -- res[4].name = "io_base"; -- res[4].flags = IORESOURCE_IO; -- res[4].start = io_base; -- res[4].end = io_base; -- -- res[5].name = "crp_base"; -- res[5].flags = IORESOURCE_MEM; -- res[5].start = crp_base; -- res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1; -- -- pdev = platform_device_register_simple("ar724x-pci", id, -- res, ARRAY_SIZE(res)); -- return pdev; --} -- --int __init ath79_register_pci(void) --{ -- struct platform_device *pdev = NULL; -- -- if (soc_is_ar71xx()) { -- pdev = ath79_register_pci_ar71xx(); -- } else if (soc_is_ar724x()) { -- pdev = ath79_register_pci_ar724x(-1, -- AR724X_PCI_CFG_BASE, -- AR724X_PCI_CTRL_BASE, -- AR724X_PCI_CRP_BASE, -- AR724X_PCI_MEM_BASE, -- AR724X_PCI_MEM_SIZE, -- 0, -- ATH79_CPU_IRQ(2)); -- } else if (soc_is_ar9342() || -- soc_is_ar9344()) { -- u32 bootstrap; -- -- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -- if ((bootstrap & AR934X_BOOTSTRAP_PCIE_RC) == 0) -- return -ENODEV; -- -- pdev = ath79_register_pci_ar724x(-1, -- AR724X_PCI_CFG_BASE, -- AR724X_PCI_CTRL_BASE, -- AR724X_PCI_CRP_BASE, -- AR724X_PCI_MEM_BASE, -- AR724X_PCI_MEM_SIZE, -- 0, -- ATH79_IP2_IRQ(0)); -- } else if (soc_is_qca9558()) { -- pdev = ath79_register_pci_ar724x(0, -- QCA955X_PCI_CFG_BASE0, -- QCA955X_PCI_CTRL_BASE0, -- QCA955X_PCI_CRP_BASE0, -- QCA955X_PCI_MEM_BASE0, -- QCA955X_PCI_MEM_SIZE, -- 0, -- ATH79_IP2_IRQ(0)); -- -- pdev = ath79_register_pci_ar724x(1, -- QCA955X_PCI_CFG_BASE1, -- QCA955X_PCI_CTRL_BASE1, -- QCA955X_PCI_CRP_BASE1, -- QCA955X_PCI_MEM_BASE1, -- QCA955X_PCI_MEM_SIZE, -- 1, -- ATH79_IP3_IRQ(2)); -- } else { -- /* No PCI support */ -- return -ENODEV; -- } -- -- if (!pdev) -- pr_err("unable to register PCI controller device\n"); -- -- return pdev ? 0 : -ENODEV; --} ---- a/arch/mips/ath79/pci.h -+++ /dev/null -@@ -1,35 +0,0 @@ --/* -- * Atheros AR71XX/AR724X PCI support -- * -- * Copyright (C) 2011 René Bolldorf -- * Copyright (C) 2008-2011 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_PCI_H --#define _ATH79_PCI_H -- --struct ath79_pci_irq { -- int bus; -- u8 slot; -- u8 pin; -- int irq; --}; -- --#ifdef CONFIG_PCI --void ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map); --void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)); --int ath79_register_pci(void); --#else --static inline void --ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map) {} --static inline void --ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *)) {} --static inline int ath79_register_pci(void) { return 0; } --#endif -- --#endif /* _ATH79_PCI_H */ ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -29,6 +29,7 @@ obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-vir - # - # These are still pretty much in the old state, watch, go blind. - # -+obj-$(CONFIG_ATH79) += fixup-ath79.o - obj-$(CONFIG_LASAT) += pci-lasat.o - obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o - obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o ---- /dev/null -+++ b/arch/mips/pci/fixup-ath79.c -@@ -0,0 +1,21 @@ -+/* -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+//#include -+#include -+ -+int pcibios_plat_dev_init(struct pci_dev *dev) -+{ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ return of_irq_parse_and_map_pci(dev, slot, pin); -+} diff --git a/target/linux/ath79/patches-4.19/0030-MIPS-ath79-drop-platform-device-registration-code.patch b/target/linux/ath79/patches-4.19/0030-MIPS-ath79-drop-platform-device-registration-code.patch deleted file mode 100644 index 93a133c1df..0000000000 --- a/target/linux/ath79/patches-4.19/0030-MIPS-ath79-drop-platform-device-registration-code.patch +++ /dev/null @@ -1,933 +0,0 @@ -From dce930fba8ad3a90ccd164f199e57c2d61937ccd Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:12:38 +0200 -Subject: [PATCH 30/33] MIPS: ath79: drop platform device registration code - -With the target now being fully OF based, we can drop the legacy platform -device registration code. All devices and their drivers are now probed -via OF. - -Signed-off-by: John Crispin ---- - arch/mips/ath79/Makefile | 10 -- - arch/mips/ath79/common.h | 2 - - arch/mips/ath79/dev-common.c | 159 ------------------------ - arch/mips/ath79/dev-common.h | 18 --- - arch/mips/ath79/dev-gpio-buttons.c | 56 --------- - arch/mips/ath79/dev-gpio-buttons.h | 23 ---- - arch/mips/ath79/dev-leds-gpio.c | 54 --------- - arch/mips/ath79/dev-leds-gpio.h | 21 ---- - arch/mips/ath79/dev-spi.c | 38 ------ - arch/mips/ath79/dev-spi.h | 22 ---- - arch/mips/ath79/dev-usb.c | 242 ------------------------------------- - arch/mips/ath79/dev-usb.h | 17 --- - arch/mips/ath79/dev-wmac.c | 155 ------------------------ - arch/mips/ath79/dev-wmac.h | 17 --- - arch/mips/ath79/setup.c | 1 - - 15 files changed, 835 deletions(-) - delete mode 100644 arch/mips/ath79/dev-common.c - delete mode 100644 arch/mips/ath79/dev-common.h - delete mode 100644 arch/mips/ath79/dev-gpio-buttons.c - delete mode 100644 arch/mips/ath79/dev-gpio-buttons.h - delete mode 100644 arch/mips/ath79/dev-leds-gpio.c - delete mode 100644 arch/mips/ath79/dev-leds-gpio.h - delete mode 100644 arch/mips/ath79/dev-spi.c - delete mode 100644 arch/mips/ath79/dev-spi.h - delete mode 100644 arch/mips/ath79/dev-usb.c - delete mode 100644 arch/mips/ath79/dev-usb.h - delete mode 100644 arch/mips/ath79/dev-wmac.c - delete mode 100644 arch/mips/ath79/dev-wmac.h - ---- a/arch/mips/ath79/Makefile -+++ b/arch/mips/ath79/Makefile -@@ -11,13 +11,3 @@ - obj-y := prom.o setup.o common.o clock.o - - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o -- --# --# Devices --# --obj-y += dev-common.o --obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o --obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o --obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o --obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o --obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -24,6 +24,4 @@ unsigned long ath79_get_sys_clk_rate(con - - void ath79_ddr_ctrl_init(void); - --void ath79_gpio_init(void); -- - #endif /* __ATH79_COMMON_H */ ---- a/arch/mips/ath79/dev-common.c -+++ /dev/null -@@ -1,159 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X common devices -- * -- * Copyright (C) 2008-2011 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * Parts of this file are based on Atheros' 2.6.15 BSP -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include --#include --#include --#include --#include -- --#include --#include --#include "common.h" --#include "dev-common.h" -- --static struct resource ath79_uart_resources[] = { -- { -- .start = AR71XX_UART_BASE, -- .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1, -- .flags = IORESOURCE_MEM, -- }, --}; -- --#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP) --static struct plat_serial8250_port ath79_uart_data[] = { -- { -- .mapbase = AR71XX_UART_BASE, -- .irq = ATH79_MISC_IRQ(3), -- .flags = AR71XX_UART_FLAGS, -- .iotype = UPIO_MEM32, -- .regshift = 2, -- }, { -- /* terminating entry */ -- } --}; -- --static struct platform_device ath79_uart_device = { -- .name = "serial8250", -- .id = PLAT8250_DEV_PLATFORM, -- .resource = ath79_uart_resources, -- .num_resources = ARRAY_SIZE(ath79_uart_resources), -- .dev = { -- .platform_data = ath79_uart_data -- }, --}; -- --static struct resource ar933x_uart_resources[] = { -- { -- .start = AR933X_UART_BASE, -- .end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1, -- .flags = IORESOURCE_MEM, -- }, -- { -- .start = ATH79_MISC_IRQ(3), -- .end = ATH79_MISC_IRQ(3), -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device ar933x_uart_device = { -- .name = "ar933x-uart", -- .id = -1, -- .resource = ar933x_uart_resources, -- .num_resources = ARRAY_SIZE(ar933x_uart_resources), --}; -- --void __init ath79_register_uart(void) --{ -- unsigned long uart_clk_rate; -- -- uart_clk_rate = ath79_get_sys_clk_rate("uart"); -- -- if (soc_is_ar71xx() || -- soc_is_ar724x() || -- soc_is_ar913x() || -- soc_is_ar934x() || -- soc_is_qca955x()) { -- ath79_uart_data[0].uartclk = uart_clk_rate; -- platform_device_register(&ath79_uart_device); -- } else if (soc_is_ar933x()) { -- platform_device_register(&ar933x_uart_device); -- } else { -- BUG(); -- } --} -- --void __init ath79_register_wdt(void) --{ -- struct resource res; -- -- memset(&res, 0, sizeof(res)); -- -- res.flags = IORESOURCE_MEM; -- res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL; -- res.end = res.start + 0x8 - 1; -- -- platform_device_register_simple("ath79-wdt", -1, &res, 1); --} -- --static struct ath79_gpio_platform_data ath79_gpio_pdata; -- --static struct resource ath79_gpio_resources[] = { -- { -- .flags = IORESOURCE_MEM, -- .start = AR71XX_GPIO_BASE, -- .end = AR71XX_GPIO_BASE + AR71XX_GPIO_SIZE - 1, -- }, -- { -- .start = ATH79_MISC_IRQ(2), -- .end = ATH79_MISC_IRQ(2), -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device ath79_gpio_device = { -- .name = "ath79-gpio", -- .id = -1, -- .resource = ath79_gpio_resources, -- .num_resources = ARRAY_SIZE(ath79_gpio_resources), -- .dev = { -- .platform_data = &ath79_gpio_pdata -- }, --}; -- --void __init ath79_gpio_init(void) --{ -- if (soc_is_ar71xx()) { -- ath79_gpio_pdata.ngpios = AR71XX_GPIO_COUNT; -- } else if (soc_is_ar7240()) { -- ath79_gpio_pdata.ngpios = AR7240_GPIO_COUNT; -- } else if (soc_is_ar7241() || soc_is_ar7242()) { -- ath79_gpio_pdata.ngpios = AR7241_GPIO_COUNT; -- } else if (soc_is_ar913x()) { -- ath79_gpio_pdata.ngpios = AR913X_GPIO_COUNT; -- } else if (soc_is_ar933x()) { -- ath79_gpio_pdata.ngpios = AR933X_GPIO_COUNT; -- } else if (soc_is_ar934x()) { -- ath79_gpio_pdata.ngpios = AR934X_GPIO_COUNT; -- ath79_gpio_pdata.oe_inverted = 1; -- } else if (soc_is_qca955x()) { -- ath79_gpio_pdata.ngpios = QCA955X_GPIO_COUNT; -- ath79_gpio_pdata.oe_inverted = 1; -- } else { -- BUG(); -- } -- -- platform_device_register(&ath79_gpio_device); --} ---- a/arch/mips/ath79/dev-common.h -+++ /dev/null -@@ -1,18 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X common devices -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_DEV_COMMON_H --#define _ATH79_DEV_COMMON_H -- --void ath79_register_uart(void); --void ath79_register_wdt(void); -- --#endif /* _ATH79_DEV_COMMON_H */ ---- a/arch/mips/ath79/dev-gpio-buttons.c -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X GPIO button support -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include "linux/init.h" --#include "linux/slab.h" --#include -- --#include "dev-gpio-buttons.h" -- --void __init ath79_register_gpio_keys_polled(int id, -- unsigned poll_interval, -- unsigned nbuttons, -- struct gpio_keys_button *buttons) --{ -- struct platform_device *pdev; -- struct gpio_keys_platform_data pdata; -- struct gpio_keys_button *p; -- int err; -- -- p = kmemdup(buttons, nbuttons * sizeof(*p), GFP_KERNEL); -- if (!p) -- return; -- -- pdev = platform_device_alloc("gpio-keys-polled", id); -- if (!pdev) -- goto err_free_buttons; -- -- memset(&pdata, 0, sizeof(pdata)); -- pdata.poll_interval = poll_interval; -- pdata.nbuttons = nbuttons; -- pdata.buttons = p; -- -- err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); -- if (err) -- goto err_put_pdev; -- -- err = platform_device_add(pdev); -- if (err) -- goto err_put_pdev; -- -- return; -- --err_put_pdev: -- platform_device_put(pdev); -- --err_free_buttons: -- kfree(p); --} ---- a/arch/mips/ath79/dev-gpio-buttons.h -+++ /dev/null -@@ -1,23 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X GPIO button support -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_DEV_GPIO_BUTTONS_H --#define _ATH79_DEV_GPIO_BUTTONS_H -- --#include --#include -- --void ath79_register_gpio_keys_polled(int id, -- unsigned poll_interval, -- unsigned nbuttons, -- struct gpio_keys_button *buttons); -- --#endif /* _ATH79_DEV_GPIO_BUTTONS_H */ ---- a/arch/mips/ath79/dev-leds-gpio.c -+++ /dev/null -@@ -1,54 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X common GPIO LEDs support -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include -- --#include "dev-leds-gpio.h" -- --void __init ath79_register_leds_gpio(int id, -- unsigned num_leds, -- struct gpio_led *leds) --{ -- struct platform_device *pdev; -- struct gpio_led_platform_data pdata; -- struct gpio_led *p; -- int err; -- -- p = kmemdup(leds, num_leds * sizeof(*p), GFP_KERNEL); -- if (!p) -- return; -- -- pdev = platform_device_alloc("leds-gpio", id); -- if (!pdev) -- goto err_free_leds; -- -- memset(&pdata, 0, sizeof(pdata)); -- pdata.num_leds = num_leds; -- pdata.leds = p; -- -- err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); -- if (err) -- goto err_put_pdev; -- -- err = platform_device_add(pdev); -- if (err) -- goto err_put_pdev; -- -- return; -- --err_put_pdev: -- platform_device_put(pdev); -- --err_free_leds: -- kfree(p); --} ---- a/arch/mips/ath79/dev-leds-gpio.h -+++ /dev/null -@@ -1,21 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X common GPIO LEDs support -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_DEV_LEDS_GPIO_H --#define _ATH79_DEV_LEDS_GPIO_H -- --#include -- --void ath79_register_leds_gpio(int id, -- unsigned num_leds, -- struct gpio_led *leds); -- --#endif /* _ATH79_DEV_LEDS_GPIO_H */ ---- a/arch/mips/ath79/dev-spi.c -+++ /dev/null -@@ -1,38 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X SPI controller device -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include "dev-spi.h" -- --static struct resource ath79_spi_resources[] = { -- { -- .start = AR71XX_SPI_BASE, -- .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, -- .flags = IORESOURCE_MEM, -- }, --}; -- --static struct platform_device ath79_spi_device = { -- .name = "ath79-spi", -- .id = -1, -- .resource = ath79_spi_resources, -- .num_resources = ARRAY_SIZE(ath79_spi_resources), --}; -- --void __init ath79_register_spi(struct ath79_spi_platform_data *pdata, -- struct spi_board_info const *info, -- unsigned n) --{ -- spi_register_board_info(info, n); -- ath79_spi_device.dev.platform_data = pdata; -- platform_device_register(&ath79_spi_device); --} ---- a/arch/mips/ath79/dev-spi.h -+++ /dev/null -@@ -1,22 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X SPI controller device -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_DEV_SPI_H --#define _ATH79_DEV_SPI_H -- --#include --#include -- --void ath79_register_spi(struct ath79_spi_platform_data *pdata, -- struct spi_board_info const *info, -- unsigned n); -- --#endif /* _ATH79_DEV_SPI_H */ ---- a/arch/mips/ath79/dev-usb.c -+++ /dev/null -@@ -1,242 +0,0 @@ --/* -- * Atheros AR7XXX/AR9XXX USB Host Controller device -- * -- * Copyright (C) 2008-2011 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * Parts of this file are based on Atheros' 2.6.15 BSP -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include -- --#include --#include --#include "common.h" --#include "dev-usb.h" -- --static u64 ath79_usb_dmamask = DMA_BIT_MASK(32); -- --static struct usb_ohci_pdata ath79_ohci_pdata = { --}; -- --static struct usb_ehci_pdata ath79_ehci_pdata_v1 = { -- .has_synopsys_hc_bug = 1, --}; -- --static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { -- .caps_offset = 0x100, -- .has_tt = 1, --}; -- --static void __init ath79_usb_register(const char *name, int id, -- unsigned long base, unsigned long size, -- int irq, const void *data, -- size_t data_size) --{ -- struct resource res[2]; -- struct platform_device *pdev; -- -- memset(res, 0, sizeof(res)); -- -- res[0].flags = IORESOURCE_MEM; -- res[0].start = base; -- res[0].end = base + size - 1; -- -- res[1].flags = IORESOURCE_IRQ; -- res[1].start = irq; -- res[1].end = irq; -- -- pdev = platform_device_register_resndata(NULL, name, id, -- res, ARRAY_SIZE(res), -- data, data_size); -- -- if (IS_ERR(pdev)) { -- pr_err("ath79: unable to register USB at %08lx, err=%d\n", -- base, (int) PTR_ERR(pdev)); -- return; -- } -- -- pdev->dev.dma_mask = &ath79_usb_dmamask; -- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); --} -- --#define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \ -- AR71XX_RESET_USB_PHY | \ -- AR71XX_RESET_USB_OHCI_DLL) -- --static void __init ath79_usb_setup(void) --{ -- void __iomem *usb_ctrl_base; -- -- ath79_device_reset_set(AR71XX_USB_RESET_MASK); -- mdelay(1000); -- ath79_device_reset_clear(AR71XX_USB_RESET_MASK); -- -- usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); -- -- /* Turning on the Buff and Desc swap bits */ -- __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG); -- -- /* WAR for HW bug. Here it adjusts the duration between two SOFS */ -- __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); -- -- iounmap(usb_ctrl_base); -- -- mdelay(900); -- -- ath79_usb_register("ohci-platform", -1, -- AR71XX_OHCI_BASE, AR71XX_OHCI_SIZE, -- ATH79_MISC_IRQ(6), -- &ath79_ohci_pdata, sizeof(ath79_ohci_pdata)); -- -- ath79_usb_register("ehci-platform", -1, -- AR71XX_EHCI_BASE, AR71XX_EHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ehci_pdata_v1, sizeof(ath79_ehci_pdata_v1)); --} -- --static void __init ar7240_usb_setup(void) --{ -- void __iomem *usb_ctrl_base; -- -- ath79_device_reset_clear(AR7240_RESET_OHCI_DLL); -- ath79_device_reset_set(AR7240_RESET_USB_HOST); -- -- mdelay(1000); -- -- ath79_device_reset_set(AR7240_RESET_OHCI_DLL); -- ath79_device_reset_clear(AR7240_RESET_USB_HOST); -- -- usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE); -- -- /* WAR for HW bug. Here it adjusts the duration between two SOFS */ -- __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); -- -- iounmap(usb_ctrl_base); -- -- ath79_usb_register("ohci-platform", -1, -- AR7240_OHCI_BASE, AR7240_OHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ohci_pdata, sizeof(ath79_ohci_pdata)); --} -- --static void __init ar724x_usb_setup(void) --{ -- ath79_device_reset_set(AR724X_RESET_USBSUS_OVERRIDE); -- mdelay(10); -- -- ath79_device_reset_clear(AR724X_RESET_USB_HOST); -- mdelay(10); -- -- ath79_device_reset_clear(AR724X_RESET_USB_PHY); -- mdelay(10); -- -- ath79_usb_register("ehci-platform", -1, -- AR724X_EHCI_BASE, AR724X_EHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); --} -- --static void __init ar913x_usb_setup(void) --{ -- ath79_device_reset_set(AR913X_RESET_USBSUS_OVERRIDE); -- mdelay(10); -- -- ath79_device_reset_clear(AR913X_RESET_USB_HOST); -- mdelay(10); -- -- ath79_device_reset_clear(AR913X_RESET_USB_PHY); -- mdelay(10); -- -- ath79_usb_register("ehci-platform", -1, -- AR913X_EHCI_BASE, AR913X_EHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); --} -- --static void __init ar933x_usb_setup(void) --{ -- ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); -- mdelay(10); -- -- ath79_device_reset_clear(AR933X_RESET_USB_HOST); -- mdelay(10); -- -- ath79_device_reset_clear(AR933X_RESET_USB_PHY); -- mdelay(10); -- -- ath79_usb_register("ehci-platform", -1, -- AR933X_EHCI_BASE, AR933X_EHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); --} -- --static void __init ar934x_usb_setup(void) --{ -- u32 bootstrap; -- -- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) -- return; -- -- ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); -- udelay(1000); -- -- ath79_device_reset_clear(AR934X_RESET_USB_PHY); -- udelay(1000); -- -- ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); -- udelay(1000); -- -- ath79_device_reset_clear(AR934X_RESET_USB_HOST); -- udelay(1000); -- -- ath79_usb_register("ehci-platform", -1, -- AR934X_EHCI_BASE, AR934X_EHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); --} -- --static void __init qca955x_usb_setup(void) --{ -- ath79_usb_register("ehci-platform", 0, -- QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, -- ATH79_IP3_IRQ(0), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -- -- ath79_usb_register("ehci-platform", 1, -- QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE, -- ATH79_IP3_IRQ(1), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); --} -- --void __init ath79_register_usb(void) --{ -- if (soc_is_ar71xx()) -- ath79_usb_setup(); -- else if (soc_is_ar7240()) -- ar7240_usb_setup(); -- else if (soc_is_ar7241() || soc_is_ar7242()) -- ar724x_usb_setup(); -- else if (soc_is_ar913x()) -- ar913x_usb_setup(); -- else if (soc_is_ar933x()) -- ar933x_usb_setup(); -- else if (soc_is_ar934x()) -- ar934x_usb_setup(); -- else if (soc_is_qca955x()) -- qca955x_usb_setup(); -- else -- BUG(); --} ---- a/arch/mips/ath79/dev-usb.h -+++ /dev/null -@@ -1,17 +0,0 @@ --/* -- * Atheros AR71XX/AR724X/AR913X USB Host Controller support -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_DEV_USB_H --#define _ATH79_DEV_USB_H -- --void ath79_register_usb(void); -- --#endif /* _ATH79_DEV_USB_H */ ---- a/arch/mips/ath79/dev-wmac.c -+++ /dev/null -@@ -1,155 +0,0 @@ --/* -- * Atheros AR913X/AR933X SoC built-in WMAC device support -- * -- * Copyright (C) 2010-2011 Jaiganesh Narayanan -- * Copyright (C) 2008-2011 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#include --#include --#include --#include --#include -- --#include --#include --#include "dev-wmac.h" -- --static struct ath9k_platform_data ath79_wmac_data; -- --static struct resource ath79_wmac_resources[] = { -- { -- /* .start and .end fields are filled dynamically */ -- .flags = IORESOURCE_MEM, -- }, { -- /* .start and .end fields are filled dynamically */ -- .flags = IORESOURCE_IRQ, -- }, --}; -- --static struct platform_device ath79_wmac_device = { -- .name = "ath9k", -- .id = -1, -- .resource = ath79_wmac_resources, -- .num_resources = ARRAY_SIZE(ath79_wmac_resources), -- .dev = { -- .platform_data = &ath79_wmac_data, -- }, --}; -- --static void __init ar913x_wmac_setup(void) --{ -- /* reset the WMAC */ -- ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); -- mdelay(10); -- -- ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); -- mdelay(10); -- -- ath79_wmac_resources[0].start = AR913X_WMAC_BASE; -- ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; -- ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); -- ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); --} -- -- --static int ar933x_wmac_reset(void) --{ -- ath79_device_reset_set(AR933X_RESET_WMAC); -- ath79_device_reset_clear(AR933X_RESET_WMAC); -- -- return 0; --} -- --static int ar933x_r1_get_wmac_revision(void) --{ -- return ath79_soc_rev; --} -- --static void __init ar933x_wmac_setup(void) --{ -- u32 t; -- -- ar933x_wmac_reset(); -- -- ath79_wmac_device.name = "ar933x_wmac"; -- -- ath79_wmac_resources[0].start = AR933X_WMAC_BASE; -- ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1; -- ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); -- ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); -- -- t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -- if (t & AR933X_BOOTSTRAP_REF_CLK_40) -- ath79_wmac_data.is_clk_25mhz = false; -- else -- ath79_wmac_data.is_clk_25mhz = true; -- -- if (ath79_soc_rev == 1) -- ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision; -- -- ath79_wmac_data.external_reset = ar933x_wmac_reset; --} -- --static void ar934x_wmac_setup(void) --{ -- u32 t; -- -- ath79_wmac_device.name = "ar934x_wmac"; -- -- ath79_wmac_resources[0].start = AR934X_WMAC_BASE; -- ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1; -- ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -- ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); -- -- t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -- if (t & AR934X_BOOTSTRAP_REF_CLK_40) -- ath79_wmac_data.is_clk_25mhz = false; -- else -- ath79_wmac_data.is_clk_25mhz = true; --} -- --static void qca955x_wmac_setup(void) --{ -- u32 t; -- -- ath79_wmac_device.name = "qca955x_wmac"; -- -- ath79_wmac_resources[0].start = QCA955X_WMAC_BASE; -- ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1; -- ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -- ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); -- -- t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP); -- if (t & QCA955X_BOOTSTRAP_REF_CLK_40) -- ath79_wmac_data.is_clk_25mhz = false; -- else -- ath79_wmac_data.is_clk_25mhz = true; --} -- --void __init ath79_register_wmac(u8 *cal_data) --{ -- if (soc_is_ar913x()) -- ar913x_wmac_setup(); -- else if (soc_is_ar933x()) -- ar933x_wmac_setup(); -- else if (soc_is_ar934x()) -- ar934x_wmac_setup(); -- else if (soc_is_qca955x()) -- qca955x_wmac_setup(); -- else -- BUG(); -- -- if (cal_data) -- memcpy(ath79_wmac_data.eeprom_data, cal_data, -- sizeof(ath79_wmac_data.eeprom_data)); -- -- platform_device_register(&ath79_wmac_device); --} ---- a/arch/mips/ath79/dev-wmac.h -+++ /dev/null -@@ -1,17 +0,0 @@ --/* -- * Atheros AR913X/AR933X SoC built-in WMAC device support -- * -- * Copyright (C) 2008-2011 Gabor Juhos -- * Copyright (C) 2008 Imre Kaloz -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_DEV_WMAC_H --#define _ATH79_DEV_WMAC_H -- --void ath79_register_wmac(u8 *cal_data); -- --#endif /* _ATH79_DEV_WMAC_H */ ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -32,7 +32,6 @@ - #include - #include - #include "common.h" --#include "dev-common.h" - - #define ATH79_SYS_TYPE_LEN 64 - diff --git a/target/linux/ath79/patches-4.19/0031-MIPS-ath79-drop-OF-clock-code.patch b/target/linux/ath79/patches-4.19/0031-MIPS-ath79-drop-OF-clock-code.patch deleted file mode 100644 index a11be73d7a..0000000000 --- a/target/linux/ath79/patches-4.19/0031-MIPS-ath79-drop-OF-clock-code.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 00e4313da4609074fff134e61dd9ffe3fd37474d Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sun, 24 Jun 2018 09:39:41 +0200 -Subject: [PATCH 31/33] MIPS: ath79: drop !OF clock code - -With the target now being fully OF based, we can drop the legacy clock -registration code. All clocks are now probed via devicetree. - -Signed-off-by: John Crispin ---- - arch/mips/ath79/clock.c | 56 ------------------------------------------------ - arch/mips/ath79/common.h | 3 --- - 2 files changed, 59 deletions(-) - ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -617,60 +617,6 @@ static void __init qca956x_clocks_init(v - ath79_set_clk(ATH79_CLK_AHB, ahb_rate); - } - --void __init ath79_clocks_init(void) --{ -- const char *wdt; -- const char *uart; -- -- if (soc_is_ar71xx()) -- ar71xx_clocks_init(ath79_pll_base); -- else if (soc_is_ar724x() || soc_is_ar913x()) -- ar724x_clocks_init(ath79_pll_base); -- else if (soc_is_ar933x()) -- ar933x_clocks_init(ath79_pll_base); -- else if (soc_is_ar934x()) -- ar934x_clocks_init(ath79_pll_base); -- else if (soc_is_qca953x()) -- qca953x_clocks_init(ath79_pll_base); -- else if (soc_is_qca955x()) -- qca955x_clocks_init(ath79_pll_base); -- else if (soc_is_qca956x() || soc_is_tp9343()) -- qca956x_clocks_init(ath79_pll_base); -- else -- BUG(); -- -- if (soc_is_ar71xx() || soc_is_ar724x() || soc_is_ar913x()) { -- wdt = "ahb"; -- uart = "ahb"; -- } else if (soc_is_ar933x()) { -- wdt = "ahb"; -- uart = "ref"; -- } else { -- wdt = "ref"; -- uart = "ref"; -- } -- -- clk_add_alias("wdt", NULL, wdt, NULL); -- clk_add_alias("uart", NULL, uart, NULL); --} -- --unsigned long __init --ath79_get_sys_clk_rate(const char *id) --{ -- struct clk *clk; -- unsigned long rate; -- -- clk = clk_get(NULL, id); -- if (IS_ERR(clk)) -- panic("unable to get %s clock, err=%d", id, (int) PTR_ERR(clk)); -- -- rate = clk_get_rate(clk); -- clk_put(clk); -- -- return rate; --} -- --#ifdef CONFIG_OF - static void __init ath79_clocks_init_dt(struct device_node *np) - { - struct clk *ref_clk; -@@ -727,5 +673,3 @@ CLK_OF_DECLARE(ar9340_clk, "qca,ar9340-p - CLK_OF_DECLARE(ar9530_clk, "qca,qca9530-pll", ath79_clocks_init_dt); - CLK_OF_DECLARE(ar9550_clk, "qca,qca9550-pll", ath79_clocks_init_dt); - CLK_OF_DECLARE(ar9560_clk, "qca,qca9560-pll", ath79_clocks_init_dt); -- --#endif ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -19,9 +19,6 @@ - #define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024) - #define ATH79_MEM_SIZE_MAX (256 * 1024 * 1024) - --void ath79_clocks_init(void); --unsigned long ath79_get_sys_clk_rate(const char *id); -- - void ath79_ddr_ctrl_init(void); - - #endif /* __ATH79_COMMON_H */ diff --git a/target/linux/ath79/patches-4.19/0032-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-4.19/0032-MIPS-ath79-sanitize-symbols.patch deleted file mode 100644 index 1c38139323..0000000000 --- a/target/linux/ath79/patches-4.19/0032-MIPS-ath79-sanitize-symbols.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:16:55 +0200 -Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols - -We no longer need to select which SoCs are supported as the whole arch -code is always built. So lets drop all the SoC symbols - -Signed-off-by: John Crispin ---- - arch/mips/Kconfig | 2 ++ - arch/mips/ath79/Kconfig | 44 +++++--------------------------------------- - arch/mips/pci/Makefile | 2 +- - 3 files changed, 8 insertions(+), 40 deletions(-) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -208,6 +208,8 @@ config ATH79 - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_MIPS16 - select SYS_SUPPORTS_ZBOOT_UART_PROM -+ select HW_HAS_PCI -+ select USB_ARCH_HAS_EHCI - select USE_OF - select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM - help ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -1,48 +1,14 @@ - # SPDX-License-Identifier: GPL-2.0 - if ATH79 - --config SOC_AR71XX -- select HW_HAS_PCI -- def_bool n -- --config SOC_AR724X -- select HW_HAS_PCI -- select PCI_AR724X if PCI -- def_bool n -- --config SOC_AR913X -- def_bool n -- --config SOC_AR933X -- def_bool n -- --config SOC_AR934X -- select HW_HAS_PCI -- select PCI_AR724X if PCI -- def_bool n -- --config SOC_QCA955X -- select HW_HAS_PCI -- select PCI_AR724X if PCI -+config PCI_AR71XX -+ bool "PCI support for AR7100 type SoCs" -+ depends on PCI - def_bool n - - config PCI_AR724X -- def_bool n -- --config ATH79_DEV_GPIO_BUTTONS -- def_bool n -- --config ATH79_DEV_LEDS_GPIO -- def_bool n -- --config ATH79_DEV_SPI -- def_bool n -- --config ATH79_DEV_USB -- def_bool n -- --config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) -+ bool "PCI support for AR724x type SoCs" -+ depends on PCI - def_bool n - - endif ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -23,7 +23,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o - ops-bcm63xx.o - obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o - obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o --obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o -+obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o - obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o - obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-virtio-guest.o - # diff --git a/target/linux/ath79/patches-4.19/0033-spi-ath79-drop-pdata-support.patch b/target/linux/ath79/patches-4.19/0033-spi-ath79-drop-pdata-support.patch deleted file mode 100644 index aeb50c9b1c..0000000000 --- a/target/linux/ath79/patches-4.19/0033-spi-ath79-drop-pdata-support.patch +++ /dev/null @@ -1,73 +0,0 @@ -From c4e197bbcecc7233aa9e553e7047fa50e4e1fe77 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:34 +0200 -Subject: [PATCH 33/33] spi: ath79: drop pdata support - -The target is being converted to pure OF. We can therefore drop all of the -platform data code from the driver. - -Cc: linux-spi@vger.kernel.org -Acked-by: Mark Brown -Signed-off-by: John Crispin ---- - arch/mips/include/asm/mach-ath79/ath79_spi_platform.h | 19 ------------------- - drivers/spi/spi-ath79.c | 8 -------- - 2 files changed, 27 deletions(-) - delete mode 100644 arch/mips/include/asm/mach-ath79/ath79_spi_platform.h - ---- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -+++ /dev/null -@@ -1,19 +0,0 @@ --/* -- * Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- * -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef _ATH79_SPI_PLATFORM_H --#define _ATH79_SPI_PLATFORM_H -- --struct ath79_spi_platform_data { -- unsigned bus_num; -- unsigned num_chipselect; --}; -- --#endif /* _ATH79_SPI_PLATFORM_H */ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -26,7 +26,6 @@ - #include - - #include --#include - - #define DRV_NAME "ath79-spi" - -@@ -208,7 +207,6 @@ static int ath79_spi_probe(struct platfo - { - struct spi_master *master; - struct ath79_spi *sp; -- struct ath79_spi_platform_data *pdata; - struct resource *r; - unsigned long rate; - int ret; -@@ -223,15 +221,9 @@ static int ath79_spi_probe(struct platfo - master->dev.of_node = pdev->dev.of_node; - platform_set_drvdata(pdev, sp); - -- pdata = dev_get_platdata(&pdev->dev); -- - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->setup = ath79_spi_setup; - master->cleanup = ath79_spi_cleanup; -- if (pdata) { -- master->bus_num = pdata->bus_num; -- master->num_chipselect = pdata->num_chipselect; -- } - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ath79/patches-4.19/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-4.19/0034-MIPS-ath79-ath9k-exports.patch deleted file mode 100644 index 6eec142c74..0000000000 --- a/target/linux/ath79/patches-4.19/0034-MIPS-ath79-ath9k-exports.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -34,11 +34,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq); - - enum ath79_soc_type ath79_soc; - unsigned int ath79_soc_rev; -+EXPORT_SYMBOL_GPL(ath79_soc_rev); - - void __iomem *ath79_pll_base; - void __iomem *ath79_reset_base; - EXPORT_SYMBOL_GPL(ath79_reset_base); --static void __iomem *ath79_ddr_base; -+void __iomem *ath79_ddr_base; -+EXPORT_SYMBOL_GPL(ath79_ddr_base); - static void __iomem *ath79_ddr_wb_flush_base; - static void __iomem *ath79_ddr_pci_win_base; - ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -152,6 +152,7 @@ void ath79_ddr_wb_flush(unsigned int reg - void ath79_ddr_set_pci_windows(void); - - extern void __iomem *ath79_pll_base; -+extern void __iomem *ath79_ddr_base; - extern void __iomem *ath79_reset_base; - - static inline void ath79_pll_wr(unsigned reg, u32 val) diff --git a/target/linux/ath79/patches-4.19/0036-GPIO-add-named-gpio-exports.patch b/target/linux/ath79/patches-4.19/0036-GPIO-add-named-gpio-exports.patch deleted file mode 100644 index b3aa9fcc01..0000000000 --- a/target/linux/ath79/patches-4.19/0036-GPIO-add-named-gpio-exports.patch +++ /dev/null @@ -1,165 +0,0 @@ -From 4267880319bc1a2270d352e0ded6d6386242a7ef Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 12 Aug 2014 20:49:27 +0200 -Subject: [PATCH 24/53] GPIO: add named gpio exports - -Signed-off-by: John Crispin ---- - drivers/gpio/gpiolib-of.c | 68 +++++++++++++++++++++++++++++++++++++++++ - drivers/gpio/gpiolib-sysfs.c | 10 +++++- - include/asm-generic/gpio.h | 6 ++++ - include/linux/gpio/consumer.h | 8 +++++ - 4 files changed, 91 insertions(+), 1 deletion(-) - ---- a/drivers/gpio/gpiolib-of.c -+++ b/drivers/gpio/gpiolib-of.c -@@ -23,6 +23,8 @@ - #include - #include - #include -+#include -+#include - - #include "gpiolib.h" - -@@ -660,3 +662,68 @@ void of_gpiochip_remove(struct gpio_chip - gpiochip_remove_pin_ranges(chip); - of_node_put(chip->of_node); - } -+ -+static struct of_device_id gpio_export_ids[] = { -+ { .compatible = "gpio-export" }, -+ { /* sentinel */ } -+}; -+ -+static int of_gpio_export_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *cnp; -+ u32 val; -+ int nb = 0; -+ -+ for_each_child_of_node(np, cnp) { -+ const char *name = NULL; -+ int gpio; -+ bool dmc; -+ int max_gpio = 1; -+ int i; -+ -+ of_property_read_string(cnp, "gpio-export,name", &name); -+ -+ if (!name) -+ max_gpio = of_gpio_count(cnp); -+ -+ for (i = 0; i < max_gpio; i++) { -+ unsigned flags = 0; -+ enum of_gpio_flags of_flags; -+ -+ gpio = of_get_gpio_flags(cnp, i, &of_flags); -+ if (!gpio_is_valid(gpio)) -+ return gpio; -+ -+ if (of_flags == OF_GPIO_ACTIVE_LOW) -+ flags |= GPIOF_ACTIVE_LOW; -+ -+ if (!of_property_read_u32(cnp, "gpio-export,output", &val)) -+ flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; -+ else -+ flags |= GPIOF_IN; -+ -+ if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np))) -+ continue; -+ -+ dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change"); -+ gpio_export_with_name(gpio, dmc, name); -+ nb++; -+ } -+ } -+ -+ dev_info(&pdev->dev, "%d gpio(s) exported\n", nb); -+ -+ return 0; -+} -+ -+static struct platform_driver gpio_export_driver = { -+ .driver = { -+ .name = "gpio-export", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(gpio_export_ids), -+ }, -+ .probe = of_gpio_export_probe, -+}; -+ -+module_platform_driver(gpio_export_driver); ---- a/drivers/gpio/gpiolib-sysfs.c -+++ b/drivers/gpio/gpiolib-sysfs.c -@@ -568,7 +568,7 @@ static struct class gpio_class = { - * - * Returns zero on success, else an error. - */ --int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) - { - struct gpio_chip *chip; - struct gpio_device *gdev; -@@ -630,6 +630,8 @@ int gpiod_export(struct gpio_desc *desc, - offset = gpio_chip_hwgpio(desc); - if (chip->names && chip->names[offset]) - ioname = chip->names[offset]; -+ if (name) -+ ioname = name; - - dev = device_create_with_groups(&gpio_class, &gdev->dev, - MKDEV(0, 0), data, gpio_groups, -@@ -651,6 +653,12 @@ err_unlock: - gpiod_dbg(desc, "%s: status %d\n", __func__, status); - return status; - } -+EXPORT_SYMBOL_GPL(__gpiod_export); -+ -+int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+{ -+ return __gpiod_export(desc, direction_may_change, NULL); -+} - EXPORT_SYMBOL_GPL(gpiod_export); - - static int match_export(struct device *dev, const void *desc) ---- a/include/asm-generic/gpio.h -+++ b/include/asm-generic/gpio.h -@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g - return gpiod_export(gpio_to_desc(gpio), direction_may_change); - } - -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); -+static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name) -+{ -+ return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name); -+} -+ - static inline int gpio_export_link(struct device *dev, const char *name, - unsigned gpio) - { ---- a/include/linux/gpio/consumer.h -+++ b/include/linux/gpio/consumer.h -@@ -533,6 +533,7 @@ struct gpio_desc *devm_fwnode_get_gpiod_ - - #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) - -+int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); - int gpiod_export(struct gpio_desc *desc, bool direction_may_change); - int gpiod_export_link(struct device *dev, const char *name, - struct gpio_desc *desc); -@@ -540,6 +541,13 @@ void gpiod_unexport(struct gpio_desc *de - - #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ - -+static inline int _gpiod_export(struct gpio_desc *desc, -+ bool direction_may_change, -+ const char *name) -+{ -+ return -ENOSYS; -+} -+ - static inline int gpiod_export(struct gpio_desc *desc, - bool direction_may_change) - { diff --git a/target/linux/ath79/patches-4.19/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-4.19/0036-MIPS-ath79-remove-irq-code-from-pci.patch deleted file mode 100644 index 460c4580ee..0000000000 --- a/target/linux/ath79/patches-4.19/0036-MIPS-ath79-remove-irq-code-from-pci.patch +++ /dev/null @@ -1,139 +0,0 @@ ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -54,11 +54,9 @@ - struct ar71xx_pci_controller { - struct device_node *np; - void __iomem *cfg_base; -- int irq; - struct pci_controller pci_ctrl; - struct resource io_res; - struct resource mem_res; -- struct irq_domain *domain; - }; - - /* Byte lane enable bits */ -@@ -230,104 +228,6 @@ static struct pci_ops ar71xx_pci_ops = { - .write = ar71xx_pci_write_config, - }; - --static void ar71xx_pci_irq_handler(struct irq_desc *desc) --{ -- void __iomem *base = ath79_reset_base; -- struct irq_chip *chip = irq_desc_get_chip(desc); -- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); -- u32 pending; -- -- chained_irq_enter(chip, desc); -- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- if (pending & AR71XX_PCI_INT_DEV0) -- generic_handle_irq(irq_linear_revmap(apc->domain, 1)); -- -- else if (pending & AR71XX_PCI_INT_DEV1) -- generic_handle_irq(irq_linear_revmap(apc->domain, 2)); -- -- else if (pending & AR71XX_PCI_INT_DEV2) -- generic_handle_irq(irq_linear_revmap(apc->domain, 3)); -- -- else if (pending & AR71XX_PCI_INT_CORE) -- generic_handle_irq(irq_linear_revmap(apc->domain, 4)); -- -- else -- spurious_interrupt(); -- chained_irq_exit(chip, desc); --} -- --static void ar71xx_pci_irq_unmask(struct irq_data *d) --{ -- struct ar71xx_pci_controller *apc; -- unsigned int irq; -- void __iomem *base = ath79_reset_base; -- u32 t; -- -- apc = irq_data_get_irq_chip_data(d); -- irq = irq_linear_revmap(apc->domain, d->irq); -- -- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- /* flush write */ -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); --} -- --static void ar71xx_pci_irq_mask(struct irq_data *d) --{ -- struct ar71xx_pci_controller *apc; -- unsigned int irq; -- void __iomem *base = ath79_reset_base; -- u32 t; -- -- apc = irq_data_get_irq_chip_data(d); -- irq = irq_linear_revmap(apc->domain, d->irq); -- -- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- /* flush write */ -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); --} -- --static struct irq_chip ar71xx_pci_irq_chip = { -- .name = "AR71XX PCI", -- .irq_mask = ar71xx_pci_irq_mask, -- .irq_unmask = ar71xx_pci_irq_unmask, -- .irq_mask_ack = ar71xx_pci_irq_mask, --}; -- --static int ar71xx_pci_irq_map(struct irq_domain *d, -- unsigned int irq, irq_hw_number_t hw) --{ -- struct ar71xx_pci_controller *apc = d->host_data; -- -- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); -- irq_set_chip_data(irq, apc); -- -- return 0; --} -- --static const struct irq_domain_ops ar71xx_pci_domain_ops = { -- .xlate = irq_domain_xlate_onecell, -- .map = ar71xx_pci_irq_map, --}; -- --static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) --{ -- void __iomem *base = ath79_reset_base; -- -- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); -- -- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, -- &ar71xx_pci_domain_ops, apc); -- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, -- apc); --} -- - static void ar71xx_pci_reset(void) - { - ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); -@@ -361,10 +261,6 @@ static int ar71xx_pci_probe(struct platf - if (IS_ERR(apc->cfg_base)) - return PTR_ERR(apc->cfg_base); - -- apc->irq = platform_get_irq(pdev, 0); -- if (apc->irq < 0) -- return -EINVAL; -- - ar71xx_pci_reset(); - - /* setup COMMAND register */ -@@ -375,8 +271,6 @@ static int ar71xx_pci_probe(struct platf - /* clear bus errors */ - ar71xx_pci_check_error(apc, 1); - -- ar71xx_pci_irq_init(apc); -- - apc->np = pdev->dev.of_node; - apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; - apc->pci_ctrl.mem_resource = &apc->mem_res; diff --git a/target/linux/ath79/patches-4.19/0037-missing-registers.patch b/target/linux/ath79/patches-4.19/0037-missing-registers.patch deleted file mode 100644 index 9fde3d39df..0000000000 --- a/target/linux/ath79/patches-4.19/0037-missing-registers.patch +++ /dev/null @@ -1,21 +0,0 @@ -commit f3ffac90bc7266b7d917616f3233f58e8c08a196 -Author: Christian Lamparter -Date: Fri Aug 10 23:24:47 2018 +0200 - - ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344 - - Signed-off-by: Christian Lamparter - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1229,6 +1229,10 @@ - #define AR934X_ETH_CFG_RDV_DELAY BIT(16) - #define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 - #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 -+#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18 -+#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20 - - /* - * QCA953X GMAC Interface diff --git a/target/linux/ath79/patches-4.19/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch b/target/linux/ath79/patches-4.19/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch deleted file mode 100644 index dc0af2fe9c..0000000000 --- a/target/linux/ath79/patches-4.19/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 60efe35257b063ce584968f9f80b437030ce6ba6 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Mon, 18 Mar 2019 00:54:06 +0100 -Subject: [PATCH] MIPS: ath79: add missing QCA955x GMAC registers - -This adds missing GMAC register definitions for the Qualcomm Atheros -QCA955X series MIPS SoCs. - -They originate from the platforms U-Boot code and the AVM FRITZ!WLAN -Repeater 450E's GPL tarball. - -Signed-off-by: David Bauer ---- - .../mips/include/asm/mach-ath79/ar71xx_regs.h | 54 +++++++++++++++++++ - 1 file changed, 54 insertions(+) - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1249,7 +1249,12 @@ - */ - - #define QCA955X_GMAC_REG_ETH_CFG 0x00 -+#define QCA955X_GMAC_REG_SGMII_RESET 0x14 - #define QCA955X_GMAC_REG_SGMII_SERDES 0x18 -+#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c -+#define QCA955X_GMAC_REG_MR_AN_STATUS 0x20 -+#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34 -+#define QCA955X_GMAC_REG_SGMII_DEBUG 0x58 - - #define QCA955X_ETH_CFG_RGMII_EN BIT(0) - #define QCA955X_ETH_CFG_MII_GE0 BIT(1) -@@ -1271,9 +1276,58 @@ - #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 - #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 - -+#define QCA955X_SGMII_RESET_RX_CLK_N_RESET 0 -+#define QCA955X_SGMII_RESET_RX_CLK_N BIT(0) -+#define QCA955X_SGMII_RESET_TX_CLK_N BIT(1) -+#define QCA955X_SGMII_RESET_RX_125M_N BIT(2) -+#define QCA955X_SGMII_RESET_TX_125M_N BIT(3) -+#define QCA955X_SGMII_RESET_HW_RX_125M_N BIT(4) -+ - #define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) - #define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 - #define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf -+ -+#define QCA955X_MR_AN_CONTROL_SPEED_SEL1 BIT(6) -+#define QCA955X_MR_AN_CONTROL_DUPLEX_MODE BIT(8) -+#define QCA955X_MR_AN_CONTROL_RESTART_AN BIT(9) -+#define QCA955X_MR_AN_CONTROL_POWER_DOWN BIT(11) -+#define QCA955X_MR_AN_CONTROL_AN_ENABLE BIT(12) -+#define QCA955X_MR_AN_CONTROL_SPEED_SEL0 BIT(13) -+#define QCA955X_MR_AN_CONTROL_LOOPBACK BIT(14) -+#define QCA955X_MR_AN_CONTROL_PHY_RESET BIT(15) -+ -+#define QCA955X_MR_AN_STATUS_EXT_CAP BIT(0) -+#define QCA955X_MR_AN_STATUS_LINK_UP BIT(2) -+#define QCA955X_MR_AN_STATUS_AN_ABILITY BIT(3) -+#define QCA955X_MR_AN_STATUS_REMOTE_FAULT BIT(4) -+#define QCA955X_MR_AN_STATUS_AN_COMPLETE BIT(5) -+#define QCA955X_MR_AN_STATUS_NO_PREAMBLE BIT(6) -+#define QCA955X_MR_AN_STATUS_BASE_PAGE BIT(7) -+ -+#define QCA955X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 -+#define QCA955X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 -+#define QCA955X_SGMII_CONFIG_ENABLE_SGMII_TX_PAUSE BIT(3) -+#define QCA955X_SGMII_CONFIG_MR_REG4_CHANGED BIT(4) -+#define QCA955X_SGMII_CONFIG_FORCE_SPEED BIT(5) -+#define QCA955X_SGMII_CONFIG_SPEED_SHIFT 6 -+#define QCA955X_SGMII_CONFIG_SPEED_MASK 0xc0 -+#define QCA955X_SGMII_CONFIG_REMOTE_PHY_LOOPBACK BIT(8) -+#define QCA955X_SGMII_CONFIG_NEXT_PAGE_LOADED BIT(9) -+#define QCA955X_SGMII_CONFIG_MDIO_ENABLE BIT(10) -+#define QCA955X_SGMII_CONFIG_MDIO_PULSE BIT(11) -+#define QCA955X_SGMII_CONFIG_MDIO_COMPLETE BIT(12) -+#define QCA955X_SGMII_CONFIG_PRBS_ENABLE BIT(13) -+#define QCA955X_SGMII_CONFIG_BERT_ENABLE BIT(14) -+ -+#define QCA955X_SGMII_DEBUG_TX_STATE_MASK 0xff -+#define QCA955X_SGMII_DEBUG_TX_STATE_SHIFT 0 -+#define QCA955X_SGMII_DEBUG_RX_STATE_MASK 0xff00 -+#define QCA955X_SGMII_DEBUG_RX_STATE_SHIFT 8 -+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_MASK 0xff0000 -+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_SHIFT 16 -+#define QCA955X_SGMII_DEBUG_ARB_STATE_MASK 0xf000000 -+#define QCA955X_SGMII_DEBUG_ARB_STATE_SHIFT 24 -+ - /* - * QCA956X GMAC Interface - */ diff --git a/target/linux/ath79/patches-4.19/0038-at803x-disable-delays.patch b/target/linux/ath79/patches-4.19/0038-at803x-disable-delays.patch deleted file mode 100644 index c7a9b3cc78..0000000000 --- a/target/linux/ath79/patches-4.19/0038-at803x-disable-delays.patch +++ /dev/null @@ -1,27 +0,0 @@ -Until upstream commit 6d4cd041f0af("net: phy: at803x: disable delay -only for RGMII mode"), delays were not disabled on driver probe -for the Atheros AR803x PHYs, although the RX delay is enabled on -soft and hard reset. - -In addition, the TX delay setting is retained on soft-reset. - -This patch disables both delays on config init to align the behavior -with kernel 5.1 and higher. It can be safely dropped with kernel 5.1. - ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -279,6 +279,14 @@ static int at803x_config_init(struct phy - if (ret < 0) - return ret; - -+ /* Disable RX delay */ -+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, -+ AT803X_DEBUG_RX_CLK_DLY_EN, 0); -+ -+ /* Disable TX delay */ -+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, -+ AT803X_DEBUG_TX_CLK_DLY_EN, 0); -+ - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { - ret = at803x_enable_rx_delay(phydev); diff --git a/target/linux/ath79/patches-4.19/0039-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-4.19/0039-MIPS-ath79-export-UART1-reference-clock.patch deleted file mode 100644 index 8656fafe0e..0000000000 --- a/target/linux/ath79/patches-4.19/0039-MIPS-ath79-export-UART1-reference-clock.patch +++ /dev/null @@ -1,52 +0,0 @@ ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -42,6 +42,7 @@ static const char * const clk_names[ATH7 - [ATH79_CLK_AHB] = "ahb", - [ATH79_CLK_REF] = "ref", - [ATH79_CLK_MDIO] = "mdio", -+ [ATH79_CLK_UART1] = "uart1", - }; - - static const char * __init ath79_clk_name(int type) -@@ -346,6 +347,9 @@ static void __init ar934x_clocks_init(vo - if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) - ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); - -+ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL) -+ ath79_set_clk(ATH79_CLK_UART1, 100 * 1000 * 1000); -+ - iounmap(dpll_base); - } - -@@ -651,6 +655,9 @@ static void __init ath79_clocks_init_dt( - if (!clks[ATH79_CLK_MDIO]) - clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; - -+ if (!clks[ATH79_CLK_UART1]) -+ clks[ATH79_CLK_UART1] = clks[ATH79_CLK_REF]; -+ - if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { - pr_err("%pOF: could not register clk provider\n", np); - goto err_iounmap; ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -351,6 +351,7 @@ - #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - - #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL BIT(7) - - #define QCA953X_PLL_CPU_CONFIG_REG 0x00 - #define QCA953X_PLL_DDR_CONFIG_REG 0x04 ---- a/include/dt-bindings/clock/ath79-clk.h -+++ b/include/dt-bindings/clock/ath79-clk.h -@@ -15,7 +15,8 @@ - #define ATH79_CLK_AHB 2 - #define ATH79_CLK_REF 3 - #define ATH79_CLK_MDIO 4 -+#define ATH79_CLK_UART1 5 - --#define ATH79_CLK_END 5 -+#define ATH79_CLK_END 6 - - #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-4.19/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-4.19/004-register_gpio_driver_earlier.patch deleted file mode 100644 index 78899c45e3..0000000000 --- a/target/linux/ath79/patches-4.19/004-register_gpio_driver_earlier.patch +++ /dev/null @@ -1,18 +0,0 @@ -HACK: register the GPIO driver earlier to ensure that gpio_request calls -from mach files succeed. - ---- a/drivers/gpio/gpio-ath79.c -+++ b/drivers/gpio/gpio-ath79.c -@@ -325,7 +325,11 @@ static struct platform_driver ath79_gpio - .remove = ath79_gpio_remove, - }; - --module_platform_driver(ath79_gpio_driver); -+static int __init ath79_gpio_init(void) -+{ -+ return platform_driver_register(&ath79_gpio_driver); -+} -+postcore_initcall(ath79_gpio_init); - - MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); - MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ath79/patches-4.19/0050-v5.1-drivers-provide-devm_platform_ioremap_resource.patch b/target/linux/ath79/patches-4.19/0050-v5.1-drivers-provide-devm_platform_ioremap_resource.patch deleted file mode 100644 index 32c960f320..0000000000 --- a/target/linux/ath79/patches-4.19/0050-v5.1-drivers-provide-devm_platform_ioremap_resource.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 7945f929f1a77a1c8887a97ca07f87626858ff42 Mon Sep 17 00:00:00 2001 -From: Bartosz Golaszewski -Date: Wed, 20 Feb 2019 11:12:39 +0000 -Subject: [PATCH] drivers: provide devm_platform_ioremap_resource() - -There are currently 1200+ instances of using platform_get_resource() -and devm_ioremap_resource() together in the kernel tree. - -This patch wraps these two calls in a single helper. Thanks to that -we don't have to declare a local variable for struct resource * and can -omit the redundant argument for resource type. We also have one -function call less. - -Signed-off-by: Bartosz Golaszewski -Acked-by: Greg Kroah-Hartman -Reviewed-by: Andy Shevchenko -Signed-off-by: Linus Walleij ---- - drivers/base/platform.c | 18 ++++++++++++++++++ - include/linux/platform_device.h | 3 +++ - 2 files changed, 21 insertions(+) - ---- a/drivers/base/platform.c -+++ b/drivers/base/platform.c -@@ -81,6 +81,24 @@ struct resource *platform_get_resource(s - EXPORT_SYMBOL_GPL(platform_get_resource); - - /** -+ * devm_platform_ioremap_resource - call devm_ioremap_resource() for a platform -+ * device -+ * -+ * @pdev: platform device to use both for memory resource lookup as well as -+ * resource managemend -+ * @index: resource index -+ */ -+void __iomem *devm_platform_ioremap_resource(struct platform_device *pdev, -+ unsigned int index) -+{ -+ struct resource *res; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, index); -+ return devm_ioremap_resource(&pdev->dev, res); -+} -+EXPORT_SYMBOL_GPL(devm_platform_ioremap_resource); -+ -+/** - * platform_get_irq - get an IRQ for a device - * @dev: platform device - * @num: IRQ number index ---- a/include/linux/platform_device.h -+++ b/include/linux/platform_device.h -@@ -51,6 +51,9 @@ extern struct device platform_bus; - extern void arch_setup_pdev_archdata(struct platform_device *); - extern struct resource *platform_get_resource(struct platform_device *, - unsigned int, unsigned int); -+extern void __iomem * -+devm_platform_ioremap_resource(struct platform_device *pdev, -+ unsigned int index); - extern int platform_get_irq(struct platform_device *, unsigned int); - extern int platform_irq_count(struct platform_device *); - extern struct resource *platform_get_resource_byname(struct platform_device *, diff --git a/target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch b/target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch deleted file mode 100644 index 9feea723f3..0000000000 --- a/target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch +++ /dev/null @@ -1,283 +0,0 @@ -From 7e161c423a232ef7ddf6c11b09ebe471dd5a23cf Mon Sep 17 00:00:00 2001 -From: Chuanhong Guo -Date: Wed, 5 Feb 2020 18:25:37 +0800 -Subject: [PATCH v4 1/2] spi: add driver for ar934x spi controller - -This patch adds driver for SPI controller found in Qualcomm Atheros -AR934x/QCA95xx SoCs. -This controller is a superset of the already supported qca,ar7100-spi. -Besides the bit-bang mode in spi-ath79.c, this new controller added -a new "shift register" mode, allowing faster spi operations. - -Signed-off-by: Chuanhong Guo ---- - drivers/spi/Kconfig | 7 ++ - drivers/spi/Makefile | 1 + - drivers/spi/spi-ar934x.c | 235 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 243 insertions(+) - create mode 100644 drivers/spi/spi-ar934x.c - ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -61,6 +61,13 @@ config SPI_ALTERA - help - This is the driver for the Altera SPI Controller. - -+config SPI_AR934X -+ tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver" -+ depends on ATH79 || COMPILE_TEST -+ help -+ This enables support for the SPI controller present on the -+ Qualcomm Atheros AR934X/QCA95XX SoCs. -+ - config SPI_ATH79 - tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" - depends on ATH79 && GPIOLIB ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -14,6 +14,7 @@ obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi- - - # SPI master controller drivers (bus) - obj-$(CONFIG_SPI_ALTERA) += spi-altera.o -+obj-$(CONFIG_SPI_AR934X) += spi-ar934x.o - obj-$(CONFIG_SPI_ARMADA_3700) += spi-armada-3700.o - obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o - obj-$(CONFIG_SPI_ATH79) += spi-ath79.o ---- /dev/null -+++ b/drivers/spi/spi-ar934x.c -@@ -0,0 +1,235 @@ -+// SPDX-License-Identifier: GPL-2.0 -+// -+// SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs -+// -+// Copyright (C) 2020 Chuanhong Guo -+// -+// Based on spi-mt7621.c: -+// Copyright (C) 2011 Sergiy -+// Copyright (C) 2011-2013 Gabor Juhos -+// Copyright (C) 2014-2015 Felix Fietkau -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "spi-ar934x" -+ -+#define AR934X_SPI_REG_FS 0x00 -+#define AR934X_SPI_ENABLE BIT(0) -+ -+#define AR934X_SPI_REG_IOC 0x08 -+#define AR934X_SPI_IOC_INITVAL 0x70000 -+ -+#define AR934X_SPI_REG_CTRL 0x04 -+#define AR934X_SPI_CLK_MASK GENMASK(5, 0) -+ -+#define AR934X_SPI_DATAOUT 0x10 -+ -+#define AR934X_SPI_REG_SHIFT_CTRL 0x14 -+#define AR934X_SPI_SHIFT_EN BIT(31) -+#define AR934X_SPI_SHIFT_CS(n) BIT(28 + (n)) -+#define AR934X_SPI_SHIFT_TERM 26 -+#define AR934X_SPI_SHIFT_VAL(cs, term, count) \ -+ (AR934X_SPI_SHIFT_EN | AR934X_SPI_SHIFT_CS(cs) | \ -+ (term) << AR934X_SPI_SHIFT_TERM | (count)) -+ -+#define AR934X_SPI_DATAIN 0x18 -+ -+struct ar934x_spi { -+ struct spi_controller *ctlr; -+ void __iomem *base; -+ struct clk *clk; -+ unsigned int clk_freq; -+}; -+ -+static inline int ar934x_spi_clk_div(struct ar934x_spi *sp, unsigned int freq) -+{ -+ int div = DIV_ROUND_UP(sp->clk_freq, freq * 2) - 1; -+ -+ if (div < 0) -+ return 0; -+ else if (div > AR934X_SPI_CLK_MASK) -+ return -EINVAL; -+ else -+ return div; -+} -+ -+static int ar934x_spi_setup(struct spi_device *spi) -+{ -+ struct ar934x_spi *sp = spi_controller_get_devdata(spi->master); -+ -+ if ((spi->max_speed_hz == 0) || -+ (spi->max_speed_hz > (sp->clk_freq / 2))) { -+ spi->max_speed_hz = sp->clk_freq / 2; -+ } else if (spi->max_speed_hz < (sp->clk_freq / 128)) { -+ dev_err(&spi->dev, "spi clock is too low\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int ar934x_spi_transfer_one_message(struct spi_controller *master, -+ struct spi_message *m) -+{ -+ struct ar934x_spi *sp = spi_controller_get_devdata(master); -+ struct spi_transfer *t = NULL; -+ struct spi_device *spi = m->spi; -+ unsigned long trx_done, trx_cur; -+ int stat = 0; -+ u8 term = 0; -+ int div, i; -+ u32 reg; -+ const u8 *tx_buf; -+ u8 *buf; -+ -+ m->actual_length = 0; -+ list_for_each_entry(t, &m->transfers, transfer_list) { -+ if (t->speed_hz) -+ div = ar934x_spi_clk_div(sp, t->speed_hz); -+ else -+ div = ar934x_spi_clk_div(sp, spi->max_speed_hz); -+ if (div < 0) { -+ stat = -EIO; -+ goto msg_done; -+ } -+ -+ reg = ioread32(sp->base + AR934X_SPI_REG_CTRL); -+ reg &= ~AR934X_SPI_CLK_MASK; -+ reg |= div; -+ iowrite32(reg, sp->base + AR934X_SPI_REG_CTRL); -+ iowrite32(0, sp->base + AR934X_SPI_DATAOUT); -+ -+ for (trx_done = 0; trx_done < t->len; trx_done += 4) { -+ trx_cur = t->len - trx_done; -+ if (trx_cur > 4) -+ trx_cur = 4; -+ else if (list_is_last(&t->transfer_list, &m->transfers)) -+ term = 1; -+ -+ if (t->tx_buf) { -+ tx_buf = t->tx_buf + trx_done; -+ reg = tx_buf[0]; -+ for (i = 1; i < trx_cur; i++) -+ reg = reg << 8 | tx_buf[i]; -+ iowrite32(reg, sp->base + AR934X_SPI_DATAOUT); -+ } -+ -+ reg = AR934X_SPI_SHIFT_VAL(spi->chip_select, term, -+ trx_cur * 8); -+ iowrite32(reg, sp->base + AR934X_SPI_REG_SHIFT_CTRL); -+ stat = readl_poll_timeout( -+ sp->base + AR934X_SPI_REG_SHIFT_CTRL, reg, -+ !(reg & AR934X_SPI_SHIFT_EN), 0, 5); -+ if (stat < 0) -+ goto msg_done; -+ -+ if (t->rx_buf) { -+ reg = ioread32(sp->base + AR934X_SPI_DATAIN); -+ buf = t->rx_buf + trx_done; -+ for (i = 0; i < trx_cur; i++) { -+ buf[trx_cur - i - 1] = reg & 0xff; -+ reg >>= 8; -+ } -+ } -+ } -+ m->actual_length += t->len; -+ } -+ -+msg_done: -+ m->status = stat; -+ spi_finalize_current_message(master); -+ -+ return 0; -+} -+ -+static const struct of_device_id ar934x_spi_match[] = { -+ { .compatible = "qca,ar934x-spi" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, ar934x_spi_match); -+ -+static int ar934x_spi_probe(struct platform_device *pdev) -+{ -+ struct spi_controller *ctlr; -+ struct ar934x_spi *sp; -+ void __iomem *base; -+ struct clk *clk; -+ int ret; -+ -+ base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ clk = devm_clk_get(&pdev->dev, NULL); -+ if (IS_ERR(clk)) { -+ dev_err(&pdev->dev, "failed to get clock\n"); -+ return PTR_ERR(clk); -+ } -+ -+ ret = clk_prepare_enable(clk); -+ if (ret) -+ return ret; -+ -+ ctlr = spi_alloc_master(&pdev->dev, sizeof(*sp)); -+ if (!ctlr) { -+ dev_info(&pdev->dev, "failed to allocate spi controller\n"); -+ return -ENOMEM; -+ } -+ -+ /* disable flash mapping and expose spi controller registers */ -+ iowrite32(AR934X_SPI_ENABLE, base + AR934X_SPI_REG_FS); -+ /* restore pins to default state: CSn=1 DO=CLK=0 */ -+ iowrite32(AR934X_SPI_IOC_INITVAL, base + AR934X_SPI_REG_IOC); -+ -+ ctlr->mode_bits = SPI_LSB_FIRST; -+ ctlr->setup = ar934x_spi_setup; -+ ctlr->transfer_one_message = ar934x_spi_transfer_one_message; -+ ctlr->bits_per_word_mask = SPI_BPW_MASK(8); -+ ctlr->dev.of_node = pdev->dev.of_node; -+ ctlr->num_chipselect = 3; -+ -+ dev_set_drvdata(&pdev->dev, ctlr); -+ -+ sp = spi_controller_get_devdata(ctlr); -+ sp->base = base; -+ sp->clk = clk; -+ sp->clk_freq = clk_get_rate(clk); -+ sp->ctlr = ctlr; -+ -+ return devm_spi_register_controller(&pdev->dev, ctlr); -+} -+ -+static int ar934x_spi_remove(struct platform_device *pdev) -+{ -+ struct spi_controller *ctlr; -+ struct ar934x_spi *sp; -+ -+ ctlr = dev_get_drvdata(&pdev->dev); -+ sp = spi_controller_get_devdata(ctlr); -+ -+ clk_disable_unprepare(sp->clk); -+ -+ return 0; -+} -+ -+static struct platform_driver ar934x_spi_driver = { -+ .driver = { -+ .name = DRIVER_NAME, -+ .of_match_table = ar934x_spi_match, -+ }, -+ .probe = ar934x_spi_probe, -+ .remove = ar934x_spi_remove, -+}; -+ -+module_platform_driver(ar934x_spi_driver); -+ -+MODULE_DESCRIPTION("SPI controller driver for Qualcomm Atheros AR934x/QCA95xx"); -+MODULE_AUTHOR("Chuanhong Guo "); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/target/linux/ath79/patches-4.19/0060-serial-ar933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch b/target/linux/ath79/patches-4.19/0060-serial-ar933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch deleted file mode 100644 index 30828d693c..0000000000 --- a/target/linux/ath79/patches-4.19/0060-serial-ar933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch +++ /dev/null @@ -1,64 +0,0 @@ -From patchwork Fri Feb 7 09:53:35 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Daniel Golle -X-Patchwork-Id: 1190470 -Date: Fri, 7 Feb 2020 11:53:35 +0200 -From: Daniel Golle -To: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org -Cc: Greg Kroah-Hartman , - Jiri Slaby , - Chuanhong Guo , - Eitan Cohen , - Ori Gofen -Subject: [PATCH] serial: ar933x_uart: set UART_CS_{RX,TX}_READY_ORIDE -Message-ID: <20200207095335.GA179836@makrotopia.org> -MIME-Version: 1.0 -Content-Disposition: inline -Sender: linux-kernel-owner@vger.kernel.org -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org - -On AR934x this UART is usually not initialized by the bootloader -as it is only used as a secondary serial port while the primary -UART is a newly introduced NS16550-compatible. -In order to make use of the ar933x-uart on AR934x without RTS/CTS -hardware flow control, one needs to set the -UART_CS_{RX,TX}_READY_ORIDE bits as other than on AR933x where this -UART is used as primary/console, the bootloader on AR934x typically -doesn't set those bits. -Setting them explicitely on AR933x should not do any harm, so just -set them unconditionally. - -Tested-by: Chuanhong Guo -Signed-off-by: Daniel Golle ---- - drivers/tty/serial/ar933x_uart.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/drivers/tty/serial/ar933x_uart.c -+++ b/drivers/tty/serial/ar933x_uart.c -@@ -290,6 +290,10 @@ static void ar933x_uart_set_termios(stru - ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, - AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); - -+ /* enable RX and TX ready overide */ -+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, -+ AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); -+ - /* reenable the UART */ - ar933x_uart_rmw(up, AR933X_UART_CS_REG, - AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, -@@ -424,6 +428,10 @@ static int ar933x_uart_startup(struct ua - - /* enable RX and TX ready overide */ - ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, -+ AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); -+ -+ /* enable RX and TX ready overide */ -+ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, - AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); - - /* Enable RX interrupts */ diff --git a/target/linux/ath79/patches-4.19/0061-tty-serial-ar933x-uart-rs485-gpio.patch b/target/linux/ath79/patches-4.19/0061-tty-serial-ar933x-uart-rs485-gpio.patch deleted file mode 100644 index b77cd2d574..0000000000 --- a/target/linux/ath79/patches-4.19/0061-tty-serial-ar933x-uart-rs485-gpio.patch +++ /dev/null @@ -1,267 +0,0 @@ -From patchwork Fri Feb 21 21:23:31 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Daniel Golle -X-Patchwork-Id: 1198835 -Date: Fri, 21 Feb 2020 22:23:31 +0100 -From: Daniel Golle -To: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org -Cc: Greg Kroah-Hartman , - Jiri Slaby , Petr =?utf-8?q?=C5=A0tetiar?= , - Chuanhong Guo , Piotr Dymacz -Subject: [PATCH v2] serial: ar933x_uart: add RS485 support -Message-ID: <20200221212331.GA21467@makrotopia.org> -MIME-Version: 1.0 -Content-Disposition: inline -Sender: linux-kernel-owner@vger.kernel.org -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org - -Emulate half-duplex operation and use mctrl_gpio to add support for -RS485 tranceiver with transmit/receive switch hooked to RTS GPIO line. -This is needed to make use of the RS485 port found on Teltonika RUT955. - -Signed-off-by: Daniel Golle ---- -v2: use bool to indicate ongoing half-duplex send, use it afterwards - to decide whether we've just been in a send operation. - - drivers/tty/serial/Kconfig | 1 + - drivers/tty/serial/ar933x_uart.c | 113 +++++++++++++++++++++++++++++-- - 2 files changed, 108 insertions(+), 6 deletions(-) - ---- a/drivers/tty/serial/Kconfig -+++ b/drivers/tty/serial/Kconfig -@@ -1296,6 +1296,7 @@ config SERIAL_AR933X - tristate "AR933X serial port support" - depends on HAVE_CLK && ATH79 - select SERIAL_CORE -+ select SERIAL_MCTRL_GPIO if GPIOLIB - help - If you have an Atheros AR933X SOC based board and want to use the - built-in UART of the SoC, say Y to this option. ---- a/drivers/tty/serial/ar933x_uart.c -+++ b/drivers/tty/serial/ar933x_uart.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -29,6 +30,8 @@ - - #include - -+#include "serial_mctrl_gpio.h" -+ - #define DRIVER_NAME "ar933x-uart" - - #define AR933X_UART_MAX_SCALE 0xff -@@ -47,6 +50,8 @@ struct ar933x_uart_port { - unsigned int min_baud; - unsigned int max_baud; - struct clk *clk; -+ struct mctrl_gpios *gpios; -+ struct gpio_desc *rts_gpiod; - }; - - static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, -@@ -100,6 +105,18 @@ static inline void ar933x_uart_stop_tx_i - ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); - } - -+static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up) -+{ -+ up->ier |= AR933X_UART_INT_RX_VALID; -+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+} -+ -+static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up) -+{ -+ up->ier &= ~AR933X_UART_INT_RX_VALID; -+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+} -+ - static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) - { - unsigned int rdata; -@@ -125,11 +142,21 @@ static unsigned int ar933x_uart_tx_empty - - static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) - { -- return TIOCM_CAR; -+ struct ar933x_uart_port *up = -+ container_of(port, struct ar933x_uart_port, port); -+ int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; -+ -+ mctrl_gpio_get(up->gpios, &ret); -+ -+ return ret; - } - - static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) - { -+ struct ar933x_uart_port *up = -+ container_of(port, struct ar933x_uart_port, port); -+ -+ mctrl_gpio_set(up->gpios, mctrl); - } - - static void ar933x_uart_start_tx(struct uart_port *port) -@@ -140,6 +167,37 @@ static void ar933x_uart_start_tx(struct - ar933x_uart_start_tx_interrupt(up); - } - -+static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up) -+{ -+ unsigned int status; -+ unsigned int timeout = 60000; -+ -+ /* Wait up to 60ms for the character(s) to be sent. */ -+ do { -+ status = ar933x_uart_read(up, AR933X_UART_CS_REG); -+ if (--timeout == 0) -+ break; -+ udelay(1); -+ } while (status & AR933X_UART_CS_TX_BUSY); -+ -+ if (timeout == 0) -+ dev_err(up->port.dev, "waiting for TX timed out\n"); -+} -+ -+static void ar933x_uart_rx_flush(struct ar933x_uart_port *up) -+{ -+ unsigned int status; -+ -+ /* clear RX_VALID interrupt */ -+ ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID); -+ -+ /* remove characters from the RX FIFO */ -+ do { -+ ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR); -+ status = ar933x_uart_read(up, AR933X_UART_DATA_REG); -+ } while (status & AR933X_UART_DATA_RX_CSR); -+} -+ - static void ar933x_uart_stop_tx(struct uart_port *port) - { - struct ar933x_uart_port *up = -@@ -153,8 +211,7 @@ static void ar933x_uart_stop_rx(struct u - struct ar933x_uart_port *up = - container_of(port, struct ar933x_uart_port, port); - -- up->ier &= ~AR933X_UART_INT_RX_VALID; -- ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+ ar933x_uart_stop_rx_interrupt(up); - } - - static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) -@@ -340,11 +397,20 @@ static void ar933x_uart_rx_chars(struct - static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) - { - struct circ_buf *xmit = &up->port.state->xmit; -+ struct serial_rs485 *rs485conf = &up->port.rs485; - int count; -+ bool half_duplex_send = false; - - if (uart_tx_stopped(&up->port)) - return; - -+ if ((rs485conf->flags & SER_RS485_ENABLED) && -+ (up->port.x_char || !uart_circ_empty(xmit))) { -+ ar933x_uart_stop_rx_interrupt(up); -+ gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND)); -+ half_duplex_send = true; -+ } -+ - count = up->port.fifosize; - do { - unsigned int rdata; -@@ -372,8 +438,14 @@ static void ar933x_uart_tx_chars(struct - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(&up->port); - -- if (!uart_circ_empty(xmit)) -+ if (!uart_circ_empty(xmit)) { - ar933x_uart_start_tx_interrupt(up); -+ } else if (half_duplex_send) { -+ ar933x_uart_wait_tx_complete(up); -+ ar933x_uart_rx_flush(up); -+ ar933x_uart_start_rx_interrupt(up); -+ gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND)); -+ } - } - - static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) -@@ -435,8 +507,7 @@ static int ar933x_uart_startup(struct ua - AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); - - /* Enable RX interrupts */ -- up->ier = AR933X_UART_INT_RX_VALID; -- ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+ ar933x_uart_start_rx_interrupt(up); - - spin_unlock_irqrestore(&up->port.lock, flags); - -@@ -519,6 +590,21 @@ static const struct uart_ops ar933x_uart - .verify_port = ar933x_uart_verify_port, - }; - -+static int ar933x_config_rs485(struct uart_port *port, -+ struct serial_rs485 *rs485conf) -+{ -+ struct ar933x_uart_port *up = -+ container_of(port, struct ar933x_uart_port, port); -+ -+ if ((rs485conf->flags & SER_RS485_ENABLED) && -+ !up->rts_gpiod) { -+ dev_err(port->dev, "RS485 needs rts-gpio\n"); -+ return 1; -+ } -+ port->rs485 = *rs485conf; -+ return 0; -+} -+ - #ifdef CONFIG_SERIAL_AR933X_CONSOLE - static struct ar933x_uart_port * - ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; -@@ -688,6 +774,8 @@ static int ar933x_uart_probe(struct plat - goto err_disable_clk; - } - -+ uart_get_rs485_mode(&pdev->dev, &port->rs485); -+ - port->mapbase = mem_res->start; - port->line = id; - port->irq = irq_res->start; -@@ -698,6 +786,7 @@ static int ar933x_uart_probe(struct plat - port->regshift = 2; - port->fifosize = AR933X_UART_FIFO_SIZE; - port->ops = &ar933x_uart_ops; -+ port->rs485_config = ar933x_config_rs485; - - baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); - up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); -@@ -705,6 +794,18 @@ static int ar933x_uart_probe(struct plat - baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); - up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); - -+ up->gpios = mctrl_gpio_init(port, 0); -+ if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) -+ return PTR_ERR(up->gpios); -+ -+ up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS); -+ -+ if ((port->rs485.flags & SER_RS485_ENABLED) && -+ !up->rts_gpiod) { -+ dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n"); -+ port->rs485.flags &= ~SER_RS485_ENABLED; -+ } -+ - #ifdef CONFIG_SERIAL_AR933X_CONSOLE - ar933x_console_ports[up->port.line] = up; - #endif diff --git a/target/linux/ath79/patches-4.19/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch b/target/linux/ath79/patches-4.19/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch deleted file mode 100644 index 2c9120f771..0000000000 --- a/target/linux/ath79/patches-4.19/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch +++ /dev/null @@ -1,130 +0,0 @@ -From: David Bauer -Date: Sat, 11 Apr 2020 14:03:12 +0200 -Subject: MIPS: pci-ar724x: add QCA9550 reset sequence - -The QCA9550 family of SoCs have a slightly different reset -sequence compared to older chips. - -Normally the bootloader performs this sequence, however -some bootloader implementation expect the operating system -to clear the reset. - -Also get the resets from OF to support handling of the second -PCIe root-complex on the QCA9558. - -Signed-off-by: David Bauer - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -394,6 +394,7 @@ - #define QCA955X_PLL_CPU_CONFIG_REG 0x00 - #define QCA955X_PLL_DDR_CONFIG_REG 0x04 - #define QCA955X_PLL_CLK_CTRL_REG 0x08 -+#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c - #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 - #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 - #define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c -@@ -479,6 +480,9 @@ - #define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) - #define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30) -+#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16) -+ - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5) - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6) - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7) ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -11,6 +11,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -58,6 +59,9 @@ struct ar724x_pci_controller { - struct irq_domain *domain; - struct resource io_res; - struct resource mem_res; -+ -+ struct reset_control *hc_reset; -+ struct reset_control *phy_reset; - }; - - static struct irq_chip ar724x_pci_irq_chip; -@@ -343,18 +347,30 @@ static void ar724x_pci_hw_init(struct ar - int wait = 0; - - /* deassert PCIe host controller and PCIe PHY reset */ -- ath79_device_reset_clear(AR724X_RESET_PCIE); -- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY); -+ reset_control_deassert(apc->hc_reset); -+ reset_control_deassert(apc->phy_reset); - -- /* remove the reset of the PCIE PLL */ -- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; -- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -- -- /* deassert bypass for the PCIE PLL */ -- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; -- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) { -+ /* remove the reset of the PCIE PLL */ -+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); -+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD; -+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); -+ -+ /* deassert bypass for the PCIE PLL */ -+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); -+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS; -+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); -+ } else { -+ /* remove the reset of the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ -+ /* deassert bypass for the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ } - - /* set PCIE Application Control to ready */ - app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); -@@ -402,6 +418,14 @@ static int ar724x_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -+ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc"); -+ if (IS_ERR(apc->hc_reset)) -+ return PTR_ERR(apc->hc_reset); -+ -+ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy"); -+ if (IS_ERR(apc->phy_reset)) -+ return PTR_ERR(apc->phy_reset); -+ - apc->np = pdev->dev.of_node; - apc->pci_controller.pci_ops = &ar724x_pci_ops; - apc->pci_controller.io_resource = &apc->io_res; -@@ -412,7 +436,7 @@ static int ar724x_pci_probe(struct platf - * Do the full PCIE Root Complex Initialization Sequence if the PCIe - * host controller is in reset. - */ -- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE) -+ if (reset_control_status(apc->hc_reset)) - ar724x_pci_hw_init(apc); - - apc->link_up = ar724x_pci_check_link(apc); -@@ -430,6 +454,7 @@ static int ar724x_pci_probe(struct platf - - static const struct of_device_id ar724x_pci_ids[] = { - { .compatible = "qcom,ar7240-pci" }, -+ { .compatible = "qcom,qca9550-pci" }, - {}, - }; - diff --git a/target/linux/ath79/patches-4.19/404-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-4.19/404-mtd-cybertan-trx-parser.patch deleted file mode 100644 index fcfe72e287..0000000000 --- a/target/linux/ath79/patches-4.19/404-mtd-cybertan-trx-parser.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -1,3 +1,4 @@ -+obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o - obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o - obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o - obj-$(CONFIG_MTD_ROUTERBOOT_PARTS) += routerbootpart.o ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -1,3 +1,11 @@ -+config MTD_PARSER_CYBERTAN -+ tristate "Parser for Cybertan format partitions" -+ depends on MTD && (ATH79 || COMPILE_TEST) -+ help -+ Cybertan has a proprietory header than encompasses a Broadcom trx -+ header. This driver will parse the header and take care of the -+ special offsets that result in the extra headers. -+ - config MTD_PARSER_TRX - tristate "Parser for TRX format partitions" - depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST) diff --git a/target/linux/ath79/patches-4.19/408-mtd-redboot_partition_scan.patch b/target/linux/ath79/patches-4.19/408-mtd-redboot_partition_scan.patch deleted file mode 100644 index cd41e7ceb2..0000000000 --- a/target/linux/ath79/patches-4.19/408-mtd-redboot_partition_scan.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -76,12 +76,18 @@ static int parse_redboot_partitions(stru - static char nullstring[] = "unallocated"; - #endif - -+ buf = vmalloc(master->erasesize); -+ if (!buf) -+ return -ENOMEM; -+ -+ restart: - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; - while (mtd_block_isbad(master, offset)) { - if (!offset) { - nogood: - printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); -+ vfree(buf); - return -EIO; - } - offset -= master->erasesize; -@@ -94,10 +100,6 @@ static int parse_redboot_partitions(stru - goto nogood; - } - } -- buf = vmalloc(master->erasesize); -- -- if (!buf) -- return -ENOMEM; - - printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", - master->name, offset); -@@ -170,6 +172,11 @@ static int parse_redboot_partitions(stru - } - if (i == numslots) { - /* Didn't find it */ -+ if (offset + master->erasesize < master->size) { -+ /* not at the end of the flash yet, maybe next block :) */ -+ directory++; -+ goto restart; -+ } - printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", - master->name); - ret = 0; diff --git a/target/linux/ath79/patches-4.19/410-spi-ath79-Implement-the-spi_mem-interface.patch b/target/linux/ath79/patches-4.19/410-spi-ath79-Implement-the-spi_mem-interface.patch deleted file mode 100644 index 62ee69e6a4..0000000000 --- a/target/linux/ath79/patches-4.19/410-spi-ath79-Implement-the-spi_mem-interface.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001 -From: Luiz Angelo Daros de Luca -Date: Mon, 10 Feb 2020 16:11:27 -0300 -Subject: [PATCH] spi: ath79: Implement the spi_mem interface - -Signed-off-by: Luiz Angelo Daros de Luca ---- - drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -203,6 +204,39 @@ static u32 ath79_spi_txrx_mode0(struct s - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_exec_mem_op(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi); -+ -+ /* Ensures that reading is performed on device connected -+ to hardware cs0 */ -+ if (mem->spi->chip_select || gpio_is_valid(mem->spi->cs_gpio)) -+ return -ENOTSUPP; -+ -+ /* Only use for fast-read op. */ -+ if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN || -+ op->addr.nbytes != 3 || op->dummy.nbytes != 1) -+ return -ENOTSUPP; -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ return 0; -+} -+ -+static const struct spi_controller_mem_ops ath79_mem_ops = { -+ .exec_op = ath79_exec_mem_op, -+}; -+ - static int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -237,6 +271,7 @@ static int ath79_spi_probe(struct platfo - ret = PTR_ERR(sp->base); - goto err_put_master; - } -+ master->mem_ops = &ath79_mem_ops; - - sp->clk = devm_clk_get(&pdev->dev, "ahb"); - if (IS_ERR(sp->clk)) { diff --git a/target/linux/ath79/patches-4.19/420-net-ar71xx_mac_driver.patch b/target/linux/ath79/patches-4.19/420-net-ar71xx_mac_driver.patch deleted file mode 100644 index 6377db0ac2..0000000000 --- a/target/linux/ath79/patches-4.19/420-net-ar71xx_mac_driver.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/net/ethernet/atheros/Kconfig -+++ b/drivers/net/ethernet/atheros/Kconfig -@@ -5,7 +5,7 @@ - config NET_VENDOR_ATHEROS - bool "Atheros devices" - default y -- depends on PCI -+ depends on (PCI || ATH79) - ---help--- - If you have a network (Ethernet) card belonging to this class, say Y. - -@@ -78,4 +78,6 @@ config ALX - To compile this driver as a module, choose M here. The module - will be called alx. - -+source drivers/net/ethernet/atheros/ag71xx/Kconfig -+ - endif # NET_VENDOR_ATHEROS ---- a/drivers/net/ethernet/atheros/Makefile -+++ b/drivers/net/ethernet/atheros/Makefile -@@ -3,6 +3,7 @@ - # Makefile for the Atheros network device drivers. - # - -+obj-$(CONFIG_AG71XX) += ag71xx/ - obj-$(CONFIG_ATL1) += atlx/ - obj-$(CONFIG_ATL2) += atlx/ - obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ath79/patches-4.19/425-at803x-allow-sgmii-aneg-override.patch b/target/linux/ath79/patches-4.19/425-at803x-allow-sgmii-aneg-override.patch deleted file mode 100644 index 43c11386c7..0000000000 --- a/target/linux/ath79/patches-4.19/425-at803x-allow-sgmii-aneg-override.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -391,6 +391,13 @@ static int at803x_aneg_done(struct phy_d - if (!(phy_read(phydev, AT803X_PSSR) & AT803X_PSSR_MR_AN_COMPLETE)) { - pr_warn("803x_aneg_done: SGMII link is not ok\n"); - aneg_done = 0; -+#ifdef CONFIG_OF_MDIO -+ if (phydev->mdio.dev.of_node && -+ of_property_read_bool(phydev->mdio.dev.of_node, -+ "at803x-override-sgmii-link-check")) { -+ aneg_done = 1; -+ } -+#endif - } - /* switch back to copper page */ - phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL); diff --git a/target/linux/ath79/patches-4.19/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-4.19/430-drivers-link-spi-before-mtd.patch deleted file mode 100644 index 4c6558db90..0000000000 --- a/target/linux/ath79/patches-4.19/430-drivers-link-spi-before-mtd.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -80,8 +80,8 @@ obj-y += scsi/ - obj-y += nvme/ - obj-$(CONFIG_ATA) += ata/ - obj-$(CONFIG_TARGET_CORE) += target/ --obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPI) += spi/ -+obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPMI) += spmi/ - obj-$(CONFIG_HSI) += hsi/ - obj-$(CONFIG_SLIMBUS) += slimbus/ diff --git a/target/linux/ath79/patches-4.19/440-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-4.19/440-mtd-ar934x-nand-driver.patch deleted file mode 100644 index b74ad90745..0000000000 --- a/target/linux/ath79/patches-4.19/440-mtd-ar934x-nand-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -561,4 +561,12 @@ config MTD_NAND_TEGRA - is supported. Extra OOB bytes when using HW ECC are currently - not supported. - -+config MTD_NAND_AR934X -+ tristate "Support for NAND controller on Qualcomm Atheros AR934x/QCA955x SoCs" -+ depends on ATH79 || COMPILE_TEST -+ depends on HAS_IOMEM -+ help -+ Enables support for NAND controller on Qualcomm Atheros SoCs. -+ This controller is found on AR934x and QCA955x SoCs. -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -57,6 +57,7 @@ obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcm - obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nandc.o - obj-$(CONFIG_MTD_NAND_MTK) += mtk_ecc.o mtk_nand.o - obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o -+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o - - nand-objs := nand_base.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_amd.o diff --git a/target/linux/ath79/patches-4.19/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-4.19/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch deleted file mode 100644 index 634ce56354..0000000000 --- a/target/linux/ath79/patches-4.19/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch +++ /dev/null @@ -1,98 +0,0 @@ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ath79/mangle-port.h -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h -+ * Copyright (C) 2003, 2004 Ralf Baechle -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H -+#define __ASM_MACH_ATH79_MANGLE_PORT_H -+ -+#ifdef CONFIG_PCI_AR71XX -+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); -+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); -+#else -+#define ath79_pci_swizzle_b(port) (port) -+#define ath79_pci_swizzle_w(port) (port) -+#endif -+ -+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) -+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) -+#define __swizzle_addr_l(port) (port) -+#define __swizzle_addr_q(port) (port) -+ -+# define ioswabb(a, x) (x) -+# define __mem_ioswabb(a, x) (x) -+# define ioswabw(a, x) (x) -+# define __mem_ioswabw(a, x) cpu_to_le16(x) -+# define ioswabl(a, x) (x) -+# define __mem_ioswabl(a, x) cpu_to_le32(x) -+# define ioswabq(a, x) (x) -+# define __mem_ioswabq(a, x) cpu_to_le64(x) -+ -+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -71,6 +71,45 @@ static const u32 ar71xx_pci_read_mask[8] - 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 - }; - -+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); -+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); -+ -+static inline bool ar71xx_is_pci_addr(unsigned long port) -+{ -+ unsigned long phys = CPHYSADDR(port); -+ -+ return (phys >= AR71XX_PCI_MEM_BASE && -+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); -+} -+ -+static unsigned long ar71xx_pci_swizzle_b(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; -+} -+ -+static unsigned long ar71xx_pci_swizzle_w(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; -+} -+ -+unsigned long ath79_pci_swizzle_b(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_b) -+ return __ath79_pci_swizzle_b(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_b); -+ -+unsigned long ath79_pci_swizzle_w(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_w) -+ return __ath79_pci_swizzle_w(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_w); -+ - static inline u32 ar71xx_pci_get_ble(int where, int size, int local) - { - u32 t; -@@ -279,6 +318,9 @@ static int ar71xx_pci_probe(struct platf - - register_pci_controller(&apc->pci_ctrl); - -+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; -+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; -+ - return 0; - } - diff --git a/target/linux/ath79/patches-4.19/700-net-phy-add-reset-controller-support.patch b/target/linux/ath79/patches-4.19/700-net-phy-add-reset-controller-support.patch deleted file mode 100644 index 9f96390911..0000000000 --- a/target/linux/ath79/patches-4.19/700-net-phy-add-reset-controller-support.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 71dd6c0dff51b5f1fef2e9dfa6f6a948aac975f3 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Wed, 17 Apr 2019 23:59:21 +0200 -Subject: [PATCH] net: phy: add support for reset-controller - -This commit adds support for PHY reset pins handled by a reset controller. - -Signed-off-by: David Bauer -Reviewed-by: Andrew Lunn -Signed-off-by: David S. Miller ---- - drivers/net/phy/mdio_bus.c | 27 +++++++++++++++++++++++++-- - drivers/net/phy/mdio_device.c | 13 +++++++++++-- - include/linux/mdio.h | 1 + - 3 files changed, 37 insertions(+), 4 deletions(-) - ---- a/drivers/net/phy/mdio_bus.c -+++ b/drivers/net/phy/mdio_bus.c -@@ -29,6 +29,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -65,8 +66,23 @@ static int mdiobus_register_gpiod(struct - - mdiodev->reset = gpiod; - -- /* Assert the reset signal again */ -- mdio_device_reset(mdiodev, 1); -+ return 0; -+} -+ -+static int mdiobus_register_reset(struct mdio_device *mdiodev) -+{ -+ struct reset_control *reset = NULL; -+ -+ if (mdiodev->dev.of_node) -+ reset = devm_reset_control_get_exclusive(&mdiodev->dev, -+ "phy"); -+ if (PTR_ERR(reset) == -ENOENT || -+ PTR_ERR(reset) == -ENOTSUPP) -+ reset = NULL; -+ else if (IS_ERR(reset)) -+ return PTR_ERR(reset); -+ -+ mdiodev->reset_ctrl = reset; - - return 0; - } -@@ -82,6 +98,13 @@ int mdiobus_register_device(struct mdio_ - err = mdiobus_register_gpiod(mdiodev); - if (err) - return err; -+ -+ err = mdiobus_register_reset(mdiodev); -+ if (err) -+ return err; -+ -+ /* Assert the reset signal */ -+ mdio_device_reset(mdiodev, 1); - } - - mdiodev->bus->mdio_map[mdiodev->addr] = mdiodev; ---- a/drivers/net/phy/mdio_device.c -+++ b/drivers/net/phy/mdio_device.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -121,10 +122,18 @@ void mdio_device_reset(struct mdio_devic - { - unsigned int d; - -- if (!mdiodev->reset) -+ if (!mdiodev->reset && !mdiodev->reset_ctrl) - return; - -- gpiod_set_value(mdiodev->reset, value); -+ if (mdiodev->reset) -+ gpiod_set_value(mdiodev->reset, value); -+ -+ if (mdiodev->reset_ctrl) { -+ if (value) -+ reset_control_assert(mdiodev->reset_ctrl); -+ else -+ reset_control_deassert(mdiodev->reset_ctrl); -+ } - - d = value ? mdiodev->reset_assert_delay : mdiodev->reset_deassert_delay; - if (d) ---- a/include/linux/mdio.h -+++ b/include/linux/mdio.h -@@ -40,6 +40,7 @@ struct mdio_device { - int addr; - int flags; - struct gpio_desc *reset; -+ struct reset_control *reset_ctrl; - unsigned int reset_assert_delay; - unsigned int reset_deassert_delay; - }; diff --git a/target/linux/ath79/patches-4.19/701-mdio-bus-dont-use-managed-reset-controller.patch b/target/linux/ath79/patches-4.19/701-mdio-bus-dont-use-managed-reset-controller.patch deleted file mode 100644 index 16e7f20370..0000000000 --- a/target/linux/ath79/patches-4.19/701-mdio-bus-dont-use-managed-reset-controller.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 32085f25d7b68404055f3525c780142fc72e543f Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Fri, 22 Nov 2019 22:44:51 +0100 -Subject: [PATCH] mdio_bus: don't use managed reset-controller - -Geert Uytterhoeven reported that using devm_reset_controller_get leads -to a WARNING when probing a reset-controlled PHY. This is because the -device devm_reset_controller_get gets supplied is not actually the -one being probed. - -Acquire an unmanaged reset-control as well as free the reset_control on -unregister to fix this. - -Reported-by: Geert Uytterhoeven -CC: Andrew Lunn -Signed-off-by: David Bauer -Reviewed-by: Andrew Lunn -Signed-off-by: David S. Miller ---- - drivers/net/phy/mdio_bus.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/phy/mdio_bus.c -+++ b/drivers/net/phy/mdio_bus.c -@@ -74,8 +74,8 @@ static int mdiobus_register_reset(struct - struct reset_control *reset = NULL; - - if (mdiodev->dev.of_node) -- reset = devm_reset_control_get_exclusive(&mdiodev->dev, -- "phy"); -+ reset = of_reset_control_get_exclusive(mdiodev->dev.of_node, -+ "phy"); - if (PTR_ERR(reset) == -ENOENT || - PTR_ERR(reset) == -ENOTSUPP) - reset = NULL; -@@ -118,6 +118,8 @@ int mdiobus_unregister_device(struct mdi - if (mdiodev->bus->mdio_map[mdiodev->addr] != mdiodev) - return -EINVAL; - -+ reset_control_put(mdiodev->reset_ctrl); -+ - mdiodev->bus->mdio_map[mdiodev->addr] = NULL; - - return 0; diff --git a/target/linux/ath79/patches-4.19/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-4.19/900-mdio_bitbang_ignore_ta_value.patch deleted file mode 100644 index 8f8f349a66..0000000000 --- a/target/linux/ath79/patches-4.19/900-mdio_bitbang_ignore_ta_value.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/drivers/net/phy/mdio-bitbang.c -+++ b/drivers/net/phy/mdio-bitbang.c -@@ -155,7 +155,7 @@ static int mdiobb_cmd_addr(struct mdiobb - static int mdiobb_read(struct mii_bus *bus, int phy, int reg) - { - struct mdiobb_ctrl *ctrl = bus->priv; -- int ret, i; -+ int ret; - - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); -@@ -165,19 +165,7 @@ static int mdiobb_read(struct mii_bus *b - - ctrl->ops->set_mdio_dir(ctrl, 0); - -- /* check the turnaround bit: the PHY should be driving it to zero, if this -- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that -- */ -- if (mdiobb_get_bit(ctrl) != 0 && -- !(bus->phy_ignore_ta_mask & (1 << phy))) { -- /* PHY didn't drive TA low -- flush any bits it -- * may be trying to send. -- */ -- for (i = 0; i < 32; i++) -- mdiobb_get_bit(ctrl); -- -- return 0xffff; -- } -+ mdiobb_get_bit(ctrl); - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); diff --git a/target/linux/ath79/patches-4.19/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ath79/patches-4.19/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch deleted file mode 100644 index a830346a31..0000000000 --- a/target/linux/ath79/patches-4.19/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Tue, 16 Jun 2015 13:15:08 +0200 -Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command - -It seems some phys have some maximum timings for accessing the MDIO line, -resulting in bit errors under cpu stress. Prevent this from happening by -disabling interrupts when sending commands. - -Signed-off-by: Jonas Gorski ---- - drivers/net/phy/mdio-bitbang.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/drivers/net/phy/mdio-bitbang.c -+++ b/drivers/net/phy/mdio-bitbang.c -@@ -17,6 +17,7 @@ - * kind, whether express or implied. - */ - -+#include - #include - #include - #include -@@ -156,7 +157,9 @@ static int mdiobb_read(struct mii_bus *b - { - struct mdiobb_ctrl *ctrl = bus->priv; - int ret; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); -@@ -169,13 +172,17 @@ static int mdiobb_read(struct mii_bus *b - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return ret; - } - - static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) - { - struct mdiobb_ctrl *ctrl = bus->priv; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); -@@ -190,6 +197,8 @@ static int mdiobb_write(struct mii_bus * - - ctrl->ops->set_mdio_dir(ctrl, 0); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return 0; - } - diff --git a/target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch deleted file mode 100644 index fc77e6e42a..0000000000 --- a/target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch +++ /dev/null @@ -1,891 +0,0 @@ ---- a/arch/mips/include/asm/checksum.h -+++ b/arch/mips/include/asm/checksum.h -@@ -134,26 +134,30 @@ static inline __sum16 ip_fast_csum(const - const unsigned int *stop = word + ihl; - unsigned int csum; - int carry; -+ unsigned int w; - -- csum = word[0]; -- csum += word[1]; -- carry = (csum < word[1]); -+ csum = net_hdr_word(word++); -+ -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[2]; -- carry = (csum < word[2]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[3]; -- carry = (csum < word[3]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- word += 4; - do { -- csum += *word; -- carry = (csum < *word); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; -- word++; - } while (word != stop); - - return csum_fold(csum); -@@ -214,73 +218,6 @@ static inline __sum16 ip_compute_csum(co - return csum_fold(csum_partial(buff, len, 0)); - } - --#define _HAVE_ARCH_IPV6_CSUM --static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, -- const struct in6_addr *daddr, -- __u32 len, __u8 proto, -- __wsum sum) --{ -- __wsum tmp; -- -- __asm__( -- " .set push # csum_ipv6_magic\n" -- " .set noreorder \n" -- " .set noat \n" -- " addu %0, %5 # proto (long in network byte order)\n" -- " sltu $1, %0, %5 \n" -- " addu %0, $1 \n" -- -- " addu %0, %6 # csum\n" -- " sltu $1, %0, %6 \n" -- " lw %1, 0(%2) # four words source address\n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 0(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " addu %0, $1 # Add final carry\n" -- " .set pop" -- : "=&r" (sum), "=&r" (tmp) -- : "r" (saddr), "r" (daddr), -- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); -- -- return csum_fold(sum); --} -- - #include - #endif /* CONFIG_GENERIC_CSUM */ - ---- a/include/uapi/linux/ip.h -+++ b/include/uapi/linux/ip.h -@@ -103,7 +103,7 @@ struct iphdr { - __be32 saddr; - __be32 daddr; - /*The options start here. */ --}; -+} __attribute__((packed, aligned(2))); - - - struct ip_auth_hdr { ---- a/include/uapi/linux/ipv6.h -+++ b/include/uapi/linux/ipv6.h -@@ -131,7 +131,7 @@ struct ipv6hdr { - - struct in6_addr saddr; - struct in6_addr daddr; --}; -+} __attribute__((packed, aligned(2))); - - - /* index values for the variables in ipv6_devconf */ ---- a/include/uapi/linux/tcp.h -+++ b/include/uapi/linux/tcp.h -@@ -55,7 +55,7 @@ struct tcphdr { - __be16 window; - __sum16 check; - __be16 urg_ptr; --}; -+} __attribute__((packed, aligned(2))); - - /* - * The union cast uses a gcc extension to avoid aliasing problems -@@ -65,7 +65,7 @@ struct tcphdr { - union tcp_word_hdr { - struct tcphdr hdr; - __be32 words[5]; --}; -+} __attribute__((packed, aligned(2))); - - #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) - ---- a/include/uapi/linux/udp.h -+++ b/include/uapi/linux/udp.h -@@ -25,7 +25,7 @@ struct udphdr { - __be16 dest; - __be16 len; - __sum16 check; --}; -+} __attribute__((packed, aligned(2))); - - /* UDP socket options */ - #define UDP_CORK 1 /* Never send partially complete segments */ ---- a/net/netfilter/nf_conntrack_core.c -+++ b/net/netfilter/nf_conntrack_core.c -@@ -263,8 +263,8 @@ nf_ct_get_tuple(const struct sk_buff *sk - - switch (l3num) { - case NFPROTO_IPV4: -- tuple->src.u3.ip = ap[0]; -- tuple->dst.u3.ip = ap[1]; -+ tuple->src.u3.ip = net_hdr_word(ap++); -+ tuple->dst.u3.ip = net_hdr_word(ap); - break; - case NFPROTO_IPV6: - memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6)); ---- a/include/uapi/linux/icmp.h -+++ b/include/uapi/linux/icmp.h -@@ -82,7 +82,7 @@ struct icmphdr { - } frag; - __u8 reserved[4]; - } un; --}; -+} __attribute__((packed, aligned(2))); - - - /* ---- a/include/uapi/linux/in6.h -+++ b/include/uapi/linux/in6.h -@@ -43,7 +43,7 @@ struct in6_addr { - #define s6_addr16 in6_u.u6_addr16 - #define s6_addr32 in6_u.u6_addr32 - #endif --}; -+} __attribute__((packed, aligned(2))); - #endif /* __UAPI_DEF_IN6_ADDR */ - - #if __UAPI_DEF_SOCKADDR_IN6 ---- a/net/ipv6/tcp_ipv6.c -+++ b/net/ipv6/tcp_ipv6.c -@@ -39,6 +39,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -836,10 +837,10 @@ static void tcp_v6_send_response(const s - topt = (__be32 *)(t1 + 1); - - if (tsecr) { -- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); -- *topt++ = htonl(tsval); -- *topt++ = htonl(tsecr); -+ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); -+ put_unaligned_be32(tsval, topt++); -+ put_unaligned_be32(tsecr, topt++); - } - - #ifdef CONFIG_TCP_MD5SIG ---- a/include/linux/ipv6.h -+++ b/include/linux/ipv6.h -@@ -6,6 +6,7 @@ - - #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) - #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) -+ - /* - * This structure contains configuration options per IPv6 link. - */ ---- a/net/ipv6/datagram.c -+++ b/net/ipv6/datagram.c -@@ -480,7 +480,7 @@ int ipv6_recv_error(struct sock *sk, str - ipv6_iface_scope_id(&sin->sin6_addr, - IP6CB(skb)->iif); - } else { -- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), -+ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), - &sin->sin6_addr); - sin->sin6_scope_id = 0; - } -@@ -830,12 +830,12 @@ int ip6_datagram_send_ctl(struct net *ne - } - - if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { -- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { -+ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { - err = -EINVAL; - goto exit_f; - } - } -- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); -+ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); - break; - - case IPV6_2292HOPOPTS: ---- a/net/ipv6/ip6_gre.c -+++ b/net/ipv6/ip6_gre.c -@@ -455,7 +455,7 @@ static void ip6gre_err(struct sk_buff *s - return; - ipv6h = (const struct ipv6hdr *)skb->data; - greh = (const struct gre_base_hdr *)(skb->data + offset); -- key = key_off ? *(__be32 *)(skb->data + key_off) : 0; -+ key = key_off ? net_hdr_word((__be32 *)(skb->data + key_off)) : 0; - - t = ip6gre_tunnel_lookup(skb->dev, &ipv6h->daddr, &ipv6h->saddr, - key, greh->protocol); ---- a/net/ipv6/exthdrs.c -+++ b/net/ipv6/exthdrs.c -@@ -756,7 +756,7 @@ static bool ipv6_hop_jumbo(struct sk_buf - goto drop; - } - -- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); -+ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); - if (pkt_len <= IPV6_MAXPLEN) { - __IP6_INC_STATS(net, idev, IPSTATS_MIB_INHDRERRORS); - icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2); ---- a/include/linux/types.h -+++ b/include/linux/types.h -@@ -230,5 +230,11 @@ struct callback_head { - typedef void (*rcu_callback_t)(struct rcu_head *head); - typedef void (*call_rcu_func_t)(struct rcu_head *head, rcu_callback_t func); - -+struct net_hdr_word { -+ u32 words[1]; -+} __attribute__((packed, aligned(2))); -+ -+#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) -+ - #endif /* __ASSEMBLY__ */ - #endif /* _LINUX_TYPES_H */ ---- a/net/ipv4/af_inet.c -+++ b/net/ipv4/af_inet.c -@@ -1422,8 +1422,8 @@ struct sk_buff *inet_gro_receive(struct - if (unlikely(ip_fast_csum((u8 *)iph, 5))) - goto out_unlock; - -- id = ntohl(*(__be32 *)&iph->id); -- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); -+ id = ntohl(net_hdr_word(&iph->id)); -+ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); - id >>= 16; - - list_for_each_entry(p, head, list) { ---- a/net/ipv4/route.c -+++ b/net/ipv4/route.c -@@ -449,7 +449,7 @@ static struct neighbour *ipv4_neigh_look - else if (skb) - pkey = &ip_hdr(skb)->daddr; - -- n = __ipv4_neigh_lookup(dev, *(__force u32 *)pkey); -+ n = __ipv4_neigh_lookup(dev, net_hdr_word(pkey)); - if (n) - return n; - return neigh_create(&arp_tbl, pkey, dev); ---- a/net/ipv4/tcp_output.c -+++ b/net/ipv4/tcp_output.c -@@ -447,48 +447,53 @@ static void tcp_options_write(__be32 *pt - u16 options = opts->options; /* mungable copy */ - - if (unlikely(OPTION_MD5 & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); - /* overload cookie hash location */ - opts->hash_location = (__u8 *)ptr; - ptr += 4; - } - - if (unlikely(opts->mss)) { -- *ptr++ = htonl((TCPOPT_MSS << 24) | -- (TCPOLEN_MSS << 16) | -- opts->mss); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | -+ opts->mss); - } - - if (likely(OPTION_TS & options)) { - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | -- (TCPOLEN_SACK_PERM << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_SACK_PERM << 24) | -+ (TCPOLEN_SACK_PERM << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - options &= ~OPTION_SACK_ADVERTISE; - } else { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - } -- *ptr++ = htonl(opts->tsval); -- *ptr++ = htonl(opts->tsecr); -+ net_hdr_word(ptr++) = htonl(opts->tsval); -+ net_hdr_word(ptr++) = htonl(opts->tsecr); - } - - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK_PERM << 8) | -- TCPOLEN_SACK_PERM); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK_PERM << 8) | -+ TCPOLEN_SACK_PERM); - } - - if (unlikely(OPTION_WSCALE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_WINDOW << 16) | -- (TCPOLEN_WINDOW << 8) | -- opts->ws); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_WINDOW << 16) | -+ (TCPOLEN_WINDOW << 8) | -+ opts->ws); - } - - if (unlikely(opts->num_sack_blocks)) { -@@ -496,16 +501,17 @@ static void tcp_options_write(__be32 *pt - tp->duplicate_sack : tp->selective_acks; - int this_sack; - -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK << 8) | -- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK << 8) | -+ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * - TCPOLEN_SACK_PERBLOCK))); - - for (this_sack = 0; this_sack < opts->num_sack_blocks; - ++this_sack) { -- *ptr++ = htonl(sp[this_sack].start_seq); -- *ptr++ = htonl(sp[this_sack].end_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); - } - - tp->rx_opt.dsack = 0; -@@ -518,13 +524,14 @@ static void tcp_options_write(__be32 *pt - - if (foc->exp) { - len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; -- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | -+ net_hdr_word(ptr) = -+ htonl((TCPOPT_EXP << 24) | (len << 16) | - TCPOPT_FASTOPEN_MAGIC); - p += TCPOLEN_EXP_FASTOPEN_BASE; - } else { - len = TCPOLEN_FASTOPEN_BASE + foc->len; -- *p++ = TCPOPT_FASTOPEN; -- *p++ = len; -+ net_hdr_word(p++) = TCPOPT_FASTOPEN; -+ net_hdr_word(p++) = len; - } - - memcpy(p, foc->val, foc->len); ---- a/include/uapi/linux/igmp.h -+++ b/include/uapi/linux/igmp.h -@@ -33,7 +33,7 @@ struct igmphdr { - __u8 code; /* For newer IGMP */ - __sum16 csum; - __be32 group; --}; -+} __attribute__((packed, aligned(2))); - - /* V3 group record types [grec_type] */ - #define IGMPV3_MODE_IS_INCLUDE 1 -@@ -49,7 +49,7 @@ struct igmpv3_grec { - __be16 grec_nsrcs; - __be32 grec_mca; - __be32 grec_src[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_report { - __u8 type; -@@ -58,7 +58,7 @@ struct igmpv3_report { - __be16 resv2; - __be16 ngrec; - struct igmpv3_grec grec[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_query { - __u8 type; -@@ -79,7 +79,7 @@ struct igmpv3_query { - __u8 qqic; - __be16 nsrcs; - __be32 srcs[0]; --}; -+} __attribute__((packed, aligned(2))); - - #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ - #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ ---- a/net/core/flow_dissector.c -+++ b/net/core/flow_dissector.c -@@ -111,7 +111,7 @@ __be32 __skb_flow_get_ports(const struct - ports = __skb_header_pointer(skb, thoff + poff, - sizeof(_ports), data, hlen, &_ports); - if (ports) -- return *ports; -+ return (__be32)net_hdr_word(ports); - } - - return 0; ---- a/include/uapi/linux/icmpv6.h -+++ b/include/uapi/linux/icmpv6.h -@@ -77,7 +77,7 @@ struct icmp6hdr { - #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other - #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime - #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref --}; -+} __attribute__((packed, aligned(2))); - - - #define ICMPV6_ROUTER_PREF_LOW 0x3 ---- a/include/net/ndisc.h -+++ b/include/net/ndisc.h -@@ -89,7 +89,7 @@ struct ra_msg { - struct icmp6hdr icmph; - __be32 reachable_time; - __be32 retrans_timer; --}; -+} __attribute__((packed, aligned(2))); - - struct rd_msg { - struct icmp6hdr icmph; -@@ -368,10 +368,10 @@ static inline u32 ndisc_hashfn(const voi - { - const u32 *p32 = pkey; - -- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + -- (p32[1] * hash_rnd[1]) + -- (p32[2] * hash_rnd[2]) + -- (p32[3] * hash_rnd[3])); -+ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + -+ (net_hdr_word(&p32[1]) * hash_rnd[1]) + -+ (net_hdr_word(&p32[2]) * hash_rnd[2]) + -+ (net_hdr_word(&p32[3]) * hash_rnd[3])); - } - - static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) ---- a/net/sched/cls_u32.c -+++ b/net/sched/cls_u32.c -@@ -165,7 +165,7 @@ next_knode: - data = skb_header_pointer(skb, toff, 4, &hdata); - if (!data) - goto out; -- if ((*data ^ key->val) & key->mask) { -+ if ((net_hdr_word(data) ^ key->val) & key->mask) { - n = rcu_dereference_bh(n->next); - goto next_knode; - } -@@ -218,8 +218,8 @@ check_terminal: - &hdata); - if (!data) - goto out; -- sel = ht->divisor & u32_hash_fold(*data, &n->sel, -- n->fshift); -+ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), -+ &n->sel, n->fshift); - } - if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) - goto next_ht; ---- a/net/ipv6/ip6_offload.c -+++ b/net/ipv6/ip6_offload.c -@@ -223,7 +223,7 @@ static struct sk_buff *ipv6_gro_receive( - continue; - - iph2 = (struct ipv6hdr *)(p->data + off); -- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; -+ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); - - /* All fields must match except length and Traffic Class. - * XXX skbs on the gro_list have all been parsed and pulled ---- a/include/net/addrconf.h -+++ b/include/net/addrconf.h -@@ -47,7 +47,7 @@ struct prefix_info { - __be32 reserved2; - - struct in6_addr prefix; --}; -+} __attribute__((packed, aligned(2))); - - #include - #include ---- a/include/net/inet_ecn.h -+++ b/include/net/inet_ecn.h -@@ -126,9 +126,9 @@ static inline int IP6_ECN_set_ce(struct - if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) - return 0; - -- from = *(__be32 *)iph; -+ from = net_hdr_word(iph); - to = from | htonl(INET_ECN_CE << 20); -- *(__be32 *)iph = to; -+ net_hdr_word(iph) = to; - if (skb->ip_summed == CHECKSUM_COMPLETE) - skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from), - (__force __wsum)to); ---- a/include/net/ipv6.h -+++ b/include/net/ipv6.h -@@ -149,7 +149,7 @@ struct frag_hdr { - __u8 reserved; - __be16 frag_off; - __be32 identification; --}; -+} __attribute__((packed, aligned(2))); - - #define IP6_MF 0x0001 - #define IP6_OFFSET 0xFFF8 -@@ -499,8 +499,8 @@ static inline void __ipv6_addr_set_half( - } - #endif - #endif -- addr[0] = wh; -- addr[1] = wl; -+ net_hdr_word(&addr[0]) = wh; -+ net_hdr_word(&addr[1]) = wl; - } - - static inline void ipv6_addr_set(struct in6_addr *addr, -@@ -559,6 +559,8 @@ static inline bool ipv6_prefix_equal(con - const __be32 *a1 = addr1->s6_addr32; - const __be32 *a2 = addr2->s6_addr32; - unsigned int pdw, pbi; -+ /* Used for last <32-bit fraction of prefix */ -+ u32 pbia1, pbia2; - - /* check complete u32 in prefix */ - pdw = prefixlen >> 5; -@@ -567,7 +569,9 @@ static inline bool ipv6_prefix_equal(con - - /* check incomplete u32 in prefix */ - pbi = prefixlen & 0x1f; -- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) -+ pbia1 = net_hdr_word(&a1[pdw]); -+ pbia2 = net_hdr_word(&a2[pdw]); -+ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) - return false; - - return true; -@@ -683,13 +687,13 @@ static inline void ipv6_addr_set_v4mappe - */ - static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) - { -- const __be32 *a1 = token1, *a2 = token2; -+ const struct in6_addr *a1 = token1, *a2 = token2; - int i; - - addrlen >>= 2; - - for (i = 0; i < addrlen; i++) { -- __be32 xb = a1[i] ^ a2[i]; -+ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; - if (xb) - return i * 32 + 31 - __fls(ntohl(xb)); - } -@@ -876,17 +880,18 @@ static inline int ip6_multipath_hash_pol - static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, - __be32 flowlabel) - { -- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; -+ net_hdr_word((__be32 *)hdr) = -+ htonl(0x60000000 | (tclass << 20)) | flowlabel; - } - - static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; - } - - static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; - } - - static inline u8 ip6_tclass(__be32 flowinfo) ---- a/include/net/secure_seq.h -+++ b/include/net/secure_seq.h -@@ -3,6 +3,7 @@ - #define _NET_SECURE_SEQ - - #include -+#include - - u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); - u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, ---- a/include/uapi/linux/in.h -+++ b/include/uapi/linux/in.h -@@ -84,7 +84,7 @@ enum { - /* Internet address. */ - struct in_addr { - __be32 s_addr; --}; -+} __attribute__((packed, aligned(2))); - #endif - - #define IP_TOS 1 ---- a/net/ipv6/ip6_fib.c -+++ b/net/ipv6/ip6_fib.c -@@ -142,7 +142,7 @@ static __be32 addr_bit_set(const void *t - * See include/asm-generic/bitops/le.h. - */ - return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & -- addr[fn_bit >> 5]; -+ net_hdr_word(&addr[fn_bit >> 5]); - } - - struct fib6_info *fib6_info_alloc(gfp_t gfp_flags) ---- a/net/netfilter/nf_conntrack_proto_tcp.c -+++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -423,7 +423,7 @@ static void tcp_sack(const struct sk_buf - - /* Fast path for timestamp-only option */ - if (length == TCPOLEN_TSTAMP_ALIGNED -- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) -+ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) - | (TCPOPT_NOP << 16) - | (TCPOPT_TIMESTAMP << 8) - | TCPOLEN_TIMESTAMP)) ---- a/net/xfrm/xfrm_input.c -+++ b/net/xfrm/xfrm_input.c -@@ -194,8 +194,8 @@ int xfrm_parse_spi(struct sk_buff *skb, - if (!pskb_may_pull(skb, hlen)) - return -EINVAL; - -- *spi = *(__be32 *)(skb_transport_header(skb) + offset); -- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); -+ *spi = net_hdr_word(skb_transport_header(skb) + offset); -+ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); - return 0; - } - EXPORT_SYMBOL(xfrm_parse_spi); ---- a/net/ipv4/tcp_input.c -+++ b/net/ipv4/tcp_input.c -@@ -3907,14 +3907,16 @@ static bool tcp_parse_aligned_timestamp( - { - const __be32 *ptr = (const __be32 *)(th + 1); - -- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) -- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { -+ if (net_hdr_word(ptr) == -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { - tp->rx_opt.saw_tstamp = 1; - ++ptr; -- tp->rx_opt.rcv_tsval = ntohl(*ptr); -+ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); - ++ptr; -- if (*ptr) -- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; -+ if (net_hdr_word(ptr)) -+ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - -+ tp->tsoffset; - else - tp->rx_opt.rcv_tsecr = 0; - return true; ---- a/include/uapi/linux/if_pppox.h -+++ b/include/uapi/linux/if_pppox.h -@@ -51,6 +51,7 @@ struct pppoe_addr { - */ - struct pptp_addr { - __u16 call_id; -+ __u16 pad; - struct in_addr sin_addr; - }; - ---- a/net/ipv6/netfilter/nf_log_ipv6.c -+++ b/net/ipv6/netfilter/nf_log_ipv6.c -@@ -66,9 +66,9 @@ static void dump_ipv6_packet(struct net - /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ - nf_log_buf_add(m, "LEN=%zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", - ntohs(ih->payload_len) + sizeof(struct ipv6hdr), -- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, -+ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, - ih->hop_limit, -- (ntohl(*(__be32 *)ih) & 0x000fffff)); -+ (ntohl(net_hdr_word(ih)) & 0x000fffff)); - - fragment = 0; - ptr = ip6hoff + sizeof(struct ipv6hdr); ---- a/include/net/neighbour.h -+++ b/include/net/neighbour.h -@@ -266,8 +266,10 @@ static inline bool neigh_key_eq128(const - const u32 *n32 = (const u32 *)n->primary_key; - const u32 *p32 = pkey; - -- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | -- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; -+ return ((n32[0] ^ net_hdr_word(&p32[0])) | -+ (n32[1] ^ net_hdr_word(&p32[1])) | -+ (n32[2] ^ net_hdr_word(&p32[2])) | -+ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; - } - - static inline struct neighbour *___neigh_lookup_noref( ---- a/include/uapi/linux/netfilter_arp/arp_tables.h -+++ b/include/uapi/linux/netfilter_arp/arp_tables.h -@@ -70,7 +70,7 @@ struct arpt_arp { - __u8 flags; - /* Inverse flags */ - __u16 invflags; --}; -+} __attribute__((aligned(4))); - - /* Values for "flag" field in struct arpt_ip (general arp structure). - * No flags defined yet. ---- a/net/core/utils.c -+++ b/net/core/utils.c -@@ -464,8 +464,14 @@ void inet_proto_csum_replace16(__sum16 * - bool pseudohdr) - { - __be32 diff[] = { -- ~from[0], ~from[1], ~from[2], ~from[3], -- to[0], to[1], to[2], to[3], -+ ~net_hdr_word(&from[0]), -+ ~net_hdr_word(&from[1]), -+ ~net_hdr_word(&from[2]), -+ ~net_hdr_word(&from[3]), -+ net_hdr_word(&to[0]), -+ net_hdr_word(&to[1]), -+ net_hdr_word(&to[2]), -+ net_hdr_word(&to[3]), - }; - if (skb->ip_summed != CHECKSUM_PARTIAL) { - *sum = csum_fold(csum_partial(diff, sizeof(diff), ---- a/include/linux/etherdevice.h -+++ b/include/linux/etherdevice.h -@@ -480,7 +480,7 @@ static inline bool is_etherdev_addr(cons - * @b: Pointer to Ethernet header - * - * Compare two Ethernet headers, returns 0 if equal. -- * This assumes that the network header (i.e., IP header) is 4-byte -+ * This assumes that the network header (i.e., IP header) is 2-byte - * aligned OR the platform can handle unaligned access. This is the - * case for all packets coming into netif_receive_skb or similar - * entry points. -@@ -503,11 +503,12 @@ static inline unsigned long compare_ethe - fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); - return fold; - #else -- u32 *a32 = (u32 *)((u8 *)a + 2); -- u32 *b32 = (u32 *)((u8 *)b + 2); -+ const u16 *a16 = a; -+ const u16 *b16 = b; - -- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | -- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]); -+ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) | -+ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) | -+ (a16[6] ^ b16[6]); - #endif - } - ---- a/net/ipv4/tcp_offload.c -+++ b/net/ipv4/tcp_offload.c -@@ -226,7 +226,7 @@ struct sk_buff *tcp_gro_receive(struct l - - th2 = tcp_hdr(p); - -- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) { -+ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) { - NAPI_GRO_CB(p)->same_flow = 0; - continue; - } -@@ -244,8 +244,8 @@ found: - ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); - flush |= (__force int)(th->ack_seq ^ th2->ack_seq); - for (i = sizeof(*th); i < thlen; i += 4) -- flush |= *(u32 *)((u8 *)th + i) ^ -- *(u32 *)((u8 *)th2 + i); -+ flush |= net_hdr_word((u8 *)th + i) ^ -+ net_hdr_word((u8 *)th2 + i); - - /* When we receive our second frame we can made a decision on if we - * continue this flow as an atomic flow with a fixed ID or if we use ---- a/net/ipv6/netfilter/ip6table_mangle.c -+++ b/net/ipv6/netfilter/ip6table_mangle.c -@@ -50,7 +50,7 @@ ip6t_mangle_out(struct sk_buff *skb, con - hop_limit = ipv6_hdr(skb)->hop_limit; - - /* flowlabel and prio (includes version, which shouldn't change either */ -- flowlabel = *((u_int32_t *)ipv6_hdr(skb)); -+ flowlabel = net_hdr_word(ipv6_hdr(skb)); - - ret = ip6t_do_table(skb, state, state->net->ipv6.ip6table_mangle); - -@@ -59,7 +59,7 @@ ip6t_mangle_out(struct sk_buff *skb, con - !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || - skb->mark != mark || - ipv6_hdr(skb)->hop_limit != hop_limit || -- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) { -+ flowlabel != net_hdr_word(ipv6_hdr(skb)))) { - err = ip6_route_me_harder(state->net, skb); - if (err < 0) - ret = NF_DROP_ERR(err); diff --git a/target/linux/ath79/patches-4.19/920-mikrotik-rb4xx.patch b/target/linux/ath79/patches-4.19/920-mikrotik-rb4xx.patch deleted file mode 100644 index 8d84b9e1cd..0000000000 --- a/target/linux/ath79/patches-4.19/920-mikrotik-rb4xx.patch +++ /dev/null @@ -1,69 +0,0 @@ ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -1899,5 +1899,13 @@ config RAVE_SP_CORE - Select this to get support for the Supervisory Processor - device found on several devices in RAVE line of hardware. - -+config MFD_RB4XX_CPLD -+ tristate "CPLD driver for Mikrotik RB4xx series boards -+ select MFD_CORE -+ depends on ATH79 || COMPILE_TEST -+ help -+ Enables support for the CPLD chip (NAND & GPIO) on Mikrotik -+ Routerboard RB4xx series. -+ - endmenu - endif ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -241,3 +241,4 @@ obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc - obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o - obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o - -+obj-$(CONFIG_MFD_RB4XX_CPLD) += rb4xx-cpld.o ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -1371,6 +1371,12 @@ config GPIO_XRA1403 - help - GPIO driver for EXAR XRA1403 16-bit SPI-based GPIO expander. - -+config GPIO_RB4XX -+ tristate "GPIO expander for Mikrotik RB4xx series boards" -+ depends on MFD_RB4XX_CPLD -+ help -+ GPIO driver for Mikrotik Routerboard RB4xx series. -+ - endmenu - - menu "USB GPIO expanders" ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -159,3 +159,4 @@ obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o - obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o - obj-$(CONFIG_GPIO_ZX) += gpio-zx.o - obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o -+obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -569,4 +569,11 @@ config MTD_NAND_AR934X - Enables support for NAND controller on Qualcomm Atheros SoCs. - This controller is found on AR934x and QCA955x SoCs. - -+config MTD_NAND_RB4XX -+ tristate "Support for NAND driver for Mikrotik RB4xx series boards" -+ depends on MFD_RB4XX_CPLD -+ help -+ Enables support for the NAND flash chip on Mikrotik Routerboard -+ RB4xx series. -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_QCOM) += qcom_nan - obj-$(CONFIG_MTD_NAND_MTK) += mtk_ecc.o mtk_nand.o - obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o - obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o -+obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o - - nand-objs := nand_base.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_amd.o diff --git a/target/linux/ath79/patches-4.19/921-serial-core-add-support-for-boot-console-with-arbitr.patch b/target/linux/ath79/patches-4.19/921-serial-core-add-support-for-boot-console-with-arbitr.patch deleted file mode 100644 index f726b05200..0000000000 --- a/target/linux/ath79/patches-4.19/921-serial-core-add-support-for-boot-console-with-arbitr.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 4d3c17975c7814884a721fe693b3adf5c426d759 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Tue, 10 Nov 2015 22:18:39 +0100 -Subject: [RFC] serial: core: add support for boot console with arbitrary - baud rates - -The Arduino Yun uses a baud rate of 250000 by default. The serial is -going over the Atmel ATmega and is used to connect to this chip. -Without this patch Linux wants to switch the console to 9600 Baud. - -With this patch Linux will use the configured baud rate and not a -default one specified in uart_register_driver(). - -Signed-off-by: Hauke Mehrtens -[rebased to 4.14, slightly reworded commit message] -Signed-off-by: Sungbo Eo ---- - drivers/tty/serial/serial_core.c | 6 +++++- - include/linux/console.h | 1 + - 2 files changed, 6 insertions(+), 1 deletions(-) - ---- a/drivers/tty/serial/serial_core.c -+++ b/drivers/tty/serial/serial_core.c -@@ -219,6 +219,8 @@ static int uart_port_startup(struct tty_ - if (retval == 0) { - if (uart_console(uport) && uport->cons->cflag) { - tty->termios.c_cflag = uport->cons->cflag; -+ tty->termios.c_ospeed = uport->cons->baud; -+ tty->termios.c_ispeed = uport->cons->baud; - uport->cons->cflag = 0; - } - /* -@@ -2058,8 +2060,10 @@ uart_set_options(struct uart_port *port, - * Allow the setting of the UART parameters with a NULL console - * too: - */ -- if (co) -+ if (co) { - co->cflag = termios.c_cflag; -+ co->baud = baud; -+ } - - return 0; - } ---- a/include/linux/console.h -+++ b/include/linux/console.h -@@ -153,6 +153,7 @@ struct console { - short flags; - short index; - int cflag; -+ int baud; - void *data; - struct console *next; - }; diff --git a/target/linux/bcm47xx/config-4.19 b/target/linux/bcm47xx/config-4.19 deleted file mode 100644 index 2747efc04d..0000000000 --- a/target/linux/bcm47xx/config-4.19 +++ /dev/null @@ -1,208 +0,0 @@ -CONFIG_ADM6996_PHY=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_BCM47XX=y -CONFIG_BCM47XX_BCMA=y -CONFIG_BCM47XX_NVRAM=y -CONFIG_BCM47XX_SPROM=y -CONFIG_BCM47XX_SSB=y -CONFIG_BCM47XX_WDT=y -CONFIG_BCMA=y -CONFIG_BCMA_BLOCKIO=y -CONFIG_BCMA_DEBUG=y -CONFIG_BCMA_DRIVER_GMAC_CMN=y -CONFIG_BCMA_DRIVER_GPIO=y -CONFIG_BCMA_DRIVER_MIPS=y -CONFIG_BCMA_DRIVER_PCI=y -CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y -CONFIG_BCMA_HOST_PCI=y -CONFIG_BCMA_HOST_PCI_POSSIBLE=y -CONFIG_BCMA_HOST_SOC=y -CONFIG_BCMA_NFLASH=y -CONFIG_BCMA_PFLASH=y -CONFIG_BCMA_SFLASH=y -# CONFIG_BGMAC_BCMA is not set -CONFIG_BLK_MQ_PCI=y -CONFIG_CEVT_R4K=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="noinitrd console=ttyS0,115200" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -# CONFIG_CPU_BMIPS is not set -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -CONFIG_CPU_MIPSR1=y -CONFIG_CPU_MIPSR2_IRQ_VI=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_R4K_FPU=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_NONCOHERENT_OPS=y -# CONFIG_EARLY_PRINTK is not set -CONFIG_FIXED_PHY=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_WDT=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -CONFIG_LEDS_GPIO_REGISTER=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set -CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_BCM47XXSFLASH=y -CONFIG_MTD_BCM47XX_PARTS=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_BCM47XXNFLASH=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_PARSER_TRX=y -CONFIG_MTD_PHYSMAP=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NO_EXCEPT_FILL=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -# CONFIG_OF is not set -CONFIG_PCI=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SRCU=y -CONFIG_SSB=y -CONFIG_SSB_B43_PCI_BRIDGE=y -CONFIG_SSB_BLOCKIO=y -CONFIG_SSB_DRIVER_EXTIF=y -CONFIG_SSB_DRIVER_GIGE=y -CONFIG_SSB_DRIVER_GPIO=y -CONFIG_SSB_DRIVER_MIPS=y -CONFIG_SSB_DRIVER_PCICORE=y -CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y -CONFIG_SSB_EMBEDDED=y -CONFIG_SSB_HOST_SOC=y -CONFIG_SSB_PCICORE_HOSTMODE=y -CONFIG_SSB_PCIHOST=y -CONFIG_SSB_PCIHOST_POSSIBLE=y -CONFIG_SSB_SERIAL=y -CONFIG_SSB_SFLASH=y -CONFIG_SSB_SPROM=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_B53=y -# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set -CONFIG_SWCONFIG_B53_PHY_DRIVER=y -CONFIG_SWCONFIG_B53_PHY_FIXUP=y -# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_BMIPS=y -CONFIG_SYS_HAS_CPU_BMIPS32_3300=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_HAS_CPU_MIPS32_R2=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_HIGHMEM=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_SYS_SUPPORTS_MIPS16=y -CONFIG_SYS_SUPPORTS_ZBOOT=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y -CONFIG_WATCHDOG_CORE=y diff --git a/target/linux/bcm47xx/patches-4.19/031-v5.1-mips-bcm47xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch b/target/linux/bcm47xx/patches-4.19/031-v5.1-mips-bcm47xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch deleted file mode 100644 index 34a79f9d5b..0000000000 --- a/target/linux/bcm47xx/patches-4.19/031-v5.1-mips-bcm47xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch +++ /dev/null @@ -1,34 +0,0 @@ -From cdb8faa00e3fcdd0ad10add743516d616dc7d38e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Mon, 11 Mar 2019 22:08:22 +0100 -Subject: [PATCH] mips: bcm47xx: Enable USB power on Netgear WNDR3400v2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Eric has reported on OpenWrt's bug tracking system[1], that he's not -able to use USB devices on his WNDR3400v2 device after the boot, until -he turns on GPIO #21 manually through sysfs. - -1. https://bugs.openwrt.org/index.php?do=details&task_id=2170 - -Cc: Rafał Miłecki -Cc: Hauke Mehrtens -Reported-by: Eric Bohlman -Tested-by: Eric Bohlman -Signed-off-by: Petr Štetiar -Signed-off-by: Paul Burton ---- - arch/mips/bcm47xx/workarounds.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/mips/bcm47xx/workarounds.c -+++ b/arch/mips/bcm47xx/workarounds.c -@@ -24,6 +24,7 @@ void __init bcm47xx_workarounds(void) - case BCM47XX_BOARD_NETGEAR_WNR3500L: - bcm47xx_workarounds_enable_usb_power(12); - break; -+ case BCM47XX_BOARD_NETGEAR_WNDR3400V2: - case BCM47XX_BOARD_NETGEAR_WNDR3400_V3: - bcm47xx_workarounds_enable_usb_power(21); - break; diff --git a/target/linux/bcm47xx/patches-4.19/032-v5.4-MIPS-BCM47XX-Add-support-for-Netgear-R6200v1.patch b/target/linux/bcm47xx/patches-4.19/032-v5.4-MIPS-BCM47XX-Add-support-for-Netgear-R6200v1.patch deleted file mode 100644 index c09c65c5fd..0000000000 --- a/target/linux/bcm47xx/patches-4.19/032-v5.4-MIPS-BCM47XX-Add-support-for-Netgear-R6200v1.patch +++ /dev/null @@ -1,46 +0,0 @@ ---- a/arch/mips/bcm47xx/board.c -+++ b/arch/mips/bcm47xx/board.c -@@ -160,6 +160,7 @@ struct bcm47xx_board_type_list1 bcm47xx_ - {{BCM47XX_BOARD_LUXUL_XVW_P30_V1, "Luxul XVW-P30 V1"}, "luxul_xvwp30_v1"}, - {{BCM47XX_BOARD_LUXUL_XWR_600_V1, "Luxul XWR-600 V1"}, "luxul_xwr600_v1"}, - {{BCM47XX_BOARD_LUXUL_XWR_1750_V1, "Luxul XWR-1750 V1"}, "luxul_xwr1750_v1"}, -+ {{BCM47XX_BOARD_NETGEAR_R6200_V1, "Netgear R6200 V1"}, "U12H192T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"}, ---- a/arch/mips/bcm47xx/buttons.c -+++ b/arch/mips/bcm47xx/buttons.c -@@ -385,6 +385,13 @@ bcm47xx_buttons_motorola_wr850gv2v3[] __ - /* Netgear */ - - static const struct gpio_keys_button -+bcm47xx_buttons_netgear_r6200_v1[] __initconst = { -+ BCM47XX_GPIO_KEY(2, KEY_RFKILL), -+ BCM47XX_GPIO_KEY(3, KEY_RESTART), -+ BCM47XX_GPIO_KEY(4, KEY_WPS_BUTTON), -+}; -+ -+static const struct gpio_keys_button - bcm47xx_buttons_netgear_wndr3400v1[] __initconst = { - BCM47XX_GPIO_KEY(4, KEY_RESTART), - BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON), -@@ -664,6 +671,9 @@ int __init bcm47xx_buttons_register(void - err = bcm47xx_copy_bdata(bcm47xx_buttons_motorola_wr850gv2v3); - break; - -+ case BCM47XX_BOARD_NETGEAR_R6200_V1: -+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6200_v1); -+ break; - case BCM47XX_BOARD_NETGEAR_WNDR3400V1: - err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1); - break; ---- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h -+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h -@@ -98,6 +98,7 @@ enum bcm47xx_board { - BCM47XX_BOARD_MOTOROLA_WR850GP, - BCM47XX_BOARD_MOTOROLA_WR850GV2V3, - -+ BCM47XX_BOARD_NETGEAR_R6200_V1, - BCM47XX_BOARD_NETGEAR_WGR614V8, - BCM47XX_BOARD_NETGEAR_WGR614V9, - BCM47XX_BOARD_NETGEAR_WGR614_V10, diff --git a/target/linux/bcm47xx/patches-4.19/159-cpu_fixes.patch b/target/linux/bcm47xx/patches-4.19/159-cpu_fixes.patch deleted file mode 100644 index 8ce76839c7..0000000000 --- a/target/linux/bcm47xx/patches-4.19/159-cpu_fixes.patch +++ /dev/null @@ -1,510 +0,0 @@ ---- a/arch/mips/include/asm/r4kcache.h -+++ b/arch/mips/include/asm/r4kcache.h -@@ -26,6 +26,38 @@ - extern void (*r4k_blast_dcache)(void); - extern void (*r4k_blast_icache)(void); - -+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2) -+#include -+#include -+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg() -+ -+static inline unsigned long bcm4710_dummy_rreg(void) -+{ -+ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE)); -+} -+ -+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr)) -+ -+static inline unsigned long bcm4710_fill_tlb(void *addr) -+{ -+ return *(unsigned long *)addr; -+} -+ -+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr)) -+ -+static inline void bcm4710_protected_fill_tlb(void *addr) -+{ -+ unsigned long x; -+ get_dbe(x, (unsigned long *)addr);; -+} -+ -+#else -+#define BCM4710_DUMMY_RREG() -+ -+#define BCM4710_FILL_TLB(addr) -+#define BCM4710_PROTECTED_FILL_TLB(addr) -+#endif -+ - /* - * This macro return a properly sign-extended address suitable as base address - * for indexed cache operations. Two issues here: -@@ -99,6 +131,7 @@ static inline void flush_icache_line_ind - static inline void flush_dcache_line_indexed(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Index_Writeback_Inv_D, addr); - __dflush_epilogue - } -@@ -126,6 +159,7 @@ static inline void flush_icache_line(uns - static inline void flush_dcache_line(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Hit_Writeback_Inv_D, addr); - __dflush_epilogue - } -@@ -133,6 +167,7 @@ static inline void flush_dcache_line(uns - static inline void invalidate_dcache_line(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Hit_Invalidate_D, addr); - __dflush_epilogue - } -@@ -206,6 +241,7 @@ static inline int protected_flush_icache - #ifdef CONFIG_EVA - return protected_cachee_op(Hit_Invalidate_I, addr); - #else -+ BCM4710_DUMMY_RREG(); - return protected_cache_op(Hit_Invalidate_I, addr); - #endif - } -@@ -219,6 +255,7 @@ static inline int protected_flush_icache - */ - static inline int protected_writeback_dcache_line(unsigned long addr) - { -+ BCM4710_DUMMY_RREG(); - #ifdef CONFIG_EVA - return protected_cachee_op(Hit_Writeback_Inv_D, addr); - #else -@@ -576,8 +613,51 @@ static inline void invalidate_tcache_pag - : "r" (base), \ - "i" (op)); - -+static inline void blast_dcache(void) -+{ -+ unsigned long start = KSEG0; -+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways; -+ unsigned long end = (start + dcache_size); -+ -+ do { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Index_Writeback_Inv_D, start); -+ start += current_cpu_data.dcache.linesz; -+ } while(start < end); -+} -+ -+static inline void blast_dcache_page(unsigned long page) -+{ -+ unsigned long start = page; -+ unsigned long end = start + PAGE_SIZE; -+ -+ BCM4710_FILL_TLB(start); -+ do { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Hit_Writeback_Inv_D, start); -+ start += current_cpu_data.dcache.linesz; -+ } while(start < end); -+} -+ -+static inline void blast_dcache_page_indexed(unsigned long page) -+{ -+ unsigned long start = page; -+ unsigned long end = start + PAGE_SIZE; -+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; -+ unsigned long ws_end = current_cpu_data.dcache.ways << -+ current_cpu_data.dcache.waybit; -+ unsigned long ws, addr; -+ for (ws = 0; ws < ws_end; ws += ws_inc) { -+ start = page + ws; -+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Index_Writeback_Inv_D, addr); -+ } -+ } -+} -+ - /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */ --#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \ -+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra, war) \ - static inline void extra##blast_##pfx##cache##lsize(void) \ - { \ - unsigned long start = INDEX_BASE; \ -@@ -589,6 +669,7 @@ static inline void extra##blast_##pfx##c - \ - __##pfx##flush_prologue \ - \ -+ war \ - for (ws = 0; ws < ws_end; ws += ws_inc) \ - for (addr = start; addr < end; addr += lsize * 32) \ - cache##lsize##_unroll32(addr|ws, indexop); \ -@@ -603,6 +684,7 @@ static inline void extra##blast_##pfx##c - \ - __##pfx##flush_prologue \ - \ -+ war \ - do { \ - cache##lsize##_unroll32(start, hitop); \ - start += lsize * 32; \ -@@ -621,6 +703,8 @@ static inline void extra##blast_##pfx##c - current_cpu_data.desc.waybit; \ - unsigned long ws, addr; \ - \ -+ war \ -+ \ - __##pfx##flush_prologue \ - \ - for (ws = 0; ws < ws_end; ws += ws_inc) \ -@@ -630,26 +714,26 @@ static inline void extra##blast_##pfx##c - __##pfx##flush_epilogue \ - } - --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, ) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, ) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, ) --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, ) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, ) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, ) --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, ) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, ) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, ) --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, ) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, ) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, ) -- --__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, ) --__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, ) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, ) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, ) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, ) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, ) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, , ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, , BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, , ) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, , ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, , BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_, BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, , ) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, , ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, , BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, , ) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, , ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, , ) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, , ) -+ -+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, , ) -+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, , ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, , ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, , ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, , ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, , ) - - #define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \ - static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \ -@@ -678,53 +762,23 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde - __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) - - /* build blast_xxx_range, protected_blast_xxx_range */ --#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \ -+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra, war, war2) \ - static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \ - unsigned long end) \ - { \ - unsigned long lsize = cpu_##desc##_line_size(); \ -- unsigned long lsize_2 = lsize * 2; \ -- unsigned long lsize_3 = lsize * 3; \ -- unsigned long lsize_4 = lsize * 4; \ -- unsigned long lsize_5 = lsize * 5; \ -- unsigned long lsize_6 = lsize * 6; \ -- unsigned long lsize_7 = lsize * 7; \ -- unsigned long lsize_8 = lsize * 8; \ - unsigned long addr = start & ~(lsize - 1); \ -- unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \ -- int lines = (aend - addr) / lsize; \ -+ unsigned long aend = (end - 1) & ~(lsize - 1); \ -+ war \ - \ - __##pfx##flush_prologue \ - \ -- while (lines >= 8) { \ -- prot##cache_op(hitop, addr); \ -- prot##cache_op(hitop, addr + lsize); \ -- prot##cache_op(hitop, addr + lsize_2); \ -- prot##cache_op(hitop, addr + lsize_3); \ -- prot##cache_op(hitop, addr + lsize_4); \ -- prot##cache_op(hitop, addr + lsize_5); \ -- prot##cache_op(hitop, addr + lsize_6); \ -- prot##cache_op(hitop, addr + lsize_7); \ -- addr += lsize_8; \ -- lines -= 8; \ -- } \ -- \ -- if (lines & 0x4) { \ -- prot##cache_op(hitop, addr); \ -- prot##cache_op(hitop, addr + lsize); \ -- prot##cache_op(hitop, addr + lsize_2); \ -- prot##cache_op(hitop, addr + lsize_3); \ -- addr += lsize_4; \ -- } \ -- \ -- if (lines & 0x2) { \ -- prot##cache_op(hitop, addr); \ -- prot##cache_op(hitop, addr + lsize); \ -- addr += lsize_2; \ -- } \ -- \ -- if (lines & 0x1) { \ -+ while (1) { \ -+ war2 \ - prot##cache_op(hitop, addr); \ -+ if (addr == aend) \ -+ break; \ -+ addr += lsize; \ - } \ - \ - __##pfx##flush_epilogue \ -@@ -732,8 +786,8 @@ static inline void prot##extra##blast_## - - #ifndef CONFIG_EVA - --__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, ) --__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, ) -+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, , BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, , , ) - - #else - -@@ -770,15 +824,15 @@ __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache - __BUILD_PROT_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I) - - #endif --__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, ) -+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, , , ) - __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \ -- protected_, loongson2_) --__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , ) --__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , ) --__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , ) -+ protected_, loongson2_, , ) -+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , , BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , , , ) -+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , , , ) - /* blast_inv_dcache_range */ --__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , ) --__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , ) -+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , , , BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , , , ) - - /* Currently, this is very specific to Loongson-3 */ - #define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \ ---- a/arch/mips/include/asm/stackframe.h -+++ b/arch/mips/include/asm/stackframe.h -@@ -428,6 +428,10 @@ - eretnc - #else - .set arch=r4000 -+#ifdef CONFIG_BCM47XX -+ nop -+ nop -+#endif - eret - .set mips0 - #endif ---- a/arch/mips/kernel/genex.S -+++ b/arch/mips/kernel/genex.S -@@ -21,6 +21,19 @@ - #include - #include - -+#ifdef CONFIG_BCM47XX -+# ifdef eret -+# undef eret -+# endif -+# define eret \ -+ .set push; \ -+ .set noreorder; \ -+ nop; \ -+ nop; \ -+ eret; \ -+ .set pop; -+#endif -+ - __INIT - - /* -@@ -32,6 +45,9 @@ - NESTED(except_vec3_generic, 0, sp) - .set push - .set noat -+#ifdef CONFIG_BCM47XX -+ nop -+#endif - #if R5432_CP0_INTERRUPT_WAR - mfc0 k0, CP0_INDEX - #endif -@@ -55,6 +71,9 @@ NESTED(except_vec3_r4000, 0, sp) - .set push - .set arch=r4000 - .set noat -+#ifdef CONFIG_BCM47XX -+ nop -+#endif - mfc0 k1, CP0_CAUSE - li k0, 31<<2 - andi k1, k1, 0x7c ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -39,6 +39,9 @@ - #include - #include - -+/* For enabling BCM4710 cache workarounds */ -+static int bcm4710 = 0; -+ - /* - * Bits describing what cache ops an SMP callback function may perform. - * -@@ -190,6 +193,9 @@ static void r4k_blast_dcache_user_page_s - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache_page = blast_dcache_page; -+ else - if (dc_lsize == 0) - r4k_blast_dcache_user_page = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -208,6 +214,9 @@ static void r4k_blast_dcache_page_indexe - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed; -+ else - if (dc_lsize == 0) - r4k_blast_dcache_page_indexed = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -227,6 +236,9 @@ static void r4k_blast_dcache_setup(void) - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache = blast_dcache; -+ else - if (dc_lsize == 0) - r4k_blast_dcache = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -986,6 +998,8 @@ static void local_r4k_flush_cache_sigtra - } - - R4600_HIT_CACHEOP_WAR_IMPL; -+ BCM4710_PROTECTED_FILL_TLB(addr); -+ BCM4710_PROTECTED_FILL_TLB(addr + 4); - if (!cpu_has_ic_fills_f_dc) { - if (dc_lsize) - vaddr ? flush_dcache_line(addr & ~(dc_lsize - 1)) -@@ -1888,6 +1902,17 @@ static void coherency_setup(void) - * silly idea of putting something else there ... - */ - switch (current_cpu_type()) { -+ case CPU_BMIPS3300: -+ { -+ u32 cm; -+ cm = read_c0_diag(); -+ /* Enable icache */ -+ cm |= (1 << 31); -+ /* Enable dcache */ -+ cm |= (1 << 30); -+ write_c0_diag(cm); -+ } -+ break; - case CPU_R4000PC: - case CPU_R4000SC: - case CPU_R4000MC: -@@ -1934,6 +1959,15 @@ void r4k_cache_init(void) - extern void build_copy_page(void); - struct cpuinfo_mips *c = ¤t_cpu_data; - -+ /* Check if special workarounds are required */ -+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2) -+ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) { -+ printk("Enabling BCM4710A0 cache workarounds.\n"); -+ bcm4710 = 1; -+ } else -+#endif -+ bcm4710 = 0; -+ - probe_pcache(); - probe_vcache(); - setup_scache(); -@@ -2012,7 +2046,15 @@ void r4k_cache_init(void) - */ - local_r4k___flush_cache_all(NULL); - -+#ifdef CONFIG_BCM47XX -+ { -+ static void (*_coherency_setup)(void); -+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup); -+ _coherency_setup(); -+ } -+#else - coherency_setup(); -+#endif - board_cache_error_setup = r4k_cache_error_setup; - - /* ---- a/arch/mips/mm/tlbex.c -+++ b/arch/mips/mm/tlbex.c -@@ -979,6 +979,9 @@ void build_get_pgde32(u32 **p, unsigned - uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT); - uasm_i_addu(p, ptr, tmp, ptr); - #else -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - UASM_i_LA_mostly(p, ptr, pgdc); - #endif - uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */ -@@ -1340,6 +1343,9 @@ static void build_r4000_tlb_refill_handl - #ifdef CONFIG_64BIT - build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ - #else -+# ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+# endif - build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ - #endif - -@@ -1351,6 +1357,9 @@ static void build_r4000_tlb_refill_handl - build_update_entries(&p, K0, K1); - build_tlb_write_entry(&p, &l, &r, tlb_random); - uasm_l_leave(&l, p); -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+#endif - uasm_i_eret(&p); /* return from trap */ - } - #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT -@@ -2049,6 +2058,9 @@ build_r4000_tlbchange_handler_head(u32 * - #ifdef CONFIG_64BIT - build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */ - #else -+# ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+# endif - build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */ - #endif - -@@ -2095,6 +2107,9 @@ build_r4000_tlbchange_handler_tail(u32 * - build_tlb_write_entry(p, l, r, tlb_indexed); - uasm_l_leave(l, *p); - build_restore_work_registers(p); -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - uasm_i_eret(p); /* return from trap */ - - #ifdef CONFIG_64BIT diff --git a/target/linux/bcm47xx/patches-4.19/160-kmap_coherent.patch b/target/linux/bcm47xx/patches-4.19/160-kmap_coherent.patch deleted file mode 100644 index db5660bc32..0000000000 --- a/target/linux/bcm47xx/patches-4.19/160-kmap_coherent.patch +++ /dev/null @@ -1,78 +0,0 @@ -From: Jeff Hansen -Subject: [PATCH] kmap_coherent - -On ASUS WL-500gP there are some "Data bus error"s when executing simple -commands liks "ps" or "cat /proc/1/cmdline". - -This fixes OpenWrt ticket #1485: https://dev.openwrt.org/ticket/1485 ---- ---- a/arch/mips/include/asm/cpu-features.h -+++ b/arch/mips/include/asm/cpu-features.h -@@ -226,6 +226,9 @@ - #ifndef cpu_has_local_ebase - #define cpu_has_local_ebase 1 - #endif -+#ifndef cpu_use_kmap_coherent -+#define cpu_use_kmap_coherent 1 -+#endif - - /* - * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors ---- a/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h -+++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h -@@ -80,4 +80,6 @@ - #define cpu_scache_line_size() 0 - #define cpu_has_vz 0 - -+#define cpu_use_kmap_coherent 0 -+ - #endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */ ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -694,7 +694,7 @@ static inline void local_r4k_flush_cache - map_coherent = (cpu_has_dc_aliases && - page_mapcount(page) && - !Page_dcache_dirty(page)); -- if (map_coherent) -+ if (map_coherent && cpu_use_kmap_coherent) - vaddr = kmap_coherent(page, addr); - else - vaddr = kmap_atomic(page); -@@ -719,7 +719,7 @@ static inline void local_r4k_flush_cache - } - - if (vaddr) { -- if (map_coherent) -+ if (map_coherent && cpu_use_kmap_coherent) - kunmap_coherent(); - else - kunmap_atomic(vaddr); ---- a/arch/mips/mm/init.c -+++ b/arch/mips/mm/init.c -@@ -168,7 +168,7 @@ void copy_user_highpage(struct page *to, - void *vfrom, *vto; - - vto = kmap_atomic(to); -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapcount(from) && !Page_dcache_dirty(from)) { - vfrom = kmap_coherent(from, vaddr); - copy_page(vto, vfrom); -@@ -190,7 +190,7 @@ void copy_to_user_page(struct vm_area_st - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) - { -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapcount(page) && !Page_dcache_dirty(page)) { - void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); - memcpy(vto, src, len); -@@ -208,7 +208,7 @@ void copy_from_user_page(struct vm_area_ - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) - { -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapcount(page) && !Page_dcache_dirty(page)) { - void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); - memcpy(dst, vfrom, len); diff --git a/target/linux/bcm47xx/patches-4.19/209-b44-register-adm-switch.patch b/target/linux/bcm47xx/patches-4.19/209-b44-register-adm-switch.patch deleted file mode 100644 index bc2d2ab90a..0000000000 --- a/target/linux/bcm47xx/patches-4.19/209-b44-register-adm-switch.patch +++ /dev/null @@ -1,121 +0,0 @@ -From b36f694256f41bc71571f467646d015dda128d14 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Sat, 9 Nov 2013 17:03:59 +0100 -Subject: [PATCH 210/210] b44: register adm switch - ---- - drivers/net/ethernet/broadcom/b44.c | 57 +++++++++++++++++++++++++++++++++++ - drivers/net/ethernet/broadcom/b44.h | 3 ++ - 2 files changed, 60 insertions(+) - ---- a/drivers/net/ethernet/broadcom/b44.c -+++ b/drivers/net/ethernet/broadcom/b44.c -@@ -31,6 +31,8 @@ - #include - #include - #include -+#include -+#include - - #include - #include -@@ -2249,6 +2251,69 @@ static void b44_adjust_link(struct net_d - } - } - -+#ifdef CONFIG_BCM47XX -+static int b44_register_adm_switch(struct b44 *bp) -+{ -+ int gpio; -+ struct platform_device *pdev; -+ struct adm6996_gpio_platform_data adm_data = {0}; -+ struct platform_device_info info = {0}; -+ -+ adm_data.model = ADM6996L; -+ gpio = bcm47xx_nvram_gpio_pin("adm_eecs"); -+ if (gpio >= 0) -+ adm_data.eecs = gpio; -+ else -+ adm_data.eecs = 2; -+ -+ gpio = bcm47xx_nvram_gpio_pin("adm_eesk"); -+ if (gpio >= 0) -+ adm_data.eesk = gpio; -+ else -+ adm_data.eesk = 3; -+ -+ gpio = bcm47xx_nvram_gpio_pin("adm_eedi"); -+ if (gpio >= 0) -+ adm_data.eedi = gpio; -+ else -+ adm_data.eedi = 4; -+ -+ /* -+ * We ignore the "adm_rc" GPIO here. The driver does not use it, -+ * and it conflicts with the Reset button GPIO on the Linksys WRT54GSv1. -+ */ -+ -+ info.parent = bp->sdev->dev; -+ info.name = "adm6996_gpio"; -+ info.id = -1; -+ info.data = &adm_data; -+ info.size_data = sizeof(adm_data); -+ -+ if (!bp->adm_switch) { -+ pdev = platform_device_register_full(&info); -+ if (IS_ERR(pdev)) -+ return PTR_ERR(pdev); -+ -+ bp->adm_switch = pdev; -+ } -+ return 0; -+} -+static void b44_unregister_adm_switch(struct b44 *bp) -+{ -+ if (bp->adm_switch) -+ platform_device_unregister(bp->adm_switch); -+} -+#else -+static int b44_register_adm_switch(struct b44 *bp) -+{ -+ return 0; -+} -+static void b44_unregister_adm_switch(struct b44 *bp) -+{ -+ -+} -+#endif /* CONFIG_BCM47XX */ -+ - static int b44_register_phy_one(struct b44 *bp) - { - struct mii_bus *mii_bus; -@@ -2284,6 +2349,9 @@ static int b44_register_phy_one(struct b - if (!mdiobus_is_registered_device(bp->mii_bus, bp->phy_addr) && - (sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) { - -+ if (sprom->boardflags_lo & B44_BOARDFLAG_ADM) -+ b44_register_adm_switch(bp); -+ - dev_info(sdev->dev, - "could not find PHY at %i, use fixed one\n", - bp->phy_addr); -@@ -2478,6 +2546,7 @@ static void b44_remove_one(struct ssb_de - unregister_netdev(dev); - if (bp->flags & B44_FLAG_EXTERNAL_PHY) - b44_unregister_phy_one(bp); -+ b44_unregister_adm_switch(bp); - ssb_device_disable(sdev, 0); - ssb_bus_may_powerdown(sdev->bus); - netif_napi_del(&bp->napi); ---- a/drivers/net/ethernet/broadcom/b44.h -+++ b/drivers/net/ethernet/broadcom/b44.h -@@ -408,6 +408,9 @@ struct b44 { - struct mii_bus *mii_bus; - int old_link; - struct mii_if_info mii_if; -+ -+ /* platform device for associated switch */ -+ struct platform_device *adm_switch; - }; - - #endif /* _B44_H */ diff --git a/target/linux/bcm47xx/patches-4.19/210-b44_phy_fix.patch b/target/linux/bcm47xx/patches-4.19/210-b44_phy_fix.patch deleted file mode 100644 index 8c7a73ac0f..0000000000 --- a/target/linux/bcm47xx/patches-4.19/210-b44_phy_fix.patch +++ /dev/null @@ -1,54 +0,0 @@ ---- a/drivers/net/ethernet/broadcom/b44.c -+++ b/drivers/net/ethernet/broadcom/b44.c -@@ -431,10 +431,34 @@ static void b44_wap54g10_workaround(stru - error: - pr_warn("PHY: cannot reset MII transceiver isolate bit\n"); - } -+ -+static void b44_bcm47xx_workarounds(struct b44 *bp) -+{ -+ char buf[20]; -+ struct ssb_device *sdev = bp->sdev; -+ -+ /* Toshiba WRC-1000, Siemens SE505 v1, Askey RT-210W, RT-220W */ -+ if (sdev->bus->sprom.board_num == 100) { -+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY; -+ } else { -+ /* WL-HDD */ -+ if (bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0 && -+ !strncmp(buf, "WL300-", strlen("WL300-"))) { -+ if (sdev->bus->sprom.et0phyaddr == 0 && -+ sdev->bus->sprom.et1phyaddr == 1) -+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY; -+ } -+ } -+ return; -+} - #else - static inline void b44_wap54g10_workaround(struct b44 *bp) - { - } -+ -+static inline void b44_bcm47xx_workarounds(struct b44 *bp) -+{ -+} - #endif - - static int b44_setup_phy(struct b44 *bp) -@@ -443,6 +467,7 @@ static int b44_setup_phy(struct b44 *bp) - int err; - - b44_wap54g10_workaround(bp); -+ b44_bcm47xx_workarounds(bp); - - if (bp->flags & B44_FLAG_EXTERNAL_PHY) - return 0; -@@ -2179,6 +2204,8 @@ static int b44_get_invariants(struct b44 - * valid PHY address. */ - bp->phy_addr &= 0x1F; - -+ b44_bcm47xx_workarounds(bp); -+ - memcpy(bp->dev->dev_addr, addr, ETH_ALEN); - - if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){ diff --git a/target/linux/bcm47xx/patches-4.19/280-activate_ssb_support_in_usb.patch b/target/linux/bcm47xx/patches-4.19/280-activate_ssb_support_in_usb.patch deleted file mode 100644 index a1c988bb59..0000000000 --- a/target/linux/bcm47xx/patches-4.19/280-activate_ssb_support_in_usb.patch +++ /dev/null @@ -1,25 +0,0 @@ -This prevents the options from being delete with make kernel_oldconfig. ---- - drivers/ssb/Kconfig | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/bcma/Kconfig -+++ b/drivers/bcma/Kconfig -@@ -32,6 +32,7 @@ config BCMA_HOST_PCI - config BCMA_HOST_SOC - bool "Support for BCMA in a SoC" - depends on HAS_IOMEM -+ select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD - help - Host interface for a Broadcom AIX bus directly mapped into - the memory. This only works with the Broadcom SoCs from the ---- a/drivers/ssb/Kconfig -+++ b/drivers/ssb/Kconfig -@@ -135,6 +135,7 @@ config SSB_SFLASH - config SSB_EMBEDDED - bool - depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE -+ select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD - default y - - config SSB_DRIVER_EXTIF diff --git a/target/linux/bcm47xx/patches-4.19/300-fork_cacheflush.patch b/target/linux/bcm47xx/patches-4.19/300-fork_cacheflush.patch deleted file mode 100644 index b5efaaf03c..0000000000 --- a/target/linux/bcm47xx/patches-4.19/300-fork_cacheflush.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: Wolfram Joost -Subject: [PATCH] fork_cacheflush - -On ASUS WL-500gP there are many unexpected "Segmentation fault"s that -seem to be caused by a kernel. They can be avoided by: -1) Disabling highpage -2) Using flush_cache_mm in flush_cache_dup_mm - -For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035 ---- ---- a/arch/mips/include/asm/cacheflush.h -+++ b/arch/mips/include/asm/cacheflush.h -@@ -47,7 +47,7 @@ - extern void (*flush_cache_all)(void); - extern void (*__flush_cache_all)(void); - extern void (*flush_cache_mm)(struct mm_struct *mm); --#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0) -+#define flush_cache_dup_mm(mm) flush_cache_mm(mm) - extern void (*flush_cache_range)(struct vm_area_struct *vma, - unsigned long start, unsigned long end); - extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); diff --git a/target/linux/bcm47xx/patches-4.19/310-no_highpage.patch b/target/linux/bcm47xx/patches-4.19/310-no_highpage.patch deleted file mode 100644 index 09bfc64552..0000000000 --- a/target/linux/bcm47xx/patches-4.19/310-no_highpage.patch +++ /dev/null @@ -1,74 +0,0 @@ -From: Jeff Hansen -Subject: [PATCH] no highpage - -On ASUS WL-500gP there are many unexpected "Segmentation fault"s that -seem to be caused by a kernel. They can be avoided by: -1) Disabling highpage -2) Using flush_cache_mm in flush_cache_dup_mm - -For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035 ---- ---- a/arch/mips/include/asm/page.h -+++ b/arch/mips/include/asm/page.h -@@ -71,6 +71,7 @@ static inline unsigned int page_size_ftl - #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ - - #include -+#include - - extern void build_clear_page(void); - extern void build_copy_page(void); -@@ -110,11 +111,16 @@ static inline void clear_user_page(void - flush_data_cache_page((unsigned long)addr); - } - --struct vm_area_struct; --extern void copy_user_highpage(struct page *to, struct page *from, -- unsigned long vaddr, struct vm_area_struct *vma); -+static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, -+ struct page *to) -+{ -+ extern void (*flush_data_cache_page)(unsigned long addr); - --#define __HAVE_ARCH_COPY_USER_HIGHPAGE -+ copy_page(vto, vfrom); -+ if (!cpu_has_ic_fills_f_dc || -+ pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) -+ flush_data_cache_page((unsigned long)vto); -+} - - /* - * These are used to make use of C type-checking.. ---- a/arch/mips/mm/init.c -+++ b/arch/mips/mm/init.c -@@ -162,30 +162,6 @@ void kunmap_coherent(void) - preempt_enable(); - } - --void copy_user_highpage(struct page *to, struct page *from, -- unsigned long vaddr, struct vm_area_struct *vma) --{ -- void *vfrom, *vto; -- -- vto = kmap_atomic(to); -- if (cpu_has_dc_aliases && cpu_use_kmap_coherent && -- page_mapcount(from) && !Page_dcache_dirty(from)) { -- vfrom = kmap_coherent(from, vaddr); -- copy_page(vto, vfrom); -- kunmap_coherent(); -- } else { -- vfrom = kmap_atomic(from); -- copy_page(vto, vfrom); -- kunmap_atomic(vfrom); -- } -- if ((!cpu_has_ic_fills_f_dc) || -- pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) -- flush_data_cache_page((unsigned long)vto); -- kunmap_atomic(vto); -- /* Make sure this page is cleared on other CPU's too before using it */ -- smp_wmb(); --} -- - void copy_to_user_page(struct vm_area_struct *vma, - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) diff --git a/target/linux/bcm47xx/patches-4.19/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch b/target/linux/bcm47xx/patches-4.19/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch deleted file mode 100644 index bde811c195..0000000000 --- a/target/linux/bcm47xx/patches-4.19/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch +++ /dev/null @@ -1,185 +0,0 @@ ---- a/arch/mips/bcm47xx/board.c -+++ b/arch/mips/bcm47xx/board.c -@@ -141,6 +141,7 @@ struct bcm47xx_board_type_list2 bcm47xx_ - {{BCM47XX_BOARD_LINKSYS_WRT300NV11, "Linksys WRT300N V1.1"}, "WRT300N", "1.1"}, - {{BCM47XX_BOARD_LINKSYS_WRT310NV1, "Linksys WRT310N V1"}, "WRT310N", "1.0"}, - {{BCM47XX_BOARD_LINKSYS_WRT310NV2, "Linksys WRT310N V2"}, "WRT310N", "2.0"}, -+ {{BCM47XX_BOARD_LINKSYS_WRT320N_V1, "Linksys WRT320N V1"}, "WRT320N", "1.0"}, - {{BCM47XX_BOARD_LINKSYS_WRT54G3GV2, "Linksys WRT54G3GV2-VF"}, "WRT54G3GV2-VF", "1.0"}, - {{BCM47XX_BOARD_LINKSYS_WRT610NV1, "Linksys WRT610N V1"}, "WRT610N", "1.0"}, - {{BCM47XX_BOARD_LINKSYS_WRT610NV2, "Linksys WRT610N V2"}, "WRT610N", "2.0"}, -@@ -161,9 +162,12 @@ struct bcm47xx_board_type_list1 bcm47xx_ - {{BCM47XX_BOARD_LUXUL_XWR_600_V1, "Luxul XWR-600 V1"}, "luxul_xwr600_v1"}, - {{BCM47XX_BOARD_LUXUL_XWR_1750_V1, "Luxul XWR-1750 V1"}, "luxul_xwr1750_v1"}, - {{BCM47XX_BOARD_NETGEAR_R6200_V1, "Netgear R6200 V1"}, "U12H192T00_NETGEAR"}, -+ {{BCM47XX_BOARD_NETGEAR_R6300_V1, "Netgear R6300 V1"}, "U12H218T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"}, -+ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V1, "Netgear WN2500RP V1"}, "U12H197T00_NETGEAR"}, -+ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V2, "Netgear WN2500RP V2"}, "U12H294T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR"}, ---- a/arch/mips/bcm47xx/buttons.c -+++ b/arch/mips/bcm47xx/buttons.c -@@ -27,6 +27,12 @@ - /* Asus */ - - static const struct gpio_keys_button -+bcm47xx_buttons_asus_rtn10u[] __initconst = { -+ BCM47XX_GPIO_KEY(20, KEY_WPS_BUTTON), -+ BCM47XX_GPIO_KEY(21, KEY_RESTART), -+}; -+ -+static const struct gpio_keys_button - bcm47xx_buttons_asus_rtn12[] __initconst = { - BCM47XX_GPIO_KEY(0, KEY_WPS_BUTTON), - BCM47XX_GPIO_KEY(1, KEY_RESTART), -@@ -277,6 +283,18 @@ bcm47xx_buttons_linksys_wrt310nv1[] __in - }; - - static const struct gpio_keys_button -+bcm47xx_buttons_linksys_wrt310n_v2[] __initconst = { -+ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON), -+ BCM47XX_GPIO_KEY(6, KEY_RESTART), -+}; -+ -+static const struct gpio_keys_button -+bcm47xx_buttons_linksys_wrt320n_v1[] __initconst = { -+ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON), -+ BCM47XX_GPIO_KEY(8, KEY_RESTART), -+}; -+ -+static const struct gpio_keys_button - bcm47xx_buttons_linksys_wrt54g3gv2[] __initconst = { - BCM47XX_GPIO_KEY(5, KEY_WIMAX), - BCM47XX_GPIO_KEY(6, KEY_RESTART), -@@ -392,6 +410,17 @@ bcm47xx_buttons_netgear_r6200_v1[] __ini - }; - - static const struct gpio_keys_button -+bcm47xx_buttons_netgear_r6300_v1[] __initconst = { -+ BCM47XX_GPIO_KEY(6, KEY_RESTART), -+}; -+ -+static const struct gpio_keys_button -+bcm47xx_buttons_netgear_wn2500rp_v1[] __initconst = { -+ BCM47XX_GPIO_KEY(12, KEY_RESTART), -+ BCM47XX_GPIO_KEY(31, KEY_WPS_BUTTON), -+}; -+ -+static const struct gpio_keys_button - bcm47xx_buttons_netgear_wndr3400v1[] __initconst = { - BCM47XX_GPIO_KEY(4, KEY_RESTART), - BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON), -@@ -478,6 +507,9 @@ int __init bcm47xx_buttons_register(void - int err; - - switch (board) { -+ case BCM47XX_BOARD_ASUS_RTN10U: -+ err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn10u); -+ break; - case BCM47XX_BOARD_ASUS_RTN12: - err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn12); - break; -@@ -608,6 +640,12 @@ int __init bcm47xx_buttons_register(void - case BCM47XX_BOARD_LINKSYS_WRT310NV1: - err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310nv1); - break; -+ case BCM47XX_BOARD_LINKSYS_WRT310NV2: -+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310n_v2); -+ break; -+ case BCM47XX_BOARD_LINKSYS_WRT320N_V1: -+ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt320n_v1); -+ break; - case BCM47XX_BOARD_LINKSYS_WRT54G3GV2: - err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g3gv2); - break; -@@ -674,6 +712,12 @@ int __init bcm47xx_buttons_register(void - case BCM47XX_BOARD_NETGEAR_R6200_V1: - err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6200_v1); - break; -+ case BCM47XX_BOARD_NETGEAR_R6300_V1: -+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6300_v1); -+ break; -+ case BCM47XX_BOARD_NETGEAR_WN2500RP_V1: -+ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wn2500rp_v1); -+ break; - case BCM47XX_BOARD_NETGEAR_WNDR3400V1: - err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1); - break; ---- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h -+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h -@@ -72,6 +72,7 @@ enum bcm47xx_board { - BCM47XX_BOARD_LINKSYS_WRT300NV11, - BCM47XX_BOARD_LINKSYS_WRT310NV1, - BCM47XX_BOARD_LINKSYS_WRT310NV2, -+ BCM47XX_BOARD_LINKSYS_WRT320N_V1, - BCM47XX_BOARD_LINKSYS_WRT54G3GV2, - BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101, - BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467, -@@ -99,9 +100,12 @@ enum bcm47xx_board { - BCM47XX_BOARD_MOTOROLA_WR850GV2V3, - - BCM47XX_BOARD_NETGEAR_R6200_V1, -+ BCM47XX_BOARD_NETGEAR_R6300_V1, - BCM47XX_BOARD_NETGEAR_WGR614V8, - BCM47XX_BOARD_NETGEAR_WGR614V9, - BCM47XX_BOARD_NETGEAR_WGR614_V10, -+ BCM47XX_BOARD_NETGEAR_WN2500RP_V1, -+ BCM47XX_BOARD_NETGEAR_WN2500RP_V2, - BCM47XX_BOARD_NETGEAR_WNDR3300, - BCM47XX_BOARD_NETGEAR_WNDR3400V1, - BCM47XX_BOARD_NETGEAR_WNDR3400V2, ---- a/arch/mips/bcm47xx/leds.c -+++ b/arch/mips/bcm47xx/leds.c -@@ -30,6 +30,14 @@ - /* Asus */ - - static const struct gpio_led -+bcm47xx_leds_asus_rtn10u[] __initconst = { -+ BCM47XX_GPIO_LED(5, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), -+ BCM47XX_GPIO_LED(6, "green", "power", 1, LEDS_GPIO_DEFSTATE_ON), -+ BCM47XX_GPIO_LED(7, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF), -+ BCM47XX_GPIO_LED(8, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF), -+}; -+ -+static const struct gpio_led - bcm47xx_leds_asus_rtn12[] __initconst = { - BCM47XX_GPIO_LED(2, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON), - BCM47XX_GPIO_LED(7, "unk", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), -@@ -314,6 +322,13 @@ bcm47xx_leds_linksys_wrt310nv1[] __initc - }; - - static const struct gpio_led -+bcm47xx_leds_linksys_wrt320n_v1[] __initconst = { -+ BCM47XX_GPIO_LED(1, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF), -+ BCM47XX_GPIO_LED(2, "blue", "power", 0, LEDS_GPIO_DEFSTATE_ON), -+ BCM47XX_GPIO_LED(4, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF), -+}; -+ -+static const struct gpio_led - bcm47xx_leds_linksys_wrt54g_generic[] __initconst = { - BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), - BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON), -@@ -556,6 +571,9 @@ void __init bcm47xx_leds_register(void) - enum bcm47xx_board board = bcm47xx_board_get(); - - switch (board) { -+ case BCM47XX_BOARD_ASUS_RTN10U: -+ bcm47xx_set_pdata(bcm47xx_leds_asus_rtn10u); -+ break; - case BCM47XX_BOARD_ASUS_RTN12: - bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12); - break; -@@ -689,6 +707,9 @@ void __init bcm47xx_leds_register(void) - case BCM47XX_BOARD_LINKSYS_WRT310NV1: - bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1); - break; -+ case BCM47XX_BOARD_LINKSYS_WRT320N_V1: -+ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt320n_v1); -+ break; - case BCM47XX_BOARD_LINKSYS_WRT54G3GV2: - bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2); - break; diff --git a/target/linux/bcm47xx/patches-4.19/400-mtd-bcm47xxpart-get-nvram.patch b/target/linux/bcm47xx/patches-4.19/400-mtd-bcm47xxpart-get-nvram.patch deleted file mode 100644 index df9d434c9f..0000000000 --- a/target/linux/bcm47xx/patches-4.19/400-mtd-bcm47xxpart-get-nvram.patch +++ /dev/null @@ -1,34 +0,0 @@ ---- a/drivers/mtd/bcm47xxpart.c -+++ b/drivers/mtd/bcm47xxpart.c -@@ -102,6 +102,7 @@ static int bcm47xxpart_parse(struct mtd_ - int trx_num = 0; /* Number of found TRX partitions */ - int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, }; - int err; -+ bool found_nvram = false; - - /* - * Some really old flashes (like AT45DB*) had smaller erasesize-s, but -@@ -283,12 +284,23 @@ static int bcm47xxpart_parse(struct mtd_ - if (buf[0] == NVRAM_HEADER) { - bcm47xxpart_add_part(&parts[curr_part++], "nvram", - master->size - blocksize, 0); -+ found_nvram = true; - break; - } - } - - kfree(buf); - -+ if (!found_nvram) { -+ pr_err("can not find a nvram partition reserve last block\n"); -+ bcm47xxpart_add_part(&parts[curr_part++], "nvram_guess", -+ master->size - blocksize * 2, MTD_WRITEABLE); -+ for (i = 0; i < curr_part; i++) { -+ if (parts[i].size + parts[i].offset == master->size) -+ parts[i].offset -= blocksize * 2; -+ } -+ } -+ - /* - * Assume that partitions end at the beginning of the one they are - * followed by. diff --git a/target/linux/bcm47xx/patches-4.19/610-pci_ide_fix.patch b/target/linux/bcm47xx/patches-4.19/610-pci_ide_fix.patch deleted file mode 100644 index a353eec08c..0000000000 --- a/target/linux/bcm47xx/patches-4.19/610-pci_ide_fix.patch +++ /dev/null @@ -1,41 +0,0 @@ -From: b.sander -Subject: [PATCH] pci: IDE fix - -These are standard probing messages when using pdc202xx_old: -pdc202xx_old 0000:00:01.0: IDE controller (0x105a:0x0d30 rev 0x02) -PCI: Enabling device 0000:00:01.0 (0004 -> 0007) -PCI: Fixing up device 0000:00:01.0 -0000:00:01.0: (U)DMA Burst Bit DISABLED Primary PCI Mode Secondary PCI Mode. -0000:00:01.0: FORCING BURST BIT 0x00->0x01 ACTIVE -pdc202xx_old 0000:00:01.0: 100% native mode on irq 6 - -With the default MAX_HWIFS value after above we get: - ide2: BM-DMA at 0x0400-0x0407 - ide3: BM-DMA at 0x0408-0x040f -Probing IDE interface ide2... -hde: CF500, CFA DISK drive - -As you can see it's ide2 + ide3 and hde. - -With this patch applied we get: - ide0: BM-DMA at 0x0400-0x0407 - ide1: BM-DMA at 0x0408-0x040f -Probing IDE interface ide0... -hda: CF500, CFA DISK drive - -This fixes OpenWrt ticket #7061: https://dev.openwrt.org/ticket/7061 ---- ---- a/include/linux/ide.h -+++ b/include/linux/ide.h -@@ -235,7 +235,11 @@ static inline void ide_std_init_ports(st - hw->io_ports.ctl_addr = ctl_addr; - } - -+#if defined CONFIG_BCM47XX -+# define MAX_HWIFS 2 -+#else - #define MAX_HWIFS 10 -+#endif - - /* - * Now for the data we need to maintain per-drive: ide_drive_t diff --git a/target/linux/bcm47xx/patches-4.19/791-tg3-no-pci-sleep.patch b/target/linux/bcm47xx/patches-4.19/791-tg3-no-pci-sleep.patch deleted file mode 100644 index 31c87b38c5..0000000000 --- a/target/linux/bcm47xx/patches-4.19/791-tg3-no-pci-sleep.patch +++ /dev/null @@ -1,17 +0,0 @@ -When the Ethernet controller is powered down and someone wants to -access the mdio bus like the witch driver (b53) the system crashed if -PCI_D3hot was set before. This patch deactivates this power sawing mode -when a switch driver is in use. - ---- a/drivers/net/ethernet/broadcom/tg3.c -+++ b/drivers/net/ethernet/broadcom/tg3.c -@@ -4279,7 +4279,8 @@ static int tg3_power_down_prepare(struct - static void tg3_power_down(struct tg3 *tp) - { - pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); -- pci_set_power_state(tp->pdev, PCI_D3hot); -+ if (!tg3_flag(tp, ROBOSWITCH)) -+ pci_set_power_state(tp->pdev, PCI_D3hot); - } - - static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex) diff --git a/target/linux/bcm47xx/patches-4.19/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch b/target/linux/bcm47xx/patches-4.19/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch deleted file mode 100644 index 318dc55810..0000000000 --- a/target/linux/bcm47xx/patches-4.19/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 597715c61ae75a05ab3310a34ff3857a006f0f63 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 20 Nov 2014 21:32:42 +0100 -Subject: [PATCH] bcma: add table of serial flashes with smaller blocks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki ---- - drivers/bcma/driver_chipcommon_sflash.c | 29 +++++++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - ---- a/drivers/bcma/driver_chipcommon_sflash.c -+++ b/drivers/bcma/driver_chipcommon_sflash.c -@@ -9,6 +9,7 @@ - - #include - #include -+#include - - static struct resource bcma_sflash_resource = { - .name = "bcma_sflash", -@@ -42,6 +43,13 @@ static const struct bcma_sflash_tbl_e bc - { NULL }, - }; - -+/* Some devices use smaller blocks (and have more of them) */ -+static const struct bcma_sflash_tbl_e bcma_sflash_st_shrink_tbl[] = { -+ { "M25P16", 0x14, 0x1000, 512, }, -+ { "M25P32", 0x15, 0x1000, 1024, }, -+ { NULL }, -+}; -+ - static const struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = { - { "SST25WF512", 1, 0x1000, 16, }, - { "SST25VF512", 0x48, 0x1000, 16, }, -@@ -85,6 +93,24 @@ static void bcma_sflash_cmd(struct bcma_ - bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n"); - } - -+const struct bcma_sflash_tbl_e *bcma_sflash_shrink_flash(u32 id) -+{ -+ enum bcm47xx_board board = bcm47xx_board_get(); -+ const struct bcma_sflash_tbl_e *e; -+ -+ switch (board) { -+ case BCM47XX_BOARD_NETGEAR_WGR614_V10: -+ case BCM47XX_BOARD_NETGEAR_WNR1000_V3: -+ for (e = bcma_sflash_st_shrink_tbl; e->name; e++) { -+ if (e->id == id) -+ return e; -+ } -+ return NULL; -+ default: -+ return NULL; -+ } -+} -+ - /* Initialize serial flash access */ - int bcma_sflash_init(struct bcma_drv_cc *cc) - { -@@ -115,6 +141,10 @@ int bcma_sflash_init(struct bcma_drv_cc - case 0x13: - return -ENOTSUPP; - default: -+ e = bcma_sflash_shrink_flash(id); -+ if (e) -+ break; -+ - for (e = bcma_sflash_st_tbl; e->name; e++) { - if (e->id == id) - break; diff --git a/target/linux/bcm47xx/patches-4.19/820-wgt634u-nvram-fix.patch b/target/linux/bcm47xx/patches-4.19/820-wgt634u-nvram-fix.patch deleted file mode 100644 index aaab39ae41..0000000000 --- a/target/linux/bcm47xx/patches-4.19/820-wgt634u-nvram-fix.patch +++ /dev/null @@ -1,304 +0,0 @@ -The Netgear wgt634u uses a different format for storing the -configuration. This patch is needed to read out the correct -configuration. The cfe_env.c file uses a different method way to read -out the configuration than the in kernel cfe config reader. - ---- a/drivers/firmware/broadcom/Makefile -+++ b/drivers/firmware/broadcom/Makefile -@@ -1,2 +1,2 @@ --obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o -+obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o cfe_env.o - obj-$(CONFIG_BCM47XX_SPROM) += bcm47xx_sprom.o ---- /dev/null -+++ b/drivers/firmware/broadcom/cfe_env.c -@@ -0,0 +1,228 @@ -+/* -+ * CFE environment variable access -+ * -+ * Copyright 2001-2003, Broadcom Corporation -+ * Copyright 2006, Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define NVRAM_SIZE (0x1ff0) -+static char _nvdata[NVRAM_SIZE]; -+static char _valuestr[256]; -+ -+/* -+ * TLV types. These codes are used in the "type-length-value" -+ * encoding of the items stored in the NVRAM device (flash or EEPROM) -+ * -+ * The layout of the flash/nvram is as follows: -+ * -+ * -+ * -+ * The type code of "ENV_TLV_TYPE_END" marks the end of the list. -+ * The "length" field marks the length of the data section, not -+ * including the type and length fields. -+ * -+ * Environment variables are stored as follows: -+ * -+ * = -+ * -+ * If bit 0 (low bit) is set, the length is an 8-bit value. -+ * If bit 0 (low bit) is clear, the length is a 16-bit value -+ * -+ * Bit 7 set indicates "user" TLVs. In this case, bit 0 still -+ * indicates the size of the length field. -+ * -+ * Flags are from the constants below: -+ * -+ */ -+#define ENV_LENGTH_16BITS 0x00 /* for low bit */ -+#define ENV_LENGTH_8BITS 0x01 -+ -+#define ENV_TYPE_USER 0x80 -+ -+#define ENV_CODE_SYS(n,l) (((n)<<1)|(l)) -+#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER) -+ -+/* -+ * The actual TLV types we support -+ */ -+ -+#define ENV_TLV_TYPE_END 0x00 -+#define ENV_TLV_TYPE_ENV ENV_CODE_SYS(0,ENV_LENGTH_8BITS) -+ -+/* -+ * Environment variable flags -+ */ -+ -+#define ENV_FLG_NORMAL 0x00 /* normal read/write */ -+#define ENV_FLG_BUILTIN 0x01 /* builtin - not stored in flash */ -+#define ENV_FLG_READONLY 0x02 /* read-only - cannot be changed */ -+ -+#define ENV_FLG_MASK 0xFF /* mask of attributes we keep */ -+#define ENV_FLG_ADMIN 0x100 /* lets us internally override permissions */ -+ -+ -+/* ********************************************************************* -+ * _nvram_read(buffer,offset,length) -+ * -+ * Read data from the NVRAM device -+ * -+ * Input parameters: -+ * buffer - destination buffer -+ * offset - offset of data to read -+ * length - number of bytes to read -+ * -+ * Return value: -+ * number of bytes read, or <0 if error occured -+ ********************************************************************* */ -+static int -+_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length) -+{ -+ int i; -+ if (offset > NVRAM_SIZE) -+ return -1; -+ -+ for ( i = 0; i < length; i++) { -+ buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i]; -+ } -+ return length; -+} -+ -+ -+static char* -+_strnchr(const char *dest,int c,size_t cnt) -+{ -+ while (*dest && (cnt > 0)) { -+ if (*dest == c) return (char *) dest; -+ dest++; -+ cnt--; -+ } -+ return NULL; -+} -+ -+ -+ -+/* -+ * Core support API: Externally visible. -+ */ -+ -+/* -+ * Get the value of an NVRAM variable -+ * @param name name of variable to get -+ * @return value of variable or NULL if undefined -+ */ -+ -+char *cfe_env_get(unsigned char *nv_buf, const char *name) -+{ -+ int size; -+ unsigned char *buffer; -+ unsigned char *ptr; -+ unsigned char *envval; -+ unsigned int reclen; -+ unsigned int rectype; -+ int offset; -+ int flg; -+ -+ if (!strcmp(name, "nvram_type")) -+ return "cfe"; -+ -+ size = NVRAM_SIZE; -+ buffer = &_nvdata[0]; -+ -+ ptr = buffer; -+ offset = 0; -+ -+ /* Read the record type and length */ -+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) { -+ goto error; -+ } -+ -+ while ((*ptr != ENV_TLV_TYPE_END) && (size > 1)) { -+ -+ /* Adjust pointer for TLV type */ -+ rectype = *(ptr); -+ offset++; -+ size--; -+ -+ /* -+ * Read the length. It can be either 1 or 2 bytes -+ * depending on the code -+ */ -+ if (rectype & ENV_LENGTH_8BITS) { -+ /* Read the record type and length - 8 bits */ -+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) { -+ goto error; -+ } -+ reclen = *(ptr); -+ size--; -+ offset++; -+ } -+ else { -+ /* Read the record type and length - 16 bits, MSB first */ -+ if (_nvram_read(nv_buf, ptr,offset,2) != 2) { -+ goto error; -+ } -+ reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1); -+ size -= 2; -+ offset += 2; -+ } -+ -+ if (reclen > size) -+ break; /* should not happen, bad NVRAM */ -+ -+ switch (rectype) { -+ case ENV_TLV_TYPE_ENV: -+ /* Read the TLV data */ -+ if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen) -+ goto error; -+ flg = *ptr++; -+ envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1)); -+ if (envval) { -+ *envval++ = '\0'; -+ memcpy(_valuestr,envval,(reclen-1)-(envval-ptr)); -+ _valuestr[(reclen-1)-(envval-ptr)] = '\0'; -+#if 0 -+ printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr); -+#endif -+ if(!strcmp(ptr, name)){ -+ return _valuestr; -+ } -+ if((strlen(ptr) > 1) && !strcmp(&ptr[1], name)) -+ return _valuestr; -+ } -+ break; -+ -+ default: -+ /* Unknown TLV type, skip it. */ -+ break; -+ } -+ -+ /* -+ * Advance to next TLV -+ */ -+ -+ size -= (int)reclen; -+ offset += reclen; -+ -+ /* Read the next record type */ -+ ptr = buffer; -+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) -+ goto error; -+ } -+ -+error: -+ return NULL; -+ -+} -+ ---- a/drivers/firmware/broadcom/bcm47xx_nvram.c -+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c -@@ -37,6 +37,8 @@ struct nvram_header { - static char nvram_buf[NVRAM_SPACE]; - static size_t nvram_len; - static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000}; -+static int cfe_env; -+extern char *cfe_env_get(char *nv_buf, const char *name); - - static u32 find_nvram_size(void __iomem *end) - { -@@ -56,7 +58,9 @@ static u32 find_nvram_size(void __iomem - static int nvram_find_and_copy(void __iomem *iobase, u32 lim) - { - struct nvram_header __iomem *header; -+ int i; - u32 off; -+ u32 *src, *dst; - u32 size; - - if (nvram_len) { -@@ -64,6 +68,26 @@ static int nvram_find_and_copy(void __io - return -EEXIST; - } - -+ cfe_env = 0; -+ -+ /* XXX: hack for supporting the CFE environment stuff on WGT634U */ -+ if (lim >= 8 * 1024 * 1024) { -+ src = (u32 *)(iobase + 8 * 1024 * 1024 - 0x2000); -+ dst = (u32 *)nvram_buf; -+ -+ if ((*src & 0xff00ff) == 0x000001) { -+ printk("early_nvram_init: WGT634U NVRAM found.\n"); -+ -+ for (i = 0; i < 0x1ff0; i++) { -+ if (*src == 0xFFFFFFFF) -+ break; -+ *dst++ = *src++; -+ } -+ cfe_env = 1; -+ return 0; -+ } -+ } -+ - /* TODO: when nvram is on nand flash check for bad blocks first. */ - off = FLASH_MIN; - while (off <= lim) { -@@ -174,6 +198,13 @@ int bcm47xx_nvram_getenv(const char *nam - if (!name) - return -EINVAL; - -+ if (cfe_env) { -+ value = cfe_env_get(nvram_buf, name); -+ if (!value) -+ return -ENOENT; -+ return snprintf(val, val_len, "%s", value); -+ } -+ - if (!nvram_len) { - err = nvram_init(); - if (err) diff --git a/target/linux/bcm47xx/patches-4.19/830-huawei_e970_support.patch b/target/linux/bcm47xx/patches-4.19/830-huawei_e970_support.patch deleted file mode 100644 index 4d43b9960b..0000000000 --- a/target/linux/bcm47xx/patches-4.19/830-huawei_e970_support.patch +++ /dev/null @@ -1,101 +0,0 @@ ---- a/arch/mips/bcm47xx/setup.c -+++ b/arch/mips/bcm47xx/setup.c -@@ -37,6 +37,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -254,6 +255,33 @@ static struct fixed_phy_status bcm47xx_f - .duplex = DUPLEX_FULL, - }; - -+static struct gpio_wdt_platform_data gpio_wdt_data; -+ -+static struct platform_device gpio_wdt_device = { -+ .name = "gpio-wdt", -+ .id = 0, -+ .dev = { -+ .platform_data = &gpio_wdt_data, -+ }, -+}; -+ -+static int __init bcm47xx_register_gpio_watchdog(void) -+{ -+ enum bcm47xx_board board = bcm47xx_board_get(); -+ -+ switch (board) { -+ case BCM47XX_BOARD_HUAWEI_E970: -+ pr_info("bcm47xx: detected Huawei E970 or similar, starting early gpio_wdt timer\n"); -+ gpio_wdt_data.gpio = 7; -+ gpio_wdt_data.interval = HZ; -+ gpio_wdt_data.first_interval = HZ / 5; -+ return platform_device_register(&gpio_wdt_device); -+ default: -+ /* Nothing to do */ -+ return 0; -+ } -+} -+ - static int __init bcm47xx_register_bus_complete(void) - { - switch (bcm47xx_bus_type) { -@@ -275,6 +303,7 @@ static int __init bcm47xx_register_bus_c - bcm47xx_workarounds(); - - fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status, -1); -+ bcm47xx_register_gpio_watchdog(); - return 0; - } - device_initcall(bcm47xx_register_bus_complete); ---- a/arch/mips/configs/bcm47xx_defconfig -+++ b/arch/mips/configs/bcm47xx_defconfig -@@ -66,6 +66,7 @@ CONFIG_HW_RANDOM=y - CONFIG_GPIO_SYSFS=y - CONFIG_WATCHDOG=y - CONFIG_BCM47XX_WDT=y -+CONFIG_GPIO_WDT=y - CONFIG_SSB_DRIVER_GIGE=y - CONFIG_BCMA_DRIVER_GMAC_CMN=y - CONFIG_USB=y ---- a/drivers/ssb/embedded.c -+++ b/drivers/ssb/embedded.c -@@ -34,11 +34,36 @@ int ssb_watchdog_timer_set(struct ssb_bu - } - EXPORT_SYMBOL(ssb_watchdog_timer_set); - -+#ifdef CONFIG_BCM47XX -+#include -+ -+static bool ssb_watchdog_supported(void) -+{ -+ enum bcm47xx_board board = bcm47xx_board_get(); -+ -+ /* The Huawei E970 has a hardware watchdog using a GPIO */ -+ switch (board) { -+ case BCM47XX_BOARD_HUAWEI_E970: -+ return false; -+ default: -+ return true; -+ } -+} -+#else -+static bool ssb_watchdog_supported(void) -+{ -+ return true; -+} -+#endif -+ - int ssb_watchdog_register(struct ssb_bus *bus) - { - struct bcm47xx_wdt wdt = {}; - struct platform_device *pdev; - -+ if (!ssb_watchdog_supported()) -+ return 0; -+ - if (ssb_chipco_available(&bus->chipco)) { - wdt.driver_data = &bus->chipco; - wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt; diff --git a/target/linux/bcm47xx/patches-4.19/831-old_gpio_wdt.patch b/target/linux/bcm47xx/patches-4.19/831-old_gpio_wdt.patch deleted file mode 100644 index e88f08b53c..0000000000 --- a/target/linux/bcm47xx/patches-4.19/831-old_gpio_wdt.patch +++ /dev/null @@ -1,360 +0,0 @@ -This generic GPIO watchdog is used on Huawei E970 (bcm47xx) - -Signed-off-by: Mathias Adam - ---- a/drivers/watchdog/Kconfig -+++ b/drivers/watchdog/Kconfig -@@ -1498,6 +1498,15 @@ config WDT_MTX1 - Hardware driver for the MTX-1 boards. This is a watchdog timer that - will reboot the machine after a 100 seconds timer expired. - -+config GPIO_WDT -+ tristate "GPIO Hardware Watchdog" -+ help -+ Hardware driver for GPIO-controlled watchdogs. GPIO pin and -+ toggle interval settings are platform-specific. The driver -+ will stop toggling the GPIO (i.e. machine reboots) after a -+ 100 second timer expired and no process has written to -+ /dev/watchdog during that time. -+ - config PNX833X_WDT - tristate "PNX833x Hardware Watchdog" - depends on SOC_PNX8335 ---- a/drivers/watchdog/Makefile -+++ b/drivers/watchdog/Makefile -@@ -154,6 +154,7 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt - obj-$(CONFIG_INDYDOG) += indydog.o - obj-$(CONFIG_JZ4740_WDT) += jz4740_wdt.o - obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o -+obj-$(CONFIG_GPIO_WDT) += old_gpio_wdt.o - obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o - obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o - obj-$(CONFIG_AR7_WDT) += ar7_wdt.o ---- /dev/null -+++ b/drivers/watchdog/old_gpio_wdt.c -@@ -0,0 +1,301 @@ -+/* -+ * Driver for GPIO-controlled Hardware Watchdogs. -+ * -+ * Copyright (C) 2013 Mathias Adam -+ * -+ * Replaces mtx1_wdt (driver for the MTX-1 Watchdog): -+ * -+ * (C) Copyright 2005 4G Systems , -+ * All Rights Reserved. -+ * http://www.4g-systems.biz -+ * -+ * (C) Copyright 2007 OpenWrt.org, Florian Fainelli -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Neither Michael Stickel nor 4G Systems admit liability nor provide -+ * warranty for any of this software. This material is provided -+ * "AS-IS" and at no charge. -+ * -+ * (c) Copyright 2005 4G Systems -+ * -+ * Release 0.01. -+ * Author: Michael Stickel michael.stickel@4g-systems.biz -+ * -+ * Release 0.02. -+ * Author: Florian Fainelli florian@openwrt.org -+ * use the Linux watchdog/timer APIs -+ * -+ * Release 0.03. -+ * Author: Mathias Adam -+ * make it a generic gpio watchdog driver -+ * -+ * The Watchdog is configured to reset the MTX-1 -+ * if it is not triggered for 100 seconds. -+ * It should not be triggered more often than 1.6 seconds. -+ * -+ * A timer triggers the watchdog every 5 seconds, until -+ * it is opened for the first time. After the first open -+ * it MUST be triggered every 2..95 seconds. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static int ticks = 100 * HZ; -+ -+static struct { -+ struct completion stop; -+ spinlock_t lock; -+ int running; -+ struct timer_list timer; -+ int queue; -+ int default_ticks; -+ unsigned long inuse; -+ unsigned gpio; -+ unsigned int gstate; -+ int interval; -+ int first_interval; -+} gpio_wdt_device; -+ -+static void gpio_wdt_trigger(struct timer_list *unused) -+{ -+ spin_lock(&gpio_wdt_device.lock); -+ if (gpio_wdt_device.running && ticks > 0) -+ ticks -= gpio_wdt_device.interval; -+ -+ /* toggle wdt gpio */ -+ gpio_wdt_device.gstate = !gpio_wdt_device.gstate; -+ gpio_set_value(gpio_wdt_device.gpio, gpio_wdt_device.gstate); -+ -+ if (gpio_wdt_device.queue && ticks > 0) -+ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.interval); -+ else -+ complete(&gpio_wdt_device.stop); -+ spin_unlock(&gpio_wdt_device.lock); -+} -+ -+static void gpio_wdt_reset(void) -+{ -+ ticks = gpio_wdt_device.default_ticks; -+} -+ -+ -+static void gpio_wdt_start(void) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&gpio_wdt_device.lock, flags); -+ if (!gpio_wdt_device.queue) { -+ gpio_wdt_device.queue = 1; -+ gpio_wdt_device.gstate = 1; -+ gpio_set_value(gpio_wdt_device.gpio, 1); -+ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.first_interval); -+ } -+ gpio_wdt_device.running++; -+ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags); -+} -+ -+static int gpio_wdt_stop(void) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&gpio_wdt_device.lock, flags); -+ if (gpio_wdt_device.queue) { -+ gpio_wdt_device.queue = 0; -+ gpio_wdt_device.gstate = 0; -+ gpio_set_value(gpio_wdt_device.gpio, 0); -+ } -+ ticks = gpio_wdt_device.default_ticks; -+ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags); -+ return 0; -+} -+ -+/* Filesystem functions */ -+ -+static int gpio_wdt_open(struct inode *inode, struct file *file) -+{ -+ if (test_and_set_bit(0, &gpio_wdt_device.inuse)) -+ return -EBUSY; -+ return nonseekable_open(inode, file); -+} -+ -+ -+static int gpio_wdt_release(struct inode *inode, struct file *file) -+{ -+ clear_bit(0, &gpio_wdt_device.inuse); -+ return 0; -+} -+ -+static long gpio_wdt_ioctl(struct file *file, unsigned int cmd, -+ unsigned long arg) -+{ -+ void __user *argp = (void __user *)arg; -+ int __user *p = (int __user *)argp; -+ unsigned int value; -+ static const struct watchdog_info ident = { -+ .options = WDIOF_CARDRESET, -+ .identity = "GPIO WDT", -+ }; -+ -+ switch (cmd) { -+ case WDIOC_GETSUPPORT: -+ if (copy_to_user(argp, &ident, sizeof(ident))) -+ return -EFAULT; -+ break; -+ case WDIOC_GETSTATUS: -+ case WDIOC_GETBOOTSTATUS: -+ put_user(0, p); -+ break; -+ case WDIOC_SETOPTIONS: -+ if (get_user(value, p)) -+ return -EFAULT; -+ if (value & WDIOS_ENABLECARD) -+ gpio_wdt_start(); -+ else if (value & WDIOS_DISABLECARD) -+ gpio_wdt_stop(); -+ else -+ return -EINVAL; -+ return 0; -+ case WDIOC_KEEPALIVE: -+ gpio_wdt_reset(); -+ break; -+ default: -+ return -ENOTTY; -+ } -+ return 0; -+} -+ -+ -+static ssize_t gpio_wdt_write(struct file *file, const char *buf, -+ size_t count, loff_t *ppos) -+{ -+ if (!count) -+ return -EIO; -+ gpio_wdt_reset(); -+ return count; -+} -+ -+static const struct file_operations gpio_wdt_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .unlocked_ioctl = gpio_wdt_ioctl, -+ .open = gpio_wdt_open, -+ .write = gpio_wdt_write, -+ .release = gpio_wdt_release, -+}; -+ -+ -+static struct miscdevice gpio_wdt_misc = { -+ .minor = WATCHDOG_MINOR, -+ .name = "watchdog", -+ .fops = &gpio_wdt_fops, -+}; -+ -+ -+static int gpio_wdt_probe(struct platform_device *pdev) -+{ -+ int ret; -+ struct gpio_wdt_platform_data *gpio_wdt_data = pdev->dev.platform_data; -+ -+ gpio_wdt_device.gpio = gpio_wdt_data->gpio; -+ gpio_wdt_device.interval = gpio_wdt_data->interval; -+ gpio_wdt_device.first_interval = gpio_wdt_data->first_interval; -+ if (gpio_wdt_device.first_interval <= 0) { -+ gpio_wdt_device.first_interval = gpio_wdt_device.interval; -+ } -+ -+ ret = gpio_request(gpio_wdt_device.gpio, "gpio-wdt"); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "failed to request gpio"); -+ return ret; -+ } -+ -+ spin_lock_init(&gpio_wdt_device.lock); -+ init_completion(&gpio_wdt_device.stop); -+ gpio_wdt_device.queue = 0; -+ clear_bit(0, &gpio_wdt_device.inuse); -+ timer_setup(&gpio_wdt_device.timer, gpio_wdt_trigger, 0L); -+ gpio_wdt_device.default_ticks = ticks; -+ -+ gpio_wdt_start(); -+ dev_info(&pdev->dev, "GPIO Hardware Watchdog driver (gpio=%i interval=%i/%i)\n", -+ gpio_wdt_data->gpio, gpio_wdt_data->first_interval, gpio_wdt_data->interval); -+ return 0; -+} -+ -+static int gpio_wdt_remove(struct platform_device *pdev) -+{ -+ /* FIXME: do we need to lock this test ? */ -+ if (gpio_wdt_device.queue) { -+ gpio_wdt_device.queue = 0; -+ wait_for_completion(&gpio_wdt_device.stop); -+ } -+ -+ gpio_free(gpio_wdt_device.gpio); -+ misc_deregister(&gpio_wdt_misc); -+ return 0; -+} -+ -+static struct platform_driver gpio_wdt_driver = { -+ .probe = gpio_wdt_probe, -+ .remove = gpio_wdt_remove, -+ .driver.name = "gpio-wdt", -+ .driver.owner = THIS_MODULE, -+}; -+ -+static int __init gpio_wdt_init(void) -+{ -+ return platform_driver_register(&gpio_wdt_driver); -+} -+arch_initcall(gpio_wdt_init); -+ -+/* -+ * We do wdt initialization in two steps: arch_initcall probes the wdt -+ * very early to start pinging the watchdog (misc devices are not yet -+ * available), and later module_init() just registers the misc device. -+ */ -+static int gpio_wdt_init_late(void) -+{ -+ int ret; -+ -+ ret = misc_register(&gpio_wdt_misc); -+ if (ret < 0) { -+ pr_err("GPIO_WDT: failed to register misc device\n"); -+ return ret; -+ } -+ return 0; -+} -+#ifndef MODULE -+module_init(gpio_wdt_init_late); -+#endif -+ -+static void __exit gpio_wdt_exit(void) -+{ -+ platform_driver_unregister(&gpio_wdt_driver); -+} -+module_exit(gpio_wdt_exit); -+ -+MODULE_AUTHOR("Michael Stickel, Florian Fainelli, Mathias Adam"); -+MODULE_DESCRIPTION("Driver for GPIO hardware watchdogs"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); -+MODULE_ALIAS("platform:gpio-wdt"); ---- /dev/null -+++ b/include/linux/old_gpio_wdt.h -@@ -0,0 +1,21 @@ -+/* -+ * Definitions for the GPIO watchdog driver -+ * -+ * Copyright (C) 2013 Mathias Adam -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#ifndef _GPIO_WDT_H_ -+#define _GPIO_WDT_H_ -+ -+struct gpio_wdt_platform_data { -+ int gpio; /* GPIO line number */ -+ int interval; /* watchdog reset interval in system ticks */ -+ int first_interval; /* first wd reset interval in system ticks */ -+}; -+ -+#endif /* _GPIO_WDT_H_ */ diff --git a/target/linux/bcm47xx/patches-4.19/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch b/target/linux/bcm47xx/patches-4.19/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch deleted file mode 100644 index 6b7ee06e50..0000000000 --- a/target/linux/bcm47xx/patches-4.19/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Wed, 8 Apr 2015 06:58:11 +0200 -Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -If SoC has a CardBus we can set resources of device at slot 1 only. It's -impossigle to set bridge resources as it simply overwrites device 1 -configuration and usually results in Data bus error-s. - -Signed-off-by: Rafał Miłecki ---- - drivers/ssb/driver_pcicore.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/ssb/driver_pcicore.c -+++ b/drivers/ssb/driver_pcicore.c -@@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struc - WARN_ON(!pc->hostmode); - if (unlikely(len != 1 && len != 2 && len != 4)) - goto out; -+ /* CardBus SoCs allow configuring dev 1 resources only */ -+ if (extpci_core->cardbusmode && dev != 1 && -+ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5) -+ goto out; - addr = get_cfgspace_addr(pc, bus, dev, func, off); - if (unlikely(!addr)) - goto out; diff --git a/target/linux/bcm47xx/patches-4.19/940-bcm47xx-yenta.patch b/target/linux/bcm47xx/patches-4.19/940-bcm47xx-yenta.patch deleted file mode 100644 index f5b7bda4e6..0000000000 --- a/target/linux/bcm47xx/patches-4.19/940-bcm47xx-yenta.patch +++ /dev/null @@ -1,46 +0,0 @@ ---- a/drivers/pcmcia/yenta_socket.c -+++ b/drivers/pcmcia/yenta_socket.c -@@ -920,6 +920,8 @@ static unsigned int yenta_probe_irq(stru - * Probe for usable interrupts using the force - * register to generate bogus card status events. - */ -+#ifndef CONFIG_BCM47XX -+ /* WRT54G3G does not like this */ - cb_writel(socket, CB_SOCKET_EVENT, -1); - cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); - reg = exca_readb(socket, I365_CSCINT); -@@ -935,6 +937,7 @@ static unsigned int yenta_probe_irq(stru - } - cb_writel(socket, CB_SOCKET_MASK, 0); - exca_writeb(socket, I365_CSCINT, reg); -+#endif - - mask = probe_irq_mask(val) & 0xffff; - -@@ -1019,6 +1022,10 @@ static void yenta_get_socket_capabilitie - else - socket->socket.irq_mask = 0; - -+ /* irq mask probing is broken for the WRT54G3G */ -+ if (socket->socket.irq_mask == 0) -+ socket->socket.irq_mask = 0x6f8; -+ - dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n", - socket->socket.irq_mask, socket->cb_irq); - } -@@ -1250,6 +1257,15 @@ static int yenta_probe(struct pci_dev *d - dev_info(&dev->dev, "Socket status: %08x\n", - cb_readl(socket, CB_SOCKET_STATE)); - -+ /* Generate an interrupt on card insert/remove */ -+ config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK); -+ -+ /* Set up Multifunction Routing Status Register */ -+ config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */); -+ -+ /* Switch interrupts to parallelized */ -+ config_writeb(socket, 0x92, 0x64); -+ - yenta_fixup_parent_bridge(dev->subordinate); - - /* Register it with the pcmcia layer.. */ diff --git a/target/linux/bcm47xx/patches-4.19/976-ssb_increase_pci_delay.patch b/target/linux/bcm47xx/patches-4.19/976-ssb_increase_pci_delay.patch deleted file mode 100644 index 99aa188374..0000000000 --- a/target/linux/bcm47xx/patches-4.19/976-ssb_increase_pci_delay.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/ssb/driver_pcicore.c -+++ b/drivers/ssb/driver_pcicore.c -@@ -390,7 +390,7 @@ static void ssb_pcicore_init_hostmode(st - set_io_port_base(ssb_pcicore_controller.io_map_base); - /* Give some time to the PCI controller to configure itself with the new - * values. Not waiting at this point causes crashes of the machine. */ -- mdelay(10); -+ mdelay(300); - register_pci_controller(&ssb_pcicore_controller); - } - diff --git a/target/linux/bcm47xx/patches-4.19/999-wl_exports.patch b/target/linux/bcm47xx/patches-4.19/999-wl_exports.patch deleted file mode 100644 index 2936421aff..0000000000 --- a/target/linux/bcm47xx/patches-4.19/999-wl_exports.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/drivers/firmware/broadcom/bcm47xx_nvram.c -+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c -@@ -34,7 +34,8 @@ struct nvram_header { - u32 config_ncdl; /* ncdl values for memc */ - }; - --static char nvram_buf[NVRAM_SPACE]; -+char nvram_buf[NVRAM_SPACE]; -+EXPORT_SYMBOL(nvram_buf); - static size_t nvram_len; - static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000}; - static int cfe_env; ---- a/arch/mips/mm/cache.c -+++ b/arch/mips/mm/cache.c -@@ -64,6 +64,7 @@ void (*_dma_cache_wback)(unsigned long s - void (*_dma_cache_inv)(unsigned long start, unsigned long size); - - EXPORT_SYMBOL(_dma_cache_wback_inv); -+EXPORT_SYMBOL(_dma_cache_inv); - - #endif /* CONFIG_DMA_NONCOHERENT */ - diff --git a/target/linux/bcm53xx/config-4.19 b/target/linux/bcm53xx/config-4.19 deleted file mode 100644 index 2531a86046..0000000000 --- a/target/linux/bcm53xx/config-4.19 +++ /dev/null @@ -1,362 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_BCM=y -CONFIG_ARCH_BCM_5301X=y -CONFIG_ARCH_BCM_53573=y -# CONFIG_ARCH_BCM_HR2 is not set -CONFIG_ARCH_BCM_IPROC=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -# CONFIG_ARM_ATAG_DTB_COMPAT is not set -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GLOBAL_TIMER=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_VIRT_EXT=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BCM47XX_NVRAM=y -CONFIG_BCM47XX_SPROM=y -CONFIG_BCM47XX_WDT=y -CONFIG_BCMA=y -CONFIG_BCMA_BLOCKIO=y -CONFIG_BCMA_DEBUG=y -CONFIG_BCMA_DRIVER_GMAC_CMN=y -CONFIG_BCMA_DRIVER_GPIO=y -CONFIG_BCMA_DRIVER_PCI=y -CONFIG_BCMA_HOST_PCI=y -CONFIG_BCMA_HOST_PCI_POSSIBLE=y -CONFIG_BCMA_HOST_SOC=y -CONFIG_BCMA_SFLASH=y -CONFIG_BCM_NET_PHYLIB=y -CONFIG_BCM_NS_THERMAL=y -CONFIG_BGMAC=y -CONFIG_BGMAC_BCMA=y -# CONFIG_BGMAC_PLATFORM is not set -CONFIG_BLK_MQ_PCI=y -CONFIG_BOUNCE=y -CONFIG_BROADCOM_PHY=y -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y -CONFIG_CLKSRC_MMIO=y -# CONFIG_CLK_BCM_NS2 is not set -CONFIG_CLK_BCM_NSP=y -# CONFIG_CLK_BCM_SR is not set -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_IPROC=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BCM_5301X=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_UART_8250=y -# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set -CONFIG_DEBUG_UART_8250_SHIFT=0 -CONFIG_DEBUG_UART_PHYS=0x18000300 -CONFIG_DEBUG_UART_VIRT=0xf1000300 -CONFIG_DEBUG_UNCOMPRESS=y -CONFIG_DEBUG_USER=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXTCON=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_74X164=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BCM_IPROC=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -# CONFIG_MDIO_BUS_MUX_BCM_IPROC is not set -CONFIG_MDIO_BUS_MUX_MMIOREG=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_BCM47XXSFLASH=y -CONFIG_MTD_BCM47XX_PARTS=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_BRCMNAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_PARSER_TRX=y -# CONFIG_MTD_PHYSMAP_OF is not set -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_SEAMA_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -CONFIG_PCIE_IPROC=y -CONFIG_PCIE_IPROC_BCMA=y -# CONFIG_PCIE_IPROC_PLATFORM is not set -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -# CONFIG_PHY_BCM_NS_USB2 is not set -# CONFIG_PHY_BCM_NS_USB3 is not set -# CONFIG_PHY_BCM_SR_PCIE is not set -# CONFIG_PHY_BRCM_SATA is not set -# CONFIG_PHY_NS2_USB_DRD is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_IPROC_GPIO is not set -CONFIG_PINCTRL_NS=y -# CONFIG_PINCTRL_NS2_MUX is not set -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SERIAL_8250_FSL=y -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BCM_QSPI=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_B53=y -# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set -CONFIG_SWCONFIG_B53_PHY_DRIVER=y -CONFIG_SWCONFIG_B53_PHY_FIXUP=y -CONFIG_SWCONFIG_B53_SRAB_DRIVER=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -# CONFIG_VFP is not set -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/bcm53xx/patches-4.19/030-v4.20-0001-ARM-dts-BCM5301X-Specify-flash-partitions.patch b/target/linux/bcm53xx/patches-4.19/030-v4.20-0001-ARM-dts-BCM5301X-Specify-flash-partitions.patch deleted file mode 100644 index e6e2522f08..0000000000 --- a/target/linux/bcm53xx/patches-4.19/030-v4.20-0001-ARM-dts-BCM5301X-Specify-flash-partitions.patch +++ /dev/null @@ -1,167 +0,0 @@ -From b0465fdfdd7e7c1afe2fae1cb36b94e1ce89732e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Sat, 28 Jul 2018 14:13:57 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Specify flash partitions -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Most devices use Broadcom standard partitions which allows them to be -described with the "brcm,bcm947xx-cfe-partitions". Exceptions are: -1) TP-LINK devices which use "os-image" partition with TRX containing - kernel only + separated rootfs partition. -2) Asus RT-AC87U with custom "asus" partition. - -This commit also removes undocumented and unsupported linux,part-probe -binding which got accidentally upstreamed while describing SPI -controller. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts | 28 +++++++++++++++++++ - arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 31 ++++++++++++++++++++++ - arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 28 +++++++++++++++++++ - arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 4 +++ - arch/arm/boot/dts/bcm5301x.dtsi | 5 +++- - 5 files changed, 95 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -+++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -@@ -94,6 +94,34 @@ - - &spi_nor { - status = "okay"; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ boot@0 { -+ label = "boot"; -+ reg = <0x000000 0x040000>; -+ read-only; -+ }; -+ -+ os-image@100000 { -+ label = "os-image"; -+ reg = <0x040000 0x200000>; -+ compatible = "brcm,trx"; -+ }; -+ -+ rootfs@240000 { -+ label = "rootfs"; -+ reg = <0x240000 0xc00000>; -+ }; -+ -+ nvram@ff0000 { -+ label = "nvram"; -+ reg = <0xff0000 0x010000>; -+ }; -+ }; - }; - - &usb2 { ---- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts -@@ -66,3 +66,34 @@ - &usb3_phy { - status = "okay"; - }; -+ -+&nandcs { -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ boot@0 { -+ label = "boot"; -+ reg = <0x00000000 0x00080000>; -+ read-only; -+ }; -+ -+ nvram@80000 { -+ label = "nvram"; -+ reg = <0x00080000 0x00180000>; -+ }; -+ -+ firmware@200000 { -+ label = "firmware"; -+ reg = <0x00200000 0x07cc0000>; -+ compatible = "brcm,trx"; -+ }; -+ -+ asus@7ec0000 { -+ label = "asus"; -+ reg = <0x07ec0000 0x00140000>; -+ read-only; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -+++ b/arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts -@@ -103,6 +103,34 @@ - - &spi_nor { - status = "okay"; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ boot@0 { -+ label = "boot"; -+ reg = <0x000000 0x040000>; -+ read-only; -+ }; -+ -+ os-image@100000 { -+ label = "os-image"; -+ reg = <0x040000 0x200000>; -+ compatible = "brcm,trx"; -+ }; -+ -+ rootfs@240000 { -+ label = "rootfs"; -+ reg = <0x240000 0xc00000>; -+ }; -+ -+ nvram@ff0000 { -+ label = "nvram"; -+ reg = <0xff0000 0x010000>; -+ }; -+ }; - }; - - &usb3_phy { ---- a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi -+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi -@@ -12,6 +12,10 @@ - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; -+ -+ partitions { -+ compatible = "brcm,bcm947xx-cfe-partitions"; -+ }; - }; - }; - }; ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -475,8 +475,11 @@ - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <20000000>; -- linux,part-probe = "ofpart", "bcm47xxpart"; - status = "disabled"; -+ -+ partitions { -+ compatible = "brcm,bcm947xx-cfe-partitions"; -+ }; - }; - }; - diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0001-ARM-dts-BCM5301X-Relicense-BCM47081-BCM4709-files-to.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0001-ARM-dts-BCM5301X-Relicense-BCM47081-BCM4709-files-to.patch deleted file mode 100644 index 2dc6b2c23c..0000000000 --- a/target/linux/bcm53xx/patches-4.19/031-v4.21-0001-ARM-dts-BCM5301X-Relicense-BCM47081-BCM4709-files-to.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 26ff86f7794b9466481ccf29ac79925d327f106d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 20 Sep 2018 13:18:47 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Relicense BCM47081/BCM4709 files to the - GPL 2.0+ / MIT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This matches licensing used by other BCM5301X files and is preferred as: -1) GPL 2.0+ makes it clearly compatible with Linux kernel -2) MIT is also permissive but preferred over ISC - -Both files were fully developed by me. Commits touching them were signed -by Florian and Hauke due to submitting process only. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm47081.dtsi | 13 +------------ - arch/arm/boot/dts/bcm4709.dtsi | 3 +-- - 2 files changed, 2 insertions(+), 14 deletions(-) - ---- a/arch/arm/boot/dts/bcm47081.dtsi -+++ b/arch/arm/boot/dts/bcm47081.dtsi -@@ -1,20 +1,9 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - /* - * Broadcom BCM470X / BCM5301X ARM platform code. - * DTS for BCM47081 SoC. - * - * Copyright © 2014 Rafał Miłecki -- * -- * Permission to use, copy, modify, and/or distribute this software for any -- * purpose with or without fee is hereby granted, provided that the above -- * copyright notice and this permission notice appear in all copies. -- * -- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH -- * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY -- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, -- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM -- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE -- * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -- * PERFORMANCE OF THIS SOFTWARE. - */ - - #include "bcm5301x.dtsi" ---- a/arch/arm/boot/dts/bcm4709.dtsi -+++ b/arch/arm/boot/dts/bcm4709.dtsi -@@ -1,7 +1,6 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - /* - * Copyright (C) 2016 Rafał Miłecki -- * -- * Licensed under the ISC license. - */ - - #include "bcm4708.dtsi" diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0002-ARM-dts-BCM5301X-Relicense-BCM47094-file-to-the-GPL-.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0002-ARM-dts-BCM5301X-Relicense-BCM47094-file-to-the-GPL-.patch deleted file mode 100644 index 86c6b0ae41..0000000000 --- a/target/linux/bcm53xx/patches-4.19/031-v4.21-0002-ARM-dts-BCM5301X-Relicense-BCM47094-file-to-the-GPL-.patch +++ /dev/null @@ -1,33 +0,0 @@ -From d10967344375026ca8762b6080dec2585d895906 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 20 Sep 2018 13:20:19 +0200 -Subject: [PATCH] ARM: dts: BCM5301X: Relicense BCM47094 file to the GPL 2.0+ / - MIT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This matches licensing used by other BCM5301X files and is preferred as: -1) GPL 2.0+ makes it clearly compatible with Linux kernel -2) MIT is also permissive but preferred over ISC - -This file has been developed by me & once modified by Vivek. - -Signed-off-by: Rafał Miłecki -Acked-by: Vivek Unune -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm47094.dtsi | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/bcm47094.dtsi -+++ b/arch/arm/boot/dts/bcm47094.dtsi -@@ -1,7 +1,6 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - /* - * Copyright (C) 2016 Rafał Miłecki -- * -- * Licensed under the ISC license. - */ - - #include "bcm4708.dtsi" diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0003-ARM-dts-BCM53573-Relicense-Tenda-AC9-file-to-the-GPL.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0003-ARM-dts-BCM53573-Relicense-Tenda-AC9-file-to-the-GPL.patch deleted file mode 100644 index a5358b70c3..0000000000 --- a/target/linux/bcm53xx/patches-4.19/031-v4.21-0003-ARM-dts-BCM53573-Relicense-Tenda-AC9-file-to-the-GPL.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 1c9001b4f69a37820862286b3bbcdde152a52dcf Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 20 Sep 2018 13:37:47 +0200 -Subject: [PATCH] ARM: dts: BCM53573: Relicense Tenda AC9 file to the GPL 2.0+ - / MIT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This matches licensing used by most of BCM5301X files and is preferred as: -1) GPL 2.0+ makes it clearly compatible with Linux kernel -2) MIT is also permissive but preferred over ISC - -This file was fully developed by me. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts -@@ -1,7 +1,6 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - /* - * Copyright (C) 2016 Rafał Miłecki -- * -- * Licensed under the ISC license. - */ - - /dts-v1/; diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0004-ARM-dts-BCM53573-Relicense-SoC-file-to-the-GPL-2.0-M.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0004-ARM-dts-BCM53573-Relicense-SoC-file-to-the-GPL-2.0-M.patch deleted file mode 100644 index 56cd6376aa..0000000000 --- a/target/linux/bcm53xx/patches-4.19/031-v4.21-0004-ARM-dts-BCM53573-Relicense-SoC-file-to-the-GPL-2.0-M.patch +++ /dev/null @@ -1,33 +0,0 @@ -From ca3a6e705cad10662827093d5426abe078861793 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 20 Sep 2018 13:39:28 +0200 -Subject: [PATCH] ARM: dts: BCM53573: Relicense SoC file to the GPL 2.0+ / MIT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This matches licensing used by most of BCM5301X files and is preferred as: -1) GPL 2.0+ makes it clearly compatible with Linux kernel -2) MIT is also permissive but preferred over ISC - -This file has been developed by me & once modified by Rob dropping a -single leading zero in an UART address. - -Signed-off-by: Rafał Miłecki -Acked-by: Rob Herring -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm53573.dtsi | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -1,7 +1,6 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - /* - * Copyright (C) 2016 Rafał Miłecki -- * -- * Licensed under the ISC license. - */ - - #include diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6500-V2.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6500-V2.patch deleted file mode 100644 index da37542f9d..0000000000 --- a/target/linux/bcm53xx/patches-4.19/031-v4.21-0005-ARM-dts-BCM5301X-Add-basic-DT-for-Linksys-EA6500-V2.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 03e96644d7a810916fc4997d572577e876908b18 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ren=C3=A9=20Kjellerup?= -Date: Mon, 1 Oct 2018 15:07:16 -0700 -Subject: [PATCH] ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2 - -It is wireless home router based on BCM4708A0 with BCM4360 + BCM4331 -wireless chipsets. The BCM4331 5GHz chip currently isn't supported only -due to missing compatible firmware. - -Signed-off-by: Rene Kjellerup -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts | 45 +++++++++++++++++++++++++ - 2 files changed, 46 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac68u.dtb \ - bcm4708-buffalo-wzr-1750dhp.dtb \ - bcm4708-linksys-ea6300-v1.dtb \ -+ bcm4708-linksys-ea6500-v2.dtb \ - bcm4708-luxul-xap-1510.dtb \ - bcm4708-luxul-xwc-1000.dtb \ - bcm4708-netgear-r6250.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts -@@ -0,0 +1,45 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+/* -+ * Copyright (C) 2017 Rafał Miłecki -+ * Copyright (C) 2018 Rene Kjellerup -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4708.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "linksys,ea6500-v2", "brcm,bcm4708"; -+ model = "Linksys EA6500 V2"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wps { -+ label = "WPS"; -+ linux,code = ; -+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; -+ }; -+ -+ restart { -+ label = "Reset"; -+ linux,code = ; -+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&usb3_phy { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.19/031-v4.21-0006-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch b/target/linux/bcm53xx/patches-4.19/031-v4.21-0006-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch deleted file mode 100644 index 5f6dd17dc7..0000000000 --- a/target/linux/bcm53xx/patches-4.19/031-v4.21-0006-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 9994241ac97cb84d1df98fdc172d3cc6b04b11bf Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Fri, 9 Nov 2018 09:56:49 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Describe Northstar pins mux controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This describes hardware & will allow referencing pin functions. The -first usage is UART1 which allows supporting devices using it. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm5301x.dtsi | 44 +++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 44 insertions(+) - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -37,6 +37,8 @@ - reg = <0x0400 0x100>; - interrupts = ; - clocks = <&iprocslow>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinmux_uart1>; - status = "disabled"; - }; - }; -@@ -391,6 +393,48 @@ - status = "disabled"; - }; - -+ dmu@1800c000 { -+ compatible = "simple-bus"; -+ ranges = <0 0x1800c000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ cru@100 { -+ compatible = "simple-bus"; -+ reg = <0x100 0x1a4>; -+ ranges; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ pin-controller@1c0 { -+ compatible = "brcm,bcm4708-pinmux"; -+ reg = <0x1c0 0x24>; -+ reg-names = "cru_gpio_control"; -+ -+ spi-pins { -+ groups = "spi_grp"; -+ function = "spi"; -+ }; -+ -+ i2c { -+ groups = "i2c_grp"; -+ function = "i2c"; -+ }; -+ -+ pwm { -+ groups = "pwm0_grp", "pwm1_grp", -+ "pwm2_grp", "pwm3_grp"; -+ function = "pwm"; -+ }; -+ -+ pinmux_uart1: uart1 { -+ groups = "uart1_grp"; -+ function = "uart1"; -+ }; -+ }; -+ }; -+ }; -+ - lcpll0: lcpll0@1800c100 { - #clock-cells = <1>; - compatible = "brcm,nsp-lcpll0"; diff --git a/target/linux/bcm53xx/patches-4.19/032-v5.1-0001-ARM-dts-BCM53573-Relicense-Luxul-files-to-the-GPL-2..patch b/target/linux/bcm53xx/patches-4.19/032-v5.1-0001-ARM-dts-BCM53573-Relicense-Luxul-files-to-the-GPL-2..patch deleted file mode 100644 index 5883577d53..0000000000 --- a/target/linux/bcm53xx/patches-4.19/032-v5.1-0001-ARM-dts-BCM53573-Relicense-Luxul-files-to-the-GPL-2..patch +++ /dev/null @@ -1,41 +0,0 @@ -From b7f264fa496eb2a6dd1d67dc91dbe8ffcb142487 Mon Sep 17 00:00:00 2001 -From: Dan Haab -Date: Sun, 2 Dec 2018 17:00:15 -0700 -Subject: [PATCH] ARM: dts: BCM53573: Relicense Luxul files to the GPL 2.0+ / - MIT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This matches licensing used by other BCM53573 files and BCM5301X. - -Signed-off-by: Dan Haab -Acked-by: Rafał Miłecki -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts | 3 +-- - arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 3 +-- - 2 files changed, 2 insertions(+), 4 deletions(-) - ---- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts -@@ -1,7 +1,6 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - /* - * Copyright 2017 Luxul Inc. -- * -- * Licensed under the ISC license. - */ - - /dts-v1/; ---- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts -@@ -1,7 +1,6 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - /* - * Copyright 2017 Luxul Inc. -- * -- * Licensed under the ISC license. - */ - - /dts-v1/; diff --git a/target/linux/bcm53xx/patches-4.19/032-v5.1-0002-ARM-dts-BCM5301X-Add-basic-DT-for-Phicomm-K3.patch b/target/linux/bcm53xx/patches-4.19/032-v5.1-0002-ARM-dts-BCM5301X-Add-basic-DT-for-Phicomm-K3.patch deleted file mode 100644 index 3702dac41c..0000000000 --- a/target/linux/bcm53xx/patches-4.19/032-v5.1-0002-ARM-dts-BCM5301X-Add-basic-DT-for-Phicomm-K3.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 40a17923367118e32e5e413a952736dd83635b32 Mon Sep 17 00:00:00 2001 -From: Hao Dong -Date: Sun, 20 Jan 2019 23:33:27 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Add basic DT for Phicomm K3 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This router has BCM4709C0 SoC, 128 MiB NAND flash (MX30LF1G18AC-TI), -512 MiB memory and 3 x LAN and 1 x WAN ports. WiFi chips are -BCM4366C0 x 2. The router has a small LCD and 3 capactive keys driven by -a PIC microcontroller, which is in turn wired to UART1 of main board. - -Signed-off-by: Hao Dong -[rmilecki: drop chosen { }, fix whitespaces, update commit message] -Signed-off-by: Rafał Miłecki -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47094-phicomm-k3.dts | 71 +++++++++++++++++++++++ - 2 files changed, 72 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47094-phicomm-k3.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -114,6 +114,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm47094-luxul-xwr-3100.dtb \ - bcm47094-luxul-xwr-3150-v1.dtb \ - bcm47094-netgear-r8500.dtb \ -+ bcm47094-phicomm-k3.dtb \ - bcm94708.dtb \ - bcm94709.dtb \ - bcm953012er.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts -@@ -0,0 +1,71 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+/* -+ * Copyright (C) 2017 Hamster Tian -+ * Copyright (C) 2019 Hao Dong -+ */ -+ -+/dts-v1/; -+ -+#include "bcm47094.dtsi" -+#include "bcm5301x-nand-cs0-bch4.dtsi" -+ -+/ { -+ compatible = "phicomm,k3", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "Phicomm K3"; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x18000000>; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = ; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&usb3_phy { -+ status = "okay"; -+}; -+ -+&nandcs { -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "boot"; -+ reg = <0x0000000 0x0080000>; -+ read-only; -+ }; -+ -+ partition@80000 { -+ label = "nvram"; -+ reg = <0x0080000 0x0100000>; -+ }; -+ -+ partition@180000{ -+ label = "phicomm"; -+ reg = <0x0180000 0x0280000>; -+ read-only; -+ }; -+ -+ partition@400000 { -+ label = "firmware"; -+ reg = <0x0400000 0x7C00000>; -+ compatible = "brcm,trx"; -+ }; -+ }; -+}; diff --git a/target/linux/bcm53xx/patches-4.19/080-v4.20-0001-pinctrl-bcm-add-Northstar-driver.patch b/target/linux/bcm53xx/patches-4.19/080-v4.20-0001-pinctrl-bcm-add-Northstar-driver.patch deleted file mode 100644 index 44871e29c8..0000000000 --- a/target/linux/bcm53xx/patches-4.19/080-v4.20-0001-pinctrl-bcm-add-Northstar-driver.patch +++ /dev/null @@ -1,427 +0,0 @@ -From c12fb1774deaa9c9408b19db8d43d3612f6e47a0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Wed, 26 Sep 2018 21:31:03 +0200 -Subject: [PATCH] pinctrl: bcm: add Northstar driver -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This driver provides support for Northstar mux controller. It differs -from Northstar Plus one so a new binding and driver were needed. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Linus Walleij ---- - drivers/pinctrl/bcm/Kconfig | 13 ++ - drivers/pinctrl/bcm/Makefile | 1 + - drivers/pinctrl/bcm/pinctrl-ns.c | 372 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 386 insertions(+) - create mode 100644 drivers/pinctrl/bcm/pinctrl-ns.c - ---- a/drivers/pinctrl/bcm/Kconfig -+++ b/drivers/pinctrl/bcm/Kconfig -@@ -73,6 +73,19 @@ config PINCTRL_CYGNUS_MUX - configuration, with the exception that certain individual pins - can be overridden to GPIO function - -+config PINCTRL_NS -+ bool "Broadcom Northstar pins driver" -+ depends on OF && (ARCH_BCM_5301X || COMPILE_TEST) -+ select PINMUX -+ select GENERIC_PINCONF -+ default ARCH_BCM_5301X -+ help -+ Say yes here to enable the Broadcom NS SoC pins driver. -+ -+ The Broadcom Northstar pins driver supports muxing multi-purpose pins -+ that can be used for various functions (e.g. SPI, I2C, UART) as well -+ as GPIOs. -+ - config PINCTRL_NSP_GPIO - bool "Broadcom NSP GPIO (with PINCONF) driver" - depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST) ---- a/drivers/pinctrl/bcm/Makefile -+++ b/drivers/pinctrl/bcm/Makefile -@@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BCM281XX) += pinct - obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o - obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o - obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o -+obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o - obj-$(CONFIG_PINCTRL_NSP_GPIO) += pinctrl-nsp-gpio.o - obj-$(CONFIG_PINCTRL_NS2_MUX) += pinctrl-ns2-mux.o - obj-$(CONFIG_PINCTRL_NSP_MUX) += pinctrl-nsp-mux.o ---- /dev/null -+++ b/drivers/pinctrl/bcm/pinctrl-ns.c -@@ -0,0 +1,372 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 Rafał Miłecki -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define FLAG_BCM4708 BIT(1) -+#define FLAG_BCM4709 BIT(2) -+#define FLAG_BCM53012 BIT(3) -+ -+struct ns_pinctrl { -+ struct device *dev; -+ unsigned int chipset_flag; -+ struct pinctrl_dev *pctldev; -+ void __iomem *base; -+ -+ struct pinctrl_desc pctldesc; -+ struct ns_pinctrl_group *groups; -+ unsigned int num_groups; -+ struct ns_pinctrl_function *functions; -+ unsigned int num_functions; -+}; -+ -+/* -+ * Pins -+ */ -+ -+static const struct pinctrl_pin_desc ns_pinctrl_pins[] = { -+ { 0, "spi_clk", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 1, "spi_ss", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 2, "spi_mosi", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 3, "spi_miso", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 4, "i2c_scl", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 5, "i2c_sda", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 6, "mdc", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 7, "mdio", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 8, "pwm0", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 9, "pwm1", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 10, "pwm2", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 11, "pwm3", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 12, "uart1_rx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 13, "uart1_tx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 14, "uart1_cts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 15, "uart1_rts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 16, "uart2_rx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 17, "uart2_tx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, -+/* TODO { ??, "xtal_out", (void *)(FLAG_BCM4709) }, */ -+ { 22, "sdio_pwr", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, -+ { 23, "sdio_en_1p8v", (void *)(FLAG_BCM4709 | FLAG_BCM53012) }, -+}; -+ -+/* -+ * Groups -+ */ -+ -+struct ns_pinctrl_group { -+ const char *name; -+ const unsigned int *pins; -+ const unsigned int num_pins; -+ unsigned int chipsets; -+}; -+ -+static const unsigned int spi_pins[] = { 0, 1, 2, 3 }; -+static const unsigned int i2c_pins[] = { 4, 5 }; -+static const unsigned int mdio_pins[] = { 6, 7 }; -+static const unsigned int pwm0_pins[] = { 8 }; -+static const unsigned int pwm1_pins[] = { 9 }; -+static const unsigned int pwm2_pins[] = { 10 }; -+static const unsigned int pwm3_pins[] = { 11 }; -+static const unsigned int uart1_pins[] = { 12, 13, 14, 15 }; -+static const unsigned int uart2_pins[] = { 16, 17 }; -+static const unsigned int sdio_pwr_pins[] = { 22 }; -+static const unsigned int sdio_1p8v_pins[] = { 23 }; -+ -+#define NS_GROUP(_name, _pins, _chipsets) \ -+{ \ -+ .name = _name, \ -+ .pins = _pins, \ -+ .num_pins = ARRAY_SIZE(_pins), \ -+ .chipsets = _chipsets, \ -+} -+ -+static const struct ns_pinctrl_group ns_pinctrl_groups[] = { -+ NS_GROUP("spi_grp", spi_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("i2c_grp", i2c_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("mdio_grp", mdio_pins, FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("pwm0_grp", pwm0_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("pwm1_grp", pwm1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("pwm2_grp", pwm2_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("pwm3_grp", pwm3_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("uart1_grp", uart1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("uart2_grp", uart2_pins, FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("sdio_pwr_grp", sdio_pwr_pins, FLAG_BCM4709 | FLAG_BCM53012), -+ NS_GROUP("sdio_1p8v_grp", sdio_1p8v_pins, FLAG_BCM4709 | FLAG_BCM53012), -+}; -+ -+/* -+ * Functions -+ */ -+ -+struct ns_pinctrl_function { -+ const char *name; -+ const char * const *groups; -+ const unsigned int num_groups; -+ unsigned int chipsets; -+}; -+ -+static const char * const spi_groups[] = { "spi_grp" }; -+static const char * const i2c_groups[] = { "i2c_grp" }; -+static const char * const mdio_groups[] = { "mdio_grp" }; -+static const char * const pwm_groups[] = { "pwm0_grp", "pwm1_grp", "pwm2_grp", -+ "pwm3_grp" }; -+static const char * const uart1_groups[] = { "uart1_grp" }; -+static const char * const uart2_groups[] = { "uart2_grp" }; -+static const char * const sdio_groups[] = { "sdio_pwr_grp", "sdio_1p8v_grp" }; -+ -+#define NS_FUNCTION(_name, _groups, _chipsets) \ -+{ \ -+ .name = _name, \ -+ .groups = _groups, \ -+ .num_groups = ARRAY_SIZE(_groups), \ -+ .chipsets = _chipsets, \ -+} -+ -+static const struct ns_pinctrl_function ns_pinctrl_functions[] = { -+ NS_FUNCTION("spi", spi_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_FUNCTION("i2c", i2c_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_FUNCTION("mdio", mdio_groups, FLAG_BCM4709 | FLAG_BCM53012), -+ NS_FUNCTION("pwm", pwm_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_FUNCTION("uart1", uart1_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012), -+ NS_FUNCTION("uart2", uart2_groups, FLAG_BCM4709 | FLAG_BCM53012), -+ NS_FUNCTION("sdio", sdio_groups, FLAG_BCM4709 | FLAG_BCM53012), -+}; -+ -+/* -+ * Groups code -+ */ -+ -+static int ns_pinctrl_get_groups_count(struct pinctrl_dev *pctrl_dev) -+{ -+ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ -+ return ns_pinctrl->num_groups; -+} -+ -+static const char *ns_pinctrl_get_group_name(struct pinctrl_dev *pctrl_dev, -+ unsigned int selector) -+{ -+ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ -+ return ns_pinctrl->groups[selector].name; -+} -+ -+static int ns_pinctrl_get_group_pins(struct pinctrl_dev *pctrl_dev, -+ unsigned int selector, -+ const unsigned int **pins, -+ unsigned int *num_pins) -+{ -+ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ -+ *pins = ns_pinctrl->groups[selector].pins; -+ *num_pins = ns_pinctrl->groups[selector].num_pins; -+ -+ return 0; -+} -+ -+static const struct pinctrl_ops ns_pinctrl_ops = { -+ .get_groups_count = ns_pinctrl_get_groups_count, -+ .get_group_name = ns_pinctrl_get_group_name, -+ .get_group_pins = ns_pinctrl_get_group_pins, -+ .dt_node_to_map = pinconf_generic_dt_node_to_map_group, -+ .dt_free_map = pinconf_generic_dt_free_map, -+}; -+ -+/* -+ * Functions code -+ */ -+ -+static int ns_pinctrl_get_functions_count(struct pinctrl_dev *pctrl_dev) -+{ -+ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ -+ return ns_pinctrl->num_functions; -+} -+ -+static const char *ns_pinctrl_get_function_name(struct pinctrl_dev *pctrl_dev, -+ unsigned int selector) -+{ -+ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ -+ return ns_pinctrl->functions[selector].name; -+} -+ -+static int ns_pinctrl_get_function_groups(struct pinctrl_dev *pctrl_dev, -+ unsigned int selector, -+ const char * const **groups, -+ unsigned * const num_groups) -+{ -+ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ -+ *groups = ns_pinctrl->functions[selector].groups; -+ *num_groups = ns_pinctrl->functions[selector].num_groups; -+ -+ return 0; -+} -+ -+static int ns_pinctrl_set_mux(struct pinctrl_dev *pctrl_dev, -+ unsigned int func_select, -+ unsigned int grp_select) -+{ -+ struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev); -+ u32 unset = 0; -+ u32 tmp; -+ int i; -+ -+ for (i = 0; i < ns_pinctrl->groups[grp_select].num_pins; i++) { -+ int pin_number = ns_pinctrl->groups[grp_select].pins[i]; -+ -+ unset |= BIT(pin_number); -+ } -+ -+ tmp = readl(ns_pinctrl->base); -+ tmp &= ~unset; -+ writel(tmp, ns_pinctrl->base); -+ -+ return 0; -+} -+ -+static const struct pinmux_ops ns_pinctrl_pmxops = { -+ .get_functions_count = ns_pinctrl_get_functions_count, -+ .get_function_name = ns_pinctrl_get_function_name, -+ .get_function_groups = ns_pinctrl_get_function_groups, -+ .set_mux = ns_pinctrl_set_mux, -+}; -+ -+/* -+ * Controller code -+ */ -+ -+static struct pinctrl_desc ns_pinctrl_desc = { -+ .name = "pinctrl-ns", -+ .pctlops = &ns_pinctrl_ops, -+ .pmxops = &ns_pinctrl_pmxops, -+}; -+ -+static const struct of_device_id ns_pinctrl_of_match_table[] = { -+ { .compatible = "brcm,bcm4708-pinmux", .data = (void *)FLAG_BCM4708, }, -+ { .compatible = "brcm,bcm4709-pinmux", .data = (void *)FLAG_BCM4709, }, -+ { .compatible = "brcm,bcm53012-pinmux", .data = (void *)FLAG_BCM53012, }, -+ { } -+}; -+ -+static int ns_pinctrl_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ const struct of_device_id *of_id; -+ struct ns_pinctrl *ns_pinctrl; -+ struct pinctrl_desc *pctldesc; -+ struct pinctrl_pin_desc *pin; -+ struct ns_pinctrl_group *group; -+ struct ns_pinctrl_function *function; -+ struct resource *res; -+ int i; -+ -+ ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL); -+ if (!ns_pinctrl) -+ return -ENOMEM; -+ pctldesc = &ns_pinctrl->pctldesc; -+ platform_set_drvdata(pdev, ns_pinctrl); -+ -+ /* Set basic properties */ -+ -+ ns_pinctrl->dev = dev; -+ -+ of_id = of_match_device(ns_pinctrl_of_match_table, dev); -+ if (!of_id) -+ return -EINVAL; -+ ns_pinctrl->chipset_flag = (unsigned int)of_id->data; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -+ "cru_gpio_control"); -+ ns_pinctrl->base = devm_ioremap_resource(dev, res); -+ if (IS_ERR(ns_pinctrl->base)) { -+ dev_err(dev, "Failed to map pinctrl regs\n"); -+ return PTR_ERR(ns_pinctrl->base); -+ } -+ -+ memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc)); -+ -+ /* Set pinctrl properties */ -+ -+ pctldesc->pins = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_pins), -+ sizeof(struct pinctrl_pin_desc), -+ GFP_KERNEL); -+ if (!pctldesc->pins) -+ return -ENOMEM; -+ for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0]; -+ i < ARRAY_SIZE(ns_pinctrl_pins); i++) { -+ const struct pinctrl_pin_desc *src = &ns_pinctrl_pins[i]; -+ unsigned int chipsets = (unsigned int)src->drv_data; -+ -+ if (chipsets & ns_pinctrl->chipset_flag) { -+ memcpy(pin++, src, sizeof(*src)); -+ pctldesc->npins++; -+ } -+ } -+ -+ ns_pinctrl->groups = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_groups), -+ sizeof(struct ns_pinctrl_group), -+ GFP_KERNEL); -+ if (!ns_pinctrl->groups) -+ return -ENOMEM; -+ for (i = 0, group = &ns_pinctrl->groups[0]; -+ i < ARRAY_SIZE(ns_pinctrl_groups); i++) { -+ const struct ns_pinctrl_group *src = &ns_pinctrl_groups[i]; -+ -+ if (src->chipsets & ns_pinctrl->chipset_flag) { -+ memcpy(group++, src, sizeof(*src)); -+ ns_pinctrl->num_groups++; -+ } -+ } -+ -+ ns_pinctrl->functions = devm_kcalloc(dev, -+ ARRAY_SIZE(ns_pinctrl_functions), -+ sizeof(struct ns_pinctrl_function), -+ GFP_KERNEL); -+ if (!ns_pinctrl->functions) -+ return -ENOMEM; -+ for (i = 0, function = &ns_pinctrl->functions[0]; -+ i < ARRAY_SIZE(ns_pinctrl_functions); i++) { -+ const struct ns_pinctrl_function *src = &ns_pinctrl_functions[i]; -+ -+ if (src->chipsets & ns_pinctrl->chipset_flag) { -+ memcpy(function++, src, sizeof(*src)); -+ ns_pinctrl->num_functions++; -+ } -+ } -+ -+ /* Register */ -+ -+ ns_pinctrl->pctldev = devm_pinctrl_register(dev, pctldesc, ns_pinctrl); -+ if (IS_ERR(ns_pinctrl->pctldev)) { -+ dev_err(dev, "Failed to register pinctrl\n"); -+ return PTR_ERR(ns_pinctrl->pctldev); -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver ns_pinctrl_driver = { -+ .probe = ns_pinctrl_probe, -+ .driver = { -+ .name = "ns-pinmux", -+ .of_match_table = ns_pinctrl_of_match_table, -+ }, -+}; -+ -+module_platform_driver(ns_pinctrl_driver); -+ -+MODULE_AUTHOR("Rafał Miłecki"); -+MODULE_LICENSE("GPL v2"); -+MODULE_DEVICE_TABLE(of, ns_pinctrl_of_match_table); diff --git a/target/linux/bcm53xx/patches-4.19/080-v4.20-0002-pinctrl-bcm-ns-Use-uintptr_t-for-casting-data.patch b/target/linux/bcm53xx/patches-4.19/080-v4.20-0002-pinctrl-bcm-ns-Use-uintptr_t-for-casting-data.patch deleted file mode 100644 index afaed68d05..0000000000 --- a/target/linux/bcm53xx/patches-4.19/080-v4.20-0002-pinctrl-bcm-ns-Use-uintptr_t-for-casting-data.patch +++ /dev/null @@ -1,38 +0,0 @@ -From ce7bdb957b8e3f1cbf0a3358f1deef385dff6502 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 11 Oct 2018 13:23:40 +0200 -Subject: [PATCH] pinctrl: bcm: ns: Use uintptr_t for casting data -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Fix up a compiler error on 64bit architectures where pointers -and integers differ in size. - -Suggested-by: Arnd Bergmann -Signed-off-by: Rafał Miłecki -Signed-off-by: Linus Walleij ---- - drivers/pinctrl/bcm/pinctrl-ns.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/pinctrl/bcm/pinctrl-ns.c -+++ b/drivers/pinctrl/bcm/pinctrl-ns.c -@@ -285,7 +285,7 @@ static int ns_pinctrl_probe(struct platf - of_id = of_match_device(ns_pinctrl_of_match_table, dev); - if (!of_id) - return -EINVAL; -- ns_pinctrl->chipset_flag = (unsigned int)of_id->data; -+ ns_pinctrl->chipset_flag = (uintptr_t)of_id->data; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "cru_gpio_control"); -@@ -307,7 +307,7 @@ static int ns_pinctrl_probe(struct platf - for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0]; - i < ARRAY_SIZE(ns_pinctrl_pins); i++) { - const struct pinctrl_pin_desc *src = &ns_pinctrl_pins[i]; -- unsigned int chipsets = (unsigned int)src->drv_data; -+ unsigned int chipsets = (uintptr_t)src->drv_data; - - if (chipsets & ns_pinctrl->chipset_flag) { - memcpy(pin++, src, sizeof(*src)); diff --git a/target/linux/bcm53xx/patches-4.19/081-v4.21-0001-pinctrl-bcm-ns-support-updated-DT-binding-as-syscon-.patch b/target/linux/bcm53xx/patches-4.19/081-v4.21-0001-pinctrl-bcm-ns-support-updated-DT-binding-as-syscon-.patch deleted file mode 100644 index 45595bddc9..0000000000 --- a/target/linux/bcm53xx/patches-4.19/081-v4.21-0001-pinctrl-bcm-ns-support-updated-DT-binding-as-syscon-.patch +++ /dev/null @@ -1,99 +0,0 @@ -From a49d784d5a8272d0f63c448fe8dc69e589db006e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Tue, 18 Dec 2018 16:58:08 +0100 -Subject: [PATCH] pinctrl: bcm: ns: support updated DT binding as syscon - subnode -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Documentation has been recently updated specifying that pinctrl should -be subnode of the CRU "syscon". Support that by using parent node for -regmap and reading "offset" property from the DT. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Linus Walleij ---- - drivers/pinctrl/bcm/pinctrl-ns.c | 29 +++++++++++++++++++---------- - 1 file changed, 19 insertions(+), 10 deletions(-) - ---- a/drivers/pinctrl/bcm/pinctrl-ns.c -+++ b/drivers/pinctrl/bcm/pinctrl-ns.c -@@ -5,6 +5,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -12,6 +13,7 @@ - #include - #include - #include -+#include - #include - - #define FLAG_BCM4708 BIT(1) -@@ -22,7 +24,8 @@ struct ns_pinctrl { - struct device *dev; - unsigned int chipset_flag; - struct pinctrl_dev *pctldev; -- void __iomem *base; -+ struct regmap *regmap; -+ u32 offset; - - struct pinctrl_desc pctldesc; - struct ns_pinctrl_group *groups; -@@ -229,9 +232,9 @@ static int ns_pinctrl_set_mux(struct pin - unset |= BIT(pin_number); - } - -- tmp = readl(ns_pinctrl->base); -+ regmap_read(ns_pinctrl->regmap, ns_pinctrl->offset, &tmp); - tmp &= ~unset; -- writel(tmp, ns_pinctrl->base); -+ regmap_write(ns_pinctrl->regmap, ns_pinctrl->offset, tmp); - - return 0; - } -@@ -263,13 +266,13 @@ static const struct of_device_id ns_pinc - static int ns_pinctrl_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -+ struct device_node *np = dev->of_node; - const struct of_device_id *of_id; - struct ns_pinctrl *ns_pinctrl; - struct pinctrl_desc *pctldesc; - struct pinctrl_pin_desc *pin; - struct ns_pinctrl_group *group; - struct ns_pinctrl_function *function; -- struct resource *res; - int i; - - ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL); -@@ -287,12 +290,18 @@ static int ns_pinctrl_probe(struct platf - return -EINVAL; - ns_pinctrl->chipset_flag = (uintptr_t)of_id->data; - -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -- "cru_gpio_control"); -- ns_pinctrl->base = devm_ioremap_resource(dev, res); -- if (IS_ERR(ns_pinctrl->base)) { -- dev_err(dev, "Failed to map pinctrl regs\n"); -- return PTR_ERR(ns_pinctrl->base); -+ ns_pinctrl->regmap = syscon_node_to_regmap(of_get_parent(np)); -+ if (IS_ERR(ns_pinctrl->regmap)) { -+ int err = PTR_ERR(ns_pinctrl->regmap); -+ -+ dev_err(dev, "Failed to map pinctrl regs: %d\n", err); -+ -+ return err; -+ } -+ -+ if (of_property_read_u32(np, "offset", &ns_pinctrl->offset)) { -+ dev_err(dev, "Failed to get register offset\n"); -+ return -ENOENT; - } - - memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc)); diff --git a/target/linux/bcm53xx/patches-4.19/130-ARM-dts-BCM5301X-Add-DT-for-Luxul-XWC-2000.patch b/target/linux/bcm53xx/patches-4.19/130-ARM-dts-BCM5301X-Add-DT-for-Luxul-XWC-2000.patch deleted file mode 100644 index beeeda7b95..0000000000 --- a/target/linux/bcm53xx/patches-4.19/130-ARM-dts-BCM5301X-Add-DT-for-Luxul-XWC-2000.patch +++ /dev/null @@ -1,80 +0,0 @@ -From: Dan Haab -Date: Wed, 2 Oct 2019 09:57:26 -0600 -Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Luxul XWC-2000 - -It's a simple network device based on BCM47094 with just a single -Ethernet port. - -Signed-off-by: Dan Haab ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 53 +++++++++++++++++++ - 2 files changed, 54 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -111,6 +111,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm47094-luxul-abr-4500.dtb \ - bcm47094-luxul-xap-1610.dtb \ - bcm47094-luxul-xbr-4500.dtb \ -+ bcm47094-luxul-xwc-2000.dtb \ - bcm47094-luxul-xwr-3100.dtb \ - bcm47094-luxul-xwr-3150-v1.dtb \ - bcm47094-netgear-r8500.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts -@@ -0,0 +1,53 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+/* -+ * Copyright 2019 Legrand AV Inc. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm47094.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "luxul,xwc-2000-v1", "brcm,bcm47094", "brcm,bcm4708"; -+ model = "Luxul XWC-2000 V1"; -+ -+ chosen { -+ bootargs = "earlycon"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x18000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ status { -+ label = "bcm53xx:green:status"; -+ gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "timer"; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ restart { -+ label = "Reset"; -+ linux,code = ; -+ gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&spi_nor { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch deleted file mode 100644 index cd4d963966..0000000000 --- a/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch +++ /dev/null @@ -1,137 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Sat, 1 Oct 2016 22:54:48 +0200 -Subject: [PATCH] usb: xhci: add support for performing fake doorbell - -Broadcom's Northstar XHCI controllers seem to need a special start -procedure to work correctly. There isn't any official documentation of -this, the problem is that controller doesn't detect any connected -devices with default setup. Moreover connecting USB device to controller -that doesn't run properly can cause SoC's watchdog issues. - -A workaround that was successfully tested on multiple devices is to -perform a fake doorbell. This patch adds code for doing this and enables -it on BCM4708 family. ---- - drivers/usb/host/xhci-plat.c | 6 +++++ - drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++--- - drivers/usb/host/xhci.h | 1 + - 3 files changed, 67 insertions(+), 3 deletions(-) - ---- a/drivers/usb/host/xhci-plat.c -+++ b/drivers/usb/host/xhci-plat.c -@@ -65,12 +65,18 @@ static int xhci_priv_resume_quirk(struct - - static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) - { -+ struct platform_device *pdev = to_platform_device(dev); -+ struct device_node *node = pdev->dev.of_node; -+ - /* - * As of now platform drivers don't provide MSI support so we ensure - * here that the generic code does not try to make a pci_dev from our - * dev struct in order to setup MSI - */ - xhci->quirks |= XHCI_PLAT; -+ -+ if (node && of_machine_is_compatible("brcm,bcm4708")) -+ xhci->quirks |= XHCI_FAKE_DOORBELL; - } - - /* called during probe() after chip reset completes */ ---- a/drivers/usb/host/xhci.c -+++ b/drivers/usb/host/xhci.c -@@ -156,6 +156,49 @@ int xhci_start(struct xhci_hcd *xhci) - return ret; - } - -+/** -+ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot -+ * -+ * Some controllers require a fake doorbell to start correctly. Without that -+ * they simply don't detect any devices. -+ */ -+static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id) -+{ -+ u32 temp; -+ -+ /* Alloc a virt device for that slot */ -+ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) { -+ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n"); -+ return -ENOMEM; -+ } -+ -+ /* Ring fake doorbell for slot_id ep 0 */ -+ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0); -+ usleep_range(1000, 1500); -+ -+ /* Read the status to check if HSE is set or not */ -+ temp = readl(&xhci->op_regs->status); -+ -+ /* Clear HSE if set */ -+ if (temp & STS_FATAL) { -+ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp); -+ temp &= ~0x1fff; -+ temp |= STS_FATAL; -+ writel(temp, &xhci->op_regs->status); -+ usleep_range(1000, 1500); -+ readl(&xhci->op_regs->status); -+ } -+ -+ /* Free virt device */ -+ xhci_free_virt_device(xhci, slot_id); -+ -+ /* We're done if controller is already running */ -+ if (readl(&xhci->op_regs->command) & CMD_RUN) -+ return 0; -+ -+ return xhci_start(xhci); -+} -+ - /* - * Reset a halted HC. - * -@@ -603,10 +646,20 @@ static int xhci_init(struct usb_hcd *hcd - - static int xhci_run_finished(struct xhci_hcd *xhci) - { -- if (xhci_start(xhci)) { -- xhci_halt(xhci); -- return -ENODEV; -+ int err; -+ -+ err = xhci_start(xhci); -+ if (err) { -+ err = -ENODEV; -+ goto err_halt; - } -+ -+ if (xhci->quirks & XHCI_FAKE_DOORBELL) { -+ err = xhci_fake_doorbell(xhci, 1); -+ if (err) -+ goto err_halt; -+ } -+ - xhci->shared_hcd->state = HC_STATE_RUNNING; - xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; - -@@ -616,6 +669,10 @@ static int xhci_run_finished(struct xhci - xhci_dbg_trace(xhci, trace_xhci_dbg_init, - "Finished xhci_run for USB3 roothub"); - return 0; -+ -+err_halt: -+ xhci_halt(xhci); -+ return err; - } - - /* ---- a/drivers/usb/host/xhci.h -+++ b/drivers/usb/host/xhci.h -@@ -1872,6 +1872,7 @@ struct xhci_hcd { - #define XHCI_ZERO_64B_REGS BIT_ULL(32) - #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) - #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) -+#define XHCI_FAKE_DOORBELL BIT_ULL(36) - - unsigned int num_active_eps; - unsigned int limit_active_eps; diff --git a/target/linux/bcm53xx/patches-4.19/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch b/target/linux/bcm53xx/patches-4.19/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch deleted file mode 100644 index 034d5b52fc..0000000000 --- a/target/linux/bcm53xx/patches-4.19/300-ARM-BCM5301X-Disable-MMU-and-Dcache-during-decompres.patch +++ /dev/null @@ -1,101 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Wed, 24 Sep 2014 22:14:07 +0200 -Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Broadcom devices have broken CFE (bootloader) that leaves hardware in an -invalid state. It causes problems with booting Linux. On Northstar -devices kernel was randomly hanging in ~25% of tries during early init. -Hangs used to happen at random places in the start_kernel. On BCM53573 -kernel doesn't even seem to start booting. - -To workaround this problem we need to do following very early: -1) Clear 2 following bits in the SCTLR register: -#define CR_M (1 << 0) /* MMU enable */ -#define CR_C (1 << 2) /* Dcache enable */ -2) Flush the whole D-cache -3) Disable L2 cache - -Unfortunately this patch is not upstreamable as it does above things -unconditionally. We can't check if we are running on Broadcom platform -in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable -as it could break other devices support. - -Signed-off-by: Rafał Miłecki ---- - ---- a/arch/arm/boot/compressed/Makefile -+++ b/arch/arm/boot/compressed/Makefile -@@ -35,6 +35,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y) - OBJS += ll_char_wr.o font.o - endif - -+ifeq ($(CONFIG_ARCH_BCM_5301X),y) -+OBJS += head-bcm_5301x-mpcore.o -+OBJS += cache-v7-min.o -+endif -+ - ifeq ($(CONFIG_ARCH_SA1100),y) - OBJS += head-sa1100.o - endif ---- /dev/null -+++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S -@@ -0,0 +1,37 @@ -+/* -+ * -+ * Platform specific tweaks. This is merged into head.S by the linker. -+ * -+ */ -+ -+#include -+#include -+#include -+ -+ .section ".start", "ax" -+ -+/* -+ * This code section is spliced into the head code by the linker -+ */ -+ -+__plat_uncompress_start: -+ -+ @ Preserve r8/r7 i.e. kernel entry values -+ mov r12, r8 -+ -+ @ Clear MMU enable and Dcache enable bits -+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR -+ bic r0, #CR_C|CR_M -+ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR -+ nop -+ -+ @ Call the cache invalidation routine -+ bl v7_flush_dcache_all -+ nop -+ mov r0,#0 -+ ldr r3, =0x19022000 @ L2 cache controller, control reg -+ str r0, [r3, #0x100] @ Disable L2 cache -+ nop -+ -+ @ Restore -+ mov r8, r12 ---- a/arch/arm/boot/compressed/cache-v7-min.S -+++ b/arch/arm/boot/compressed/cache-v7-min.S -@@ -12,6 +12,7 @@ - - #include - #include -+#include - - __INIT - -@@ -63,7 +64,7 @@ loop2: - ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11 - THUMB( lsl r6, r9, r2 ) - THUMB( orr r11, r11, r6 ) @ factor index number into r11 -- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way -+ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way - subs r9, r9, #1 @ decrement the index - bge loop2 - subs r4, r4, #1 @ decrement the way diff --git a/target/linux/bcm53xx/patches-4.19/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch b/target/linux/bcm53xx/patches-4.19/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch deleted file mode 100644 index d1d287588c..0000000000 --- a/target/linux/bcm53xx/patches-4.19/302-ARM-dts-BCM5301X-Update-Northstar-pinctrl-binding.patch +++ /dev/null @@ -1,31 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] ARM: dts: BCM5301X: Update Northstar pinctrl binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki ---- - ---- a/arch/arm/boot/dts/bcm5301x.dtsi -+++ b/arch/arm/boot/dts/bcm5301x.dtsi -@@ -400,16 +400,12 @@ - #size-cells = <1>; - - cru@100 { -- compatible = "simple-bus"; -+ compatible = "syscon", "simple-mfd"; - reg = <0x100 0x1a4>; -- ranges; -- #address-cells = <1>; -- #size-cells = <1>; - -- pin-controller@1c0 { -+ pinctrl { - compatible = "brcm,bcm4708-pinmux"; -- reg = <0x1c0 0x24>; -- reg-names = "cru_gpio_control"; -+ offset = <0xc0>; - - spi-pins { - groups = "spi_grp"; diff --git a/target/linux/bcm53xx/patches-4.19/310-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch b/target/linux/bcm53xx/patches-4.19/310-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch deleted file mode 100644 index fca2b88ed8..0000000000 --- a/target/linux/bcm53xx/patches-4.19/310-ARM-BCM5301X-Add-DT-for-Netgear-R7900.patch +++ /dev/null @@ -1,64 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki ---- - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -104,6 +104,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4709-buffalo-wxr-1900dhp.dtb \ - bcm4709-linksys-ea9200.dtb \ - bcm4709-netgear-r7000.dtb \ -+ bcm4709-netgear-r7900.dtb \ - bcm4709-netgear-r8000.dtb \ - bcm4709-tplink-archer-c9-v1.dtb \ - bcm47094-dlink-dir-885l.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm4709-netgear-r7900.dts -@@ -0,0 +1,42 @@ -+/* -+ * Broadcom BCM470X / BCM5301X ARM platform code. -+ * DTS for Netgear R7900 -+ * -+ * Copyright (C) 2016 Rafał Miłecki -+ * -+ * Licensed under the GNU/GPL. See COPYING for details. -+ */ -+ -+/dts-v1/; -+ -+#include "bcm4709.dtsi" -+#include "bcm5301x-nand-cs0-bch8.dtsi" -+ -+/ { -+ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708"; -+ model = "Netgear R7900"; -+ -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ -+ memory { -+ reg = <0x00000000 0x08000000 -+ 0x88000000 0x08000000>; -+ }; -+ -+ axi@18000000 { -+ usb3@23000 { -+ reg = <0x00023000 0x1000>; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; diff --git a/target/linux/bcm53xx/patches-4.19/311-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch b/target/linux/bcm53xx/patches-4.19/311-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch deleted file mode 100644 index 5ebc7f89f2..0000000000 --- a/target/linux/bcm53xx/patches-4.19/311-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Felix Fietkau -Subject: [PATCH] ARM: BCM5301X: Add power button for Buffalo WZR-1750DHP - -Signed-off-by: Felix Fietkau ---- ---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts -@@ -101,6 +101,12 @@ - #address-cells = <1>; - #size-cells = <0>; - -+ power { -+ label = "Power"; -+ linux,code = ; -+ gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>; -+ }; -+ - restart { - label = "Reset"; - linux,code = ; diff --git a/target/linux/bcm53xx/patches-4.19/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch b/target/linux/bcm53xx/patches-4.19/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch deleted file mode 100644 index 742f9265b1..0000000000 --- a/target/linux/bcm53xx/patches-4.19/320-ARM-dts-BCM5301X-Add-serial-to-the-bootargs.patch +++ /dev/null @@ -1,116 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] ARM: dts: BCM5301X: Add serial= to the bootargs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's enough to have proper stdout-path for getting serial working but -for some reason LEDE doesn't offer "Please press Enter to activate this -console." unless ttyS0 is specified. - -This is a workaround to get serial working in LEDE. - -Signed-off-by: Rafał Miłecki ---- - ---- a/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -+++ b/arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts -@@ -12,7 +12,7 @@ - model = "TP-LINK Archer C5 V2"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts -@@ -13,7 +13,7 @@ - model = "Luxul ABR-4500 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts -@@ -13,7 +13,7 @@ - model = "Luxul XBR-4500 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts -@@ -12,7 +12,7 @@ - model = "Luxul XAP-1440 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts -+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts -@@ -12,7 +12,7 @@ - model = "Luxul XAP-810 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts -@@ -12,7 +12,7 @@ - model = "Luxul XAP-1610 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts -@@ -13,7 +13,7 @@ - model = "Luxul XWR-3150 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { ---- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts -+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts -@@ -13,6 +13,10 @@ - compatible = "phicomm,k3", "brcm,bcm47094", "brcm,bcm4708"; - model = "Phicomm K3"; - -+ chosen { -+ bootargs = "console=ttyS0,115200"; -+ }; -+ - memory { - reg = <0x00000000 0x08000000 - 0x88000000 0x18000000>; ---- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts -+++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts -@@ -13,7 +13,7 @@ - model = "Luxul XWC-2000 V1"; - - chosen { -- bootargs = "earlycon"; -+ bootargs = "console=ttyS0,115200 earlycon"; - }; - - memory { diff --git a/target/linux/bcm53xx/patches-4.19/321-ARM-dts-BCM5301X-Describe-partition-formats.patch b/target/linux/bcm53xx/patches-4.19/321-ARM-dts-BCM5301X-Describe-partition-formats.patch deleted file mode 100644 index 66ae6dca33..0000000000 --- a/target/linux/bcm53xx/patches-4.19/321-ARM-dts-BCM5301X-Describe-partition-formats.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 7166207bd1d8c46d09d640d46afc685df9bb9083 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 22 Nov 2018 09:21:49 +0100 -Subject: [PATCH] ARM: dts: BCM5301X: Describe partition formats -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's needed by OpenWrt for custom partitioning. - -Signed-off-by: Rafał Miłecki ---- - arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts -@@ -34,6 +34,7 @@ - partition@0 { - label = "firmware"; - reg = <0x00000000 0x08000000>; -+ compatible = "seama"; - }; - }; - }; diff --git a/target/linux/bcm53xx/patches-4.19/400-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch b/target/linux/bcm53xx/patches-4.19/400-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch deleted file mode 100644 index b0f8a8c156..0000000000 --- a/target/linux/bcm53xx/patches-4.19/400-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] mtd: spi-nor: detect JEDEC incompatible w25q128 using 0x90 - command -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some w25q128 chipsets don't support RDID (0x9f) command, they reply with -0xff-s only. To suppose such flashes fallback to the 0x90 command. - -Signed-off-by: Rafał Miłecki ---- - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1307,6 +1307,18 @@ static const struct flash_info *spi_nor_ - } - dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n", - id[0], id[1], id[2]); -+ -+ tmp = nor->read_reg(nor, 0x90, id, SPI_NOR_MAX_ID_LEN); -+ if (tmp < 0) { -+ dev_dbg(nor->dev, " error %d reading JEDEC ID\n", tmp); -+ return ERR_PTR(tmp); -+ } -+ dev_info(nor->dev, "using Read Manufacturer / Device ID command (0x%02x) returned %02x %02x\n", -+ 0x90, id[0x03], id[0x04]); -+ if (id[0x03] == 0xef && id[0x04] == 0x17) { -+ return spi_nor_match_id("w25q128"); -+ } -+ - return ERR_PTR(-ENODEV); - } - diff --git a/target/linux/bcm53xx/patches-4.19/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch b/target/linux/bcm53xx/patches-4.19/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch deleted file mode 100644 index 6d7a45f7ba..0000000000 --- a/target/linux/bcm53xx/patches-4.19/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 2a2af518266a29323cf30c3f9ba9ef2ceb1dd84b Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 16 Oct 2014 20:52:16 +0200 -Subject: [PATCH] UBI: Detect EOF mark and erase all remaining blocks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki ---- - drivers/mtd/ubi/attach.c | 5 +++++ - drivers/mtd/ubi/io.c | 4 ++++ - drivers/mtd/ubi/ubi.h | 1 + - 3 files changed, 10 insertions(+) - ---- a/drivers/mtd/ubi/attach.c -+++ b/drivers/mtd/ubi/attach.c -@@ -95,6 +95,9 @@ static int self_check_ai(struct ubi_devi - #define AV_ADD BIT(1) - #define AV_FIND_OR_ADD (AV_FIND | AV_ADD) - -+/* Set on finding block with 0xdeadc0de, indicates erasing all blocks behind */ -+bool erase_all_next; -+ - /** - * find_or_add_av - internal function to find a volume, add a volume or do - * both (find and add if missing). -@@ -1592,6 +1595,8 @@ int ubi_attach(struct ubi_device *ubi, i - if (!ai) - return -ENOMEM; - -+ erase_all_next = false; -+ - #ifdef CONFIG_MTD_UBI_FASTMAP - /* On small flash devices we disable fastmap in any case. */ - if ((int)mtd_div_by_eb(ubi->mtd->size, ubi->mtd) <= UBI_FM_MAX_START) { ---- a/drivers/mtd/ubi/io.c -+++ b/drivers/mtd/ubi/io.c -@@ -723,6 +723,10 @@ int ubi_io_read_ec_hdr(struct ubi_device - } - - magic = be32_to_cpu(ec_hdr->magic); -+ if (magic == 0xdeadc0de) -+ erase_all_next = true; -+ if (erase_all_next) -+ return read_err ? UBI_IO_FF_BITFLIPS : UBI_IO_FF; - if (magic != UBI_EC_HDR_MAGIC) { - if (mtd_is_eccerr(read_err)) - return UBI_IO_BAD_HDR_EBADMSG; ---- a/drivers/mtd/ubi/ubi.h -+++ b/drivers/mtd/ubi/ubi.h -@@ -833,6 +833,7 @@ extern struct mutex ubi_devices_mutex; - extern struct blocking_notifier_head ubi_notifiers; - - /* attach.c */ -+extern bool erase_all_next; - struct ubi_ainf_peb *ubi_alloc_aeb(struct ubi_attach_info *ai, int pnum, - int ec); - void ubi_free_aeb(struct ubi_attach_info *ai, struct ubi_ainf_peb *aeb); diff --git a/target/linux/bcm53xx/patches-4.19/700-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch b/target/linux/bcm53xx/patches-4.19/700-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch deleted file mode 100644 index a5f13afe02..0000000000 --- a/target/linux/bcm53xx/patches-4.19/700-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 4abdde3ad6bc0b3b157c4bf6ec0bf139d11d07e8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Wed, 13 May 2015 14:13:28 +0200 -Subject: [PATCH] b53: add hacky CPU port fixes for devices not using port 5 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki ---- - drivers/net/phy/b53/b53_common.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/phy/b53/b53_common.c -+++ b/drivers/net/phy/b53/b53_common.c -@@ -28,6 +28,7 @@ - #include - #include - #include -+#include - - #include "b53_regs.h" - #include "b53_priv.h" -@@ -1587,6 +1588,28 @@ static int b53_switch_init(struct b53_de - return ret; - } - -+ /* Set correct CPU port */ -+ if (of_machine_is_compatible("asus,rt-ac87u")) -+ sw_dev->cpu_port = 7; -+ else if (of_machine_is_compatible("netgear,r7900")) -+ sw_dev->cpu_port = 8; -+ else if (of_machine_is_compatible("netgear,r8000")) -+ sw_dev->cpu_port = 8; -+ else if (of_machine_is_compatible("netgear,r8500")) -+ sw_dev->cpu_port = 8; -+ -+ /* Enable extra ports */ -+ if (of_machine_is_compatible("tenda,ac9")) -+ dev->enabled_ports |= BIT(5); -+ -+ /* -+ * Workaround for devices using port 8 (connected to the 3rd iface). -+ * For some reason it doesn't work (no packets on eth2). -+ */ -+ if (of_machine_is_compatible("netgear,r7900") || -+ of_machine_is_compatible("netgear,r8000")) -+ sw_dev->cpu_port = 5; -+ - dev->enabled_ports |= BIT(sw_dev->cpu_port); - sw_dev->ports = fls(dev->enabled_ports); - diff --git a/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch b/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch deleted file mode 100644 index 470b17a5ff..0000000000 --- a/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 6f1c62440eb6846cb8045d7a5480ec7bbe47c96f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Mon, 15 Aug 2016 10:30:41 +0200 -Subject: [PATCH] BCM53573 minor hacks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Rafał Miłecki ---- - ---- a/arch/arm/boot/dts/bcm53573.dtsi -+++ b/arch/arm/boot/dts/bcm53573.dtsi -@@ -53,6 +53,7 @@ - , - , - ; -+ clocks = <&ilp>; - }; - - clocks { ---- a/drivers/bcma/main.c -+++ b/drivers/bcma/main.c -@@ -330,14 +330,6 @@ static int bcma_register_devices(struct - } - #endif - --#ifdef CONFIG_BCMA_SFLASH -- if (bus->drv_cc.sflash.present) { -- err = platform_device_register(&bcma_sflash_dev); -- if (err) -- bcma_err(bus, "Error registering serial flash\n"); -- } --#endif -- - #ifdef CONFIG_BCMA_NFLASH - if (bus->drv_cc.nflash.present) { - err = platform_device_register(&bcma_nflash_dev); -@@ -415,6 +407,14 @@ int bcma_bus_register(struct bcma_bus *b - bcma_register_core(bus, core); - } - -+#ifdef CONFIG_BCMA_SFLASH -+ if (bus->drv_cc.sflash.present) { -+ err = platform_device_register(&bcma_sflash_dev); -+ if (err) -+ bcma_err(bus, "Error registering serial flash\n"); -+ } -+#endif -+ - /* Try to get SPROM */ - err = bcma_sprom_get(bus); - if (err == -ENOENT) { ---- a/drivers/clocksource/arm_arch_timer.c -+++ b/drivers/clocksource/arm_arch_timer.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -919,6 +920,16 @@ static void arch_timer_of_configure_rate - if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) - arch_timer_rate = rate; - -+ /* Get clk rate through clk driver if present */ -+ if (!arch_timer_rate) { -+ struct clk *clk = of_clk_get(np, 0); -+ -+ if (!IS_ERR(clk)) { -+ if (!clk_prepare_enable(clk)) -+ arch_timer_rate = clk_get_rate(clk); -+ } -+ } -+ - /* Check the timer frequency. */ - if (arch_timer_rate == 0) - pr_warn("frequency not available\n"); diff --git a/target/linux/gemini/config-4.19 b/target/linux/gemini/config-4.19 deleted file mode 100644 index b23e6a56d4..0000000000 --- a/target/linux/gemini/config-4.19 +++ /dev/null @@ -1,488 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -CONFIG_AMBA_PL08X=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_GEMINI=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -# CONFIG_ARCH_MOXART is not set -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V4=y -# CONFIG_ARCH_MULTI_V4T is not set -CONFIG_ARCH_MULTI_V4_V5=y -# CONFIG_ARCH_MULTI_V5 is not set -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_APPENDED_DTB=y -# CONFIG_ARM_ATAG_DTB_COMPAT is not set -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_SMMU is not set -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_ARM_UNWIND=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BOUNCE=y -# CONFIG_BPF_SYSCALL is not set -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=16 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_GEMINI=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_COREDUMP=y -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_CPU_32v4=y -CONFIG_CPU_ABRT_EV4=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_FA=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_FA=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -CONFIG_CPU_FA526=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_NO_EFFICIENT_FFS=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_TLB_FA=y -CONFIG_CPU_USE_DOMAINS=y -CONFIG_CRASH_CORE=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CRC_CCITT=y -CONFIG_CRC_ITU_T=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CCM=y -CONFIG_CRYPTO_CMAC=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ECHAINIV=y -CONFIG_CRYPTO_GCM=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_GHASH=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_USER is not set -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZ4=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_DMADEVICES=y -CONFIG_DMATEST=y -CONFIG_DMA_CMA=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_ENGINE_RAID=y -CONFIG_DMA_OF=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DRM=y -CONFIG_DRM_BRIDGE=y -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_DEBUG_SELFTEST is not set -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_GEM_CMA_HELPER=y -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -CONFIG_DRM_KMS_CMA_HELPER=y -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_PANEL=y -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ILITEK_IL9322=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_RCAR_LVDS is not set -# CONFIG_DRM_SII9234 is not set -# CONFIG_DRM_THINE_THC63LVD1024 is not set -CONFIG_DRM_TVE200=y -# CONFIG_DRM_VKMS is not set -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EEPROM_93CX6=y -CONFIG_ELF_CORE=y -# CONFIG_EMBEDDED is not set -# CONFIG_EXPERT is not set -CONFIG_EXT4_FS=y -CONFIG_FARADAY_FTINTC010=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_SYS_IMAGEBLIT=y -CONFIG_FHANDLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FPE_FASTFPE is not set -# CONFIG_FPE_NWFPE is not set -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_FTTMR010_TIMER=y -CONFIG_FTWDT010_WATCHDOG=y -# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set -CONFIG_GEMINI_ETHERNET=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_FTGPIO010=y -CONFIG_GPIO_GENERIC=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HDMI=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_HWMON=y -CONFIG_HW_CONSOLE=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_GPIO=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_KEYBOARD=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -CONFIG_IOMMU_SUPPORT=y -CONFIG_IOSCHED_CFQ=y -CONFIG_IPC_NS=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_ISDN is not set -CONFIG_JBD2=y -CONFIG_KALLSYMS=y -CONFIG_KERNEL_LZMA=y -# CONFIG_KERNEL_XZ is not set -CONFIG_KEXEC=y -CONFIG_KEXEC_CORE=y -CONFIG_KEYBOARD_DLINK_DIR685=y -# CONFIG_LDM_DEBUG is not set -CONFIG_LDM_PARTITION=y -CONFIG_LEDS_TRIGGER_DISK=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_LOGO_LINUX_MONO is not set -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MANDATORY_FILE_LOCKING=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_GPIO=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MODULE_UNLOAD is not set -CONFIG_MQ_IOSCHED_DEADLINE=y -CONFIG_MQ_IOSCHED_KYBER=y -CONFIG_MTD_CFI_STAA=y -# CONFIG_MTD_IMPA7 is not set -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_OF_GEMINI=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_SPLIT_WRGG_FW=y -CONFIG_NAMESPACES=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_KUSER_HELPERS=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_REALTEK_SMI=y -CONFIG_NET_DSA_VITESSE_VSC73XX=y -CONFIG_NET_NS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NVMEM=y -CONFIG_OABI_COMPAT=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -CONFIG_PATA_FTIDE010=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_FTPCI100=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PID_NS=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_GEMINI=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_GEMINI_POWEROFF=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_RCU=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_RATIONAL=y -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# CONFIG_RCU_EXPERT is not set -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RD_LZ4=y -CONFIG_RD_LZMA=y -CONFIG_RD_LZO=y -CONFIG_RD_XZ=y -CONFIG_REALTEK_PHY=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_RELAY=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RSEQ=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_FTRTC010=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_NVMEM=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SATA_GEMINI=y -CONFIG_SATA_PMP=y -CONFIG_SCSI=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SENSORS_GPIO_FAN=y -CONFIG_SENSORS_LM75=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -CONFIG_SERIAL_8250_EXAR=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIO=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_SERPORT=y -CONFIG_SG_POOL=y -CONFIG_SLUB_DEBUG=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_MASTER=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -CONFIG_SRCU=y -# CONFIG_STAGING is not set -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SWPHY=y -CONFIG_SYNC_FILE=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_TASKS_RCU=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TREE_SRCU=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_USB_SUPPORT=y -# CONFIG_USB_ROLE_SWITCH is not set -# CONFIG_USERIO is not set -CONFIG_USER_NS=y -CONFIG_USE_OF=y -CONFIG_UTS_NS=y -CONFIG_VGA_ARB=y -CONFIG_VGA_ARB_MAX_GPUS=16 -CONFIG_VITESSE_PHY=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_X86=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/gemini/patches-4.19/0003-pinctrl-gemini-Drop-noisy-debug-prints.patch b/target/linux/gemini/patches-4.19/0003-pinctrl-gemini-Drop-noisy-debug-prints.patch deleted file mode 100644 index d3383b3182..0000000000 --- a/target/linux/gemini/patches-4.19/0003-pinctrl-gemini-Drop-noisy-debug-prints.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 5d1bd9669ddcd26384672891c37110046e1ac8e8 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Tue, 9 Oct 2018 10:12:24 +0200 -Subject: [PATCH 03/18] pinctrl: gemini: Drop noisy debug prints - -The dev_info() in the pin control driver is really just good -for debug, so drop it. - -Signed-off-by: Linus Walleij ---- - drivers/pinctrl/pinctrl-gemini.c | 32 ++++++++++++++++---------------- - 1 file changed, 16 insertions(+), 16 deletions(-) - ---- a/drivers/pinctrl/pinctrl-gemini.c -+++ b/drivers/pinctrl/pinctrl-gemini.c -@@ -2207,9 +2207,9 @@ static int gemini_pmx_set_mux(struct pin - return -ENODEV; - } - -- dev_info(pmx->dev, -- "ACTIVATE function \"%s\" with group \"%s\"\n", -- func->name, grp->name); -+ dev_dbg(pmx->dev, -+ "ACTIVATE function \"%s\" with group \"%s\"\n", -+ func->name, grp->name); - - regmap_read(pmx->map, GLOBAL_MISC_CTRL, &before); - regmap_update_bits(pmx->map, GLOBAL_MISC_CTRL, -@@ -2240,10 +2240,10 @@ static int gemini_pmx_set_mux(struct pin - "GLOBAL MISC CTRL before: %08x, after %08x, expected %08x\n", - before, after, expected); - } else { -- dev_info(pmx->dev, -- "padgroup %s %s\n", -- gemini_padgroups[i], -- enabled ? "enabled" : "disabled"); -+ dev_dbg(pmx->dev, -+ "padgroup %s %s\n", -+ gemini_padgroups[i], -+ enabled ? "enabled" : "disabled"); - } - } - -@@ -2262,10 +2262,10 @@ static int gemini_pmx_set_mux(struct pin - "GLOBAL MISC CTRL before: %08x, after %08x, expected %08x\n", - before, after, expected); - } else { -- dev_info(pmx->dev, -- "padgroup %s %s\n", -- gemini_padgroups[i], -- enabled ? "enabled" : "disabled"); -+ dev_dbg(pmx->dev, -+ "padgroup %s %s\n", -+ gemini_padgroups[i], -+ enabled ? "enabled" : "disabled"); - } - } - -@@ -2492,9 +2492,9 @@ static int gemini_pinconf_group_set(stru - regmap_update_bits(pmx->map, GLOBAL_IODRIVE, - grp->driving_mask, - val); -- dev_info(pmx->dev, -- "set group %s to %d mA drive strength mask %08x val %08x\n", -- grp->name, arg, grp->driving_mask, val); -+ dev_dbg(pmx->dev, -+ "set group %s to %d mA drive strength mask %08x val %08x\n", -+ grp->name, arg, grp->driving_mask, val); - break; - default: - dev_err(pmx->dev, "invalid config param %04x\n", param); -@@ -2585,8 +2585,8 @@ static int gemini_pmx_probe(struct platf - /* Print initial state */ - tmp = val; - for_each_set_bit(i, &tmp, PADS_MAXBIT) { -- dev_info(dev, "pad group %s %s\n", gemini_padgroups[i], -- (val & BIT(i)) ? "enabled" : "disabled"); -+ dev_dbg(dev, "pad group %s %s\n", gemini_padgroups[i], -+ (val & BIT(i)) ? "enabled" : "disabled"); - } - - /* Check if flash pin is set */ diff --git a/target/linux/gemini/patches-4.19/0005-mtd-physmap_of-Move-custom-initialization.patch b/target/linux/gemini/patches-4.19/0005-mtd-physmap_of-Move-custom-initialization.patch deleted file mode 100644 index 1af8a03995..0000000000 --- a/target/linux/gemini/patches-4.19/0005-mtd-physmap_of-Move-custom-initialization.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 58ecb60d53d43e8d584708722a2cf851ba88f9e1 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Thu, 11 Oct 2018 19:53:40 +0200 -Subject: [PATCH 05/18] mtd: physmap_of: Move custom initialization - -In order to be able to assign custom complex mappings -to the physmap_of plugin for Gemini, move the initialization -so that the simple map is initialized before we enter the -platform-specific functions so the latter can override -them. - -Signed-off-by: Linus Walleij ---- - drivers/mtd/maps/physmap_of_core.c | 15 ++++++++------- - 1 file changed, 8 insertions(+), 7 deletions(-) - ---- a/drivers/mtd/maps/physmap_of_core.c -+++ b/drivers/mtd/maps/physmap_of_core.c -@@ -231,6 +231,9 @@ static int of_flash_probe(struct platfor - else if (of_property_read_bool(dp, "little-endian")) - info->list[i].map.swap = CFI_LITTLE_ENDIAN; - -+ simple_map_init(&info->list[i].map); -+ -+ /* Variants can override map accessors */ - err = of_flash_probe_gemini(dev, dp, &info->list[i].map); - if (err) - goto err_out; -@@ -238,8 +241,6 @@ static int of_flash_probe(struct platfor - if (err) - goto err_out; - -- simple_map_init(&info->list[i].map); -- - /* - * On some platforms (e.g. MPC5200) a direct 1:1 mapping - * may cause problems with JFFS2 usage, as the local bus (LPB) diff --git a/target/linux/gemini/patches-4.19/0006-mtd-physmap_of_gemini-Handle-pin-control.patch b/target/linux/gemini/patches-4.19/0006-mtd-physmap_of_gemini-Handle-pin-control.patch deleted file mode 100644 index 128760d78a..0000000000 --- a/target/linux/gemini/patches-4.19/0006-mtd-physmap_of_gemini-Handle-pin-control.patch +++ /dev/null @@ -1,187 +0,0 @@ -From 8e5e628a9de439d02914b85a48e1ac3e04ea486a Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Thu, 11 Oct 2018 20:03:49 +0200 -Subject: [PATCH 06/18] mtd: physmap_of_gemini: Handle pin control - -This enables the complex mapping for the Gemini and kicks in -custom read/write functions that will wrap the existing -simple functions in calls to enable/disable the parallel -flash pins using pin controls. - -This is necessary on some hardware such as the D-Link -DIR-685 where all flash pins are patched in/out at the same -time, but some of the flash pins are in practice unused by -the flash and have anyway been reused as GPIO. - -This concerns specifically CE1 on the Gemini. There is only -one flash chip, so only CE0 is used, and the line for CE1 -has been reused as chip select for the emulated SPI port -connected to the display. If we try to use the same lines -for flash and GPIO at the same time, one of them will loose: -the GPIO line will disappear because it gets disconnected -from the pin when the flash group is muxed out. - -Fix this by introducing two pin control states named simply -"enabled" and "disabled" and only enable the flash lines -when absolutely necessary (during read/write/copy). This -way, they are available for GPIO at all other times and -the display works. - -Collect all the state variables in a struct named -struct gemini_flash and allocate this struct at probe -time. - -Signed-off-by: Linus Walleij ---- - drivers/mtd/maps/Kconfig | 1 + - drivers/mtd/maps/physmap_of_gemini.c | 105 ++++++++++++++++++++++++++- - 2 files changed, 105 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -89,6 +89,7 @@ config MTD_PHYSMAP_OF_GEMINI - depends on MTD_PHYSMAP_OF - depends on MFD_SYSCON - default ARCH_GEMINI -+ select MTD_COMPLEX_MAPPINGS - help - This provides some extra DT physmap parsing for the Gemini - platforms, some detection and setting up parallel mode on the ---- a/drivers/mtd/maps/physmap_of_gemini.c -+++ b/drivers/mtd/maps/physmap_of_gemini.c -@@ -10,9 +10,11 @@ - #include - #include - #include -+#include - #include - #include - #include -+#include - #include "physmap_of_gemini.h" - - /* -@@ -49,6 +51,77 @@ static const struct of_device_id syscon_ - { }, - }; - -+struct gemini_flash { -+ struct device *dev; -+ struct pinctrl *p; -+ struct pinctrl_state *enabled_state; -+ struct pinctrl_state *disabled_state; -+}; -+ -+/* Static local state */ -+static struct gemini_flash *gf; -+ -+static void gemini_flash_enable_pins(void) -+{ -+ int ret; -+ -+ if (IS_ERR(gf->enabled_state)) -+ return; -+ ret = pinctrl_select_state(gf->p, gf->enabled_state); -+ if (ret) -+ dev_err(gf->dev, "failed to enable pins\n"); -+} -+ -+static void gemini_flash_disable_pins(void) -+{ -+ int ret; -+ -+ if (IS_ERR(gf->disabled_state)) -+ return; -+ ret = pinctrl_select_state(gf->p, gf->disabled_state); -+ if (ret) -+ dev_err(gf->dev, "failed to disable pins\n"); -+} -+ -+static map_word __xipram gemini_flash_map_read(struct map_info *map, -+ unsigned long ofs) -+{ -+ map_word __xipram ret; -+ -+ gemini_flash_enable_pins(); -+ ret = inline_map_read(map, ofs); -+ gemini_flash_disable_pins(); -+ -+ return ret; -+} -+ -+static void __xipram gemini_flash_map_write(struct map_info *map, -+ const map_word datum, -+ unsigned long ofs) -+{ -+ gemini_flash_enable_pins(); -+ inline_map_write(map, datum, ofs); -+ gemini_flash_disable_pins(); -+} -+ -+static void __xipram gemini_flash_map_copy_from(struct map_info *map, -+ void *to, unsigned long from, -+ ssize_t len) -+{ -+ gemini_flash_enable_pins(); -+ inline_map_copy_from(map, to, from, len); -+ gemini_flash_disable_pins(); -+} -+ -+static void __xipram gemini_flash_map_copy_to(struct map_info *map, -+ unsigned long to, -+ const void *from, ssize_t len) -+{ -+ gemini_flash_enable_pins(); -+ inline_map_copy_to(map, to, from, len); -+ gemini_flash_disable_pins(); -+} -+ - int of_flash_probe_gemini(struct platform_device *pdev, - struct device_node *np, - struct map_info *map) -@@ -62,6 +135,11 @@ int of_flash_probe_gemini(struct platfor - if (!of_device_is_compatible(np, "cortina,gemini-flash")) - return 0; - -+ gf = devm_kzalloc(dev, sizeof(*gf), GFP_KERNEL); -+ if (!gf) -+ return -ENOMEM; -+ gf->dev = dev; -+ - rmap = syscon_regmap_lookup_by_phandle(np, "syscon"); - if (IS_ERR(rmap)) { - dev_err(dev, "no syscon\n"); -@@ -96,7 +174,32 @@ int of_flash_probe_gemini(struct platfor - map->bankwidth * 8); - } - -- dev_info(&pdev->dev, "initialized Gemini-specific physmap control\n"); -+ gf->p = devm_pinctrl_get(dev); -+ if (IS_ERR(gf->p)) { -+ dev_err(dev, "no pinctrl handle\n"); -+ ret = PTR_ERR(gf->p); -+ return ret; -+ } -+ -+ gf->enabled_state = pinctrl_lookup_state(gf->p, "enabled"); -+ if (IS_ERR(gf->enabled_state)) -+ dev_err(dev, "no enabled pin control state\n"); -+ -+ gf->disabled_state = pinctrl_lookup_state(gf->p, "disabled"); -+ if (IS_ERR(gf->enabled_state)) { -+ dev_err(dev, "no disabled pin control state\n"); -+ } else { -+ ret = pinctrl_select_state(gf->p, gf->disabled_state); -+ if (ret) -+ dev_err(gf->dev, "failed to disable pins\n"); -+ } -+ -+ map->read = gemini_flash_map_read; -+ map->write = gemini_flash_map_write; -+ map->copy_from = gemini_flash_map_copy_from; -+ map->copy_to = gemini_flash_map_copy_to; -+ -+ dev_info(dev, "initialized Gemini-specific physmap control\n"); - - return 0; - } diff --git a/target/linux/gemini/patches-4.19/0008-ARM-dts-Enable-Gemini-flash-access.patch b/target/linux/gemini/patches-4.19/0008-ARM-dts-Enable-Gemini-flash-access.patch deleted file mode 100644 index 92e2e65c71..0000000000 --- a/target/linux/gemini/patches-4.19/0008-ARM-dts-Enable-Gemini-flash-access.patch +++ /dev/null @@ -1,153 +0,0 @@ -From 928681e6b46cb70317f7721aae8435ea89fcfd80 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Thu, 11 Oct 2018 20:06:23 +0200 -Subject: [PATCH] ARM: dts: Enable Gemini flash access - -Some Gemini platforms have a parallel NOR flash which conflicts -with use cases reusing some of the flash lines (such as CE1) -for GPIO. - -Fix this on the D-Link DIR-685 and Itian SQ201 by creating -"enabled" and "disabled" states for the flash pin control -handle, and rely on the flash handling code to switch this -in and out when accessed so these lines can be used -for GPIO when flash is not accessed, and enable flash -access. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-dlink-dir-685.dts | 33 +++++++++++++++------- - arch/arm/boot/dts/gemini-sq201.dts | 31 +++++++++++--------- - 2 files changed, 40 insertions(+), 24 deletions(-) - ---- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts -+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts -@@ -64,7 +64,6 @@ - gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>; - gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>; - gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>; -- /* Collides with pflash CE1, not so cool */ - cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; - num-chipselects = <1>; - -@@ -253,15 +252,18 @@ - soc { - flash@30000000 { - /* -- * Flash access is by default disabled, because it -- * collides with the Chip Enable signal for the display -- * panel, that reuse the parallel flash Chip Select 1 -- * (CS1). Enabling flash makes graphics stop working. -- * -- * We might be able to hack around this by letting -- * GPIO poke around in the flash controller registers. -+ * Flash access collides with the Chip Enable signal for -+ * the display panel, that reuse the parallel flash Chip -+ * Select 1 (CS1). We switch the pin control state so we -+ * enable these pins for flash access only when we need -+ * then, and when disabled they can be used for GPIO which -+ * is what the display panel needs. - */ -- /* status = "okay"; */ -+ status = "okay"; -+ pinctrl-names = "enabled", "disabled"; -+ pinctrl-0 = <&pflash_default_pins>; -+ pinctrl-1 = <&pflash_disabled_pins>; -+ - /* 32MB of flash */ - reg = <0x30000000 0x02000000>; - -@@ -327,7 +329,6 @@ - "gpio0cgrp", - "gpio0egrp", - "gpio0fgrp", -- "gpio0ggrp", - "gpio0hgrp"; - }; - }; -@@ -342,6 +343,18 @@ - groups = "gpio1bgrp"; - }; - }; -+ /* -+ * These GPIO groups will be mapped in over some -+ * of the flash pins when the flash is not in -+ * active use. -+ */ -+ pflash_disabled_pins: pinctrl-pflash-disabled { -+ mux { -+ function = "gpio0"; -+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp", -+ "gpio0kgrp"; -+ }; -+ }; - pinctrl-gmii { - mux { - function = "gmii"; ---- a/arch/arm/boot/dts/gemini-sq201.dts -+++ b/arch/arm/boot/dts/gemini-sq201.dts -@@ -41,14 +41,12 @@ - compatible = "gpio-leds"; - led-green-info { - label = "sq201:green:info"; -- /* Conflict with parallel flash */ - gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - led-green-usb { - label = "sq201:green:usb"; -- /* Conflict with parallel and NAND flash */ - gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "usb-host"; -@@ -126,15 +124,10 @@ - - soc { - flash@30000000 { -- /* -- * Flash access can be enabled, with the side effect -- * of disabling access to GPIO LED on GPIO0[20] which -- * reuse one of the parallel flash chip select lines. -- * Also the default firmware on the machine has the -- * problem that since it uses the flash, the two LEDS -- * on the right become numb. -- */ -- /* status = "okay"; */ -+ status = "okay"; -+ pinctrl-names = "enabled", "disabled"; -+ pinctrl-0 = <&pflash_default_pins>; -+ pinctrl-1 = <&pflash_disabled_pins>; - /* 16MB of flash */ - reg = <0x30000000 0x01000000>; - -@@ -157,9 +150,7 @@ - mux { - function = "gpio0"; - groups = "gpio0fgrp", -- "gpio0ggrp", -- "gpio0hgrp", -- "gpio0kgrp"; -+ "gpio0hgrp"; - }; - }; - /* -@@ -172,6 +163,18 @@ - groups = "gpio1dgrp"; - }; - }; -+ /* -+ * These GPIO groups will be mapped in over some -+ * of the flash pins when the flash is not in -+ * active use. -+ */ -+ pflash_disabled_pins: pinctrl-pflash-disabled { -+ mux { -+ function = "gpio0"; -+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp", -+ "gpio0kgrp"; -+ }; -+ }; - pinctrl-gmii { - mux { - function = "gmii"; diff --git a/target/linux/gemini/patches-4.19/0009-mtd-partitions-Add-RedBoot-FIS-DT-bindings.patch b/target/linux/gemini/patches-4.19/0009-mtd-partitions-Add-RedBoot-FIS-DT-bindings.patch deleted file mode 100644 index bc3c927db8..0000000000 --- a/target/linux/gemini/patches-4.19/0009-mtd-partitions-Add-RedBoot-FIS-DT-bindings.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 3dfe7ff875a64b83de21dad6365225f41f3cdb17 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 19 Oct 2018 08:22:18 +0200 -Subject: [PATCH 09/18] mtd: partitions: Add RedBoot FIS DT bindings - -This adds device tree bindings for the RedBoot FIS partition -format. - -Cc: devicetree@vger.kernel.org -Signed-off-by: Linus Walleij ---- - .../bindings/mtd/partitions/redboot-fis.txt | 27 +++++++++++++++++++ - 1 file changed, 27 insertions(+) - create mode 100644 Documentation/devicetree/bindings/mtd/partitions/redboot-fis.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.txt -@@ -0,0 +1,27 @@ -+RedBoot FLASH Image System (FIS) Partitions -+=========================================== -+ -+The FLASH Image System (FIS) directory is a flash description -+format closely associated with the RedBoot boot loader. -+ -+It uses one single flash eraseblock in the flash to store an index of -+all images in the flash. -+ -+This block size will vary depending on flash but is typically -+32 KB in size. -+ -+Required properties: -+- compatible : (required) must be "redboot-fis" -+- fis-index-block : (required) a index to the eraseblock containing -+ the FIS directory on this device. On a flash memory with 32KB -+ eraseblocks, 0 means the first eraseblock at 0x00000000, 1 means the -+ second eraseblock at 0x00008000 and so on. -+ -+Example: -+ -+flash@0 { -+ partitions { -+ compatible = "redboot-fis"; -+ fis-index-block = <0>; -+ }; -+}; diff --git a/target/linux/gemini/patches-4.19/0010-mtd-partitions-Add-second-compatible-for-redboot.patch b/target/linux/gemini/patches-4.19/0010-mtd-partitions-Add-second-compatible-for-redboot.patch deleted file mode 100644 index d888e78187..0000000000 --- a/target/linux/gemini/patches-4.19/0010-mtd-partitions-Add-second-compatible-for-redboot.patch +++ /dev/null @@ -1,72 +0,0 @@ -From e1b9d122030220d8b8176d9e23568e26fa2f9d23 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 19 Oct 2018 08:56:41 +0200 -Subject: [PATCH 10/18] mtd: partitions: Add second compatible for redboot - -Simple backport of the upstream redboot partition table -bindings that are used in the mainline Linux kernel. - -Signed-off-by: Linus Walleij ---- - drivers/mtd/redboot.c | 29 ++++++++++++++++++++++++++++- - 1 file changed, 28 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -25,7 +25,7 @@ - #include - #include - #include -- -+#include - #include - #include - #include -@@ -56,6 +56,31 @@ static inline int redboot_checksum(struc - return 1; - } - -+#ifdef CONFIG_OF -+static void parse_redboot_of(struct mtd_info *master) -+{ -+ struct device_node *np; -+ u32 dirblock; -+ int ret; -+ -+ np = mtd_get_of_node(master); -+ if (!np) -+ return; -+ ret = of_property_read_u32(np, "fis-index-block", &dirblock); -+ if (ret) -+ return; -+ /* -+ * Assign the block found in the device tree to the local -+ * directory block pointer. -+ */ -+ directory = dirblock; -+} -+#else -+static void parse_redboot_of(struct mtd_info *master) -+{ -+} -+#endif -+ - static int parse_redboot_partitions(struct mtd_info *master, - const struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -@@ -75,6 +100,7 @@ static int parse_redboot_partitions(stru - #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED - static char nullstring[] = "unallocated"; - #endif -+ parse_redboot_of(master); - - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; -@@ -298,6 +324,7 @@ static int parse_redboot_partitions(stru - - static const struct of_device_id redboot_parser_of_match_table[] = { - { .compatible = "ecoscentric,redboot-fis-partitions" }, -+ { .compatible = "redboot-fis" }, - {}, - }; - MODULE_DEVICE_TABLE(of, redboot_parser_of_match_table); diff --git a/target/linux/gemini/patches-4.19/0011-ARM-dts-Fix-up-SQ201-flash-access.patch b/target/linux/gemini/patches-4.19/0011-ARM-dts-Fix-up-SQ201-flash-access.patch deleted file mode 100644 index 9dc5f65f7d..0000000000 --- a/target/linux/gemini/patches-4.19/0011-ARM-dts-Fix-up-SQ201-flash-access.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 186692e51e6c40d8ebd05d25f009098eb00f8110 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 19 Oct 2018 09:00:51 +0200 -Subject: [PATCH 11/18] ARM: dts: Fix up SQ201 flash access - -This sets the partition information on the SQ201 to be read -out from the RedBoot partition table, removes the static -partition table and sets our boot options to mount root from -/dev/mtdblock2 where the initramfs resides. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-sq201.dts | 37 ++++-------------------------- - 1 file changed, 5 insertions(+), 32 deletions(-) - ---- a/arch/arm/boot/dts/gemini-sq201.dts -+++ b/arch/arm/boot/dts/gemini-sq201.dts -@@ -20,7 +20,7 @@ - }; - - chosen { -- bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait"; -+ bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock3 rw rootfstype=squashfs,jffs2 rootwait"; - stdout-path = &uart0; - }; - diff --git a/target/linux/gemini/patches-4.19/0012-ARM-dts-Blank-D-Link-DIR-685-console.patch b/target/linux/gemini/patches-4.19/0012-ARM-dts-Blank-D-Link-DIR-685-console.patch deleted file mode 100644 index ebddc3ab90..0000000000 --- a/target/linux/gemini/patches-4.19/0012-ARM-dts-Blank-D-Link-DIR-685-console.patch +++ /dev/null @@ -1,25 +0,0 @@ -From ec8b953c92c1dd0e0f1450f4b9a32c60125d4510 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Mon, 27 Aug 2018 00:10:39 +0200 -Subject: [PATCH 12/18] ARM: dts: Blank D-Link DIR-685 console - -Leaving this NAS with display and backlight on heats it up -and dissipates power. Turn off the screen after 4 minutes, -it comes back on when a user touches the keys. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-dlink-dir-685.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts -+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts -@@ -20,7 +20,7 @@ - }; - - chosen { -- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait"; -+ bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300"; - stdout-path = "uart0:19200n8"; - }; - diff --git a/target/linux/gemini/patches-4.19/0013-usb-host-fotg2-add-silicon-clock-handling.patch b/target/linux/gemini/patches-4.19/0013-usb-host-fotg2-add-silicon-clock-handling.patch deleted file mode 100644 index 207a58d857..0000000000 --- a/target/linux/gemini/patches-4.19/0013-usb-host-fotg2-add-silicon-clock-handling.patch +++ /dev/null @@ -1,116 +0,0 @@ -From e76906e8e9dfaeeb22a37706aca493b86e4367bd Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 21 Apr 2017 20:46:12 +0200 -Subject: [PATCH 13/18] usb: host: fotg2: add silicon clock handling - -When used in a system with software-controlled silicon clocks, -the FOTG210 needs to grab, prepare and enable the clock. - -This is needed on for example the Cortina Gemini, where the -platform will by default gate off the clock unless the -peripheral (in this case the USB driver) grabs and enables -the clock. - -If there is no clock available on the platform, we live -without it. Make sure to percolate probe deferrals. - -Signed-off-by: Linus Walleij ---- -ChangeLog v1->v2: -- Handle probe deferrals on the clock controller, no matter - how unlikely they are. -- Send the patch to get Gemini USB rolling and try to get some - stuff upstream, this patch should be fine on its own. ---- - drivers/usb/host/fotg210-hcd.c | 33 +++++++++++++++++++++++++++++---- - drivers/usb/host/fotg210.h | 3 +++ - 2 files changed, 32 insertions(+), 4 deletions(-) - ---- a/drivers/usb/host/fotg210-hcd.c -+++ b/drivers/usb/host/fotg210-hcd.c -@@ -31,6 +31,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -5600,7 +5601,7 @@ static int fotg210_hcd_probe(struct plat - hcd->regs = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(hcd->regs)) { - retval = PTR_ERR(hcd->regs); -- goto failed; -+ goto failed_put_hcd; - } - - hcd->rsrc_start = res->start; -@@ -5610,22 +5611,42 @@ static int fotg210_hcd_probe(struct plat - - fotg210->caps = hcd->regs; - -+ /* It's OK not to supply this clock */ -+ fotg210->pclk = clk_get(dev, "PCLK"); -+ if (!IS_ERR(fotg210->pclk)) { -+ retval = clk_prepare_enable(fotg210->pclk); -+ if (retval) { -+ dev_err(dev, "failed to enable PCLK\n"); -+ goto failed_put_hcd; -+ } -+ } else if (PTR_ERR(fotg210->pclk) == -EPROBE_DEFER) { -+ /* -+ * Percolate deferrals, for anything else, -+ * just live without the clocking. -+ */ -+ retval = PTR_ERR(fotg210->pclk); -+ goto failed_dis_clk; -+ } -+ - retval = fotg210_setup(hcd); - if (retval) -- goto failed; -+ goto failed_dis_clk; - - fotg210_init(fotg210); - - retval = usb_add_hcd(hcd, irq, IRQF_SHARED); - if (retval) { - dev_err(dev, "failed to add hcd with err %d\n", retval); -- goto failed; -+ goto failed_dis_clk; - } - device_wakeup_enable(hcd->self.controller); - - return retval; - --failed: -+failed_dis_clk: -+ if (!IS_ERR(fotg210->pclk)) -+ clk_disable_unprepare(fotg210->pclk); -+failed_put_hcd: - usb_put_hcd(hcd); - fail_create_hcd: - dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval); -@@ -5641,6 +5662,10 @@ static int fotg210_hcd_remove(struct pla - { - struct device *dev = &pdev->dev; - struct usb_hcd *hcd = dev_get_drvdata(dev); -+ struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd); -+ -+ if (!IS_ERR(fotg210->pclk)) -+ clk_disable_unprepare(fotg210->pclk); - - if (!hcd) - return 0; ---- a/drivers/usb/host/fotg210.h -+++ b/drivers/usb/host/fotg210.h -@@ -182,6 +182,9 @@ struct fotg210_hcd { /* one per contro - # define COUNT(x) - #endif - -+ /* silicon clock */ -+ struct clk *pclk; -+ - /* debug files */ - struct dentry *debug_dir; - }; diff --git a/target/linux/gemini/patches-4.19/0014-usb-host-add-DT-bindings-for-faraday-fotg2.patch b/target/linux/gemini/patches-4.19/0014-usb-host-add-DT-bindings-for-faraday-fotg2.patch deleted file mode 100644 index 4bac72a5d1..0000000000 --- a/target/linux/gemini/patches-4.19/0014-usb-host-add-DT-bindings-for-faraday-fotg2.patch +++ /dev/null @@ -1,63 +0,0 @@ -From f9cfc45c57227448d4239e9582258587aacf34e7 Mon Sep 17 00:00:00 2001 -From: Hans Ulli Kroll -Date: Wed, 8 Feb 2017 21:00:09 +0100 -Subject: [PATCH 14/18] usb: host: add DT bindings for faraday fotg2 - -This adds device tree bindings for the Faraday FOTG2 -dual-mode host controller. - -Cc: devicetree@vger.kernel.org -Signed-off-by: Hans Ulli Kroll -Acked-by: Rob Herring -Signed-off-by: Linus Walleij ---- -ChangeLog v1->v2: -- Changed "OTH" to "OTG" -- Collected Rob's ACK. -- I don't see any problem with these bindings, but IIRC Hans - had some reservations for the OTG mode, maybe we can strip - some properties like the mini-usb thing and use as a starter - so we can add host mode at least? ---- - .../bindings/usb/faraday,fotg210.txt | 35 +++++++++++++++++++ - 1 file changed, 35 insertions(+) - create mode 100644 Documentation/devicetree/bindings/usb/faraday,fotg210.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/usb/faraday,fotg210.txt -@@ -0,0 +1,35 @@ -+Faraday FOTG Host controller -+ -+This OTG-capable USB host controller is found in Cortina Systems -+Gemini and other SoC products. -+ -+Required properties: -+- compatible: should be one of: -+ "faraday,fotg210" -+ "cortina,gemini-usb", "faraday,fotg210" -+- reg: should contain one register range i.e. start and length -+- interrupts: description of the interrupt line -+ -+Optional properties: -+- clocks: should contain the IP block clock -+- clock-names: should be "PCLK" for the IP block clock -+ -+Required properties for "cortina,gemini-usb" compatible: -+- syscon: a phandle to the system controller to access PHY registers -+ -+Optional properties for "cortina,gemini-usb" compatible: -+- cortina,gemini-mini-b: boolean property that indicates that a Mini-B -+ OTG connector is in use -+- wakeup-source: see power/wakeup-source.txt -+ -+Example for Gemini: -+ -+usb@68000000 { -+ compatible = "cortina,gemini-usb", "faraday,fotg210"; -+ reg = <0x68000000 0x1000>; -+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&cc 12>; -+ clock-names = "PCLK"; -+ syscon = <&syscon>; -+ wakeup-source; -+}; diff --git a/target/linux/gemini/patches-4.19/0015-usb-host-fotg2-add-device-tree-probing.patch b/target/linux/gemini/patches-4.19/0015-usb-host-fotg2-add-device-tree-probing.patch deleted file mode 100644 index 7a4a3fe77e..0000000000 --- a/target/linux/gemini/patches-4.19/0015-usb-host-fotg2-add-device-tree-probing.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 8f45c69ba80a993a6dba2397825b27e11fa9dea7 Mon Sep 17 00:00:00 2001 -From: Hans Ulli Kroll -Date: Thu, 9 Feb 2017 15:20:49 +0100 -Subject: [PATCH 15/18] usb: host: fotg2: add device tree probing - -Add device tree probing to the fotg2 driver. - -Signed-off-by: Hans Ulli Kroll -[Drop DMA mask coercion, drivers/of/platform.c does the job] -Signed-off-by: Linus Walleij ---- - drivers/usb/host/fotg210-hcd.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/usb/host/fotg210-hcd.c -+++ b/drivers/usb/host/fotg210-hcd.c -@@ -10,6 +10,7 @@ - * Most of code borrowed from the Linux-3.7 EHCI driver - */ - #include -+#include - #include - #include - #include -@@ -5676,9 +5677,18 @@ static int fotg210_hcd_remove(struct pla - return 0; - } - -+#ifdef CONFIG_OF -+static const struct of_device_id fotg210_of_match[] = { -+ { .compatible = "faraday,fotg210" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, fotg210_of_match); -+#endif -+ - static struct platform_driver fotg210_hcd_driver = { - .driver = { - .name = "fotg210-hcd", -+ .of_match_table = of_match_ptr(fotg210_of_match), - }, - .probe = fotg210_hcd_probe, - .remove = fotg210_hcd_remove, diff --git a/target/linux/gemini/patches-4.19/0016-usb-host-fotg2-add-Gemini-specific-handling.patch b/target/linux/gemini/patches-4.19/0016-usb-host-fotg2-add-Gemini-specific-handling.patch deleted file mode 100644 index f30ee7991e..0000000000 --- a/target/linux/gemini/patches-4.19/0016-usb-host-fotg2-add-Gemini-specific-handling.patch +++ /dev/null @@ -1,131 +0,0 @@ -From b331ae758123ba20ba41199e007ac33fc0f242e3 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 21 Apr 2017 22:19:00 +0200 -Subject: [PATCH 16/18] usb: host: fotg2: add Gemini-specific handling - -The Cortina Systems Gemini has bolted on a PHY inside the -silicon that can be handled by six bits in a MISC register in -the system controller. - -If we are running on Gemini, look up a syscon regmap through -a phandle and enable VBUS and optionally the Mini-B connector. - -If the device is flagged as "wakeup-source" using the standard -DT bindings, we also enable this in the global controller for -respective port. - -Signed-off-by: Linus Walleij ---- - drivers/usb/host/Kconfig | 1 + - drivers/usb/host/fotg210-hcd.c | 76 ++++++++++++++++++++++++++++++++++ - 2 files changed, 77 insertions(+) - ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -372,6 +372,7 @@ config USB_ISP1362_HCD - config USB_FOTG210_HCD - tristate "FOTG210 HCD support" - depends on USB && HAS_DMA && HAS_IOMEM -+ select MFD_SYSCON - ---help--- - Faraday FOTG210 is an OTG controller which can be configured as - an USB2.0 host. It is designed to meet USB2.0 EHCI specification ---- a/drivers/usb/host/fotg210-hcd.c -+++ b/drivers/usb/host/fotg210-hcd.c -@@ -33,6 +33,10 @@ - #include - #include - #include -+#include -+/* For Cortina Gemini */ -+#include -+#include - - #include - #include -@@ -5558,6 +5562,72 @@ static void fotg210_init(struct fotg210_ - iowrite32(value, &fotg210->regs->otgcsr); - } - -+/* -+ * Gemini-specific initialization function, only executed on the -+ * Gemini SoC using the global misc control register. -+ */ -+#define GEMINI_GLOBAL_MISC_CTRL 0x30 -+#define GEMINI_MISC_USB0_WAKEUP BIT(14) -+#define GEMINI_MISC_USB1_WAKEUP BIT(15) -+#define GEMINI_MISC_USB0_VBUS_ON BIT(22) -+#define GEMINI_MISC_USB1_VBUS_ON BIT(23) -+#define GEMINI_MISC_USB0_MINI_B BIT(29) -+#define GEMINI_MISC_USB1_MINI_B BIT(30) -+ -+static int fotg210_gemini_init(struct device *dev, struct usb_hcd *hcd) -+{ -+ struct device_node *np = dev->of_node; -+ struct regmap *map; -+ bool mini_b; -+ bool wakeup; -+ u32 mask, val; -+ int ret; -+ -+ map = syscon_regmap_lookup_by_phandle(np, "syscon"); -+ if (IS_ERR(map)) { -+ dev_err(dev, "no syscon\n"); -+ return PTR_ERR(map); -+ } -+ mini_b = of_property_read_bool(np, "cortina,gemini-mini-b"); -+ wakeup = of_property_read_bool(np, "wakeup-source"); -+ -+ /* -+ * Figure out if this is USB0 or USB1 by simply checking the -+ * physical base address. -+ */ -+ mask = 0; -+ if (hcd->rsrc_start == 0x69000000) { -+ val = GEMINI_MISC_USB1_VBUS_ON; -+ if (mini_b) -+ val |= GEMINI_MISC_USB1_MINI_B; -+ else -+ mask |= GEMINI_MISC_USB1_MINI_B; -+ if (wakeup) -+ val |= GEMINI_MISC_USB1_WAKEUP; -+ else -+ mask |= GEMINI_MISC_USB1_WAKEUP; -+ } else { -+ val = GEMINI_MISC_USB0_VBUS_ON; -+ if (mini_b) -+ val |= GEMINI_MISC_USB0_MINI_B; -+ else -+ mask |= GEMINI_MISC_USB0_MINI_B; -+ if (wakeup) -+ val |= GEMINI_MISC_USB0_WAKEUP; -+ else -+ mask |= GEMINI_MISC_USB0_WAKEUP; -+ } -+ -+ ret = regmap_update_bits(map, GEMINI_GLOBAL_MISC_CTRL, mask, val); -+ if (ret) { -+ dev_err(dev, "failed to initialize Gemini PHY\n"); -+ return ret; -+ } -+ -+ dev_info(dev, "initialized Gemini PHY\n"); -+ return 0; -+} -+ - /** - * fotg210_hcd_probe - initialize faraday FOTG210 HCDs - * -@@ -5635,6 +5705,12 @@ static int fotg210_hcd_probe(struct plat - - fotg210_init(fotg210); - -+ if (of_device_is_compatible(dev->of_node, "cortina,gemini-usb")) { -+ retval = fotg210_gemini_init(dev, hcd); -+ if (retval) -+ goto failed_dis_clk; -+ } -+ - retval = usb_add_hcd(hcd, irq, IRQF_SHARED); - if (retval) { - dev_err(dev, "failed to add hcd with err %d\n", retval); diff --git a/target/linux/gemini/patches-4.19/0018-ARM-dts-Add-the-FOTG210-USB-host-to-Gemini-boards.patch b/target/linux/gemini/patches-4.19/0018-ARM-dts-Add-the-FOTG210-USB-host-to-Gemini-boards.patch deleted file mode 100644 index 83d993b1f9..0000000000 --- a/target/linux/gemini/patches-4.19/0018-ARM-dts-Add-the-FOTG210-USB-host-to-Gemini-boards.patch +++ /dev/null @@ -1,191 +0,0 @@ -From 1ff9a279dbeb0034929042faef186ce934474c2b Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 21 Apr 2017 20:50:22 +0200 -Subject: [PATCH 18/18] ARM: dts: Add the FOTG210 USB host to Gemini boards - -This adds the FOTG210 USB host controller to the Gemini -device trees. In the main SoC DTSI it is flagged as disabled -and then it is selectively enabled on the devices that utilize -it. - -Signed-off-by: Linus Walleij ---- -ChangeLog v1->v2: -- Rebased to kernel v4.19-rc1 -- Drop pinctrl-0 handle from the second USB port -- Add comment on how to deal with the USB pin control ---- - arch/arm/boot/dts/gemini-dlink-dir-685.dts | 8 ++++++ - arch/arm/boot/dts/gemini-nas4220b.dts | 8 ++++++ - arch/arm/boot/dts/gemini-rut1xx.dts | 20 ++++++++++++++ - arch/arm/boot/dts/gemini-sl93512r.dts | 8 ++++++ - arch/arm/boot/dts/gemini-sq201.dts | 8 ++++++ - arch/arm/boot/dts/gemini-wbd111.dts | 8 ++++++ - arch/arm/boot/dts/gemini-wbd222.dts | 8 ++++++ - arch/arm/boot/dts/gemini.dtsi | 32 ++++++++++++++++++++++ - 8 files changed, 100 insertions(+) - ---- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts -+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts -@@ -452,5 +452,13 @@ - }; - }; - }; -+ -+ usb@68000000 { -+ status = "okay"; -+ }; -+ -+ usb@69000000 { -+ status = "okay"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/gemini-nas4220b.dts -+++ b/arch/arm/boot/dts/gemini-nas4220b.dts -@@ -204,5 +204,13 @@ - ata@63400000 { - status = "okay"; - }; -+ -+ usb@68000000 { -+ status = "okay"; -+ }; -+ -+ usb@69000000 { -+ status = "okay"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/gemini-rut1xx.dts -+++ b/arch/arm/boot/dts/gemini-rut1xx.dts -@@ -124,5 +124,25 @@ - /* Not used in this platform */ - }; - }; -+ -+ ethernet@60000000 { -+ status = "okay"; -+ -+ ethernet-port@0 { -+ phy-mode = "rgmii"; -+ phy-handle = <&phy0>; -+ }; -+ ethernet-port@1 { -+ /* Not used in this platform */ -+ }; -+ }; -+ -+ usb@68000000 { -+ status = "okay"; -+ }; -+ -+ usb@69000000 { -+ status = "okay"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/gemini-sl93512r.dts -+++ b/arch/arm/boot/dts/gemini-sl93512r.dts -@@ -324,5 +324,13 @@ - ata@63400000 { - status = "okay"; - }; -+ -+ usb@68000000 { -+ status = "okay"; -+ }; -+ -+ usb@69000000 { -+ status = "okay"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/gemini-sq201.dts -+++ b/arch/arm/boot/dts/gemini-sq201.dts -@@ -292,5 +292,13 @@ - ata@63000000 { - status = "okay"; - }; -+ -+ usb@68000000 { -+ status = "okay"; -+ }; -+ -+ usb@69000000 { -+ status = "okay"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/gemini-wbd111.dts -+++ b/arch/arm/boot/dts/gemini-wbd111.dts -@@ -171,5 +171,13 @@ - /* Not used in this platform */ - }; - }; -+ -+ usb@68000000 { -+ status = "okay"; -+ }; -+ -+ usb@69000000 { -+ status = "okay"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/gemini-wbd222.dts -+++ b/arch/arm/boot/dts/gemini-wbd222.dts -@@ -183,5 +183,13 @@ - phy-handle = <&phy1>; - }; - }; -+ -+ usb@68000000 { -+ status = "okay"; -+ }; -+ -+ usb@69000000 { -+ status = "okay"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/gemini.dtsi -+++ b/arch/arm/boot/dts/gemini.dtsi -@@ -409,5 +409,37 @@ - #size-cells = <0>; - status = "disabled"; - }; -+ -+ usb@68000000 { -+ compatible = "cortina,gemini-usb", "faraday,fotg210"; -+ reg = <0x68000000 0x1000>; -+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; -+ resets = <&syscon GEMINI_RESET_USB0>; -+ clocks = <&syscon GEMINI_CLK_GATE_USB0>; -+ clock-names = "PCLK"; -+ /* -+ * This will claim pins for USB0 and USB1 at the same -+ * time as they are using some common pins. If you for -+ * some reason have a system using USB1 at 96000000 but -+ * NOT using USB0 at 68000000 you wll have to add the -+ * usb_default_pins to the USB controller at 96000000 -+ * in your .dts for the board. -+ */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&usb_default_pins>; -+ syscon = <&syscon>; -+ status = "disabled"; -+ }; -+ -+ usb@69000000 { -+ compatible = "cortina,gemini-usb", "faraday,fotg210"; -+ reg = <0x69000000 0x1000>; -+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; -+ resets = <&syscon GEMINI_RESET_USB1>; -+ clocks = <&syscon GEMINI_CLK_GATE_USB1>; -+ clock-names = "PCLK"; -+ syscon = <&syscon>; -+ status = "disabled"; -+ }; - }; - }; diff --git a/target/linux/gemini/patches-4.19/0019-ARM-dts-gemini-Indent-DIR-685-partition-table.patch b/target/linux/gemini/patches-4.19/0019-ARM-dts-gemini-Indent-DIR-685-partition-table.patch deleted file mode 100644 index c205b5f88d..0000000000 --- a/target/linux/gemini/patches-4.19/0019-ARM-dts-gemini-Indent-DIR-685-partition-table.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 4a228ecf553e879bae384e634bb6413438e81a0e Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Mon, 11 Mar 2019 15:43:05 +0100 -Subject: [PATCH 1/2] ARM: dts: gemini: Indent DIR-685 partition table - -It is discouraged to have OF partitions as subnodes directly -under the device, create a "partitions" subnode and put the -partitions inside it. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-dlink-dir-685.dts | 82 ++++++++++++---------- - 1 file changed, 44 insertions(+), 38 deletions(-) - ---- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts -+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts -@@ -267,44 +267,50 @@ - /* 32MB of flash */ - reg = <0x30000000 0x02000000>; - -- /* -- * This "RedBoot" is the Storlink derivative. -- */ -- partition@0 { -- label = "RedBoot"; -- reg = <0x00000000 0x00040000>; -- read-only; -- }; -- /* -- * This firmware image contains the kernel catenated -- * with the squashfs root filesystem. For some reason -- * this is called "upgrade" on the vendor system. -- */ -- partition@40000 { -- label = "upgrade"; -- reg = <0x00040000 0x01f40000>; -- read-only; -- }; -- /* RGDB, Residental Gateway Database? */ -- partition@1f80000 { -- label = "rgdb"; -- reg = <0x01f80000 0x00040000>; -- read-only; -- }; -- /* -- * This partition contains MAC addresses for WAN, -- * WLAN and LAN, and the country code (for wireless -- * I guess). -- */ -- partition@1fc0000 { -- label = "nvram"; -- reg = <0x01fc0000 0x00020000>; -- read-only; -- }; -- partition@1fe0000 { -- label = "LangPack"; -- reg = <0x01fe0000 0x00020000>; -- read-only; -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ /* -+ * This "RedBoot" is the Storlink derivative. -+ */ -+ partition@0 { -+ label = "RedBoot"; -+ reg = <0x00000000 0x00040000>; -+ read-only; -+ }; -+ /* -+ * This firmware image contains the kernel catenated -+ * with the squashfs root filesystem. For some reason -+ * this is called "upgrade" on the vendor system. -+ */ -+ partition@40000 { -+ label = "upgrade"; -+ reg = <0x00040000 0x01f40000>; -+ read-only; -+ }; -+ /* RGDB, Residental Gateway Database? */ -+ partition@1f80000 { -+ label = "rgdb"; -+ reg = <0x01f80000 0x00040000>; -+ read-only; -+ }; -+ /* -+ * This partition contains MAC addresses for WAN, -+ * WLAN and LAN, and the country code (for wireless -+ * I guess). -+ */ -+ partition@1fc0000 { -+ label = "nvram"; -+ reg = <0x01fc0000 0x00020000>; -+ read-only; -+ }; -+ partition@1fe0000 { -+ label = "LangPack"; -+ reg = <0x01fe0000 0x00020000>; -+ read-only; -+ }; - }; - }; - diff --git a/target/linux/gemini/patches-4.19/0020-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch b/target/linux/gemini/patches-4.19/0020-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch deleted file mode 100644 index 6ef931c16c..0000000000 --- a/target/linux/gemini/patches-4.19/0020-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch +++ /dev/null @@ -1,37 +0,0 @@ -From ea99e7570882df53478f9b5fa5886a6e92fc2c7f Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Mon, 11 Mar 2019 15:44:29 +0100 -Subject: [PATCH] ARM: dts: Augment DIR-685 partition table for OpenWrt - -Rename the firmware partition so that the firmware MTD -splitter will do its job, drop the rootfs arguments as -the MTD splitter will set this up automatically. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-dlink-dir-685.dts | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts -+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts -@@ -20,7 +20,7 @@ - }; - - chosen { -- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300"; -+ bootargs = "console=ttyS0,19200n8 consoleblank=300"; - stdout-path = "uart0:19200n8"; - }; - -@@ -286,9 +286,9 @@ - * this is called "upgrade" on the vendor system. - */ - partition@40000 { -- label = "upgrade"; -+ compatible = "wrg"; -+ label = "firmware"; - reg = <0x00040000 0x01f40000>; -- read-only; - }; - /* RGDB, Residental Gateway Database? */ - partition@1f80000 { diff --git a/target/linux/gemini/patches-4.19/0022-RM-dts-gemini-Switch-to-redboot-partition-parsing.patch b/target/linux/gemini/patches-4.19/0022-RM-dts-gemini-Switch-to-redboot-partition-parsing.patch deleted file mode 100644 index 12c899ea30..0000000000 --- a/target/linux/gemini/patches-4.19/0022-RM-dts-gemini-Switch-to-redboot-partition-parsing.patch +++ /dev/null @@ -1,104 +0,0 @@ -From cad2161e64aca9e1c94fd11b0d0f7b53c9e80de0 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 12 Jul 2019 22:57:11 +0200 -Subject: [PATCH 1/2] ARM: dts: gemini: Switch to redboot partition parsing - -This switches the kernel to parse the Redboot partitions -in the SL93512r and the NAS4220B properly using the -right compatible string instead of using hard-coded -partitions. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-nas4220b.dts | 35 +++------------------------ - arch/arm/boot/dts/gemini-sl93512r.dts | 35 +++------------------------ - 2 files changed, 8 insertions(+), 62 deletions(-) - ---- a/arch/arm/boot/dts/gemini-nas4220b.dts -+++ b/arch/arm/boot/dts/gemini-nas4220b.dts -@@ -81,37 +81,10 @@ - /* 16MB of flash */ - reg = <0x30000000 0x01000000>; - -- partition@0 { -- label = "RedBoot"; -- reg = <0x00000000 0x00020000>; -- read-only; -- }; -- partition@20000 { -- label = "Kernel"; -- reg = <0x00020000 0x00300000>; -- }; -- partition@320000 { -- label = "Ramdisk"; -- reg = <0x00320000 0x00600000>; -- }; -- partition@920000 { -- label = "Application"; -- reg = <0x00920000 0x00600000>; -- }; -- partition@f20000 { -- label = "VCTL"; -- reg = <0x00f20000 0x00020000>; -- read-only; -- }; -- partition@f40000 { -- label = "CurConf"; -- reg = <0x00f40000 0x000a0000>; -- read-only; -- }; -- partition@fe0000 { -- label = "FIS directory"; -- reg = <0x00fe0000 0x00020000>; -- read-only; -+ partitions { -+ compatible = "redboot-fis"; -+ /* Eraseblock at 0xfe0000 */ -+ fis-index-block = <0x1fc>; - }; - }; - ---- a/arch/arm/boot/dts/gemini-sl93512r.dts -+++ b/arch/arm/boot/dts/gemini-sl93512r.dts -@@ -143,37 +143,10 @@ - /* 16MB of flash */ - reg = <0x30000000 0x01000000>; - -- partition@0 { -- label = "BOOT"; -- reg = <0x00000000 0x00020000>; -- read-only; -- }; -- partition@120000 { -- label = "Kern"; -- reg = <0x00020000 0x00300000>; -- }; -- partition@320000 { -- label = "Ramdisk"; -- reg = <0x00320000 0x00600000>; -- }; -- partition@920000 { -- label = "Application"; -- reg = <0x00920000 0x00600000>; -- }; -- partition@f20000 { -- label = "VCTL"; -- reg = <0x00f20000 0x00020000>; -- read-only; -- }; -- partition@f40000 { -- label = "CurConf"; -- reg = <0x00f40000 0x000a0000>; -- read-only; -- }; -- partition@fe0000 { -- label = "FIS directory"; -- reg = <0x00fe0000 0x00020000>; -- read-only; -+ partitions { -+ compatible = "redboot-fis"; -+ /* Eraseblock at 0xfe0000 */ -+ fis-index-block = <0x1fc>; - }; - }; - diff --git a/target/linux/gemini/patches-4.19/0023-ARM-dts-gemini-Mount-root-from-mtdblock3.patch b/target/linux/gemini/patches-4.19/0023-ARM-dts-gemini-Mount-root-from-mtdblock3.patch deleted file mode 100644 index 2c2ddfaaf4..0000000000 --- a/target/linux/gemini/patches-4.19/0023-ARM-dts-gemini-Mount-root-from-mtdblock3.patch +++ /dev/null @@ -1,36 +0,0 @@ -From b40cd2116ea0ba3584db12ab9dab7e02dd1e3333 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Fri, 12 Jul 2019 22:59:39 +0200 -Subject: [PATCH 2/2] ARM: dts: gemini: Mount root from mtdblock3 - -The third mtdblock device named "Application" is where we -want to mount our root filesystem. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-nas4220b.dts | 2 +- - arch/arm/boot/dts/gemini-sl93512r.dts | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/gemini-nas4220b.dts -+++ b/arch/arm/boot/dts/gemini-nas4220b.dts -@@ -20,7 +20,7 @@ - }; - - chosen { -- bootargs = "console=ttyS0,19200n8"; -+ bootargs = "console=ttyS0,19200n8 root=/dev/mtdblock3 rw rootfstype=squashfs,jffs2 rootwait"; - stdout-path = &uart0; - }; - ---- a/arch/arm/boot/dts/gemini-sl93512r.dts -+++ b/arch/arm/boot/dts/gemini-sl93512r.dts -@@ -24,7 +24,7 @@ - }; - - chosen { -- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait"; -+ bootargs = "console=ttyS0,19200n8 root=/dev/mtdblock3 rw rootfstype=squashfs,jffs2 rootwait"; - stdout-path = &uart0; - }; - diff --git a/target/linux/gemini/patches-4.19/0024-ARM-dts-gemini-Fix-up-confused-pin-settings.patch b/target/linux/gemini/patches-4.19/0024-ARM-dts-gemini-Fix-up-confused-pin-settings.patch deleted file mode 100644 index 9ae2a79cbf..0000000000 --- a/target/linux/gemini/patches-4.19/0024-ARM-dts-gemini-Fix-up-confused-pin-settings.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 384ec5ed82845c2c81968743dde4a758f572c11b Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Sat, 13 Jul 2019 11:52:29 +0200 -Subject: [PATCH] ARM: dts: gemini: Fix up confused pin settings - -The SL93512r board has its pin muxing set up for the wrong -ASIC: SL3516 instead of SL3512 that it is using. Fix it -up and reference the right GPIO for the WPS button. - -Signed-off-by: Linus Walleij ---- - arch/arm/boot/dts/gemini-sl93512r.dts | 19 +++++++++++-------- - 1 file changed, 11 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/gemini-sl93512r.dts -+++ b/arch/arm/boot/dts/gemini-sl93512r.dts -@@ -36,8 +36,8 @@ - wakeup-source; - linux,code = ; - label = "WPS"; -- /* Conflict with NAND flash */ -- gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; -+ /* Conflicts with TVC and extended flash */ -+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; - }; - - button-setup { -@@ -153,17 +153,20 @@ - syscon: syscon@40000000 { - pinctrl { - /* -- * gpio0egrp cover line 16 used by HD LED -- * gpio0fgrp cover line 17, 18 used by wireless LED and reset button -- * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY -- * gpio0kgrp cover line 31 used by USB LED -+ * gpio0agrp cover line 0, used by WPS button -+ * gpio0fgrp cover line 16 used by HD LED -+ * gpio0ggrp cover line 17, 18 used by wireless LAN LED and -+ * reset button OR USB ID select on 17 and USB VBUS select -+ * on 18. (Confusing.) -+ * gpio0igrp cover line 21, 22 used by MDIO for Marvell PHY - */ - gpio0_default_pins: pinctrl-gpio0 { - mux { - function = "gpio0"; -- groups = "gpio0egrp", -+ groups = "gpio0agrp", - "gpio0fgrp", -- "gpio0hgrp"; -+ "gpio0ggrp", -+ "gpio0igrp"; - }; - }; - /* diff --git a/target/linux/generic/backport-4.19/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch b/target/linux/generic/backport-4.19/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch deleted file mode 100644 index 7ac4f9d240..0000000000 --- a/target/linux/generic/backport-4.19/010-Kbuild-don-t-hardcode-path-to-awk-in-scripts-ld-vers.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 13b1ecc3401653a355798eb1dee10cc1608202f4 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Mon, 18 Jan 2016 12:27:49 +0100 -Subject: [PATCH 33/34] Kbuild: don't hardcode path to awk in - scripts/ld-version.sh - -On some systems /usr/bin/awk does not exist, or is broken. Find it via -$PATH instead. - -Signed-off-by: Felix Fietkau ---- - scripts/ld-version.sh | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/scripts/ld-version.sh -+++ b/scripts/ld-version.sh -@@ -1,6 +1,7 @@ --#!/usr/bin/awk -f -+#!/bin/sh - # SPDX-License-Identifier: GPL-2.0 - # extract linker version number from stdin and turn into single number -+exec awk ' - { - gsub(".*\\)", ""); - gsub(".*version ", ""); -@@ -9,3 +10,4 @@ - print a[1]*100000000 + a[2]*1000000 + a[3]*10000; - exit - } -+' diff --git a/target/linux/generic/backport-4.19/011-kbuild-export-SUBARCH.patch b/target/linux/generic/backport-4.19/011-kbuild-export-SUBARCH.patch deleted file mode 100644 index a42c720446..0000000000 --- a/target/linux/generic/backport-4.19/011-kbuild-export-SUBARCH.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 173019b66dcc9d68ad9333aa744dad1e369b5aa8 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sun, 9 Jul 2017 00:26:53 +0200 -Subject: [PATCH 34/34] kernel: add compile fix for linux 4.9 on x86 - -Signed-off-by: Felix Fietkau ---- - Makefile | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/Makefile -+++ b/Makefile -@@ -432,8 +432,8 @@ KBUILD_LDFLAGS := - GCC_PLUGINS_CFLAGS := - CLANG_FLAGS := - --export ARCH SRCARCH CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC --export CPP AR NM STRIP OBJCOPY OBJDUMP KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS -+export ARCH SRCARCH SUBARCH CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD -+export CC CPP AR NM STRIP OBJCOPY OBJDUMP KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS - export MAKE LEX YACC AWK GENKSYMS INSTALLKERNEL PERL PYTHON PYTHON2 PYTHON3 UTS_MACHINE - export HOSTCXX KBUILD_HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS - diff --git a/target/linux/generic/backport-4.19/020-backport_netfilter_rtcache.patch b/target/linux/generic/backport-4.19/020-backport_netfilter_rtcache.patch deleted file mode 100644 index c02b8f39e0..0000000000 --- a/target/linux/generic/backport-4.19/020-backport_netfilter_rtcache.patch +++ /dev/null @@ -1,558 +0,0 @@ -From 1bb0c3ec899827cfa4668bb63a08713a40744d21 Mon Sep 17 00:00:00 2001 -From: Florian Westphal -Date: Sun, 9 Jul 2017 08:58:30 +0200 -Subject: [PATCH] netfilter: conntrack: cache route for forwarded connections - -... to avoid per-packet FIB lookup if possible. - -The cached dst is re-used provided the input interface -is the same as that of the previous packet in the same direction. - -If not, the cached dst is invalidated. - -For ipv6 we also need to store sernum, else dst_check doesn't work, -pointed out by Eric Dumazet. - -This should speed up forwarding when conntrack is already in use -anyway, especially when using reverse path filtering -- active RPF -enforces two FIB lookups for each packet. - -Before the routing cache removal this didn't matter since RPF was performed -only when route cache didn't yield a result; but without route cache it -comes at higher price. - -Julian Anastasov suggested to add NETDEV_UNREGISTER handler to -avoid holding on to dsts of 'frozen' conntracks. - -Signed-off-by: Florian Westphal ---- - include/net/netfilter/nf_conntrack_extend.h | 4 + - include/net/netfilter/nf_conntrack_rtcache.h | 34 +++ - net/netfilter/Kconfig | 12 + - net/netfilter/Makefile | 3 + - net/netfilter/nf_conntrack_rtcache.c | 428 +++++++++++++++++++++++++++ - 5 files changed, 481 insertions(+) - create mode 100644 include/net/netfilter/nf_conntrack_rtcache.h - create mode 100644 net/netfilter/nf_conntrack_rtcache.c - ---- a/include/net/netfilter/nf_conntrack_extend.h -+++ b/include/net/netfilter/nf_conntrack_extend.h -@@ -28,6 +28,9 @@ enum nf_ct_ext_id { - #if IS_ENABLED(CONFIG_NETFILTER_SYNPROXY) - NF_CT_EXT_SYNPROXY, - #endif -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_RTCACHE) -+ NF_CT_EXT_RTCACHE, -+#endif - NF_CT_EXT_NUM, - }; - -@@ -40,6 +43,7 @@ enum nf_ct_ext_id { - #define NF_CT_EXT_TIMEOUT_TYPE struct nf_conn_timeout - #define NF_CT_EXT_LABELS_TYPE struct nf_conn_labels - #define NF_CT_EXT_SYNPROXY_TYPE struct nf_conn_synproxy -+#define NF_CT_EXT_RTCACHE_TYPE struct nf_conn_rtcache - - /* Extensions: optional stuff which isn't permanently in struct. */ - struct nf_ct_ext { ---- /dev/null -+++ b/include/net/netfilter/nf_conntrack_rtcache.h -@@ -0,0 +1,34 @@ -+#include -+#include -+#include -+ -+struct dst_entry; -+ -+struct nf_conn_dst_cache { -+ struct dst_entry *dst; -+ int iif; -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_IPV6) -+ u32 cookie; -+#endif -+ -+}; -+ -+struct nf_conn_rtcache { -+ struct nf_conn_dst_cache cached_dst[IP_CT_DIR_MAX]; -+}; -+ -+static inline -+struct nf_conn_rtcache *nf_ct_rtcache_find(const struct nf_conn *ct) -+{ -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_RTCACHE) -+ return nf_ct_ext_find(ct, NF_CT_EXT_RTCACHE); -+#else -+ return NULL; -+#endif -+} -+ -+static inline int nf_conn_rtcache_iif_get(const struct nf_conn_rtcache *rtc, -+ enum ip_conntrack_dir dir) -+{ -+ return rtc->cached_dst[dir].iif; -+} ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -135,6 +135,18 @@ config NF_CONNTRACK_EVENTS - - If unsure, say `N'. - -+config NF_CONNTRACK_RTCACHE -+ tristate "Cache route entries in conntrack objects" -+ depends on NETFILTER_ADVANCED -+ depends on NF_CONNTRACK -+ help -+ If this option is enabled, the connection tracking code will -+ cache routing information for each connection that is being -+ forwarded, at a cost of 32 bytes per conntrack object. -+ -+ To compile it as a module, choose M here. If unsure, say N. -+ The module will be called nf_conntrack_rtcache. -+ - config NF_CONNTRACK_TIMEOUT - bool 'Connection tracking timeout' - depends on NETFILTER_ADVANCED ---- a/net/netfilter/Makefile -+++ b/net/netfilter/Makefile -@@ -25,6 +25,9 @@ obj-$(CONFIG_NETFILTER_NETLINK_OSF) += n - # connection tracking - obj-$(CONFIG_NF_CONNTRACK) += nf_conntrack.o - -+# optional conntrack route cache extension -+obj-$(CONFIG_NF_CONNTRACK_RTCACHE) += nf_conntrack_rtcache.o -+ - obj-$(CONFIG_NF_CT_PROTO_GRE) += nf_conntrack_proto_gre.o - - # netlink interface for nf_conntrack ---- /dev/null -+++ b/net/netfilter/nf_conntrack_rtcache.c -@@ -0,0 +1,428 @@ -+/* route cache for netfilter. -+ * -+ * (C) 2014 Red Hat GmbH -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_IPV6) -+#include -+#endif -+ -+static void __nf_conn_rtcache_destroy(struct nf_conn_rtcache *rtc, -+ enum ip_conntrack_dir dir) -+{ -+ struct dst_entry *dst = rtc->cached_dst[dir].dst; -+ -+ dst_release(dst); -+} -+ -+static void nf_conn_rtcache_destroy(struct nf_conn *ct) -+{ -+ struct nf_conn_rtcache *rtc = nf_ct_rtcache_find(ct); -+ -+ if (!rtc) -+ return; -+ -+ __nf_conn_rtcache_destroy(rtc, IP_CT_DIR_ORIGINAL); -+ __nf_conn_rtcache_destroy(rtc, IP_CT_DIR_REPLY); -+} -+ -+static void nf_ct_rtcache_ext_add(struct nf_conn *ct) -+{ -+ struct nf_conn_rtcache *rtc; -+ -+ rtc = nf_ct_ext_add(ct, NF_CT_EXT_RTCACHE, GFP_ATOMIC); -+ if (rtc) { -+ rtc->cached_dst[IP_CT_DIR_ORIGINAL].iif = -1; -+ rtc->cached_dst[IP_CT_DIR_ORIGINAL].dst = NULL; -+ rtc->cached_dst[IP_CT_DIR_REPLY].iif = -1; -+ rtc->cached_dst[IP_CT_DIR_REPLY].dst = NULL; -+ } -+} -+ -+static struct nf_conn_rtcache *nf_ct_rtcache_find_usable(struct nf_conn *ct) -+{ -+ return nf_ct_rtcache_find(ct); -+} -+ -+static struct dst_entry * -+nf_conn_rtcache_dst_get(const struct nf_conn_rtcache *rtc, -+ enum ip_conntrack_dir dir) -+{ -+ return rtc->cached_dst[dir].dst; -+} -+ -+static u32 nf_rtcache_get_cookie(int pf, const struct dst_entry *dst) -+{ -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_IPV6) -+ if (pf == NFPROTO_IPV6) { -+ const struct rt6_info *rt = (const struct rt6_info *)dst; -+ -+ if (rt->from && rt->from->fib6_node) -+ return (u32)rt->from->fib6_node->fn_sernum; -+ } -+#endif -+ return 0; -+} -+ -+static void nf_conn_rtcache_dst_set(int pf, -+ struct nf_conn_rtcache *rtc, -+ struct dst_entry *dst, -+ enum ip_conntrack_dir dir, int iif) -+{ -+ if (rtc->cached_dst[dir].iif != iif) -+ rtc->cached_dst[dir].iif = iif; -+ -+ if (rtc->cached_dst[dir].dst != dst) { -+ struct dst_entry *old; -+ -+ dst_hold(dst); -+ -+ old = xchg(&rtc->cached_dst[dir].dst, dst); -+ dst_release(old); -+ -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_IPV6) -+ if (pf == NFPROTO_IPV6) -+ rtc->cached_dst[dir].cookie = -+ nf_rtcache_get_cookie(pf, dst); -+#endif -+ } -+} -+ -+static void nf_conn_rtcache_dst_obsolete(struct nf_conn_rtcache *rtc, -+ enum ip_conntrack_dir dir) -+{ -+ struct dst_entry *old; -+ -+ pr_debug("Invalidate iif %d for dir %d on cache %p\n", -+ rtc->cached_dst[dir].iif, dir, rtc); -+ -+ old = xchg(&rtc->cached_dst[dir].dst, NULL); -+ dst_release(old); -+ rtc->cached_dst[dir].iif = -1; -+} -+ -+static unsigned int nf_rtcache_in(u_int8_t pf, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ struct nf_conn_rtcache *rtc; -+ enum ip_conntrack_info ctinfo; -+ enum ip_conntrack_dir dir; -+ struct dst_entry *dst; -+ struct nf_conn *ct; -+ int iif; -+ u32 cookie; -+ -+ if (skb_dst(skb) || skb->sk) -+ return NF_ACCEPT; -+ -+ ct = nf_ct_get(skb, &ctinfo); -+ if (!ct) -+ return NF_ACCEPT; -+ -+ rtc = nf_ct_rtcache_find_usable(ct); -+ if (!rtc) -+ return NF_ACCEPT; -+ -+ /* if iif changes, don't use cache and let ip stack -+ * do route lookup. -+ * -+ * If rp_filter is enabled it might toss skb, so -+ * we don't want to avoid these checks. -+ */ -+ dir = CTINFO2DIR(ctinfo); -+ iif = nf_conn_rtcache_iif_get(rtc, dir); -+ if (state->in->ifindex != iif) { -+ pr_debug("ct %p, iif %d, cached iif %d, skip cached entry\n", -+ ct, iif, state->in->ifindex); -+ return NF_ACCEPT; -+ } -+ dst = nf_conn_rtcache_dst_get(rtc, dir); -+ if (dst == NULL) -+ return NF_ACCEPT; -+ -+ cookie = nf_rtcache_get_cookie(pf, dst); -+ -+ dst = dst_check(dst, cookie); -+ pr_debug("obtained dst %p for skb %p, cookie %d\n", dst, skb, cookie); -+ if (likely(dst)) -+ skb_dst_set_noref(skb, dst); -+ else -+ nf_conn_rtcache_dst_obsolete(rtc, dir); -+ -+ return NF_ACCEPT; -+} -+ -+static unsigned int nf_rtcache_forward(u_int8_t pf, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ struct nf_conn_rtcache *rtc; -+ enum ip_conntrack_info ctinfo; -+ enum ip_conntrack_dir dir; -+ struct nf_conn *ct; -+ struct dst_entry *dst = skb_dst(skb); -+ int iif; -+ -+ ct = nf_ct_get(skb, &ctinfo); -+ if (!ct) -+ return NF_ACCEPT; -+ -+ if (dst && dst_xfrm(dst)) -+ return NF_ACCEPT; -+ -+ if (!nf_ct_is_confirmed(ct)) { -+ if (WARN_ON(nf_ct_rtcache_find(ct))) -+ return NF_ACCEPT; -+ nf_ct_rtcache_ext_add(ct); -+ return NF_ACCEPT; -+ } -+ -+ rtc = nf_ct_rtcache_find_usable(ct); -+ if (!rtc) -+ return NF_ACCEPT; -+ -+ dir = CTINFO2DIR(ctinfo); -+ iif = nf_conn_rtcache_iif_get(rtc, dir); -+ pr_debug("ct %p, skb %p, dir %d, iif %d, cached iif %d\n", -+ ct, skb, dir, iif, state->in->ifindex); -+ if (likely(state->in->ifindex == iif)) -+ return NF_ACCEPT; -+ -+ nf_conn_rtcache_dst_set(pf, rtc, skb_dst(skb), dir, state->in->ifindex); -+ return NF_ACCEPT; -+} -+ -+static unsigned int nf_rtcache_in4(void *priv, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ return nf_rtcache_in(NFPROTO_IPV4, skb, state); -+} -+ -+static unsigned int nf_rtcache_forward4(void *priv, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ return nf_rtcache_forward(NFPROTO_IPV4, skb, state); -+} -+ -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_IPV6) -+static unsigned int nf_rtcache_in6(void *priv, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ return nf_rtcache_in(NFPROTO_IPV6, skb, state); -+} -+ -+static unsigned int nf_rtcache_forward6(void *priv, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ return nf_rtcache_forward(NFPROTO_IPV6, skb, state); -+} -+#endif -+ -+static int nf_rtcache_dst_remove(struct nf_conn *ct, void *data) -+{ -+ struct nf_conn_rtcache *rtc = nf_ct_rtcache_find(ct); -+ struct net_device *dev = data; -+ -+ if (!rtc) -+ return 0; -+ -+ if (dev->ifindex == rtc->cached_dst[IP_CT_DIR_ORIGINAL].iif || -+ dev->ifindex == rtc->cached_dst[IP_CT_DIR_REPLY].iif) { -+ nf_conn_rtcache_dst_obsolete(rtc, IP_CT_DIR_ORIGINAL); -+ nf_conn_rtcache_dst_obsolete(rtc, IP_CT_DIR_REPLY); -+ } -+ -+ return 0; -+} -+ -+static int nf_rtcache_netdev_event(struct notifier_block *this, -+ unsigned long event, void *ptr) -+{ -+ struct net_device *dev = netdev_notifier_info_to_dev(ptr); -+ struct net *net = dev_net(dev); -+ -+ if (event == NETDEV_DOWN) -+ nf_ct_iterate_cleanup_net(net, nf_rtcache_dst_remove, dev, 0, 0); -+ -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block nf_rtcache_notifier = { -+ .notifier_call = nf_rtcache_netdev_event, -+}; -+ -+static struct nf_hook_ops rtcache_ops[] = { -+ { -+ .hook = nf_rtcache_in4, -+ .pf = NFPROTO_IPV4, -+ .hooknum = NF_INET_PRE_ROUTING, -+ .priority = NF_IP_PRI_LAST, -+ }, -+ { -+ .hook = nf_rtcache_forward4, -+ .pf = NFPROTO_IPV4, -+ .hooknum = NF_INET_FORWARD, -+ .priority = NF_IP_PRI_LAST, -+ }, -+#if IS_ENABLED(CONFIG_NF_CONNTRACK_IPV6) -+ { -+ .hook = nf_rtcache_in6, -+ .pf = NFPROTO_IPV6, -+ .hooknum = NF_INET_PRE_ROUTING, -+ .priority = NF_IP_PRI_LAST, -+ }, -+ { -+ .hook = nf_rtcache_forward6, -+ .pf = NFPROTO_IPV6, -+ .hooknum = NF_INET_FORWARD, -+ .priority = NF_IP_PRI_LAST, -+ }, -+#endif -+}; -+ -+static struct nf_ct_ext_type rtcache_extend __read_mostly = { -+ .len = sizeof(struct nf_conn_rtcache), -+ .align = __alignof__(struct nf_conn_rtcache), -+ .id = NF_CT_EXT_RTCACHE, -+ .destroy = nf_conn_rtcache_destroy, -+}; -+ -+static int __net_init rtcache_net_init(struct net *net) -+{ -+ return nf_register_net_hooks(net, rtcache_ops, ARRAY_SIZE(rtcache_ops)); -+} -+ -+static void __net_exit rtcache_net_exit(struct net *net) -+{ -+ /* remove hooks so no new connections get rtcache extension */ -+ nf_unregister_net_hooks(net, rtcache_ops, ARRAY_SIZE(rtcache_ops)); -+} -+ -+static struct pernet_operations rtcache_ops_net_ops = { -+ .init = rtcache_net_init, -+ .exit = rtcache_net_exit, -+}; -+ -+static int __init nf_conntrack_rtcache_init(void) -+{ -+ int ret = nf_ct_extend_register(&rtcache_extend); -+ -+ if (ret < 0) { -+ pr_err("nf_conntrack_rtcache: Unable to register extension\n"); -+ return ret; -+ } -+ -+ ret = register_pernet_subsys(&rtcache_ops_net_ops); -+ if (ret) { -+ nf_ct_extend_unregister(&rtcache_extend); -+ return ret; -+ } -+ -+ ret = register_netdevice_notifier(&nf_rtcache_notifier); -+ if (ret) { -+ nf_ct_extend_unregister(&rtcache_extend); -+ unregister_pernet_subsys(&rtcache_ops_net_ops); -+ } -+ -+ return ret; -+} -+ -+static int nf_rtcache_ext_remove(struct nf_conn *ct, void *data) -+{ -+ struct nf_conn_rtcache *rtc = nf_ct_rtcache_find(ct); -+ -+ return rtc != NULL; -+} -+ -+static bool __exit nf_conntrack_rtcache_wait_for_dying(struct net *net) -+{ -+ bool wait = false; -+ int cpu; -+ -+ for_each_possible_cpu(cpu) { -+ struct nf_conntrack_tuple_hash *h; -+ struct hlist_nulls_node *n; -+ struct nf_conn *ct; -+ struct ct_pcpu *pcpu = per_cpu_ptr(net->ct.pcpu_lists, cpu); -+ -+ rcu_read_lock(); -+ spin_lock_bh(&pcpu->lock); -+ -+ hlist_nulls_for_each_entry(h, n, &pcpu->dying, hnnode) { -+ ct = nf_ct_tuplehash_to_ctrack(h); -+ if (nf_ct_rtcache_find(ct) != NULL) { -+ wait = true; -+ break; -+ } -+ } -+ spin_unlock_bh(&pcpu->lock); -+ rcu_read_unlock(); -+ } -+ -+ return wait; -+} -+ -+static void __exit nf_conntrack_rtcache_fini(void) -+{ -+ struct net *net; -+ int count = 0; -+ -+ synchronize_net(); -+ -+ unregister_netdevice_notifier(&nf_rtcache_notifier); -+ unregister_pernet_subsys(&rtcache_ops_net_ops); -+ -+ synchronize_net(); -+ -+ rtnl_lock(); -+ -+ /* zap all conntracks with rtcache extension */ -+ for_each_net(net) -+ nf_ct_iterate_cleanup_net(net, nf_rtcache_ext_remove, NULL, 0, 0); -+ -+ for_each_net(net) { -+ /* .. and make sure they're gone from dying list, too */ -+ while (nf_conntrack_rtcache_wait_for_dying(net)) { -+ msleep(200); -+ WARN_ONCE(++count > 25, "Waiting for all rtcache conntracks to go away\n"); -+ } -+ } -+ -+ rtnl_unlock(); -+ -+ synchronize_net(); -+ nf_ct_extend_unregister(&rtcache_extend); -+} -+module_init(nf_conntrack_rtcache_init); -+module_exit(nf_conntrack_rtcache_fini); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Florian Westphal "); -+MODULE_DESCRIPTION("Conntrack route cache extension"); diff --git a/target/linux/generic/backport-4.19/047-v4.21-mtd-keep-original-flags-for-every-struct-mtd_info.patch b/target/linux/generic/backport-4.19/047-v4.21-mtd-keep-original-flags-for-every-struct-mtd_info.patch deleted file mode 100644 index d587c9ec07..0000000000 --- a/target/linux/generic/backport-4.19/047-v4.21-mtd-keep-original-flags-for-every-struct-mtd_info.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 1186af457cc186c5ed01708da71b1ffbdf0a2638 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Tue, 20 Nov 2018 09:55:45 +0100 -Subject: [PATCH] mtd: keep original flags for every struct mtd_info -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -When allocating a new partition mtd subsystem runs internal tests in the -allocate_partition(). They may result in modifying specified flags (e.g. -dropping some /features/ like write access). - -Those constraints don't have to be necessary true for subpartitions. It -may happen parent partition isn't block aligned (effectively disabling -write access) while subpartition may fit blocks nicely. In such case all -checks should be run again (starting with original flags value). - -Signed-off-by: Rafał Miłecki -Signed-off-by: Boris Brezillon ---- - drivers/mtd/mtdcore.c | 2 ++ - drivers/mtd/mtdpart.c | 3 ++- - include/linux/mtd/mtd.h | 1 + - 3 files changed, 5 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/mtdcore.c -+++ b/drivers/mtd/mtdcore.c -@@ -665,6 +665,8 @@ static void mtd_set_dev_defaults(struct - } else { - pr_debug("mtd device won't show a device symlink in sysfs\n"); - } -+ -+ mtd->orig_flags = mtd->flags; - } - - /** ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -346,7 +346,8 @@ static struct mtd_part *allocate_partiti - - /* set up the MTD object for this partition */ - slave->mtd.type = parent->type; -- slave->mtd.flags = parent->flags & ~part->mask_flags; -+ slave->mtd.flags = parent->orig_flags & ~part->mask_flags; -+ slave->mtd.orig_flags = slave->mtd.flags; - slave->mtd.size = part->size; - slave->mtd.writesize = parent->writesize; - slave->mtd.writebufsize = parent->writebufsize; ---- a/include/linux/mtd/mtd.h -+++ b/include/linux/mtd/mtd.h -@@ -207,6 +207,7 @@ struct mtd_debug_info { - struct mtd_info { - u_char type; - uint32_t flags; -+ uint32_t orig_flags; /* Flags as before running mtd checks */ - uint64_t size; // Total size of the MTD - - /* "Major" erase size for the device. Naïve users may take this diff --git a/target/linux/generic/backport-4.19/048-v4.21-mtd-improve-calculating-partition-boundaries-when-ch.patch b/target/linux/generic/backport-4.19/048-v4.21-mtd-improve-calculating-partition-boundaries-when-ch.patch deleted file mode 100644 index 02296276b0..0000000000 --- a/target/linux/generic/backport-4.19/048-v4.21-mtd-improve-calculating-partition-boundaries-when-ch.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 6750f61a13a0197c40e4a40739117493b15f19e8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Tue, 20 Nov 2018 10:24:09 +0100 -Subject: [PATCH] mtd: improve calculating partition boundaries when checking - for alignment -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -When checking for alignment mtd should check absolute offsets. It's -important for subpartitions as it doesn't make sense to check their -relative addresses. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Boris Brezillon ---- - drivers/mtd/mtdpart.c | 13 +++++++++++-- - 1 file changed, 11 insertions(+), 2 deletions(-) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -61,6 +61,15 @@ static inline struct mtd_part *mtd_to_pa - return container_of(mtd, struct mtd_part, mtd); - } - -+static u64 part_absolute_offset(struct mtd_info *mtd) -+{ -+ struct mtd_part *part = mtd_to_part(mtd); -+ -+ if (!mtd_is_partition(mtd)) -+ return 0; -+ -+ return part_absolute_offset(part->parent) + part->offset; -+} - - /* - * MTD methods which simply translate the effective address and pass through -@@ -518,7 +527,7 @@ static struct mtd_part *allocate_partiti - if (!(slave->mtd.flags & MTD_NO_ERASE)) - wr_alignment = slave->mtd.erasesize; - -- tmp = slave->offset; -+ tmp = part_absolute_offset(parent) + slave->offset; - remainder = do_div(tmp, wr_alignment); - if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) { - /* Doesn't start on a boundary of major erase size */ -@@ -529,7 +538,7 @@ static struct mtd_part *allocate_partiti - part->name); - } - -- tmp = slave->mtd.size; -+ tmp = part_absolute_offset(parent) + slave->mtd.size; - remainder = do_div(tmp, wr_alignment); - if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) { - slave->mtd.flags &= ~MTD_WRITEABLE; diff --git a/target/linux/generic/backport-4.19/080-v5.1-0001-bcma-keep-a-direct-pointer-to-the-struct-device.patch b/target/linux/generic/backport-4.19/080-v5.1-0001-bcma-keep-a-direct-pointer-to-the-struct-device.patch deleted file mode 100644 index cc32aee17b..0000000000 --- a/target/linux/generic/backport-4.19/080-v5.1-0001-bcma-keep-a-direct-pointer-to-the-struct-device.patch +++ /dev/null @@ -1,199 +0,0 @@ -From 5a1c18b761ddb299a06746948b9ec2814b04fa92 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Wed, 2 Jan 2019 00:00:01 +0100 -Subject: [PATCH] bcma: keep a direct pointer to the struct device -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Accessing struct device is pretty useful/common so having a direct -pointer: -1) Simplifies some code -2) Makes bcma_bus_get_host_dev() unneeded -3) Allows further improvements like using dev_* printing helpers - -Signed-off-by: Rafał Miłecki -Signed-off-by: Kalle Valo ---- - drivers/bcma/bcma_private.h | 1 - - drivers/bcma/driver_gpio.c | 2 +- - drivers/bcma/host_pci.c | 2 ++ - drivers/bcma/host_soc.c | 4 ++-- - drivers/bcma/main.c | 45 +++++++++---------------------------- - include/linux/bcma/bcma.h | 11 +++------ - 6 files changed, 18 insertions(+), 47 deletions(-) - ---- a/drivers/bcma/bcma_private.h -+++ b/drivers/bcma/bcma_private.h -@@ -33,7 +33,6 @@ int __init bcma_bus_early_register(struc - int bcma_bus_suspend(struct bcma_bus *bus); - int bcma_bus_resume(struct bcma_bus *bus); - #endif --struct device *bcma_bus_get_host_dev(struct bcma_bus *bus); - - /* scan.c */ - void bcma_detect_chip(struct bcma_bus *bus); ---- a/drivers/bcma/driver_gpio.c -+++ b/drivers/bcma/driver_gpio.c -@@ -183,7 +183,7 @@ int bcma_gpio_init(struct bcma_drv_cc *c - chip->direction_input = bcma_gpio_direction_input; - chip->direction_output = bcma_gpio_direction_output; - chip->owner = THIS_MODULE; -- chip->parent = bcma_bus_get_host_dev(bus); -+ chip->parent = bus->dev; - #if IS_BUILTIN(CONFIG_OF) - chip->of_node = cc->core->dev.of_node; - #endif ---- a/drivers/bcma/host_pci.c -+++ b/drivers/bcma/host_pci.c -@@ -196,6 +196,8 @@ static int bcma_host_pci_probe(struct pc - goto err_pci_release_regions; - } - -+ bus->dev = &dev->dev; -+ - /* Map MMIO */ - err = -ENOMEM; - bus->mmio = pci_iomap(dev, 0, ~0UL); ---- a/drivers/bcma/host_soc.c -+++ b/drivers/bcma/host_soc.c -@@ -179,7 +179,6 @@ int __init bcma_host_soc_register(struct - /* Host specific */ - bus->hosttype = BCMA_HOSTTYPE_SOC; - bus->ops = &bcma_host_soc_ops; -- bus->host_pdev = NULL; - - /* Initialize struct, detect chip */ - bcma_init_bus(bus); -@@ -213,6 +212,8 @@ static int bcma_host_soc_probe(struct pl - if (!bus) - return -ENOMEM; - -+ bus->dev = dev; -+ - /* Map MMIO */ - bus->mmio = of_iomap(np, 0); - if (!bus->mmio) -@@ -221,7 +222,6 @@ static int bcma_host_soc_probe(struct pl - /* Host specific */ - bus->hosttype = BCMA_HOSTTYPE_SOC; - bus->ops = &bcma_host_soc_ops; -- bus->host_pdev = pdev; - - /* Initialize struct, detect chip */ - bcma_init_bus(bus); ---- a/drivers/bcma/main.c -+++ b/drivers/bcma/main.c -@@ -223,8 +223,8 @@ unsigned int bcma_core_irq(struct bcma_d - mips_irq = bcma_core_mips_irq(core); - return mips_irq <= 4 ? mips_irq + 2 : 0; - } -- if (bus->host_pdev) -- return bcma_of_get_irq(&bus->host_pdev->dev, core, num); -+ if (bus->dev) -+ return bcma_of_get_irq(bus->dev, core, num); - return 0; - case BCMA_HOSTTYPE_SDIO: - return 0; -@@ -239,18 +239,18 @@ void bcma_prepare_core(struct bcma_bus * - core->dev.release = bcma_release_core_dev; - core->dev.bus = &bcma_bus_type; - dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index); -- core->dev.parent = bcma_bus_get_host_dev(bus); -- if (core->dev.parent) -- bcma_of_fill_device(core->dev.parent, core); -+ core->dev.parent = bus->dev; -+ if (bus->dev) -+ bcma_of_fill_device(bus->dev, core); - - switch (bus->hosttype) { - case BCMA_HOSTTYPE_PCI: -- core->dma_dev = &bus->host_pci->dev; -+ core->dma_dev = bus->dev; - core->irq = bus->host_pci->irq; - break; - case BCMA_HOSTTYPE_SOC: -- if (IS_ENABLED(CONFIG_OF) && bus->host_pdev) { -- core->dma_dev = &bus->host_pdev->dev; -+ if (IS_ENABLED(CONFIG_OF) && bus->dev) { -+ core->dma_dev = bus->dev; - } else { - core->dev.dma_mask = &core->dev.coherent_dma_mask; - core->dma_dev = &core->dev; -@@ -261,28 +261,6 @@ void bcma_prepare_core(struct bcma_bus * - } - } - --struct device *bcma_bus_get_host_dev(struct bcma_bus *bus) --{ -- switch (bus->hosttype) { -- case BCMA_HOSTTYPE_PCI: -- if (bus->host_pci) -- return &bus->host_pci->dev; -- else -- return NULL; -- case BCMA_HOSTTYPE_SOC: -- if (bus->host_pdev) -- return &bus->host_pdev->dev; -- else -- return NULL; -- case BCMA_HOSTTYPE_SDIO: -- if (bus->host_sdio) -- return &bus->host_sdio->dev; -- else -- return NULL; -- } -- return NULL; --} -- - void bcma_init_bus(struct bcma_bus *bus) - { - mutex_lock(&bcma_buses_mutex); -@@ -402,7 +380,6 @@ int bcma_bus_register(struct bcma_bus *b - { - int err; - struct bcma_device *core; -- struct device *dev; - - /* Scan for devices (cores) */ - err = bcma_bus_scan(bus); -@@ -425,10 +402,8 @@ int bcma_bus_register(struct bcma_bus *b - bcma_core_pci_early_init(&bus->drv_pci[0]); - } - -- dev = bcma_bus_get_host_dev(bus); -- if (dev) { -- of_platform_default_populate(dev->of_node, NULL, dev); -- } -+ if (bus->dev) -+ of_platform_default_populate(bus->dev->of_node, NULL, bus->dev); - - /* Cores providing flash access go before SPROM init */ - list_for_each_entry(core, &bus->cores, list) { ---- a/include/linux/bcma/bcma.h -+++ b/include/linux/bcma/bcma.h -@@ -332,6 +332,8 @@ extern int bcma_arch_register_fallback_s - struct ssb_sprom *out)); - - struct bcma_bus { -+ struct device *dev; -+ - /* The MMIO area. */ - void __iomem *mmio; - -@@ -339,14 +341,7 @@ struct bcma_bus { - - enum bcma_hosttype hosttype; - bool host_is_pcie2; /* Used for BCMA_HOSTTYPE_PCI only */ -- union { -- /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */ -- struct pci_dev *host_pci; -- /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */ -- struct sdio_func *host_sdio; -- /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */ -- struct platform_device *host_pdev; -- }; -+ struct pci_dev *host_pci; /* PCI bus pointer (BCMA_HOSTTYPE_PCI only) */ - - struct bcma_chipinfo chipinfo; - diff --git a/target/linux/generic/backport-4.19/080-v5.1-0002-bcma-use-dev_-printing-functions.patch b/target/linux/generic/backport-4.19/080-v5.1-0002-bcma-use-dev_-printing-functions.patch deleted file mode 100644 index 7ce8ba8967..0000000000 --- a/target/linux/generic/backport-4.19/080-v5.1-0002-bcma-use-dev_-printing-functions.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 777bc4801a6868fcbff09ffb6e30f023e7c5ed38 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Wed, 2 Jan 2019 00:00:02 +0100 -Subject: [PATCH] bcma: use dev_* printing functions -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It provides more meaningful messages. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Kalle Valo ---- - drivers/bcma/bcma_private.h | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/drivers/bcma/bcma_private.h -+++ b/drivers/bcma/bcma_private.h -@@ -10,13 +10,13 @@ - #include - - #define bcma_err(bus, fmt, ...) \ -- pr_err("bus%d: " fmt, (bus)->num, ##__VA_ARGS__) -+ dev_err((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__) - #define bcma_warn(bus, fmt, ...) \ -- pr_warn("bus%d: " fmt, (bus)->num, ##__VA_ARGS__) -+ dev_warn((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__) - #define bcma_info(bus, fmt, ...) \ -- pr_info("bus%d: " fmt, (bus)->num, ##__VA_ARGS__) -+ dev_info((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__) - #define bcma_debug(bus, fmt, ...) \ -- pr_debug("bus%d: " fmt, (bus)->num, ##__VA_ARGS__) -+ dev_dbg((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__) - - struct bcma_bus; - diff --git a/target/linux/generic/backport-4.19/095-Allow-class-e-address-assignment-via-ifconfig-ioctl.patch b/target/linux/generic/backport-4.19/095-Allow-class-e-address-assignment-via-ifconfig-ioctl.patch deleted file mode 100644 index e473c8918b..0000000000 --- a/target/linux/generic/backport-4.19/095-Allow-class-e-address-assignment-via-ifconfig-ioctl.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 46bf067870156abd61fe24d14c2486d15b8b502c Mon Sep 17 00:00:00 2001 -From: Dave Taht -Date: Fri, 14 Dec 2018 18:38:40 +0000 -Subject: [PATCH 1/1] Allow class-e address assignment in ifconfig and early - boot - -While the linux kernel became mostly "class-e clean" a decade ago, -and most distributions long ago switched to the iproute2 suite -of utilities, which allow class-e (240.0.0.0/4) address assignment, -distributions relying on busybox, toybox and other forms of -ifconfig cannot assign class-e addresses without this kernel patch. - -With this patch, also, a boot command line on these addresses is feasible: -(ip=248.0.1.2::248.0.1.1:255.255.255.0). - -While CIDR has been obsolete for 2 decades, and a survey of all the -userspace open source code in the world shows most IN_whatever macros -are also obsolete... rather than obsolete CIDR from this ioctl entirely, -this patch merely enables class-e assignment, sanely. - -H/T to Vince Fuller and his original patch here: - https://lkml.org/lkml/2008/1/7/370 - -Signed-off-by: Dave Taht -Reviewed-by: John Gilmore ---- - include/uapi/linux/in.h | 8 ++++++-- - net/ipv4/devinet.c | 4 +++- - net/ipv4/ipconfig.c | 2 ++ - 3 files changed, 11 insertions(+), 3 deletions(-) - ---- a/include/uapi/linux/in.h -+++ b/include/uapi/linux/in.h -@@ -268,8 +268,12 @@ struct sockaddr_in { - #define IN_MULTICAST(a) IN_CLASSD(a) - #define IN_MULTICAST_NET 0xF0000000 - --#define IN_EXPERIMENTAL(a) ((((long int) (a)) & 0xf0000000) == 0xf0000000) --#define IN_BADCLASS(a) IN_EXPERIMENTAL((a)) -+#define IN_BADCLASS(a) (((long int) (a) ) == (long int)0xffffffff) -+#define IN_EXPERIMENTAL(a) IN_BADCLASS((a)) -+ -+#define IN_CLASSE(a) ((((long int) (a)) & 0xf0000000) == 0xf0000000) -+#define IN_CLASSE_NET 0xffffffff -+#define IN_CLASSE_NSHIFT 0 - - /* Address to accept any incoming messages. */ - #define INADDR_ANY ((unsigned long int) 0x00000000) ---- a/net/ipv4/devinet.c -+++ b/net/ipv4/devinet.c -@@ -955,7 +955,7 @@ static int inet_abc_len(__be32 addr) - { - int rc = -1; /* Something else, probably a multicast. */ - -- if (ipv4_is_zeronet(addr)) -+ if (ipv4_is_zeronet(addr) || ipv4_is_lbcast(addr)) - rc = 0; - else { - __u32 haddr = ntohl(addr); -@@ -966,6 +966,8 @@ static int inet_abc_len(__be32 addr) - rc = 16; - else if (IN_CLASSC(haddr)) - rc = 24; -+ else if (IN_CLASSE(haddr)) -+ rc = 32; - } - - return rc; ---- a/net/ipv4/ipconfig.c -+++ b/net/ipv4/ipconfig.c -@@ -429,6 +429,8 @@ static int __init ic_defaults(void) - ic_netmask = htonl(IN_CLASSB_NET); - else if (IN_CLASSC(ntohl(ic_myaddr))) - ic_netmask = htonl(IN_CLASSC_NET); -+ else if (IN_CLASSE(ntohl(ic_myaddr))) -+ ic_netmask = htonl(IN_CLASSE_NET); - else { - pr_err("IP-Config: Unable to guess netmask for address %pI4\n", - &ic_myaddr); diff --git a/target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch b/target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch deleted file mode 100644 index 2b3384391a..0000000000 --- a/target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 4cc30de79d293f1e8c5f50ae3a9c005def9564a0 Mon Sep 17 00:00:00 2001 -From: Koen Vandeputte -Date: Mon, 7 Jan 2019 14:14:27 +0100 -Subject: [PATCH 2/2] arm: cns3xxx: use actual size reads for PCIe - -commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") -reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(), -which preserved the property of only doing 32-bit reads. - -It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(), -so it changed writes from always being 32 bits to being the actual size, -which works just fine. - -Due to: -- The documentation does not mention that only 32 bit access is allowed. -- Writes are already executed using the actual size -- Extensive testing shows that 8b, 16b and 32b reads work as intended - -It makes perfectly sense to also swap 32 bit reading in favor of actual size. - -Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") -Suggested-by: Bjorn Helgaas -Signed-off-by: Koen Vandeputte -CC: Arnd Bergmann -CC: Krzysztof Halasa -CC: Olof Johansson -CC: Robin Leblon -CC: Rob Herring -CC: Russell King -CC: Tim Harvey -CC: stable@vger.kernel.org # v4.0+ ---- - arch/arm/mach-cns3xxx/pcie.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/mach-cns3xxx/pcie.c -+++ b/arch/arm/mach-cns3xxx/pcie.c -@@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struc - u32 mask = (0x1ull << (size * 8)) - 1; - int shift = (where % 4) * 8; - -- ret = pci_generic_config_read32(bus, devfn, where, size, val); -+ ret = pci_generic_config_read(bus, devfn, where, size, val); - - if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn && - (where & 0xffc) == PCI_CLASS_REVISION) diff --git a/target/linux/generic/backport-4.19/200-v5.2-usb-dwc2-Set-lpm-mode-parameters-depend-on-HW-configuration.patch b/target/linux/generic/backport-4.19/200-v5.2-usb-dwc2-Set-lpm-mode-parameters-depend-on-HW-configuration.patch deleted file mode 100644 index ed4aadf2be..0000000000 --- a/target/linux/generic/backport-4.19/200-v5.2-usb-dwc2-Set-lpm-mode-parameters-depend-on-HW-configuration.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 28b5c129ca6e585ec95c160ec4297bc6c6360b6f Mon Sep 17 00:00:00 2001 -From: Minas Harutyunyan -Date: Mon, 4 Mar 2019 17:08:07 +0400 -Subject: usb: dwc2: Set lpm mode parameters depend on HW configuration - -If core not supported lpm, i.e. BCM2835 then confusing warnings seen -in log. - -To avoid these warnings, added function dwc2_set_param_lpm() to set -lpm and other lpm related parameters based on lpm support by core. - -Signed-off-by: Minas Harutyunyan -Signed-off-by: Felipe Balbi ---- - drivers/usb/dwc2/params.c | 23 ++++++++++++++++++----- - 1 file changed, 18 insertions(+), 5 deletions(-) - ---- a/drivers/usb/dwc2/params.c -+++ b/drivers/usb/dwc2/params.c -@@ -273,6 +273,23 @@ static void dwc2_set_param_power_down(st - hsotg->params.power_down = val; - } - -+static void dwc2_set_param_lpm(struct dwc2_hsotg *hsotg) -+{ -+ struct dwc2_core_params *p = &hsotg->params; -+ -+ p->lpm = hsotg->hw_params.lpm_mode; -+ if (p->lpm) { -+ p->lpm_clock_gating = true; -+ p->besl = true; -+ p->hird_threshold_en = true; -+ p->hird_threshold = 4; -+ } else { -+ p->lpm_clock_gating = false; -+ p->besl = false; -+ p->hird_threshold_en = false; -+ } -+} -+ - /** - * dwc2_set_default_params() - Set all core parameters to their - * auto-detected default values. -@@ -291,6 +308,7 @@ static void dwc2_set_default_params(stru - dwc2_set_param_speed(hsotg); - dwc2_set_param_phy_utmi_width(hsotg); - dwc2_set_param_power_down(hsotg); -+ dwc2_set_param_lpm(hsotg); - p->phy_ulpi_ddr = false; - p->phy_ulpi_ext_vbus = false; - -@@ -303,11 +321,6 @@ static void dwc2_set_default_params(stru - p->reload_ctl = (hw->snpsid >= DWC2_CORE_REV_2_92a); - p->uframe_sched = true; - p->external_id_pin_ctl = false; -- p->lpm = true; -- p->lpm_clock_gating = true; -- p->besl = true; -- p->hird_threshold_en = true; -- p->hird_threshold = 4; - p->ipg_isoc_en = false; - p->max_packet_count = hw->max_packet_count; - p->max_transfer_size = hw->max_transfer_size; diff --git a/target/linux/generic/backport-4.19/210-arm64-sve-Disentangle-uapi-asm-ptrace.h-from-uapi-as.patch b/target/linux/generic/backport-4.19/210-arm64-sve-Disentangle-uapi-asm-ptrace.h-from-uapi-as.patch deleted file mode 100644 index 7c574fd343..0000000000 --- a/target/linux/generic/backport-4.19/210-arm64-sve-Disentangle-uapi-asm-ptrace.h-from-uapi-as.patch +++ /dev/null @@ -1,280 +0,0 @@ -From 9966a05c7b80f075f2bc7e48dbb108d3f2927234 Mon Sep 17 00:00:00 2001 -From: Dave Martin -Date: Fri, 4 Jan 2019 13:09:51 +0000 -Subject: [PATCH] arm64/sve: Disentangle from - - -Currently, provides common definitions for -describing SVE context structures that are also used by the ptrace -definitions in . - -For this reason, a #include of was added in -ptrace.h, but it this turns out that this can interact badly with -userspace code that tries to include ptrace.h on top of the libc -headers (which may provide their own shadow definitions for -sigcontext.h). - -To make the headers easier for userspace to consume, this patch -bounces the common definitions into an __SVE_* namespace and moves -them to a backend header that can be -included by the other headers as appropriate. This should allow -ptrace.h to be used alongside libc's sigcontext.h (if any) without -ill effects. - -This should make the situation unambiguous: is -the header to include for the sigframe-specific definitions, while - is the header to include for ptrace-specific -definitions. - -To avoid conflicting with existing usage, -remains the canonical way to get the common definitions for -SVE_VQ_MIN, sve_vq_from_vl() etc., both in userspace and in the -kernel: relying on these being defined as a side effect of -including just was never intended to be safe. - -Signed-off-by: Dave Martin -Signed-off-by: Will Deacon ---- - arch/arm64/include/uapi/asm/ptrace.h | 39 ++++++++-------- - arch/arm64/include/uapi/asm/sigcontext.h | 56 +++++++++++------------ - arch/arm64/include/uapi/asm/sve_context.h | 53 +++++++++++++++++++++ - 3 files changed, 99 insertions(+), 49 deletions(-) - create mode 100644 arch/arm64/include/uapi/asm/sve_context.h - ---- a/arch/arm64/include/uapi/asm/ptrace.h -+++ b/arch/arm64/include/uapi/asm/ptrace.h -@@ -23,7 +23,7 @@ - #include - - #include --#include -+#include - - - /* -@@ -129,9 +129,9 @@ struct user_sve_header { - */ - - /* Offset from the start of struct user_sve_header to the register data */ --#define SVE_PT_REGS_OFFSET \ -- ((sizeof(struct user_sve_header) + (SVE_VQ_BYTES - 1)) \ -- / SVE_VQ_BYTES * SVE_VQ_BYTES) -+#define SVE_PT_REGS_OFFSET \ -+ ((sizeof(struct user_sve_header) + (__SVE_VQ_BYTES - 1)) \ -+ / __SVE_VQ_BYTES * __SVE_VQ_BYTES) - - /* - * The register data content and layout depends on the value of the -@@ -177,39 +177,36 @@ struct user_sve_header { - * Additional data might be appended in the future. - */ - --#define SVE_PT_SVE_ZREG_SIZE(vq) SVE_SIG_ZREG_SIZE(vq) --#define SVE_PT_SVE_PREG_SIZE(vq) SVE_SIG_PREG_SIZE(vq) --#define SVE_PT_SVE_FFR_SIZE(vq) SVE_SIG_FFR_SIZE(vq) -+#define SVE_PT_SVE_ZREG_SIZE(vq) __SVE_ZREG_SIZE(vq) -+#define SVE_PT_SVE_PREG_SIZE(vq) __SVE_PREG_SIZE(vq) -+#define SVE_PT_SVE_FFR_SIZE(vq) __SVE_FFR_SIZE(vq) - #define SVE_PT_SVE_FPSR_SIZE sizeof(__u32) - #define SVE_PT_SVE_FPCR_SIZE sizeof(__u32) - --#define __SVE_SIG_TO_PT(offset) \ -- ((offset) - SVE_SIG_REGS_OFFSET + SVE_PT_REGS_OFFSET) -- - #define SVE_PT_SVE_OFFSET SVE_PT_REGS_OFFSET - - #define SVE_PT_SVE_ZREGS_OFFSET \ -- __SVE_SIG_TO_PT(SVE_SIG_ZREGS_OFFSET) -+ (SVE_PT_REGS_OFFSET + __SVE_ZREGS_OFFSET) - #define SVE_PT_SVE_ZREG_OFFSET(vq, n) \ -- __SVE_SIG_TO_PT(SVE_SIG_ZREG_OFFSET(vq, n)) -+ (SVE_PT_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n)) - #define SVE_PT_SVE_ZREGS_SIZE(vq) \ -- (SVE_PT_SVE_ZREG_OFFSET(vq, SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET) -+ (SVE_PT_SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET) - - #define SVE_PT_SVE_PREGS_OFFSET(vq) \ -- __SVE_SIG_TO_PT(SVE_SIG_PREGS_OFFSET(vq)) -+ (SVE_PT_REGS_OFFSET + __SVE_PREGS_OFFSET(vq)) - #define SVE_PT_SVE_PREG_OFFSET(vq, n) \ -- __SVE_SIG_TO_PT(SVE_SIG_PREG_OFFSET(vq, n)) -+ (SVE_PT_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n)) - #define SVE_PT_SVE_PREGS_SIZE(vq) \ -- (SVE_PT_SVE_PREG_OFFSET(vq, SVE_NUM_PREGS) - \ -+ (SVE_PT_SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - \ - SVE_PT_SVE_PREGS_OFFSET(vq)) - - #define SVE_PT_SVE_FFR_OFFSET(vq) \ -- __SVE_SIG_TO_PT(SVE_SIG_FFR_OFFSET(vq)) -+ (SVE_PT_REGS_OFFSET + __SVE_FFR_OFFSET(vq)) - - #define SVE_PT_SVE_FPSR_OFFSET(vq) \ - ((SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq) + \ -- (SVE_VQ_BYTES - 1)) \ -- / SVE_VQ_BYTES * SVE_VQ_BYTES) -+ (__SVE_VQ_BYTES - 1)) \ -+ / __SVE_VQ_BYTES * __SVE_VQ_BYTES) - #define SVE_PT_SVE_FPCR_OFFSET(vq) \ - (SVE_PT_SVE_FPSR_OFFSET(vq) + SVE_PT_SVE_FPSR_SIZE) - -@@ -220,8 +217,8 @@ struct user_sve_header { - - #define SVE_PT_SVE_SIZE(vq, flags) \ - ((SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE \ -- - SVE_PT_SVE_OFFSET + (SVE_VQ_BYTES - 1)) \ -- / SVE_VQ_BYTES * SVE_VQ_BYTES) -+ - SVE_PT_SVE_OFFSET + (__SVE_VQ_BYTES - 1)) \ -+ / __SVE_VQ_BYTES * __SVE_VQ_BYTES) - - #define SVE_PT_SIZE(vq, flags) \ - (((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ? \ ---- a/arch/arm64/include/uapi/asm/sigcontext.h -+++ b/arch/arm64/include/uapi/asm/sigcontext.h -@@ -130,6 +130,8 @@ struct sve_context { - - #endif /* !__ASSEMBLY__ */ - -+#include -+ - /* - * The SVE architecture leaves space for future expansion of the - * vector length beyond its initial architectural limit of 2048 bits -@@ -138,21 +140,20 @@ struct sve_context { - * See linux/Documentation/arm64/sve.txt for a description of the VL/VQ - * terminology. - */ --#define SVE_VQ_BYTES 16 /* number of bytes per quadword */ -+#define SVE_VQ_BYTES __SVE_VQ_BYTES /* bytes per quadword */ - --#define SVE_VQ_MIN 1 --#define SVE_VQ_MAX 512 -+#define SVE_VQ_MIN __SVE_VQ_MIN -+#define SVE_VQ_MAX __SVE_VQ_MAX - --#define SVE_VL_MIN (SVE_VQ_MIN * SVE_VQ_BYTES) --#define SVE_VL_MAX (SVE_VQ_MAX * SVE_VQ_BYTES) -+#define SVE_VL_MIN __SVE_VL_MIN -+#define SVE_VL_MAX __SVE_VL_MAX - --#define SVE_NUM_ZREGS 32 --#define SVE_NUM_PREGS 16 -+#define SVE_NUM_ZREGS __SVE_NUM_ZREGS -+#define SVE_NUM_PREGS __SVE_NUM_PREGS - --#define sve_vl_valid(vl) \ -- ((vl) % SVE_VQ_BYTES == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX) --#define sve_vq_from_vl(vl) ((vl) / SVE_VQ_BYTES) --#define sve_vl_from_vq(vq) ((vq) * SVE_VQ_BYTES) -+#define sve_vl_valid(vl) __sve_vl_valid(vl) -+#define sve_vq_from_vl(vl) __sve_vq_from_vl(vl) -+#define sve_vl_from_vq(vq) __sve_vl_from_vq(vq) - - /* - * If the SVE registers are currently live for the thread at signal delivery, -@@ -205,34 +206,33 @@ struct sve_context { - * Additional data might be appended in the future. - */ - --#define SVE_SIG_ZREG_SIZE(vq) ((__u32)(vq) * SVE_VQ_BYTES) --#define SVE_SIG_PREG_SIZE(vq) ((__u32)(vq) * (SVE_VQ_BYTES / 8)) --#define SVE_SIG_FFR_SIZE(vq) SVE_SIG_PREG_SIZE(vq) -+#define SVE_SIG_ZREG_SIZE(vq) __SVE_ZREG_SIZE(vq) -+#define SVE_SIG_PREG_SIZE(vq) __SVE_PREG_SIZE(vq) -+#define SVE_SIG_FFR_SIZE(vq) __SVE_FFR_SIZE(vq) - - #define SVE_SIG_REGS_OFFSET \ -- ((sizeof(struct sve_context) + (SVE_VQ_BYTES - 1)) \ -- / SVE_VQ_BYTES * SVE_VQ_BYTES) -+ ((sizeof(struct sve_context) + (__SVE_VQ_BYTES - 1)) \ -+ / __SVE_VQ_BYTES * __SVE_VQ_BYTES) - --#define SVE_SIG_ZREGS_OFFSET SVE_SIG_REGS_OFFSET -+#define SVE_SIG_ZREGS_OFFSET \ -+ (SVE_SIG_REGS_OFFSET + __SVE_ZREGS_OFFSET) - #define SVE_SIG_ZREG_OFFSET(vq, n) \ -- (SVE_SIG_ZREGS_OFFSET + SVE_SIG_ZREG_SIZE(vq) * (n)) --#define SVE_SIG_ZREGS_SIZE(vq) \ -- (SVE_SIG_ZREG_OFFSET(vq, SVE_NUM_ZREGS) - SVE_SIG_ZREGS_OFFSET) -+ (SVE_SIG_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n)) -+#define SVE_SIG_ZREGS_SIZE(vq) __SVE_ZREGS_SIZE(vq) - - #define SVE_SIG_PREGS_OFFSET(vq) \ -- (SVE_SIG_ZREGS_OFFSET + SVE_SIG_ZREGS_SIZE(vq)) -+ (SVE_SIG_REGS_OFFSET + __SVE_PREGS_OFFSET(vq)) - #define SVE_SIG_PREG_OFFSET(vq, n) \ -- (SVE_SIG_PREGS_OFFSET(vq) + SVE_SIG_PREG_SIZE(vq) * (n)) --#define SVE_SIG_PREGS_SIZE(vq) \ -- (SVE_SIG_PREG_OFFSET(vq, SVE_NUM_PREGS) - SVE_SIG_PREGS_OFFSET(vq)) -+ (SVE_SIG_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n)) -+#define SVE_SIG_PREGS_SIZE(vq) __SVE_PREGS_SIZE(vq) - - #define SVE_SIG_FFR_OFFSET(vq) \ -- (SVE_SIG_PREGS_OFFSET(vq) + SVE_SIG_PREGS_SIZE(vq)) -+ (SVE_SIG_REGS_OFFSET + __SVE_FFR_OFFSET(vq)) - - #define SVE_SIG_REGS_SIZE(vq) \ -- (SVE_SIG_FFR_OFFSET(vq) + SVE_SIG_FFR_SIZE(vq) - SVE_SIG_REGS_OFFSET) -- --#define SVE_SIG_CONTEXT_SIZE(vq) (SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq)) -+ (__SVE_FFR_OFFSET(vq) + __SVE_FFR_SIZE(vq)) - -+#define SVE_SIG_CONTEXT_SIZE(vq) \ -+ (SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq)) - - #endif /* _UAPI__ASM_SIGCONTEXT_H */ ---- /dev/null -+++ b/arch/arm64/include/uapi/asm/sve_context.h -@@ -0,0 +1,53 @@ -+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -+/* Copyright (C) 2017-2018 ARM Limited */ -+ -+/* -+ * For use by other UAPI headers only. -+ * Do not make direct use of header or its definitions. -+ */ -+ -+#ifndef _UAPI__ASM_SVE_CONTEXT_H -+#define _UAPI__ASM_SVE_CONTEXT_H -+ -+#include -+ -+#define __SVE_VQ_BYTES 16 /* number of bytes per quadword */ -+ -+#define __SVE_VQ_MIN 1 -+#define __SVE_VQ_MAX 512 -+ -+#define __SVE_VL_MIN (__SVE_VQ_MIN * __SVE_VQ_BYTES) -+#define __SVE_VL_MAX (__SVE_VQ_MAX * __SVE_VQ_BYTES) -+ -+#define __SVE_NUM_ZREGS 32 -+#define __SVE_NUM_PREGS 16 -+ -+#define __sve_vl_valid(vl) \ -+ ((vl) % __SVE_VQ_BYTES == 0 && \ -+ (vl) >= __SVE_VL_MIN && \ -+ (vl) <= __SVE_VL_MAX) -+ -+#define __sve_vq_from_vl(vl) ((vl) / __SVE_VQ_BYTES) -+#define __sve_vl_from_vq(vq) ((vq) * __SVE_VQ_BYTES) -+ -+#define __SVE_ZREG_SIZE(vq) ((__u32)(vq) * __SVE_VQ_BYTES) -+#define __SVE_PREG_SIZE(vq) ((__u32)(vq) * (__SVE_VQ_BYTES / 8)) -+#define __SVE_FFR_SIZE(vq) __SVE_PREG_SIZE(vq) -+ -+#define __SVE_ZREGS_OFFSET 0 -+#define __SVE_ZREG_OFFSET(vq, n) \ -+ (__SVE_ZREGS_OFFSET + __SVE_ZREG_SIZE(vq) * (n)) -+#define __SVE_ZREGS_SIZE(vq) \ -+ (__SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - __SVE_ZREGS_OFFSET) -+ -+#define __SVE_PREGS_OFFSET(vq) \ -+ (__SVE_ZREGS_OFFSET + __SVE_ZREGS_SIZE(vq)) -+#define __SVE_PREG_OFFSET(vq, n) \ -+ (__SVE_PREGS_OFFSET(vq) + __SVE_PREG_SIZE(vq) * (n)) -+#define __SVE_PREGS_SIZE(vq) \ -+ (__SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - __SVE_PREGS_OFFSET(vq)) -+ -+#define __SVE_FFR_OFFSET(vq) \ -+ (__SVE_PREGS_OFFSET(vq) + __SVE_PREGS_SIZE(vq)) -+ -+#endif /* ! _UAPI__ASM_SVE_CONTEXT_H */ diff --git a/target/linux/generic/backport-4.19/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch b/target/linux/generic/backport-4.19/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch deleted file mode 100644 index 577f2d3df6..0000000000 --- a/target/linux/generic/backport-4.19/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch +++ /dev/null @@ -1,99 +0,0 @@ -From: Pablo Neira Ayuso -Date: Thu, 25 Jan 2018 12:58:55 +0100 -Subject: [PATCH] netfilter: nft_flow_offload: handle netdevice events from - nf_flow_table - -Move the code that deals with device events to the core. - -Signed-off-by: Pablo Neira Ayuso ---- - ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -535,5 +535,35 @@ void nf_flow_table_free(struct nf_flowta - } - EXPORT_SYMBOL_GPL(nf_flow_table_free); - -+static int nf_flow_table_netdev_event(struct notifier_block *this, -+ unsigned long event, void *ptr) -+{ -+ struct net_device *dev = netdev_notifier_info_to_dev(ptr); -+ -+ if (event != NETDEV_DOWN) -+ return NOTIFY_DONE; -+ -+ nf_flow_table_cleanup(dev_net(dev), dev); -+ -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block flow_offload_netdev_notifier = { -+ .notifier_call = nf_flow_table_netdev_event, -+}; -+ -+static int __init nf_flow_table_module_init(void) -+{ -+ return register_netdevice_notifier(&flow_offload_netdev_notifier); -+} -+ -+static void __exit nf_flow_table_module_exit(void) -+{ -+ unregister_netdevice_notifier(&flow_offload_netdev_notifier); -+} -+ -+module_init(nf_flow_table_module_init); -+module_exit(nf_flow_table_module_exit); -+ - MODULE_LICENSE("GPL"); - MODULE_AUTHOR("Pablo Neira Ayuso "); ---- a/net/netfilter/nft_flow_offload.c -+++ b/net/netfilter/nft_flow_offload.c -@@ -216,47 +216,14 @@ static struct nft_expr_type nft_flow_off - .owner = THIS_MODULE, - }; - --static int flow_offload_netdev_event(struct notifier_block *this, -- unsigned long event, void *ptr) --{ -- struct net_device *dev = netdev_notifier_info_to_dev(ptr); -- -- if (event != NETDEV_DOWN) -- return NOTIFY_DONE; -- -- nf_flow_table_cleanup(dev_net(dev), dev); -- -- return NOTIFY_DONE; --} -- --static struct notifier_block flow_offload_netdev_notifier = { -- .notifier_call = flow_offload_netdev_event, --}; -- - static int __init nft_flow_offload_module_init(void) - { -- int err; -- -- err = register_netdevice_notifier(&flow_offload_netdev_notifier); -- if (err) -- goto err; -- -- err = nft_register_expr(&nft_flow_offload_type); -- if (err < 0) -- goto register_expr; -- -- return 0; -- --register_expr: -- unregister_netdevice_notifier(&flow_offload_netdev_notifier); --err: -- return err; -+ return nft_register_expr(&nft_flow_offload_type); - } - - static void __exit nft_flow_offload_module_exit(void) - { - nft_unregister_expr(&nft_flow_offload_type); -- unregister_netdevice_notifier(&flow_offload_netdev_notifier); - } - - module_init(nft_flow_offload_module_init); diff --git a/target/linux/generic/backport-4.19/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch b/target/linux/generic/backport-4.19/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch deleted file mode 100644 index 7c10f6f189..0000000000 --- a/target/linux/generic/backport-4.19/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch +++ /dev/null @@ -1,112 +0,0 @@ -From: Felix Fietkau -Date: Wed, 13 Jun 2018 12:33:39 +0200 -Subject: [PATCH] netfilter: nf_flow_table: fix offloaded connection timeout - corner case - -The full teardown of offloaded flows is deferred to a gc work item, -however processing of packets by netfilter needs to happen immediately -after a teardown is requested, because the conntrack state needs to be -fixed up. - -Since the IPS_OFFLOAD_BIT is still kept until the teardown is complete, -the netfilter conntrack gc can accidentally bump the timeout of a -connection where offload was just stopped, causing a conntrack entry -leak. - -Fix this by moving the conntrack timeout bumping from conntrack core to -the nf_flow_offload and add a check to prevent bogus timeout bumps. - -Signed-off-by: Felix Fietkau ---- - ---- a/net/netfilter/nf_conntrack_core.c -+++ b/net/netfilter/nf_conntrack_core.c -@@ -1178,18 +1178,6 @@ static bool gc_worker_can_early_drop(con - return false; - } - --#define DAY (86400 * HZ) -- --/* Set an arbitrary timeout large enough not to ever expire, this save -- * us a check for the IPS_OFFLOAD_BIT from the packet path via -- * nf_ct_is_expired(). -- */ --static void nf_ct_offload_timeout(struct nf_conn *ct) --{ -- if (nf_ct_expires(ct) < DAY / 2) -- ct->timeout = nfct_time_stamp + DAY; --} -- - static void gc_worker(struct work_struct *work) - { - unsigned int min_interval = max(HZ / GC_MAX_BUCKETS_DIV, 1u); -@@ -1226,10 +1214,8 @@ static void gc_worker(struct work_struct - tmp = nf_ct_tuplehash_to_ctrack(h); - - scanned++; -- if (test_bit(IPS_OFFLOAD_BIT, &tmp->status)) { -- nf_ct_offload_timeout(tmp); -+ if (test_bit(IPS_OFFLOAD_BIT, &tmp->status)) - continue; -- } - - if (nf_ct_is_expired(tmp)) { - nf_ct_gc_expired(tmp); ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -183,10 +183,29 @@ static const struct rhashtable_params nf - .automatic_shrinking = true, - }; - -+#define DAY (86400 * HZ) -+ -+/* Set an arbitrary timeout large enough not to ever expire, this save -+ * us a check for the IPS_OFFLOAD_BIT from the packet path via -+ * nf_ct_is_expired(). -+ */ -+static void nf_ct_offload_timeout(struct flow_offload *flow) -+{ -+ struct flow_offload_entry *entry; -+ struct nf_conn *ct; -+ -+ entry = container_of(flow, struct flow_offload_entry, flow); -+ ct = entry->ct; -+ -+ if (nf_ct_expires(ct) < DAY / 2) -+ ct->timeout = nfct_time_stamp + DAY; -+} -+ - int flow_offload_add(struct nf_flowtable *flow_table, struct flow_offload *flow) - { - int err; - -+ nf_ct_offload_timeout(flow); - flow->timeout = (u32)jiffies + NF_FLOW_TIMEOUT; - - err = rhashtable_insert_fast(&flow_table->rhashtable, -@@ -317,6 +336,8 @@ static int nf_flow_offload_gc_step(struc - rhashtable_walk_start(&hti); - - while ((tuplehash = rhashtable_walk_next(&hti))) { -+ bool teardown; -+ - if (IS_ERR(tuplehash)) { - err = PTR_ERR(tuplehash); - if (err != -EAGAIN) -@@ -329,9 +350,13 @@ static int nf_flow_offload_gc_step(struc - - flow = container_of(tuplehash, struct flow_offload, tuplehash[0]); - -- if (nf_flow_has_expired(flow) || -- (flow->flags & (FLOW_OFFLOAD_DYING | -- FLOW_OFFLOAD_TEARDOWN))) -+ teardown = flow->flags & (FLOW_OFFLOAD_DYING | -+ FLOW_OFFLOAD_TEARDOWN); -+ -+ if (!teardown) -+ nf_ct_offload_timeout(flow); -+ -+ if (nf_flow_has_expired(flow) || teardown) - flow_offload_del(flow_table, flow); - } - out: diff --git a/target/linux/generic/backport-4.19/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch b/target/linux/generic/backport-4.19/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch deleted file mode 100644 index 2e25066499..0000000000 --- a/target/linux/generic/backport-4.19/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch +++ /dev/null @@ -1,24 +0,0 @@ -From: Felix Fietkau -Date: Thu, 14 Jun 2018 11:20:09 +0200 -Subject: [PATCH] netfilter: nf_flow_table: fix up ct state of flows after - timeout - -If a connection simply times out instead of being torn down, it is left -active with a long timeout. Fix this by calling flow_offload_fixup_ct_state -here as well. - -Signed-off-by: Felix Fietkau ---- - ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -243,6 +243,9 @@ static void flow_offload_del(struct nf_f - e = container_of(flow, struct flow_offload_entry, flow); - clear_bit(IPS_OFFLOAD_BIT, &e->ct->status); - -+ if (!(flow->flags & FLOW_OFFLOAD_TEARDOWN)) -+ flow_offload_fixup_ct_state(e->ct); -+ - flow_offload_free(flow); - } - diff --git a/target/linux/generic/backport-4.19/380-v5.3-net-sched-Introduce-act_ctinfo-action.patch b/target/linux/generic/backport-4.19/380-v5.3-net-sched-Introduce-act_ctinfo-action.patch deleted file mode 100644 index cf7687b451..0000000000 --- a/target/linux/generic/backport-4.19/380-v5.3-net-sched-Introduce-act_ctinfo-action.patch +++ /dev/null @@ -1,670 +0,0 @@ -From d129a72f465dab2d9fc8f1580c38600a8b808327 Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Wed, 13 Mar 2019 20:54:49 +0000 -Subject: [PATCH] net: sched: Backport Introduce act_ctinfo action -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -ctinfo is a new tc filter action module. It is designed to restore -information contained in firewall conntrack marks to other packet fields -and is typically used on packet ingress paths. At present it has two -independent sub-functions or operating modes, DSCP restoration mode & -skb mark restoration mode. - -The DSCP restore mode: - -This mode copies DSCP values that have been placed in the firewall -conntrack mark back into the IPv4/v6 diffserv fields of relevant -packets. - -The DSCP restoration is intended for use and has been found useful for -restoring ingress classifications based on egress classifications across -links that bleach or otherwise change DSCP, typically home ISP Internet -links. Restoring DSCP on ingress on the WAN link allows qdiscs such as -but by no means limited to CAKE to shape inbound packets according to -policies that are easier to set & mark on egress. - -Ingress classification is traditionally a challenging task since -iptables rules haven't yet run and tc filter/eBPF programs are pre-NAT -lookups, hence are unable to see internal IPv4 addresses as used on the -typical home masquerading gateway. Thus marking the connection in some -manner on egress for later restoration of classification on ingress is -easier to implement. - -Parameters related to DSCP restore mode: - -dscpmask - a 32 bit mask of 6 contiguous bits and indicate bits of the -conntrack mark field contain the DSCP value to be restored. - -statemask - a 32 bit mask of (usually) 1 bit length, outside the area -specified by dscpmask. This represents a conditional operation flag -whereby the DSCP is only restored if the flag is set. This is useful to -implement a 'one shot' iptables based classification where the -'complicated' iptables rules are only run once to classify the -connection on initial (egress) packet and subsequent packets are all -marked/restored with the same DSCP. A mask of zero disables the -conditional behaviour ie. the conntrack mark DSCP bits are always -restored to the ip diffserv field (assuming the conntrack entry is found -& the skb is an ipv4/ipv6 type) - -e.g. dscpmask 0xfc000000 statemask 0x01000000 - -|----0xFC----conntrack mark----000000---| -| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0| -| DSCP | unused | flag |unused | -|-----------------------0x01---000000---| - | | - | | - ---| Conditional flag - v only restore if set -|-ip diffserv-| -| 6 bits | -|-------------| - -The skb mark restore mode (cpmark): - -This mode copies the firewall conntrack mark to the skb's mark field. -It is completely the functional equivalent of the existing act_connmark -action with the additional feature of being able to apply a mask to the -restored value. - -Parameters related to skb mark restore mode: - -mask - a 32 bit mask applied to the firewall conntrack mark to mask out -bits unwanted for restoration. This can be useful where the conntrack -mark is being used for different purposes by different applications. If -not specified and by default the whole mark field is copied (i.e. -default mask of 0xffffffff) - -e.g. mask 0x00ffffff to mask out the top 8 bits being used by the -aforementioned DSCP restore mode. - -|----0x00----conntrack mark----ffffff---| -| Bits 31-24 | | -| DSCP & flag| some value here | -|---------------------------------------| - | - | - v -|------------skb mark-------------------| -| | | -| zeroed | | -|---------------------------------------| - -Overall parameters: - -zone - conntrack zone - -control - action related control (reclassify | pipe | drop | continue | -ok | goto chain ) - -Signed-off-by: Kevin Darbyshire-Bryant -Reviewed-by: Toke Høiland-Jørgensen -Acked-by: Cong Wang -Signed-off-by: David S. Miller - -Backport -Signed-off-by: Kevin Darbyshire-Bryant ---- - include/net/tc_act/tc_ctinfo.h | 33 ++ - include/uapi/linux/pkt_cls.h | 3 +- - include/uapi/linux/tc_act/tc_ctinfo.h | 29 ++ - net/sched/Kconfig | 17 + - net/sched/Makefile | 1 + - net/sched/act_ctinfo.c | 420 ++++++++++++++++++++++ - tools/testing/selftests/tc-testing/config | 1 + - 7 files changed, 503 insertions(+), 1 deletion(-) - create mode 100644 include/net/tc_act/tc_ctinfo.h - create mode 100644 include/uapi/linux/tc_act/tc_ctinfo.h - create mode 100644 net/sched/act_ctinfo.c - ---- /dev/null -+++ b/include/net/tc_act/tc_ctinfo.h -@@ -0,0 +1,33 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+#ifndef __NET_TC_CTINFO_H -+#define __NET_TC_CTINFO_H -+ -+#include -+ -+struct tcf_ctinfo_params { -+ struct rcu_head rcu; -+ struct net *net; -+ u32 dscpmask; -+ u32 dscpstatemask; -+ u32 cpmarkmask; -+ u16 zone; -+ u8 mode; -+ u8 dscpmaskshift; -+}; -+ -+struct tcf_ctinfo { -+ struct tc_action common; -+ struct tcf_ctinfo_params __rcu *params; -+ u64 stats_dscp_set; -+ u64 stats_dscp_error; -+ u64 stats_cpmark_set; -+}; -+ -+enum { -+ CTINFO_MODE_DSCP = BIT(0), -+ CTINFO_MODE_CPMARK = BIT(1) -+}; -+ -+#define to_ctinfo(a) ((struct tcf_ctinfo *)a) -+ -+#endif /* __NET_TC_CTINFO_H */ ---- a/include/uapi/linux/pkt_cls.h -+++ b/include/uapi/linux/pkt_cls.h -@@ -68,7 +68,8 @@ enum { - TCA_ID_UNSPEC=0, - TCA_ID_POLICE=1, - /* other actions go here */ -- __TCA_ID_MAX=255 -+ TCA_ID_CTINFO, -+ __TCA_ID_MAX = 255 - }; - - #define TCA_ID_MAX __TCA_ID_MAX ---- /dev/null -+++ b/include/uapi/linux/tc_act/tc_ctinfo.h -@@ -0,0 +1,29 @@ -+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -+#ifndef __UAPI_TC_CTINFO_H -+#define __UAPI_TC_CTINFO_H -+ -+#include -+#include -+ -+struct tc_ctinfo { -+ tc_gen; -+}; -+ -+enum { -+ TCA_CTINFO_UNSPEC, -+ TCA_CTINFO_PAD, -+ TCA_CTINFO_TM, -+ TCA_CTINFO_ACT, -+ TCA_CTINFO_ZONE, -+ TCA_CTINFO_PARMS_DSCP_MASK, -+ TCA_CTINFO_PARMS_DSCP_STATEMASK, -+ TCA_CTINFO_PARMS_CPMARK_MASK, -+ TCA_CTINFO_STATS_DSCP_SET, -+ TCA_CTINFO_STATS_DSCP_ERROR, -+ TCA_CTINFO_STATS_CPMARK_SET, -+ __TCA_CTINFO_MAX -+}; -+ -+#define TCA_CTINFO_MAX (__TCA_CTINFO_MAX - 1) -+ -+#endif ---- a/net/sched/Kconfig -+++ b/net/sched/Kconfig -@@ -866,6 +866,23 @@ config NET_ACT_CONNMARK - To compile this code as a module, choose M here: the - module will be called act_connmark. - -+config NET_ACT_CTINFO -+ tristate "Netfilter Connection Mark Actions" -+ depends on NET_CLS_ACT && NETFILTER && IP_NF_IPTABLES -+ depends on NF_CONNTRACK && NF_CONNTRACK_MARK -+ help -+ Say Y here to allow transfer of a connmark stored information. -+ Current actions transfer connmark stored DSCP into -+ ipv4/v6 diffserv and/or to transfer connmark to packet -+ mark. Both are useful for restoring egress based marks -+ back onto ingress connections for qdisc priority mapping -+ purposes. -+ -+ If unsure, say N. -+ -+ To compile this code as a module, choose M here: the -+ module will be called act_ctinfo. -+ - config NET_ACT_SKBMOD - tristate "skb data modification action" - depends on NET_CLS_ACT ---- a/net/sched/Makefile -+++ b/net/sched/Makefile -@@ -21,6 +21,7 @@ obj-$(CONFIG_NET_ACT_CSUM) += act_csum.o - obj-$(CONFIG_NET_ACT_VLAN) += act_vlan.o - obj-$(CONFIG_NET_ACT_BPF) += act_bpf.o - obj-$(CONFIG_NET_ACT_CONNMARK) += act_connmark.o -+obj-$(CONFIG_NET_ACT_CTINFO) += act_ctinfo.o - obj-$(CONFIG_NET_ACT_SKBMOD) += act_skbmod.o - obj-$(CONFIG_NET_ACT_IFE) += act_ife.o - obj-$(CONFIG_NET_IFE_SKBMARK) += act_meta_mark.o ---- /dev/null -+++ b/net/sched/act_ctinfo.c -@@ -0,0 +1,420 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* net/sched/act_ctinfo.c netfilter ctinfo connmark actions -+ * -+ * Copyright (c) 2019 Kevin Darbyshire-Bryant -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+static struct tc_action_ops act_ctinfo_ops; -+static unsigned int ctinfo_net_id; -+ -+static void tcf_ctinfo_dscp_set(struct nf_conn *ct, struct tcf_ctinfo *ca, -+ struct tcf_ctinfo_params *cp, -+ struct sk_buff *skb, int wlen, int proto) -+{ -+ u8 dscp, newdscp; -+ -+ newdscp = (((ct->mark & cp->dscpmask) >> cp->dscpmaskshift) << 2) & -+ ~INET_ECN_MASK; -+ -+ switch (proto) { -+ case NFPROTO_IPV4: -+ dscp = ipv4_get_dsfield(ip_hdr(skb)) & ~INET_ECN_MASK; -+ if (dscp != newdscp) { -+ if (likely(!skb_try_make_writable(skb, wlen))) { -+ ipv4_change_dsfield(ip_hdr(skb), -+ INET_ECN_MASK, -+ newdscp); -+ ca->stats_dscp_set++; -+ } else { -+ ca->stats_dscp_error++; -+ } -+ } -+ break; -+ case NFPROTO_IPV6: -+ dscp = ipv6_get_dsfield(ipv6_hdr(skb)) & ~INET_ECN_MASK; -+ if (dscp != newdscp) { -+ if (likely(!skb_try_make_writable(skb, wlen))) { -+ ipv6_change_dsfield(ipv6_hdr(skb), -+ INET_ECN_MASK, -+ newdscp); -+ ca->stats_dscp_set++; -+ } else { -+ ca->stats_dscp_error++; -+ } -+ } -+ break; -+ default: -+ break; -+ } -+} -+ -+static void tcf_ctinfo_cpmark_set(struct nf_conn *ct, struct tcf_ctinfo *ca, -+ struct tcf_ctinfo_params *cp, -+ struct sk_buff *skb) -+{ -+ ca->stats_cpmark_set++; -+ skb->mark = ct->mark & cp->cpmarkmask; -+} -+ -+static int tcf_ctinfo_act(struct sk_buff *skb, const struct tc_action *a, -+ struct tcf_result *res) -+{ -+ const struct nf_conntrack_tuple_hash *thash = NULL; -+ struct tcf_ctinfo *ca = to_ctinfo(a); -+ struct nf_conntrack_tuple tuple; -+ struct nf_conntrack_zone zone; -+ enum ip_conntrack_info ctinfo; -+ struct tcf_ctinfo_params *cp; -+ struct nf_conn *ct; -+ int proto, wlen; -+ int action; -+ -+ cp = rcu_dereference_bh(ca->params); -+ -+ tcf_lastuse_update(&ca->tcf_tm); -+ bstats_update(&ca->tcf_bstats, skb); -+ action = READ_ONCE(ca->tcf_action); -+ -+ wlen = skb_network_offset(skb); -+ if (skb_protocol(skb, true) == htons(ETH_P_IP)) { -+ wlen += sizeof(struct iphdr); -+ if (!pskb_may_pull(skb, wlen)) -+ goto out; -+ -+ proto = NFPROTO_IPV4; -+ } else if (skb_protocol(skb, true) == htons(ETH_P_IPV6)) { -+ wlen += sizeof(struct ipv6hdr); -+ if (!pskb_may_pull(skb, wlen)) -+ goto out; -+ -+ proto = NFPROTO_IPV6; -+ } else { -+ goto out; -+ } -+ -+ ct = nf_ct_get(skb, &ctinfo); -+ if (!ct) { /* look harder, usually ingress */ -+ if (!nf_ct_get_tuplepr(skb, skb_network_offset(skb), -+ proto, cp->net, &tuple)) -+ goto out; -+ zone.id = cp->zone; -+ zone.dir = NF_CT_DEFAULT_ZONE_DIR; -+ -+ thash = nf_conntrack_find_get(cp->net, &zone, &tuple); -+ if (!thash) -+ goto out; -+ -+ ct = nf_ct_tuplehash_to_ctrack(thash); -+ } -+ -+ if (cp->mode & CTINFO_MODE_DSCP) -+ if (!cp->dscpstatemask || (ct->mark & cp->dscpstatemask)) -+ tcf_ctinfo_dscp_set(ct, ca, cp, skb, wlen, proto); -+ -+ if (cp->mode & CTINFO_MODE_CPMARK) -+ tcf_ctinfo_cpmark_set(ct, ca, cp, skb); -+ -+ if (thash) -+ nf_ct_put(ct); -+out: -+ return action; -+} -+ -+static const struct nla_policy ctinfo_policy[TCA_CTINFO_MAX + 1] = { -+ [TCA_CTINFO_ACT] = { .len = sizeof(struct -+ tc_ctinfo) }, -+ [TCA_CTINFO_ZONE] = { .type = NLA_U16 }, -+ [TCA_CTINFO_PARMS_DSCP_MASK] = { .type = NLA_U32 }, -+ [TCA_CTINFO_PARMS_DSCP_STATEMASK] = { .type = NLA_U32 }, -+ [TCA_CTINFO_PARMS_CPMARK_MASK] = { .type = NLA_U32 }, -+}; -+ -+static int tcf_ctinfo_init(struct net *net, struct nlattr *nla, -+ struct nlattr *est, struct tc_action **a, -+ int ovr, int bind, bool rtnl_held, -+ struct netlink_ext_ack *extack) -+{ -+ struct tc_action_net *tn = net_generic(net, ctinfo_net_id); -+ u32 dscpmask = 0, dscpstatemask, index; -+ struct nlattr *tb[TCA_CTINFO_MAX + 1]; -+ struct tcf_ctinfo_params *cp_new; -+/* struct tcf_chain *goto_ch = NULL; */ -+ struct tc_ctinfo *actparm; -+ struct tcf_ctinfo *ci; -+ u8 dscpmaskshift; -+ int ret = 0, err; -+ -+ if (!nla) { -+ NL_SET_ERR_MSG_MOD(extack, "ctinfo requires attributes to be passed"); -+ return -EINVAL; -+ } -+ -+ err = nla_parse_nested(tb, TCA_CTINFO_MAX, nla, ctinfo_policy, extack); -+ if (err < 0) -+ return err; -+ -+ if (!tb[TCA_CTINFO_ACT]) { -+ NL_SET_ERR_MSG_MOD(extack, -+ "Missing required TCA_CTINFO_ACT attribute"); -+ return -EINVAL; -+ } -+ actparm = nla_data(tb[TCA_CTINFO_ACT]); -+ -+ /* do some basic validation here before dynamically allocating things */ -+ /* that we would otherwise have to clean up. */ -+ if (tb[TCA_CTINFO_PARMS_DSCP_MASK]) { -+ dscpmask = nla_get_u32(tb[TCA_CTINFO_PARMS_DSCP_MASK]); -+ /* need contiguous 6 bit mask */ -+ dscpmaskshift = dscpmask ? __ffs(dscpmask) : 0; -+ if ((~0 & (dscpmask >> dscpmaskshift)) != 0x3f) { -+ NL_SET_ERR_MSG_ATTR(extack, -+ tb[TCA_CTINFO_PARMS_DSCP_MASK], -+ "dscp mask must be 6 contiguous bits"); -+ return -EINVAL; -+ } -+ dscpstatemask = tb[TCA_CTINFO_PARMS_DSCP_STATEMASK] ? -+ nla_get_u32(tb[TCA_CTINFO_PARMS_DSCP_STATEMASK]) : 0; -+ /* mask & statemask must not overlap */ -+ if (dscpmask & dscpstatemask) { -+ NL_SET_ERR_MSG_ATTR(extack, -+ tb[TCA_CTINFO_PARMS_DSCP_STATEMASK], -+ "dscp statemask must not overlap dscp mask"); -+ return -EINVAL; -+ } -+ } -+ -+ /* done the validation:now to the actual action allocation */ -+ index = actparm->index; -+ err = tcf_idr_check_alloc(tn, &index, a, bind); -+ if (!err) { -+ ret = tcf_idr_create(tn, index, est, a, -+ &act_ctinfo_ops, bind, false); -+ if (ret) { -+ tcf_idr_cleanup(tn, index); -+ return ret; -+ } -+ ret = ACT_P_CREATED; -+ } else if (err > 0) { -+ if (bind) /* don't override defaults */ -+ return 0; -+ if (!ovr) { -+ tcf_idr_release(*a, bind); -+ return -EEXIST; -+ } -+ } else { -+ return err; -+ } -+ -+/* err = tcf_action_check_ctrlact(actparm->action, tp, &goto_ch, extack); -+ if (err < 0) -+ goto release_idr; -+ */ -+ -+ ci = to_ctinfo(*a); -+ -+ cp_new = kzalloc(sizeof(*cp_new), GFP_KERNEL); -+ if (unlikely(!cp_new)) { -+ err = -ENOMEM; -+ goto put_chain; -+ } -+ -+ cp_new->net = net; -+ cp_new->zone = tb[TCA_CTINFO_ZONE] ? -+ nla_get_u16(tb[TCA_CTINFO_ZONE]) : 0; -+ if (dscpmask) { -+ cp_new->dscpmask = dscpmask; -+ cp_new->dscpmaskshift = dscpmaskshift; -+ cp_new->dscpstatemask = dscpstatemask; -+ cp_new->mode |= CTINFO_MODE_DSCP; -+ } -+ -+ if (tb[TCA_CTINFO_PARMS_CPMARK_MASK]) { -+ cp_new->cpmarkmask = -+ nla_get_u32(tb[TCA_CTINFO_PARMS_CPMARK_MASK]); -+ cp_new->mode |= CTINFO_MODE_CPMARK; -+ } -+ -+ spin_lock_bh(&ci->tcf_lock); -+/* goto_ch = tcf_action_set_ctrlact(*a, actparm->action, goto_ch); */ -+ ci->tcf_action = actparm->action; -+ rcu_swap_protected(ci->params, cp_new, -+ lockdep_is_held(&ci->tcf_lock)); -+ spin_unlock_bh(&ci->tcf_lock); -+ -+/* if (goto_ch) -+ tcf_chain_put_by_act(goto_ch); */ -+ if (cp_new) -+ kfree_rcu(cp_new, rcu); -+ -+ if (ret == ACT_P_CREATED) -+ tcf_idr_insert(tn, *a); -+ -+ return ret; -+ -+put_chain: -+/* if (goto_ch) -+ tcf_chain_put_by_act(goto_ch); -+release_idr: */ -+ tcf_idr_release(*a, bind); -+ return err; -+} -+ -+static int tcf_ctinfo_dump(struct sk_buff *skb, struct tc_action *a, -+ int bind, int ref) -+{ -+ struct tcf_ctinfo *ci = to_ctinfo(a); -+ struct tc_ctinfo opt = { -+ .index = ci->tcf_index, -+ .refcnt = refcount_read(&ci->tcf_refcnt) - ref, -+ .bindcnt = atomic_read(&ci->tcf_bindcnt) - bind, -+ }; -+ unsigned char *b = skb_tail_pointer(skb); -+ struct tcf_ctinfo_params *cp; -+ struct tcf_t t; -+ -+ spin_lock_bh(&ci->tcf_lock); -+ cp = rcu_dereference_protected(ci->params, -+ lockdep_is_held(&ci->tcf_lock)); -+ -+ tcf_tm_dump(&t, &ci->tcf_tm); -+ if (nla_put_64bit(skb, TCA_CTINFO_TM, sizeof(t), &t, TCA_CTINFO_PAD)) -+ goto nla_put_failure; -+ -+ opt.action = ci->tcf_action; -+ if (nla_put(skb, TCA_CTINFO_ACT, sizeof(opt), &opt)) -+ goto nla_put_failure; -+ -+ if (nla_put_u16(skb, TCA_CTINFO_ZONE, cp->zone)) -+ goto nla_put_failure; -+ -+ if (cp->mode & CTINFO_MODE_DSCP) { -+ if (nla_put_u32(skb, TCA_CTINFO_PARMS_DSCP_MASK, -+ cp->dscpmask)) -+ goto nla_put_failure; -+ if (nla_put_u32(skb, TCA_CTINFO_PARMS_DSCP_STATEMASK, -+ cp->dscpstatemask)) -+ goto nla_put_failure; -+ } -+ -+ if (cp->mode & CTINFO_MODE_CPMARK) { -+ if (nla_put_u32(skb, TCA_CTINFO_PARMS_CPMARK_MASK, -+ cp->cpmarkmask)) -+ goto nla_put_failure; -+ } -+ -+ if (nla_put_u64_64bit(skb, TCA_CTINFO_STATS_DSCP_SET, -+ ci->stats_dscp_set, TCA_CTINFO_PAD)) -+ goto nla_put_failure; -+ -+ if (nla_put_u64_64bit(skb, TCA_CTINFO_STATS_DSCP_ERROR, -+ ci->stats_dscp_error, TCA_CTINFO_PAD)) -+ goto nla_put_failure; -+ -+ if (nla_put_u64_64bit(skb, TCA_CTINFO_STATS_CPMARK_SET, -+ ci->stats_cpmark_set, TCA_CTINFO_PAD)) -+ goto nla_put_failure; -+ -+ spin_unlock_bh(&ci->tcf_lock); -+ return skb->len; -+ -+nla_put_failure: -+ spin_unlock_bh(&ci->tcf_lock); -+ nlmsg_trim(skb, b); -+ return -1; -+} -+ -+static int tcf_ctinfo_walker(struct net *net, struct sk_buff *skb, -+ struct netlink_callback *cb, int type, -+ const struct tc_action_ops *ops, -+ struct netlink_ext_ack *extack) -+{ -+ struct tc_action_net *tn = net_generic(net, ctinfo_net_id); -+ -+ return tcf_generic_walker(tn, skb, cb, type, ops, extack); -+} -+ -+static int tcf_ctinfo_search(struct net *net, struct tc_action **a, u32 index, -+ struct netlink_ext_ack *extack) -+{ -+ struct tc_action_net *tn = net_generic(net, ctinfo_net_id); -+ -+ return tcf_idr_search(tn, a, index); -+} -+ -+static void tcf_ctinfo_cleanup(struct tc_action *a) -+{ -+ struct tcf_ctinfo *ci = to_ctinfo(a); -+ struct tcf_ctinfo_params *cp; -+ -+ cp = rcu_dereference_protected(ci->params, 1); -+ if (cp) -+ kfree_rcu(cp, rcu); -+} -+ -+static struct tc_action_ops act_ctinfo_ops = { -+ .kind = "ctinfo", -+ .type = TCA_ID_CTINFO, -+ .owner = THIS_MODULE, -+ .act = tcf_ctinfo_act, -+ .dump = tcf_ctinfo_dump, -+ .init = tcf_ctinfo_init, -+ .walk = tcf_ctinfo_walker, -+ .cleanup= tcf_ctinfo_cleanup, -+ .lookup = tcf_ctinfo_search, -+ .size = sizeof(struct tcf_ctinfo), -+}; -+ -+static __net_init int ctinfo_init_net(struct net *net) -+{ -+ struct tc_action_net *tn = net_generic(net, ctinfo_net_id); -+ -+ return tc_action_net_init(net, tn, &act_ctinfo_ops); -+} -+ -+static void __net_exit ctinfo_exit_net(struct list_head *net_list) -+{ -+ tc_action_net_exit(net_list, ctinfo_net_id); -+} -+ -+static struct pernet_operations ctinfo_net_ops = { -+ .init = ctinfo_init_net, -+ .exit_batch = ctinfo_exit_net, -+ .id = &ctinfo_net_id, -+ .size = sizeof(struct tc_action_net), -+}; -+ -+static int __init ctinfo_init_module(void) -+{ -+ return tcf_register_action(&act_ctinfo_ops, &ctinfo_net_ops); -+} -+ -+static void __exit ctinfo_cleanup_module(void) -+{ -+ tcf_unregister_action(&act_ctinfo_ops, &ctinfo_net_ops); -+} -+ -+module_init(ctinfo_init_module); -+module_exit(ctinfo_cleanup_module); -+MODULE_AUTHOR("Kevin Darbyshire-Bryant "); -+MODULE_DESCRIPTION("Connection tracking mark actions"); -+MODULE_LICENSE("GPL"); ---- a/tools/testing/selftests/tc-testing/config -+++ b/tools/testing/selftests/tc-testing/config -@@ -38,6 +38,7 @@ CONFIG_NET_ACT_CSUM=m - CONFIG_NET_ACT_VLAN=m - CONFIG_NET_ACT_BPF=m - CONFIG_NET_ACT_CONNMARK=m -+CONFIG_NET_ACT_CONNCTINFO=m - CONFIG_NET_ACT_SKBMOD=m - CONFIG_NET_ACT_IFE=m - CONFIG_NET_ACT_TUNNEL_KEY=m diff --git a/target/linux/generic/backport-4.19/390-v5.1-sch_cake-Make-the-dual-modes-fairer.patch b/target/linux/generic/backport-4.19/390-v5.1-sch_cake-Make-the-dual-modes-fairer.patch deleted file mode 100644 index 0454565747..0000000000 --- a/target/linux/generic/backport-4.19/390-v5.1-sch_cake-Make-the-dual-modes-fairer.patch +++ /dev/null @@ -1,217 +0,0 @@ -From 712639929912c5eefb09facccb48d55b3f72c9f8 Mon Sep 17 00:00:00 2001 -From: George Amanakis -Date: Fri, 1 Mar 2019 16:04:05 +0100 -Subject: [PATCH] sch_cake: Make the dual modes fairer -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -CAKE host fairness does not work well with TCP flows in dual-srchost and -dual-dsthost setup. The reason is that ACKs generated by TCP flows are -classified as sparse flows, and affect flow isolation from other hosts. Fix -this by calculating host_load based only on the bulk flows a host -generates. In a hash collision the host_bulk_flow_count values must be -decremented on the old hosts and incremented on the new ones *if* the queue -is in the bulk set. - -Reported-by: Pete Heist -Signed-off-by: George Amanakis -Signed-off-by: Toke Høiland-Jørgensen -Signed-off-by: David S. Miller -Signed-off-by: Kevin Darbyshire-Bryant ---- - net/sched/sch_cake.c | 92 ++++++++++++++++++++++++++++++-------------- - 1 file changed, 63 insertions(+), 29 deletions(-) - ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -138,8 +138,8 @@ struct cake_flow { - struct cake_host { - u32 srchost_tag; - u32 dsthost_tag; -- u16 srchost_refcnt; -- u16 dsthost_refcnt; -+ u16 srchost_bulk_flow_count; -+ u16 dsthost_bulk_flow_count; - }; - - struct cake_heap_entry { -@@ -746,8 +746,10 @@ skip_hash: - * queue, accept the collision, update the host tags. - */ - q->way_collisions++; -- q->hosts[q->flows[reduced_hash].srchost].srchost_refcnt--; -- q->hosts[q->flows[reduced_hash].dsthost].dsthost_refcnt--; -+ if (q->flows[outer_hash + k].set == CAKE_SET_BULK) { -+ q->hosts[q->flows[reduced_hash].srchost].srchost_bulk_flow_count--; -+ q->hosts[q->flows[reduced_hash].dsthost].dsthost_bulk_flow_count--; -+ } - allocate_src = cake_dsrc(flow_mode); - allocate_dst = cake_ddst(flow_mode); - found: -@@ -767,13 +769,14 @@ found: - } - for (i = 0; i < CAKE_SET_WAYS; - i++, k = (k + 1) % CAKE_SET_WAYS) { -- if (!q->hosts[outer_hash + k].srchost_refcnt) -+ if (!q->hosts[outer_hash + k].srchost_bulk_flow_count) - break; - } - q->hosts[outer_hash + k].srchost_tag = srchost_hash; - found_src: - srchost_idx = outer_hash + k; -- q->hosts[srchost_idx].srchost_refcnt++; -+ if (q->flows[reduced_hash].set == CAKE_SET_BULK) -+ q->hosts[srchost_idx].srchost_bulk_flow_count++; - q->flows[reduced_hash].srchost = srchost_idx; - } - -@@ -789,13 +792,14 @@ found_src: - } - for (i = 0; i < CAKE_SET_WAYS; - i++, k = (k + 1) % CAKE_SET_WAYS) { -- if (!q->hosts[outer_hash + k].dsthost_refcnt) -+ if (!q->hosts[outer_hash + k].dsthost_bulk_flow_count) - break; - } - q->hosts[outer_hash + k].dsthost_tag = dsthost_hash; - found_dst: - dsthost_idx = outer_hash + k; -- q->hosts[dsthost_idx].dsthost_refcnt++; -+ if (q->flows[reduced_hash].set == CAKE_SET_BULK) -+ q->hosts[dsthost_idx].dsthost_bulk_flow_count++; - q->flows[reduced_hash].dsthost = dsthost_idx; - } - } -@@ -1817,20 +1821,30 @@ static s32 cake_enqueue(struct sk_buff * - b->sparse_flow_count++; - - if (cake_dsrc(q->flow_mode)) -- host_load = max(host_load, srchost->srchost_refcnt); -+ host_load = max(host_load, srchost->srchost_bulk_flow_count); - - if (cake_ddst(q->flow_mode)) -- host_load = max(host_load, dsthost->dsthost_refcnt); -+ host_load = max(host_load, dsthost->dsthost_bulk_flow_count); - - flow->deficit = (b->flow_quantum * - quantum_div[host_load]) >> 16; - } else if (flow->set == CAKE_SET_SPARSE_WAIT) { -+ struct cake_host *srchost = &b->hosts[flow->srchost]; -+ struct cake_host *dsthost = &b->hosts[flow->dsthost]; -+ - /* this flow was empty, accounted as a sparse flow, but actually - * in the bulk rotation. - */ - flow->set = CAKE_SET_BULK; - b->sparse_flow_count--; - b->bulk_flow_count++; -+ -+ if (cake_dsrc(q->flow_mode)) -+ srchost->srchost_bulk_flow_count++; -+ -+ if (cake_ddst(q->flow_mode)) -+ dsthost->dsthost_bulk_flow_count++; -+ - } - - if (q->buffer_used > q->buffer_max_used) -@@ -1998,23 +2012,8 @@ retry: - dsthost = &b->hosts[flow->dsthost]; - host_load = 1; - -- if (cake_dsrc(q->flow_mode)) -- host_load = max(host_load, srchost->srchost_refcnt); -- -- if (cake_ddst(q->flow_mode)) -- host_load = max(host_load, dsthost->dsthost_refcnt); -- -- WARN_ON(host_load > CAKE_QUEUES); -- - /* flow isolation (DRR++) */ - if (flow->deficit <= 0) { -- /* The shifted prandom_u32() is a way to apply dithering to -- * avoid accumulating roundoff errors -- */ -- flow->deficit += (b->flow_quantum * quantum_div[host_load] + -- (prandom_u32() >> 16)) >> 16; -- list_move_tail(&flow->flowchain, &b->old_flows); -- - /* Keep all flows with deficits out of the sparse and decaying - * rotations. No non-empty flow can go into the decaying - * rotation, so they can't get deficits -@@ -2023,6 +2022,13 @@ retry: - if (flow->head) { - b->sparse_flow_count--; - b->bulk_flow_count++; -+ -+ if (cake_dsrc(q->flow_mode)) -+ srchost->srchost_bulk_flow_count++; -+ -+ if (cake_ddst(q->flow_mode)) -+ dsthost->dsthost_bulk_flow_count++; -+ - flow->set = CAKE_SET_BULK; - } else { - /* we've moved it to the bulk rotation for -@@ -2032,6 +2038,22 @@ retry: - flow->set = CAKE_SET_SPARSE_WAIT; - } - } -+ -+ if (cake_dsrc(q->flow_mode)) -+ host_load = max(host_load, srchost->srchost_bulk_flow_count); -+ -+ if (cake_ddst(q->flow_mode)) -+ host_load = max(host_load, dsthost->dsthost_bulk_flow_count); -+ -+ WARN_ON(host_load > CAKE_QUEUES); -+ -+ /* The shifted prandom_u32() is a way to apply dithering to -+ * avoid accumulating roundoff errors -+ */ -+ flow->deficit += (b->flow_quantum * quantum_div[host_load] + -+ (prandom_u32() >> 16)) >> 16; -+ list_move_tail(&flow->flowchain, &b->old_flows); -+ - goto retry; - } - -@@ -2052,6 +2074,13 @@ retry: - &b->decaying_flows); - if (flow->set == CAKE_SET_BULK) { - b->bulk_flow_count--; -+ -+ if (cake_dsrc(q->flow_mode)) -+ srchost->srchost_bulk_flow_count--; -+ -+ if (cake_ddst(q->flow_mode)) -+ dsthost->dsthost_bulk_flow_count--; -+ - b->decaying_flow_count++; - } else if (flow->set == CAKE_SET_SPARSE || - flow->set == CAKE_SET_SPARSE_WAIT) { -@@ -2065,14 +2094,19 @@ retry: - if (flow->set == CAKE_SET_SPARSE || - flow->set == CAKE_SET_SPARSE_WAIT) - b->sparse_flow_count--; -- else if (flow->set == CAKE_SET_BULK) -+ else if (flow->set == CAKE_SET_BULK) { - b->bulk_flow_count--; -- else -+ -+ if (cake_dsrc(q->flow_mode)) -+ srchost->srchost_bulk_flow_count--; -+ -+ if (cake_ddst(q->flow_mode)) -+ dsthost->dsthost_bulk_flow_count--; -+ -+ } else - b->decaying_flow_count--; - - flow->set = CAKE_SET_NONE; -- srchost->srchost_refcnt--; -- dsthost->dsthost_refcnt--; - } - goto begin; - } diff --git a/target/linux/generic/backport-4.19/391-v5.1-sch_cake-Permit-use-of-connmarks-as-tin-classifiers.patch b/target/linux/generic/backport-4.19/391-v5.1-sch_cake-Permit-use-of-connmarks-as-tin-classifiers.patch deleted file mode 100644 index 638a2b4529..0000000000 --- a/target/linux/generic/backport-4.19/391-v5.1-sch_cake-Permit-use-of-connmarks-as-tin-classifiers.patch +++ /dev/null @@ -1,118 +0,0 @@ -From 0b5c7efdfc6e389ec6840579fe90bdb6f42b08dc Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Fri, 1 Mar 2019 16:04:05 +0100 -Subject: [PATCH] sch_cake: Permit use of connmarks as tin classifiers -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add flag 'FWMARK' to enable use of firewall connmarks as tin selector. -The connmark (skbuff->mark) needs to be in the range 1->tin_cnt ie. -for diffserv3 the mark needs to be 1->3. - -Background - -Typically CAKE uses DSCP as the basis for tin selection. DSCP values -are relatively easily changed as part of the egress path, usually with -iptables & the mangle table, ingress is more challenging. CAKE is often -used on the WAN interface of a residential gateway where passthrough of -DSCP from the ISP is either missing or set to unhelpful values thus use -of ingress DSCP values for tin selection isn't helpful in that -environment. - -An approach to solving the ingress tin selection problem is to use -CAKE's understanding of tc filters. Naive tc filters could match on -source/destination port numbers and force tin selection that way, but -multiple filters don't scale particularly well as each filter must be -traversed whether it matches or not. e.g. a simple example to map 3 -firewall marks to tins: - -MAJOR=$( tc qdisc show dev $DEV | head -1 | awk '{print $3}' ) -tc filter add dev $DEV parent $MAJOR protocol all handle 0x01 fw action skbedit priority ${MAJOR}1 -tc filter add dev $DEV parent $MAJOR protocol all handle 0x02 fw action skbedit priority ${MAJOR}2 -tc filter add dev $DEV parent $MAJOR protocol all handle 0x03 fw action skbedit priority ${MAJOR}3 - -Another option is to use eBPF cls_act with tc filters e.g. - -MAJOR=$( tc qdisc show dev $DEV | head -1 | awk '{print $3}' ) -tc filter add dev $DEV parent $MAJOR bpf da obj my-bpf-fwmark-to-class.o - -This has the disadvantages of a) needing someone to write & maintain -the bpf program, b) a bpf toolchain to compile it and c) needing to -hardcode the major number in the bpf program so it matches the cake -instance (or forcing the cake instance to a particular major number) -since the major number cannot be passed to the bpf program via tc -command line. - -As already hinted at by the previous examples, it would be helpful -to associate tins with something that survives the Internet path and -ideally allows tin selection on both egress and ingress. Netfilter's -conntrack permits setting an identifying mark on a connection which -can also be restored to an ingress packet with tc action connmark e.g. - -tc filter add dev eth0 parent ffff: protocol all prio 10 u32 \ - match u32 0 0 flowid 1:1 action connmark action mirred egress redirect dev ifb1 - -Since tc's connmark action has restored any connmark into skb->mark, -any of the previous solutions are based upon it and in one form or -another copy that mark to the skb->priority field where again CAKE -picks this up. - -This change cuts out at least one of the (less intuitive & -non-scalable) middlemen and permit direct access to skb->mark. - -Signed-off-by: Kevin Darbyshire-Bryant -Signed-off-by: Toke Høiland-Jørgensen -Signed-off-by: David S. Miller ---- - include/uapi/linux/pkt_sched.h | 1 + - net/sched/sch_cake.c | 34 +++++++++++++++++++++++++++------- - 2 files changed, 28 insertions(+), 7 deletions(-) - ---- a/include/uapi/linux/pkt_sched.h -+++ b/include/uapi/linux/pkt_sched.h -@@ -991,6 +991,7 @@ enum { - TCA_CAKE_INGRESS, - TCA_CAKE_ACK_FILTER, - TCA_CAKE_SPLIT_GSO, -+ TCA_CAKE_FWMARK, - __TCA_CAKE_MAX - }; - #define TCA_CAKE_MAX (__TCA_CAKE_MAX - 1) ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -258,7 +258,8 @@ enum { - CAKE_FLAG_AUTORATE_INGRESS = BIT(1), - CAKE_FLAG_INGRESS = BIT(2), - CAKE_FLAG_WASH = BIT(3), -- CAKE_FLAG_SPLIT_GSO = BIT(4) -+ CAKE_FLAG_SPLIT_GSO = BIT(4), -+ CAKE_FLAG_FWMARK = BIT(5) - }; - - /* COBALT operates the Codel and BLUE algorithms in parallel, in order to -@@ -2647,6 +2648,13 @@ static int cake_change(struct Qdisc *sch - q->rate_flags &= ~CAKE_FLAG_SPLIT_GSO; - } - -+ if (tb[TCA_CAKE_FWMARK]) { -+ if (!!nla_get_u32(tb[TCA_CAKE_FWMARK])) -+ q->rate_flags |= CAKE_FLAG_FWMARK; -+ else -+ q->rate_flags &= ~CAKE_FLAG_FWMARK; -+ } -+ - if (q->tins) { - sch_tree_lock(sch); - cake_reconfigure(sch); -@@ -2806,6 +2814,10 @@ static int cake_dump(struct Qdisc *sch, - !!(q->rate_flags & CAKE_FLAG_SPLIT_GSO))) - goto nla_put_failure; - -+ if (nla_put_u32(skb, TCA_CAKE_FWMARK, -+ !!(q->rate_flags & CAKE_FLAG_FWMARK))) -+ goto nla_put_failure; -+ - return nla_nest_end(skb, opts); - - nla_put_failure: diff --git a/target/linux/generic/backport-4.19/392-v5.1-sch_cake-Interpret-fwmark-parameter-as-a-bitmask.patch b/target/linux/generic/backport-4.19/392-v5.1-sch_cake-Interpret-fwmark-parameter-as-a-bitmask.patch deleted file mode 100644 index 6ba0897b34..0000000000 --- a/target/linux/generic/backport-4.19/392-v5.1-sch_cake-Interpret-fwmark-parameter-as-a-bitmask.patch +++ /dev/null @@ -1,102 +0,0 @@ -From eab2fc822af38f31fd5f4e731b5d10b94904d919 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Toke=20H=C3=B8iland-J=C3=B8rgensen?= -Date: Thu, 14 Mar 2019 23:08:22 +0100 -Subject: [PATCH] sch_cake: Interpret fwmark parameter as a bitmask -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -We initially interpreted the fwmark parameter as a flag that simply turned -on the feature, using the whole skb->mark field as the index into the CAKE -tin_order array. However, it is quite common for different applications to -use different parts of the mask field for their own purposes, each using a -different mask. - -Support this use of subsets of the mark by interpreting the TCA_CAKE_FWMARK -parameter as a bitmask to apply to the fwmark field when reading it. The -result will be right-shifted by the number of unset lower bits of the mask -before looking up the tin. - -In the original commit message we also failed to credit Felix Resch with -originally suggesting the fwmark feature back in 2017; so the Suggested-By -in this commit covers the whole fwmark feature. - -Fixes: 0b5c7efdfc6e ("sch_cake: Permit use of connmarks as tin classifiers") -Suggested-by: Felix Resch -Signed-off-by: Toke Høiland-Jørgensen -Signed-off-by: David S. Miller -Signed-off-by: Kevin Darbyshire-Bryant ---- - net/sched/sch_cake.c | 25 ++++++++++++------------- - 1 file changed, 12 insertions(+), 13 deletions(-) - ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -211,6 +211,9 @@ struct cake_sched_data { - u8 ack_filter; - u8 atm_mode; - -+ u32 fwmark_mask; -+ u16 fwmark_shft; -+ - /* time_next = time_this + ((len * rate_ns) >> rate_shft) */ - u16 rate_shft; - ktime_t time_next_packet; -@@ -258,8 +261,7 @@ enum { - CAKE_FLAG_AUTORATE_INGRESS = BIT(1), - CAKE_FLAG_INGRESS = BIT(2), - CAKE_FLAG_WASH = BIT(3), -- CAKE_FLAG_SPLIT_GSO = BIT(4), -- CAKE_FLAG_FWMARK = BIT(5) -+ CAKE_FLAG_SPLIT_GSO = BIT(4) - }; - - /* COBALT operates the Codel and BLUE algorithms in parallel, in order to -@@ -1573,7 +1575,7 @@ static struct cake_tin_data *cake_select - struct sk_buff *skb) - { - struct cake_sched_data *q = qdisc_priv(sch); -- u32 tin; -+ u32 tin, mark; - bool wash; - u8 dscp; - -@@ -1584,6 +1586,7 @@ static struct cake_tin_data *cake_select - wash = !!(q->rate_flags & CAKE_FLAG_WASH); - if (wash) - dscp = cake_handle_diffserv(skb, wash); -+ mark = (skb->mark & q->fwmark_mask) >> q->fwmark_shft; - - if (q->tin_mode == CAKE_DIFFSERV_BESTEFFORT) - tin = 0; -@@ -2202,6 +2205,7 @@ static const struct nla_policy cake_poli - [TCA_CAKE_MPU] = { .type = NLA_U32 }, - [TCA_CAKE_INGRESS] = { .type = NLA_U32 }, - [TCA_CAKE_ACK_FILTER] = { .type = NLA_U32 }, -+ [TCA_CAKE_FWMARK] = { .type = NLA_U32 }, - }; - - static void cake_set_rate(struct cake_tin_data *b, u64 rate, u32 mtu, -@@ -2649,10 +2653,8 @@ static int cake_change(struct Qdisc *sch - } - - if (tb[TCA_CAKE_FWMARK]) { -- if (!!nla_get_u32(tb[TCA_CAKE_FWMARK])) -- q->rate_flags |= CAKE_FLAG_FWMARK; -- else -- q->rate_flags &= ~CAKE_FLAG_FWMARK; -+ q->fwmark_mask = nla_get_u32(tb[TCA_CAKE_FWMARK]); -+ q->fwmark_shft = q->fwmark_mask ? __ffs(q->fwmark_mask) : 0; - } - - if (q->tins) { -@@ -2814,8 +2816,7 @@ static int cake_dump(struct Qdisc *sch, - !!(q->rate_flags & CAKE_FLAG_SPLIT_GSO))) - goto nla_put_failure; - -- if (nla_put_u32(skb, TCA_CAKE_FWMARK, -- !!(q->rate_flags & CAKE_FLAG_FWMARK))) -+ if (nla_put_u32(skb, TCA_CAKE_FWMARK, q->fwmark_mask)) - goto nla_put_failure; - - return nla_nest_end(skb, opts); diff --git a/target/linux/generic/backport-4.19/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch b/target/linux/generic/backport-4.19/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch deleted file mode 100644 index 023844f5e6..0000000000 --- a/target/linux/generic/backport-4.19/393-v5.5-sch_cake-drop-unused-variable-tin_quantum_prio.patch +++ /dev/null @@ -1,158 +0,0 @@ -From d7e1738f0a0b0573ac93cf570ba3df9dee61b68e Mon Sep 17 00:00:00 2001 -From: Kevin 'ldir' Darbyshire-Bryant -Date: Wed, 18 Dec 2019 14:05:13 +0000 -Subject: [PATCH 2/2] sch_cake: drop unused variable tin_quantum_prio -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Turns out tin_quantum_prio isn't used anymore and is a leftover from a -previous implementation of diffserv tins. Since the variable isn't used -in any calculations it can be eliminated. - -Drop variable and places where it was set. Rename remaining variable -and consolidate naming of intermediate variables that set it. - -Signed-off-by: Kevin Darbyshire-Bryant -Acked-by: Toke Høiland-Jørgensen -Signed-off-by: David S. Miller ---- - net/sched/sch_cake.c | 59 ++++++++++++++------------------------------ - 1 file changed, 18 insertions(+), 41 deletions(-) - ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -173,8 +173,7 @@ struct cake_tin_data { - u64 tin_rate_bps; - u16 tin_rate_shft; - -- u16 tin_quantum_prio; -- u16 tin_quantum_band; -+ u16 tin_quantum; - s32 tin_deficit; - u32 tin_backlog; - u32 tin_dropped; -@@ -1940,7 +1939,7 @@ begin: - while (b->tin_deficit < 0 || - !(b->sparse_flow_count + b->bulk_flow_count)) { - if (b->tin_deficit <= 0) -- b->tin_deficit += b->tin_quantum_band; -+ b->tin_deficit += b->tin_quantum; - if (b->sparse_flow_count + b->bulk_flow_count) - empty = false; - -@@ -2261,8 +2260,7 @@ static int cake_config_besteffort(struct - - cake_set_rate(b, rate, mtu, - us_to_ns(q->target), us_to_ns(q->interval)); -- b->tin_quantum_band = 65535; -- b->tin_quantum_prio = 65535; -+ b->tin_quantum = 65535; - - return 0; - } -@@ -2273,8 +2271,7 @@ static int cake_config_precedence(struct - struct cake_sched_data *q = qdisc_priv(sch); - u32 mtu = psched_mtu(qdisc_dev(sch)); - u64 rate = q->rate_bps; -- u32 quantum1 = 256; -- u32 quantum2 = 256; -+ u32 quantum = 256; - u32 i; - - q->tin_cnt = 8; -@@ -2287,18 +2284,14 @@ static int cake_config_precedence(struct - cake_set_rate(b, rate, mtu, us_to_ns(q->target), - us_to_ns(q->interval)); - -- b->tin_quantum_prio = max_t(u16, 1U, quantum1); -- b->tin_quantum_band = max_t(u16, 1U, quantum2); -+ b->tin_quantum = max_t(u16, 1U, quantum); - - /* calculate next class's parameters */ - rate *= 7; - rate >>= 3; - -- quantum1 *= 3; -- quantum1 >>= 1; -- -- quantum2 *= 7; -- quantum2 >>= 3; -+ quantum *= 7; -+ quantum >>= 3; - } - - return 0; -@@ -2367,8 +2360,7 @@ static int cake_config_diffserv8(struct - struct cake_sched_data *q = qdisc_priv(sch); - u32 mtu = psched_mtu(qdisc_dev(sch)); - u64 rate = q->rate_bps; -- u32 quantum1 = 256; -- u32 quantum2 = 256; -+ u32 quantum = 256; - u32 i; - - q->tin_cnt = 8; -@@ -2384,18 +2376,14 @@ static int cake_config_diffserv8(struct - cake_set_rate(b, rate, mtu, us_to_ns(q->target), - us_to_ns(q->interval)); - -- b->tin_quantum_prio = max_t(u16, 1U, quantum1); -- b->tin_quantum_band = max_t(u16, 1U, quantum2); -+ b->tin_quantum = max_t(u16, 1U, quantum); - - /* calculate next class's parameters */ - rate *= 7; - rate >>= 3; - -- quantum1 *= 3; -- quantum1 >>= 1; -- -- quantum2 *= 7; -- quantum2 >>= 3; -+ quantum *= 7; -+ quantum >>= 3; - } - - return 0; -@@ -2434,17 +2422,11 @@ static int cake_config_diffserv4(struct - cake_set_rate(&q->tins[3], rate >> 2, mtu, - us_to_ns(q->target), us_to_ns(q->interval)); - -- /* priority weights */ -- q->tins[0].tin_quantum_prio = quantum; -- q->tins[1].tin_quantum_prio = quantum >> 4; -- q->tins[2].tin_quantum_prio = quantum << 2; -- q->tins[3].tin_quantum_prio = quantum << 4; -- - /* bandwidth-sharing weights */ -- q->tins[0].tin_quantum_band = quantum; -- q->tins[1].tin_quantum_band = quantum >> 4; -- q->tins[2].tin_quantum_band = quantum >> 1; -- q->tins[3].tin_quantum_band = quantum >> 2; -+ q->tins[0].tin_quantum = quantum; -+ q->tins[1].tin_quantum = quantum >> 4; -+ q->tins[2].tin_quantum = quantum >> 1; -+ q->tins[3].tin_quantum = quantum >> 2; - - return 0; - } -@@ -2475,15 +2457,10 @@ static int cake_config_diffserv3(struct - cake_set_rate(&q->tins[2], rate >> 2, mtu, - us_to_ns(q->target), us_to_ns(q->interval)); - -- /* priority weights */ -- q->tins[0].tin_quantum_prio = quantum; -- q->tins[1].tin_quantum_prio = quantum >> 4; -- q->tins[2].tin_quantum_prio = quantum << 4; -- - /* bandwidth-sharing weights */ -- q->tins[0].tin_quantum_band = quantum; -- q->tins[1].tin_quantum_band = quantum >> 4; -- q->tins[2].tin_quantum_band = quantum >> 2; -+ q->tins[0].tin_quantum = quantum; -+ q->tins[1].tin_quantum = quantum >> 4; -+ q->tins[2].tin_quantum = quantum >> 2; - - return 0; - } diff --git a/target/linux/generic/backport-4.19/394-v5.4-sch_cake-Add-missing-NLA-policy-entry-TCA_CAKE_SPLIT.patch b/target/linux/generic/backport-4.19/394-v5.4-sch_cake-Add-missing-NLA-policy-entry-TCA_CAKE_SPLIT.patch deleted file mode 100644 index bc063dccca..0000000000 --- a/target/linux/generic/backport-4.19/394-v5.4-sch_cake-Add-missing-NLA-policy-entry-TCA_CAKE_SPLIT.patch +++ /dev/null @@ -1,30 +0,0 @@ -From b3c424eb6a1a3c485de64619418a471dee6ce849 Mon Sep 17 00:00:00 2001 -From: Victorien Molle -Date: Mon, 2 Dec 2019 15:11:38 +0100 -Subject: [PATCH] sch_cake: Add missing NLA policy entry TCA_CAKE_SPLIT_GSO -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This field has never been checked since introduction in mainline kernel - -Signed-off-by: Victorien Molle -Signed-off-by: Florent Fourcot -Fixes: 2db6dc2662ba "sch_cake: Make gso-splitting configurable from userspace" -Acked-by: Toke Høiland-Jørgensen -Signed-off-by: David S. Miller -Signed-off-by: Kevin Darbyshire-Bryant ---- - net/sched/sch_cake.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -2204,6 +2204,7 @@ static const struct nla_policy cake_poli - [TCA_CAKE_MPU] = { .type = NLA_U32 }, - [TCA_CAKE_INGRESS] = { .type = NLA_U32 }, - [TCA_CAKE_ACK_FILTER] = { .type = NLA_U32 }, -+ [TCA_CAKE_SPLIT_GSO] = { .type = NLA_U32 }, - [TCA_CAKE_FWMARK] = { .type = NLA_U32 }, - }; - diff --git a/target/linux/generic/backport-4.19/395-v5.8-net-sch_cake-Take-advantage-of-skb-hash-where-appropriate.patch b/target/linux/generic/backport-4.19/395-v5.8-net-sch_cake-Take-advantage-of-skb-hash-where-appropriate.patch deleted file mode 100644 index a4981acdee..0000000000 --- a/target/linux/generic/backport-4.19/395-v5.8-net-sch_cake-Take-advantage-of-skb-hash-where-appropriate.patch +++ /dev/null @@ -1,170 +0,0 @@ -From b0c19ed6088ab41dd2a727b60594b7297c15d6ce Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Toke=20H=C3=B8iland-J=C3=B8rgensen?= -Date: Fri, 29 May 2020 14:43:44 +0200 -Subject: [PATCH] sch_cake: Take advantage of skb->hash where appropriate -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -While the other fq-based qdiscs take advantage of skb->hash and doesn't -recompute it if it is already set, sch_cake does not. - -This was a deliberate choice because sch_cake hashes various parts of the -packet header to support its advanced flow isolation modes. However, -foregoing the use of skb->hash entirely loses a few important benefits: - -- When skb->hash is set by hardware, a few CPU cycles can be saved by not - hashing again in software. - -- Tunnel encapsulations will generally preserve the value of skb->hash from - before the encapsulation, which allows flow-based qdiscs to distinguish - between flows even though the outer packet header no longer has flow - information. - -It turns out that we can preserve these desirable properties in many cases, -while still supporting the advanced flow isolation properties of sch_cake. -This patch does so by reusing the skb->hash value as the flow_hash part of -the hashing procedure in cake_hash() only in the following conditions: - -- If the skb->hash is marked as covering the flow headers (skb->l4_hash is - set) - -AND - -- NAT header rewriting is either disabled, or did not change any values - used for hashing. The latter is important to match local-origin packets - such as those of a tunnel endpoint. - -The immediate motivation for fixing this was the recent patch to WireGuard -to preserve the skb->hash on encapsulation. As such, this is also what I -tested against; with this patch, added latency under load for competing -flows drops from ~8 ms to sub-1ms on an RRUL test over a WireGuard tunnel -going through a virtual link shaped to 1Gbps using sch_cake. This matches -the results we saw with a similar setup using sch_fq_codel when testing the -WireGuard patch. - -Fixes: 046f6fd5daef ("sched: Add Common Applications Kept Enhanced (cake) qdisc") -Signed-off-by: Toke Høiland-Jørgensen -Signed-off-by: David S. Miller -Signed-off-by: Kevin Darbyshire-Bryant ---- - net/sched/sch_cake.c | 65 ++++++++++++++++++++++++++++++++++---------- - 1 file changed, 51 insertions(+), 14 deletions(-) - ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -584,26 +584,48 @@ static bool cobalt_should_drop(struct co - return drop; - } - --static void cake_update_flowkeys(struct flow_keys *keys, -+static bool cake_update_flowkeys(struct flow_keys *keys, - const struct sk_buff *skb) - { - #if IS_ENABLED(CONFIG_NF_CONNTRACK) - struct nf_conntrack_tuple tuple = {}; -- bool rev = !skb->_nfct; -+ bool rev = !skb->_nfct, upd = false; -+ __be32 ip; - - if (skb_protocol(skb, true) != htons(ETH_P_IP)) -- return; -+ return false; - - if (!nf_ct_get_tuple_skb(&tuple, skb)) -- return; -+ return false; - -- keys->addrs.v4addrs.src = rev ? tuple.dst.u3.ip : tuple.src.u3.ip; -- keys->addrs.v4addrs.dst = rev ? tuple.src.u3.ip : tuple.dst.u3.ip; -+ ip = rev ? tuple.dst.u3.ip : tuple.src.u3.ip; -+ if (ip != keys->addrs.v4addrs.src) { -+ keys->addrs.v4addrs.src = ip; -+ upd = true; -+ } -+ ip = rev ? tuple.src.u3.ip : tuple.dst.u3.ip; -+ if (ip != keys->addrs.v4addrs.dst) { -+ keys->addrs.v4addrs.dst = ip; -+ upd = true; -+ } - - if (keys->ports.ports) { -- keys->ports.src = rev ? tuple.dst.u.all : tuple.src.u.all; -- keys->ports.dst = rev ? tuple.src.u.all : tuple.dst.u.all; -+ __be16 port; -+ -+ port = rev ? tuple.dst.u.all : tuple.src.u.all; -+ if (port != keys->ports.src) { -+ keys->ports.src = port; -+ upd = true; -+ } -+ port = rev ? tuple.src.u.all : tuple.dst.u.all; -+ if (port != keys->ports.dst) { -+ port = keys->ports.dst; -+ upd = true; -+ } - } -+ return upd; -+#else -+ return false; - #endif - } - -@@ -624,23 +646,36 @@ static bool cake_ddst(int flow_mode) - static u32 cake_hash(struct cake_tin_data *q, const struct sk_buff *skb, - int flow_mode, u16 flow_override, u16 host_override) - { -+ bool hash_flows = (!flow_override && !!(flow_mode & CAKE_FLOW_FLOWS)); -+ bool hash_hosts = (!host_override && !!(flow_mode & CAKE_FLOW_HOSTS)); -+ bool nat_enabled = !!(flow_mode & CAKE_FLOW_NAT_FLAG); - u32 flow_hash = 0, srchost_hash = 0, dsthost_hash = 0; - u16 reduced_hash, srchost_idx, dsthost_idx; - struct flow_keys keys, host_keys; -+ bool use_skbhash = skb->l4_hash; - - if (unlikely(flow_mode == CAKE_FLOW_NONE)) - return 0; - -- /* If both overrides are set we can skip packet dissection entirely */ -- if ((flow_override || !(flow_mode & CAKE_FLOW_FLOWS)) && -- (host_override || !(flow_mode & CAKE_FLOW_HOSTS))) -+ /* If both overrides are set, or we can use the SKB hash and nat mode is -+ * disabled, we can skip packet dissection entirely. If nat mode is -+ * enabled there's another check below after doing the conntrack lookup. -+ */ -+ if ((!hash_flows || (use_skbhash && !nat_enabled)) && !hash_hosts) - goto skip_hash; - - skb_flow_dissect_flow_keys(skb, &keys, - FLOW_DISSECTOR_F_STOP_AT_FLOW_LABEL); - -- if (flow_mode & CAKE_FLOW_NAT_FLAG) -- cake_update_flowkeys(&keys, skb); -+ /* Don't use the SKB hash if we change the lookup keys from conntrack */ -+ if (nat_enabled && cake_update_flowkeys(&keys, skb)) -+ use_skbhash = false; -+ -+ /* If we can still use the SKB hash and don't need the host hash, we can -+ * skip the rest of the hashing procedure -+ */ -+ if (use_skbhash && !hash_hosts) -+ goto skip_hash; - - /* flow_hash_from_keys() sorts the addresses by value, so we have - * to preserve their order in a separate data structure to treat -@@ -679,12 +714,14 @@ static u32 cake_hash(struct cake_tin_dat - /* This *must* be after the above switch, since as a - * side-effect it sorts the src and dst addresses. - */ -- if (flow_mode & CAKE_FLOW_FLOWS) -+ if (hash_flows && !use_skbhash) - flow_hash = flow_hash_from_keys(&keys); - - skip_hash: - if (flow_override) - flow_hash = flow_override - 1; -+ else if (use_skbhash) -+ flow_hash = skb->hash; - if (host_override) { - dsthost_hash = host_override - 1; - srchost_hash = host_override - 1; diff --git a/target/linux/generic/backport-4.19/399-5.9-sch_cake-add-RFC-8622-LE-PHB-support-to-CAKE-diffser.patch b/target/linux/generic/backport-4.19/399-5.9-sch_cake-add-RFC-8622-LE-PHB-support-to-CAKE-diffser.patch deleted file mode 100644 index e171b4cec7..0000000000 --- a/target/linux/generic/backport-4.19/399-5.9-sch_cake-add-RFC-8622-LE-PHB-support-to-CAKE-diffser.patch +++ /dev/null @@ -1,57 +0,0 @@ -From b8392808eb3fc28e523e28cb258c81ca246deb9b Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Thu, 25 Jun 2020 22:18:00 +0200 -Subject: [PATCH] sch_cake: add RFC 8622 LE PHB support to CAKE diffserv - handling -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Change tin mapping on diffserv3, 4 & 8 for LE PHB support, in essence -making LE a member of the Bulk tin. - -Bulk has the least priority and minimum of 1/16th total bandwidth in the -face of higher priority traffic. - -NB: Diffserv 3 & 4 swap tin 0 & 1 priorities from the default order as -found in diffserv8, in case anyone is wondering why it looks a bit odd. - -Signed-off-by: Kevin Darbyshire-Bryant -[ reword commit message slightly ] -Signed-off-by: Toke Høiland-Jørgensen -Signed-off-by: David S. Miller ---- - net/sched/sch_cake.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -312,8 +312,8 @@ static const u8 precedence[] = { - }; - - static const u8 diffserv8[] = { -- 2, 5, 1, 2, 4, 2, 2, 2, -- 0, 2, 1, 2, 1, 2, 1, 2, -+ 2, 0, 1, 2, 4, 2, 2, 2, -+ 1, 2, 1, 2, 1, 2, 1, 2, - 5, 2, 4, 2, 4, 2, 4, 2, - 3, 2, 3, 2, 3, 2, 3, 2, - 6, 2, 3, 2, 3, 2, 3, 2, -@@ -323,7 +323,7 @@ static const u8 diffserv8[] = { - }; - - static const u8 diffserv4[] = { -- 0, 2, 0, 0, 2, 0, 0, 0, -+ 0, 1, 0, 0, 2, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, - 2, 0, 2, 0, 2, 0, 2, 0, - 2, 0, 2, 0, 2, 0, 2, 0, -@@ -334,7 +334,7 @@ static const u8 diffserv4[] = { - }; - - static const u8 diffserv3[] = { -- 0, 0, 0, 0, 2, 0, 0, 0, -+ 0, 1, 0, 0, 2, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, diff --git a/target/linux/generic/backport-4.19/410-mtd-fix-calculating-partition-end-address.patch b/target/linux/generic/backport-4.19/410-mtd-fix-calculating-partition-end-address.patch deleted file mode 100644 index 4027bfd714..0000000000 --- a/target/linux/generic/backport-4.19/410-mtd-fix-calculating-partition-end-address.patch +++ /dev/null @@ -1,28 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Mon, 9 Mar 2020 08:30:19 +0100 -Subject: [PATCH] mtd: fix calculating partition end address -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This fixes check for partitions that don't start at beginning of their -parents. Missing partition's offset in formula could result in forcing -read-only incorrectly. - -Fixes: 6750f61a13a0 ("mtd: improve calculating partition boundaries when checking for alignment") -Signed-off-by: Rafał Miłecki ---- - drivers/mtd/mtdpart.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -538,7 +538,7 @@ static struct mtd_part *allocate_partiti - part->name); - } - -- tmp = part_absolute_offset(parent) + slave->mtd.size; -+ tmp = part_absolute_offset(parent) + slave->offset + slave->mtd.size; - remainder = do_div(tmp, wr_alignment); - if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) { - slave->mtd.flags &= ~MTD_WRITEABLE; diff --git a/target/linux/generic/backport-4.19/450-v5.0-mtd-spinand-winbond-Add-support-for-W25N01GV.patch b/target/linux/generic/backport-4.19/450-v5.0-mtd-spinand-winbond-Add-support-for-W25N01GV.patch deleted file mode 100644 index 2024577b8f..0000000000 --- a/target/linux/generic/backport-4.19/450-v5.0-mtd-spinand-winbond-Add-support-for-W25N01GV.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 9a4d83074769d6ecf1f5c3fef0f183b09abf3726 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Sat, 6 Oct 2018 17:36:42 +0200 -Subject: [PATCH 1/8] mtd: spinand: winbond: Add support for W25N01GV - -W25N01GV is a single die version of the already supported -W25M02GV with half the capacity. Everything else is the -same so introduce support for W25N01GV. - -Datasheet:http://www.winbond.com/resource-files/w25n01gv%20revl%20050918%20unsecured.pdf - -Tested on 8devices Jalapeno dev board under OpenWrt running 4.19-rc5. - -Signed-off-by: Robert Marko -Reviewed-by: Boris Brezillon -Signed-off-by: Miquel Raynal ---- - drivers/mtd/nand/spi/winbond.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/drivers/mtd/nand/spi/winbond.c -+++ b/drivers/mtd/nand/spi/winbond.c -@@ -84,6 +84,14 @@ static const struct spinand_info winbond - 0, - SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL), - SPINAND_SELECT_TARGET(w25m02gv_select_target)), -+ SPINAND_INFO("W25N01GV", 0xAA, -+ NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1), -+ NAND_ECCREQ(1, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)), - }; - - /** diff --git a/target/linux/generic/backport-4.19/451-v5.0-mtd-spinand-Add-initial-support-for-Toshiba-TC58CVG2.patch b/target/linux/generic/backport-4.19/451-v5.0-mtd-spinand-Add-initial-support-for-Toshiba-TC58CVG2.patch deleted file mode 100644 index 288fdbf267..0000000000 --- a/target/linux/generic/backport-4.19/451-v5.0-mtd-spinand-Add-initial-support-for-Toshiba-TC58CVG2.patch +++ /dev/null @@ -1,188 +0,0 @@ -From 10949af1681d5bb5cdbcc012815c6e40eec17d02 Mon Sep 17 00:00:00 2001 -From: Schrempf Frieder -Date: Thu, 8 Nov 2018 08:32:11 +0000 -Subject: [PATCH 2/8] mtd: spinand: Add initial support for Toshiba TC58CVG2S0H -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add minimal support for the Toshiba TC58CVG2S0H SPI NAND chip. - -Signed-off-by: Frieder Schrempf -Acked-by: Clément Péron -Signed-off-by: Miquel Raynal ---- - drivers/mtd/nand/spi/Makefile | 2 +- - drivers/mtd/nand/spi/core.c | 1 + - drivers/mtd/nand/spi/toshiba.c | 137 +++++++++++++++++++++++++++++++++ - include/linux/mtd/spinand.h | 1 + - 4 files changed, 140 insertions(+), 1 deletion(-) - create mode 100644 drivers/mtd/nand/spi/toshiba.c - ---- a/drivers/mtd/nand/spi/Makefile -+++ b/drivers/mtd/nand/spi/Makefile -@@ -1,3 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0 --spinand-objs := core.o macronix.o micron.o winbond.o -+spinand-objs := core.o macronix.o micron.o toshiba.o winbond.o - obj-$(CONFIG_MTD_SPI_NAND) += spinand.o ---- a/drivers/mtd/nand/spi/core.c -+++ b/drivers/mtd/nand/spi/core.c -@@ -762,6 +762,7 @@ static const struct nand_ops spinand_ops - static const struct spinand_manufacturer *spinand_manufacturers[] = { - ¯onix_spinand_manufacturer, - µn_spinand_manufacturer, -+ &toshiba_spinand_manufacturer, - &winbond_spinand_manufacturer, - }; - ---- /dev/null -+++ b/drivers/mtd/nand/spi/toshiba.c -@@ -0,0 +1,137 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (c) 2018 exceet electronics GmbH -+ * Copyright (c) 2018 Kontron Electronics GmbH -+ * -+ * Author: Frieder Schrempf -+ */ -+ -+#include -+#include -+#include -+ -+#define SPINAND_MFR_TOSHIBA 0x98 -+#define TOSH_STATUS_ECC_HAS_BITFLIPS_T (3 << 4) -+ -+static SPINAND_OP_VARIANTS(read_cache_variants, -+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); -+ -+static SPINAND_OP_VARIANTS(write_cache_variants, -+ SPINAND_PROG_LOAD(true, 0, NULL, 0)); -+ -+static SPINAND_OP_VARIANTS(update_cache_variants, -+ SPINAND_PROG_LOAD(false, 0, NULL, 0)); -+ -+static int tc58cvg2s0h_ooblayout_ecc(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section > 7) -+ return -ERANGE; -+ -+ region->offset = 128 + 16 * section; -+ region->length = 16; -+ -+ return 0; -+} -+ -+static int tc58cvg2s0h_ooblayout_free(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section > 0) -+ return -ERANGE; -+ -+ /* 2 bytes reserved for BBM */ -+ region->offset = 2; -+ region->length = 126; -+ -+ return 0; -+} -+ -+static const struct mtd_ooblayout_ops tc58cvg2s0h_ooblayout = { -+ .ecc = tc58cvg2s0h_ooblayout_ecc, -+ .free = tc58cvg2s0h_ooblayout_free, -+}; -+ -+static int tc58cvg2s0h_ecc_get_status(struct spinand_device *spinand, -+ u8 status) -+{ -+ struct nand_device *nand = spinand_to_nand(spinand); -+ u8 mbf = 0; -+ struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf); -+ -+ switch (status & STATUS_ECC_MASK) { -+ case STATUS_ECC_NO_BITFLIPS: -+ return 0; -+ -+ case STATUS_ECC_UNCOR_ERROR: -+ return -EBADMSG; -+ -+ case STATUS_ECC_HAS_BITFLIPS: -+ case TOSH_STATUS_ECC_HAS_BITFLIPS_T: -+ /* -+ * Let's try to retrieve the real maximum number of bitflips -+ * in order to avoid forcing the wear-leveling layer to move -+ * data around if it's not necessary. -+ */ -+ if (spi_mem_exec_op(spinand->spimem, &op)) -+ return nand->eccreq.strength; -+ -+ mbf >>= 4; -+ -+ if (WARN_ON(mbf > nand->eccreq.strength || !mbf)) -+ return nand->eccreq.strength; -+ -+ return mbf; -+ -+ default: -+ break; -+ } -+ -+ return -EINVAL; -+} -+ -+static const struct spinand_info toshiba_spinand_table[] = { -+ SPINAND_INFO("TC58CVG2S0H", 0xCD, -+ NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ SPINAND_HAS_QE_BIT, -+ SPINAND_ECCINFO(&tc58cvg2s0h_ooblayout, -+ tc58cvg2s0h_ecc_get_status)), -+}; -+ -+static int toshiba_spinand_detect(struct spinand_device *spinand) -+{ -+ u8 *id = spinand->id.data; -+ int ret; -+ -+ /* -+ * Toshiba SPI NAND read ID needs a dummy byte, -+ * so the first byte in id is garbage. -+ */ -+ if (id[1] != SPINAND_MFR_TOSHIBA) -+ return 0; -+ -+ ret = spinand_match_and_init(spinand, toshiba_spinand_table, -+ ARRAY_SIZE(toshiba_spinand_table), -+ id[2]); -+ if (ret) -+ return ret; -+ -+ return 1; -+} -+ -+static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = { -+ .detect = toshiba_spinand_detect, -+}; -+ -+const struct spinand_manufacturer toshiba_spinand_manufacturer = { -+ .id = SPINAND_MFR_TOSHIBA, -+ .name = "Toshiba", -+ .ops = &toshiba_spinand_manuf_ops, -+}; ---- a/include/linux/mtd/spinand.h -+++ b/include/linux/mtd/spinand.h -@@ -196,6 +196,7 @@ struct spinand_manufacturer { - /* SPI NAND manufacturers */ - extern const struct spinand_manufacturer macronix_spinand_manufacturer; - extern const struct spinand_manufacturer micron_spinand_manufacturer; -+extern const struct spinand_manufacturer toshiba_spinand_manufacturer; - extern const struct spinand_manufacturer winbond_spinand_manufacturer; - - /** diff --git a/target/linux/generic/backport-4.19/452-v5.0-mtd-spinand-add-support-for-GigaDevice-GD5FxGQ4xA.patch b/target/linux/generic/backport-4.19/452-v5.0-mtd-spinand-add-support-for-GigaDevice-GD5FxGQ4xA.patch deleted file mode 100644 index d3ded95ccb..0000000000 --- a/target/linux/generic/backport-4.19/452-v5.0-mtd-spinand-add-support-for-GigaDevice-GD5FxGQ4xA.patch +++ /dev/null @@ -1,196 +0,0 @@ -From c93c613214ac70c87beab5422a60077bf126b855 Mon Sep 17 00:00:00 2001 -From: Chuanhong Guo -Date: Wed, 28 Nov 2018 21:07:25 +0800 -Subject: [PATCH 3/8] mtd: spinand: add support for GigaDevice GD5FxGQ4xA - -Add support for GigaDevice GD5F1G/2G/4GQ4xA SPI NAND. - -Signed-off-by: Chuanhong Guo -Reviewed-by: Frieder Schrempf -Signed-off-by: Miquel Raynal ---- - drivers/mtd/nand/spi/Makefile | 2 +- - drivers/mtd/nand/spi/core.c | 1 + - drivers/mtd/nand/spi/gigadevice.c | 148 ++++++++++++++++++++++++++++++ - include/linux/mtd/spinand.h | 1 + - 4 files changed, 151 insertions(+), 1 deletion(-) - create mode 100644 drivers/mtd/nand/spi/gigadevice.c - ---- a/drivers/mtd/nand/spi/Makefile -+++ b/drivers/mtd/nand/spi/Makefile -@@ -1,3 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0 --spinand-objs := core.o macronix.o micron.o toshiba.o winbond.o -+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o - obj-$(CONFIG_MTD_SPI_NAND) += spinand.o ---- a/drivers/mtd/nand/spi/core.c -+++ b/drivers/mtd/nand/spi/core.c -@@ -760,6 +760,7 @@ static const struct nand_ops spinand_ops - }; - - static const struct spinand_manufacturer *spinand_manufacturers[] = { -+ &gigadevice_spinand_manufacturer, - ¯onix_spinand_manufacturer, - µn_spinand_manufacturer, - &toshiba_spinand_manufacturer, ---- /dev/null -+++ b/drivers/mtd/nand/spi/gigadevice.c -@@ -0,0 +1,148 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Author: -+ * Chuanhong Guo -+ */ -+ -+#include -+#include -+#include -+ -+#define SPINAND_MFR_GIGADEVICE 0xC8 -+#define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4) -+#define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4) -+ -+static SPINAND_OP_VARIANTS(read_cache_variants, -+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); -+ -+static SPINAND_OP_VARIANTS(write_cache_variants, -+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), -+ SPINAND_PROG_LOAD(true, 0, NULL, 0)); -+ -+static SPINAND_OP_VARIANTS(update_cache_variants, -+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), -+ SPINAND_PROG_LOAD(false, 0, NULL, 0)); -+ -+static int gd5fxgq4xa_ooblayout_ecc(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section > 3) -+ return -ERANGE; -+ -+ region->offset = (16 * section) + 8; -+ region->length = 8; -+ -+ return 0; -+} -+ -+static int gd5fxgq4xa_ooblayout_free(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section > 3) -+ return -ERANGE; -+ -+ if (section) { -+ region->offset = 16 * section; -+ region->length = 8; -+ } else { -+ /* section 0 has one byte reserved for bad block mark */ -+ region->offset = 1; -+ region->length = 7; -+ } -+ return 0; -+} -+ -+static int gd5fxgq4xa_ecc_get_status(struct spinand_device *spinand, -+ u8 status) -+{ -+ switch (status & STATUS_ECC_MASK) { -+ case STATUS_ECC_NO_BITFLIPS: -+ return 0; -+ -+ case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS: -+ /* 1-7 bits are flipped. return the maximum. */ -+ return 7; -+ -+ case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS: -+ return 8; -+ -+ case STATUS_ECC_UNCOR_ERROR: -+ return -EBADMSG; -+ -+ default: -+ break; -+ } -+ -+ return -EINVAL; -+} -+ -+static const struct mtd_ooblayout_ops gd5fxgq4xa_ooblayout = { -+ .ecc = gd5fxgq4xa_ooblayout_ecc, -+ .free = gd5fxgq4xa_ooblayout_free, -+}; -+ -+static const struct spinand_info gigadevice_spinand_table[] = { -+ SPINAND_INFO("GD5F1GQ4xA", 0xF1, -+ NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, -+ gd5fxgq4xa_ecc_get_status)), -+ SPINAND_INFO("GD5F2GQ4xA", 0xF2, -+ NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, -+ gd5fxgq4xa_ecc_get_status)), -+ SPINAND_INFO("GD5F4GQ4xA", 0xF4, -+ NAND_MEMORG(1, 2048, 64, 64, 4096, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, -+ gd5fxgq4xa_ecc_get_status)), -+}; -+ -+static int gigadevice_spinand_detect(struct spinand_device *spinand) -+{ -+ u8 *id = spinand->id.data; -+ int ret; -+ -+ /* -+ * For GD NANDs, There is an address byte needed to shift in before IDs -+ * are read out, so the first byte in raw_id is dummy. -+ */ -+ if (id[1] != SPINAND_MFR_GIGADEVICE) -+ return 0; -+ -+ ret = spinand_match_and_init(spinand, gigadevice_spinand_table, -+ ARRAY_SIZE(gigadevice_spinand_table), -+ id[2]); -+ if (ret) -+ return ret; -+ -+ return 1; -+} -+ -+static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = { -+ .detect = gigadevice_spinand_detect, -+}; -+ -+const struct spinand_manufacturer gigadevice_spinand_manufacturer = { -+ .id = SPINAND_MFR_GIGADEVICE, -+ .name = "GigaDevice", -+ .ops = &gigadevice_spinand_manuf_ops, -+}; ---- a/include/linux/mtd/spinand.h -+++ b/include/linux/mtd/spinand.h -@@ -194,6 +194,7 @@ struct spinand_manufacturer { - }; - - /* SPI NAND manufacturers */ -+extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; - extern const struct spinand_manufacturer macronix_spinand_manufacturer; - extern const struct spinand_manufacturer micron_spinand_manufacturer; - extern const struct spinand_manufacturer toshiba_spinand_manufacturer; diff --git a/target/linux/generic/backport-4.19/455-v5.1-mtd-spinand-Add-support-for-all-Toshiba-Memory-produ.patch b/target/linux/generic/backport-4.19/455-v5.1-mtd-spinand-Add-support-for-all-Toshiba-Memory-produ.patch deleted file mode 100644 index aad82dcf7a..0000000000 --- a/target/linux/generic/backport-4.19/455-v5.1-mtd-spinand-Add-support-for-all-Toshiba-Memory-produ.patch +++ /dev/null @@ -1,136 +0,0 @@ -From db214513f62fd13c0a9af3bd5c5d634dba37e65d Mon Sep 17 00:00:00 2001 -From: Yoshio Furuyama -Date: Wed, 16 Jan 2019 14:53:19 +0900 -Subject: [PATCH 7/8] mtd: spinand: Add support for all Toshiba Memory products - -Add device table for Toshiba Memory products. -Also, generalize OOB layout structure and function names. - -Signed-off-by: Yoshio Furuyama -Reviewed-by: Frieder Schrempf -Signed-off-by: Miquel Raynal ---- - drivers/mtd/nand/spi/toshiba.c | 79 ++++++++++++++++++++++++++++------ - 1 file changed, 65 insertions(+), 14 deletions(-) - ---- a/drivers/mtd/nand/spi/toshiba.c -+++ b/drivers/mtd/nand/spi/toshiba.c -@@ -25,19 +25,19 @@ static SPINAND_OP_VARIANTS(write_cache_v - static SPINAND_OP_VARIANTS(update_cache_variants, - SPINAND_PROG_LOAD(false, 0, NULL, 0)); - --static int tc58cvg2s0h_ooblayout_ecc(struct mtd_info *mtd, int section, -+static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) - { -- if (section > 7) -+ if (section > 0) - return -ERANGE; - -- region->offset = 128 + 16 * section; -- region->length = 16; -+ region->offset = mtd->oobsize / 2; -+ region->length = mtd->oobsize / 2; - - return 0; - } - --static int tc58cvg2s0h_ooblayout_free(struct mtd_info *mtd, int section, -+static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) - { - if (section > 0) -@@ -45,17 +45,17 @@ static int tc58cvg2s0h_ooblayout_free(st - - /* 2 bytes reserved for BBM */ - region->offset = 2; -- region->length = 126; -+ region->length = (mtd->oobsize / 2) - 2; - - return 0; - } - --static const struct mtd_ooblayout_ops tc58cvg2s0h_ooblayout = { -- .ecc = tc58cvg2s0h_ooblayout_ecc, -- .free = tc58cvg2s0h_ooblayout_free, -+static const struct mtd_ooblayout_ops tc58cxgxsx_ooblayout = { -+ .ecc = tc58cxgxsx_ooblayout_ecc, -+ .free = tc58cxgxsx_ooblayout_free, - }; - --static int tc58cvg2s0h_ecc_get_status(struct spinand_device *spinand, -+static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand, - u8 status) - { - struct nand_device *nand = spinand_to_nand(spinand); -@@ -94,15 +94,66 @@ static int tc58cvg2s0h_ecc_get_status(st - } - - static const struct spinand_info toshiba_spinand_table[] = { -- SPINAND_INFO("TC58CVG2S0H", 0xCD, -+ /* 3.3V 1Gb */ -+ SPINAND_INFO("TC58CVG0S3", 0xC2, -+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, -+ tc58cxgxsx_ecc_get_status)), -+ /* 3.3V 2Gb */ -+ SPINAND_INFO("TC58CVG1S3", 0xCB, -+ NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, -+ tc58cxgxsx_ecc_get_status)), -+ /* 3.3V 4Gb */ -+ SPINAND_INFO("TC58CVG2S0", 0xCD, -+ NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, -+ tc58cxgxsx_ecc_get_status)), -+ /* 1.8V 1Gb */ -+ SPINAND_INFO("TC58CYG0S3", 0xB2, -+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, -+ tc58cxgxsx_ecc_get_status)), -+ /* 1.8V 2Gb */ -+ SPINAND_INFO("TC58CYG1S3", 0xBB, -+ NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, -+ tc58cxgxsx_ecc_get_status)), -+ /* 1.8V 4Gb */ -+ SPINAND_INFO("TC58CYG2S0", 0xBD, - NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), - NAND_ECCREQ(8, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, - &write_cache_variants, - &update_cache_variants), -- SPINAND_HAS_QE_BIT, -- SPINAND_ECCINFO(&tc58cvg2s0h_ooblayout, -- tc58cvg2s0h_ecc_get_status)), -+ 0, -+ SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, -+ tc58cxgxsx_ecc_get_status)), - }; - - static int toshiba_spinand_detect(struct spinand_device *spinand) diff --git a/target/linux/generic/backport-4.19/456-v5.1-mtd-spinand-Add-support-for-GigaDevice-GD5F1GQ4UExxG.patch b/target/linux/generic/backport-4.19/456-v5.1-mtd-spinand-Add-support-for-GigaDevice-GD5F1GQ4UExxG.patch deleted file mode 100644 index 8e48debf43..0000000000 --- a/target/linux/generic/backport-4.19/456-v5.1-mtd-spinand-Add-support-for-GigaDevice-GD5F1GQ4UExxG.patch +++ /dev/null @@ -1,129 +0,0 @@ -From c40c7a990a46e5102a1cc4190557bf315d32d80d Mon Sep 17 00:00:00 2001 -From: Stefan Roese -Date: Thu, 24 Jan 2019 13:48:06 +0100 -Subject: [PATCH 8/8] mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxG - -Add support for GigaDevice GD5F1GQ4UExxG SPI NAND chip. - -Signed-off-by: Stefan Roese -Cc: Chuanhong Guo -Cc: Frieder Schrempf -Cc: Miquel Raynal -Cc: Boris Brezillon -Reviewed-by: Boris Brezillon -Signed-off-by: Miquel Raynal ---- - drivers/mtd/nand/spi/gigadevice.c | 83 +++++++++++++++++++++++++++++++ - 1 file changed, 83 insertions(+) - ---- a/drivers/mtd/nand/spi/gigadevice.c -+++ b/drivers/mtd/nand/spi/gigadevice.c -@@ -12,6 +12,8 @@ - #define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4) - #define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4) - -+#define GD5FXGQ4UEXXG_REG_STATUS2 0xf0 -+ - static SPINAND_OP_VARIANTS(read_cache_variants, - SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), - SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), -@@ -81,11 +83,83 @@ static int gd5fxgq4xa_ecc_get_status(str - return -EINVAL; - } - -+static int gd5fxgq4uexxg_ooblayout_ecc(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section) -+ return -ERANGE; -+ -+ region->offset = 64; -+ region->length = 64; -+ -+ return 0; -+} -+ -+static int gd5fxgq4uexxg_ooblayout_free(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section) -+ return -ERANGE; -+ -+ /* Reserve 1 bytes for the BBM. */ -+ region->offset = 1; -+ region->length = 63; -+ -+ return 0; -+} -+ -+static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand, -+ u8 status) -+{ -+ u8 status2; -+ struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4UEXXG_REG_STATUS2, -+ &status2); -+ int ret; -+ -+ switch (status & STATUS_ECC_MASK) { -+ case STATUS_ECC_NO_BITFLIPS: -+ return 0; -+ -+ case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS: -+ /* -+ * Read status2 register to determine a more fine grained -+ * bit error status -+ */ -+ ret = spi_mem_exec_op(spinand->spimem, &op); -+ if (ret) -+ return ret; -+ -+ /* -+ * 4 ... 7 bits are flipped (1..4 can't be detected, so -+ * report the maximum of 4 in this case -+ */ -+ /* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */ -+ return ((status & STATUS_ECC_MASK) >> 2) | -+ ((status2 & STATUS_ECC_MASK) >> 4); -+ -+ case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS: -+ return 8; -+ -+ case STATUS_ECC_UNCOR_ERROR: -+ return -EBADMSG; -+ -+ default: -+ break; -+ } -+ -+ return -EINVAL; -+} -+ - static const struct mtd_ooblayout_ops gd5fxgq4xa_ooblayout = { - .ecc = gd5fxgq4xa_ooblayout_ecc, - .free = gd5fxgq4xa_ooblayout_free, - }; - -+static const struct mtd_ooblayout_ops gd5fxgq4uexxg_ooblayout = { -+ .ecc = gd5fxgq4uexxg_ooblayout_ecc, -+ .free = gd5fxgq4uexxg_ooblayout_free, -+}; -+ - static const struct spinand_info gigadevice_spinand_table[] = { - SPINAND_INFO("GD5F1GQ4xA", 0xF1, - NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1), -@@ -114,6 +188,15 @@ static const struct spinand_info gigadev - 0, - SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, - gd5fxgq4xa_ecc_get_status)), -+ SPINAND_INFO("GD5F1GQ4UExxG", 0xd1, -+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&gd5fxgq4uexxg_ooblayout, -+ gd5fxgq4uexxg_ecc_get_status)), - }; - - static int gigadevice_spinand_detect(struct spinand_device *spinand) diff --git a/target/linux/generic/backport-4.19/460-v5.0-mtd-spi-nor-Add-support-for-mx25u12835f.patch b/target/linux/generic/backport-4.19/460-v5.0-mtd-spi-nor-Add-support-for-mx25u12835f.patch deleted file mode 100644 index 1bdf35b987..0000000000 --- a/target/linux/generic/backport-4.19/460-v5.0-mtd-spi-nor-Add-support-for-mx25u12835f.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 81554171373018b83f3554b9e725d2b5bf1844a5 Mon Sep 17 00:00:00 2001 -From: Alexander Sverdlin -Date: Fri, 13 Jul 2018 15:06:46 +0200 -Subject: [PATCH] mtd: spi-nor: Add support for mx25u12835f - -This chip supports dual and quad read and uniform 4K-byte erase. - -Signed-off-by: Alexander Sverdlin -Reviewed-by: Tudor Ambarus -Signed-off-by: Boris Brezillon ---- - drivers/mtd/spi-nor/spi-nor.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1088,6 +1088,8 @@ static const struct flash_info spi_nor_i - { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, - { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, - { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, -+ { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256, -+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) }, - { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, diff --git a/target/linux/generic/backport-4.19/460-v5.3-mtd-spinand-Define-macros-for-page-read-ops-with-thr.patch b/target/linux/generic/backport-4.19/460-v5.3-mtd-spinand-Define-macros-for-page-read-ops-with-thr.patch deleted file mode 100644 index c28ae1d797..0000000000 --- a/target/linux/generic/backport-4.19/460-v5.3-mtd-spinand-Define-macros-for-page-read-ops-with-thr.patch +++ /dev/null @@ -1,81 +0,0 @@ -From d014717d50b1efd011a3a028ce92563a4dc9bae5 Mon Sep 17 00:00:00 2001 -From: Jeff Kletsky -Date: Wed, 22 May 2019 15:05:53 -0700 -Subject: [PATCH 1/3] mtd: spinand: Define macros for page-read ops with - three-byte addresses - -The GigaDevice GD5F1GQ4UFxxG SPI NAND utilizes three-byte addresses -for its page-read ops. - -http://www.gigadevice.com/datasheet/gd5f1gq4xfxxg/ - -Signed-off-by: Jeff Kletsky -Reviewed-by: Frieder Schrempf -Signed-off-by: Miquel Raynal ---- - include/linux/mtd/spinand.h | 30 ++++++++++++++++++++++++++++++ - 1 file changed, 30 insertions(+) - ---- a/include/linux/mtd/spinand.h -+++ b/include/linux/mtd/spinand.h -@@ -68,30 +68,60 @@ - SPI_MEM_OP_DUMMY(ndummy, 1), \ - SPI_MEM_OP_DATA_IN(len, buf, 1)) - -+#define SPINAND_PAGE_READ_FROM_CACHE_OP_3A(fast, addr, ndummy, buf, len) \ -+ SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1), \ -+ SPI_MEM_OP_ADDR(3, addr, 1), \ -+ SPI_MEM_OP_DUMMY(ndummy, 1), \ -+ SPI_MEM_OP_DATA_IN(len, buf, 1)) -+ - #define SPINAND_PAGE_READ_FROM_CACHE_X2_OP(addr, ndummy, buf, len) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1), \ - SPI_MEM_OP_ADDR(2, addr, 1), \ - SPI_MEM_OP_DUMMY(ndummy, 1), \ - SPI_MEM_OP_DATA_IN(len, buf, 2)) - -+#define SPINAND_PAGE_READ_FROM_CACHE_X2_OP_3A(addr, ndummy, buf, len) \ -+ SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1), \ -+ SPI_MEM_OP_ADDR(3, addr, 1), \ -+ SPI_MEM_OP_DUMMY(ndummy, 1), \ -+ SPI_MEM_OP_DATA_IN(len, buf, 2)) -+ - #define SPINAND_PAGE_READ_FROM_CACHE_X4_OP(addr, ndummy, buf, len) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1), \ - SPI_MEM_OP_ADDR(2, addr, 1), \ - SPI_MEM_OP_DUMMY(ndummy, 1), \ - SPI_MEM_OP_DATA_IN(len, buf, 4)) - -+#define SPINAND_PAGE_READ_FROM_CACHE_X4_OP_3A(addr, ndummy, buf, len) \ -+ SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1), \ -+ SPI_MEM_OP_ADDR(3, addr, 1), \ -+ SPI_MEM_OP_DUMMY(ndummy, 1), \ -+ SPI_MEM_OP_DATA_IN(len, buf, 4)) -+ - #define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(addr, ndummy, buf, len) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1), \ - SPI_MEM_OP_ADDR(2, addr, 2), \ - SPI_MEM_OP_DUMMY(ndummy, 2), \ - SPI_MEM_OP_DATA_IN(len, buf, 2)) - -+#define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP_3A(addr, ndummy, buf, len) \ -+ SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1), \ -+ SPI_MEM_OP_ADDR(3, addr, 2), \ -+ SPI_MEM_OP_DUMMY(ndummy, 2), \ -+ SPI_MEM_OP_DATA_IN(len, buf, 2)) -+ - #define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(addr, ndummy, buf, len) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1), \ - SPI_MEM_OP_ADDR(2, addr, 4), \ - SPI_MEM_OP_DUMMY(ndummy, 4), \ - SPI_MEM_OP_DATA_IN(len, buf, 4)) - -+#define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP_3A(addr, ndummy, buf, len) \ -+ SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1), \ -+ SPI_MEM_OP_ADDR(3, addr, 4), \ -+ SPI_MEM_OP_DUMMY(ndummy, 4), \ -+ SPI_MEM_OP_DATA_IN(len, buf, 4)) -+ - #define SPINAND_PROG_EXEC_OP(addr) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1), \ - SPI_MEM_OP_ADDR(3, addr, 1), \ diff --git a/target/linux/generic/backport-4.19/461-v5.3-mtd-spinand-Add-support-for-two-byte-device-IDs.patch b/target/linux/generic/backport-4.19/461-v5.3-mtd-spinand-Add-support-for-two-byte-device-IDs.patch deleted file mode 100644 index ee81f97f4e..0000000000 --- a/target/linux/generic/backport-4.19/461-v5.3-mtd-spinand-Add-support-for-two-byte-device-IDs.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 53dd94a79d3bfdaae30e5a4ebf474ea1af1d572e Mon Sep 17 00:00:00 2001 -From: Jeff Kletsky -Date: Wed, 22 May 2019 15:05:54 -0700 -Subject: [PATCH 2/3] mtd: spinand: Add support for two-byte device IDs - -The GigaDevice GD5F1GQ4UFxxG SPI NAND utilizes two-byte device IDs. - -http://www.gigadevice.com/datasheet/gd5f1gq4xfxxg/ - -Signed-off-by: Jeff Kletsky -Reviewed-by: Frieder Schrempf -Signed-off-by: Miquel Raynal ---- - drivers/mtd/nand/spi/core.c | 2 +- - include/linux/mtd/spinand.h | 4 ++-- - 2 files changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/mtd/nand/spi/core.c -+++ b/drivers/mtd/nand/spi/core.c -@@ -851,7 +851,7 @@ spinand_select_op_variant(struct spinand - */ - int spinand_match_and_init(struct spinand_device *spinand, - const struct spinand_info *table, -- unsigned int table_size, u8 devid) -+ unsigned int table_size, u16 devid) - { - struct nand_device *nand = spinand_to_nand(spinand); - unsigned int i; ---- a/include/linux/mtd/spinand.h -+++ b/include/linux/mtd/spinand.h -@@ -290,7 +290,7 @@ struct spinand_ecc_info { - */ - struct spinand_info { - const char *model; -- u8 devid; -+ u16 devid; - u32 flags; - struct nand_memory_organization memorg; - struct nand_ecc_req eccreq; -@@ -445,7 +445,7 @@ static inline void spinand_set_of_node(s - - int spinand_match_and_init(struct spinand_device *dev, - const struct spinand_info *table, -- unsigned int table_size, u8 devid); -+ unsigned int table_size, u16 devid); - - int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val); - int spinand_select_target(struct spinand_device *spinand, unsigned int target); diff --git a/target/linux/generic/backport-4.19/462-v5.3-mtd-spinand-Add-support-for-GigaDevice-GD5F1GQ4UFxxG.patch b/target/linux/generic/backport-4.19/462-v5.3-mtd-spinand-Add-support-for-GigaDevice-GD5F1GQ4UFxxG.patch deleted file mode 100644 index 06d87ba5e0..0000000000 --- a/target/linux/generic/backport-4.19/462-v5.3-mtd-spinand-Add-support-for-GigaDevice-GD5F1GQ4UFxxG.patch +++ /dev/null @@ -1,197 +0,0 @@ - -IMPORTANT NOTE -============== - -The content of this patch has been adapted for Linux 4.19 - -Changes were made in Linux 5.x to add the bad-block limit -to the metadata available to the driver, adding a parameter - -NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), - ^- New bad-block limit - -This patch omits that parameter from the upstream patch -for compatibility with the Linux 4.19 driver. - -===== - -From 049df13c4e63884fe6634db5568e08f65922256e Mon Sep 17 00:00:00 2001 -From: Jeff Kletsky -Date: Wed, 22 May 2019 15:05:55 -0700 -Subject: [PATCH 3/3] mtd: spinand: Add support for GigaDevice GD5F1GQ4UFxxG - -The GigaDevice GD5F1GQ4UFxxG SPI NAND is in current production devices -and, while it has the same logical layout as the E-series devices, -it differs in the SPI interfacing in significant ways. - -This support is contingent on previous commits to: - - * Add support for two-byte device IDs - * Define macros for page-read ops with three-byte addresses - -http://www.gigadevice.com/datasheet/gd5f1gq4xfxxg/ - -Signed-off-by: Jeff Kletsky -Reviewed-by: Frieder Schrempf -Signed-off-by: Miquel Raynal ---- - drivers/mtd/nand/spi/gigadevice.c | 79 +++++++++++++++++++++++++------ - 1 file changed, 64 insertions(+), 15 deletions(-) - ---- a/drivers/mtd/nand/spi/gigadevice.c -+++ b/drivers/mtd/nand/spi/gigadevice.c -@@ -9,11 +9,17 @@ - #include - - #define SPINAND_MFR_GIGADEVICE 0xC8 -+ - #define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4) - #define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4) - - #define GD5FXGQ4UEXXG_REG_STATUS2 0xf0 - -+#define GD5FXGQ4UXFXXG_STATUS_ECC_MASK (7 << 4) -+#define GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS (0 << 4) -+#define GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS (1 << 4) -+#define GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR (7 << 4) -+ - static SPINAND_OP_VARIANTS(read_cache_variants, - SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), - SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), -@@ -22,6 +28,14 @@ static SPINAND_OP_VARIANTS(read_cache_va - SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), - SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); - -+static SPINAND_OP_VARIANTS(read_cache_variants_f, -+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP_3A(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP_3A(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0)); -+ - static SPINAND_OP_VARIANTS(write_cache_variants, - SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), - SPINAND_PROG_LOAD(true, 0, NULL, 0)); -@@ -59,6 +73,11 @@ static int gd5fxgq4xa_ooblayout_free(str - return 0; - } - -+static const struct mtd_ooblayout_ops gd5fxgq4xa_ooblayout = { -+ .ecc = gd5fxgq4xa_ooblayout_ecc, -+ .free = gd5fxgq4xa_ooblayout_free, -+}; -+ - static int gd5fxgq4xa_ecc_get_status(struct spinand_device *spinand, - u8 status) - { -@@ -83,7 +102,7 @@ static int gd5fxgq4xa_ecc_get_status(str - return -EINVAL; - } - --static int gd5fxgq4uexxg_ooblayout_ecc(struct mtd_info *mtd, int section, -+static int gd5fxgq4_variant2_ooblayout_ecc(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) - { - if (section) -@@ -95,7 +114,7 @@ static int gd5fxgq4uexxg_ooblayout_ecc(s - return 0; - } - --static int gd5fxgq4uexxg_ooblayout_free(struct mtd_info *mtd, int section, -+static int gd5fxgq4_variant2_ooblayout_free(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) - { - if (section) -@@ -108,6 +127,11 @@ static int gd5fxgq4uexxg_ooblayout_free( - return 0; - } - -+static const struct mtd_ooblayout_ops gd5fxgq4_variant2_ooblayout = { -+ .ecc = gd5fxgq4_variant2_ooblayout_ecc, -+ .free = gd5fxgq4_variant2_ooblayout_free, -+}; -+ - static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand, - u8 status) - { -@@ -150,15 +174,25 @@ static int gd5fxgq4uexxg_ecc_get_status( - return -EINVAL; - } - --static const struct mtd_ooblayout_ops gd5fxgq4xa_ooblayout = { -- .ecc = gd5fxgq4xa_ooblayout_ecc, -- .free = gd5fxgq4xa_ooblayout_free, --}; -+static int gd5fxgq4ufxxg_ecc_get_status(struct spinand_device *spinand, -+ u8 status) -+{ -+ switch (status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) { -+ case GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS: -+ return 0; - --static const struct mtd_ooblayout_ops gd5fxgq4uexxg_ooblayout = { -- .ecc = gd5fxgq4uexxg_ooblayout_ecc, -- .free = gd5fxgq4uexxg_ooblayout_free, --}; -+ case GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS: -+ return 3; -+ -+ case GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR: -+ return -EBADMSG; -+ -+ default: /* (2 << 4) through (6 << 4) are 4-8 corrected errors */ -+ return ((status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) >> 4) + 2; -+ } -+ -+ return -EINVAL; -+} - - static const struct spinand_info gigadevice_spinand_table[] = { - SPINAND_INFO("GD5F1GQ4xA", 0xF1, -@@ -195,25 +229,40 @@ static const struct spinand_info gigadev - &write_cache_variants, - &update_cache_variants), - 0, -- SPINAND_ECCINFO(&gd5fxgq4uexxg_ooblayout, -+ SPINAND_ECCINFO(&gd5fxgq4_variant2_ooblayout, - gd5fxgq4uexxg_ecc_get_status)), -+ SPINAND_INFO("GD5F1GQ4UFxxG", 0xb148, -+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&gd5fxgq4_variant2_ooblayout, -+ gd5fxgq4ufxxg_ecc_get_status)), - }; - - static int gigadevice_spinand_detect(struct spinand_device *spinand) - { - u8 *id = spinand->id.data; -+ u16 did; - int ret; - - /* -- * For GD NANDs, There is an address byte needed to shift in before IDs -- * are read out, so the first byte in raw_id is dummy. -+ * Earlier GDF5-series devices (A,E) return [0][MID][DID] -+ * Later (F) devices return [MID][DID1][DID2] - */ -- if (id[1] != SPINAND_MFR_GIGADEVICE) -+ -+ if (id[0] == SPINAND_MFR_GIGADEVICE) -+ did = (id[1] << 8) + id[2]; -+ else if (id[0] == 0 && id[1] == SPINAND_MFR_GIGADEVICE) -+ did = id[2]; -+ else - return 0; - - ret = spinand_match_and_init(spinand, gigadevice_spinand_table, - ARRAY_SIZE(gigadevice_spinand_table), -- id[2]); -+ did); - if (ret) - return ret; - diff --git a/target/linux/generic/backport-4.19/463-v5.3-mtd-spinand-Add-initial-support-for-Paragon-PN26G0xA.patch b/target/linux/generic/backport-4.19/463-v5.3-mtd-spinand-Add-initial-support-for-Paragon-PN26G0xA.patch deleted file mode 100644 index d30abdc143..0000000000 --- a/target/linux/generic/backport-4.19/463-v5.3-mtd-spinand-Add-initial-support-for-Paragon-PN26G0xA.patch +++ /dev/null @@ -1,203 +0,0 @@ -From 3552691616c940a7c4125c2678ba816653cd725e Mon Sep 17 00:00:00 2001 -From: Jeff Kletsky -Date: Tue, 18 Jun 2019 10:08:05 -0700 -Subject: [PATCH] mtd: spinand: Add initial support for Paragon PN26G0xA - -Add initial support for Paragon Technology -PN26G01Axxxxx and PN26G02Axxxxx SPI NAND - -Datasheets available at -http://www.xtxtech.com/upfile/2016082517274590.pdf -http://www.xtxtech.com/upfile/2016082517282329.pdf - -Signed-off-by: Jeff Kletsky -Reviewed-by: Frieder Schrempf -Signed-off-by: Miquel Raynal - -ADOPTED FROM UPSTREAM due to upstream commit 377e517b5fa5 in Linux 5.2 - which added another parameter to NAND_MEMORG ---- - drivers/mtd/nand/spi/Makefile | 2 +- - drivers/mtd/nand/spi/core.c | 1 + - drivers/mtd/nand/spi/paragon.c | 147 +++++++++++++++++++++++++++++++++ - include/linux/mtd/spinand.h | 1 + - 4 files changed, 150 insertions(+), 1 deletion(-) - create mode 100644 drivers/mtd/nand/spi/paragon.c - ---- a/drivers/mtd/nand/spi/Makefile -+++ b/drivers/mtd/nand/spi/Makefile -@@ -1,3 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0 --spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o -+spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o - obj-$(CONFIG_MTD_SPI_NAND) += spinand.o ---- a/drivers/mtd/nand/spi/core.c -+++ b/drivers/mtd/nand/spi/core.c -@@ -763,6 +763,7 @@ static const struct spinand_manufacturer - &gigadevice_spinand_manufacturer, - ¯onix_spinand_manufacturer, - µn_spinand_manufacturer, -+ ¶gon_spinand_manufacturer, - &toshiba_spinand_manufacturer, - &winbond_spinand_manufacturer, - }; ---- /dev/null -+++ b/drivers/mtd/nand/spi/paragon.c -@@ -0,0 +1,147 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2019 Jeff Kletsky -+ * -+ * Author: Jeff Kletsky -+ */ -+ -+#include -+#include -+#include -+ -+ -+#define SPINAND_MFR_PARAGON 0xa1 -+ -+ -+#define PN26G0XA_STATUS_ECC_BITMASK (3 << 4) -+ -+#define PN26G0XA_STATUS_ECC_NONE_DETECTED (0 << 4) -+#define PN26G0XA_STATUS_ECC_1_7_CORRECTED (1 << 4) -+#define PN26G0XA_STATUS_ECC_ERRORED (2 << 4) -+#define PN26G0XA_STATUS_ECC_8_CORRECTED (3 << 4) -+ -+ -+static SPINAND_OP_VARIANTS(read_cache_variants, -+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), -+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); -+ -+static SPINAND_OP_VARIANTS(write_cache_variants, -+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), -+ SPINAND_PROG_LOAD(true, 0, NULL, 0)); -+ -+static SPINAND_OP_VARIANTS(update_cache_variants, -+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), -+ SPINAND_PROG_LOAD(false, 0, NULL, 0)); -+ -+ -+static int pn26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section > 3) -+ return -ERANGE; -+ -+ region->offset = 6 + (15 * section); /* 4 BBM + 2 user bytes */ -+ region->length = 13; -+ -+ return 0; -+} -+ -+static int pn26g0xa_ooblayout_free(struct mtd_info *mtd, int section, -+ struct mtd_oob_region *region) -+{ -+ if (section > 4) -+ return -ERANGE; -+ -+ if (section == 4) { -+ region->offset = 64; -+ region->length = 64; -+ } else { -+ region->offset = 4 + (15 * section); -+ region->length = 2; -+ } -+ -+ return 0; -+} -+ -+static int pn26g0xa_ecc_get_status(struct spinand_device *spinand, -+ u8 status) -+{ -+ switch (status & PN26G0XA_STATUS_ECC_BITMASK) { -+ case PN26G0XA_STATUS_ECC_NONE_DETECTED: -+ return 0; -+ -+ case PN26G0XA_STATUS_ECC_1_7_CORRECTED: -+ return 7; /* Return upper limit by convention */ -+ -+ case PN26G0XA_STATUS_ECC_8_CORRECTED: -+ return 8; -+ -+ case PN26G0XA_STATUS_ECC_ERRORED: -+ return -EBADMSG; -+ -+ default: -+ break; -+ } -+ -+ return -EINVAL; -+} -+ -+static const struct mtd_ooblayout_ops pn26g0xa_ooblayout = { -+ .ecc = pn26g0xa_ooblayout_ecc, -+ .free = pn26g0xa_ooblayout_free, -+}; -+ -+ -+static const struct spinand_info paragon_spinand_table[] = { -+ SPINAND_INFO("PN26G01A", 0xe1, -+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&pn26g0xa_ooblayout, -+ pn26g0xa_ecc_get_status)), -+ SPINAND_INFO("PN26G02A", 0xe2, -+ NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), -+ NAND_ECCREQ(8, 512), -+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, -+ &write_cache_variants, -+ &update_cache_variants), -+ 0, -+ SPINAND_ECCINFO(&pn26g0xa_ooblayout, -+ pn26g0xa_ecc_get_status)), -+}; -+ -+static int paragon_spinand_detect(struct spinand_device *spinand) -+{ -+ u8 *id = spinand->id.data; -+ int ret; -+ -+ /* Read ID returns [0][MID][DID] */ -+ -+ if (id[1] != SPINAND_MFR_PARAGON) -+ return 0; -+ -+ ret = spinand_match_and_init(spinand, paragon_spinand_table, -+ ARRAY_SIZE(paragon_spinand_table), -+ id[2]); -+ if (ret) -+ return ret; -+ -+ return 1; -+} -+ -+static const struct spinand_manufacturer_ops paragon_spinand_manuf_ops = { -+ .detect = paragon_spinand_detect, -+}; -+ -+const struct spinand_manufacturer paragon_spinand_manufacturer = { -+ .id = SPINAND_MFR_PARAGON, -+ .name = "Paragon", -+ .ops = ¶gon_spinand_manuf_ops, -+}; ---- a/include/linux/mtd/spinand.h -+++ b/include/linux/mtd/spinand.h -@@ -227,6 +227,7 @@ struct spinand_manufacturer { - extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; - extern const struct spinand_manufacturer macronix_spinand_manufacturer; - extern const struct spinand_manufacturer micron_spinand_manufacturer; -+extern const struct spinand_manufacturer paragon_spinand_manufacturer; - extern const struct spinand_manufacturer toshiba_spinand_manufacturer; - extern const struct spinand_manufacturer winbond_spinand_manufacturer; - diff --git a/target/linux/generic/backport-4.19/464-v5.6-mtd-spi-nor-Add-4B_OPCODES-flag-to-w25q256.patch b/target/linux/generic/backport-4.19/464-v5.6-mtd-spi-nor-Add-4B_OPCODES-flag-to-w25q256.patch deleted file mode 100644 index db9f379c81..0000000000 --- a/target/linux/generic/backport-4.19/464-v5.6-mtd-spi-nor-Add-4B_OPCODES-flag-to-w25q256.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 10050a02f7d508fa88f70fcfceefbacd13488ca7 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Mon, 23 Dec 2019 17:05:49 +0200 -Subject: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to w25q256 - -The w25q256 supports 4-byte opcodes so lets add the flag. -Tested on OpenWrt under 4.19.82 kernel on 8devices Habanero. - -Signed-off-by: Robert Marko -Signed-off-by: Tudor Ambarus ---- - drivers/mtd/spi-nor/spi-nor.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1244,7 +1244,9 @@ static const struct flash_info spi_nor_i - { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, - { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, - { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, -- { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, -+ { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, -+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | -+ SPI_NOR_4B_OPCODES) }, - { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, - SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, - diff --git a/target/linux/generic/backport-4.19/499-v4.22-iio-add-IIO_MASSCONCENTRATION-channel-type.patch b/target/linux/generic/backport-4.19/499-v4.22-iio-add-IIO_MASSCONCENTRATION-channel-type.patch deleted file mode 100644 index bceb735146..0000000000 --- a/target/linux/generic/backport-4.19/499-v4.22-iio-add-IIO_MASSCONCENTRATION-channel-type.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 17abc9ec68b73ddeb262a507a62421016b9c54d5 Mon Sep 17 00:00:00 2001 -From: Tomasz Duszynski -Date: Fri, 14 Dec 2018 19:28:01 +0100 -Subject: [PATCH] iio: add IIO_MASSCONCENTRATION channel type - -Measuring particulate matter in ug / m3 (micro-grams per cubic meter) -is de facto standard. Existing air quality sensors usually follow -this convention and are capable of returning measurements using -this unit. - -IIO currently does not offer suitable channel type for this -type of measurements hence this patch adds this. - -In addition, extra modifiers are introduced used for distinguishing -between fine pm1, pm2p5 and coarse pm4, pm10 particle measurements, i.e -IIO_MOD_PM1, IIO_MOD_PM25 and IIO_MOD_PM4, IIO_MOD_PM10. - -pmX consists of particles with aerodynamic diameter less or equal to -X micrometers. - -Signed-off-by: Tomasz Duszynski -Acked-by: Matt Ranostay -Signed-off-by: Jonathan Cameron ---- - Documentation/ABI/testing/sysfs-bus-iio | 17 ++++++++++++++++- - drivers/iio/industrialio-core.c | 5 +++++ - include/uapi/linux/iio/types.h | 5 +++++ - tools/iio/iio_event_monitor.c | 10 ++++++++++ - 4 files changed, 36 insertions(+), 1 deletion(-) - ---- a/Documentation/ABI/testing/sysfs-bus-iio -+++ b/Documentation/ABI/testing/sysfs-bus-iio -@@ -1684,4 +1684,19 @@ KernelVersion: 4.18 - Contact: linux-iio@vger.kernel.org - Description: - Raw (unscaled) phase difference reading from channel Y -- that can be processed to radians. -\ No newline at end of file -+ that can be processed to radians. -+ -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentration_pm1_input -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentrationY_pm1_input -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentration_pm2p5_input -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentrationY_pm2p5_input -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentration_pm4_input -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentrationY_pm4_input -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentration_pm10_input -+What: /sys/bus/iio/devices/iio:deviceX/in_massconcentrationY_pm10_input -+KernelVersion: 4.22 -+Contact: linux-iio@vger.kernel.org -+Description: -+ Mass concentration reading of particulate matter in ug / m3. -+ pmX consists of particles with aerodynamic diameter less or -+ equal to X micrometers. ---- a/drivers/iio/industrialio-core.c -+++ b/drivers/iio/industrialio-core.c -@@ -87,6 +87,7 @@ static const char * const iio_chan_type_ - [IIO_GRAVITY] = "gravity", - [IIO_POSITIONRELATIVE] = "positionrelative", - [IIO_PHASE] = "phase", -+ [IIO_MASSCONCENTRATION] = "massconcentration", - }; - - static const char * const iio_modifier_names[] = { -@@ -127,6 +128,10 @@ static const char * const iio_modifier_n - [IIO_MOD_Q] = "q", - [IIO_MOD_CO2] = "co2", - [IIO_MOD_VOC] = "voc", -+ [IIO_MOD_PM1] = "pm1", -+ [IIO_MOD_PM2P5] = "pm2p5", -+ [IIO_MOD_PM4] = "pm4", -+ [IIO_MOD_PM10] = "pm10", - }; - - /* relies on pairs of these shared then separate */ ---- a/include/uapi/linux/iio/types.h -+++ b/include/uapi/linux/iio/types.h -@@ -46,6 +46,7 @@ enum iio_chan_type { - IIO_GRAVITY, - IIO_POSITIONRELATIVE, - IIO_PHASE, -+ IIO_MASSCONCENTRATION, - }; - - enum iio_modifier { -@@ -87,6 +88,10 @@ enum iio_modifier { - IIO_MOD_VOC, - IIO_MOD_LIGHT_UV, - IIO_MOD_LIGHT_DUV, -+ IIO_MOD_PM1, -+ IIO_MOD_PM2P5, -+ IIO_MOD_PM4, -+ IIO_MOD_PM10, - }; - - enum iio_event_type { ---- a/tools/iio/iio_event_monitor.c -+++ b/tools/iio/iio_event_monitor.c -@@ -60,6 +60,7 @@ static const char * const iio_chan_type_ - [IIO_GRAVITY] = "gravity", - [IIO_POSITIONRELATIVE] = "positionrelative", - [IIO_PHASE] = "phase", -+ [IIO_MASSCONCENTRATION] = "massconcentration", - }; - - static const char * const iio_ev_type_text[] = { -@@ -115,6 +116,10 @@ static const char * const iio_modifier_n - [IIO_MOD_Q] = "q", - [IIO_MOD_CO2] = "co2", - [IIO_MOD_VOC] = "voc", -+ [IIO_MOD_PM1] = "pm1", -+ [IIO_MOD_PM2P5] = "pm2p5", -+ [IIO_MOD_PM4] = "pm4", -+ [IIO_MOD_PM10] = "pm10", - }; - - static bool event_is_known(struct iio_event_data *event) -@@ -156,6 +161,7 @@ static bool event_is_known(struct iio_ev - case IIO_GRAVITY: - case IIO_POSITIONRELATIVE: - case IIO_PHASE: -+ case IIO_MASSCONCENTRATION: - break; - default: - return false; -@@ -200,6 +206,10 @@ static bool event_is_known(struct iio_ev - case IIO_MOD_Q: - case IIO_MOD_CO2: - case IIO_MOD_VOC: -+ case IIO_MOD_PM1: -+ case IIO_MOD_PM2P5: -+ case IIO_MOD_PM4: -+ case IIO_MOD_PM10: - break; - default: - return false; diff --git a/target/linux/generic/backport-4.19/500-v5.1-iio-chemical-add-support-for-Sensirion-SPS30-sensor.patch b/target/linux/generic/backport-4.19/500-v5.1-iio-chemical-add-support-for-Sensirion-SPS30-sensor.patch deleted file mode 100644 index d30c7c3cc1..0000000000 --- a/target/linux/generic/backport-4.19/500-v5.1-iio-chemical-add-support-for-Sensirion-SPS30-sensor.patch +++ /dev/null @@ -1,454 +0,0 @@ -From 232e0f6ddeaee104d64675fe7d0cc142cf955f35 Mon Sep 17 00:00:00 2001 -From: Tomasz Duszynski -Date: Fri, 14 Dec 2018 19:28:02 +0100 -Subject: [PATCH] iio: chemical: add support for Sensirion SPS30 sensor - -Add support for Sensirion SPS30 particulate matter sensor. - -Signed-off-by: Tomasz Duszynski -Signed-off-by: Jonathan Cameron ---- - drivers/iio/chemical/Kconfig | 11 + - drivers/iio/chemical/Makefile | 1 + - drivers/iio/chemical/sps30.c | 407 ++++++++++++++++++++++++++++++++++ - 3 files changed, 419 insertions(+) - create mode 100644 drivers/iio/chemical/sps30.c - ---- a/drivers/iio/chemical/Kconfig -+++ b/drivers/iio/chemical/Kconfig -@@ -61,6 +61,17 @@ config IAQCORE - iAQ-Core Continuous/Pulsed VOC (Volatile Organic Compounds) - sensors - -+config SPS30 -+ tristate "SPS30 particulate matter sensor" -+ depends on I2C -+ select CRC8 -+ help -+ Say Y here to build support for the Sensirion SPS30 particulate -+ matter sensor. -+ -+ To compile this driver as a module, choose M here: the module will -+ be called sps30. -+ - config VZ89X - tristate "SGX Sensortech MiCS VZ89X VOC sensor" - depends on I2C ---- a/drivers/iio/chemical/Makefile -+++ b/drivers/iio/chemical/Makefile -@@ -9,4 +9,5 @@ obj-$(CONFIG_BME680_I2C) += bme680_i2c.o - obj-$(CONFIG_BME680_SPI) += bme680_spi.o - obj-$(CONFIG_CCS811) += ccs811.o - obj-$(CONFIG_IAQCORE) += ams-iaq-core.o -+obj-$(CONFIG_SPS30) += sps30.o - obj-$(CONFIG_VZ89X) += vz89x.o ---- /dev/null -+++ b/drivers/iio/chemical/sps30.c -@@ -0,0 +1,407 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Sensirion SPS30 particulate matter sensor driver -+ * -+ * Copyright (c) Tomasz Duszynski -+ * -+ * I2C slave address: 0x69 -+ * -+ * TODO: -+ * - support for turning on fan cleaning -+ * - support for reading/setting auto cleaning interval -+ */ -+ -+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define SPS30_CRC8_POLYNOMIAL 0x31 -+/* max number of bytes needed to store PM measurements or serial string */ -+#define SPS30_MAX_READ_SIZE 48 -+/* sensor measures reliably up to 3000 ug / m3 */ -+#define SPS30_MAX_PM 3000 -+ -+/* SPS30 commands */ -+#define SPS30_START_MEAS 0x0010 -+#define SPS30_STOP_MEAS 0x0104 -+#define SPS30_RESET 0xd304 -+#define SPS30_READ_DATA_READY_FLAG 0x0202 -+#define SPS30_READ_DATA 0x0300 -+#define SPS30_READ_SERIAL 0xd033 -+ -+enum { -+ PM1, -+ PM2P5, -+ PM4, -+ PM10, -+}; -+ -+struct sps30_state { -+ struct i2c_client *client; -+ /* -+ * Guards against concurrent access to sensor registers. -+ * Must be held whenever sequence of commands is to be executed. -+ */ -+ struct mutex lock; -+}; -+ -+DECLARE_CRC8_TABLE(sps30_crc8_table); -+ -+static int sps30_write_then_read(struct sps30_state *state, u8 *txbuf, -+ int txsize, u8 *rxbuf, int rxsize) -+{ -+ int ret; -+ -+ /* -+ * Sensor does not support repeated start so instead of -+ * sending two i2c messages in a row we just send one by one. -+ */ -+ ret = i2c_master_send(state->client, txbuf, txsize); -+ if (ret != txsize) -+ return ret < 0 ? ret : -EIO; -+ -+ if (!rxbuf) -+ return 0; -+ -+ ret = i2c_master_recv(state->client, rxbuf, rxsize); -+ if (ret != rxsize) -+ return ret < 0 ? ret : -EIO; -+ -+ return 0; -+} -+ -+static int sps30_do_cmd(struct sps30_state *state, u16 cmd, u8 *data, int size) -+{ -+ /* -+ * Internally sensor stores measurements in a following manner: -+ * -+ * PM1: upper two bytes, crc8, lower two bytes, crc8 -+ * PM2P5: upper two bytes, crc8, lower two bytes, crc8 -+ * PM4: upper two bytes, crc8, lower two bytes, crc8 -+ * PM10: upper two bytes, crc8, lower two bytes, crc8 -+ * -+ * What follows next are number concentration measurements and -+ * typical particle size measurement which we omit. -+ */ -+ u8 buf[SPS30_MAX_READ_SIZE] = { cmd >> 8, cmd }; -+ int i, ret = 0; -+ -+ switch (cmd) { -+ case SPS30_START_MEAS: -+ buf[2] = 0x03; -+ buf[3] = 0x00; -+ buf[4] = crc8(sps30_crc8_table, &buf[2], 2, CRC8_INIT_VALUE); -+ ret = sps30_write_then_read(state, buf, 5, NULL, 0); -+ break; -+ case SPS30_STOP_MEAS: -+ case SPS30_RESET: -+ ret = sps30_write_then_read(state, buf, 2, NULL, 0); -+ break; -+ case SPS30_READ_DATA_READY_FLAG: -+ case SPS30_READ_DATA: -+ case SPS30_READ_SERIAL: -+ /* every two data bytes are checksummed */ -+ size += size / 2; -+ ret = sps30_write_then_read(state, buf, 2, buf, size); -+ break; -+ } -+ -+ if (ret) -+ return ret; -+ -+ /* validate received data and strip off crc bytes */ -+ for (i = 0; i < size; i += 3) { -+ u8 crc = crc8(sps30_crc8_table, &buf[i], 2, CRC8_INIT_VALUE); -+ -+ if (crc != buf[i + 2]) { -+ dev_err(&state->client->dev, -+ "data integrity check failed\n"); -+ return -EIO; -+ } -+ -+ *data++ = buf[i]; -+ *data++ = buf[i + 1]; -+ } -+ -+ return 0; -+} -+ -+static s32 sps30_float_to_int_clamped(const u8 *fp) -+{ -+ int val = get_unaligned_be32(fp); -+ int mantissa = val & GENMASK(22, 0); -+ /* this is fine since passed float is always non-negative */ -+ int exp = val >> 23; -+ int fraction, shift; -+ -+ /* special case 0 */ -+ if (!exp && !mantissa) -+ return 0; -+ -+ exp -= 127; -+ if (exp < 0) { -+ /* return values ranging from 1 to 99 */ -+ return ((((1 << 23) + mantissa) * 100) >> 23) >> (-exp); -+ } -+ -+ /* return values ranging from 100 to 300000 */ -+ shift = 23 - exp; -+ val = (1 << exp) + (mantissa >> shift); -+ if (val >= SPS30_MAX_PM) -+ return SPS30_MAX_PM * 100; -+ -+ fraction = mantissa & GENMASK(shift - 1, 0); -+ -+ return val * 100 + ((fraction * 100) >> shift); -+} -+ -+static int sps30_do_meas(struct sps30_state *state, s32 *data, int size) -+{ -+ int i, ret, tries = 5; -+ u8 tmp[16]; -+ -+ while (tries--) { -+ ret = sps30_do_cmd(state, SPS30_READ_DATA_READY_FLAG, tmp, 2); -+ if (ret) -+ return -EIO; -+ -+ /* new measurements ready to be read */ -+ if (tmp[1] == 1) -+ break; -+ -+ msleep_interruptible(300); -+ } -+ -+ if (!tries) -+ return -ETIMEDOUT; -+ -+ ret = sps30_do_cmd(state, SPS30_READ_DATA, tmp, sizeof(int) * size); -+ if (ret) -+ return ret; -+ -+ for (i = 0; i < size; i++) -+ data[i] = sps30_float_to_int_clamped(&tmp[4 * i]); -+ -+ return 0; -+} -+ -+static irqreturn_t sps30_trigger_handler(int irq, void *p) -+{ -+ struct iio_poll_func *pf = p; -+ struct iio_dev *indio_dev = pf->indio_dev; -+ struct sps30_state *state = iio_priv(indio_dev); -+ int ret; -+ s32 data[4 + 2]; /* PM1, PM2P5, PM4, PM10, timestamp */ -+ -+ mutex_lock(&state->lock); -+ ret = sps30_do_meas(state, data, 4); -+ mutex_unlock(&state->lock); -+ if (ret) -+ goto err; -+ -+ iio_push_to_buffers_with_timestamp(indio_dev, data, -+ iio_get_time_ns(indio_dev)); -+err: -+ iio_trigger_notify_done(indio_dev->trig); -+ -+ return IRQ_HANDLED; -+} -+ -+static int sps30_read_raw(struct iio_dev *indio_dev, -+ struct iio_chan_spec const *chan, -+ int *val, int *val2, long mask) -+{ -+ struct sps30_state *state = iio_priv(indio_dev); -+ int data[4], ret = -EINVAL; -+ -+ switch (mask) { -+ case IIO_CHAN_INFO_PROCESSED: -+ switch (chan->type) { -+ case IIO_MASSCONCENTRATION: -+ mutex_lock(&state->lock); -+ /* read up to the number of bytes actually needed */ -+ switch (chan->channel2) { -+ case IIO_MOD_PM1: -+ ret = sps30_do_meas(state, data, 1); -+ break; -+ case IIO_MOD_PM2P5: -+ ret = sps30_do_meas(state, data, 2); -+ break; -+ case IIO_MOD_PM4: -+ ret = sps30_do_meas(state, data, 3); -+ break; -+ case IIO_MOD_PM10: -+ ret = sps30_do_meas(state, data, 4); -+ break; -+ } -+ mutex_unlock(&state->lock); -+ if (ret) -+ return ret; -+ -+ *val = data[chan->address] / 100; -+ *val2 = (data[chan->address] % 100) * 10000; -+ -+ return IIO_VAL_INT_PLUS_MICRO; -+ default: -+ return -EINVAL; -+ } -+ case IIO_CHAN_INFO_SCALE: -+ switch (chan->type) { -+ case IIO_MASSCONCENTRATION: -+ switch (chan->channel2) { -+ case IIO_MOD_PM1: -+ case IIO_MOD_PM2P5: -+ case IIO_MOD_PM4: -+ case IIO_MOD_PM10: -+ *val = 0; -+ *val2 = 10000; -+ -+ return IIO_VAL_INT_PLUS_MICRO; -+ } -+ default: -+ return -EINVAL; -+ } -+ } -+ -+ return -EINVAL; -+} -+ -+static const struct iio_info sps30_info = { -+ .read_raw = sps30_read_raw, -+}; -+ -+#define SPS30_CHAN(_index, _mod) { \ -+ .type = IIO_MASSCONCENTRATION, \ -+ .modified = 1, \ -+ .channel2 = IIO_MOD_ ## _mod, \ -+ .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \ -+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ -+ .address = _mod, \ -+ .scan_index = _index, \ -+ .scan_type = { \ -+ .sign = 'u', \ -+ .realbits = 19, \ -+ .storagebits = 32, \ -+ .endianness = IIO_CPU, \ -+ }, \ -+} -+ -+static const struct iio_chan_spec sps30_channels[] = { -+ SPS30_CHAN(0, PM1), -+ SPS30_CHAN(1, PM2P5), -+ SPS30_CHAN(2, PM4), -+ SPS30_CHAN(3, PM10), -+ IIO_CHAN_SOFT_TIMESTAMP(4), -+}; -+ -+static void sps30_stop_meas(void *data) -+{ -+ struct sps30_state *state = data; -+ -+ sps30_do_cmd(state, SPS30_STOP_MEAS, NULL, 0); -+} -+ -+static const unsigned long sps30_scan_masks[] = { 0x0f, 0x00 }; -+ -+static int sps30_probe(struct i2c_client *client) -+{ -+ struct iio_dev *indio_dev; -+ struct sps30_state *state; -+ u8 buf[32]; -+ int ret; -+ -+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) -+ return -EOPNOTSUPP; -+ -+ indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*state)); -+ if (!indio_dev) -+ return -ENOMEM; -+ -+ state = iio_priv(indio_dev); -+ i2c_set_clientdata(client, indio_dev); -+ state->client = client; -+ indio_dev->dev.parent = &client->dev; -+ indio_dev->info = &sps30_info; -+ indio_dev->name = client->name; -+ indio_dev->channels = sps30_channels; -+ indio_dev->num_channels = ARRAY_SIZE(sps30_channels); -+ indio_dev->modes = INDIO_DIRECT_MODE; -+ indio_dev->available_scan_masks = sps30_scan_masks; -+ -+ mutex_init(&state->lock); -+ crc8_populate_msb(sps30_crc8_table, SPS30_CRC8_POLYNOMIAL); -+ -+ ret = sps30_do_cmd(state, SPS30_RESET, NULL, 0); -+ if (ret) { -+ dev_err(&client->dev, "failed to reset device\n"); -+ return ret; -+ } -+ msleep(300); -+ /* -+ * Power-on-reset causes sensor to produce some glitch on i2c bus and -+ * some controllers end up in error state. Recover simply by placing -+ * some data on the bus, for example STOP_MEAS command, which -+ * is NOP in this case. -+ */ -+ sps30_do_cmd(state, SPS30_STOP_MEAS, NULL, 0); -+ -+ ret = sps30_do_cmd(state, SPS30_READ_SERIAL, buf, sizeof(buf)); -+ if (ret) { -+ dev_err(&client->dev, "failed to read serial number\n"); -+ return ret; -+ } -+ /* returned serial number is already NUL terminated */ -+ dev_info(&client->dev, "serial number: %s\n", buf); -+ -+ ret = sps30_do_cmd(state, SPS30_START_MEAS, NULL, 0); -+ if (ret) { -+ dev_err(&client->dev, "failed to start measurement\n"); -+ return ret; -+ } -+ -+ ret = devm_add_action_or_reset(&client->dev, sps30_stop_meas, state); -+ if (ret) -+ return ret; -+ -+ ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL, -+ sps30_trigger_handler, NULL); -+ if (ret) -+ return ret; -+ -+ return devm_iio_device_register(&client->dev, indio_dev); -+} -+ -+static const struct i2c_device_id sps30_id[] = { -+ { "sps30" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, sps30_id); -+ -+static const struct of_device_id sps30_of_match[] = { -+ { .compatible = "sensirion,sps30" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, sps30_of_match); -+ -+static struct i2c_driver sps30_driver = { -+ .driver = { -+ .name = "sps30", -+ .of_match_table = sps30_of_match, -+ }, -+ .id_table = sps30_id, -+ .probe_new = sps30_probe, -+}; -+module_i2c_driver(sps30_driver); -+ -+MODULE_AUTHOR("Tomasz Duszynski "); -+MODULE_DESCRIPTION("Sensirion SPS30 particulate matter sensor driver"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/generic/backport-4.19/501-v5.1-iio-chemical-sps30-add-support-for-self-cleaning.patch b/target/linux/generic/backport-4.19/501-v5.1-iio-chemical-sps30-add-support-for-self-cleaning.patch deleted file mode 100644 index 7054fb0313..0000000000 --- a/target/linux/generic/backport-4.19/501-v5.1-iio-chemical-sps30-add-support-for-self-cleaning.patch +++ /dev/null @@ -1,100 +0,0 @@ -From c546d49656143855093c7b7fde60866e6e23a69d Mon Sep 17 00:00:00 2001 -From: Tomasz Duszynski -Date: Tue, 18 Dec 2018 21:28:09 +0100 -Subject: [PATCH] iio: chemical: sps30: add support for self cleaning - -Self cleaning is especially useful in cases where sensor undergoes -frequent power on/off cycles. In such scenarios it is recommended to -turn self cleaning at least once per week in order to maintain reliable -measurements. - -Self cleaning is activated by writing 1 to a dedicated attribute. -Internal fan accelerates to its maximum speed and keeps spinning -for about 10 seconds blowing out accumulated dust. - -Signed-off-by: Tomasz Duszynski -Tested-by: Andreas Brauchli -Signed-off-by: Jonathan Cameron ---- - Documentation/ABI/testing/sysfs-bus-iio-sps30 | 8 +++++ - drivers/iio/chemical/sps30.c | 35 ++++++++++++++++++- - 2 files changed, 42 insertions(+), 1 deletion(-) - create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-sps30 - ---- /dev/null -+++ b/Documentation/ABI/testing/sysfs-bus-iio-sps30 -@@ -0,0 +1,8 @@ -+What: /sys/bus/iio/devices/iio:deviceX/start_cleaning -+Date: December 2018 -+KernelVersion: 4.22 -+Contact: linux-iio@vger.kernel.org -+Description: -+ Writing 1 starts sensor self cleaning. Internal fan accelerates -+ to its maximum speed and keeps spinning for about 10 seconds in -+ order to blow out accumulated dust. ---- a/drivers/iio/chemical/sps30.c -+++ b/drivers/iio/chemical/sps30.c -@@ -7,7 +7,6 @@ - * I2C slave address: 0x69 - * - * TODO: -- * - support for turning on fan cleaning - * - support for reading/setting auto cleaning interval - */ - -@@ -37,6 +36,7 @@ - #define SPS30_READ_DATA_READY_FLAG 0x0202 - #define SPS30_READ_DATA 0x0300 - #define SPS30_READ_SERIAL 0xd033 -+#define SPS30_START_FAN_CLEANING 0x5607 - - enum { - PM1, -@@ -104,6 +104,7 @@ static int sps30_do_cmd(struct sps30_sta - break; - case SPS30_STOP_MEAS: - case SPS30_RESET: -+ case SPS30_START_FAN_CLEANING: - ret = sps30_write_then_read(state, buf, 2, NULL, 0); - break; - case SPS30_READ_DATA_READY_FLAG: -@@ -275,7 +276,39 @@ static int sps30_read_raw(struct iio_dev - return -EINVAL; - } - -+static ssize_t start_cleaning_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct iio_dev *indio_dev = dev_to_iio_dev(dev); -+ struct sps30_state *state = iio_priv(indio_dev); -+ int val, ret; -+ -+ if (kstrtoint(buf, 0, &val) || val != 1) -+ return -EINVAL; -+ -+ mutex_lock(&state->lock); -+ ret = sps30_do_cmd(state, SPS30_START_FAN_CLEANING, NULL, 0); -+ mutex_unlock(&state->lock); -+ if (ret) -+ return ret; -+ -+ return len; -+} -+ -+static IIO_DEVICE_ATTR_WO(start_cleaning, 0); -+ -+static struct attribute *sps30_attrs[] = { -+ &iio_dev_attr_start_cleaning.dev_attr.attr, -+ NULL -+}; -+ -+static const struct attribute_group sps30_attr_group = { -+ .attrs = sps30_attrs, -+}; -+ - static const struct iio_info sps30_info = { -+ .attrs = &sps30_attr_group, - .read_raw = sps30_read_raw, - }; - diff --git a/target/linux/generic/backport-4.19/502-v5.1-iio-chemical-sps30-allow-changing-self-cleaning-peri.patch b/target/linux/generic/backport-4.19/502-v5.1-iio-chemical-sps30-allow-changing-self-cleaning-peri.patch deleted file mode 100644 index 3a1335ba44..0000000000 --- a/target/linux/generic/backport-4.19/502-v5.1-iio-chemical-sps30-allow-changing-self-cleaning-peri.patch +++ /dev/null @@ -1,293 +0,0 @@ -From 62129a0849d27cc94ced832bcf9dcde283dcbe08 Mon Sep 17 00:00:00 2001 -From: Tomasz Duszynski -Date: Tue, 15 Jan 2019 20:00:06 +0100 -Subject: [PATCH] iio: chemical: sps30: allow changing self cleaning period - -Sensor can periodically trigger self cleaning. Period can be changed by -writing a new value to a dedicated attribute. Upon attribute read -current period gets returned. - -Signed-off-by: Tomasz Duszynski -Signed-off-by: Jonathan Cameron ---- - Documentation/ABI/testing/sysfs-bus-iio-sps30 | 20 +++ - drivers/iio/chemical/sps30.c | 143 +++++++++++++++--- - 2 files changed, 145 insertions(+), 18 deletions(-) - ---- a/Documentation/ABI/testing/sysfs-bus-iio-sps30 -+++ b/Documentation/ABI/testing/sysfs-bus-iio-sps30 -@@ -6,3 +6,23 @@ Description: - Writing 1 starts sensor self cleaning. Internal fan accelerates - to its maximum speed and keeps spinning for about 10 seconds in - order to blow out accumulated dust. -+ -+What: /sys/bus/iio/devices/iio:deviceX/cleaning_period -+Date: January 2019 -+KernelVersion: 5.1 -+Contact: linux-iio@vger.kernel.org -+Description: -+ Sensor is capable of triggering self cleaning periodically. -+ Period can be changed by writing a new value here. Upon reading -+ the current one is returned. Units are seconds. -+ -+ Writing 0 disables periodical self cleaning entirely. -+ -+What: /sys/bus/iio/devices/iio:deviceX/cleaning_period_available -+Date: January 2019 -+KernelVersion: 5.1 -+Contact: linux-iio@vger.kernel.org -+Description: -+ The range of available values in seconds represented as the -+ minimum value, the step and the maximum value, all enclosed in -+ square brackets. ---- a/drivers/iio/chemical/sps30.c -+++ b/drivers/iio/chemical/sps30.c -@@ -5,9 +5,6 @@ - * Copyright (c) Tomasz Duszynski - * - * I2C slave address: 0x69 -- * -- * TODO: -- * - support for reading/setting auto cleaning interval - */ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -@@ -21,6 +18,7 @@ - #include - #include - #include -+#include - #include - - #define SPS30_CRC8_POLYNOMIAL 0x31 -@@ -28,6 +26,9 @@ - #define SPS30_MAX_READ_SIZE 48 - /* sensor measures reliably up to 3000 ug / m3 */ - #define SPS30_MAX_PM 3000 -+/* minimum and maximum self cleaning periods in seconds */ -+#define SPS30_AUTO_CLEANING_PERIOD_MIN 0 -+#define SPS30_AUTO_CLEANING_PERIOD_MAX 604800 - - /* SPS30 commands */ - #define SPS30_START_MEAS 0x0010 -@@ -37,6 +38,9 @@ - #define SPS30_READ_DATA 0x0300 - #define SPS30_READ_SERIAL 0xd033 - #define SPS30_START_FAN_CLEANING 0x5607 -+#define SPS30_AUTO_CLEANING_PERIOD 0x8004 -+/* not a sensor command per se, used only to distinguish write from read */ -+#define SPS30_READ_AUTO_CLEANING_PERIOD 0x8005 - - enum { - PM1, -@@ -45,6 +49,11 @@ enum { - PM10, - }; - -+enum { -+ RESET, -+ MEASURING, -+}; -+ - struct sps30_state { - struct i2c_client *client; - /* -@@ -52,6 +61,7 @@ struct sps30_state { - * Must be held whenever sequence of commands is to be executed. - */ - struct mutex lock; -+ int state; - }; - - DECLARE_CRC8_TABLE(sps30_crc8_table); -@@ -107,6 +117,9 @@ static int sps30_do_cmd(struct sps30_sta - case SPS30_START_FAN_CLEANING: - ret = sps30_write_then_read(state, buf, 2, NULL, 0); - break; -+ case SPS30_READ_AUTO_CLEANING_PERIOD: -+ buf[0] = SPS30_AUTO_CLEANING_PERIOD >> 8; -+ buf[1] = (u8)SPS30_AUTO_CLEANING_PERIOD; - case SPS30_READ_DATA_READY_FLAG: - case SPS30_READ_DATA: - case SPS30_READ_SERIAL: -@@ -114,6 +127,15 @@ static int sps30_do_cmd(struct sps30_sta - size += size / 2; - ret = sps30_write_then_read(state, buf, 2, buf, size); - break; -+ case SPS30_AUTO_CLEANING_PERIOD: -+ buf[2] = data[0]; -+ buf[3] = data[1]; -+ buf[4] = crc8(sps30_crc8_table, &buf[2], 2, CRC8_INIT_VALUE); -+ buf[5] = data[2]; -+ buf[6] = data[3]; -+ buf[7] = crc8(sps30_crc8_table, &buf[5], 2, CRC8_INIT_VALUE); -+ ret = sps30_write_then_read(state, buf, 8, NULL, 0); -+ break; - } - - if (ret) -@@ -170,6 +192,14 @@ static int sps30_do_meas(struct sps30_st - int i, ret, tries = 5; - u8 tmp[16]; - -+ if (state->state == RESET) { -+ ret = sps30_do_cmd(state, SPS30_START_MEAS, NULL, 0); -+ if (ret) -+ return ret; -+ -+ state->state = MEASURING; -+ } -+ - while (tries--) { - ret = sps30_do_cmd(state, SPS30_READ_DATA_READY_FLAG, tmp, 2); - if (ret) -@@ -276,6 +306,24 @@ static int sps30_read_raw(struct iio_dev - return -EINVAL; - } - -+static int sps30_do_cmd_reset(struct sps30_state *state) -+{ -+ int ret; -+ -+ ret = sps30_do_cmd(state, SPS30_RESET, NULL, 0); -+ msleep(300); -+ /* -+ * Power-on-reset causes sensor to produce some glitch on i2c bus and -+ * some controllers end up in error state. Recover simply by placing -+ * some data on the bus, for example STOP_MEAS command, which -+ * is NOP in this case. -+ */ -+ sps30_do_cmd(state, SPS30_STOP_MEAS, NULL, 0); -+ state->state = RESET; -+ -+ return ret; -+} -+ - static ssize_t start_cleaning_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -@@ -296,10 +344,82 @@ static ssize_t start_cleaning_store(stru - return len; - } - -+static ssize_t cleaning_period_show(struct device *dev, -+ struct device_attribute *attr, -+ char *buf) -+{ -+ struct iio_dev *indio_dev = dev_to_iio_dev(dev); -+ struct sps30_state *state = iio_priv(indio_dev); -+ u8 tmp[4]; -+ int ret; -+ -+ mutex_lock(&state->lock); -+ ret = sps30_do_cmd(state, SPS30_READ_AUTO_CLEANING_PERIOD, tmp, 4); -+ mutex_unlock(&state->lock); -+ if (ret) -+ return ret; -+ -+ return sprintf(buf, "%d\n", get_unaligned_be32(tmp)); -+} -+ -+static ssize_t cleaning_period_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ struct iio_dev *indio_dev = dev_to_iio_dev(dev); -+ struct sps30_state *state = iio_priv(indio_dev); -+ int val, ret; -+ u8 tmp[4]; -+ -+ if (kstrtoint(buf, 0, &val)) -+ return -EINVAL; -+ -+ if ((val < SPS30_AUTO_CLEANING_PERIOD_MIN) || -+ (val > SPS30_AUTO_CLEANING_PERIOD_MAX)) -+ return -EINVAL; -+ -+ put_unaligned_be32(val, tmp); -+ -+ mutex_lock(&state->lock); -+ ret = sps30_do_cmd(state, SPS30_AUTO_CLEANING_PERIOD, tmp, 0); -+ if (ret) { -+ mutex_unlock(&state->lock); -+ return ret; -+ } -+ -+ msleep(20); -+ -+ /* -+ * sensor requires reset in order to return up to date self cleaning -+ * period -+ */ -+ ret = sps30_do_cmd_reset(state); -+ if (ret) -+ dev_warn(dev, -+ "period changed but reads will return the old value\n"); -+ -+ mutex_unlock(&state->lock); -+ -+ return len; -+} -+ -+static ssize_t cleaning_period_available_show(struct device *dev, -+ struct device_attribute *attr, -+ char *buf) -+{ -+ return snprintf(buf, PAGE_SIZE, "[%d %d %d]\n", -+ SPS30_AUTO_CLEANING_PERIOD_MIN, 1, -+ SPS30_AUTO_CLEANING_PERIOD_MAX); -+} -+ - static IIO_DEVICE_ATTR_WO(start_cleaning, 0); -+static IIO_DEVICE_ATTR_RW(cleaning_period, 0); -+static IIO_DEVICE_ATTR_RO(cleaning_period_available, 0); - - static struct attribute *sps30_attrs[] = { - &iio_dev_attr_start_cleaning.dev_attr.attr, -+ &iio_dev_attr_cleaning_period.dev_attr.attr, -+ &iio_dev_attr_cleaning_period_available.dev_attr.attr, - NULL - }; - -@@ -362,6 +482,7 @@ static int sps30_probe(struct i2c_client - state = iio_priv(indio_dev); - i2c_set_clientdata(client, indio_dev); - state->client = client; -+ state->state = RESET; - indio_dev->dev.parent = &client->dev; - indio_dev->info = &sps30_info; - indio_dev->name = client->name; -@@ -373,19 +494,11 @@ static int sps30_probe(struct i2c_client - mutex_init(&state->lock); - crc8_populate_msb(sps30_crc8_table, SPS30_CRC8_POLYNOMIAL); - -- ret = sps30_do_cmd(state, SPS30_RESET, NULL, 0); -+ ret = sps30_do_cmd_reset(state); - if (ret) { - dev_err(&client->dev, "failed to reset device\n"); - return ret; - } -- msleep(300); -- /* -- * Power-on-reset causes sensor to produce some glitch on i2c bus and -- * some controllers end up in error state. Recover simply by placing -- * some data on the bus, for example STOP_MEAS command, which -- * is NOP in this case. -- */ -- sps30_do_cmd(state, SPS30_STOP_MEAS, NULL, 0); - - ret = sps30_do_cmd(state, SPS30_READ_SERIAL, buf, sizeof(buf)); - if (ret) { -@@ -395,12 +508,6 @@ static int sps30_probe(struct i2c_client - /* returned serial number is already NUL terminated */ - dev_info(&client->dev, "serial number: %s\n", buf); - -- ret = sps30_do_cmd(state, SPS30_START_MEAS, NULL, 0); -- if (ret) { -- dev_err(&client->dev, "failed to start measurement\n"); -- return ret; -- } -- - ret = devm_add_action_or_reset(&client->dev, sps30_stop_meas, state); - if (ret) - return ret; diff --git a/target/linux/generic/backport-4.19/503-v5.1-iio-chemical-sps30-remove-printk-format-specifier.patch b/target/linux/generic/backport-4.19/503-v5.1-iio-chemical-sps30-remove-printk-format-specifier.patch deleted file mode 100644 index b0fe5ac2e6..0000000000 --- a/target/linux/generic/backport-4.19/503-v5.1-iio-chemical-sps30-remove-printk-format-specifier.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 3fa30bf7004bb8069826ef85487f4753666a73da Mon Sep 17 00:00:00 2001 -From: Tomasz Duszynski -Date: Sat, 2 Feb 2019 10:00:03 +0100 -Subject: [PATCH] iio: chemical: sps30: remove printk format specifier - -pr_fmt is used by printk wrappers. There are not any in the driver -code so remove the format specifier. - -Signed-off-by: Tomasz Duszynski -Signed-off-by: Jonathan Cameron ---- - drivers/iio/chemical/sps30.c | 2 -- - 1 file changed, 2 deletions(-) - ---- a/drivers/iio/chemical/sps30.c -+++ b/drivers/iio/chemical/sps30.c -@@ -7,8 +7,6 @@ - * I2C slave address: 0x69 - */ - --#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -- - #include - #include - #include diff --git a/target/linux/generic/backport-4.19/504-v5.1-iio-chemical-sps30-fix-a-loop-timeout-test.patch b/target/linux/generic/backport-4.19/504-v5.1-iio-chemical-sps30-fix-a-loop-timeout-test.patch deleted file mode 100644 index c0aae35549..0000000000 --- a/target/linux/generic/backport-4.19/504-v5.1-iio-chemical-sps30-fix-a-loop-timeout-test.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 905889b4a34c753a538015f0b2cdaa0c9e3a4fd5 Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Sat, 9 Feb 2019 12:03:52 +0300 -Subject: [PATCH] iio: chemical: sps30: fix a loop timeout test - -The "while (tries--) {" loop is a postop so it exits with "tries" set -to -1. - -Fixes: 232e0f6ddeae ("iio: chemical: add support for Sensirion SPS30 sensor") -Signed-off-by: Dan Carpenter -Signed-off-by: Jonathan Cameron ---- - drivers/iio/chemical/sps30.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/iio/chemical/sps30.c -+++ b/drivers/iio/chemical/sps30.c -@@ -210,7 +210,7 @@ static int sps30_do_meas(struct sps30_st - msleep_interruptible(300); - } - -- if (!tries) -+ if (tries == -1) - return -ETIMEDOUT; - - ret = sps30_do_cmd(state, SPS30_READ_DATA, tmp, sizeof(int) * size); diff --git a/target/linux/generic/backport-4.19/505-v5.1-iio-chemical-sps30-Supress-some-switch-fallthrough-w.patch b/target/linux/generic/backport-4.19/505-v5.1-iio-chemical-sps30-Supress-some-switch-fallthrough-w.patch deleted file mode 100644 index 08cc34ff40..0000000000 --- a/target/linux/generic/backport-4.19/505-v5.1-iio-chemical-sps30-Supress-some-switch-fallthrough-w.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 59b9bb0abca9efe47207301dbaf0d1beee2bd0f7 Mon Sep 17 00:00:00 2001 -From: Jonathan Cameron -Date: Sat, 9 Feb 2019 19:32:58 +0000 -Subject: [PATCH] iio:chemical:sps30 Supress some switch fallthrough warnings. - -Fixes warnings reported on linux-next but marking one path -and adding an explicit return in the other. - -Signed-off-by: Jonathan Cameron -Cc: Andreas Brauchli -Acked-by: Tomasz Duszynski ---- - drivers/iio/chemical/sps30.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/iio/chemical/sps30.c -+++ b/drivers/iio/chemical/sps30.c -@@ -118,6 +118,7 @@ static int sps30_do_cmd(struct sps30_sta - case SPS30_READ_AUTO_CLEANING_PERIOD: - buf[0] = SPS30_AUTO_CLEANING_PERIOD >> 8; - buf[1] = (u8)SPS30_AUTO_CLEANING_PERIOD; -+ /* fall through */ - case SPS30_READ_DATA_READY_FLAG: - case SPS30_READ_DATA: - case SPS30_READ_SERIAL: -@@ -295,6 +296,8 @@ static int sps30_read_raw(struct iio_dev - *val2 = 10000; - - return IIO_VAL_INT_PLUS_MICRO; -+ default: -+ return -EINVAL; - } - default: - return -EINVAL; diff --git a/target/linux/generic/backport-4.19/506-v5.1-iio-chemical-sps30-Explicity-truncate-constant-by-ma.patch b/target/linux/generic/backport-4.19/506-v5.1-iio-chemical-sps30-Explicity-truncate-constant-by-ma.patch deleted file mode 100644 index e1f4a3b635..0000000000 --- a/target/linux/generic/backport-4.19/506-v5.1-iio-chemical-sps30-Explicity-truncate-constant-by-ma.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 78b75ab3f8c9dfac563b81105a1b838ec37a940e Mon Sep 17 00:00:00 2001 -From: Jonathan Cameron -Date: Sun, 13 Oct 2019 10:55:15 +0100 -Subject: [PATCH] iio: chemical: sps30: Explicity truncate constant by masking - -When breaking up a constant to write to two 8 bit registers -it isn't obvious to sparse that it was intentional. - -CHECK drivers/iio/chemical/sps30.c -drivers/iio/chemical/sps30.c:120:30: warning: cast truncates bits from constant value (8004 becomes 4) - -So in the interests of minimising noisy warnings, let us add -a mask. - -Signed-off-by: Jonathan Cameron -Acked-by: Tomasz Duszynski ---- - drivers/iio/chemical/sps30.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/iio/chemical/sps30.c -+++ b/drivers/iio/chemical/sps30.c -@@ -117,7 +117,7 @@ static int sps30_do_cmd(struct sps30_sta - break; - case SPS30_READ_AUTO_CLEANING_PERIOD: - buf[0] = SPS30_AUTO_CLEANING_PERIOD >> 8; -- buf[1] = (u8)SPS30_AUTO_CLEANING_PERIOD; -+ buf[1] = (u8)(SPS30_AUTO_CLEANING_PERIOD & 0xff); - /* fall through */ - case SPS30_READ_DATA_READY_FLAG: - case SPS30_READ_DATA: diff --git a/target/linux/generic/backport-4.19/507-v5.6-iio-chemical-sps30-fix-missing-triggered-buffer-depe.patch b/target/linux/generic/backport-4.19/507-v5.6-iio-chemical-sps30-fix-missing-triggered-buffer-depe.patch deleted file mode 100644 index c2b999b1cb..0000000000 --- a/target/linux/generic/backport-4.19/507-v5.6-iio-chemical-sps30-fix-missing-triggered-buffer-depe.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 61338e27e2eef3bfcd3df5c39cec5b9dc10ba25c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Sun, 23 Feb 2020 22:08:25 +0100 -Subject: [PATCH] iio: chemical: sps30: fix missing triggered buffer dependency -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -SPS30 uses triggered buffer, but the dependency is not specified in the -Kconfig file. Fix this by selecting IIO_BUFFER and IIO_TRIGGERED_BUFFER -config symbols. - -Cc: stable@vger.kernel.org -Fixes: 232e0f6ddeae ("iio: chemical: add support for Sensirion SPS30 sensor") -Signed-off-by: Petr Štetiar ---- - drivers/iio/chemical/Kconfig | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/iio/chemical/Kconfig -+++ b/drivers/iio/chemical/Kconfig -@@ -65,6 +65,8 @@ config SPS30 - tristate "SPS30 particulate matter sensor" - depends on I2C - select CRC8 -+ select IIO_BUFFER -+ select IIO_TRIGGERED_BUFFER - help - Say Y here to build support for the Sensirion SPS30 particulate - matter sensor. diff --git a/target/linux/generic/backport-4.19/700-v5.1-net-phylink-only-call-mac_config-during-resolve-when.patch b/target/linux/generic/backport-4.19/700-v5.1-net-phylink-only-call-mac_config-during-resolve-when.patch deleted file mode 100644 index 0e272ea891..0000000000 --- a/target/linux/generic/backport-4.19/700-v5.1-net-phylink-only-call-mac_config-during-resolve-when.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 6f3ea4e5b1f0867ec217f6101fcb89783ed905d7 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 9 Feb 2019 18:23:26 +0000 -Subject: [PATCH] net: phylink: only call mac_config() during resolve - when link is up - -There's little point calling mac_config() when the link is down. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -339,6 +339,13 @@ static void phylink_mac_config(struct ph - pl->ops->mac_config(pl->netdev, pl->link_an_mode, state); - } - -+static void phylink_mac_config_up(struct phylink *pl, -+ const struct phylink_link_state *state) -+{ -+ if (state->link) -+ phylink_mac_config(pl, state); -+} -+ - static void phylink_mac_an_restart(struct phylink *pl) - { - if (pl->link_config.an_enabled && -@@ -442,12 +449,12 @@ static void phylink_resolve(struct work_ - case MLO_AN_PHY: - link_state = pl->phy_state; - phylink_resolve_flow(pl, &link_state); -- phylink_mac_config(pl, &link_state); -+ phylink_mac_config_up(pl, &link_state); - break; - - case MLO_AN_FIXED: - phylink_get_fixed_state(pl, &link_state); -- phylink_mac_config(pl, &link_state); -+ phylink_mac_config_up(pl, &link_state); - break; - - case MLO_AN_INBAND: diff --git a/target/linux/generic/backport-4.19/701-v5.2-net-phylink-ensure-inband-AN-works-correctly.patch b/target/linux/generic/backport-4.19/701-v5.2-net-phylink-ensure-inband-AN-works-correctly.patch deleted file mode 100644 index 746aca2e5a..0000000000 --- a/target/linux/generic/backport-4.19/701-v5.2-net-phylink-ensure-inband-AN-works-correctly.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 72f973f292b3eaaf451ebcd3253900d41f4ef24a Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 25 Jan 2019 17:42:51 +0000 -Subject: [PATCH] net: phylink: ensure inband AN works correctly - -Do not update the link interface mode while the link is down to avoid -spurious link interface changes. - -Always call mac_config if we have a PHY to propagate the pause mode -settings to the MAC. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 37 +++++++++++++++---------------------- - 1 file changed, 15 insertions(+), 22 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -459,28 +459,21 @@ static void phylink_resolve(struct work_ - - case MLO_AN_INBAND: - phylink_get_mac_state(pl, &link_state); -- if (pl->phydev) { -- bool changed = false; - -- link_state.link = link_state.link && -- pl->phy_state.link; -+ /* If we have a phy, the "up" state is the union of -+ * both the PHY and the MAC */ -+ if (pl->phydev) -+ link_state.link &= pl->phy_state.link; - -- if (pl->phy_state.interface != -- link_state.interface) { -- link_state.interface = pl->phy_state.interface; -- changed = true; -- } -+ /* Only update if the PHY link is up */ -+ if (pl->phydev && pl->phy_state.link) { -+ link_state.interface = pl->phy_state.interface; - -- /* Propagate the flow control from the PHY -- * to the MAC. Also propagate the interface -- * if changed. -- */ -- if (pl->phy_state.link || changed) { -- link_state.pause |= pl->phy_state.pause; -- phylink_resolve_flow(pl, &link_state); -- -- phylink_mac_config(pl, &link_state); -- } -+ /* If we have a PHY, we need to update with -+ * the pause mode bits. */ -+ link_state.pause |= pl->phy_state.pause; -+ phylink_resolve_flow(pl, &link_state); -+ phylink_mac_config(pl, &link_state); - } - break; - } diff --git a/target/linux/generic/backport-4.19/702-v4.20-net-ethernet-Add-helper-for-MACs-which-support-asym-.patch b/target/linux/generic/backport-4.19/702-v4.20-net-ethernet-Add-helper-for-MACs-which-support-asym-.patch deleted file mode 100644 index 2f32c59ad2..0000000000 --- a/target/linux/generic/backport-4.19/702-v4.20-net-ethernet-Add-helper-for-MACs-which-support-asym-.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 1da223db3a0c522300b519ecbe1dc45927e28088 Mon Sep 17 00:00:00 2001 -From: Andrew Lunn -Date: Wed, 12 Sep 2018 01:53:15 +0200 -Subject: [PATCH 600/660] net: ethernet: Add helper for MACs which support asym - pause - -Rather than have the MAC drivers manipulate phydev members to indicate -they support Asym Pause, add a helper function. - -Signed-off-by: Andrew Lunn -Reviewed-by: Florian Fainelli -Signed-off-by: David S. Miller ---- - drivers/net/phy/phy_device.c | 13 +++++++++++++ - include/linux/phy.h | 1 + - 2 files changed, 14 insertions(+) - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1783,6 +1783,19 @@ int phy_set_max_speed(struct phy_device - } - EXPORT_SYMBOL(phy_set_max_speed); - -+/** -+ * phy_support_asym_pause - Enable support of asym pause -+ * @phydev: target phy_device struct -+ * -+ * Description: Called by the MAC to indicate is supports Asym Pause. -+ */ -+void phy_support_asym_pause(struct phy_device *phydev) -+{ -+ phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; -+ phydev->advertising = phydev->supported; -+} -+EXPORT_SYMBOL(phy_support_asym_pause); -+ - static void of_set_phy_supported(struct phy_device *phydev) - { - struct device_node *node = phydev->mdio.dev.of_node; ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -1051,6 +1051,7 @@ int phy_mii_ioctl(struct phy_device *phy - int phy_start_interrupts(struct phy_device *phydev); - void phy_print_status(struct phy_device *phydev); - int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); -+void phy_support_asym_pause(struct phy_device *phydev); - - int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, - int (*run)(struct phy_device *)); diff --git a/target/linux/generic/backport-4.19/703-v4.20-net-ethernet-Add-helper-for-set_pauseparam-for-Asym-.patch b/target/linux/generic/backport-4.19/703-v4.20-net-ethernet-Add-helper-for-set_pauseparam-for-Asym-.patch deleted file mode 100644 index 99aba28818..0000000000 --- a/target/linux/generic/backport-4.19/703-v4.20-net-ethernet-Add-helper-for-set_pauseparam-for-Asym-.patch +++ /dev/null @@ -1,66 +0,0 @@ -From ce825df56e0480a2cbb296e38976babafb57e503 Mon Sep 17 00:00:00 2001 -From: Andrew Lunn -Date: Wed, 12 Sep 2018 01:53:17 +0200 -Subject: [PATCH 601/660] net: ethernet: Add helper for set_pauseparam for Asym - Pause - -ethtool can be used to enable/disable pause. Add a helper to configure -the PHY when asym pause is supported. - -Signed-off-by: Andrew Lunn -Reviewed-by: Florian Fainelli -Signed-off-by: David S. Miller ---- - drivers/net/phy/phy_device.c | 30 ++++++++++++++++++++++++++++++ - include/linux/phy.h | 1 + - 2 files changed, 31 insertions(+) - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1796,6 +1796,36 @@ void phy_support_asym_pause(struct phy_d - } - EXPORT_SYMBOL(phy_support_asym_pause); - -+/** -+ * phy_set_asym_pause - Configure Pause and Asym Pause -+ * @phydev: target phy_device struct -+ * @rx: Receiver Pause is supported -+ * @tx: Transmit Pause is supported -+ * -+ * Description: Configure advertised Pause support depending on if -+ * transmit and receiver pause is supported. If there has been a -+ * change in adverting, trigger a new autoneg. Generally called from -+ * the set_pauseparam .ndo. -+ */ -+void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx) -+{ -+ u16 oldadv = phydev->advertising; -+ u16 newadv = oldadv &= ~(SUPPORTED_Pause | SUPPORTED_Asym_Pause); -+ -+ if (rx) -+ newadv |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; -+ if (tx) -+ newadv ^= SUPPORTED_Asym_Pause; -+ -+ if (oldadv != newadv) { -+ phydev->advertising = newadv; -+ -+ if (phydev->autoneg) -+ phy_start_aneg(phydev); -+ } -+} -+EXPORT_SYMBOL(phy_set_asym_pause); -+ - static void of_set_phy_supported(struct phy_device *phydev) - { - struct device_node *node = phydev->mdio.dev.of_node; ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -1052,6 +1052,7 @@ int phy_start_interrupts(struct phy_devi - void phy_print_status(struct phy_device *phydev); - int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); - void phy_support_asym_pause(struct phy_device *phydev); -+void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); - - int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, - int (*run)(struct phy_device *)); diff --git a/target/linux/generic/backport-4.19/704-v4.20-net-phy-Stop-with-excessive-soft-reset.patch b/target/linux/generic/backport-4.19/704-v4.20-net-phy-Stop-with-excessive-soft-reset.patch deleted file mode 100644 index 483815a338..0000000000 --- a/target/linux/generic/backport-4.19/704-v4.20-net-phy-Stop-with-excessive-soft-reset.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 1541649a9dd79e9b941d399de564475e426a2d0b Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Tue, 25 Sep 2018 11:28:45 -0700 -Subject: [PATCH 602/660] net: phy: Stop with excessive soft reset - -While consolidating the PHY reset in phy_init_hw() an unconditionaly -BMCR soft-reset I became quite trigger happy with those. This was later -on deactivated for the Generic PHY driver on the premise that a prior -software entity (e.g: bootloader) might have applied workarounds in -commit 0878fff1f42c ("net: phy: Do not perform software reset for -Generic PHY"). - -Since we have a hook to wire-up a soft_reset callback, just use that and -get rid of the call to genphy_soft_reset() entirely. This speeds up -initialization and link establishment for most PHYs out there that do -not require a reset. - -Fixes: 87aa9f9c61ad ("net: phy: consolidate PHY reset in phy_init_hw()") -Tested-by: Wang, Dongsheng -Tested-by: Chris Healy -Tested-by: Andrew Lunn -Tested-by: Clemens Gruber -Signed-off-by: Florian Fainelli -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phy_device.c | 2 -- - 1 file changed, 2 deletions(-) - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -892,8 +892,6 @@ int phy_init_hw(struct phy_device *phyde - - if (phydev->drv->soft_reset) - ret = phydev->drv->soft_reset(phydev); -- else -- ret = genphy_soft_reset(phydev); - - if (ret < 0) - return ret; diff --git a/target/linux/generic/backport-4.19/705-v5.1-net-phy-provide-full-set-of-accessor-functions-to-MM.patch b/target/linux/generic/backport-4.19/705-v5.1-net-phy-provide-full-set-of-accessor-functions-to-MM.patch deleted file mode 100644 index 2dbf9ebd10..0000000000 --- a/target/linux/generic/backport-4.19/705-v5.1-net-phy-provide-full-set-of-accessor-functions-to-MM.patch +++ /dev/null @@ -1,375 +0,0 @@ -From 80758d9542205cd2e9fa730067bc3888d4f5a096 Mon Sep 17 00:00:00 2001 -From: Nikita Yushchenko -Date: Wed, 6 Feb 2019 07:36:40 +0100 -Subject: [PATCH 603/660] net: phy: provide full set of accessor functions to - MMD registers - -This adds full set of locked and unlocked accessor functions to read and -write PHY MMD registers and/or bitfields. - -Set of functions exactly matches what is already available for PHY -legacy registers. - -Signed-off-by: Nikita Yushchenko -Signed-off-by: Andrew Lunn -Signed-off-by: Heiner Kallweit -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phy-core.c | 116 ++++++++++++++++++++++++++++---- - include/linux/phy.h | 134 ++++++++++++++++++++++++++++++------- - 2 files changed, 214 insertions(+), 36 deletions(-) - ---- a/drivers/net/phy/phy-core.c -+++ b/drivers/net/phy/phy-core.c -@@ -247,15 +247,15 @@ static void mmd_phy_indirect(struct mii_ - } - - /** -- * phy_read_mmd - Convenience function for reading a register -+ * __phy_read_mmd - Convenience function for reading a register - * from an MMD on a given PHY. - * @phydev: The phy_device struct - * @devad: The MMD to read from (0..31) - * @regnum: The register on the MMD to read (0..65535) - * -- * Same rules as for phy_read(); -+ * Same rules as for __phy_read(); - */ --int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) -+int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) - { - int val; - -@@ -267,33 +267,52 @@ int phy_read_mmd(struct phy_device *phyd - } else if (phydev->is_c45) { - u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff); - -- val = mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, addr); -+ val = __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, addr); - } else { - struct mii_bus *bus = phydev->mdio.bus; - int phy_addr = phydev->mdio.addr; - -- mutex_lock(&bus->mdio_lock); - mmd_phy_indirect(bus, phy_addr, devad, regnum); - - /* Read the content of the MMD's selected register */ - val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA); -- mutex_unlock(&bus->mdio_lock); - } - return val; - } -+EXPORT_SYMBOL(__phy_read_mmd); -+ -+/** -+ * phy_read_mmd - Convenience function for reading a register -+ * from an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to read from -+ * @regnum: The register on the MMD to read -+ * -+ * Same rules as for phy_read(); -+ */ -+int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) -+{ -+ int ret; -+ -+ mutex_lock(&phydev->mdio.bus->mdio_lock); -+ ret = __phy_read_mmd(phydev, devad, regnum); -+ mutex_unlock(&phydev->mdio.bus->mdio_lock); -+ -+ return ret; -+} - EXPORT_SYMBOL(phy_read_mmd); - - /** -- * phy_write_mmd - Convenience function for writing a register -+ * __phy_write_mmd - Convenience function for writing a register - * on an MMD on a given PHY. - * @phydev: The phy_device struct - * @devad: The MMD to read from - * @regnum: The register on the MMD to read - * @val: value to write to @regnum - * -- * Same rules as for phy_write(); -+ * Same rules as for __phy_write(); - */ --int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) -+int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) - { - int ret; - -@@ -305,23 +324,43 @@ int phy_write_mmd(struct phy_device *phy - } else if (phydev->is_c45) { - u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff); - -- ret = mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, -- addr, val); -+ ret = __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, -+ addr, val); - } else { - struct mii_bus *bus = phydev->mdio.bus; - int phy_addr = phydev->mdio.addr; - -- mutex_lock(&bus->mdio_lock); - mmd_phy_indirect(bus, phy_addr, devad, regnum); - - /* Write the data into MMD's selected register */ - __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val); -- mutex_unlock(&bus->mdio_lock); - - ret = 0; - } - return ret; - } -+EXPORT_SYMBOL(__phy_write_mmd); -+ -+/** -+ * phy_write_mmd - Convenience function for writing a register -+ * on an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to read from -+ * @regnum: The register on the MMD to read -+ * @val: value to write to @regnum -+ * -+ * Same rules as for phy_write(); -+ */ -+int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) -+{ -+ int ret; -+ -+ mutex_lock(&phydev->mdio.bus->mdio_lock); -+ ret = __phy_write_mmd(phydev, devad, regnum, val); -+ mutex_unlock(&phydev->mdio.bus->mdio_lock); -+ -+ return ret; -+} - EXPORT_SYMBOL(phy_write_mmd); - - /** -@@ -371,6 +410,57 @@ int phy_modify(struct phy_device *phydev - } - EXPORT_SYMBOL_GPL(phy_modify); - -+/** -+ * __phy_modify_mmd - Convenience function for modifying a register on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @mask: bit mask of bits to clear -+ * @set: new value of bits set in mask to write to @regnum -+ * -+ * Unlocked helper function which allows a MMD register to be modified as -+ * new register value = (old register value & ~mask) | set -+ */ -+int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set) -+{ -+ int ret; -+ -+ ret = __phy_read_mmd(phydev, devad, regnum); -+ if (ret < 0) -+ return ret; -+ -+ ret = __phy_write_mmd(phydev, devad, regnum, (ret & ~mask) | set); -+ -+ return ret < 0 ? ret : 0; -+} -+EXPORT_SYMBOL_GPL(__phy_modify_mmd); -+ -+/** -+ * phy_modify_mmd - Convenience function for modifying a register on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @mask: bit mask of bits to clear -+ * @set: new value of bits set in mask to write to @regnum -+ * -+ * NOTE: MUST NOT be called from interrupt context, -+ * because the bus read/write functions may wait for an interrupt -+ * to conclude the operation. -+ */ -+int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set) -+{ -+ int ret; -+ -+ mutex_lock(&phydev->mdio.bus->mdio_lock); -+ ret = __phy_modify_mmd(phydev, devad, regnum, mask, set); -+ mutex_unlock(&phydev->mdio.bus->mdio_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phy_modify_mmd); -+ - static int __phy_read_page(struct phy_device *phydev) - { - return phydev->drv->read_page(phydev); ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -697,17 +697,6 @@ size_t phy_speeds(unsigned int *speeds, - void phy_resolve_aneg_linkmode(struct phy_device *phydev); - - /** -- * phy_read_mmd - Convenience function for reading a register -- * from an MMD on a given PHY. -- * @phydev: The phy_device struct -- * @devad: The MMD to read from -- * @regnum: The register on the MMD to read -- * -- * Same rules as for phy_read(); -- */ --int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); -- --/** - * phy_read - Convenience function for reading a given PHY register - * @phydev: the phy_device struct - * @regnum: register number to read -@@ -762,9 +751,60 @@ static inline int __phy_write(struct phy - val); - } - -+/** -+ * phy_read_mmd - Convenience function for reading a register -+ * from an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to read from -+ * @regnum: The register on the MMD to read -+ * -+ * Same rules as for phy_read(); -+ */ -+int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); -+ -+/** -+ * __phy_read_mmd - Convenience function for reading a register -+ * from an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to read from -+ * @regnum: The register on the MMD to read -+ * -+ * Same rules as for __phy_read(); -+ */ -+int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); -+ -+/** -+ * phy_write_mmd - Convenience function for writing a register -+ * on an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to write to -+ * @regnum: The register on the MMD to read -+ * @val: value to write to @regnum -+ * -+ * Same rules as for phy_write(); -+ */ -+int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); -+ -+/** -+ * __phy_write_mmd - Convenience function for writing a register -+ * on an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to write to -+ * @regnum: The register on the MMD to read -+ * @val: value to write to @regnum -+ * -+ * Same rules as for __phy_write(); -+ */ -+int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); -+ - int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); - int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); - -+int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set); -+int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set); -+ - /** - * __phy_set_bits - Convenience function for setting bits in a PHY register - * @phydev: the phy_device struct -@@ -815,6 +855,66 @@ static inline int phy_clear_bits(struct - } - - /** -+ * __phy_set_bits_mmd - Convenience function for setting bits in a register -+ * on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @val: bits to set -+ * -+ * The caller must have taken the MDIO bus lock. -+ */ -+static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, -+ u32 regnum, u16 val) -+{ -+ return __phy_modify_mmd(phydev, devad, regnum, 0, val); -+} -+ -+/** -+ * __phy_clear_bits_mmd - Convenience function for clearing bits in a register -+ * on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @val: bits to clear -+ * -+ * The caller must have taken the MDIO bus lock. -+ */ -+static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, -+ u32 regnum, u16 val) -+{ -+ return __phy_modify_mmd(phydev, devad, regnum, val, 0); -+} -+ -+/** -+ * phy_set_bits_mmd - Convenience function for setting bits in a register -+ * on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @val: bits to set -+ */ -+static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, -+ u32 regnum, u16 val) -+{ -+ return phy_modify_mmd(phydev, devad, regnum, 0, val); -+} -+ -+/** -+ * phy_clear_bits_mmd - Convenience function for clearing bits in a register -+ * on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @val: bits to clear -+ */ -+static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, -+ u32 regnum, u16 val) -+{ -+ return phy_modify_mmd(phydev, devad, regnum, val, 0); -+} -+ -+/** - * phy_interrupt_is_valid - Convenience function for testing a given PHY irq - * @phydev: the phy_device struct - * -@@ -890,18 +990,6 @@ static inline bool phy_is_pseudo_fixed_l - return phydev->is_pseudo_fixed_link; - } - --/** -- * phy_write_mmd - Convenience function for writing a register -- * on an MMD on a given PHY. -- * @phydev: The phy_device struct -- * @devad: The MMD to read from -- * @regnum: The register on the MMD to read -- * @val: value to write to @regnum -- * -- * Same rules as for phy_write(); -- */ --int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); -- - int phy_save_page(struct phy_device *phydev); - int phy_select_page(struct phy_device *phydev, int page); - int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); diff --git a/target/linux/generic/backport-4.19/706-v5.1-net-phy-add-register-modifying-helpers-returning-1-o.patch b/target/linux/generic/backport-4.19/706-v5.1-net-phy-add-register-modifying-helpers-returning-1-o.patch deleted file mode 100644 index 1cd26a2ad3..0000000000 --- a/target/linux/generic/backport-4.19/706-v5.1-net-phy-add-register-modifying-helpers-returning-1-o.patch +++ /dev/null @@ -1,217 +0,0 @@ -From c1e3f753f6b85d7636024159bb78f764e09492f1 Mon Sep 17 00:00:00 2001 -From: Heiner Kallweit -Date: Sun, 10 Feb 2019 19:57:56 +0100 -Subject: [PATCH 604/660] net: phy: add register modifying helpers returning 1 - on change - -When modifying registers there are scenarios where we need to know -whether the register content actually changed. This patch adds -new helpers to not break users of the current ones, phy_modify() etc. - -Signed-off-by: Heiner Kallweit -Reviewed-by: Andrew Lunn -Reviewed-by: Florian Fainelli -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phy-core.c | 127 ++++++++++++++++++++++++++++++++++--- - include/linux/phy.h | 12 +++- - 2 files changed, 128 insertions(+), 11 deletions(-) - ---- a/drivers/net/phy/phy-core.c -+++ b/drivers/net/phy/phy-core.c -@@ -364,7 +364,7 @@ int phy_write_mmd(struct phy_device *phy - EXPORT_SYMBOL(phy_write_mmd); - - /** -- * __phy_modify() - Convenience function for modifying a PHY register -+ * __phy_modify_changed() - Convenience function for modifying a PHY register - * @phydev: a pointer to a &struct phy_device - * @regnum: register number - * @mask: bit mask of bits to clear -@@ -372,16 +372,69 @@ EXPORT_SYMBOL(phy_write_mmd); - * - * Unlocked helper function which allows a PHY register to be modified as - * new register value = (old register value & ~mask) | set -+ * -+ * Returns negative errno, 0 if there was no change, and 1 in case of change - */ --int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) -+int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, -+ u16 set) - { -- int ret; -+ int new, ret; - - ret = __phy_read(phydev, regnum); - if (ret < 0) - return ret; - -- ret = __phy_write(phydev, regnum, (ret & ~mask) | set); -+ new = (ret & ~mask) | set; -+ if (new == ret) -+ return 0; -+ -+ ret = __phy_write(phydev, regnum, new); -+ -+ return ret < 0 ? ret : 1; -+} -+EXPORT_SYMBOL_GPL(__phy_modify_changed); -+ -+/** -+ * phy_modify_changed - Function for modifying a PHY register -+ * @phydev: the phy_device struct -+ * @regnum: register number to modify -+ * @mask: bit mask of bits to clear -+ * @set: new value of bits set in mask to write to @regnum -+ * -+ * NOTE: MUST NOT be called from interrupt context, -+ * because the bus read/write functions may wait for an interrupt -+ * to conclude the operation. -+ * -+ * Returns negative errno, 0 if there was no change, and 1 in case of change -+ */ -+int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) -+{ -+ int ret; -+ -+ mutex_lock(&phydev->mdio.bus->mdio_lock); -+ ret = __phy_modify_changed(phydev, regnum, mask, set); -+ mutex_unlock(&phydev->mdio.bus->mdio_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phy_modify_changed); -+ -+/** -+ * __phy_modify - Convenience function for modifying a PHY register -+ * @phydev: the phy_device struct -+ * @regnum: register number to modify -+ * @mask: bit mask of bits to clear -+ * @set: new value of bits set in mask to write to @regnum -+ * -+ * NOTE: MUST NOT be called from interrupt context, -+ * because the bus read/write functions may wait for an interrupt -+ * to conclude the operation. -+ */ -+int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) -+{ -+ int ret; -+ -+ ret = __phy_modify_changed(phydev, regnum, mask, set); - - return ret < 0 ? ret : 0; - } -@@ -411,7 +464,7 @@ int phy_modify(struct phy_device *phydev - EXPORT_SYMBOL_GPL(phy_modify); - - /** -- * __phy_modify_mmd - Convenience function for modifying a register on MMD -+ * __phy_modify_mmd_changed - Function for modifying a register on MMD - * @phydev: the phy_device struct - * @devad: the MMD containing register to modify - * @regnum: register number to modify -@@ -420,17 +473,73 @@ EXPORT_SYMBOL_GPL(phy_modify); - * - * Unlocked helper function which allows a MMD register to be modified as - * new register value = (old register value & ~mask) | set -+ * -+ * Returns negative errno, 0 if there was no change, and 1 in case of change - */ --int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -- u16 mask, u16 set) -+int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set) - { -- int ret; -+ int new, ret; - - ret = __phy_read_mmd(phydev, devad, regnum); - if (ret < 0) - return ret; - -- ret = __phy_write_mmd(phydev, devad, regnum, (ret & ~mask) | set); -+ new = (ret & ~mask) | set; -+ if (new == ret) -+ return 0; -+ -+ ret = __phy_write_mmd(phydev, devad, regnum, new); -+ -+ return ret < 0 ? ret : 1; -+} -+EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed); -+ -+/** -+ * phy_modify_mmd_changed - Function for modifying a register on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @mask: bit mask of bits to clear -+ * @set: new value of bits set in mask to write to @regnum -+ * -+ * NOTE: MUST NOT be called from interrupt context, -+ * because the bus read/write functions may wait for an interrupt -+ * to conclude the operation. -+ * -+ * Returns negative errno, 0 if there was no change, and 1 in case of change -+ */ -+int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set) -+{ -+ int ret; -+ -+ mutex_lock(&phydev->mdio.bus->mdio_lock); -+ ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); -+ mutex_unlock(&phydev->mdio.bus->mdio_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phy_modify_mmd_changed); -+ -+/** -+ * __phy_modify_mmd - Convenience function for modifying a register on MMD -+ * @phydev: the phy_device struct -+ * @devad: the MMD containing register to modify -+ * @regnum: register number to modify -+ * @mask: bit mask of bits to clear -+ * @set: new value of bits set in mask to write to @regnum -+ * -+ * NOTE: MUST NOT be called from interrupt context, -+ * because the bus read/write functions may wait for an interrupt -+ * to conclude the operation. -+ */ -+int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set) -+{ -+ int ret; -+ -+ ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); - - return ret < 0 ? ret : 0; - } ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -797,13 +797,21 @@ int phy_write_mmd(struct phy_device *phy - */ - int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); - -+int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, -+ u16 set); -+int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, -+ u16 set); - int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); - int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); - -+int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set); -+int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, -+ u16 mask, u16 set); - int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -- u16 mask, u16 set); -+ u16 mask, u16 set); - int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, -- u16 mask, u16 set); -+ u16 mask, u16 set); - - /** - * __phy_set_bits - Convenience function for setting bits in a PHY register diff --git a/target/linux/generic/backport-4.19/707-v5.1-net-phy-add-genphy_c45_check_and_restart_aneg.patch b/target/linux/generic/backport-4.19/707-v5.1-net-phy-add-genphy_c45_check_and_restart_aneg.patch deleted file mode 100644 index 0f2a216aa5..0000000000 --- a/target/linux/generic/backport-4.19/707-v5.1-net-phy-add-genphy_c45_check_and_restart_aneg.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 2c3db705737cf52d7d24c993f0889b25b956c718 Mon Sep 17 00:00:00 2001 -From: Heiner Kallweit -Date: Mon, 18 Feb 2019 21:27:18 +0100 -Subject: [PATCH 605/660] net: phy: add genphy_c45_check_and_restart_aneg - -This function will be used by config_aneg callback implementations of -PHY drivers and allows to reduce boilerplate code. - -Signed-off-by: Heiner Kallweit -Signed-off-by: David S. Miller ---- - drivers/net/phy/phy-c45.c | 30 ++++++++++++++++++++++++++++++ - include/linux/phy.h | 1 + - 2 files changed, 31 insertions(+) - ---- a/drivers/net/phy/phy-c45.c -+++ b/drivers/net/phy/phy-c45.c -@@ -110,6 +110,36 @@ int genphy_c45_restart_aneg(struct phy_d - EXPORT_SYMBOL_GPL(genphy_c45_restart_aneg); - - /** -+ * genphy_c45_check_and_restart_aneg - Enable and restart auto-negotiation -+ * @phydev: target phy_device struct -+ * @restart: whether aneg restart is requested -+ * -+ * This assumes that the auto-negotiation MMD is present. -+ * -+ * Check, and restart auto-negotiation if needed. -+ */ -+int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart) -+{ -+ int ret = 0; -+ -+ if (!restart) { -+ /* Configure and restart aneg if it wasn't set before */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ -+ if (!(ret & MDIO_AN_CTRL1_ENABLE)) -+ restart = true; -+ } -+ -+ if (restart) -+ ret = genphy_c45_restart_aneg(phydev); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(genphy_c45_check_and_restart_aneg); -+ -+/** - * genphy_c45_aneg_done - return auto-negotiation complete status - * @phydev: target phy_device struct - * ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -1100,6 +1100,7 @@ int genphy_write_mmd_unsupported(struct - - /* Clause 45 PHY */ - int genphy_c45_restart_aneg(struct phy_device *phydev); -+int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); - int genphy_c45_aneg_done(struct phy_device *phydev); - int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask); - int genphy_c45_read_lpa(struct phy_device *phydev); diff --git a/target/linux/generic/backport-4.19/708-v5.3-net-phylink-remove-netdev-from-phylink-mii-ioctl-emu.patch b/target/linux/generic/backport-4.19/708-v5.3-net-phylink-remove-netdev-from-phylink-mii-ioctl-emu.patch deleted file mode 100644 index 1c3f1cc01a..0000000000 --- a/target/linux/generic/backport-4.19/708-v5.3-net-phylink-remove-netdev-from-phylink-mii-ioctl-emu.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 4c4323084e9a67210c8d269dceba1be99356c414 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 28 May 2019 10:57:18 +0100 -Subject: [PATCH 606/660] net: phylink: remove netdev from phylink mii ioctl - emulation - -The netdev used in the phylink ioctl emulation is never used, so let's -remove it. - -Signed-off-by: Russell King -Reviewed-by: Andrew Lunn -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 12 ++++-------- - 1 file changed, 4 insertions(+), 8 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1360,8 +1360,8 @@ EXPORT_SYMBOL_GPL(phylink_ethtool_set_ee - * - * FIXME: should deal with negotiation state too. - */ --static int phylink_mii_emul_read(struct net_device *ndev, unsigned int reg, -- struct phylink_link_state *state, bool aneg) -+static int phylink_mii_emul_read(unsigned int reg, -+ struct phylink_link_state *state) - { - struct fixed_phy_status fs; - int val; -@@ -1376,8 +1376,6 @@ static int phylink_mii_emul_read(struct - if (reg == MII_BMSR) { - if (!state->an_complete) - val &= ~BMSR_ANEGCOMPLETE; -- if (!aneg) -- val &= ~BMSR_ANEGCAPABLE; - } - return val; - } -@@ -1473,8 +1471,7 @@ static int phylink_mii_read(struct phyli - case MLO_AN_FIXED: - if (phy_id == 0) { - phylink_get_fixed_state(pl, &state); -- val = phylink_mii_emul_read(pl->netdev, reg, &state, -- true); -+ val = phylink_mii_emul_read(reg, &state); - } - break; - -@@ -1487,8 +1484,7 @@ static int phylink_mii_read(struct phyli - if (val < 0) - return val; - -- val = phylink_mii_emul_read(pl->netdev, reg, &state, -- true); -+ val = phylink_mii_emul_read(reg, &state); - } - break; - } diff --git a/target/linux/generic/backport-4.19/709-v5.3-net-phylink-support-for-link-gpio-interrupt.patch b/target/linux/generic/backport-4.19/709-v5.3-net-phylink-support-for-link-gpio-interrupt.patch deleted file mode 100644 index 84a1c853d1..0000000000 --- a/target/linux/generic/backport-4.19/709-v5.3-net-phylink-support-for-link-gpio-interrupt.patch +++ /dev/null @@ -1,90 +0,0 @@ -From cba0aba37d2228556e0d1f776d403435868cdbfa Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 28 May 2019 10:57:23 +0100 -Subject: [PATCH 607/660] net: phylink: support for link gpio interrupt - -Add support for using GPIO interrupts with a fixed-link GPIO rather than -polling the GPIO every second and invoking the phylink resolution. This -avoids unnecessary calls to mac_config(). - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 36 ++++++++++++++++++++++++++++++++---- - 1 file changed, 32 insertions(+), 4 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -59,6 +59,7 @@ struct phylink { - phy_interface_t cur_interface; - - struct gpio_desc *link_gpio; -+ unsigned int link_irq; - struct timer_list link_poll; - void (*get_fixed_state)(struct net_device *dev, - struct phylink_link_state *s); -@@ -645,7 +646,7 @@ void phylink_destroy(struct phylink *pl) - { - if (pl->sfp_bus) - sfp_unregister_upstream(pl->sfp_bus); -- if (!IS_ERR_OR_NULL(pl->link_gpio)) -+ if (pl->link_gpio) - gpiod_put(pl->link_gpio); - - cancel_work_sync(&pl->resolve); -@@ -912,6 +913,15 @@ void phylink_mac_change(struct phylink * - } - EXPORT_SYMBOL_GPL(phylink_mac_change); - -+static irqreturn_t phylink_link_handler(int irq, void *data) -+{ -+ struct phylink *pl = data; -+ -+ phylink_run_resolve(pl); -+ -+ return IRQ_HANDLED; -+} -+ - /** - * phylink_start() - start a phylink instance - * @pl: a pointer to a &struct phylink returned from phylink_create() -@@ -947,7 +957,22 @@ void phylink_start(struct phylink *pl) - clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); - phylink_run_resolve(pl); - -- if (pl->link_an_mode == MLO_AN_FIXED && !IS_ERR(pl->link_gpio)) -+ if (pl->link_an_mode == MLO_AN_FIXED && pl->link_gpio) { -+ int irq = gpiod_to_irq(pl->link_gpio); -+ -+ if (irq > 0) { -+ if (!request_irq(irq, phylink_link_handler, -+ IRQF_TRIGGER_RISING | -+ IRQF_TRIGGER_FALLING, -+ "netdev link", pl)) -+ pl->link_irq = irq; -+ else -+ irq = 0; -+ } -+ if (irq <= 0) -+ mod_timer(&pl->link_poll, jiffies + HZ); -+ } -+ if (pl->link_an_mode == MLO_AN_FIXED && pl->get_fixed_state) - mod_timer(&pl->link_poll, jiffies + HZ); - if (pl->sfp_bus) - sfp_upstream_start(pl->sfp_bus); -@@ -973,8 +998,11 @@ void phylink_stop(struct phylink *pl) - phy_stop(pl->phydev); - if (pl->sfp_bus) - sfp_upstream_stop(pl->sfp_bus); -- if (pl->link_an_mode == MLO_AN_FIXED && !IS_ERR(pl->link_gpio)) -- del_timer_sync(&pl->link_poll); -+ del_timer_sync(&pl->link_poll); -+ if (pl->link_irq) { -+ free_irq(pl->link_irq, pl); -+ pl->link_irq = 0; -+ } - - phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); - } diff --git a/target/linux/generic/backport-4.19/710-v5.3-net-phy-allow-Clause-45-access-via-mii-ioctl.patch b/target/linux/generic/backport-4.19/710-v5.3-net-phy-allow-Clause-45-access-via-mii-ioctl.patch deleted file mode 100644 index 3a601c65b0..0000000000 --- a/target/linux/generic/backport-4.19/710-v5.3-net-phy-allow-Clause-45-access-via-mii-ioctl.patch +++ /dev/null @@ -1,77 +0,0 @@ -From eb5df3d026824832831376bbdf04e01a52776eea Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 28 May 2019 10:57:29 +0100 -Subject: [PATCH 608/660] net: phy: allow Clause 45 access via mii ioctl - -Allow userspace to generate Clause 45 MII access cycles via phylib. -This is useful for tools such as mii-diag to be able to inspect Clause -45 PHYs. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phy.c | 33 ++++++++++++++++++++++++--------- - 1 file changed, 24 insertions(+), 9 deletions(-) - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -397,6 +397,7 @@ int phy_mii_ioctl(struct phy_device *phy - struct mii_ioctl_data *mii_data = if_mii(ifr); - u16 val = mii_data->val_in; - bool change_autoneg = false; -+ int prtad, devad; - - switch (cmd) { - case SIOCGMIIPHY: -@@ -404,14 +405,29 @@ int phy_mii_ioctl(struct phy_device *phy - /* fall through */ - - case SIOCGMIIREG: -- mii_data->val_out = mdiobus_read(phydev->mdio.bus, -- mii_data->phy_id, -- mii_data->reg_num); -+ if (mdio_phy_id_is_c45(mii_data->phy_id)) { -+ prtad = mdio_phy_id_prtad(mii_data->phy_id); -+ devad = mdio_phy_id_devad(mii_data->phy_id); -+ devad = MII_ADDR_C45 | devad << 16 | mii_data->reg_num; -+ } else { -+ prtad = mii_data->phy_id; -+ devad = mii_data->reg_num; -+ } -+ mii_data->val_out = mdiobus_read(phydev->mdio.bus, prtad, -+ devad); - return 0; - - case SIOCSMIIREG: -- if (mii_data->phy_id == phydev->mdio.addr) { -- switch (mii_data->reg_num) { -+ if (mdio_phy_id_is_c45(mii_data->phy_id)) { -+ prtad = mdio_phy_id_prtad(mii_data->phy_id); -+ devad = mdio_phy_id_devad(mii_data->phy_id); -+ devad = MII_ADDR_C45 | devad << 16 | mii_data->reg_num; -+ } else { -+ prtad = mii_data->phy_id; -+ devad = mii_data->reg_num; -+ } -+ if (prtad == phydev->mdio.addr) { -+ switch (devad) { - case MII_BMCR: - if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) { - if (phydev->autoneg == AUTONEG_ENABLE) -@@ -443,11 +459,10 @@ int phy_mii_ioctl(struct phy_device *phy - } - } - -- mdiobus_write(phydev->mdio.bus, mii_data->phy_id, -- mii_data->reg_num, val); -+ mdiobus_write(phydev->mdio.bus, prtad, devad, val); - -- if (mii_data->phy_id == phydev->mdio.addr && -- mii_data->reg_num == MII_BMCR && -+ if (prtad == phydev->mdio.addr && -+ devad == MII_BMCR && - val & BMCR_RESET) - return phy_init_hw(phydev); - diff --git a/target/linux/generic/backport-4.19/711-v5.3-net-sfp-add-mandatory-attach-detach-methods-for-sfp-.patch b/target/linux/generic/backport-4.19/711-v5.3-net-sfp-add-mandatory-attach-detach-methods-for-sfp-.patch deleted file mode 100644 index 0600da2fad..0000000000 --- a/target/linux/generic/backport-4.19/711-v5.3-net-sfp-add-mandatory-attach-detach-methods-for-sfp-.patch +++ /dev/null @@ -1,94 +0,0 @@ -From aeabfaa63285470e81fa341e14f92d68880aa160 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 28 May 2019 10:57:34 +0100 -Subject: [PATCH 609/660] net: sfp: add mandatory attach/detach methods for sfp - buses - -Add attach and detach methods for SFP buses, which will allow us to get -rid of the netdev storage in sfp-bus. - -Signed-off-by: Russell King -Reviewed-by: Andrew Lunn -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 16 ++++++++++++++++ - drivers/net/phy/sfp-bus.c | 4 ++-- - include/linux/sfp.h | 6 ++++++ - 3 files changed, 24 insertions(+), 2 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1615,6 +1615,20 @@ int phylink_mii_ioctl(struct phylink *pl - } - EXPORT_SYMBOL_GPL(phylink_mii_ioctl); - -+static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) -+{ -+ struct phylink *pl = upstream; -+ -+ pl->netdev->sfp_bus = bus; -+} -+ -+static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) -+{ -+ struct phylink *pl = upstream; -+ -+ pl->netdev->sfp_bus = NULL; -+} -+ - static int phylink_sfp_module_insert(void *upstream, - const struct sfp_eeprom_id *id) - { -@@ -1733,6 +1747,8 @@ static void phylink_sfp_disconnect_phy(v - } - - static const struct sfp_upstream_ops sfp_phylink_ops = { -+ .attach = phylink_sfp_attach, -+ .detach = phylink_sfp_detach, - .module_insert = phylink_sfp_module_insert, - .link_up = phylink_sfp_link_up, - .link_down = phylink_sfp_link_down, ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -425,7 +425,7 @@ static int sfp_register_bus(struct sfp_b - bus->socket_ops->attach(bus->sfp); - if (bus->started) - bus->socket_ops->start(bus->sfp); -- bus->netdev->sfp_bus = bus; -+ bus->upstream_ops->attach(bus->upstream, bus); - bus->registered = true; - return 0; - } -@@ -434,8 +434,8 @@ static void sfp_unregister_bus(struct sf - { - const struct sfp_upstream_ops *ops = bus->upstream_ops; - -- bus->netdev->sfp_bus = NULL; - if (bus->registered) { -+ bus->upstream_ops->detach(bus->upstream, bus); - if (bus->started) - bus->socket_ops->stop(bus->sfp); - bus->socket_ops->detach(bus->sfp); ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -469,6 +469,10 @@ struct sfp_bus; - - /** - * struct sfp_upstream_ops - upstream operations structure -+ * @attach: called when the sfp socket driver is bound to the upstream -+ * (mandatory). -+ * @detach: called when the sfp socket driver is unbound from the upstream -+ * (mandatory). - * @module_insert: called after a module has been detected to determine - * whether the module is supported for the upstream device. - * @module_remove: called after the module has been removed. -@@ -481,6 +485,8 @@ struct sfp_bus; - * been removed. - */ - struct sfp_upstream_ops { -+ void (*attach)(void *priv, struct sfp_bus *bus); -+ void (*detach)(void *priv, struct sfp_bus *bus); - int (*module_insert)(void *priv, const struct sfp_eeprom_id *id); - void (*module_remove)(void *priv); - void (*link_down)(void *priv); diff --git a/target/linux/generic/backport-4.19/712-v5.3-net-sfp-remove-sfp-bus-use-of-netdevs.patch b/target/linux/generic/backport-4.19/712-v5.3-net-sfp-remove-sfp-bus-use-of-netdevs.patch deleted file mode 100644 index e68cc381dc..0000000000 --- a/target/linux/generic/backport-4.19/712-v5.3-net-sfp-remove-sfp-bus-use-of-netdevs.patch +++ /dev/null @@ -1,118 +0,0 @@ -From 60d756717d772be90d07a07cd2cc140c76da3e4a Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 28 May 2019 10:57:39 +0100 -Subject: [PATCH 610/660] net: sfp: remove sfp-bus use of netdevs - -The sfp-bus code now no longer has any use for the network device -structure, so remove its use. - -Signed-off-by: Russell King -Reviewed-by: Andrew Lunn -Signed-off-by: David S. Miller -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 3 +-- - drivers/net/phy/sfp-bus.c | 10 +++------- - include/linux/sfp.h | 6 ++---- - 3 files changed, 6 insertions(+), 13 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -555,8 +555,7 @@ static int phylink_register_sfp(struct p - return ret; - } - -- pl->sfp_bus = sfp_register_upstream(ref.fwnode, pl->netdev, pl, -- &sfp_phylink_ops); -+ pl->sfp_bus = sfp_register_upstream(ref.fwnode, pl, &sfp_phylink_ops); - if (!pl->sfp_bus) - return -ENOMEM; - ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -30,7 +30,6 @@ struct sfp_bus { - - const struct sfp_upstream_ops *upstream_ops; - void *upstream; -- struct net_device *netdev; - struct phy_device *phydev; - - bool registered; -@@ -517,13 +516,11 @@ static void sfp_upstream_clear(struct sf - { - bus->upstream_ops = NULL; - bus->upstream = NULL; -- bus->netdev = NULL; - } - - /** - * sfp_register_upstream() - Register the neighbouring device - * @fwnode: firmware node for the SFP bus -- * @ndev: network device associated with the interface - * @upstream: the upstream private data - * @ops: the upstream's &struct sfp_upstream_ops - * -@@ -534,7 +531,7 @@ static void sfp_upstream_clear(struct sf - * On error, returns %NULL. - */ - struct sfp_bus *sfp_register_upstream(struct fwnode_handle *fwnode, -- struct net_device *ndev, void *upstream, -+ void *upstream, - const struct sfp_upstream_ops *ops) - { - struct sfp_bus *bus = sfp_bus_get(fwnode); -@@ -544,7 +541,6 @@ struct sfp_bus *sfp_register_upstream(st - rtnl_lock(); - bus->upstream_ops = ops; - bus->upstream = upstream; -- bus->netdev = ndev; - - if (bus->sfp) { - ret = sfp_register_bus(bus); -@@ -670,7 +666,7 @@ struct sfp_bus *sfp_register_socket(stru - bus->sfp = sfp; - bus->socket_ops = ops; - -- if (bus->netdev) { -+ if (bus->upstream_ops) { - ret = sfp_register_bus(bus); - if (ret) - sfp_socket_clear(bus); -@@ -690,7 +686,7 @@ EXPORT_SYMBOL_GPL(sfp_register_socket); - void sfp_unregister_socket(struct sfp_bus *bus) - { - rtnl_lock(); -- if (bus->netdev) -+ if (bus->upstream_ops) - sfp_unregister_bus(bus); - sfp_socket_clear(bus); - rtnl_unlock(); ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -464,7 +464,6 @@ enum { - struct fwnode_handle; - struct ethtool_eeprom; - struct ethtool_modinfo; --struct net_device; - struct sfp_bus; - - /** -@@ -510,7 +509,7 @@ int sfp_get_module_eeprom(struct sfp_bus - void sfp_upstream_start(struct sfp_bus *bus); - void sfp_upstream_stop(struct sfp_bus *bus); - struct sfp_bus *sfp_register_upstream(struct fwnode_handle *fwnode, -- struct net_device *ndev, void *upstream, -+ void *upstream, - const struct sfp_upstream_ops *ops); - void sfp_unregister_upstream(struct sfp_bus *bus); - #else -@@ -555,8 +554,7 @@ static inline void sfp_upstream_stop(str - } - - static inline struct sfp_bus *sfp_register_upstream( -- struct fwnode_handle *fwnode, -- struct net_device *ndev, void *upstream, -+ struct fwnode_handle *fwnode, void *upstream, - const struct sfp_upstream_ops *ops) - { - return (struct sfp_bus *)-1; diff --git a/target/linux/generic/backport-4.19/713-v5.2-net-phylink-avoid-reducing-support-mask.patch b/target/linux/generic/backport-4.19/713-v5.2-net-phylink-avoid-reducing-support-mask.patch deleted file mode 100644 index 3aa8d9e571..0000000000 --- a/target/linux/generic/backport-4.19/713-v5.2-net-phylink-avoid-reducing-support-mask.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 8ac1d3e5cf7d277769ba3403d99f643fab1e3fae Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 23 Nov 2019 14:19:54 +0000 -Subject: [PATCH 611/660] net: phylink: avoid reducing support mask - -Avoid reducing the support mask as a result of the interface type -selected for SFP modules, or when setting the link settings through -ethtool - this should only change when the supported link modes of -the hardware combination change. - -Signed-off-by: Russell King -Signed-off-by: David S. Miller ---- - drivers/net/phy/phylink.c | 13 +++++++++---- - 1 file changed, 9 insertions(+), 4 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1137,6 +1137,7 @@ EXPORT_SYMBOL_GPL(phylink_ethtool_ksetti - int phylink_ethtool_ksettings_set(struct phylink *pl, - const struct ethtool_link_ksettings *kset) - { -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(support); - struct ethtool_link_ksettings our_kset; - struct phylink_link_state config; - int ret; -@@ -1147,11 +1148,12 @@ int phylink_ethtool_ksettings_set(struct - kset->base.autoneg != AUTONEG_ENABLE) - return -EINVAL; - -+ linkmode_copy(support, pl->supported); - config = pl->link_config; - - /* Mask out unsupported advertisements */ - linkmode_and(config.advertising, kset->link_modes.advertising, -- pl->supported); -+ support); - - /* FIXME: should we reject autoneg if phy/mac does not support it? */ - if (kset->base.autoneg == AUTONEG_DISABLE) { -@@ -1161,7 +1163,7 @@ int phylink_ethtool_ksettings_set(struct - * duplex. - */ - s = phy_lookup_setting(kset->base.speed, kset->base.duplex, -- pl->supported, -+ support, - __ETHTOOL_LINK_MODE_MASK_NBITS, false); - if (!s) - return -EINVAL; -@@ -1191,7 +1193,7 @@ int phylink_ethtool_ksettings_set(struct - __set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising); - } - -- if (phylink_validate(pl, pl->supported, &config)) -+ if (phylink_validate(pl, support, &config)) - return -EINVAL; - - /* If autonegotiation is enabled, we must have an advertisement */ -@@ -1633,6 +1635,7 @@ static int phylink_sfp_module_insert(voi - { - struct phylink *pl = upstream; - __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, }; -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); - struct phylink_link_state config; - phy_interface_t iface; - int ret = 0; -@@ -1660,6 +1663,8 @@ static int phylink_sfp_module_insert(voi - return ret; - } - -+ linkmode_copy(support1, support); -+ - iface = sfp_select_interface(pl->sfp_bus, id, config.advertising); - if (iface == PHY_INTERFACE_MODE_NA) { - netdev_err(pl->netdev, -@@ -1669,7 +1674,7 @@ static int phylink_sfp_module_insert(voi - } - - config.interface = iface; -- ret = phylink_validate(pl, support, &config); -+ ret = phylink_validate(pl, support1, &config); - if (ret) { - netdev_err(pl->netdev, "validation of %s/%s with support %*pb failed: %d\n", - phylink_an_mode_str(MLO_AN_INBAND), diff --git a/target/linux/generic/backport-4.19/714-v5.3-net-sfp-Stop-SFP-polling-and-interrupt-handling-duri.patch b/target/linux/generic/backport-4.19/714-v5.3-net-sfp-Stop-SFP-polling-and-interrupt-handling-duri.patch deleted file mode 100644 index 0509950296..0000000000 --- a/target/linux/generic/backport-4.19/714-v5.3-net-sfp-Stop-SFP-polling-and-interrupt-handling-duri.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 254236a22109efa84c9e9f5a9c76a1719439e309 Mon Sep 17 00:00:00 2001 -From: Robert Hancock -Date: Fri, 7 Jun 2019 10:42:35 -0600 -Subject: [PATCH 612/660] net: sfp: Stop SFP polling and interrupt handling - during shutdown - -SFP device polling can cause problems during the shutdown process if the -parent devices of the network controller have been shut down already. -This problem was seen on the iMX6 platform with PCIe devices, where -accessing the device after the bus is shut down causes a hang. - -Free any acquired GPIO interrupts and stop all delayed work in the SFP -driver during the shutdown process, so that we ensure that no pending -operations are still occurring after the SFP shutdown completes. - -Signed-off-by: Robert Hancock -Signed-off-by: David S. Miller ---- - drivers/net/phy/sfp.c | 31 ++++++++++++++++++++++++++----- - 1 file changed, 26 insertions(+), 5 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -183,6 +183,7 @@ struct sfp { - int (*write)(struct sfp *, bool, u8, void *, size_t); - - struct gpio_desc *gpio[GPIO_MAX]; -+ int gpio_irq[GPIO_MAX]; - - bool attached; - struct mutex st_mutex; /* Protects state */ -@@ -1803,7 +1804,7 @@ static int sfp_probe(struct platform_dev - const struct sff_data *sff; - struct sfp *sfp; - bool poll = false; -- int irq, err, i; -+ int err, i; - - sfp = sfp_alloc(&pdev->dev); - if (IS_ERR(sfp)) -@@ -1885,19 +1886,22 @@ static int sfp_probe(struct platform_dev - if (gpio_flags[i] != GPIOD_IN || !sfp->gpio[i]) - continue; - -- irq = gpiod_to_irq(sfp->gpio[i]); -- if (!irq) { -+ sfp->gpio_irq[i] = gpiod_to_irq(sfp->gpio[i]); -+ if (!sfp->gpio_irq[i]) { - poll = true; - continue; - } - -- err = devm_request_threaded_irq(sfp->dev, irq, NULL, sfp_irq, -+ err = devm_request_threaded_irq(sfp->dev, sfp->gpio_irq[i], -+ NULL, sfp_irq, - IRQF_ONESHOT | - IRQF_TRIGGER_RISING | - IRQF_TRIGGER_FALLING, - dev_name(sfp->dev), sfp); -- if (err) -+ if (err) { -+ sfp->gpio_irq[i] = 0; - poll = true; -+ } - } - - if (poll) -@@ -1928,9 +1932,26 @@ static int sfp_remove(struct platform_de - return 0; - } - -+static void sfp_shutdown(struct platform_device *pdev) -+{ -+ struct sfp *sfp = platform_get_drvdata(pdev); -+ int i; -+ -+ for (i = 0; i < GPIO_MAX; i++) { -+ if (!sfp->gpio_irq[i]) -+ continue; -+ -+ devm_free_irq(sfp->dev, sfp->gpio_irq[i], sfp); -+ } -+ -+ cancel_delayed_work_sync(&sfp->poll); -+ cancel_delayed_work_sync(&sfp->timeout); -+} -+ - static struct platform_driver sfp_driver = { - .probe = sfp_probe, - .remove = sfp_remove, -+ .shutdown = sfp_shutdown, - .driver = { - .name = "sfp", - .of_match_table = sfp_of_match, diff --git a/target/linux/generic/backport-4.19/715-v5.3-net-phylink-don-t-start-and-stop-SGMII-PHYs-in-SFP-m.patch b/target/linux/generic/backport-4.19/715-v5.3-net-phylink-don-t-start-and-stop-SGMII-PHYs-in-SFP-m.patch deleted file mode 100644 index 94fb2fb3e4..0000000000 --- a/target/linux/generic/backport-4.19/715-v5.3-net-phylink-don-t-start-and-stop-SGMII-PHYs-in-SFP-m.patch +++ /dev/null @@ -1,141 +0,0 @@ -From b8803113537a1c1f457eba6270d46e3af305031f Mon Sep 17 00:00:00 2001 -From: Arseny Solokha -Date: Wed, 24 Jul 2019 20:31:39 +0700 -Subject: [PATCH 613/660] net: phylink: don't start and stop SGMII PHYs in SFP - modules twice - -SFP modules connected using the SGMII interface have their own PHYs which -are handled by the struct phylink's phydev field. On the other hand, for -the modules connected using 1000Base-X interface that field is not set. - -Since commit ce0aa27ff3f6 ("sfp: add sfp-bus to bridge between network -devices and sfp cages") phylink_start() ends up setting the phydev field -using the sfp-bus infrastructure, which eventually calls phy_start() on it, -and then calling phy_start() again on the same phydev from phylink_start() -itself. Similar call sequence holds for phylink_stop(), only in the reverse -order. This results in WARNs during network interface bringup and shutdown -when a copper SFP module is connected, as phy_start() and phy_stop() are -called twice in a row for the same phy_device: - - % ip link set up dev eth0 - ------------[ cut here ]------------ - called from state UP - WARNING: CPU: 1 PID: 155 at drivers/net/phy/phy.c:895 phy_start+0x74/0xc0 - Modules linked in: - CPU: 1 PID: 155 Comm: backend Not tainted 5.2.0+ #1 - NIP: c0227bf0 LR: c0227bf0 CTR: c004d224 - REGS: df547720 TRAP: 0700 Not tainted (5.2.0+) - MSR: 00029000 CR: 24002822 XER: 00000000 - - GPR00: c0227bf0 df5477d8 df5d7080 00000014 df9d2370 df9d5ac4 1f4eb000 00000001 - GPR08: c061fe58 00000000 00000000 df5477d8 0000003c 100c8768 00000000 00000000 - GPR16: df486a00 c046f1c8 c046eea0 00000000 c046e904 c0239604 db68449c 00000000 - GPR24: e9083204 00000000 00000001 db684460 e9083404 00000000 db6dce00 db6dcc00 - NIP [c0227bf0] phy_start+0x74/0xc0 - LR [c0227bf0] phy_start+0x74/0xc0 - Call Trace: - [df5477d8] [c0227bf0] phy_start+0x74/0xc0 (unreliable) - [df5477e8] [c023cad0] startup_gfar+0x398/0x3f4 - [df547828] [c023cf08] gfar_enet_open+0x364/0x374 - [df547898] [c029d870] __dev_open+0xe4/0x140 - [df5478c8] [c029db70] __dev_change_flags+0xf0/0x188 - [df5478f8] [c029dc28] dev_change_flags+0x20/0x54 - [df547918] [c02ae304] do_setlink+0x310/0x818 - [df547a08] [c02b1eb8] __rtnl_newlink+0x384/0x6b0 - [df547c28] [c02b222c] rtnl_newlink+0x48/0x68 - [df547c48] [c02ad7c8] rtnetlink_rcv_msg+0x240/0x27c - [df547c98] [c02cc068] netlink_rcv_skb+0x8c/0xf0 - [df547cd8] [c02cba3c] netlink_unicast+0x114/0x19c - [df547d08] [c02cbd74] netlink_sendmsg+0x2b0/0x2c0 - [df547d58] [c027b668] sock_sendmsg_nosec+0x20/0x40 - [df547d68] [c027d080] ___sys_sendmsg+0x17c/0x1dc - [df547e98] [c027df7c] __sys_sendmsg+0x68/0x84 - [df547ef8] [c027e430] sys_socketcall+0x1a0/0x204 - [df547f38] [c000d1d8] ret_from_syscall+0x0/0x38 - --- interrupt: c01 at 0xfd4e030 - LR = 0xfd4e010 - Instruction dump: - 813f0188 38800000 2b890005 419d0014 3d40c046 5529103a 394aa208 7c8a482e - 3c60c046 3863a1b8 4cc63182 4be009a1 <0fe00000> 48000030 3c60c046 3863a1d0 - ---[ end trace d4c095aeaf6ea998 ]--- - -and - - % ip link set down dev eth0 - ------------[ cut here ]------------ - called from state HALTED - WARNING: CPU: 1 PID: 184 at drivers/net/phy/phy.c:858 phy_stop+0x3c/0x88 - - <...> - - Call Trace: - [df581788] [c0228450] phy_stop+0x3c/0x88 (unreliable) - [df581798] [c022d548] sfp_sm_phy_detach+0x1c/0x44 - [df5817a8] [c022e8cc] sfp_sm_event+0x4b0/0x87c - [df581848] [c022f04c] sfp_upstream_stop+0x34/0x44 - [df581858] [c0225608] phylink_stop+0x7c/0xe4 - [df581868] [c023c57c] stop_gfar+0x7c/0x94 - [df581888] [c023c5b8] gfar_close+0x24/0x94 - [df5818a8] [c0298688] __dev_close_many+0xdc/0xf8 - [df5818c8] [c029db58] __dev_change_flags+0xd8/0x188 - [df5818f8] [c029dc28] dev_change_flags+0x20/0x54 - [df581918] [c02ae304] do_setlink+0x310/0x818 - [df581a08] [c02b1eb8] __rtnl_newlink+0x384/0x6b0 - [df581c28] [c02b222c] rtnl_newlink+0x48/0x68 - [df581c48] [c02ad7c8] rtnetlink_rcv_msg+0x240/0x27c - [df581c98] [c02cc068] netlink_rcv_skb+0x8c/0xf0 - [df581cd8] [c02cba3c] netlink_unicast+0x114/0x19c - [df581d08] [c02cbd74] netlink_sendmsg+0x2b0/0x2c0 - [df581d58] [c027b668] sock_sendmsg_nosec+0x20/0x40 - [df581d68] [c027d080] ___sys_sendmsg+0x17c/0x1dc - [df581e98] [c027df7c] __sys_sendmsg+0x68/0x84 - [df581ef8] [c027e430] sys_socketcall+0x1a0/0x204 - [df581f38] [c000d1d8] ret_from_syscall+0x0/0x38 - - <...> - - ---[ end trace d4c095aeaf6ea999 ]--- - -SFP modules with the 1000Base-X interface are not affected. - -Place explicit calls to phy_start() and phy_stop() before enabling or after -disabling an attached SFP module, where phydev is not yet set (or is -already unset), so they will be made only from the inside of sfp-bus, if -needed. - -Fixes: 217962615662 ("net: phy: warn if phy_start is called from invalid state") -Signed-off-by: Arseny Solokha -Acked-by: Russell King -Signed-off-by: David S. Miller ---- - drivers/net/phy/phylink.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -973,10 +973,10 @@ void phylink_start(struct phylink *pl) - } - if (pl->link_an_mode == MLO_AN_FIXED && pl->get_fixed_state) - mod_timer(&pl->link_poll, jiffies + HZ); -- if (pl->sfp_bus) -- sfp_upstream_start(pl->sfp_bus); - if (pl->phydev) - phy_start(pl->phydev); -+ if (pl->sfp_bus) -+ sfp_upstream_start(pl->sfp_bus); - } - EXPORT_SYMBOL_GPL(phylink_start); - -@@ -993,10 +993,10 @@ void phylink_stop(struct phylink *pl) - { - ASSERT_RTNL(); - -- if (pl->phydev) -- phy_stop(pl->phydev); - if (pl->sfp_bus) - sfp_upstream_stop(pl->sfp_bus); -+ if (pl->phydev) -+ phy_stop(pl->phydev); - del_timer_sync(&pl->link_poll); - if (pl->link_irq) { - free_irq(pl->link_irq, pl); diff --git a/target/linux/generic/backport-4.19/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch b/target/linux/generic/backport-4.19/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch deleted file mode 100644 index bc16e8f1c6..0000000000 --- a/target/linux/generic/backport-4.19/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch +++ /dev/null @@ -1,179 +0,0 @@ -From 4054955f0da08c81d42220cb445820d474f1ac92 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 14 Sep 2019 14:21:22 +0100 -Subject: [PATCH 614/660] net: sfp: move fwnode parsing into sfp-bus layer - -Rather than parsing the sfp firmware node in phylink, parse it in the -sfp-bus code, so we can re-use this code for PHYs without having to -duplicate the parsing. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 21 ++++--------- - drivers/net/phy/sfp-bus.c | 65 +++++++++++++++++++++++++-------------- - include/linux/sfp.h | 10 +++--- - 3 files changed, 53 insertions(+), 43 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -538,26 +538,17 @@ static const struct sfp_upstream_ops sfp - static int phylink_register_sfp(struct phylink *pl, - struct fwnode_handle *fwnode) - { -- struct fwnode_reference_args ref; -+ struct sfp_bus *bus; - int ret; - -- if (!fwnode) -- return 0; -- -- ret = fwnode_property_get_reference_args(fwnode, "sfp", NULL, -- 0, 0, &ref); -- if (ret < 0) { -- if (ret == -ENOENT) -- return 0; -- -- netdev_err(pl->netdev, "unable to parse \"sfp\" node: %d\n", -- ret); -+ bus = sfp_register_upstream_node(fwnode, pl, &sfp_phylink_ops); -+ if (IS_ERR(bus)) { -+ ret = PTR_ERR(bus); -+ netdev_err(pl->netdev, "unable to attach SFP bus: %d\n", ret); - return ret; - } - -- pl->sfp_bus = sfp_register_upstream(ref.fwnode, pl, &sfp_phylink_ops); -- if (!pl->sfp_bus) -- return -ENOMEM; -+ pl->sfp_bus = bus; - - return 0; - } ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -3,6 +3,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -519,45 +520,63 @@ static void sfp_upstream_clear(struct sf - } - - /** -- * sfp_register_upstream() - Register the neighbouring device -- * @fwnode: firmware node for the SFP bus -+ * sfp_register_upstream_node() - parse and register the neighbouring device -+ * @fwnode: firmware node for the parent device (MAC or PHY) - * @upstream: the upstream private data - * @ops: the upstream's &struct sfp_upstream_ops - * -- * Register the upstream device (eg, PHY) with the SFP bus. MAC drivers -- * should use phylink, which will call this function for them. Returns -- * a pointer to the allocated &struct sfp_bus. -+ * Parse the parent device's firmware node for a SFP bus, and register the -+ * SFP bus using sfp_register_upstream(). - * -- * On error, returns %NULL. -+ * Returns: on success, a pointer to the sfp_bus structure, -+ * %NULL if no SFP is specified, -+ * on failure, an error pointer value: -+ * corresponding to the errors detailed for -+ * fwnode_property_get_reference_args(). -+ * %-ENOMEM if we failed to allocate the bus. -+ * an error from the upstream's connect_phy() method. - */ --struct sfp_bus *sfp_register_upstream(struct fwnode_handle *fwnode, -- void *upstream, -- const struct sfp_upstream_ops *ops) --{ -- struct sfp_bus *bus = sfp_bus_get(fwnode); -- int ret = 0; -- -- if (bus) { -- rtnl_lock(); -- bus->upstream_ops = ops; -- bus->upstream = upstream; -+struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode, -+ void *upstream, -+ const struct sfp_upstream_ops *ops) -+{ -+ struct fwnode_reference_args ref; -+ struct sfp_bus *bus; -+ int ret; - -- if (bus->sfp) { -- ret = sfp_register_bus(bus); -- if (ret) -- sfp_upstream_clear(bus); -- } -- rtnl_unlock(); -+ ret = fwnode_property_get_reference_args(fwnode, "sfp", NULL, -+ 0, 0, &ref); -+ if (ret == -ENOENT) -+ return NULL; -+ else if (ret < 0) -+ return ERR_PTR(ret); -+ -+ bus = sfp_bus_get(ref.fwnode); -+ fwnode_handle_put(ref.fwnode); -+ if (!bus) -+ return ERR_PTR(-ENOMEM); -+ -+ rtnl_lock(); -+ bus->upstream_ops = ops; -+ bus->upstream = upstream; -+ -+ if (bus->sfp) { -+ ret = sfp_register_bus(bus); -+ if (ret) -+ sfp_upstream_clear(bus); -+ } else { -+ ret = 0; - } -+ rtnl_unlock(); - - if (ret) { - sfp_bus_put(bus); -- bus = NULL; -+ bus = ERR_PTR(ret); - } - - return bus; - } --EXPORT_SYMBOL_GPL(sfp_register_upstream); -+EXPORT_SYMBOL_GPL(sfp_register_upstream_node); - - /** - * sfp_unregister_upstream() - Unregister sfp bus ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -508,9 +508,9 @@ int sfp_get_module_eeprom(struct sfp_bus - u8 *data); - void sfp_upstream_start(struct sfp_bus *bus); - void sfp_upstream_stop(struct sfp_bus *bus); --struct sfp_bus *sfp_register_upstream(struct fwnode_handle *fwnode, -- void *upstream, -- const struct sfp_upstream_ops *ops); -+struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode, -+ void *upstream, -+ const struct sfp_upstream_ops *ops); - void sfp_unregister_upstream(struct sfp_bus *bus); - #else - static inline int sfp_parse_port(struct sfp_bus *bus, -@@ -553,11 +553,11 @@ static inline void sfp_upstream_stop(str - { - } - --static inline struct sfp_bus *sfp_register_upstream( -+static inline struct sfp_bus *sfp_register_upstream_node( - struct fwnode_handle *fwnode, void *upstream, - const struct sfp_upstream_ops *ops) - { -- return (struct sfp_bus *)-1; -+ return NULL; - } - - static inline void sfp_unregister_upstream(struct sfp_bus *bus) diff --git a/target/linux/generic/backport-4.19/717-v5.5-net-sfp-rework-upstream-interface.patch b/target/linux/generic/backport-4.19/717-v5.5-net-sfp-rework-upstream-interface.patch deleted file mode 100644 index a901b15aaf..0000000000 --- a/target/linux/generic/backport-4.19/717-v5.5-net-sfp-rework-upstream-interface.patch +++ /dev/null @@ -1,254 +0,0 @@ -From 863b5b6941f9f43b924393b6ba2b36647e7dee42 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 7 Nov 2019 17:06:08 +0000 -Subject: [PATCH 615/660] net: sfp: rework upstream interface - -The current upstream interface is an all-or-nothing, which is -sub-optimal for future changes, as it doesn't allow the upstream driver -to prepare for the SFP module becoming available, as it is at boot. - -Switch to a find-sfp-bus, add-upstream, del-upstream, put-sfp-bus -interface structure instead, which allows the upstream driver to -prepare for a module being available as soon as add-upstream is called. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 10 +++-- - drivers/net/phy/sfp-bus.c | 92 +++++++++++++++++++++++++++------------ - include/linux/sfp.h | 25 +++++++---- - 3 files changed, 88 insertions(+), 39 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -541,7 +541,7 @@ static int phylink_register_sfp(struct p - struct sfp_bus *bus; - int ret; - -- bus = sfp_register_upstream_node(fwnode, pl, &sfp_phylink_ops); -+ bus = sfp_bus_find_fwnode(fwnode); - if (IS_ERR(bus)) { - ret = PTR_ERR(bus); - netdev_err(pl->netdev, "unable to attach SFP bus: %d\n", ret); -@@ -550,7 +550,10 @@ static int phylink_register_sfp(struct p - - pl->sfp_bus = bus; - -- return 0; -+ ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); -+ sfp_bus_put(bus); -+ -+ return ret; - } - - /** -@@ -634,8 +637,7 @@ EXPORT_SYMBOL_GPL(phylink_create); - */ - void phylink_destroy(struct phylink *pl) - { -- if (pl->sfp_bus) -- sfp_unregister_upstream(pl->sfp_bus); -+ sfp_bus_del_upstream(pl->sfp_bus); - if (pl->link_gpio) - gpiod_put(pl->link_gpio); - ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -403,10 +403,19 @@ static void sfp_bus_release(struct kref - kfree(bus); - } - --static void sfp_bus_put(struct sfp_bus *bus) -+/** -+ * sfp_bus_put() - put a reference on the &struct sfp_bus -+ * bus: the &struct sfp_bus found via sfp_bus_find_fwnode() -+ * -+ * Put a reference on the &struct sfp_bus and free the underlying structure -+ * if this was the last reference. -+ */ -+void sfp_bus_put(struct sfp_bus *bus) - { -- kref_put_mutex(&bus->kref, sfp_bus_release, &sfp_mutex); -+ if (bus) -+ kref_put_mutex(&bus->kref, sfp_bus_release, &sfp_mutex); - } -+EXPORT_SYMBOL_GPL(sfp_bus_put); - - static int sfp_register_bus(struct sfp_bus *bus) - { -@@ -422,11 +431,11 @@ static int sfp_register_bus(struct sfp_b - return ret; - } - } -+ bus->registered = true; - bus->socket_ops->attach(bus->sfp); - if (bus->started) - bus->socket_ops->start(bus->sfp); - bus->upstream_ops->attach(bus->upstream, bus); -- bus->registered = true; - return 0; - } - -@@ -520,13 +529,12 @@ static void sfp_upstream_clear(struct sf - } - - /** -- * sfp_register_upstream_node() - parse and register the neighbouring device -+ * sfp_bus_find_fwnode() - parse and locate the SFP bus from fwnode - * @fwnode: firmware node for the parent device (MAC or PHY) -- * @upstream: the upstream private data -- * @ops: the upstream's &struct sfp_upstream_ops - * -- * Parse the parent device's firmware node for a SFP bus, and register the -- * SFP bus using sfp_register_upstream(). -+ * Parse the parent device's firmware node for a SFP bus, and locate -+ * the sfp_bus structure, incrementing its reference count. This must -+ * be put via sfp_bus_put() when done. - * - * Returns: on success, a pointer to the sfp_bus structure, - * %NULL if no SFP is specified, -@@ -536,9 +544,7 @@ static void sfp_upstream_clear(struct sf - * %-ENOMEM if we failed to allocate the bus. - * an error from the upstream's connect_phy() method. - */ --struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode, -- void *upstream, -- const struct sfp_upstream_ops *ops) -+struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode) - { - struct fwnode_reference_args ref; - struct sfp_bus *bus; -@@ -556,7 +562,39 @@ struct sfp_bus *sfp_register_upstream_no - if (!bus) - return ERR_PTR(-ENOMEM); - -+ return bus; -+} -+EXPORT_SYMBOL_GPL(sfp_bus_find_fwnode); -+ -+/** -+ * sfp_bus_add_upstream() - parse and register the neighbouring device -+ * @bus: the &struct sfp_bus found via sfp_bus_find_fwnode() -+ * @upstream: the upstream private data -+ * @ops: the upstream's &struct sfp_upstream_ops -+ * -+ * Add upstream driver for the SFP bus, and if the bus is complete, register -+ * the SFP bus using sfp_register_upstream(). This takes a reference on the -+ * bus, so it is safe to put the bus after this call. -+ * -+ * Returns: on success, a pointer to the sfp_bus structure, -+ * %NULL if no SFP is specified, -+ * on failure, an error pointer value: -+ * corresponding to the errors detailed for -+ * fwnode_property_get_reference_args(). -+ * %-ENOMEM if we failed to allocate the bus. -+ * an error from the upstream's connect_phy() method. -+ */ -+int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream, -+ const struct sfp_upstream_ops *ops) -+{ -+ int ret; -+ -+ /* If no bus, return success */ -+ if (!bus) -+ return 0; -+ - rtnl_lock(); -+ kref_get(&bus->kref); - bus->upstream_ops = ops; - bus->upstream = upstream; - -@@ -569,33 +607,33 @@ struct sfp_bus *sfp_register_upstream_no - } - rtnl_unlock(); - -- if (ret) { -+ if (ret) - sfp_bus_put(bus); -- bus = ERR_PTR(ret); -- } - -- return bus; -+ return ret; - } --EXPORT_SYMBOL_GPL(sfp_register_upstream_node); -+EXPORT_SYMBOL_GPL(sfp_bus_add_upstream); - - /** -- * sfp_unregister_upstream() - Unregister sfp bus -+ * sfp_bus_del_upstream() - Delete a sfp bus - * @bus: a pointer to the &struct sfp_bus structure for the sfp module - * -- * Unregister a previously registered upstream connection for the SFP -- * module. @bus is returned from sfp_register_upstream(). -+ * Delete a previously registered upstream connection for the SFP -+ * module. @bus should have been added by sfp_bus_add_upstream(). - */ --void sfp_unregister_upstream(struct sfp_bus *bus) -+void sfp_bus_del_upstream(struct sfp_bus *bus) - { -- rtnl_lock(); -- if (bus->sfp) -- sfp_unregister_bus(bus); -- sfp_upstream_clear(bus); -- rtnl_unlock(); -+ if (bus) { -+ rtnl_lock(); -+ if (bus->sfp) -+ sfp_unregister_bus(bus); -+ sfp_upstream_clear(bus); -+ rtnl_unlock(); - -- sfp_bus_put(bus); -+ sfp_bus_put(bus); -+ } - } --EXPORT_SYMBOL_GPL(sfp_unregister_upstream); -+EXPORT_SYMBOL_GPL(sfp_bus_del_upstream); - - /* Socket driver entry points */ - int sfp_add_phy(struct sfp_bus *bus, struct phy_device *phydev) ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -508,10 +508,11 @@ int sfp_get_module_eeprom(struct sfp_bus - u8 *data); - void sfp_upstream_start(struct sfp_bus *bus); - void sfp_upstream_stop(struct sfp_bus *bus); --struct sfp_bus *sfp_register_upstream_node(struct fwnode_handle *fwnode, -- void *upstream, -- const struct sfp_upstream_ops *ops); --void sfp_unregister_upstream(struct sfp_bus *bus); -+void sfp_bus_put(struct sfp_bus *bus); -+struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode); -+int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream, -+ const struct sfp_upstream_ops *ops); -+void sfp_bus_del_upstream(struct sfp_bus *bus); - #else - static inline int sfp_parse_port(struct sfp_bus *bus, - const struct sfp_eeprom_id *id, -@@ -553,14 +554,22 @@ static inline void sfp_upstream_stop(str - { - } - --static inline struct sfp_bus *sfp_register_upstream_node( -- struct fwnode_handle *fwnode, void *upstream, -- const struct sfp_upstream_ops *ops) -+static inline void sfp_bus_put(struct sfp_bus *bus) -+{ -+} -+ -+static inline struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode) - { - return NULL; - } - --static inline void sfp_unregister_upstream(struct sfp_bus *bus) -+static int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream, -+ const struct sfp_upstream_ops *ops) -+{ -+ return 0; -+} -+ -+static inline void sfp_bus_del_upstream(struct sfp_bus *bus) - { - } - #endif diff --git a/target/linux/generic/backport-4.19/718-v5.5-net-sfp-fix-sfp_bus_put-kernel-documentation.patch b/target/linux/generic/backport-4.19/718-v5.5-net-sfp-fix-sfp_bus_put-kernel-documentation.patch deleted file mode 100644 index 7bfff60f2f..0000000000 --- a/target/linux/generic/backport-4.19/718-v5.5-net-sfp-fix-sfp_bus_put-kernel-documentation.patch +++ /dev/null @@ -1,27 +0,0 @@ -From ea7bfd81921827d334c2a23bd11ef0e4e2abafd2 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 9 Nov 2019 08:13:50 +0000 -Subject: [PATCH 616/660] net: sfp: fix sfp_bus_put() kernel documentation - -The kbuild test robot found a problem with htmldocs with the recent -change to the SFP interfaces. Fix the kernel documentation for -sfp_bus_put() which was missing an '@' before the argument name -description. - -Fixes: 727b3668b730 ("net: sfp: rework upstream interface") -Signed-off-by: Russell King ---- - drivers/net/phy/sfp-bus.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -405,7 +405,7 @@ static void sfp_bus_release(struct kref - - /** - * sfp_bus_put() - put a reference on the &struct sfp_bus -- * bus: the &struct sfp_bus found via sfp_bus_find_fwnode() -+ * @bus: the &struct sfp_bus found via sfp_bus_find_fwnode() - * - * Put a reference on the &struct sfp_bus and free the underlying structure - * if this was the last reference. diff --git a/target/linux/generic/backport-4.19/719-v5.5-net-sfp-fix-sfp_bus_add_upstream-warning.patch b/target/linux/generic/backport-4.19/719-v5.5-net-sfp-fix-sfp_bus_add_upstream-warning.patch deleted file mode 100644 index 9528049e1b..0000000000 --- a/target/linux/generic/backport-4.19/719-v5.5-net-sfp-fix-sfp_bus_add_upstream-warning.patch +++ /dev/null @@ -1,27 +0,0 @@ -From f76d84cd85f8bd3f083495f7ca723822cba8abc9 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Mon, 11 Nov 2019 10:23:35 +0000 -Subject: [PATCH 617/660] net: sfp: fix sfp_bus_add_upstream() warning - -When building with SFP disabled, the stub for sfp_bus_add_upstream() -missed "inline". Add it. - -Fixes: 727b3668b730 ("net: sfp: rework upstream interface") -Signed-off-by: Russell King ---- - include/linux/sfp.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -563,8 +563,8 @@ static inline struct sfp_bus *sfp_bus_fi - return NULL; - } - --static int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream, -- const struct sfp_upstream_ops *ops) -+static inline int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream, -+ const struct sfp_upstream_ops *ops) - { - return 0; - } diff --git a/target/linux/generic/backport-4.19/720-v5.5-net-sfp-move-sfp-sub-state-machines-into-separate-fu.patch b/target/linux/generic/backport-4.19/720-v5.5-net-sfp-move-sfp-sub-state-machines-into-separate-fu.patch deleted file mode 100644 index 2f90b00438..0000000000 --- a/target/linux/generic/backport-4.19/720-v5.5-net-sfp-move-sfp-sub-state-machines-into-separate-fu.patch +++ /dev/null @@ -1,124 +0,0 @@ -From b9d6ed5cdb67533feda7f221eb06f2f9f1ff5047 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 11 Oct 2019 19:33:58 +0100 -Subject: [PATCH 618/660] net: sfp: move sfp sub-state machines into separate - functions - -Move the SFP sub-state machines out of the main state machine function, -in preparation for it doing a bit more with the device state. By doing -so, we ensure that our debug after the main state machine is always -printed. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 74 +++++++++++++++++++++++++------------------ - 1 file changed, 43 insertions(+), 31 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1479,19 +1479,34 @@ static void sfp_sm_mod_remove(struct sfp - dev_info(sfp->dev, "module removed\n"); - } - --static void sfp_sm_event(struct sfp *sfp, unsigned int event) -+/* This state machine tracks the netdev up/down state */ -+static void sfp_sm_device(struct sfp *sfp, unsigned int event) - { -- mutex_lock(&sfp->sm_mutex); -+ switch (sfp->sm_dev_state) { -+ default: -+ if (event == SFP_E_DEV_UP) -+ sfp->sm_dev_state = SFP_DEV_UP; -+ break; - -- dev_dbg(sfp->dev, "SM: enter %s:%s:%s event %s\n", -- mod_state_to_str(sfp->sm_mod_state), -- dev_state_to_str(sfp->sm_dev_state), -- sm_state_to_str(sfp->sm_state), -- event_to_str(event)); -+ case SFP_DEV_UP: -+ if (event == SFP_E_DEV_DOWN) { -+ /* If the module has a PHY, avoid raising TX disable -+ * as this resets the PHY. Otherwise, raise it to -+ * turn the laser off. -+ */ -+ if (!sfp->mod_phy) -+ sfp_module_tx_disable(sfp); -+ sfp->sm_dev_state = SFP_DEV_DOWN; -+ } -+ break; -+ } -+} - -- /* This state machine tracks the insert/remove state of -- * the module, and handles probing the on-board EEPROM. -- */ -+/* This state machine tracks the insert/remove state of -+ * the module, and handles probing the on-board EEPROM. -+ */ -+static void sfp_sm_module(struct sfp *sfp, unsigned int event) -+{ - switch (sfp->sm_mod_state) { - default: - if (event == SFP_E_INSERT && sfp->attached) { -@@ -1531,27 +1546,10 @@ static void sfp_sm_event(struct sfp *sfp - } - break; - } -+} - -- /* This state machine tracks the netdev up/down state */ -- switch (sfp->sm_dev_state) { -- default: -- if (event == SFP_E_DEV_UP) -- sfp->sm_dev_state = SFP_DEV_UP; -- break; -- -- case SFP_DEV_UP: -- if (event == SFP_E_DEV_DOWN) { -- /* If the module has a PHY, avoid raising TX disable -- * as this resets the PHY. Otherwise, raise it to -- * turn the laser off. -- */ -- if (!sfp->mod_phy) -- sfp_module_tx_disable(sfp); -- sfp->sm_dev_state = SFP_DEV_DOWN; -- } -- break; -- } -- -+static void sfp_sm_main(struct sfp *sfp, unsigned int event) -+{ - /* Some events are global */ - if (sfp->sm_state != SFP_S_DOWN && - (sfp->sm_mod_state != SFP_MOD_PRESENT || -@@ -1562,7 +1560,6 @@ static void sfp_sm_event(struct sfp *sfp - if (sfp->mod_phy) - sfp_sm_phy_detach(sfp); - sfp_sm_next(sfp, SFP_S_DOWN, 0); -- mutex_unlock(&sfp->sm_mutex); - return; - } - -@@ -1617,6 +1614,21 @@ static void sfp_sm_event(struct sfp *sfp - case SFP_S_TX_DISABLE: - break; - } -+} -+ -+static void sfp_sm_event(struct sfp *sfp, unsigned int event) -+{ -+ mutex_lock(&sfp->sm_mutex); -+ -+ dev_dbg(sfp->dev, "SM: enter %s:%s:%s event %s\n", -+ mod_state_to_str(sfp->sm_mod_state), -+ dev_state_to_str(sfp->sm_dev_state), -+ sm_state_to_str(sfp->sm_state), -+ event_to_str(event)); -+ -+ sfp_sm_module(sfp, event); -+ sfp_sm_device(sfp, event); -+ sfp_sm_main(sfp, event); - - dev_dbg(sfp->dev, "SM: exit %s:%s:%s\n", - mod_state_to_str(sfp->sm_mod_state), diff --git a/target/linux/generic/backport-4.19/721-v5.5-net-sfp-move-tx-disable-on-device-down-to-main-state.patch b/target/linux/generic/backport-4.19/721-v5.5-net-sfp-move-tx-disable-on-device-down-to-main-state.patch deleted file mode 100644 index 5b3caaf0fd..0000000000 --- a/target/linux/generic/backport-4.19/721-v5.5-net-sfp-move-tx-disable-on-device-down-to-main-state.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 7e89b737c97a9e7a81dd1584000bc136b92f12fd Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 11 Oct 2019 22:14:47 +0100 -Subject: [PATCH 619/660] net: sfp: move tx disable on device down to main - state machine - -Move the tx disable assertion on device down to the main state -machine. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 10 ++-------- - 1 file changed, 2 insertions(+), 8 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1489,15 +1489,8 @@ static void sfp_sm_device(struct sfp *sf - break; - - case SFP_DEV_UP: -- if (event == SFP_E_DEV_DOWN) { -- /* If the module has a PHY, avoid raising TX disable -- * as this resets the PHY. Otherwise, raise it to -- * turn the laser off. -- */ -- if (!sfp->mod_phy) -- sfp_module_tx_disable(sfp); -+ if (event == SFP_E_DEV_DOWN) - sfp->sm_dev_state = SFP_DEV_DOWN; -- } - break; - } - } -@@ -1559,6 +1552,7 @@ static void sfp_sm_main(struct sfp *sfp, - sfp_sm_link_down(sfp); - if (sfp->mod_phy) - sfp_sm_phy_detach(sfp); -+ sfp_module_tx_disable(sfp); - sfp_sm_next(sfp, SFP_S_DOWN, 0); - return; - } diff --git a/target/linux/generic/backport-4.19/722-v5.5-net-sfp-rename-sfp_sm_ins_next-as-sfp_sm_mod_next.patch b/target/linux/generic/backport-4.19/722-v5.5-net-sfp-rename-sfp_sm_ins_next-as-sfp_sm_mod_next.patch deleted file mode 100644 index ed84e76fdf..0000000000 --- a/target/linux/generic/backport-4.19/722-v5.5-net-sfp-rename-sfp_sm_ins_next-as-sfp_sm_mod_next.patch +++ /dev/null @@ -1,71 +0,0 @@ -From f2a1ccfc4ad4f97c98c3cc18eb32992151ce089a Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 11 Oct 2019 22:27:21 +0100 -Subject: [PATCH 620/660] net: sfp: rename sfp_sm_ins_next() as - sfp_sm_mod_next() - -sfp_sm_ins_next() modifies the module state machine. Change it's name -to reflect this. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1180,7 +1180,7 @@ static void sfp_sm_next(struct sfp *sfp, - sfp_sm_set_timer(sfp, timeout); - } - --static void sfp_sm_ins_next(struct sfp *sfp, unsigned int state, -+static void sfp_sm_mod_next(struct sfp *sfp, unsigned int state, - unsigned int timeout) - { - sfp->sm_mod_state = state; -@@ -1504,22 +1504,22 @@ static void sfp_sm_module(struct sfp *sf - default: - if (event == SFP_E_INSERT && sfp->attached) { - sfp_module_tx_disable(sfp); -- sfp_sm_ins_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT); -+ sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT); - } - break; - - case SFP_MOD_PROBE: - if (event == SFP_E_REMOVE) { -- sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0); -+ sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); - } else if (event == SFP_E_TIMEOUT) { - int val = sfp_sm_mod_probe(sfp); - - if (val == 0) -- sfp_sm_ins_next(sfp, SFP_MOD_PRESENT, 0); -+ sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0); - else if (val > 0) -- sfp_sm_ins_next(sfp, SFP_MOD_HPOWER, val); -+ sfp_sm_mod_next(sfp, SFP_MOD_HPOWER, val); - else if (val != -EAGAIN) -- sfp_sm_ins_next(sfp, SFP_MOD_ERROR, 0); -+ sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); - else - sfp_sm_set_timer(sfp, T_PROBE_RETRY); - } -@@ -1527,7 +1527,7 @@ static void sfp_sm_module(struct sfp *sf - - case SFP_MOD_HPOWER: - if (event == SFP_E_TIMEOUT) { -- sfp_sm_ins_next(sfp, SFP_MOD_PRESENT, 0); -+ sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0); - break; - } - /* fallthrough */ -@@ -1535,7 +1535,7 @@ static void sfp_sm_module(struct sfp *sf - case SFP_MOD_ERROR: - if (event == SFP_E_REMOVE) { - sfp_sm_mod_remove(sfp); -- sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0); -+ sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); - } - break; - } diff --git a/target/linux/generic/backport-4.19/723-v5.5-net-sfp-handle-module-remove-outside-state-machine.patch b/target/linux/generic/backport-4.19/723-v5.5-net-sfp-handle-module-remove-outside-state-machine.patch deleted file mode 100644 index 542aeaea77..0000000000 --- a/target/linux/generic/backport-4.19/723-v5.5-net-sfp-handle-module-remove-outside-state-machine.patch +++ /dev/null @@ -1,53 +0,0 @@ -From d2591ea5520e2ee8fa557f96bb64c23cafac4b20 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 15 Oct 2019 10:33:13 +0100 -Subject: [PATCH 621/660] net: sfp: handle module remove outside state machine - -Removing a module resets the module state machine back to its initial -state. Rather than explicitly handling this in every state, handle it -early on outside of the state machine. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 16 +++++++++------- - 1 file changed, 9 insertions(+), 7 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1500,6 +1500,14 @@ static void sfp_sm_device(struct sfp *sf - */ - static void sfp_sm_module(struct sfp *sfp, unsigned int event) - { -+ /* Handle remove event globally, it resets this state machine */ -+ if (event == SFP_E_REMOVE) { -+ if (sfp->sm_mod_state > SFP_MOD_PROBE) -+ sfp_sm_mod_remove(sfp); -+ sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); -+ return; -+ } -+ - switch (sfp->sm_mod_state) { - default: - if (event == SFP_E_INSERT && sfp->attached) { -@@ -1509,9 +1517,7 @@ static void sfp_sm_module(struct sfp *sf - break; - - case SFP_MOD_PROBE: -- if (event == SFP_E_REMOVE) { -- sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); -- } else if (event == SFP_E_TIMEOUT) { -+ if (event == SFP_E_TIMEOUT) { - int val = sfp_sm_mod_probe(sfp); - - if (val == 0) -@@ -1533,10 +1539,6 @@ static void sfp_sm_module(struct sfp *sf - /* fallthrough */ - case SFP_MOD_PRESENT: - case SFP_MOD_ERROR: -- if (event == SFP_E_REMOVE) { -- sfp_sm_mod_remove(sfp); -- sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); -- } - break; - } - } diff --git a/target/linux/generic/backport-4.19/724-v5.5-net-sfp-rename-T_PROBE_WAIT-to-T_SERIAL.patch b/target/linux/generic/backport-4.19/724-v5.5-net-sfp-rename-T_PROBE_WAIT-to-T_SERIAL.patch deleted file mode 100644 index e0c35feea3..0000000000 --- a/target/linux/generic/backport-4.19/724-v5.5-net-sfp-rename-T_PROBE_WAIT-to-T_SERIAL.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 615090acb3c0b41691f3a03522ea38350387c0e4 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 15 Oct 2019 10:54:15 +0100 -Subject: [PATCH 622/660] net: sfp: rename T_PROBE_WAIT to T_SERIAL - -SFF-8472 rev 12.2 defines the time for the serial bus to become ready -using t_serial. Use this as our identifier for this timeout to make -it clear what we are referring to. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 13 ++++++------- - 1 file changed, 6 insertions(+), 7 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -147,11 +147,10 @@ static const enum gpiod_flags gpio_flags - * the same length on the PCB, which means it's possible for MOD DEF 0 to - * connect before the I2C bus on MOD DEF 1/2. - * -- * The SFP MSA specifies 300ms as t_init (the time taken for TX_FAULT to -- * be deasserted) but makes no mention of the earliest time before we can -- * access the I2C EEPROM. However, Avago modules require 300ms. -+ * The SFF-8472 specifies t_serial ("Time from power on until module is -+ * ready for data transmission over the two wire serial bus.") as 300ms. - */ --#define T_PROBE_INIT msecs_to_jiffies(300) -+#define T_SERIAL msecs_to_jiffies(300) - #define T_HPOWER_LEVEL msecs_to_jiffies(300) - #define T_PROBE_RETRY msecs_to_jiffies(100) - -@@ -1495,8 +1494,8 @@ static void sfp_sm_device(struct sfp *sf - } - } - --/* This state machine tracks the insert/remove state of -- * the module, and handles probing the on-board EEPROM. -+/* This state machine tracks the insert/remove state of the module, probes -+ * the on-board EEPROM, and sets up the power level. - */ - static void sfp_sm_module(struct sfp *sfp, unsigned int event) - { -@@ -1512,7 +1511,7 @@ static void sfp_sm_module(struct sfp *sf - default: - if (event == SFP_E_INSERT && sfp->attached) { - sfp_module_tx_disable(sfp); -- sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT); -+ sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL); - } - break; - diff --git a/target/linux/generic/backport-4.19/725-v5.5-net-sfp-parse-SFP-power-requirement-earlier.patch b/target/linux/generic/backport-4.19/725-v5.5-net-sfp-parse-SFP-power-requirement-earlier.patch deleted file mode 100644 index 0b358f86d2..0000000000 --- a/target/linux/generic/backport-4.19/725-v5.5-net-sfp-parse-SFP-power-requirement-earlier.patch +++ /dev/null @@ -1,115 +0,0 @@ -From d4b8746219e8c0361e5ed6e440ab3a8a600d1f76 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 11 Oct 2019 17:24:40 +0100 -Subject: [PATCH 623/660] net: sfp: parse SFP power requirement earlier - -Parse the SFP power requirement earlier, in preparation for moving the -power level setup code. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 42 +++++++++++++++++++++++++++++------------- - 1 file changed, 29 insertions(+), 13 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -196,6 +196,8 @@ struct sfp { - unsigned int sm_retries; - - struct sfp_eeprom_id id; -+ unsigned int module_power_mW; -+ - #if IS_ENABLED(CONFIG_HWMON) - struct sfp_diag diag; - struct device *hwmon_dev; -@@ -1309,17 +1311,14 @@ static void sfp_sm_mod_init(struct sfp * - sfp_sm_probe_phy(sfp); - } - --static int sfp_sm_mod_hpower(struct sfp *sfp) -+static int sfp_module_parse_power(struct sfp *sfp) - { -- u32 power; -- u8 val; -- int err; -+ u32 power_mW = 1000; - -- power = 1000; - if (sfp->id.ext.options & cpu_to_be16(SFP_OPTIONS_POWER_DECL)) -- power = 1500; -+ power_mW = 1500; - if (sfp->id.ext.options & cpu_to_be16(SFP_OPTIONS_HIGH_POWER_LEVEL)) -- power = 2000; -+ power_mW = 2000; - - if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE && - (sfp->id.ext.diagmon & (SFP_DIAGMON_DDM | SFP_DIAGMON_ADDRMODE)) != -@@ -1328,23 +1327,33 @@ static int sfp_sm_mod_hpower(struct sfp - * or requires an address change sequence, so assume that - * the module powers up in the indicated power mode. - */ -- if (power > sfp->max_power_mW) { -+ if (power_mW > sfp->max_power_mW) { - dev_err(sfp->dev, - "Host does not support %u.%uW modules\n", -- power / 1000, (power / 100) % 10); -+ power_mW / 1000, (power_mW / 100) % 10); - return -EINVAL; - } - return 0; - } - -- if (power > sfp->max_power_mW) { -+ if (power_mW > sfp->max_power_mW) { - dev_warn(sfp->dev, - "Host does not support %u.%uW modules, module left in power mode 1\n", -- power / 1000, (power / 100) % 10); -+ power_mW / 1000, (power_mW / 100) % 10); - return 0; - } - -- if (power <= 1000) -+ sfp->module_power_mW = power_mW; -+ -+ return 0; -+} -+ -+static int sfp_sm_mod_hpower(struct sfp *sfp) -+{ -+ u8 val; -+ int err; -+ -+ if (sfp->module_power_mW <= 1000) - return 0; - - err = sfp_read(sfp, true, SFP_EXT_STATUS, &val, sizeof(val)); -@@ -1364,7 +1373,8 @@ static int sfp_sm_mod_hpower(struct sfp - } - - dev_info(sfp->dev, "Module switched to %u.%uW power level\n", -- power / 1000, (power / 100) % 10); -+ sfp->module_power_mW / 1000, -+ (sfp->module_power_mW / 100) % 10); - return T_HPOWER_LEVEL; - - err: -@@ -1451,6 +1461,11 @@ static int sfp_sm_mod_probe(struct sfp * - dev_warn(sfp->dev, - "module address swap to access page 0xA2 is not supported.\n"); - -+ /* Parse the module power requirement */ -+ ret = sfp_module_parse_power(sfp); -+ if (ret < 0) -+ return ret; -+ - ret = sfp_hwmon_insert(sfp); - if (ret < 0) - return ret; -@@ -1474,6 +1489,7 @@ static void sfp_sm_mod_remove(struct sfp - sfp_module_tx_disable(sfp); - - memset(&sfp->id, 0, sizeof(sfp->id)); -+ sfp->module_power_mW = 0; - - dev_info(sfp->dev, "module removed\n"); - } diff --git a/target/linux/generic/backport-4.19/726-v5.5-net-sfp-avoid-power-switch-on-address-change-modules.patch b/target/linux/generic/backport-4.19/726-v5.5-net-sfp-avoid-power-switch-on-address-change-modules.patch deleted file mode 100644 index 2ddd4c4d02..0000000000 --- a/target/linux/generic/backport-4.19/726-v5.5-net-sfp-avoid-power-switch-on-address-change-modules.patch +++ /dev/null @@ -1,65 +0,0 @@ -From dca678b8838945572cf50584cb33a7199c1fd397 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 17 Oct 2019 00:24:18 +0100 -Subject: [PATCH 624/660] net: sfp: avoid power switch on address-change - modules - -If the module indicates that it requires an address change sequence to -switch between address 0x50 and 0x51, which we don't support, we can't -write to the register that controls the power mode to switch to high -power mode. Warn the user that the module may not be functional in -this case, and don't try to change the power mode. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 31 ++++++++++++++++++++----------- - 1 file changed, 20 insertions(+), 11 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1320,25 +1320,34 @@ static int sfp_module_parse_power(struct - if (sfp->id.ext.options & cpu_to_be16(SFP_OPTIONS_HIGH_POWER_LEVEL)) - power_mW = 2000; - -- if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE && -- (sfp->id.ext.diagmon & (SFP_DIAGMON_DDM | SFP_DIAGMON_ADDRMODE)) != -- SFP_DIAGMON_DDM) { -- /* The module appears not to implement bus address 0xa2, -- * or requires an address change sequence, so assume that -- * the module powers up in the indicated power mode. -- */ -- if (power_mW > sfp->max_power_mW) { -+ if (power_mW > sfp->max_power_mW) { -+ /* Module power specification exceeds the allowed maximum. */ -+ if (sfp->id.ext.sff8472_compliance == -+ SFP_SFF8472_COMPLIANCE_NONE && -+ !(sfp->id.ext.diagmon & SFP_DIAGMON_DDM)) { -+ /* The module appears not to implement bus address -+ * 0xa2, so assume that the module powers up in the -+ * indicated mode. -+ */ - dev_err(sfp->dev, - "Host does not support %u.%uW modules\n", - power_mW / 1000, (power_mW / 100) % 10); - return -EINVAL; -+ } else { -+ dev_warn(sfp->dev, -+ "Host does not support %u.%uW modules, module left in power mode 1\n", -+ power_mW / 1000, (power_mW / 100) % 10); -+ return 0; - } -- return 0; - } - -- if (power_mW > sfp->max_power_mW) { -+ /* If the module requires a higher power mode, but also requires -+ * an address change sequence, warn the user that the module may -+ * not be functional. -+ */ -+ if (sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE && power_mW > 1000) { - dev_warn(sfp->dev, -- "Host does not support %u.%uW modules, module left in power mode 1\n", -+ "Address Change Sequence not supported but module requies %u.%uW, module may not be functional\n", - power_mW / 1000, (power_mW / 100) % 10); - return 0; - } diff --git a/target/linux/generic/backport-4.19/727-v5.5-net-sfp-control-TX_DISABLE-and-phy-only-from-main-st.patch b/target/linux/generic/backport-4.19/727-v5.5-net-sfp-control-TX_DISABLE-and-phy-only-from-main-st.patch deleted file mode 100644 index 0eac6abb88..0000000000 --- a/target/linux/generic/backport-4.19/727-v5.5-net-sfp-control-TX_DISABLE-and-phy-only-from-main-st.patch +++ /dev/null @@ -1,52 +0,0 @@ -From df5c4d93c5a59cba0f7479a4cd4e22b50726ce88 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 17 Oct 2019 11:12:42 +0100 -Subject: [PATCH 625/660] net: sfp: control TX_DISABLE and phy only from main - state machine - -We initialise TX_DISABLE when the sfp cage is probed, and then -maintain its state in the main state machine. However, the module -state machine: -- negates it when detecting a newly inserted module when it's already - guaranteed to be negated. -- negates it when the module is removed, but the main state machine - will do this anyway. - -Make TX_DISABLE entirely controlled by the main state machine. - -The main state machine also probes the module for a PHY, and removes -the PHY when the the module is removed. Hence, removing the PHY in -sfp_sm_module_remove() is also redundant, and is a left-over from -when we tried to probe for the PHY from the module state machine. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 9 +-------- - 1 file changed, 1 insertion(+), 8 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1492,11 +1492,6 @@ static void sfp_sm_mod_remove(struct sfp - - sfp_hwmon_remove(sfp); - -- if (sfp->mod_phy) -- sfp_sm_phy_detach(sfp); -- -- sfp_module_tx_disable(sfp); -- - memset(&sfp->id, 0, sizeof(sfp->id)); - sfp->module_power_mW = 0; - -@@ -1534,10 +1529,8 @@ static void sfp_sm_module(struct sfp *sf - - switch (sfp->sm_mod_state) { - default: -- if (event == SFP_E_INSERT && sfp->attached) { -- sfp_module_tx_disable(sfp); -+ if (event == SFP_E_INSERT && sfp->attached) - sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL); -- } - break; - - case SFP_MOD_PROBE: diff --git a/target/linux/generic/backport-4.19/728-v5.5-net-sfp-split-the-PHY-probe-from-sfp_sm_mod_init.patch b/target/linux/generic/backport-4.19/728-v5.5-net-sfp-split-the-PHY-probe-from-sfp_sm_mod_init.patch deleted file mode 100644 index 7830b9268f..0000000000 --- a/target/linux/generic/backport-4.19/728-v5.5-net-sfp-split-the-PHY-probe-from-sfp_sm_mod_init.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 5ed0bd49b2d3ac4439c2d7f44e5a82b7cf6f409a Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 18 Oct 2019 10:09:02 +0100 -Subject: [PATCH 626/660] net: sfp: split the PHY probe from sfp_sm_mod_init() - -Move the PHY probe into a separate function, splitting it from -sfp_sm_mod_init(). This will allow us to eliminate the 50ms mdelay() -inside the state machine. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 21 +++++++++++++-------- - 1 file changed, 13 insertions(+), 8 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1288,14 +1288,10 @@ static void sfp_sm_fault(struct sfp *sfp - static void sfp_sm_mod_init(struct sfp *sfp) - { - sfp_module_tx_enable(sfp); -+} - -- /* Wait t_init before indicating that the link is up, provided the -- * current state indicates no TX_FAULT. If TX_FAULT clears before -- * this time, that's fine too. -- */ -- sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -- sfp->sm_retries = 5; -- -+static void sfp_sm_probe_for_phy(struct sfp *sfp) -+{ - /* Setting the serdes link mode is guesswork: there's no - * field in the EEPROM which indicates what mode should - * be used. -@@ -1580,8 +1576,17 @@ static void sfp_sm_main(struct sfp *sfp, - switch (sfp->sm_state) { - case SFP_S_DOWN: - if (sfp->sm_mod_state == SFP_MOD_PRESENT && -- sfp->sm_dev_state == SFP_DEV_UP) -+ sfp->sm_dev_state == SFP_DEV_UP) { - sfp_sm_mod_init(sfp); -+ sfp_sm_probe_for_phy(sfp); -+ -+ /* Wait t_init before indicating that the link is up, -+ * provided the current state indicates no TX_FAULT. If -+ * TX_FAULT clears before this time, that's fine too. -+ */ -+ sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -+ sfp->sm_retries = 5; -+ } - break; - - case SFP_S_INIT: diff --git a/target/linux/generic/backport-4.19/729-v5.5-net-sfp-eliminate-mdelay-from-PHY-probe.patch b/target/linux/generic/backport-4.19/729-v5.5-net-sfp-eliminate-mdelay-from-PHY-probe.patch deleted file mode 100644 index 5dc92bd10e..0000000000 --- a/target/linux/generic/backport-4.19/729-v5.5-net-sfp-eliminate-mdelay-from-PHY-probe.patch +++ /dev/null @@ -1,130 +0,0 @@ -From 0fe72afaa31f98ebd71bd6683fc47021105d0157 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 18 Oct 2019 10:21:46 +0100 -Subject: [PATCH 627/660] net: sfp: eliminate mdelay() from PHY probe - -Rather than using mdelay() to wait before probing the PHY (which holds -several locks, including the rtnl lock), add an extra wait state to -the state machine to introduce the 50ms delay without holding any -locks. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 52 +++++++++++++++++++++++++++++++++---------- - 1 file changed, 40 insertions(+), 12 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -52,6 +52,7 @@ enum { - SFP_DEV_UP, - - SFP_S_DOWN = 0, -+ SFP_S_WAIT, - SFP_S_INIT, - SFP_S_WAIT_LOS, - SFP_S_LINK_UP, -@@ -108,6 +109,7 @@ static const char *event_to_str(unsigned - - static const char * const sm_state_strings[] = { - [SFP_S_DOWN] = "down", -+ [SFP_S_WAIT] = "wait", - [SFP_S_INIT] = "init", - [SFP_S_WAIT_LOS] = "wait_los", - [SFP_S_LINK_UP] = "link_up", -@@ -139,6 +141,7 @@ static const enum gpiod_flags gpio_flags - GPIOD_ASIS, - }; - -+#define T_WAIT msecs_to_jiffies(50) - #define T_INIT_JIFFIES msecs_to_jiffies(300) - #define T_RESET_US 10 - #define T_FAULT_RECOVER msecs_to_jiffies(1000) -@@ -159,9 +162,6 @@ static const enum gpiod_flags gpio_flags - */ - #define SFP_PHY_ADDR 22 - --/* Give this long for the PHY to reset. */ --#define T_PHY_RESET_MS 50 -- - struct sff_data { - unsigned int gpios; - bool (*module_supported)(const struct sfp_eeprom_id *id); -@@ -1202,8 +1202,6 @@ static void sfp_sm_probe_phy(struct sfp - struct phy_device *phy; - int err; - -- msleep(T_PHY_RESET_MS); -- - phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR); - if (phy == ERR_PTR(-ENODEV)) { - dev_info(sfp->dev, "no PHY detected\n"); -@@ -1558,6 +1556,8 @@ static void sfp_sm_module(struct sfp *sf - - static void sfp_sm_main(struct sfp *sfp, unsigned int event) - { -+ unsigned long timeout; -+ - /* Some events are global */ - if (sfp->sm_state != SFP_S_DOWN && - (sfp->sm_mod_state != SFP_MOD_PRESENT || -@@ -1575,17 +1575,45 @@ static void sfp_sm_main(struct sfp *sfp, - /* The main state machine */ - switch (sfp->sm_state) { - case SFP_S_DOWN: -- if (sfp->sm_mod_state == SFP_MOD_PRESENT && -- sfp->sm_dev_state == SFP_DEV_UP) { -- sfp_sm_mod_init(sfp); -- sfp_sm_probe_for_phy(sfp); -+ if (sfp->sm_mod_state != SFP_MOD_PRESENT || -+ sfp->sm_dev_state != SFP_DEV_UP) -+ break; -+ -+ sfp_sm_mod_init(sfp); -+ -+ /* Initialise the fault clearance retries */ -+ sfp->sm_retries = 5; -+ -+ /* We need to check the TX_FAULT state, which is not defined -+ * while TX_DISABLE is asserted. The earliest we want to do -+ * anything (such as probe for a PHY) is 50ms. -+ */ -+ sfp_sm_next(sfp, SFP_S_WAIT, T_WAIT); -+ break; -+ -+ case SFP_S_WAIT: -+ if (event != SFP_E_TIMEOUT) -+ break; -+ -+ sfp_sm_probe_for_phy(sfp); - -+ if (sfp->state & SFP_F_TX_FAULT) { - /* Wait t_init before indicating that the link is up, - * provided the current state indicates no TX_FAULT. If - * TX_FAULT clears before this time, that's fine too. - */ -- sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -- sfp->sm_retries = 5; -+ timeout = T_INIT_JIFFIES; -+ if (timeout > T_WAIT) -+ timeout -= T_WAIT; -+ else -+ timeout = 1; -+ -+ sfp_sm_next(sfp, SFP_S_INIT, timeout); -+ } else { -+ /* TX_FAULT is not asserted, assume the module has -+ * finished initialising. -+ */ -+ goto init_done; - } - break; - -@@ -1593,7 +1621,7 @@ static void sfp_sm_main(struct sfp *sfp, - if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) - sfp_sm_fault(sfp, true); - else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) -- sfp_sm_link_check_los(sfp); -+ init_done: sfp_sm_link_check_los(sfp); - break; - - case SFP_S_WAIT_LOS: diff --git a/target/linux/generic/backport-4.19/730-v5.5-net-sfp-allow-fault-processing-to-transition-to-othe.patch b/target/linux/generic/backport-4.19/730-v5.5-net-sfp-allow-fault-processing-to-transition-to-othe.patch deleted file mode 100644 index 6e34e6cc0f..0000000000 --- a/target/linux/generic/backport-4.19/730-v5.5-net-sfp-allow-fault-processing-to-transition-to-othe.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 2aa424ee7fbe43e2cd24e28c2f6388c4e1796bd2 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 18 Oct 2019 09:58:33 +0100 -Subject: [PATCH 628/660] net: sfp: allow fault processing to transition to - other states - -Add the next state to sfp_sm_fault() so that it can branch to other -states. This will be necessary to improve the initialisation path. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1269,7 +1269,7 @@ static bool sfp_los_event_inactive(struc - event == SFP_E_LOS_LOW); - } - --static void sfp_sm_fault(struct sfp *sfp, bool warn) -+static void sfp_sm_fault(struct sfp *sfp, unsigned int next_state, bool warn) - { - if (sfp->sm_retries && !--sfp->sm_retries) { - dev_err(sfp->dev, -@@ -1279,7 +1279,7 @@ static void sfp_sm_fault(struct sfp *sfp - if (warn) - dev_err(sfp->dev, "module transmit fault indicated\n"); - -- sfp_sm_next(sfp, SFP_S_TX_FAULT, T_FAULT_RECOVER); -+ sfp_sm_next(sfp, next_state, T_FAULT_RECOVER); - } - } - -@@ -1619,14 +1619,14 @@ static void sfp_sm_main(struct sfp *sfp, - - case SFP_S_INIT: - if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) -- sfp_sm_fault(sfp, true); -+ sfp_sm_fault(sfp, SFP_S_TX_FAULT, true); - else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) - init_done: sfp_sm_link_check_los(sfp); - break; - - case SFP_S_WAIT_LOS: - if (event == SFP_E_TX_FAULT) -- sfp_sm_fault(sfp, true); -+ sfp_sm_fault(sfp, SFP_S_TX_FAULT, true); - else if (sfp_los_event_inactive(sfp, event)) - sfp_sm_link_up(sfp); - break; -@@ -1634,7 +1634,7 @@ static void sfp_sm_main(struct sfp *sfp, - case SFP_S_LINK_UP: - if (event == SFP_E_TX_FAULT) { - sfp_sm_link_down(sfp); -- sfp_sm_fault(sfp, true); -+ sfp_sm_fault(sfp, SFP_S_TX_FAULT, true); - } else if (sfp_los_event_active(sfp, event)) { - sfp_sm_link_down(sfp); - sfp_sm_next(sfp, SFP_S_WAIT_LOS, 0); -@@ -1650,7 +1650,7 @@ static void sfp_sm_main(struct sfp *sfp, - - case SFP_S_REINIT: - if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) { -- sfp_sm_fault(sfp, false); -+ sfp_sm_fault(sfp, SFP_S_TX_FAULT, false); - } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { - dev_info(sfp->dev, "module transmit fault recovered\n"); - sfp_sm_link_check_los(sfp); diff --git a/target/linux/generic/backport-4.19/731-v5.5-net-sfp-ensure-TX_FAULT-has-deasserted-before-probin.patch b/target/linux/generic/backport-4.19/731-v5.5-net-sfp-ensure-TX_FAULT-has-deasserted-before-probin.patch deleted file mode 100644 index 03415fb6e7..0000000000 --- a/target/linux/generic/backport-4.19/731-v5.5-net-sfp-ensure-TX_FAULT-has-deasserted-before-probin.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 38b62a12231be4b86fc5ca5477579d29831c02a5 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 18 Oct 2019 10:31:07 +0100 -Subject: [PATCH 629/660] net: sfp: ensure TX_FAULT has deasserted before - probing the PHY - -TX_FAULT should be deasserted to indicate that the module has completed -its initialisation. This may include the on-board PHY, so wait until -the module has deasserted TX_FAULT before probing the PHY. - -This means that we need an extra state to handle a TX_FAULT that -remains set for longer than t_init, since using the existing handling -state would bypass the PHY probe. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 31 +++++++++++++++++++++++++------ - 1 file changed, 25 insertions(+), 6 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -54,6 +54,7 @@ enum { - SFP_S_DOWN = 0, - SFP_S_WAIT, - SFP_S_INIT, -+ SFP_S_INIT_TX_FAULT, - SFP_S_WAIT_LOS, - SFP_S_LINK_UP, - SFP_S_TX_FAULT, -@@ -111,6 +112,7 @@ static const char * const sm_state_strin - [SFP_S_DOWN] = "down", - [SFP_S_WAIT] = "wait", - [SFP_S_INIT] = "init", -+ [SFP_S_INIT_TX_FAULT] = "init_tx_fault", - [SFP_S_WAIT_LOS] = "wait_los", - [SFP_S_LINK_UP] = "link_up", - [SFP_S_TX_FAULT] = "tx_fault", -@@ -1595,8 +1597,6 @@ static void sfp_sm_main(struct sfp *sfp, - if (event != SFP_E_TIMEOUT) - break; - -- sfp_sm_probe_for_phy(sfp); -- - if (sfp->state & SFP_F_TX_FAULT) { - /* Wait t_init before indicating that the link is up, - * provided the current state indicates no TX_FAULT. If -@@ -1618,10 +1618,29 @@ static void sfp_sm_main(struct sfp *sfp, - break; - - case SFP_S_INIT: -- if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) -- sfp_sm_fault(sfp, SFP_S_TX_FAULT, true); -- else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) -- init_done: sfp_sm_link_check_los(sfp); -+ if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) { -+ /* TX_FAULT is still asserted after t_init, so assume -+ * there is a fault. -+ */ -+ sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT, -+ sfp->sm_retries == 5); -+ } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { -+ init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT -+ * clear. Probe for the PHY and check the LOS state. -+ */ -+ sfp_sm_probe_for_phy(sfp); -+ sfp_sm_link_check_los(sfp); -+ -+ /* Reset the fault retry count */ -+ sfp->sm_retries = 5; -+ } -+ break; -+ -+ case SFP_S_INIT_TX_FAULT: -+ if (event == SFP_E_TIMEOUT) { -+ sfp_module_tx_fault_reset(sfp); -+ sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -+ } - break; - - case SFP_S_WAIT_LOS: diff --git a/target/linux/generic/backport-4.19/732-v5.5-net-sfp-track-upstream-s-attachment-state-in-state-m.patch b/target/linux/generic/backport-4.19/732-v5.5-net-sfp-track-upstream-s-attachment-state-in-state-m.patch deleted file mode 100644 index 5ee44dbf0c..0000000000 --- a/target/linux/generic/backport-4.19/732-v5.5-net-sfp-track-upstream-s-attachment-state-in-state-m.patch +++ /dev/null @@ -1,153 +0,0 @@ -From ec6036a58f979c66bbd5cd9d0d1c783a98c2c644 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 5 Nov 2019 12:57:40 +0000 -Subject: [PATCH 630/660] net: sfp: track upstream's attachment state in state - machine - -Track the upstream's attachment state in the state machine rather than -maintaining a boolean, which ensures that we have a strict order of -ATTACH followed by an UP event - we can never believe that a newly -attached upstream will be anything but down. - -Rearrange the order of state machines so we run the module state -machine after the upstream device's state machine, so the module state -machine can check the current state of the device and take action to -e.g. reset back to empty state when the upstream is detached. - -This is to allow the module detection to run independently of the -network device becoming available. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 42 +++++++++++++++++++++++++++++------------- - 1 file changed, 29 insertions(+), 13 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -34,6 +34,8 @@ enum { - - SFP_E_INSERT = 0, - SFP_E_REMOVE, -+ SFP_E_DEV_ATTACH, -+ SFP_E_DEV_DETACH, - SFP_E_DEV_DOWN, - SFP_E_DEV_UP, - SFP_E_TX_FAULT, -@@ -48,7 +50,8 @@ enum { - SFP_MOD_PRESENT, - SFP_MOD_ERROR, - -- SFP_DEV_DOWN = 0, -+ SFP_DEV_DETACHED = 0, -+ SFP_DEV_DOWN, - SFP_DEV_UP, - - SFP_S_DOWN = 0, -@@ -78,6 +81,7 @@ static const char *mod_state_to_str(unsi - } - - static const char * const dev_state_strings[] = { -+ [SFP_DEV_DETACHED] = "detached", - [SFP_DEV_DOWN] = "down", - [SFP_DEV_UP] = "up", - }; -@@ -92,6 +96,8 @@ static const char *dev_state_to_str(unsi - static const char * const event_strings[] = { - [SFP_E_INSERT] = "insert", - [SFP_E_REMOVE] = "remove", -+ [SFP_E_DEV_ATTACH] = "dev_attach", -+ [SFP_E_DEV_DETACH] = "dev_detach", - [SFP_E_DEV_DOWN] = "dev_down", - [SFP_E_DEV_UP] = "dev_up", - [SFP_E_TX_FAULT] = "tx_fault", -@@ -186,7 +192,6 @@ struct sfp { - struct gpio_desc *gpio[GPIO_MAX]; - int gpio_irq[GPIO_MAX]; - -- bool attached; - struct mutex st_mutex; /* Protects state */ - unsigned int state; - struct delayed_work poll; -@@ -1494,17 +1499,26 @@ static void sfp_sm_mod_remove(struct sfp - dev_info(sfp->dev, "module removed\n"); - } - --/* This state machine tracks the netdev up/down state */ -+/* This state machine tracks the upstream's state */ - static void sfp_sm_device(struct sfp *sfp, unsigned int event) - { - switch (sfp->sm_dev_state) { - default: -- if (event == SFP_E_DEV_UP) -+ if (event == SFP_E_DEV_ATTACH) -+ sfp->sm_dev_state = SFP_DEV_DOWN; -+ break; -+ -+ case SFP_DEV_DOWN: -+ if (event == SFP_E_DEV_DETACH) -+ sfp->sm_dev_state = SFP_DEV_DETACHED; -+ else if (event == SFP_E_DEV_UP) - sfp->sm_dev_state = SFP_DEV_UP; - break; - - case SFP_DEV_UP: -- if (event == SFP_E_DEV_DOWN) -+ if (event == SFP_E_DEV_DETACH) -+ sfp->sm_dev_state = SFP_DEV_DETACHED; -+ else if (event == SFP_E_DEV_DOWN) - sfp->sm_dev_state = SFP_DEV_DOWN; - break; - } -@@ -1515,17 +1529,20 @@ static void sfp_sm_device(struct sfp *sf - */ - static void sfp_sm_module(struct sfp *sfp, unsigned int event) - { -- /* Handle remove event globally, it resets this state machine */ -- if (event == SFP_E_REMOVE) { -+ /* Handle remove event globally, it resets this state machine. -+ * Also deal with upstream detachment. -+ */ -+ if (event == SFP_E_REMOVE || sfp->sm_dev_state < SFP_DEV_DOWN) { - if (sfp->sm_mod_state > SFP_MOD_PROBE) - sfp_sm_mod_remove(sfp); -- sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); -+ if (sfp->sm_mod_state != SFP_MOD_EMPTY) -+ sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); - return; - } - - switch (sfp->sm_mod_state) { - default: -- if (event == SFP_E_INSERT && sfp->attached) -+ if (event == SFP_E_INSERT) - sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL); - break; - -@@ -1691,8 +1708,8 @@ static void sfp_sm_event(struct sfp *sfp - sm_state_to_str(sfp->sm_state), - event_to_str(event)); - -- sfp_sm_module(sfp, event); - sfp_sm_device(sfp, event); -+ sfp_sm_module(sfp, event); - sfp_sm_main(sfp, event); - - dev_dbg(sfp->dev, "SM: exit %s:%s:%s\n", -@@ -1705,15 +1722,14 @@ static void sfp_sm_event(struct sfp *sfp - - static void sfp_attach(struct sfp *sfp) - { -- sfp->attached = true; -+ sfp_sm_event(sfp, SFP_E_DEV_ATTACH); - if (sfp->state & SFP_F_PRESENT) - sfp_sm_event(sfp, SFP_E_INSERT); - } - - static void sfp_detach(struct sfp *sfp) - { -- sfp->attached = false; -- sfp_sm_event(sfp, SFP_E_REMOVE); -+ sfp_sm_event(sfp, SFP_E_DEV_DETACH); - } - - static void sfp_start(struct sfp *sfp) diff --git a/target/linux/generic/backport-4.19/733-v5.5-net-sfp-split-power-mode-switching-from-probe.patch b/target/linux/generic/backport-4.19/733-v5.5-net-sfp-split-power-mode-switching-from-probe.patch deleted file mode 100644 index 06b3cb5428..0000000000 --- a/target/linux/generic/backport-4.19/733-v5.5-net-sfp-split-power-mode-switching-from-probe.patch +++ /dev/null @@ -1,184 +0,0 @@ -From fdff863a4ce3677907f64396e34c45025abb6600 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 5 Nov 2019 12:59:36 +0000 -Subject: [PATCH 631/660] net: sfp: split power mode switching from probe - -Switch the power mode switching from the probe, so that we don't -repeatedly re-probe the SFP device if there is a problem accessing -the registers at I2C address 0x51. - -In splitting this out, we can also fix a bug where we leave the module -in high-power mode when the upstream device is detached but the module -is still inserted. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 101 ++++++++++++++++++++++++++---------------- - 1 file changed, 64 insertions(+), 37 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -47,6 +47,7 @@ enum { - SFP_MOD_EMPTY = 0, - SFP_MOD_PROBE, - SFP_MOD_HPOWER, -+ SFP_MOD_WAITPWR, - SFP_MOD_PRESENT, - SFP_MOD_ERROR, - -@@ -69,6 +70,7 @@ static const char * const mod_state_str - [SFP_MOD_EMPTY] = "empty", - [SFP_MOD_PROBE] = "probe", - [SFP_MOD_HPOWER] = "hpower", -+ [SFP_MOD_WAITPWR] = "waitpwr", - [SFP_MOD_PRESENT] = "present", - [SFP_MOD_ERROR] = "error", - }; -@@ -1358,37 +1360,34 @@ static int sfp_module_parse_power(struct - return 0; - } - --static int sfp_sm_mod_hpower(struct sfp *sfp) -+static int sfp_sm_mod_hpower(struct sfp *sfp, bool enable) - { - u8 val; - int err; - -- if (sfp->module_power_mW <= 1000) -- return 0; -- - err = sfp_read(sfp, true, SFP_EXT_STATUS, &val, sizeof(val)); - if (err != sizeof(val)) { - dev_err(sfp->dev, "Failed to read EEPROM: %d\n", err); -- err = -EAGAIN; -- goto err; -+ return -EAGAIN; - } - -- val |= BIT(0); -+ if (enable) -+ val |= BIT(0); -+ else -+ val &= ~BIT(0); - - err = sfp_write(sfp, true, SFP_EXT_STATUS, &val, sizeof(val)); - if (err != sizeof(val)) { - dev_err(sfp->dev, "Failed to write EEPROM: %d\n", err); -- err = -EAGAIN; -- goto err; -+ return -EAGAIN; - } - -- dev_info(sfp->dev, "Module switched to %u.%uW power level\n", -- sfp->module_power_mW / 1000, -- (sfp->module_power_mW / 100) % 10); -- return T_HPOWER_LEVEL; -+ if (enable) -+ dev_info(sfp->dev, "Module switched to %u.%uW power level\n", -+ sfp->module_power_mW / 1000, -+ (sfp->module_power_mW / 100) % 10); - --err: -- return err; -+ return 0; - } - - static int sfp_sm_mod_probe(struct sfp *sfp) -@@ -1484,7 +1483,7 @@ static int sfp_sm_mod_probe(struct sfp * - if (ret < 0) - return ret; - -- return sfp_sm_mod_hpower(sfp); -+ return 0; - } - - static void sfp_sm_mod_remove(struct sfp *sfp) -@@ -1529,13 +1528,22 @@ static void sfp_sm_device(struct sfp *sf - */ - static void sfp_sm_module(struct sfp *sfp, unsigned int event) - { -- /* Handle remove event globally, it resets this state machine. -- * Also deal with upstream detachment. -- */ -- if (event == SFP_E_REMOVE || sfp->sm_dev_state < SFP_DEV_DOWN) { -+ int err; -+ -+ /* Handle remove event globally, it resets this state machine */ -+ if (event == SFP_E_REMOVE) { - if (sfp->sm_mod_state > SFP_MOD_PROBE) - sfp_sm_mod_remove(sfp); -- if (sfp->sm_mod_state != SFP_MOD_EMPTY) -+ sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); -+ return; -+ } -+ -+ /* Handle device detach globally */ -+ if (sfp->sm_dev_state < SFP_DEV_DOWN) { -+ if (sfp->module_power_mW > 1000 && -+ sfp->sm_mod_state > SFP_MOD_HPOWER) -+ sfp_sm_mod_hpower(sfp, false); -+ if (sfp->sm_mod_state > SFP_MOD_EMPTY) - sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); - return; - } -@@ -1547,26 +1555,45 @@ static void sfp_sm_module(struct sfp *sf - break; - - case SFP_MOD_PROBE: -- if (event == SFP_E_TIMEOUT) { -- int val = sfp_sm_mod_probe(sfp); -+ if (event != SFP_E_TIMEOUT) -+ break; - -- if (val == 0) -- sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0); -- else if (val > 0) -- sfp_sm_mod_next(sfp, SFP_MOD_HPOWER, val); -- else if (val != -EAGAIN) -- sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); -- else -- sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ err = sfp_sm_mod_probe(sfp); -+ if (err == -EAGAIN) { -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ break; - } -- break; -+ if (err < 0) { -+ sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); -+ break; -+ } -+ -+ /* If this is a power level 1 module, we are done */ -+ if (sfp->module_power_mW <= 1000) -+ goto insert; - -+ sfp_sm_mod_next(sfp, SFP_MOD_HPOWER, 0); -+ /* fall through */ - case SFP_MOD_HPOWER: -- if (event == SFP_E_TIMEOUT) { -- sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0); -+ /* Enable high power mode */ -+ err = sfp_sm_mod_hpower(sfp, true); -+ if (err == 0) -+ sfp_sm_mod_next(sfp, SFP_MOD_WAITPWR, T_HPOWER_LEVEL); -+ else if (err != -EAGAIN) -+ sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); -+ else -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ break; -+ -+ case SFP_MOD_WAITPWR: -+ /* Wait for T_HPOWER_LEVEL to time out */ -+ if (event != SFP_E_TIMEOUT) - break; -- } -- /* fallthrough */ -+ -+ insert: -+ sfp_sm_mod_next(sfp, SFP_MOD_PRESENT, 0); -+ break; -+ - case SFP_MOD_PRESENT: - case SFP_MOD_ERROR: - break; diff --git a/target/linux/generic/backport-4.19/734-v5.5-net-sfp-move-module-insert-reporting-out-of-probe.patch b/target/linux/generic/backport-4.19/734-v5.5-net-sfp-move-module-insert-reporting-out-of-probe.patch deleted file mode 100644 index 26b6a6b0e4..0000000000 --- a/target/linux/generic/backport-4.19/734-v5.5-net-sfp-move-module-insert-reporting-out-of-probe.patch +++ /dev/null @@ -1,159 +0,0 @@ -From 57cbf7453551db1df619b79410d79fc418d862d5 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 5 Nov 2019 13:00:45 +0000 -Subject: [PATCH 632/660] net: sfp: move module insert reporting out of probe - -Move the module insertion reporting out of the probe handling, but -after we have detected that the upstream has attached (since that is -whom we are reporting insertion to.) - -Only report module removal if we had previously reported a module -insertion. - -This gives cleaner semantics, and means we can probe the module before -we have an upstream attached. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 58 +++++++++++++++++++++++++++++-------------- - 1 file changed, 40 insertions(+), 18 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -45,11 +45,12 @@ enum { - SFP_E_TIMEOUT, - - SFP_MOD_EMPTY = 0, -+ SFP_MOD_ERROR, - SFP_MOD_PROBE, -+ SFP_MOD_WAITDEV, - SFP_MOD_HPOWER, - SFP_MOD_WAITPWR, - SFP_MOD_PRESENT, -- SFP_MOD_ERROR, - - SFP_DEV_DETACHED = 0, - SFP_DEV_DOWN, -@@ -68,11 +69,12 @@ enum { - - static const char * const mod_state_strings[] = { - [SFP_MOD_EMPTY] = "empty", -+ [SFP_MOD_ERROR] = "error", - [SFP_MOD_PROBE] = "probe", -+ [SFP_MOD_WAITDEV] = "waitdev", - [SFP_MOD_HPOWER] = "hpower", - [SFP_MOD_WAITPWR] = "waitpwr", - [SFP_MOD_PRESENT] = "present", -- [SFP_MOD_ERROR] = "error", - }; - - static const char *mod_state_to_str(unsigned short mod_state) -@@ -1479,16 +1481,13 @@ static int sfp_sm_mod_probe(struct sfp * - if (ret < 0) - return ret; - -- ret = sfp_module_insert(sfp->sfp_bus, &sfp->id); -- if (ret < 0) -- return ret; -- - return 0; - } - - static void sfp_sm_mod_remove(struct sfp *sfp) - { -- sfp_module_remove(sfp->sfp_bus); -+ if (sfp->sm_mod_state > SFP_MOD_WAITDEV) -+ sfp_module_remove(sfp->sfp_bus); - - sfp_hwmon_remove(sfp); - -@@ -1539,12 +1538,12 @@ static void sfp_sm_module(struct sfp *sf - } - - /* Handle device detach globally */ -- if (sfp->sm_dev_state < SFP_DEV_DOWN) { -+ if (sfp->sm_dev_state < SFP_DEV_DOWN && -+ sfp->sm_mod_state > SFP_MOD_WAITDEV) { - if (sfp->module_power_mW > 1000 && - sfp->sm_mod_state > SFP_MOD_HPOWER) - sfp_sm_mod_hpower(sfp, false); -- if (sfp->sm_mod_state > SFP_MOD_EMPTY) -- sfp_sm_mod_next(sfp, SFP_MOD_EMPTY, 0); -+ sfp_sm_mod_next(sfp, SFP_MOD_WAITDEV, 0); - return; - } - -@@ -1555,6 +1554,7 @@ static void sfp_sm_module(struct sfp *sf - break; - - case SFP_MOD_PROBE: -+ /* Wait for T_PROBE_INIT to time out */ - if (event != SFP_E_TIMEOUT) - break; - -@@ -1568,6 +1568,20 @@ static void sfp_sm_module(struct sfp *sf - break; - } - -+ sfp_sm_mod_next(sfp, SFP_MOD_WAITDEV, 0); -+ /* fall through */ -+ case SFP_MOD_WAITDEV: -+ /* Ensure that the device is attached before proceeding */ -+ if (sfp->sm_dev_state < SFP_DEV_DOWN) -+ break; -+ -+ /* Report the module insertion to the upstream device */ -+ err = sfp_module_insert(sfp->sfp_bus, &sfp->id); -+ if (err < 0) { -+ sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); -+ break; -+ } -+ - /* If this is a power level 1 module, we are done */ - if (sfp->module_power_mW <= 1000) - goto insert; -@@ -1577,12 +1591,17 @@ static void sfp_sm_module(struct sfp *sf - case SFP_MOD_HPOWER: - /* Enable high power mode */ - err = sfp_sm_mod_hpower(sfp, true); -- if (err == 0) -- sfp_sm_mod_next(sfp, SFP_MOD_WAITPWR, T_HPOWER_LEVEL); -- else if (err != -EAGAIN) -- sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); -- else -- sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ if (err < 0) { -+ if (err != -EAGAIN) { -+ sfp_module_remove(sfp->sfp_bus); -+ sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); -+ } else { -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ } -+ break; -+ } -+ -+ sfp_sm_mod_next(sfp, SFP_MOD_WAITPWR, T_HPOWER_LEVEL); - break; - - case SFP_MOD_WAITPWR: -@@ -1750,8 +1769,6 @@ static void sfp_sm_event(struct sfp *sfp - static void sfp_attach(struct sfp *sfp) - { - sfp_sm_event(sfp, SFP_E_DEV_ATTACH); -- if (sfp->state & SFP_F_PRESENT) -- sfp_sm_event(sfp, SFP_E_INSERT); - } - - static void sfp_detach(struct sfp *sfp) -@@ -2001,6 +2018,11 @@ static int sfp_probe(struct platform_dev - sfp->state |= SFP_F_RATE_SELECT; - sfp_set_state(sfp, sfp->state); - sfp_module_tx_disable(sfp); -+ if (sfp->state & SFP_F_PRESENT) { -+ rtnl_lock(); -+ sfp_sm_event(sfp, SFP_E_INSERT); -+ rtnl_unlock(); -+ } - - for (i = 0; i < GPIO_MAX; i++) { - if (gpio_flags[i] != GPIOD_IN || !sfp->gpio[i]) diff --git a/target/linux/generic/backport-4.19/735-v5.5-net-sfp-allow-sfp-to-probe-slow-to-initialise-GPON-m.patch b/target/linux/generic/backport-4.19/735-v5.5-net-sfp-allow-sfp-to-probe-slow-to-initialise-GPON-m.patch deleted file mode 100644 index 6cbd0864f7..0000000000 --- a/target/linux/generic/backport-4.19/735-v5.5-net-sfp-allow-sfp-to-probe-slow-to-initialise-GPON-m.patch +++ /dev/null @@ -1,110 +0,0 @@ -From fb56cd08880aff8fb030e684fa4311bef712a499 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 5 Nov 2019 13:02:30 +0000 -Subject: [PATCH 633/660] net: sfp: allow sfp to probe slow to initialise GPON - modules - -Some GPON modules (e.g. Huawei MA5671A) take a significant amount of -time to start responding on the I2C bus, contary to the SFF -specifications. - -Work around this by implementing a two-level timeout strategy, where -we initially quickly retry for the module, and then use a slower retry -after we exceed a maximum number of quick attempts. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 38 ++++++++++++++++++++++++++++---------- - 1 file changed, 28 insertions(+), 10 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -165,9 +165,12 @@ static const enum gpiod_flags gpio_flags - * The SFF-8472 specifies t_serial ("Time from power on until module is - * ready for data transmission over the two wire serial bus.") as 300ms. - */ --#define T_SERIAL msecs_to_jiffies(300) --#define T_HPOWER_LEVEL msecs_to_jiffies(300) --#define T_PROBE_RETRY msecs_to_jiffies(100) -+#define T_SERIAL msecs_to_jiffies(300) -+#define T_HPOWER_LEVEL msecs_to_jiffies(300) -+#define T_PROBE_RETRY_INIT msecs_to_jiffies(100) -+#define R_PROBE_RETRY_INIT 10 -+#define T_PROBE_RETRY_SLOW msecs_to_jiffies(5000) -+#define R_PROBE_RETRY_SLOW 12 - - /* SFP modules appear to always have their PHY configured for bus address - * 0x56 (which with mdio-i2c, translates to a PHY address of 22). -@@ -202,6 +205,8 @@ struct sfp { - struct delayed_work timeout; - struct mutex sm_mutex; /* Protects state machine */ - unsigned char sm_mod_state; -+ unsigned char sm_mod_tries_init; -+ unsigned char sm_mod_tries; - unsigned char sm_dev_state; - unsigned short sm_state; - unsigned int sm_retries; -@@ -1392,7 +1397,7 @@ static int sfp_sm_mod_hpower(struct sfp - return 0; - } - --static int sfp_sm_mod_probe(struct sfp *sfp) -+static int sfp_sm_mod_probe(struct sfp *sfp, bool report) - { - /* SFP module inserted - read I2C data */ - struct sfp_eeprom_id id; -@@ -1402,7 +1407,8 @@ static int sfp_sm_mod_probe(struct sfp * - - ret = sfp_read(sfp, false, 0, &id, sizeof(id)); - if (ret < 0) { -- dev_err(sfp->dev, "failed to read EEPROM: %d\n", ret); -+ if (report) -+ dev_err(sfp->dev, "failed to read EEPROM: %d\n", ret); - return -EAGAIN; - } - -@@ -1549,8 +1555,11 @@ static void sfp_sm_module(struct sfp *sf - - switch (sfp->sm_mod_state) { - default: -- if (event == SFP_E_INSERT) -+ if (event == SFP_E_INSERT) { - sfp_sm_mod_next(sfp, SFP_MOD_PROBE, T_SERIAL); -+ sfp->sm_mod_tries_init = R_PROBE_RETRY_INIT; -+ sfp->sm_mod_tries = R_PROBE_RETRY_SLOW; -+ } - break; - - case SFP_MOD_PROBE: -@@ -1558,10 +1567,19 @@ static void sfp_sm_module(struct sfp *sf - if (event != SFP_E_TIMEOUT) - break; - -- err = sfp_sm_mod_probe(sfp); -+ err = sfp_sm_mod_probe(sfp, sfp->sm_mod_tries == 1); - if (err == -EAGAIN) { -- sfp_sm_set_timer(sfp, T_PROBE_RETRY); -- break; -+ if (sfp->sm_mod_tries_init && -+ --sfp->sm_mod_tries_init) { -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY_INIT); -+ break; -+ } else if (sfp->sm_mod_tries && --sfp->sm_mod_tries) { -+ if (sfp->sm_mod_tries == R_PROBE_RETRY_SLOW - 1) -+ dev_warn(sfp->dev, -+ "please wait, module slow to respond\n"); -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY_SLOW); -+ break; -+ } - } - if (err < 0) { - sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); -@@ -1596,7 +1614,7 @@ static void sfp_sm_module(struct sfp *sf - sfp_module_remove(sfp->sfp_bus); - sfp_sm_mod_next(sfp, SFP_MOD_ERROR, 0); - } else { -- sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY_INIT); - } - break; - } diff --git a/target/linux/generic/backport-4.19/736-v5.5-net-sfp-allow-modules-with-slow-diagnostics-to-probe.patch b/target/linux/generic/backport-4.19/736-v5.5-net-sfp-allow-modules-with-slow-diagnostics-to-probe.patch deleted file mode 100644 index fe1e6c4822..0000000000 --- a/target/linux/generic/backport-4.19/736-v5.5-net-sfp-allow-modules-with-slow-diagnostics-to-probe.patch +++ /dev/null @@ -1,198 +0,0 @@ -From 559391fc20fae506adcb311b904cc544c76436c0 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 7 Nov 2019 18:52:07 +0000 -Subject: [PATCH 634/660] net: sfp: allow modules with slow diagnostics to - probe - -When a module is inserted, we attempt to read read the ID from address -0x50. Once we are able to read the ID, we immediately attempt to -initialise the hwmon support by reading from address 0x51. If this -fails, then we fall into error state, and assume that the module is -not usable. - -Modules such as the ALCATELLUCENT 3FE46541AA use a real EEPROM for -I2C address 0x50, which responds immediately. However, address 0x51 -is an emulated, which only becomes available once the on-board firmware -has booted. This prompts us to fall into the error state. - -Since the module may be usable without diagnostics, arrange for the -hwmon probe independent of the rest of the SFP itself, retrying every -5s for up to about 60s for the monitoring to become available, and -print an error message if it doesn't become available. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 96 +++++++++++++++++++++++++++++++++---------- - 1 file changed, 74 insertions(+), 22 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -216,6 +216,8 @@ struct sfp { - - #if IS_ENABLED(CONFIG_HWMON) - struct sfp_diag diag; -+ struct delayed_work hwmon_probe; -+ unsigned int hwmon_tries; - struct device *hwmon_dev; - char *hwmon_name; - #endif -@@ -1094,29 +1096,27 @@ static const struct hwmon_chip_info sfp_ - .info = sfp_hwmon_info, - }; - --static int sfp_hwmon_insert(struct sfp *sfp) -+static void sfp_hwmon_probe(struct work_struct *work) - { -+ struct sfp *sfp = container_of(work, struct sfp, hwmon_probe.work); - int err, i; - -- if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE) -- return 0; -- -- if (!(sfp->id.ext.diagmon & SFP_DIAGMON_DDM)) -- return 0; -- -- if (sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE) -- /* This driver in general does not support address -- * change. -- */ -- return 0; -- - err = sfp_read(sfp, true, 0, &sfp->diag, sizeof(sfp->diag)); -- if (err < 0) -- return err; -+ if (err < 0) { -+ if (sfp->hwmon_tries--) { -+ mod_delayed_work(system_wq, &sfp->hwmon_probe, -+ T_PROBE_RETRY_SLOW); -+ } else { -+ dev_warn(sfp->dev, "hwmon probe failed: %d\n", err); -+ } -+ return; -+ } - - sfp->hwmon_name = kstrdup(dev_name(sfp->dev), GFP_KERNEL); -- if (!sfp->hwmon_name) -- return -ENODEV; -+ if (!sfp->hwmon_name) { -+ dev_err(sfp->dev, "out of memory for hwmon name\n"); -+ return; -+ } - - for (i = 0; sfp->hwmon_name[i]; i++) - if (hwmon_is_bad_char(sfp->hwmon_name[i])) -@@ -1126,18 +1126,52 @@ static int sfp_hwmon_insert(struct sfp * - sfp->hwmon_name, sfp, - &sfp_hwmon_chip_info, - NULL); -+ if (IS_ERR(sfp->hwmon_dev)) -+ dev_err(sfp->dev, "failed to register hwmon device: %ld\n", -+ PTR_ERR(sfp->hwmon_dev)); -+} -+ -+static int sfp_hwmon_insert(struct sfp *sfp) -+{ -+ if (sfp->id.ext.sff8472_compliance == SFP_SFF8472_COMPLIANCE_NONE) -+ return 0; -+ -+ if (!(sfp->id.ext.diagmon & SFP_DIAGMON_DDM)) -+ return 0; -+ -+ if (sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE) -+ /* This driver in general does not support address -+ * change. -+ */ -+ return 0; -+ -+ mod_delayed_work(system_wq, &sfp->hwmon_probe, 1); -+ sfp->hwmon_tries = R_PROBE_RETRY_SLOW; - -- return PTR_ERR_OR_ZERO(sfp->hwmon_dev); -+ return 0; - } - - static void sfp_hwmon_remove(struct sfp *sfp) - { -+ cancel_delayed_work_sync(&sfp->hwmon_probe); - if (!IS_ERR_OR_NULL(sfp->hwmon_dev)) { - hwmon_device_unregister(sfp->hwmon_dev); - sfp->hwmon_dev = NULL; - kfree(sfp->hwmon_name); - } - } -+ -+static int sfp_hwmon_init(struct sfp *sfp) -+{ -+ INIT_DELAYED_WORK(&sfp->hwmon_probe, sfp_hwmon_probe); -+ -+ return 0; -+} -+ -+static void sfp_hwmon_exit(struct sfp *sfp) -+{ -+ cancel_delayed_work_sync(&sfp->hwmon_probe); -+} - #else - static int sfp_hwmon_insert(struct sfp *sfp) - { -@@ -1147,6 +1181,15 @@ static int sfp_hwmon_insert(struct sfp * - static void sfp_hwmon_remove(struct sfp *sfp) - { - } -+ -+static int sfp_hwmon_init(struct sfp *sfp) -+{ -+ return 0; -+} -+ -+static void sfp_hwmon_exit(struct sfp *sfp) -+{ -+} - #endif - - /* Helpers */ -@@ -1483,10 +1526,6 @@ static int sfp_sm_mod_probe(struct sfp * - if (ret < 0) - return ret; - -- ret = sfp_hwmon_insert(sfp); -- if (ret < 0) -- return ret; -- - return 0; - } - -@@ -1635,6 +1674,15 @@ static void sfp_sm_module(struct sfp *sf - case SFP_MOD_ERROR: - break; - } -+ -+#if IS_ENABLED(CONFIG_HWMON) -+ if (sfp->sm_mod_state >= SFP_MOD_WAITDEV && -+ IS_ERR_OR_NULL(sfp->hwmon_dev)) { -+ err = sfp_hwmon_insert(sfp); -+ if (err) -+ dev_warn(sfp->dev, "hwmon probe failed: %d\n", err); -+ } -+#endif - } - - static void sfp_sm_main(struct sfp *sfp, unsigned int event) -@@ -1936,6 +1984,8 @@ static struct sfp *sfp_alloc(struct devi - INIT_DELAYED_WORK(&sfp->poll, sfp_poll); - INIT_DELAYED_WORK(&sfp->timeout, sfp_timeout); - -+ sfp_hwmon_init(sfp); -+ - return sfp; - } - -@@ -1943,6 +1993,8 @@ static void sfp_cleanup(void *data) - { - struct sfp *sfp = data; - -+ sfp_hwmon_exit(sfp); -+ - cancel_delayed_work_sync(&sfp->poll); - cancel_delayed_work_sync(&sfp->timeout); - if (sfp->i2c_mii) { diff --git a/target/linux/generic/backport-4.19/737-v5.5-net-phy-add-core-phylib-sfp-support.patch b/target/linux/generic/backport-4.19/737-v5.5-net-phy-add-core-phylib-sfp-support.patch deleted file mode 100644 index 1ffc545ad1..0000000000 --- a/target/linux/generic/backport-4.19/737-v5.5-net-phy-add-core-phylib-sfp-support.patch +++ /dev/null @@ -1,183 +0,0 @@ -From eb156db588ac583cdae7b91eaac9c0ad3a358e63 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 15 Sep 2019 20:05:34 +0100 -Subject: [PATCH 635/660] net: phy: add core phylib sfp support - -Add core phylib help for supporting SFP sockets on PHYs. This provides -a mechanism to inform the SFP layer about PHY up/down events, and also -unregister the SFP bus when the PHY is going away. - -Signed-off-by: Russell King ---- - drivers/net/phy/phy.c | 7 ++++ - drivers/net/phy/phy_device.c | 66 ++++++++++++++++++++++++++++++++++++ - include/linux/phy.h | 11 ++++++ - 3 files changed, 84 insertions(+) - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -871,6 +872,9 @@ void phy_stop(struct phy_device *phydev) - if (phy_interrupt_is_valid(phydev)) - phy_disable_interrupts(phydev); - -+ if (phydev->sfp_bus) -+ sfp_upstream_stop(phydev->sfp_bus); -+ - phydev->state = PHY_HALTED; - - out_unlock: -@@ -899,6 +903,9 @@ void phy_start(struct phy_device *phydev - - mutex_lock(&phydev->lock); - -+ if (phydev->sfp_bus) -+ sfp_upstream_start(phydev->sfp_bus); -+ - switch (phydev->state) { - case PHY_STARTING: - phydev->state = PHY_PENDING; ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -31,6 +31,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -950,6 +951,65 @@ void phy_attached_print(struct phy_devic - EXPORT_SYMBOL(phy_attached_print); - - /** -+ * phy_sfp_attach - attach the SFP bus to the PHY upstream network device -+ * @upstream: pointer to the phy device -+ * @bus: sfp bus representing cage being attached -+ * -+ * This is used to fill in the sfp_upstream_ops .attach member. -+ */ -+void phy_sfp_attach(void *upstream, struct sfp_bus *bus) -+{ -+ struct phy_device *phydev = upstream; -+ -+ if (phydev->attached_dev) -+ phydev->attached_dev->sfp_bus = bus; -+ phydev->sfp_bus_attached = true; -+} -+EXPORT_SYMBOL(phy_sfp_attach); -+ -+/** -+ * phy_sfp_detach - detach the SFP bus from the PHY upstream network device -+ * @upstream: pointer to the phy device -+ * @bus: sfp bus representing cage being attached -+ * -+ * This is used to fill in the sfp_upstream_ops .detach member. -+ */ -+void phy_sfp_detach(void *upstream, struct sfp_bus *bus) -+{ -+ struct phy_device *phydev = upstream; -+ -+ if (phydev->attached_dev) -+ phydev->attached_dev->sfp_bus = NULL; -+ phydev->sfp_bus_attached = false; -+} -+EXPORT_SYMBOL(phy_sfp_detach); -+ -+/** -+ * phy_sfp_probe - probe for a SFP cage attached to this PHY device -+ * @phydev: Pointer to phy_device -+ * @ops: SFP's upstream operations -+ */ -+int phy_sfp_probe(struct phy_device *phydev, -+ const struct sfp_upstream_ops *ops) -+{ -+ struct sfp_bus *bus; -+ int ret; -+ -+ if (phydev->mdio.dev.fwnode) { -+ bus = sfp_bus_find_fwnode(phydev->mdio.dev.fwnode); -+ if (IS_ERR(bus)) -+ return PTR_ERR(bus); -+ -+ phydev->sfp_bus = bus; -+ -+ ret = sfp_bus_add_upstream(bus, phydev, ops); -+ sfp_bus_put(bus); -+ } -+ return 0; -+} -+EXPORT_SYMBOL(phy_sfp_probe); -+ -+/** - * phy_attach_direct - attach a network device to a given PHY device pointer - * @dev: network device to attach - * @phydev: Pointer to phy_device to attach -@@ -1022,6 +1082,9 @@ int phy_attach_direct(struct net_device - phydev->attached_dev = dev; - dev->phydev = phydev; - -+ if (phydev->sfp_bus_attached) -+ dev->sfp_bus = phydev->sfp_bus; -+ - /* Some Ethernet drivers try to connect to a PHY device before - * calling register_netdevice() -> netdev_register_kobject() and - * does the dev->dev.kobj initialization. Here we only check for -@@ -1956,6 +2019,9 @@ static int phy_remove(struct device *dev - phydev->state = PHY_DOWN; - mutex_unlock(&phydev->lock); - -+ sfp_bus_del_upstream(phydev->sfp_bus); -+ phydev->sfp_bus = NULL; -+ - if (phydev->drv && phydev->drv->remove) { - phydev->drv->remove(phydev); - ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -184,6 +184,8 @@ static inline const char *phy_modes(phy_ - - struct device; - struct phylink; -+struct sfp_bus; -+struct sfp_upstream_ops; - struct sk_buff; - - /* -@@ -383,6 +385,8 @@ struct phy_c45_device_ids { - * irq: IRQ number of the PHY's interrupt (-1 if none) - * phy_timer: The timer for handling the state machine - * phy_queue: A work_queue for the phy_mac_interrupt -+ * sfp_bus_attached: flag indicating whether the SFP bus has been attached -+ * sfp_bus: SFP bus attached to this PHY's fiber port - * attached_dev: The attached enet driver's device instance ptr - * adjust_link: Callback for the enet controller to respond to - * changes in the link state. -@@ -473,6 +477,9 @@ struct phy_device { - - struct mutex lock; - -+ /* This may be modified under the rtnl lock */ -+ bool sfp_bus_attached; -+ struct sfp_bus *sfp_bus; - struct phylink *phylink; - struct net_device *attached_dev; - -@@ -1033,6 +1040,10 @@ int phy_suspend(struct phy_device *phyde - int phy_resume(struct phy_device *phydev); - int __phy_resume(struct phy_device *phydev); - int phy_loopback(struct phy_device *phydev, bool enable); -+void phy_sfp_attach(void *upstream, struct sfp_bus *bus); -+void phy_sfp_detach(void *upstream, struct sfp_bus *bus); -+int phy_sfp_probe(struct phy_device *phydev, -+ const struct sfp_upstream_ops *ops); - struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, - phy_interface_t interface); - struct phy_device *phy_find_first(struct mii_bus *bus); diff --git a/target/linux/generic/backport-4.19/738-v5.5-net-phy-marvell10g-add-SFP-support.patch b/target/linux/generic/backport-4.19/738-v5.5-net-phy-marvell10g-add-SFP-support.patch deleted file mode 100644 index a67431ce5c..0000000000 --- a/target/linux/generic/backport-4.19/738-v5.5-net-phy-marvell10g-add-SFP-support.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 0836d9fb41ed90090ef4af0d7abe784ee7706f80 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 14 Apr 2017 14:21:25 +0100 -Subject: [PATCH 636/660] net: phy: marvell10g: add SFP+ support - -Add support for SFP+ cages to the Marvell 10G PHY driver. This is -slightly complicated by the way phylib works in that we need to use -a multi-step process to attach the SFP bus, and we also need to track -the phylink state machine to know when the module's transmit disable -signal should change state. - -With appropriate DT changes, this allows the SFP+ canges on the -Macchiatobin platform to be functional. - -Signed-off-by: Russell King ---- - drivers/net/phy/marvell10g.c | 25 ++++++++++++++++++++++++- - 1 file changed, 24 insertions(+), 1 deletion(-) - ---- a/drivers/net/phy/marvell10g.c -+++ b/drivers/net/phy/marvell10g.c -@@ -25,6 +25,7 @@ - #include - #include - #include -+#include - - enum { - MV_PMA_BOOT = 0xc050, -@@ -219,6 +220,28 @@ static int mv3310_hwmon_probe(struct phy - } - #endif - -+static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id) -+{ -+ struct phy_device *phydev = upstream; -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, }; -+ phy_interface_t iface; -+ -+ sfp_parse_support(phydev->sfp_bus, id, support); -+ iface = sfp_select_interface(phydev->sfp_bus, id, support); -+ -+ if (iface != PHY_INTERFACE_MODE_10GKR) { -+ dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n"); -+ return -EINVAL; -+ } -+ return 0; -+} -+ -+static const struct sfp_upstream_ops mv3310_sfp_ops = { -+ .attach = phy_sfp_attach, -+ .detach = phy_sfp_detach, -+ .module_insert = mv3310_sfp_insert, -+}; -+ - static int mv3310_probe(struct phy_device *phydev) - { - struct mv3310_priv *priv; -@@ -249,7 +272,7 @@ static int mv3310_probe(struct phy_devic - if (ret) - return ret; - -- return 0; -+ return phy_sfp_probe(phydev, &mv3310_sfp_ops); - } - - static int mv3310_suspend(struct phy_device *phydev) diff --git a/target/linux/generic/backport-4.19/739-v5.5-net-phylink-update-to-use-phy_support_asym_pause.patch b/target/linux/generic/backport-4.19/739-v5.5-net-phylink-update-to-use-phy_support_asym_pause.patch deleted file mode 100644 index 15db0abc96..0000000000 --- a/target/linux/generic/backport-4.19/739-v5.5-net-phylink-update-to-use-phy_support_asym_pause.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 09d7d8395ec61fba4392b35baa6f71c4e36489df Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 8 Nov 2019 15:18:02 +0000 -Subject: [PATCH 637/660] net: phylink: update to use phy_support_asym_pause() - -Use phy_support_asym_pause() rather than open-coding it. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 17 +++++++---------- - 1 file changed, 7 insertions(+), 10 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -678,12 +678,6 @@ static int phylink_bringup_phy(struct ph - u32 advertising; - int ret; - -- memset(&config, 0, sizeof(config)); -- ethtool_convert_legacy_u32_to_link_mode(supported, phy->supported); -- ethtool_convert_legacy_u32_to_link_mode(config.advertising, -- phy->advertising); -- config.interface = pl->link_config.interface; -- - /* - * This is the new way of dealing with flow control for PHYs, - * as described by Timur Tabi in commit 529ed1275263 ("net: phy: -@@ -691,10 +685,13 @@ static int phylink_bringup_phy(struct ph - * using our validate call to the MAC, we rely upon the MAC - * clearing the bits from both supported and advertising fields. - */ -- if (phylink_test(supported, Pause)) -- phylink_set(config.advertising, Pause); -- if (phylink_test(supported, Asym_Pause)) -- phylink_set(config.advertising, Asym_Pause); -+ phy_support_asym_pause(phy); -+ -+ memset(&config, 0, sizeof(config)); -+ ethtool_convert_legacy_u32_to_link_mode(supported, phy->supported); -+ ethtool_convert_legacy_u32_to_link_mode(config.advertising, -+ phy->advertising); -+ config.interface = pl->link_config.interface; - - ret = phylink_validate(pl, supported, &config); - if (ret) diff --git a/target/linux/generic/backport-4.19/740-v5.5-net-phy-avoid-matching-all-ones-clause-45-PHY-IDs.patch b/target/linux/generic/backport-4.19/740-v5.5-net-phy-avoid-matching-all-ones-clause-45-PHY-IDs.patch deleted file mode 100644 index 56bf507720..0000000000 --- a/target/linux/generic/backport-4.19/740-v5.5-net-phy-avoid-matching-all-ones-clause-45-PHY-IDs.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 1be8018db381200c24854e0c299206c557f76fe0 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Mon, 11 Nov 2019 11:58:09 +0000 -Subject: [PATCH 638/660] net: phy: avoid matching all-ones clause 45 PHY IDs - -We currently match clause 45 PHYs using any ID read from a MMD marked -as present in the "Devices in package" registers 5 and 6. However, -this is incorrect. 45.2 says: - - "The definition of the term package is vendor specific and could be - a chip, module, or other similar entity." - -so a package could be more or less than the whole PHY - a PHY could be -made up of several modules instantiated onto a single chip such as the -Marvell 88x3310, or some of the MMDs could be disabled according to -chip configuration, such as the Broadcom 84881. - -In the case of Broadcom 84881, the "Devices in package" registers -contain 0xc000009b, meaning that there is a PHYXS present in the -package, but all registers in MMD 4 return 0xffff. This leads to our -matching code incorrectly binding this PHY to one of our generic PHY -drivers. - -This patch changes the way we determine whether to attempt to match a -MMD identifier, or use it to request a module - if the identifier is -all-ones, then we skip over it. When reading the identifiers, we -initialise phydev->c45_ids.device_ids to all-ones, only reading the -device ID if the "Devices in package" registers indicates we should. - -This avoids the generic drivers incorrectly matching on a PHY ID of -0xffffffff. - -Signed-off-by: Russell King ---- - drivers/net/phy/phy_device.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -339,7 +339,7 @@ static int phy_bus_match(struct device * - - if (phydev->is_c45) { - for (i = 1; i < num_ids; i++) { -- if (!(phydev->c45_ids.devices_in_package & (1 << i))) -+ if (phydev->c45_ids.device_ids[i] == 0xffffffff) - continue; - - if ((phydrv->phy_id & phydrv->phy_id_mask) == -@@ -629,10 +629,13 @@ static int get_phy_id(struct mii_bus *bu - */ - struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) - { -- struct phy_c45_device_ids c45_ids = {0}; -+ struct phy_c45_device_ids c45_ids; - u32 phy_id = 0; - int r; - -+ c45_ids.devices_in_package = 0; -+ memset(c45_ids.device_ids, 0xff, sizeof(c45_ids.device_ids)); -+ - r = get_phy_id(bus, addr, &phy_id, is_c45, &c45_ids); - if (r) - return ERR_PTR(r); diff --git a/target/linux/generic/backport-4.19/741-v5.5-net-phylink-fix-link-mode-modification-in-PHY-mode.patch b/target/linux/generic/backport-4.19/741-v5.5-net-phylink-fix-link-mode-modification-in-PHY-mode.patch deleted file mode 100644 index 596ecc8272..0000000000 --- a/target/linux/generic/backport-4.19/741-v5.5-net-phylink-fix-link-mode-modification-in-PHY-mode.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 4c9633f75dc35abe1b9261e0415d77802f35741d Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 5 Nov 2019 11:58:00 +0000 -Subject: [PATCH 639/660] net: phylink: fix link mode modification in PHY mode - -Modifying the link settings via phylink_ethtool_ksettings_set() and -phylink_ethtool_set_pauseparam() didn't always work as intended for -PHY based setups, as calling phylink_mac_config() would result in the -unresolved configuration being committed to the MAC, rather than the -configuration with the speed and duplex setting. - -This would work fine if the update caused the link to renegotiate, -but if no settings have changed, phylib won't trigger a renegotiation -cycle, and the MAC will be left incorrectly configured. - -Avoid calling phylink_mac_config() unless we are using an inband mode -in phylink_ethtool_ksettings_set(), and use phy_set_asym_pause() as -introduced in 4.20 to set the PHY settings in -phylink_ethtool_set_pauseparam(). - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 24 ++++++++++++++++-------- - 1 file changed, 16 insertions(+), 8 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1210,7 +1210,13 @@ int phylink_ethtool_ksettings_set(struct - pl->link_config.duplex = our_kset.base.duplex; - pl->link_config.an_enabled = our_kset.base.autoneg != AUTONEG_DISABLE; - -- if (!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { -+ /* If we have a PHY, phylib will call our link state function if the -+ * mode has changed, which will trigger a resolve and update the MAC -+ * configuration. For a fixed link, this isn't able to change any -+ * parameters, which just leaves inband mode. -+ */ -+ if (pl->link_an_mode == MLO_AN_INBAND && -+ !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { - phylink_mac_config(pl, &pl->link_config); - phylink_mac_an_restart(pl); - } -@@ -1290,14 +1296,16 @@ int phylink_ethtool_set_pauseparam(struc - if (pause->tx_pause) - config->pause |= MLO_PAUSE_TX; - -- if (!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { -+ /* If we have a PHY, phylib will call our link state function if the -+ * mode has changed, which will trigger a resolve and update the MAC -+ * configuration. -+ */ -+ if (pl->phydev) { -+ phy_set_asym_pause(pl->phydev, pause->rx_pause, -+ pause->tx_pause); -+ } else if (!test_bit(PHYLINK_DISABLE_STOPPED, -+ &pl->phylink_disable_state)) { - switch (pl->link_an_mode) { -- case MLO_AN_PHY: -- /* Silently mark the carrier down, and then trigger a resolve */ -- netif_carrier_off(pl->netdev); -- phylink_run_resolve(pl); -- break; -- - case MLO_AN_FIXED: - /* Should we allow fixed links to change against the config? */ - phylink_resolve_flow(pl, config); diff --git a/target/linux/generic/backport-4.19/744-v5.5-net-sfp-soft-status-and-control-support.patch b/target/linux/generic/backport-4.19/744-v5.5-net-sfp-soft-status-and-control-support.patch deleted file mode 100644 index 163d8072e6..0000000000 --- a/target/linux/generic/backport-4.19/744-v5.5-net-sfp-soft-status-and-control-support.patch +++ /dev/null @@ -1,225 +0,0 @@ -From 40e0b3b15f7da92e6b065292b14af7b9bfb1c6e0 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 13 Sep 2019 23:00:35 +0100 -Subject: [PATCH 642/660] net: sfp: soft status and control support - -Add support for the soft status and control register, which allows -TX_FAULT and RX_LOS to be monitored and TX_DISABLE to be set. We -make use of this when the board does not support GPIOs for these -signals. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 110 ++++++++++++++++++++++++++++++++++-------- - include/linux/sfp.h | 4 ++ - 2 files changed, 94 insertions(+), 20 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -199,7 +199,10 @@ struct sfp { - struct gpio_desc *gpio[GPIO_MAX]; - int gpio_irq[GPIO_MAX]; - -+ bool need_poll; -+ - struct mutex st_mutex; /* Protects state */ -+ unsigned int state_soft_mask; - unsigned int state; - struct delayed_work poll; - struct delayed_work timeout; -@@ -393,24 +396,90 @@ static int sfp_i2c_configure(struct sfp - } - - /* Interface */ --static unsigned int sfp_get_state(struct sfp *sfp) -+static int sfp_read(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len) - { -- return sfp->get_state(sfp); -+ return sfp->read(sfp, a2, addr, buf, len); - } - --static void sfp_set_state(struct sfp *sfp, unsigned int state) -+static int sfp_write(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len) - { -- sfp->set_state(sfp, state); -+ return sfp->write(sfp, a2, addr, buf, len); - } - --static int sfp_read(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len) -+static unsigned int sfp_soft_get_state(struct sfp *sfp) - { -- return sfp->read(sfp, a2, addr, buf, len); -+ unsigned int state = 0; -+ u8 status; -+ -+ if (sfp_read(sfp, true, SFP_STATUS, &status, sizeof(status)) == -+ sizeof(status)) { -+ if (status & SFP_STATUS_RX_LOS) -+ state |= SFP_F_LOS; -+ if (status & SFP_STATUS_TX_FAULT) -+ state |= SFP_F_TX_FAULT; -+ } -+ -+ return state & sfp->state_soft_mask; - } - --static int sfp_write(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len) -+static void sfp_soft_set_state(struct sfp *sfp, unsigned int state) - { -- return sfp->write(sfp, a2, addr, buf, len); -+ u8 status; -+ -+ if (sfp_read(sfp, true, SFP_STATUS, &status, sizeof(status)) == -+ sizeof(status)) { -+ if (state & SFP_F_TX_DISABLE) -+ status |= SFP_STATUS_TX_DISABLE_FORCE; -+ else -+ status &= ~SFP_STATUS_TX_DISABLE_FORCE; -+ -+ sfp_write(sfp, true, SFP_STATUS, &status, sizeof(status)); -+ } -+} -+ -+static void sfp_soft_start_poll(struct sfp *sfp) -+{ -+ const struct sfp_eeprom_id *id = &sfp->id; -+ -+ sfp->state_soft_mask = 0; -+ if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_DISABLE && -+ !sfp->gpio[GPIO_TX_DISABLE]) -+ sfp->state_soft_mask |= SFP_F_TX_DISABLE; -+ if (id->ext.enhopts & SFP_ENHOPTS_SOFT_TX_FAULT && -+ !sfp->gpio[GPIO_TX_FAULT]) -+ sfp->state_soft_mask |= SFP_F_TX_FAULT; -+ if (id->ext.enhopts & SFP_ENHOPTS_SOFT_RX_LOS && -+ !sfp->gpio[GPIO_LOS]) -+ sfp->state_soft_mask |= SFP_F_LOS; -+ -+ if (sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT) && -+ !sfp->need_poll) -+ mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); -+} -+ -+static void sfp_soft_stop_poll(struct sfp *sfp) -+{ -+ sfp->state_soft_mask = 0; -+} -+ -+static unsigned int sfp_get_state(struct sfp *sfp) -+{ -+ unsigned int state = sfp->get_state(sfp); -+ -+ if (state & SFP_F_PRESENT && -+ sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT)) -+ state |= sfp_soft_get_state(sfp); -+ -+ return state; -+} -+ -+static void sfp_set_state(struct sfp *sfp, unsigned int state) -+{ -+ sfp->set_state(sfp, state); -+ -+ if (state & SFP_F_PRESENT && -+ sfp->state_soft_mask & SFP_F_TX_DISABLE) -+ sfp_soft_set_state(sfp, state); - } - - static unsigned int sfp_check(void *buf, size_t len) -@@ -1342,11 +1411,6 @@ static void sfp_sm_fault(struct sfp *sfp - } - } - --static void sfp_sm_mod_init(struct sfp *sfp) --{ -- sfp_module_tx_enable(sfp); --} -- - static void sfp_sm_probe_for_phy(struct sfp *sfp) - { - /* Setting the serdes link mode is guesswork: there's no -@@ -1509,7 +1573,7 @@ static int sfp_sm_mod_probe(struct sfp * - (int)sizeof(id.ext.datecode), id.ext.datecode); - - /* Check whether we support this module */ -- if (!sfp->type->module_supported(&sfp->id)) { -+ if (!sfp->type->module_supported(&id)) { - dev_err(sfp->dev, - "module is not supported - phys id 0x%02x 0x%02x\n", - sfp->id.base.phys_id, sfp->id.base.phys_ext_id); -@@ -1699,6 +1763,7 @@ static void sfp_sm_main(struct sfp *sfp, - if (sfp->mod_phy) - sfp_sm_phy_detach(sfp); - sfp_module_tx_disable(sfp); -+ sfp_soft_stop_poll(sfp); - sfp_sm_next(sfp, SFP_S_DOWN, 0); - return; - } -@@ -1710,7 +1775,10 @@ static void sfp_sm_main(struct sfp *sfp, - sfp->sm_dev_state != SFP_DEV_UP) - break; - -- sfp_sm_mod_init(sfp); -+ if (!(sfp->id.ext.diagmon & SFP_DIAGMON_ADDRMODE)) -+ sfp_soft_start_poll(sfp); -+ -+ sfp_module_tx_enable(sfp); - - /* Initialise the fault clearance retries */ - sfp->sm_retries = 5; -@@ -1966,7 +2034,10 @@ static void sfp_poll(struct work_struct - struct sfp *sfp = container_of(work, struct sfp, poll.work); - - sfp_check_state(sfp); -- mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); -+ -+ if (sfp->state_soft_mask & (SFP_F_LOS | SFP_F_TX_FAULT) || -+ sfp->need_poll) -+ mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); - } - - static struct sfp *sfp_alloc(struct device *dev) -@@ -2010,7 +2081,6 @@ static int sfp_probe(struct platform_dev - { - const struct sff_data *sff; - struct sfp *sfp; -- bool poll = false; - int err, i; - - sfp = sfp_alloc(&pdev->dev); -@@ -2100,7 +2170,7 @@ static int sfp_probe(struct platform_dev - - sfp->gpio_irq[i] = gpiod_to_irq(sfp->gpio[i]); - if (!sfp->gpio_irq[i]) { -- poll = true; -+ sfp->need_poll = true; - continue; - } - -@@ -2112,11 +2182,11 @@ static int sfp_probe(struct platform_dev - dev_name(sfp->dev), sfp); - if (err) { - sfp->gpio_irq[i] = 0; -- poll = true; -+ sfp->need_poll = true; - } - } - -- if (poll) -+ if (sfp->need_poll) - mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); - - /* We could have an issue in cases no Tx disable pin is available or ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -428,6 +428,10 @@ enum { - SFP_TEC_CUR = 0x6c, - - SFP_STATUS = 0x6e, -+ SFP_STATUS_TX_DISABLE = BIT(7), -+ SFP_STATUS_TX_DISABLE_FORCE = BIT(6), -+ SFP_STATUS_TX_FAULT = BIT(2), -+ SFP_STATUS_RX_LOS = BIT(1), - SFP_ALARM0 = 0x70, - SFP_ALARM0_TEMP_HIGH = BIT(7), - SFP_ALARM0_TEMP_LOW = BIT(6), diff --git a/target/linux/generic/backport-4.19/825-v5.8-spi-rb4xx-null-pointer-bug-fix.patch b/target/linux/generic/backport-4.19/825-v5.8-spi-rb4xx-null-pointer-bug-fix.patch deleted file mode 100644 index 811fe277dd..0000000000 --- a/target/linux/generic/backport-4.19/825-v5.8-spi-rb4xx-null-pointer-bug-fix.patch +++ /dev/null @@ -1,48 +0,0 @@ -From: Christopher Hill -To: Mark Brown -Cc: Christopher Hill , linux-spi@vger.kernel.org, - linux-kernel@vger.kernel.org -Subject: [PATCH 1/3] spi: rb4xx: null pointer bug fix -Date: Thu, 21 May 2020 14:36:29 -0400 -Message-Id: <20200521183631.37806-1-ch6574@gmail.com> -X-Mailer: git-send-email 2.25.1 -MIME-Version: 1.0 -Sender: linux-spi-owner@vger.kernel.org -Precedence: bulk -List-ID: -X-Mailing-List: linux-spi@vger.kernel.org - -This patch fixes a null pointer bug in the spi driver spi-rb4xx.c by -moving the private data initialization to earlier in probe - -Signed-off-by: Christopher Hill ---- - drivers/spi/spi-rb4xx.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - ---- a/drivers/spi/spi-rb4xx.c -+++ b/drivers/spi/spi-rb4xx.c -@@ -164,6 +164,11 @@ static int rb4xx_spi_probe(struct platfo - master->transfer_one = rb4xx_transfer_one; - master->set_cs = rb4xx_set_cs; - -+ rbspi = spi_master_get_devdata(master); -+ rbspi->base = spi_base; -+ rbspi->clk = ahb_clk; -+ platform_set_drvdata(pdev, rbspi); -+ - err = devm_spi_register_master(&pdev->dev, master); - if (err) { - dev_err(&pdev->dev, "failed to register SPI master\n"); -@@ -174,11 +179,6 @@ static int rb4xx_spi_probe(struct platfo - if (err) - return err; - -- rbspi = spi_master_get_devdata(master); -- rbspi->base = spi_base; -- rbspi->clk = ahb_clk; -- platform_set_drvdata(pdev, rbspi); -- - /* Enable SPI */ - rb4xx_write(rbspi, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); - diff --git a/target/linux/generic/backport-4.19/826-v5.8-spi-rb4xx-update-driver-to-be-device-tree-aware.patch b/target/linux/generic/backport-4.19/826-v5.8-spi-rb4xx-update-driver-to-be-device-tree-aware.patch deleted file mode 100644 index d3e654e974..0000000000 --- a/target/linux/generic/backport-4.19/826-v5.8-spi-rb4xx-update-driver-to-be-device-tree-aware.patch +++ /dev/null @@ -1,60 +0,0 @@ -From: Christopher Hill -To: Mark Brown -Cc: Christopher Hill , linux-spi@vger.kernel.org, - linux-kernel@vger.kernel.org -Subject: [PATCH 2/3] spi: rb4xx: update driver to be device tree aware -Date: Thu, 21 May 2020 14:36:30 -0400 -Message-Id: <20200521183631.37806-2-ch6574@gmail.com> -X-Mailer: git-send-email 2.25.1 -In-Reply-To: <20200521183631.37806-1-ch6574@gmail.com> -References: <20200521183631.37806-1-ch6574@gmail.com> -MIME-Version: 1.0 -Sender: linux-spi-owner@vger.kernel.org -Precedence: bulk -List-ID: -X-Mailing-List: linux-spi@vger.kernel.org - -This patch updates the spi driver spi-rb4xx.c to be device tree aware - -Signed-off-by: Christopher Hill ---- - drivers/spi/spi-rb4xx.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/drivers/spi/spi-rb4xx.c -+++ b/drivers/spi/spi-rb4xx.c -@@ -18,6 +18,7 @@ - #include - #include - #include -+#include - - #include - -@@ -156,6 +157,7 @@ static int rb4xx_spi_probe(struct platfo - if (IS_ERR(ahb_clk)) - return PTR_ERR(ahb_clk); - -+ master->dev.of_node = pdev->dev.of_node; - master->bus_num = 0; - master->num_chipselect = 3; - master->mode_bits = SPI_TX_DUAL; -@@ -194,11 +196,18 @@ static int rb4xx_spi_remove(struct platf - return 0; - } - -+static const struct of_device_id rb4xx_spi_dt_match[] = { -+ { .compatible = "mikrotik,rb4xx-spi" }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, rb4xx_spi_dt_match); -+ - static struct platform_driver rb4xx_spi_drv = { - .probe = rb4xx_spi_probe, - .remove = rb4xx_spi_remove, - .driver = { - .name = "rb4xx-spi", -+ .of_match_table = of_match_ptr(rb4xx_spi_dt_match), - }, - }; - diff --git a/target/linux/generic/config-4.19 b/target/linux/generic/config-4.19 deleted file mode 100644 index bb7181a041..0000000000 --- a/target/linux/generic/config-4.19 +++ /dev/null @@ -1,6099 +0,0 @@ -# CONFIG_104_QUAD_8 is not set -CONFIG_32BIT=y -# CONFIG_6LOWPAN is not set -# CONFIG_6LOWPAN_DEBUGFS is not set -# CONFIG_6PACK is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_9P_FS is not set -# CONFIG_AB3100_CORE is not set -# CONFIG_AB8500_CORE is not set -# CONFIG_ABP060MG is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_ACENIC is not set -# CONFIG_ACERHDF is not set -# CONFIG_ACER_WIRELESS is not set -# CONFIG_ACORN_PARTITION is not set -# CONFIG_ACPI_ALS is not set -# CONFIG_ACPI_APEI is not set -# CONFIG_ACPI_BUTTON is not set -# CONFIG_ACPI_CONFIGFS is not set -# CONFIG_ACPI_CUSTOM_METHOD is not set -# CONFIG_ACPI_EXTLOG is not set -# CONFIG_ACPI_HED is not set -# CONFIG_ACPI_NFIT is not set -# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set -# CONFIG_ACPI_TABLE_UPGRADE is not set -# CONFIG_ACPI_VIDEO is not set -# CONFIG_AD2S1200 is not set -# CONFIG_AD2S1210 is not set -# CONFIG_AD2S90 is not set -# CONFIG_AD5064 is not set -# CONFIG_AD525X_DPOT is not set -# CONFIG_AD5272 is not set -# CONFIG_AD5360 is not set -# CONFIG_AD5380 is not set -# CONFIG_AD5421 is not set -# CONFIG_AD5446 is not set -# CONFIG_AD5449 is not set -# CONFIG_AD5504 is not set -# CONFIG_AD5592R is not set -# CONFIG_AD5593R is not set -# CONFIG_AD5624R_SPI is not set -# CONFIG_AD5686 is not set -# CONFIG_AD5686_SPI is not set -# CONFIG_AD5696_I2C is not set -# CONFIG_AD5755 is not set -# CONFIG_AD5758 is not set -# CONFIG_AD5761 is not set -# CONFIG_AD5764 is not set -# CONFIG_AD5791 is not set -# CONFIG_AD5933 is not set -# CONFIG_AD7150 is not set -# CONFIG_AD7152 is not set -# CONFIG_AD7192 is not set -# CONFIG_AD7266 is not set -# CONFIG_AD7280 is not set -# CONFIG_AD7291 is not set -# CONFIG_AD7298 is not set -# CONFIG_AD7303 is not set -# CONFIG_AD7476 is not set -# CONFIG_AD7606 is not set -# CONFIG_AD7746 is not set -# CONFIG_AD7766 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7791 is not set -# CONFIG_AD7793 is not set -# CONFIG_AD7816 is not set -# CONFIG_AD7887 is not set -# CONFIG_AD7923 is not set -# CONFIG_AD799X is not set -# CONFIG_AD8366 is not set -# CONFIG_AD8801 is not set -# CONFIG_AD9523 is not set -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_ADE7854 is not set -# CONFIG_ADF4350 is not set -# CONFIG_ADFS_FS is not set -# CONFIG_ADIS16080 is not set -# CONFIG_ADIS16130 is not set -# CONFIG_ADIS16136 is not set -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADIS16240 is not set -# CONFIG_ADIS16260 is not set -# CONFIG_ADIS16400 is not set -# CONFIG_ADIS16480 is not set -# CONFIG_ADJD_S311 is not set -# CONFIG_ADM6996_PHY is not set -# CONFIG_ADM8211 is not set -# CONFIG_ADT7316 is not set -CONFIG_ADVISE_SYSCALLS=y -# CONFIG_ADXL345_I2C is not set -# CONFIG_ADXL345_SPI is not set -# CONFIG_ADXRS450 is not set -CONFIG_AEABI=y -# CONFIG_AFE4403 is not set -# CONFIG_AFE4404 is not set -# CONFIG_AFFS_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_AF_KCM is not set -# CONFIG_AF_RXRPC is not set -# CONFIG_AF_RXRPC_INJECT_LOSS is not set -# CONFIG_AF_RXRPC_IPV6 is not set -# CONFIG_AGP is not set -# CONFIG_AHCI_CEVA is not set -# CONFIG_AHCI_IMX is not set -# CONFIG_AHCI_MVEBU is not set -# CONFIG_AHCI_QORIQ is not set -CONFIG_AIO=y -# CONFIG_AIRO is not set -# CONFIG_AIRO_CS is not set -# CONFIG_AIX_PARTITION is not set -# CONFIG_AK09911 is not set -# CONFIG_AK8974 is not set -# CONFIG_AK8975 is not set -# CONFIG_AL3320A is not set -# CONFIG_ALIM7101_WDT is not set -CONFIG_ALLOW_DEV_COREDUMP=y -# CONFIG_ALTERA_MBOX is not set -# CONFIG_ALTERA_MSGDMA is not set -# CONFIG_ALTERA_STAPL is not set -# CONFIG_ALTERA_TSE is not set -# CONFIG_ALX is not set -# CONFIG_AM2315 is not set -# CONFIG_AM335X_PHY_USB is not set -# CONFIG_AMBA_PL08X is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_AMD_MEM_ENCRYPT is not set -# CONFIG_AMD_PHY is not set -# CONFIG_AMD_XGBE is not set -# CONFIG_AMD_XGBE_HAVE_ECC is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_AMILO_RFKILL is not set -# CONFIG_ANDROID is not set -CONFIG_ANON_INODES=y -# CONFIG_APDS9300 is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_APDS9960 is not set -# CONFIG_APM8018X is not set -# CONFIG_APM_EMULATION is not set -# CONFIG_APPLE_GMUX is not set -# CONFIG_APPLE_PROPERTIES is not set -# CONFIG_APPLICOM is not set -# CONFIG_AQTION is not set -# CONFIG_AQUANTIA_PHY is not set -# CONFIG_AR5523 is not set -# CONFIG_AR7 is not set -# CONFIG_AR8216_PHY is not set -# CONFIG_AR8216_PHY_LEDS is not set -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_ARTPEC is not set -# CONFIG_ARCH_ASPEED is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_BCM is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM_21664 is not set -# CONFIG_ARCH_BCM_23550 is not set -# CONFIG_ARCH_BCM_281XX is not set -# CONFIG_ARCH_BCM_5301X is not set -# CONFIG_ARCH_BCM_53573 is not set -# CONFIG_ARCH_BCM_63XX is not set -# CONFIG_ARCH_BCM_CYGNUS is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BCM_NSP is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CNS3XXX is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_DIGICOLOR is not set -# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_EXYNOS is not set -CONFIG_ARCH_FLATMEM_ENABLE=y -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_GEMINI is not set -CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y -# CONFIG_ARCH_HI3xxx is not set -# CONFIG_ARCH_HIGHBANK is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_KEYSTONE is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -CONFIG_ARCH_MMAP_RND_BITS=8 -CONFIG_ARCH_MMAP_RND_BITS_MAX=16 -CONFIG_ARCH_MMAP_RND_BITS_MIN=8 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_MULTIPLATFORM is not set -# CONFIG_ARCH_MULTI_V6 is not set -# CONFIG_ARCH_MULTI_V7 is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MXS is not set -# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_NOMADIK is not set -# CONFIG_ARCH_NPCM is not set -# CONFIG_ARCH_NSPIRE is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_ARCH_OMAP2 is not set -# CONFIG_ARCH_OMAP2PLUS is not set -# CONFIG_ARCH_OMAP3 is not set -# CONFIG_ARCH_OMAP4 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_OXNAS is not set -# CONFIG_ARCH_PICOXCELL is not set -# CONFIG_ARCH_PRIMA2 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_S3C24XX is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_SIRF is not set -# CONFIG_ARCH_SOCFPGA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_STI is not set -# CONFIG_ARCH_STM32 is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_SUNXI is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_TANGO is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_U300 is not set -# CONFIG_ARCH_U8500 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_VIRT is not set -# CONFIG_ARCH_VT8500 is not set -# CONFIG_ARCH_VULCAN is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_WANTS_THP_SWAP is not set -# CONFIG_ARCH_WM8505 is not set -# CONFIG_ARCH_WM8750 is not set -# CONFIG_ARCH_WM8850 is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQ is not set -# CONFIG_ARCH_ZYNQMP is not set -# CONFIG_ARCNET is not set -# CONFIG_ARC_EMAC is not set -# CONFIG_ARC_IRQ_NO_AUTOSAVE is not set -# CONFIG_ARM64_ERRATUM_1024718 is not set -# CONFIG_ARM64_ERRATUM_1463225 is not set -# CONFIG_ARM64_ERRATUM_819472 is not set -# CONFIG_ARM64_ERRATUM_824069 is not set -# CONFIG_ARM64_ERRATUM_826319 is not set -# CONFIG_ARM64_ERRATUM_827319 is not set -# CONFIG_ARM64_ERRATUM_832075 is not set -# CONFIG_ARM64_ERRATUM_834220 is not set -# CONFIG_ARM64_ERRATUM_843419 is not set -# CONFIG_ARM64_ERRATUM_845719 is not set -# CONFIG_ARM64_ERRATUM_858921 is not set -# CONFIG_ARM64_RAS_EXTN is not set -# CONFIG_ARM64_RELOC_TEST is not set -CONFIG_ARM64_SW_TTBR0_PAN=y -# CONFIG_ARM_APPENDED_DTB is not set -# CONFIG_ARM_ARCH_TIMER is not set -# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set -# CONFIG_ARM_CCI is not set -# CONFIG_ARM_CCI400_PMU is not set -# CONFIG_ARM_CCI5xx_PMU is not set -# CONFIG_ARM_CCI_PMU is not set -# CONFIG_ARM_CCN is not set -# CONFIG_ARM_CPUIDLE is not set -CONFIG_ARM_CPU_TOPOLOGY=y -# CONFIG_ARM_CRYPTO is not set -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -# CONFIG_ARM_DSU_PMU is not set -# CONFIG_ARM_ERRATA_326103 is not set -# CONFIG_ARM_ERRATA_364296 is not set -# CONFIG_ARM_ERRATA_411920 is not set -# CONFIG_ARM_ERRATA_430973 is not set -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_643719 is not set -# CONFIG_ARM_ERRATA_720789 is not set -# CONFIG_ARM_ERRATA_742230 is not set -# CONFIG_ARM_ERRATA_742231 is not set -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_751472 is not set -# CONFIG_ARM_ERRATA_754322 is not set -# CONFIG_ARM_ERRATA_754327 is not set -# CONFIG_ARM_ERRATA_764369 is not set -# CONFIG_ARM_ERRATA_773022 is not set -# CONFIG_ARM_ERRATA_775420 is not set -# CONFIG_ARM_ERRATA_798181 is not set -# CONFIG_ARM_ERRATA_818325_852422 is not set -# CONFIG_ARM_ERRATA_821420 is not set -# CONFIG_ARM_ERRATA_825619 is not set -# CONFIG_ARM_ERRATA_852421 is not set -# CONFIG_ARM_ERRATA_852423 is not set -CONFIG_ARM_GIC_MAX_NR=1 -# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set -# CONFIG_ARM_KPROBES_TEST is not set -# CONFIG_ARM_MHU is not set -# CONFIG_ARM_MODULE_PLTS is not set -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -# CONFIG_ARM_PSCI is not set -# CONFIG_ARM_PSCI_CHECKER is not set -# CONFIG_ARM_PTDUMP_DEBUGFS is not set -# CONFIG_ARM_SBSA_WATCHDOG is not set -# CONFIG_ARM_SCPI_PROTOCOL is not set -# CONFIG_ARM_SDE_INTERFACE is not set -# CONFIG_ARM_SPE_PMU is not set -# CONFIG_ARM_TIMER_SP804 is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_ARM_VIRT_EXT is not set -# CONFIG_AS3935 is not set -# CONFIG_ASM9260_TIMER is not set -# CONFIG_ASUS_LAPTOP is not set -# CONFIG_ASUS_WIRELESS is not set -# CONFIG_ASYMMETRIC_KEY_TYPE is not set -# CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_AT76C50X_USB is not set -# CONFIG_AT803X_PHY is not set -# CONFIG_AT91_SAMA5D2_ADC is not set -# CONFIG_ATA is not set -# CONFIG_ATAGS is not set -CONFIG_ATAGS_PROC=y -# CONFIG_ATALK is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_ATA_ACPI is not set -CONFIG_ATA_BMDMA=y -# CONFIG_ATA_GENERIC is not set -# CONFIG_ATA_LEDS is not set -# CONFIG_ATA_NONSTANDARD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_ATA_PIIX is not set -CONFIG_ATA_SFF=y -# CONFIG_ATA_VERBOSE_ERROR is not set -# CONFIG_ATH10K is not set -# CONFIG_ATH25 is not set -# CONFIG_ATH5K is not set -# CONFIG_ATH6KL is not set -# CONFIG_ATH79 is not set -# CONFIG_ATH9K is not set -# CONFIG_ATH9K_HTC is not set -# CONFIG_ATH_DEBUG is not set -# CONFIG_ATL1 is not set -# CONFIG_ATL1C is not set -# CONFIG_ATL1E is not set -# CONFIG_ATL2 is not set -# CONFIG_ATLAS_PH_SENSOR is not set -# CONFIG_ATM is not set -# CONFIG_ATMEL is not set -# CONFIG_ATMEL_PIT is not set -# CONFIG_ATMEL_SSC is not set -# CONFIG_ATM_AMBASSADOR is not set -# CONFIG_ATM_BR2684 is not set -CONFIG_ATM_BR2684_IPFILTER=y -# CONFIG_ATM_CLIP is not set -CONFIG_ATM_CLIP_NO_ICMP=y -# CONFIG_ATM_DRIVERS is not set -# CONFIG_ATM_DUMMY is not set -# CONFIG_ATM_ENI is not set -# CONFIG_ATM_FIRESTREAM is not set -# CONFIG_ATM_FORE200E is not set -# CONFIG_ATM_HE is not set -# CONFIG_ATM_HORIZON is not set -# CONFIG_ATM_IA is not set -# CONFIG_ATM_IDT77252 is not set -# CONFIG_ATM_LANAI is not set -# CONFIG_ATM_LANE is not set -# CONFIG_ATM_MPOA is not set -# CONFIG_ATM_NICSTAR is not set -# CONFIG_ATM_SOLOS is not set -# CONFIG_ATM_TCP is not set -# CONFIG_ATM_ZATM is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ATP is not set -# CONFIG_AUDIT is not set -# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set -# CONFIG_AURORA_NB8800 is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTO_ZRELADDR is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_AX25 is not set -# CONFIG_AX25_DAMA_SLAVE is not set -# CONFIG_AX88796 is not set -# CONFIG_AX88796B_PHY is not set -# CONFIG_AXP20X_ADC is not set -# CONFIG_AXP20X_POWER is not set -# CONFIG_AXP288_ADC is not set -# CONFIG_AXP288_FUEL_GAUGE is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_B44 is not set -# CONFIG_B53 is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_APPLE is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_GENERIC is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_PANDORA is not set -# CONFIG_BACKLIGHT_PM8941_WLED is not set -# CONFIG_BACKLIGHT_PWM is not set -# CONFIG_BACKLIGHT_RPI is not set -# CONFIG_BACKLIGHT_SAHARA is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -CONFIG_BASE_FULL=y -CONFIG_BASE_SMALL=0 -# CONFIG_BATMAN_ADV is not set -# CONFIG_BATTERY_BQ27XXX is not set -# CONFIG_BATTERY_BQ27XXX_HDQ is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_BATTERY_GOLDFISH is not set -# CONFIG_BATTERY_LEGO_EV3 is not set -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_BATTERY_MAX1721X is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_BAYCOM_EPP is not set -# CONFIG_BAYCOM_PAR is not set -# CONFIG_BAYCOM_SER_FDX is not set -# CONFIG_BAYCOM_SER_HDX is not set -# CONFIG_BCACHE is not set -# CONFIG_BCM47XX is not set -# CONFIG_BCM63XX is not set -# CONFIG_BCM63XX_PHY is not set -# CONFIG_BCM7038_WDT is not set -# CONFIG_BCM7XXX_PHY is not set -# CONFIG_BCM84881_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_BCMA is not set -# CONFIG_BCMA_DRIVER_GPIO is not set -CONFIG_BCMA_POSSIBLE=y -# CONFIG_BCMGENET is not set -# CONFIG_BCM_IPROC_ADC is not set -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_BCM_SBA_RAID is not set -# CONFIG_BDI_SWITCH is not set -# CONFIG_BE2ISCSI is not set -# CONFIG_BE2NET is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_BGMAC is not set -# CONFIG_BH1750 is not set -# CONFIG_BH1780 is not set -# CONFIG_BIG_KEYS is not set -# CONFIG_BIG_LITTLE is not set -# CONFIG_BINARY_PRINTF is not set -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_ELF_FDPIC is not set -# CONFIG_BINFMT_FLAT is not set -# CONFIG_BINFMT_MISC is not set -CONFIG_BINFMT_SCRIPT=y -CONFIG_BITREVERSE=y -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_DEBUG_FS is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_BLK_DEV_4DRIVES is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI14XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_BLK_DEV_ATIIXP is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_BSGLIB is not set -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_CS5535 is not set -# CONFIG_BLK_DEV_CS5536 is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_DELKIN is not set -# CONFIG_BLK_DEV_DRBD is not set -# CONFIG_BLK_DEV_DTC2278 is not set -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_GENERIC is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_HT6560B is not set -# CONFIG_BLK_DEV_IDEACPI is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_BLK_DEV_IDEPNP is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDE_AU1XXX is not set -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_INITRD=y -# CONFIG_BLK_DEV_INTEGRITY is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_BLK_DEV_IT8172 is not set -# CONFIG_BLK_DEV_IT8213 is not set -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_JMICRON is not set -# CONFIG_BLK_DEV_LOOP is not set -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_NULL_BLK is not set -# CONFIG_BLK_DEV_NVME is not set -# CONFIG_BLK_DEV_OFFBOARD is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_BLK_DEV_PLATFORM is not set -# CONFIG_BLK_DEV_PMEM is not set -# CONFIG_BLK_DEV_QD65XX is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_RBD is not set -# CONFIG_BLK_DEV_RSXX is not set -# CONFIG_BLK_DEV_RZ1000 is not set -# CONFIG_BLK_DEV_SC1200 is not set -# CONFIG_BLK_DEV_SD is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_SKD is not set -# CONFIG_BLK_DEV_SL82C105 is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_TC86C001 is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_UMC8672 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_ZONED is not set -# CONFIG_BLK_SED_OPAL is not set -# CONFIG_BLK_WBT is not set -CONFIG_BLOCK=y -# CONFIG_BMA180 is not set -# CONFIG_BMA220 is not set -# CONFIG_BMC150_ACCEL is not set -# CONFIG_BMC150_MAGN is not set -# CONFIG_BMC150_MAGN_I2C is not set -# CONFIG_BMC150_MAGN_SPI is not set -# CONFIG_BME680 is not set -# CONFIG_BMG160 is not set -# CONFIG_BMI160_I2C is not set -# CONFIG_BMI160_SPI is not set -# CONFIG_BMIPS_GENERIC is not set -# CONFIG_BMP280 is not set -# CONFIG_BNA is not set -# CONFIG_BNX2 is not set -# CONFIG_BNX2X is not set -# CONFIG_BNX2X_SRIOV is not set -# CONFIG_BNXT is not set -# CONFIG_BONDING is not set -# CONFIG_BOOKE_WDT is not set -CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=3 -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -CONFIG_BOOT_RAW=y -CONFIG_BPF=y -# CONFIG_BPFILTER is not set -CONFIG_BPF_JIT=y -# CONFIG_BPF_JIT_ALWAYS_ON is not set -# CONFIG_BPF_STREAM_PARSER is not set -CONFIG_BPF_SYSCALL=y -# CONFIG_BPQETHER is not set -CONFIG_BQL=y -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_BRCMFMAC is not set -# CONFIG_BRCMSMAC is not set -# CONFIG_BRCMSTB_GISB_ARB is not set -CONFIG_BRIDGE=y -# CONFIG_BRIDGE_EBT_802_3 is not set -# CONFIG_BRIDGE_EBT_AMONG is not set -# CONFIG_BRIDGE_EBT_ARP is not set -# CONFIG_BRIDGE_EBT_ARPREPLY is not set -# CONFIG_BRIDGE_EBT_BROUTE is not set -# CONFIG_BRIDGE_EBT_DNAT is not set -# CONFIG_BRIDGE_EBT_IP is not set -# CONFIG_BRIDGE_EBT_IP6 is not set -# CONFIG_BRIDGE_EBT_LIMIT is not set -# CONFIG_BRIDGE_EBT_LOG is not set -# CONFIG_BRIDGE_EBT_MARK is not set -# CONFIG_BRIDGE_EBT_MARK_T is not set -# CONFIG_BRIDGE_EBT_NFLOG is not set -# CONFIG_BRIDGE_EBT_PKTTYPE is not set -# CONFIG_BRIDGE_EBT_REDIRECT is not set -# CONFIG_BRIDGE_EBT_SNAT is not set -# CONFIG_BRIDGE_EBT_STP is not set -# CONFIG_BRIDGE_EBT_T_FILTER is not set -# CONFIG_BRIDGE_EBT_T_NAT is not set -# CONFIG_BRIDGE_EBT_VLAN is not set -CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_BRIDGE_NETFILTER is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -CONFIG_BRIDGE_VLAN_FILTERING=y -# CONFIG_BROADCOM_PHY is not set -CONFIG_BROKEN_ON_SMP=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_BT is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_BTRFS_FS_REF_VERIFY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BT_ATH3K is not set -# CONFIG_BT_BNEP is not set -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -# CONFIG_BT_BREDR is not set -# CONFIG_BT_CMTP is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIBLUECARD is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBT3C is not set -# CONFIG_BT_HCIBTSDIO is not set -# CONFIG_BT_HCIBTUSB is not set -# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set -# CONFIG_BT_HCIBTUSB_RTL is not set -# CONFIG_BT_HCIDTL1 is not set -# CONFIG_BT_HCIUART is not set -# CONFIG_BT_HCIUART_3WIRE is not set -# CONFIG_BT_HCIUART_AG6XX is not set -# CONFIG_BT_HCIUART_ATH3K is not set -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_H4=y -# CONFIG_BT_HCIUART_LL is not set -# CONFIG_BT_HCIUART_MRVL is not set -# CONFIG_BT_HCIUART_QCA is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_BT_HIDP is not set -# CONFIG_BT_HS is not set -# CONFIG_BT_LE is not set -# CONFIG_BT_LEDS is not set -# CONFIG_BT_MRVL is not set -# CONFIG_BT_MTKUART is not set -# CONFIG_BT_RFCOMM is not set -CONFIG_BT_RFCOMM_TTY=y -# CONFIG_BT_SELFTEST is not set -CONFIG_BUG=y -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -CONFIG_BUILDTIME_EXTABLE_SORT=y -# CONFIG_BUILD_BIN2C is not set -CONFIG_BUILD_SALT="" -# CONFIG_C2PORT is not set -CONFIG_CACHE_L2X0_PMU=y -# CONFIG_CADENCE_WATCHDOG is not set -# CONFIG_CAIF is not set -# CONFIG_CAN is not set -# CONFIG_CAN_BCM is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -# CONFIG_CAN_DEV is not set -# CONFIG_CAN_GS_USB is not set -# CONFIG_CAN_GW is not set -# CONFIG_CAN_HI311X is not set -# CONFIG_CAN_IFI_CANFD is not set -# CONFIG_CAN_MCBA_USB is not set -# CONFIG_CAN_M_CAN is not set -# CONFIG_CAN_PEAK_PCIEFD is not set -# CONFIG_CAN_RAW is not set -# CONFIG_CAN_RCAR is not set -# CONFIG_CAN_RCAR_CANFD is not set -# CONFIG_CAN_SLCAN is not set -# CONFIG_CAN_SUN4I is not set -# CONFIG_CAN_UCAN is not set -# CONFIG_CAN_VCAN is not set -# CONFIG_CAN_VXCAN is not set -# CONFIG_CAPI_AVM is not set -# CONFIG_CAPI_EICON is not set -# CONFIG_CAPI_TRACE is not set -CONFIG_CARDBUS=y -# CONFIG_CARDMAN_4000 is not set -# CONFIG_CARDMAN_4040 is not set -# CONFIG_CARL9170 is not set -# CONFIG_CASSINI is not set -# CONFIG_CAVIUM_CPT is not set -# CONFIG_CAVIUM_ERRATUM_22375 is not set -# CONFIG_CAVIUM_ERRATUM_23144 is not set -# CONFIG_CAVIUM_ERRATUM_23154 is not set -# CONFIG_CAVIUM_ERRATUM_27456 is not set -# CONFIG_CAVIUM_ERRATUM_30115 is not set -# CONFIG_CAVIUM_OCTEON_SOC is not set -# CONFIG_CAVIUM_PTP is not set -# CONFIG_CB710_CORE is not set -# CONFIG_CC10001_ADC is not set -# CONFIG_CCS811 is not set -CONFIG_CC_HAS_SANCOV_TRACE_PC=y -CONFIG_CC_HAS_STACKPROTECTOR_NONE=y -CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_CEPH_FS is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_CFG80211 is not set -# CONFIG_CFG80211_CERTIFICATION_ONUS is not set -# CONFIG_CGROUPS is not set -# CONFIG_CHARGER_ADP5061 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_LTC3651 is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_RT9455 is not set -# CONFIG_CHARGER_SBS is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_CHARGER_TWL4030 is not set -# CONFIG_CHASH_SELFTEST is not set -# CONFIG_CHASH_STATS is not set -# CONFIG_CHECKPOINT_RESTORE is not set -# CONFIG_CHELSIO_T1 is not set -# CONFIG_CHELSIO_T3 is not set -# CONFIG_CHELSIO_T4 is not set -# CONFIG_CHELSIO_T4VF is not set -# CONFIG_CHROME_PLATFORMS is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_CIFS is not set -# CONFIG_CIFS_ACL is not set -CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -# CONFIG_CIFS_DEBUG is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_FSCACHE is not set -# CONFIG_CIFS_NFSD_EXPORT is not set -CONFIG_CIFS_POSIX=y -# CONFIG_CIFS_SMB2 is not set -CONFIG_CIFS_STATS=y -# CONFIG_CIFS_STATS2 is not set -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIO_DAC is not set -CONFIG_CLANG_VERSION=0 -# CONFIG_CLEANCACHE is not set -# CONFIG_CLKSRC_VERSATILE is not set -# CONFIG_CLK_HSDK is not set -# CONFIG_CLK_QORIQ is not set -# CONFIG_CLOCK_THERMAL is not set -CONFIG_CLS_U32_MARK=y -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CM32181 is not set -# CONFIG_CM3232 is not set -# CONFIG_CM3323 is not set -# CONFIG_CM3605 is not set -# CONFIG_CM36651 is not set -# CONFIG_CMA is not set -CONFIG_CMDLINE="" -# CONFIG_CMDLINE_BOOL is not set -# CONFIG_CMDLINE_EXTEND is not set -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_CMDLINE_FROM_BOOTLOADER is not set -# CONFIG_CMDLINE_PARTITION is not set -# CONFIG_CNIC is not set -# CONFIG_CODA_FS is not set -# CONFIG_CODE_PATCHING_SELFTEST is not set -# CONFIG_COMEDI is not set -# CONFIG_COMMON_CLK_CDCE706 is not set -# CONFIG_COMMON_CLK_CDCE925 is not set -# CONFIG_COMMON_CLK_CS2000_CP is not set -# CONFIG_COMMON_CLK_IPROC is not set -# CONFIG_COMMON_CLK_MAX9485 is not set -# CONFIG_COMMON_CLK_NXP is not set -# CONFIG_COMMON_CLK_PIC32 is not set -# CONFIG_COMMON_CLK_PWM is not set -# CONFIG_COMMON_CLK_PXA is not set -# CONFIG_COMMON_CLK_QCOM is not set -# CONFIG_COMMON_CLK_SI514 is not set -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_SI544 is not set -# CONFIG_COMMON_CLK_SI570 is not set -# CONFIG_COMMON_CLK_VC5 is not set -# CONFIG_COMMON_CLK_VERSATILE is not set -# CONFIG_COMMON_CLK_XGENE is not set -# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set -CONFIG_COMPACTION=y -# CONFIG_COMPAL_LAPTOP is not set -# CONFIG_COMPAT is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_COMPILE_TEST is not set -# CONFIG_CONFIGFS_FS is not set -# CONFIG_CONFIG_KVM_AMD_SEV is not set -# CONFIG_CONNECTOR is not set -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_CONSOLE_LOGLEVEL_QUIET=4 -CONFIG_CONSTRUCTORS=y -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_COPS is not set -# CONFIG_CORDIC is not set -# CONFIG_COREDUMP is not set -# CONFIG_CORESIGHT is not set -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_CORTINA_PHY is not set -# CONFIG_CPA_DEBUG is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_FREQ is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_IDLE is not set -# CONFIG_CPU_IDLE_GOV_MENU is not set -# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set -# CONFIG_CPU_ISOLATION is not set -# CONFIG_CPU_NO_EFFICIENT_FFS is not set -CONFIG_CPU_SW_DOMAIN_PAN=y -# CONFIG_CRAMFS is not set -CONFIG_CRAMFS_BLOCKDEV=y -# CONFIG_CRAMFS_MTD is not set -CONFIG_CRASHLOG=y -# CONFIG_CRASH_DUMP is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_CRC32_BIT is not set -CONFIG_CRC32_SARWATE=y -# CONFIG_CRC32_SELFTEST is not set -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SLICEBY8 is not set -# CONFIG_CRC4 is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC7 is not set -# CONFIG_CRC8 is not set -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC_ITU_T is not set -# CONFIG_CRC_T10DIF is not set -CONFIG_CROSS_COMPILE="" -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_842 is not set -# CONFIG_CRYPTO_AEAD is not set -# CONFIG_CRYPTO_AEGIS128 is not set -# CONFIG_CRYPTO_AEGIS128L is not set -# CONFIG_CRYPTO_AEGIS128L_AESNI_SSE2 is not set -# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set -# CONFIG_CRYPTO_AEGIS256 is not set -# CONFIG_CRYPTO_AEGIS256_AESNI_SSE2 is not set -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_586 is not set -# CONFIG_CRYPTO_AES_ARM is not set -# CONFIG_CRYPTO_AES_ARM_BS is not set -# CONFIG_CRYPTO_AES_ARM_CE is not set -# CONFIG_CRYPTO_AES_NI_INTEL is not set -# CONFIG_CRYPTO_AES_TI is not set -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_AUTHENC is not set -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_CFB is not set -# CONFIG_CRYPTO_CHACHA20 is not set -# CONFIG_CRYPTO_CHACHA20POLY1305 is not set -# CONFIG_CRYPTO_CHACHA20_NEON is not set -# CONFIG_CRYPTO_CMAC is not set -# CONFIG_CRYPTO_CRC32 is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CRC32C_INTEL is not set -# CONFIG_CRYPTO_CRC32_ARM_CE is not set -# CONFIG_CRYPTO_CRCT10DIF is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_DEV_ATMEL_AES is not set -# CONFIG_CRYPTO_DEV_ATMEL_AUTHENC is not set -# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set -# CONFIG_CRYPTO_DEV_ATMEL_SHA is not set -# CONFIG_CRYPTO_DEV_ATMEL_TDES is not set -# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set -# CONFIG_CRYPTO_DEV_CCP is not set -# CONFIG_CRYPTO_DEV_CCREE is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set -# CONFIG_CRYPTO_DEV_HIFN_795X is not set -# CONFIG_CRYPTO_DEV_HISI_SEC is not set -# CONFIG_CRYPTO_DEV_IMGTEC_HASH is not set -# CONFIG_CRYPTO_DEV_MARVELL_CESA is not set -# CONFIG_CRYPTO_DEV_MV_CESA is not set -# CONFIG_CRYPTO_DEV_MXC_SCC is not set -# CONFIG_CRYPTO_DEV_MXS_DCP is not set -# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set -# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set -# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set -# CONFIG_CRYPTO_DEV_QAT_C62X is not set -# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set -# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set -# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set -# CONFIG_CRYPTO_DEV_QCE is not set -# CONFIG_CRYPTO_DEV_S5P is not set -# CONFIG_CRYPTO_DEV_SAFEXCEL is not set -# CONFIG_CRYPTO_DEV_SAHARA is not set -# CONFIG_CRYPTO_DEV_SP_PSP is not set -# CONFIG_CRYPTO_DEV_TALITOS is not set -# CONFIG_CRYPTO_DEV_VIRTIO is not set -# CONFIG_CRYPTO_DH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_MENU is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_ECDH is not set -# CONFIG_CRYPTO_ECHAINIV is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_FIPS is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_GHASH_ARM_CE is not set -# CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set -# CONFIG_CRYPTO_HASH is not set -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_HW is not set -# CONFIG_CRYPTO_JITTERENTROPY is not set -# CONFIG_CRYPTO_KEYWRAP is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set -# CONFIG_CRYPTO_LZO is not set -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -# CONFIG_CRYPTO_MCRYPTD is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_MORUS1280 is not set -# CONFIG_CRYPTO_MORUS1280_AVX2 is not set -# CONFIG_CRYPTO_MORUS1280_SSE2 is not set -# CONFIG_CRYPTO_MORUS640 is not set -# CONFIG_CRYPTO_MORUS640_SSE2 is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_PCOMP is not set -# CONFIG_CRYPTO_PCOMP2 is not set -CONFIG_CRYPTO_PCRYPT=y -# CONFIG_CRYPTO_POLY1305 is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_RNG is not set -# CONFIG_CRYPTO_RSA is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SALSA20_586 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SEQIV is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA1_ARM is not set -# CONFIG_CRYPTO_SHA1_ARM_CE is not set -# CONFIG_CRYPTO_SHA1_ARM_NEON is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA256_ARM is not set -# CONFIG_CRYPTO_SHA2_ARM_CE is not set -# CONFIG_CRYPTO_SHA3 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_SHA512_ARM is not set -# CONFIG_CRYPTO_SIMD is not set -# CONFIG_CRYPTO_SM3 is not set -# CONFIG_CRYPTO_SM4 is not set -# CONFIG_CRYPTO_SPECK is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TEST is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_TWOFISH_586 is not set -# CONFIG_CRYPTO_TWOFISH_COMMON is not set -# CONFIG_CRYPTO_USER is not set -# CONFIG_CRYPTO_USER_API_AEAD is not set -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_RNG is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -# CONFIG_CRYPTO_VMAC is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_XTS is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_ZSTD is not set -# CONFIG_CS5535_MFGPT is not set -# CONFIG_CS89x0 is not set -# CONFIG_CUSE is not set -# CONFIG_CW1200 is not set -# CONFIG_CXL_AFU_DRIVER_OPS is not set -# CONFIG_CXL_BASE is not set -# CONFIG_CXL_EEH is not set -# CONFIG_CXL_KERNEL_API is not set -# CONFIG_CXL_LIB is not set -# CONFIG_CYPRESS_FIRMWARE is not set -# CONFIG_DA280 is not set -# CONFIG_DA311 is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_DAX is not set -# CONFIG_DCB is not set -# CONFIG_DDR is not set -# CONFIG_DEBUG_ALIGN_RODATA is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_CREDENTIALS is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_EFI is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -CONFIG_DEBUG_FS=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_DEBUG_HIGHMEM is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_INFO_DWARF4 is not set -CONFIG_DEBUG_INFO_REDUCED=y -# CONFIG_DEBUG_INFO_SPLIT is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_KOBJECT_RELEASE is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_DEBUG_LL_UART_8250 is not set -# CONFIG_DEBUG_LL_UART_PL01X is not set -# CONFIG_DEBUG_LOCKDEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_NX_TEST is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_PAGE_REF is not set -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -# CONFIG_DEBUG_PER_CPU_MAPS is not set -# CONFIG_DEBUG_PINCTRL is not set -# CONFIG_DEBUG_PI_LIST is not set -# CONFIG_DEBUG_PREEMPT is not set -# CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_DEBUG_RSEQ is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_DEBUG_RWSEMS is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -# CONFIG_DEBUG_SEMIHOSTING is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_STACKOVERFLOW is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set -# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set -# CONFIG_DEBUG_TIMEKEEPING is not set -# CONFIG_DEBUG_UART_8250_PALMCHIP is not set -# CONFIG_DEBUG_UART_BCM63XX is not set -# CONFIG_DEBUG_VIRTUAL is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_VM_PGFLAGS is not set -# CONFIG_DEBUG_VM_RB is not set -# CONFIG_DEBUG_VM_VMACACHE is not set -# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set -# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_WX is not set -# CONFIG_DEBUG_ZBOOT is not set -# CONFIG_DECNET is not set -CONFIG_DEFAULT_CUBIC=y -CONFIG_DEFAULT_DEADLINE=y -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 -CONFIG_DEFAULT_IOSCHED="deadline" -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_DEFAULT_NOOP is not set -# CONFIG_DEFAULT_RENO is not set -CONFIG_DEFAULT_SECURITY="" -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set -# CONFIG_DELL_LAPTOP is not set -# CONFIG_DELL_RBTN is not set -# CONFIG_DELL_SMBIOS is not set -# CONFIG_DELL_SMO8800 is not set -# CONFIG_DEPRECATED_PARAM_STRUCT is not set -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_DEVKMEM is not set -# CONFIG_DEVMEM is not set -CONFIG_DEVPORT=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_DEVTMPFS is not set -# CONFIG_DEVTMPFS_MOUNT is not set -# CONFIG_DEV_DAX is not set -# CONFIG_DGAP is not set -# CONFIG_DGNC is not set -# CONFIG_DHT11 is not set -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_DISPLAY_CONNECTOR_ANALOG_TV is not set -# CONFIG_DISPLAY_CONNECTOR_DVI is not set -# CONFIG_DISPLAY_CONNECTOR_HDMI is not set -# CONFIG_DISPLAY_ENCODER_TFP410 is not set -# CONFIG_DISPLAY_ENCODER_TPD12S015 is not set -# CONFIG_DISPLAY_PANEL_DPI is not set -# CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02 is not set -# CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1 is not set -# CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1 is not set -# CONFIG_DL2K is not set -# CONFIG_DLM is not set -# CONFIG_DM9000 is not set -# CONFIG_DMADEVICES is not set -# CONFIG_DMADEVICES_DEBUG is not set -# CONFIG_DMARD06 is not set -# CONFIG_DMARD09 is not set -# CONFIG_DMARD10 is not set -# CONFIG_DMASCC is not set -# CONFIG_DMATEST is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_DMA_ENGINE is not set -# CONFIG_DMA_FENCE_TRACE is not set -# CONFIG_DMA_JZ4780 is not set -# CONFIG_DMA_NOOP_OPS is not set -# CONFIG_DMA_SHARED_BUFFER is not set -# CONFIG_DMA_VIRT_OPS is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_ERA is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_INTEGRITY is not set -# CONFIG_DM_LOG_USERSPACE is not set -# CONFIG_DM_LOG_WRITES is not set -# CONFIG_DM_MQ_DEFAULT is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_UNSTRIPED is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_WRITECACHE is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DNET is not set -# CONFIG_DNOTIFY is not set -# CONFIG_DNS_RESOLVER is not set -CONFIG_DOUBLEFAULT=y -# CONFIG_DP83822_PHY is not set -# CONFIG_DP83848_PHY is not set -# CONFIG_DP83867_PHY is not set -# CONFIG_DP83TC811_PHY is not set -# CONFIG_DPOT_DAC is not set -CONFIG_DQL=y -# CONFIG_DRAGONRISE_FF is not set -# CONFIG_DRM is not set -# CONFIG_DRM_AMDGPU is not set -# CONFIG_DRM_AMDGPU_CIK is not set -# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set -# CONFIG_DRM_AMDGPU_SI is not set -# CONFIG_DRM_AMDGPU_USERPTR is not set -# CONFIG_DRM_AMD_ACP is not set -# CONFIG_DRM_ANALOGIX_ANX78XX is not set -# CONFIG_DRM_ARCPGU is not set -# CONFIG_DRM_ARMADA is not set -# CONFIG_DRM_AST is not set -# CONFIG_DRM_BOCHS is not set -# CONFIG_DRM_CDNS_DSI is not set -# CONFIG_DRM_CIRRUS_QEMU is not set -# CONFIG_DRM_DEBUG_MM is not set -# CONFIG_DRM_DEBUG_SELFTEST is not set -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set -# CONFIG_DRM_DUMB_VGA_DAC is not set -# CONFIG_DRM_DW_HDMI_CEC is not set -# CONFIG_DRM_ETNAVIV is not set -# CONFIG_DRM_EXYNOS is not set -# CONFIG_DRM_FBDEV_EMULATION is not set -# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set -# CONFIG_DRM_FSL_DCU is not set -# CONFIG_DRM_GMA500 is not set -# CONFIG_DRM_HDLCD is not set -# CONFIG_DRM_HISI_HIBMC is not set -# CONFIG_DRM_HISI_KIRIN is not set -# CONFIG_DRM_I2C_ADV7511 is not set -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I915 is not set -# CONFIG_DRM_LEGACY is not set -# CONFIG_DRM_LIB_RANDOM is not set -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -# CONFIG_DRM_LVDS_ENCODER is not set -# CONFIG_DRM_MALI_DISPLAY is not set -# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -# CONFIG_DRM_MGAG200 is not set -# CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_NOUVEAU is not set -# CONFIG_DRM_NXP_PTN3460 is not set -# CONFIG_DRM_OMAP is not set -# CONFIG_DRM_PANEL_ARM_VERSATILE is not set -# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set -# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -# CONFIG_DRM_PANEL_LG_LG4573 is not set -# CONFIG_DRM_PANEL_LVDS is not set -# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set -# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set -# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set -# CONFIG_DRM_PARADE_PS8622 is not set -# CONFIG_DRM_PL111 is not set -# CONFIG_DRM_QXL is not set -# CONFIG_DRM_RADEON is not set -# CONFIG_DRM_RADEON_USERPTR is not set -# CONFIG_DRM_RCAR_DW_HDMI is not set -# CONFIG_DRM_RCAR_LVDS is not set -# CONFIG_DRM_SII902X is not set -# CONFIG_DRM_SII9234 is not set -# CONFIG_DRM_SIL_SII8620 is not set -# CONFIG_DRM_STI is not set -# CONFIG_DRM_STM is not set -# CONFIG_DRM_SUN4I is not set -# CONFIG_DRM_THINE_THC63LVD1024 is not set -# CONFIG_DRM_TILCDC is not set -# CONFIG_DRM_TINYDRM is not set -# CONFIG_DRM_TI_TFP410 is not set -# CONFIG_DRM_TOSHIBA_TC358767 is not set -# CONFIG_DRM_UDL is not set -# CONFIG_DRM_VBOXVIDEO is not set -# CONFIG_DRM_VGEM is not set -# CONFIG_DRM_VIRTIO_GPU is not set -# CONFIG_DRM_VKMS is not set -# CONFIG_DRM_VMWGFX is not set -# CONFIG_DRM_XEN is not set -# CONFIG_DS1682 is not set -# CONFIG_DS1803 is not set -# CONFIG_DS4424 is not set -# CONFIG_DST_CACHE is not set -# CONFIG_DTLK is not set -# CONFIG_DUMMY is not set -CONFIG_DUMMY_CONSOLE_COLUMNS=80 -CONFIG_DUMMY_CONSOLE_ROWS=25 -# CONFIG_DUMMY_IRQ is not set -# CONFIG_DVB_AU8522_V4L is not set -# CONFIG_DVB_CORE is not set -# CONFIG_DVB_DUMMY_FE is not set -# CONFIG_DVB_TUNER_DIB0070 is not set -# CONFIG_DVB_TUNER_DIB0090 is not set -# CONFIG_DWC_XLGMAC is not set -# CONFIG_DWMAC_IPQ806X is not set -# CONFIG_DWMAC_LPC18XX is not set -# CONFIG_DWMAC_MESON is not set -# CONFIG_DWMAC_ROCKCHIP is not set -# CONFIG_DWMAC_SOCFPGA is not set -# CONFIG_DWMAC_STI is not set -# CONFIG_DW_AXI_DMAC is not set -# CONFIG_DW_DMAC is not set -# CONFIG_DW_DMAC_PCI is not set -# CONFIG_DW_WATCHDOG is not set -# CONFIG_DYNAMIC_DEBUG is not set -# CONFIG_E100 is not set -# CONFIG_E1000 is not set -# CONFIG_E1000E is not set -# CONFIG_E1000E_HWTS is not set -# CONFIG_EARLY_PRINTK_8250 is not set -# CONFIG_EARLY_PRINTK_USB_XDBC is not set -# CONFIG_EBC_C384_WDT is not set -# CONFIG_ECHO is not set -# CONFIG_ECRYPT_FS is not set -# CONFIG_EDAC is not set -# CONFIG_EEEPC_LAPTOP is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_EEPROM_93XX46 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_DIGSY_MTC_CFG is not set -# CONFIG_EEPROM_IDT_89HPESX is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EFI is not set -CONFIG_EFI_PARTITION=y -# CONFIG_EFS_FS is not set -CONFIG_ELFCORE=y -# CONFIG_ELF_CORE is not set -# CONFIG_EMAC_ROCKCHIP is not set -CONFIG_EMBEDDED=y -# CONFIG_EM_TIMER_STI is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -# CONFIG_ENA_ETHERNET is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_ENCX24J600 is not set -# CONFIG_ENIC is not set -# CONFIG_ENVELOPE_DETECTOR is not set -# CONFIG_EPAPR_PARAVIRT is not set -# CONFIG_EPIC100 is not set -CONFIG_EPOLL=y -# CONFIG_EQUALIZER is not set -# CONFIG_EROFS_FS is not set -# CONFIG_ET131X is not set -CONFIG_ETHERNET=y -# CONFIG_ETHOC is not set -CONFIG_EVENTFD=y -CONFIG_EXPERT=y -CONFIG_EXPORTFS=y -# CONFIG_EXPORTFS_BLOCK_OPS is not set -# CONFIG_EXT2_FS is not set -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4_DEBUG is not set -# CONFIG_EXT4_ENCRYPTION is not set -# CONFIG_EXT4_FS is not set -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -CONFIG_EXT4_USE_FOR_EXT2=y -# CONFIG_EXTCON is not set -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_ARIZONA is not set -# CONFIG_EXTCON_AXP288 is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_INTEL_INT3496 is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_QCOM_SPMI_MISC is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -# CONFIG_EXTCON_USB_GPIO is not set -CONFIG_EXTRA_FIRMWARE="" -CONFIG_EXTRA_TARGETS="" -# CONFIG_EXYNOS_ADC is not set -# CONFIG_EXYNOS_VIDEO is not set -# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FAULT_INJECTION is not set -# CONFIG_F2FS_FS is not set -# CONFIG_F2FS_FS_ENCRYPTION is not set -# CONFIG_F2FS_FS_POSIX_ACL is not set -# CONFIG_F2FS_FS_SECURITY is not set -CONFIG_F2FS_FS_XATTR=y -# CONFIG_F2FS_IO_TRACE is not set -CONFIG_F2FS_STAT_FS=y -# CONFIG_FAILOVER is not set -# CONFIG_FAIR_GROUP_SCHED is not set -# CONFIG_FANOTIFY is not set -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_FAT_DEFAULT_UTF8 is not set -# CONFIG_FAT_FS is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_FB is not set -# CONFIG_FB_3DFX is not set -# CONFIG_FB_ARC is not set -# CONFIG_FB_ARK is not set -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_ASILIANT is not set -# CONFIG_FB_ATY is not set -# CONFIG_FB_ATY128 is not set -# CONFIG_FB_AUO_K190X is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_BIG_ENDIAN is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -# CONFIG_FB_BOTH_ENDIAN is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_CARMINE is not set -# CONFIG_FB_CFB_COPYAREA is not set -# CONFIG_FB_CFB_FILLRECT is not set -# CONFIG_FB_CFB_IMAGEBLIT is not set -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_CIRRUS is not set -# CONFIG_FB_CYBER2000 is not set -# CONFIG_FB_DA8XX is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_FLEX is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_GEODE is not set -# CONFIG_FB_GOLDFISH is not set -# CONFIG_FB_HGA is not set -# CONFIG_FB_I740 is not set -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_FB_IMSTT is not set -# CONFIG_FB_IMX is not set -# CONFIG_FB_KYRO is not set -# CONFIG_FB_LE80578 is not set -# CONFIG_FB_LITTLE_ENDIAN is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_MATROX is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_MXS is not set -# CONFIG_FB_N411 is not set -# CONFIG_FB_NEOMAGIC is not set -CONFIG_FB_NOTIFY=y -# CONFIG_FB_NVIDIA is not set -# CONFIG_FB_OF is not set -# CONFIG_FB_OMAP2 is not set -# CONFIG_FB_OPENCORES is not set -# CONFIG_FB_PM2 is not set -# CONFIG_FB_PM3 is not set -# CONFIG_FB_PS3 is not set -# CONFIG_FB_PXA is not set -# CONFIG_FB_RADEON is not set -# CONFIG_FB_RIVA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_S3 is not set -# CONFIG_FB_SAVAGE is not set -# CONFIG_FB_SIMPLE is not set -# CONFIG_FB_SIS is not set -# CONFIG_FB_SM712 is not set -# CONFIG_FB_SM750 is not set -# CONFIG_FB_SMSCUFX is not set -# CONFIG_FB_SSD1307 is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_TFT is not set -# CONFIG_FB_TFT_AGM1264K_FL is not set -# CONFIG_FB_TFT_BD663474 is not set -# CONFIG_FB_TFT_FBTFT_DEVICE is not set -# CONFIG_FB_TFT_HX8340BN is not set -# CONFIG_FB_TFT_HX8347D is not set -# CONFIG_FB_TFT_HX8353D is not set -# CONFIG_FB_TFT_HX8357D is not set -# CONFIG_FB_TFT_ILI9163 is not set -# CONFIG_FB_TFT_ILI9320 is not set -# CONFIG_FB_TFT_ILI9325 is not set -# CONFIG_FB_TFT_ILI9340 is not set -# CONFIG_FB_TFT_ILI9341 is not set -# CONFIG_FB_TFT_ILI9481 is not set -# CONFIG_FB_TFT_ILI9486 is not set -# CONFIG_FB_TFT_PCD8544 is not set -# CONFIG_FB_TFT_RA8875 is not set -# CONFIG_FB_TFT_S6D02A1 is not set -# CONFIG_FB_TFT_S6D1121 is not set -# CONFIG_FB_TFT_SH1106 is not set -# CONFIG_FB_TFT_SSD1289 is not set -# CONFIG_FB_TFT_SSD1305 is not set -# CONFIG_FB_TFT_SSD1306 is not set -# CONFIG_FB_TFT_SSD1325 is not set -# CONFIG_FB_TFT_SSD1331 is not set -# CONFIG_FB_TFT_SSD1351 is not set -# CONFIG_FB_TFT_ST7735R is not set -# CONFIG_FB_TFT_ST7789V is not set -# CONFIG_FB_TFT_TINYLCD is not set -# CONFIG_FB_TFT_TLS8204 is not set -# CONFIG_FB_TFT_UC1611 is not set -# CONFIG_FB_TFT_UC1701 is not set -# CONFIG_FB_TFT_UPD161704 is not set -# CONFIG_FB_TFT_WATTEROTT is not set -# CONFIG_FB_TILEBLITTING is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_TRIDENT is not set -# CONFIG_FB_UDL is not set -# CONFIG_FB_UVESA is not set -# CONFIG_FB_VGA16 is not set -# CONFIG_FB_VIA is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_VOODOO1 is not set -# CONFIG_FB_VT8623 is not set -# CONFIG_FB_XGI is not set -# CONFIG_FCOE is not set -# CONFIG_FCOE_FNIC is not set -# CONFIG_FDDI is not set -# CONFIG_FEALNX is not set -# CONFIG_FENCE_TRACE is not set -# CONFIG_FHANDLE is not set -CONFIG_FIB_RULES=y -CONFIG_FILE_LOCKING=y -# CONFIG_FIND_BIT_BENCHMARK is not set -# CONFIG_FIREWIRE is not set -# CONFIG_FIREWIRE_NOSY is not set -# CONFIG_FIREWIRE_SERIAL is not set -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FIRMWARE_MEMMAP is not set -# CONFIG_FIXED_PHY is not set -CONFIG_FLATMEM=y -CONFIG_FLATMEM_MANUAL=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_FM10K is not set -# CONFIG_FMC is not set -# CONFIG_FORCEDETH is not set -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_FORTIFY_SOURCE=y -# CONFIG_FPGA is not set -# CONFIG_FRAMEBUFFER_CONSOLE is not set -# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set -# CONFIG_FRAME_POINTER is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_FREEZER is not set -# CONFIG_FRONTSWAP is not set -# CONFIG_FSCACHE is not set -# CONFIG_FSI is not set -# CONFIG_FSL_EDMA is not set -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_FSL_MC_BUS is not set -# CONFIG_FSL_PQ_MDIO is not set -# CONFIG_FSL_XGMAC_MDIO is not set -CONFIG_FSNOTIFY=y -# CONFIG_FS_DAX is not set -# CONFIG_FS_ENCRYPTION is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_FTGMAC100 is not set -# CONFIG_FTL is not set -# CONFIG_FTMAC100 is not set -# CONFIG_FTRACE is not set -# CONFIG_FTRACE_STARTUP_TEST is not set -# CONFIG_FTR_FIXUP_SELFTEST is not set -# CONFIG_FTWDT010_WATCHDOG is not set -# CONFIG_FUJITSU_ES is not set -# CONFIG_FUJITSU_LAPTOP is not set -# CONFIG_FUJITSU_TABLET is not set -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_FUSE_FS is not set -# CONFIG_FUSION is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set -# CONFIG_FUSION_SPI is not set -CONFIG_FUTEX=y -CONFIG_FUTEX_PI=y -# CONFIG_FW_CFG_SYSFS is not set -CONFIG_FW_LOADER=y -CONFIG_FW_LOADER_USER_HELPER=y -CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y -CONFIG_GACT_PROB=y -# CONFIG_GADGET_UAC1 is not set -# CONFIG_GAMEPORT is not set -# CONFIG_GATEWORKS_GW16083 is not set -# CONFIG_GCC_PLUGINS is not set -# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set -# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCOV is not set -# CONFIG_GCOV_KERNEL is not set -# CONFIG_GDB_SCRIPTS is not set -# CONFIG_GEMINI_ETHERNET is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_GENERIC_ADC_THERMAL is not set -CONFIG_GENERIC_CALIBRATE_DELAY=y -# CONFIG_GENERIC_CPU_DEVICES is not set -CONFIG_GENERIC_HWEIGHT=y -# CONFIG_GENERIC_IRQ_DEBUGFS is not set -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_NET_UTILS=y -# CONFIG_GENERIC_PHY is not set -# CONFIG_GENEVE is not set -# CONFIG_GENWQE is not set -# CONFIG_GFS2_FS is not set -# CONFIG_GIGASET_CAPI is not set -# CONFIG_GIGASET_DEBUG is not set -# CONFIG_GIGASET_DUMMYLL is not set -# CONFIG_GLOB_SELFTEST is not set -# CONFIG_GNSS is not set -# CONFIG_GOLDFISH is not set -# CONFIG_GOOGLE_FIRMWARE is not set -# CONFIG_GP2AP020A00F is not set -# CONFIG_GPD_POCKET_FAN is not set -# CONFIG_GPIOLIB is not set -CONFIG_GPIOLIB_FASTPATH_LIMIT=512 -# CONFIG_GPIO_104_DIO_48E is not set -# CONFIG_GPIO_104_IDIO_16 is not set -# CONFIG_GPIO_104_IDI_48 is not set -# CONFIG_GPIO_74X164 is not set -# CONFIG_GPIO_74XX_MMIO is not set -# CONFIG_GPIO_ADNP is not set -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ALTERA is not set -# CONFIG_GPIO_AMD8111 is not set -# CONFIG_GPIO_AMDPT is not set -# CONFIG_GPIO_BCM_KONA is not set -# CONFIG_GPIO_BT8XX is not set -# CONFIG_GPIO_CS5535 is not set -# CONFIG_GPIO_DWAPB is not set -# CONFIG_GPIO_EM is not set -# CONFIG_GPIO_EXAR is not set -# CONFIG_GPIO_F7188X is not set -# CONFIG_GPIO_FTGPIO010 is not set -# CONFIG_GPIO_GENERIC_PLATFORM is not set -# CONFIG_GPIO_GPIO_MM is not set -# CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_HLWD is not set -# CONFIG_GPIO_ICH is not set -# CONFIG_GPIO_IT87 is not set -# CONFIG_GPIO_LYNXPOINT is not set -# CONFIG_GPIO_MAX3191X is not set -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_MB86S7X is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_ML_IOH is not set -# CONFIG_GPIO_MOCKUP is not set -# CONFIG_GPIO_MPC8XXX is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_PCH is not set -# CONFIG_GPIO_PCIE_IDIO_24 is not set -# CONFIG_GPIO_PCI_IDIO_16 is not set -# CONFIG_GPIO_PISOSR is not set -# CONFIG_GPIO_PL061 is not set -# CONFIG_GPIO_RCAR is not set -# CONFIG_GPIO_RDC321X is not set -# CONFIG_GPIO_SCH is not set -# CONFIG_GPIO_SCH311X is not set -# CONFIG_GPIO_SX150X is not set -# CONFIG_GPIO_SYSCON is not set -CONFIG_GPIO_SYSFS=y -# CONFIG_GPIO_TPIC2810 is not set -# CONFIG_GPIO_TS4900 is not set -# CONFIG_GPIO_TS5500 is not set -# CONFIG_GPIO_VX855 is not set -# CONFIG_GPIO_WATCHDOG is not set -# CONFIG_GPIO_WINBOND is not set -# CONFIG_GPIO_WS16C48 is not set -# CONFIG_GPIO_XGENE is not set -# CONFIG_GPIO_XILINX is not set -# CONFIG_GPIO_XRA1403 is not set -# CONFIG_GPIO_ZEVIO is not set -# CONFIG_GPIO_ZX is not set -# CONFIG_GREENASIA_FF is not set -# CONFIG_GREYBUS is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_GTP is not set -# CONFIG_GUP_BENCHMARK is not set -# CONFIG_HAMACHI is not set -# CONFIG_HAMRADIO is not set -# CONFIG_HAPPYMEAL is not set -CONFIG_HARDENED_USERCOPY=y -# CONFIG_HARDENED_USERCOPY_FALLBACK is not set -# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set -CONFIG_HARDEN_EL2_VECTORS=y -# CONFIG_HARDLOCKUP_DETECTOR is not set -# CONFIG_HAVE_AOUT is not set -CONFIG_HAVE_ARCH_HARDENED_USERCOPY=y -# CONFIG_HAVE_ARCH_HASH is not set -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -# CONFIG_HAVE_ARCH_VMAP_STACK is not set -CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y -# CONFIG_HAVE_ARM_ARCH_TIMER is not set -CONFIG_HAVE_EXIT_THREAD=y -CONFIG_HAVE_GCC_PLUGINS=y -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -CONFIG_HAVE_KERNEL_BZIP2=y -CONFIG_HAVE_KERNEL_CAT=y -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZ4=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_HAVE_KERNEL_XZ=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_STACKPROTECTOR=y -# CONFIG_HCALL_STATS is not set -# CONFIG_HDC100X is not set -# CONFIG_HDLC is not set -# CONFIG_HDLC_CISCO is not set -# CONFIG_HDLC_FR is not set -# CONFIG_HDLC_PPP is not set -# CONFIG_HDLC_RAW is not set -# CONFIG_HDLC_RAW_ETH is not set -# CONFIG_HDMI_LPE_AUDIO is not set -# CONFIG_HDQ_MASTER_OMAP is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_HERMES is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_HFSPLUS_FS_POSIX_ACL is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFS_FS_POSIX_ACL is not set -# CONFIG_HI8435 is not set -# CONFIG_HIBERNATION is not set -# CONFIG_HID is not set -# CONFIG_HIDRAW is not set -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_ACCUTOUCH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_ACRUX_FF is not set -# CONFIG_HID_ALPS is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_ASUS is not set -# CONFIG_HID_AUREAL is not set -# CONFIG_HID_BATTERY_STRENGTH is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_BETOP_FF is not set -# CONFIG_HID_BIGBEN_FF is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_CMEDIA is not set -# CONFIG_HID_CORSAIR is not set -# CONFIG_HID_COUGAR is not set -# CONFIG_HID_CP2112 is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_ELAN is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_GEMBIRD is not set -# CONFIG_HID_GENERIC is not set -# CONFIG_HID_GFRM is not set -# CONFIG_HID_GOOGLE_HAMMER is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_GT683R is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_ICADE is not set -# CONFIG_HID_ITE is not set -# CONFIG_HID_JABRA is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_LOGITECH_DJ is not set -# CONFIG_HID_LOGITECH_HIDPP is not set -# CONFIG_HID_MAGICMOUSE is not set -# CONFIG_HID_MAYFLASH is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_MULTITOUCH is not set -# CONFIG_HID_NTI is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PENMOUNT is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PID is not set -# CONFIG_HID_PLANTRONICS is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_REDRAGON is not set -# CONFIG_HID_RETRODE is not set -# CONFIG_HID_RMI is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SENSOR_HUB is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEAM is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_UDRAW_PS3 is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HIGHMEM is not set -CONFIG_HIGH_RES_TIMERS=y -# CONFIG_HINIC is not set -# CONFIG_HIP04_ETH is not set -# CONFIG_HIPPI is not set -# CONFIG_HISILICON_ERRATUM_161010101 is not set -# CONFIG_HISILICON_ERRATUM_161600802 is not set -# CONFIG_HISI_FEMAC is not set -# CONFIG_HIX5HD2_GMAC is not set -# CONFIG_HMC6352 is not set -# CONFIG_HNS is not set -# CONFIG_HNS3 is not set -# CONFIG_HNS_DSAF is not set -# CONFIG_HNS_ENET is not set -# CONFIG_HOSTAP is not set -# CONFIG_HOSTAP_CS is not set -# CONFIG_HOSTAP_PCI is not set -# CONFIG_HOSTAP_PLX is not set -# CONFIG_HOTPLUG_CPU is not set -# CONFIG_HOTPLUG_PCI is not set -# CONFIG_HP03 is not set -# CONFIG_HP100 is not set -# CONFIG_HP206C is not set -CONFIG_HPET_MMAP_DEFAULT=y -# CONFIG_HPFS_FS is not set -# CONFIG_HP_ILO is not set -# CONFIG_HP_WIRELESS is not set -# CONFIG_HSI is not set -# CONFIG_HSR is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_I2CPLD is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTS221 is not set -# CONFIG_HTU21 is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_HUGETLBFS is not set -# CONFIG_HVC_DCC is not set -# CONFIG_HVC_UDBG is not set -# CONFIG_HWLAT_TRACER is not set -# CONFIG_HWMON is not set -# CONFIG_HWMON_DEBUG_CHIP is not set -# CONFIG_HWMON_VID is not set -# CONFIG_HWSPINLOCK is not set -# CONFIG_HWSPINLOCK_OMAP is not set -CONFIG_HW_PERF_EVENTS=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HW_RANDOM_AMD is not set -# CONFIG_HW_RANDOM_ATMEL is not set -# CONFIG_HW_RANDOM_CAVIUM is not set -# CONFIG_HW_RANDOM_EXYNOS is not set -# CONFIG_HW_RANDOM_GEODE is not set -# CONFIG_HW_RANDOM_INTEL is not set -# CONFIG_HW_RANDOM_IPROC_RNG200 is not set -# CONFIG_HW_RANDOM_OMAP is not set -# CONFIG_HW_RANDOM_OMAP3_ROM is not set -# CONFIG_HW_RANDOM_PPC4XX is not set -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -CONFIG_HW_RANDOM_TPM=y -# CONFIG_HW_RANDOM_VIA is not set -# CONFIG_HW_RANDOM_VIRTIO is not set -# CONFIG_HX711 is not set -# CONFIG_HYPERV is not set -# CONFIG_HYPERV_TSCPAGE is not set -# CONFIG_HYSDN is not set -# CONFIG_HZ is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_1000 is not set -# CONFIG_HZ_1024 is not set -# CONFIG_HZ_128 is not set -# CONFIG_HZ_200 is not set -# CONFIG_HZ_24 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -# CONFIG_HZ_300 is not set -# CONFIG_HZ_48 is not set -# CONFIG_HZ_500 is not set -# CONFIG_HZ_PERIODIC is not set -# CONFIG_I2C is not set -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCA is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set -# CONFIG_I2C_AU1550 is not set -# CONFIG_I2C_BCM2835 is not set -# CONFIG_I2C_BCM_IPROC is not set -# CONFIG_I2C_CADENCE is not set -# CONFIG_I2C_CBUS_GPIO is not set -# CONFIG_I2C_CHARDEV is not set -# CONFIG_I2C_COMPAT is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEMUX_PINCTRL is not set -# CONFIG_I2C_DESIGNWARE_PCI is not set -# CONFIG_I2C_DESIGNWARE_PLATFORM is not set -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_EG20T is not set -# CONFIG_I2C_ELEKTOR is not set -# CONFIG_I2C_EMEV2 is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -# CONFIG_I2C_HELPER_AUTO is not set -# CONFIG_I2C_HID is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_IBM_IIC is not set -# CONFIG_I2C_IMG is not set -# CONFIG_I2C_ISCH is not set -# CONFIG_I2C_ISMT is not set -# CONFIG_I2C_MLXCPLD is not set -# CONFIG_I2C_MPC is not set -# CONFIG_I2C_MUX is not set -# CONFIG_I2C_MUX_GPIO is not set -# CONFIG_I2C_MUX_GPMUX is not set -# CONFIG_I2C_MUX_LTC4306 is not set -# CONFIG_I2C_MUX_MLXCPLD is not set -# CONFIG_I2C_MUX_PCA9541 is not set -# CONFIG_I2C_MUX_PCA954x is not set -# CONFIG_I2C_MUX_PINCTRL is not set -# CONFIG_I2C_MUX_REG is not set -# CONFIG_I2C_MV64XXX is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_OCTEON is not set -# CONFIG_I2C_PARPORT is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PCA_ISA is not set -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PIIX4 is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_RCAR is not set -# CONFIG_I2C_RK3X is not set -# CONFIG_I2C_ROBOTFUZZ_OSIF is not set -# CONFIG_I2C_S3C2410 is not set -# CONFIG_I2C_SCMI is not set -# CONFIG_I2C_SH_MOBILE is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_SLAVE is not set -# CONFIG_I2C_SMBUS is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_THUNDERX is not set -# CONFIG_I2C_TINY_USB is not set -# CONFIG_I2C_VERSATILE is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set -# CONFIG_I2C_XILINX is not set -# CONFIG_I40E is not set -# CONFIG_I40EVF is not set -# CONFIG_I6300ESB_WDT is not set -# CONFIG_I82092 is not set -# CONFIG_I82365 is not set -# CONFIG_IAQCORE is not set -# CONFIG_IBM_ASM is not set -# CONFIG_IBM_EMAC_DEBUG is not set -# CONFIG_IBM_EMAC_EMAC4 is not set -# CONFIG_IBM_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_EMAC_MAL_COMMON_ERR is not set -# CONFIG_IBM_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_EMAC_RGMII is not set -# CONFIG_IBM_EMAC_TAH is not set -# CONFIG_IBM_EMAC_ZMII is not set -# CONFIG_ICE is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_ICS932S401 is not set -# CONFIG_IDE is not set -# CONFIG_IDEAPAD_LAPTOP is not set -# CONFIG_IDE_GD is not set -# CONFIG_IDE_PROC_FS is not set -# CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDLE_PAGE_TRACKING is not set -# CONFIG_IEEE802154 is not set -# CONFIG_IEEE802154_ADF7242 is not set -# CONFIG_IEEE802154_ATUSB is not set -# CONFIG_IEEE802154_CA8210 is not set -# CONFIG_IEEE802154_HWSIM is not set -# CONFIG_IEEE802154_MCR20A is not set -# CONFIG_IFB is not set -# CONFIG_IGB is not set -# CONFIG_IGBVF is not set -# CONFIG_IIO is not set -# CONFIG_IIO_BUFFER_CB is not set -# CONFIG_IIO_BUFFER_HW_CONSUMER is not set -# CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 -# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_MUX is not set -# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set -# CONFIG_IIO_RESCALE is not set -# CONFIG_IIO_SIMPLE_DUMMY is not set -# CONFIG_IIO_SSP_SENSORHUB is not set -# CONFIG_IIO_ST_ACCEL_3AXIS is not set -# CONFIG_IIO_ST_GYRO_3AXIS is not set -# CONFIG_IIO_ST_LSM6DSX is not set -# CONFIG_IIO_ST_MAGN_3AXIS is not set -# CONFIG_IIO_ST_PRESS is not set -# CONFIG_IIO_SW_DEVICE is not set -# CONFIG_IIO_SW_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set -# CONFIG_IKCONFIG is not set -# CONFIG_IKCONFIG_PROC is not set -# CONFIG_IMAGE_CMDLINE_HACK is not set -# CONFIG_IMGPDC_WDT is not set -# CONFIG_IMG_MDC_DMA is not set -# CONFIG_IMX7D_ADC is not set -# CONFIG_IMX_IPUV3_CORE is not set -# CONFIG_IMX_THERMAL is not set -# CONFIG_INA2XX_ADC is not set -# CONFIG_INDIRECT_PIO is not set -CONFIG_INET=y -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_INET6_XFRM_MODE_BEET is not set -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET6_XFRM_MODE_TUNNEL is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_DIAG is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_TCP_DIAG is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INFINIBAND is not set -# CONFIG_INFTL is not set -CONFIG_INIT_ENV_ARG_LIMIT=32 -# CONFIG_INLINE_READ_LOCK is not set -# CONFIG_INLINE_READ_LOCK_BH is not set -# CONFIG_INLINE_READ_LOCK_IRQ is not set -# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set -# CONFIG_INLINE_READ_TRYLOCK is not set -CONFIG_INLINE_READ_UNLOCK=y -# CONFIG_INLINE_READ_UNLOCK_BH is not set -CONFIG_INLINE_READ_UNLOCK_IRQ=y -# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_SPIN_LOCK is not set -# CONFIG_INLINE_SPIN_LOCK_BH is not set -# CONFIG_INLINE_SPIN_LOCK_IRQ is not set -# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set -# CONFIG_INLINE_SPIN_TRYLOCK is not set -# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set -# CONFIG_INLINE_SPIN_UNLOCK_BH is not set -CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set -# CONFIG_INLINE_WRITE_LOCK is not set -# CONFIG_INLINE_WRITE_LOCK_BH is not set -# CONFIG_INLINE_WRITE_LOCK_IRQ is not set -# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set -# CONFIG_INLINE_WRITE_TRYLOCK is not set -CONFIG_INLINE_WRITE_UNLOCK=y -# CONFIG_INLINE_WRITE_UNLOCK_BH is not set -CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set -CONFIG_INOTIFY_USER=y -# CONFIG_INPUT is not set -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_APANEL is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_ATLAS_BTNS is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -# CONFIG_INPUT_AXP20X_PEK is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_CMA3000 is not set -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_EVBUG is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_GP2A is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_DECODER is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_GPIO_TILT_POLLED is not set -# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_LEDS is not set -# CONFIG_INPUT_MATRIXKMAP is not set -# CONFIG_INPUT_MAX8997_HAPTIC is not set -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_MPU3050 is not set -# CONFIG_INPUT_PALMAS_PWRBUTTON is not set -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PCSPKR is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_PWM_BEEPER is not set -# CONFIG_INPUT_PWM_VIBRA is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set -# CONFIG_INPUT_SPARSEKMAP is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_TPS65218_PWRBUTTON is not set -# CONFIG_INPUT_TWL4030_PWRBUTTON is not set -# CONFIG_INPUT_TWL4030_VIBRA is not set -# CONFIG_INPUT_TWL6040_VIBRA is not set -# CONFIG_INPUT_UINPUT is not set -# CONFIG_INPUT_WISTRON_BTNS is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INT340X_THERMAL is not set -# CONFIG_INTEL_ATOMISP2_PM is not set -# CONFIG_INTEL_CHT_INT33FE is not set -# CONFIG_INTEL_HID_EVENT is not set -# CONFIG_INTEL_IDLE is not set -# CONFIG_INTEL_IDMA64 is not set -# CONFIG_INTEL_IOATDMA is not set -# CONFIG_INTEL_ISH_HID is not set -# CONFIG_INTEL_MEI is not set -# CONFIG_INTEL_MEI_ME is not set -# CONFIG_INTEL_MEI_TXE is not set -# CONFIG_INTEL_MIC_CARD is not set -# CONFIG_INTEL_MIC_HOST is not set -# CONFIG_INTEL_MID_PTI is not set -# CONFIG_INTEL_OAKTRAIL is not set -# CONFIG_INTEL_PMC_CORE is not set -# CONFIG_INTEL_PUNIT_IPC is not set -# CONFIG_INTEL_RST is not set -# CONFIG_INTEL_SMARTCONNECT is not set -# CONFIG_INTEL_SOC_PMIC is not set -# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set -# CONFIG_INTEL_SOC_PMIC_CHTWC is not set -# CONFIG_INTEL_TH is not set -# CONFIG_INTEL_VBTN is not set -# CONFIG_INTEL_XWAY_PHY is not set -# CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_INV_MPU6050_I2C is not set -# CONFIG_INV_MPU6050_IIO is not set -# CONFIG_INV_MPU6050_SPI is not set -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_IOSCHED_BFQ is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IO_STRICT_DEVMEM=y -# CONFIG_IP17XX_PHY is not set -# CONFIG_IP6_NF_FILTER is not set -# CONFIG_IP6_NF_IPTABLES is not set -# CONFIG_IP6_NF_MANGLE is not set -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_MATCH_SRH is not set -# CONFIG_IP6_NF_NAT is not set -# CONFIG_IP6_NF_RAW is not set -# CONFIG_IP6_NF_SECURITY is not set -# CONFIG_IP6_NF_TARGET_HL is not set -# CONFIG_IP6_NF_TARGET_REJECT is not set -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -# CONFIG_IPACK_BUS is not set -# CONFIG_IPC_NS is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_IPV6 is not set -# CONFIG_IPV6_FOU is not set -# CONFIG_IPV6_FOU_TUNNEL is not set -# CONFIG_IPV6_ILA is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_ROUTE_INFO is not set -# CONFIG_IPV6_SEG6_HMAC is not set -# CONFIG_IPV6_SEG6_LWTUNNEL is not set -# CONFIG_IPV6_SIT is not set -# CONFIG_IPV6_SIT_6RD is not set -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_VTI is not set -# CONFIG_IPVLAN is not set -# CONFIG_IPW2100 is not set -# CONFIG_IPW2100_DEBUG is not set -CONFIG_IPW2100_MONITOR=y -# CONFIG_IPW2200 is not set -# CONFIG_IPW2200_DEBUG is not set -CONFIG_IPW2200_MONITOR=y -# CONFIG_IPW2200_PROMISCUOUS is not set -# CONFIG_IPW2200_QOS is not set -# CONFIG_IPW2200_RADIOTAP is not set -# CONFIG_IPWIRELESS is not set -# CONFIG_IPX is not set -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_DCCP is not set -# CONFIG_IP_FIB_TRIE_STATS is not set -# CONFIG_IP_MROUTE is not set -CONFIG_IP_MROUTE_MULTIPLE_TABLES=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_MULTIPLE_TABLES=y -# CONFIG_IP_NF_ARPFILTER is not set -# CONFIG_IP_NF_ARPTABLES is not set -# CONFIG_IP_NF_ARP_MANGLE is not set -# CONFIG_IP_NF_FILTER is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_MANGLE is not set -# CONFIG_IP_NF_MATCH_AH is not set -# CONFIG_IP_NF_MATCH_ECN is not set -# CONFIG_IP_NF_MATCH_RPFILTER is not set -# CONFIG_IP_NF_MATCH_TTL is not set -# CONFIG_IP_NF_RAW is not set -# CONFIG_IP_NF_SECURITY is not set -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_MASQUERADE is not set -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_REDIRECT is not set -# CONFIG_IP_NF_TARGET_REJECT is not set -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -# CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_PIMSM_V1 is not set -# CONFIG_IP_PIMSM_V2 is not set -# CONFIG_IP_PNP is not set -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -# CONFIG_IP_SCTP is not set -# CONFIG_IP_SET is not set -# CONFIG_IP_SET_HASH_IPMAC is not set -# CONFIG_IP_VS is not set -# CONFIG_IP_VS_MH is not set -CONFIG_IP_VS_MH_TAB_INDEX=10 -# CONFIG_IRDA is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_IRQ_ALL_CPUS is not set -# CONFIG_IRQ_DOMAIN_DEBUG is not set -# CONFIG_IRQ_POLL is not set -# CONFIG_IRQ_TIME_ACCOUNTING is not set -# CONFIG_IR_GPIO_CIR is not set -# CONFIG_IR_HIX5HD2 is not set -# CONFIG_IR_IGORPLUGUSB is not set -# CONFIG_IR_IGUANA is not set -# CONFIG_IR_IMG is not set -# CONFIG_IR_IMON is not set -# CONFIG_IR_JVC_DECODER is not set -# CONFIG_IR_LIRC_CODEC is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_NEC_DECODER is not set -# CONFIG_IR_RC5_DECODER is not set -# CONFIG_IR_RC6_DECODER is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_SONY_DECODER is not set -# CONFIG_IR_STREAMZAP is not set -# CONFIG_IR_TTUSBIR is not set -# CONFIG_ISA_BUS is not set -# CONFIG_ISA_BUS_API is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -# CONFIG_ISCSI_TCP is not set -CONFIG_ISDN=y -# CONFIG_ISDN_AUDIO is not set -# CONFIG_ISDN_CAPI is not set -# CONFIG_ISDN_CAPI_CAPIDRV is not set -# CONFIG_ISDN_DIVERSION is not set -# CONFIG_ISDN_DRV_ACT2000 is not set -# CONFIG_ISDN_DRV_GIGASET is not set -# CONFIG_ISDN_DRV_HISAX is not set -# CONFIG_ISDN_DRV_ICN is not set -# CONFIG_ISDN_DRV_LOOP is not set -# CONFIG_ISDN_DRV_PCBIT is not set -# CONFIG_ISDN_DRV_SC is not set -# CONFIG_ISDN_I4L is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_ISL29125 is not set -# CONFIG_ISL29501 is not set -# CONFIG_ISO9660_FS is not set -# CONFIG_ISS4xx is not set -# CONFIG_ITG3200 is not set -# CONFIG_IWL3945 is not set -# CONFIG_IWLWIFI is not set -# CONFIG_IXGB is not set -# CONFIG_IXGBE is not set -# CONFIG_IXGBEVF is not set -# CONFIG_JAILHOUSE_GUEST is not set -# CONFIG_JBD2_DEBUG is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -# CONFIG_JFFS2_FS_POSIX_ACL is not set -# CONFIG_JFFS2_FS_SECURITY is not set -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_FS_WRITEBUFFER=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_LZMA=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_ZLIB is not set -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_FS is not set -# CONFIG_JFS_POSIX_ACL is not set -# CONFIG_JFS_SECURITY is not set -# CONFIG_JFS_STATISTICS is not set -# CONFIG_JME is not set -CONFIG_JOLIET=y -# CONFIG_JSA1212 is not set -# CONFIG_JUMP_LABEL is not set -# CONFIG_KALLSYMS is not set -# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_KALLSYMS_UNCOMPRESSED is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_KASAN is not set -# CONFIG_KCOV is not set -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_CAT is not set -# CONFIG_KERNEL_GZIP is not set -# CONFIG_KERNEL_LZ4 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_LZO is not set -CONFIG_KERNEL_MODE_NEON=y -CONFIG_KERNEL_XZ=y -CONFIG_KERNFS=y -# CONFIG_KEXEC is not set -# CONFIG_KEXEC_FILE is not set -# CONFIG_KEYBOARD_ADC is not set -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_BCM is not set -# CONFIG_KEYBOARD_CAP11XX is not set -# CONFIG_KEYBOARD_DLINK_DIR685 is not set -# CONFIG_KEYBOARD_GPIO is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_PXA27x is not set -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_SAMSUNG is not set -# CONFIG_KEYBOARD_SH_KEYSC is not set -# CONFIG_KEYBOARD_SNVS_PWRKEY is not set -# CONFIG_KEYBOARD_STMPE is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_TEGRA is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set -# CONFIG_KEYBOARD_TWL4030 is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYS is not set -# CONFIG_KEY_DH_OPERATIONS is not set -# CONFIG_KGDB is not set -# CONFIG_KMEMCHECK is not set -# CONFIG_KMX61 is not set -# CONFIG_KPROBES is not set -# CONFIG_KPROBES_SANITY_TEST is not set -# CONFIG_KS7010 is not set -# CONFIG_KS8842 is not set -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_KSM is not set -# CONFIG_KSZ884X_PCI is not set -CONFIG_KUSER_HELPERS=y -# CONFIG_KVM_AMD is not set -# CONFIG_KVM_GUEST is not set -# CONFIG_KVM_INTEL is not set -# CONFIG_KXCJK1013 is not set -# CONFIG_KXSD9 is not set -# CONFIG_L2TP is not set -# CONFIG_L2TP_ETH is not set -# CONFIG_L2TP_IP is not set -# CONFIG_L2TP_V3 is not set -# CONFIG_LAN743X is not set -# CONFIG_LANMEDIA is not set -# CONFIG_LANTIQ is not set -# CONFIG_LAPB is not set -# CONFIG_LASAT is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_LATTICE_ECP3_CONFIG is not set -CONFIG_LBDAF=y -# CONFIG_LCD_AMS369FG06 is not set -# CONFIG_LCD_HX8357 is not set -# CONFIG_LCD_ILI922X is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LD9040 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LMS501KF03 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_OTM3225A is not set -# CONFIG_LCD_S6E63M0 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -CONFIG_LDISC_AUTOLOAD=y -# CONFIG_LDM_PARTITION is not set -CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y -# CONFIG_LEDS_APU is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_BLINKM is not set -CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y -CONFIG_LEDS_CLASS=y -# CONFIG_LEDS_CLASS_FLASH is not set -# CONFIG_LEDS_CR0014114 is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_GPIO is not set -# CONFIG_LEDS_INTEL_SS4200 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_LM3692X is not set -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP5521 is not set -# CONFIG_LEDS_LP5523 is not set -# CONFIG_LEDS_LP5562 is not set -# CONFIG_LEDS_LP8501 is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_MLXCPLD is not set -# CONFIG_LEDS_MLXREG is not set -# CONFIG_LEDS_NIC78BX is not set -# CONFIG_LEDS_NS2 is not set -# CONFIG_LEDS_OT200 is not set -# CONFIG_LEDS_PCA9532 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_PWM is not set -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_SYSCON is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_ACTIVITY is not set -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -# CONFIG_LEDS_TRIGGER_CPU is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -# CONFIG_LEDS_TRIGGER_DISK is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set -# CONFIG_LEDS_TRIGGER_MTD is not set -CONFIG_LEDS_TRIGGER_NETDEV=y -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -# CONFIG_LEDS_TRIGGER_PANIC is not set -CONFIG_LEDS_TRIGGER_TIMER=y -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_USER is not set -# CONFIG_LED_TRIGGER_PHY is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_LGUEST is not set -# CONFIG_LIB80211 is not set -# CONFIG_LIB80211_CRYPT_CCMP is not set -# CONFIG_LIB80211_CRYPT_TKIP is not set -# CONFIG_LIB80211_CRYPT_WEP is not set -# CONFIG_LIB80211_DEBUG is not set -# CONFIG_LIBCRC32C is not set -# CONFIG_LIBERTAS is not set -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_LIBERTAS_USB is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_LIBIPW_DEBUG is not set -# CONFIG_LIBNVDIMM is not set -# CONFIG_LIDAR_LITE_V2 is not set -# CONFIG_LIQUIDIO is not set -# CONFIG_LIQUIDIO_VF is not set -# CONFIG_LIS3L02DQ is not set -# CONFIG_LKDTM is not set -CONFIG_LLC=y -# CONFIG_LLC2 is not set -# CONFIG_LMP91000 is not set -# CONFIG_LNET is not set -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_LOCKD is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_LOCKD_V4=y -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_LOCK_TORTURE_TEST is not set -# CONFIG_LOGFS is not set -# CONFIG_LOGIG940_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIWHEELS_FF is not set -# CONFIG_LOGO is not set -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -# CONFIG_LOONGSON_MC146818 is not set -# CONFIG_LPC_ICH is not set -# CONFIG_LPC_SCH is not set -# CONFIG_LP_CONSOLE is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_LTC2471 is not set -# CONFIG_LTC2485 is not set -# CONFIG_LTC2497 is not set -# CONFIG_LTC2632 is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_LTPC is not set -# CONFIG_LTR501 is not set -# CONFIG_LUSTRE_FS is not set -# CONFIG_LV0104CS is not set -# CONFIG_LWTUNNEL is not set -# CONFIG_LXT_PHY is not set -# CONFIG_LZ4HC_COMPRESS is not set -# CONFIG_LZ4_COMPRESS is not set -# CONFIG_LZ4_DECOMPRESS is not set -CONFIG_LZMA_COMPRESS=y -CONFIG_LZMA_DECOMPRESS=y -# CONFIG_LZO_COMPRESS is not set -# CONFIG_LZO_DECOMPRESS is not set -# CONFIG_M62332 is not set -# CONFIG_MAC80211 is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_MACB is not set -# CONFIG_MACH_ASM9260 is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_INGENIC is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_JZ4740 is not set -# CONFIG_MACH_LOONGSON32 is not set -# CONFIG_MACH_LOONGSON64 is not set -# CONFIG_MACH_PIC32 is not set -# CONFIG_MACH_PISTACHIO is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_MACH_XILFPGA is not set -# CONFIG_MACINTOSH_DRIVERS is not set -# CONFIG_MACSEC is not set -# CONFIG_MACVLAN is not set -# CONFIG_MACVTAP is not set -# CONFIG_MAC_EMUMOUSEBTN is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MAG3110 is not set -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 -# CONFIG_MAGIC_SYSRQ_SERIAL is not set -# CONFIG_MAILBOX is not set -# CONFIG_MANAGER_SBS is not set -# CONFIG_MANDATORY_FILE_LOCKING is not set -# CONFIG_MANGLE_BOOTARGS is not set -# CONFIG_MARVELL_10G_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_MAX1027 is not set -# CONFIG_MAX11100 is not set -# CONFIG_MAX1118 is not set -# CONFIG_MAX1363 is not set -# CONFIG_MAX30100 is not set -# CONFIG_MAX30102 is not set -# CONFIG_MAX44000 is not set -# CONFIG_MAX517 is not set -# CONFIG_MAX5481 is not set -# CONFIG_MAX5487 is not set -# CONFIG_MAX5821 is not set -# CONFIG_MAX63XX_WATCHDOG is not set -# CONFIG_MAX9611 is not set -# CONFIG_MAXIM_THERMOCOUPLE is not set -CONFIG_MAY_USE_DEVLINK=y -# CONFIG_MC3230 is not set -# CONFIG_MCB is not set -# CONFIG_MCP320X is not set -# CONFIG_MCP3422 is not set -# CONFIG_MCP4018 is not set -# CONFIG_MCP4131 is not set -# CONFIG_MCP4531 is not set -# CONFIG_MCP4725 is not set -# CONFIG_MCP4922 is not set -# CONFIG_MCPM is not set -# CONFIG_MD is not set -# CONFIG_MDIO_BCM_UNIMAC is not set -# CONFIG_MDIO_BITBANG is not set -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MMIOREG is not set -# CONFIG_MDIO_DEVICE is not set -# CONFIG_MDIO_HISI_FEMAC is not set -# CONFIG_MDIO_MSCC_MIIM is not set -# CONFIG_MDIO_OCTEON is not set -# CONFIG_MDIO_THUNDER is not set -# CONFIG_MD_FAULTY is not set -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_ATTACH is not set -# CONFIG_MEDIA_CAMERA_SUPPORT is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set -# CONFIG_MEDIA_CONTROLLER is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_PCI_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_RC_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -# CONFIG_MEDIA_SUPPORT is not set -# CONFIG_MEDIA_USB_SUPPORT is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_MELLANOX_PLATFORM is not set -CONFIG_MEMBARRIER=y -# CONFIG_MEMORY is not set -# CONFIG_MEMORY_FAILURE is not set -# CONFIG_MEMSTICK is not set -# CONFIG_MEMTEST is not set -# CONFIG_MEN_A21_WDT is not set -# CONFIG_MESON_SM is not set -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_AAT2870_CORE is not set -# CONFIG_MFD_ACT8945A is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_MFD_ATMEL_FLEXCOM is not set -# CONFIG_MFD_ATMEL_HLCDC is not set -# CONFIG_MFD_AXP20X is not set -# CONFIG_MFD_AXP20X_I2C is not set -# CONFIG_MFD_BCM590XX is not set -# CONFIG_MFD_BD9571MWV is not set -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_CPCAP is not set -# CONFIG_MFD_CROS_EC is not set -# CONFIG_MFD_CS5535 is not set -# CONFIG_MFD_DA9052_I2C is not set -# CONFIG_MFD_DA9052_SPI is not set -# CONFIG_MFD_DA9055 is not set -# CONFIG_MFD_DA9062 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_DA9150 is not set -# CONFIG_MFD_DLN2 is not set -# CONFIG_MFD_EXYNOS_LPASS is not set -# CONFIG_MFD_HI6421_PMIC is not set -# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set -# CONFIG_MFD_JANZ_CMODIO is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_LP3943 is not set -# CONFIG_MFD_LP8788 is not set -# CONFIG_MFD_MADERA is not set -# CONFIG_MFD_MAX14577 is not set -# CONFIG_MFD_MAX77620 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX77843 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_MC13XXX is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_MFD_MC13XXX_SPI is not set -# CONFIG_MFD_MENF21BMC is not set -# CONFIG_MFD_MT6397 is not set -# CONFIG_MFD_OMAP_USB_HOST is not set -# CONFIG_MFD_PALMAS is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_PM8921_CORE is not set -# CONFIG_MFD_PM8XXX is not set -# CONFIG_MFD_RC5T583 is not set -# CONFIG_MFD_RDC321X is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_RK808 is not set -# CONFIG_MFD_RN5T618 is not set -# CONFIG_MFD_ROHM_BD718XX is not set -# CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RTSX_PCI is not set -# CONFIG_MFD_RTSX_USB is not set -# CONFIG_MFD_SEC_CORE is not set -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SKY81452 is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SMSC is not set -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_SYSCON is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_MFD_TIMBERDALE is not set -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_TI_LMU is not set -# CONFIG_MFD_TI_LP873X is not set -# CONFIG_MFD_TI_LP87565 is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_TPS65086 is not set -# CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TPS65218 is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TPS68470 is not set -# CONFIG_MFD_TPS80031 is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_VX855 is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_WM831X is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MG_DISK is not set -# CONFIG_MICREL_KS8995MA is not set -# CONFIG_MICREL_PHY is not set -# CONFIG_MICROCHIP_KSZ is not set -# CONFIG_MICROCHIP_PHY is not set -# CONFIG_MICROCHIP_T1_PHY is not set -# CONFIG_MICROSEMI_PHY is not set -# CONFIG_MIGRATION is not set -CONFIG_MII=y -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_MIKROTIK is not set -# CONFIG_MINIX_FS is not set -# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_MIPS_ALCHEMY is not set -# CONFIG_MIPS_CDMM is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_FPU_EMULATOR is not set -# CONFIG_MIPS_GENERIC is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_O32_FP64_SUPPORT is not set -# CONFIG_MIPS_PARAVIRT is not set -# CONFIG_MIPS_PLATFORM_DEVICES is not set -# CONFIG_MIPS_SEAD3 is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_MISC_RTSX_PCI is not set -# CONFIG_MISC_RTSX_USB is not set -# CONFIG_MISDN is not set -# CONFIG_MISDN_AVMFRITZ is not set -# CONFIG_MISDN_HFCPCI is not set -# CONFIG_MISDN_HFCUSB is not set -# CONFIG_MISDN_INFINEON is not set -# CONFIG_MISDN_NETJET is not set -# CONFIG_MISDN_SPEEDFAX is not set -# CONFIG_MISDN_W6692 is not set -# CONFIG_MKISS is not set -# CONFIG_MLX4_CORE is not set -# CONFIG_MLX4_EN is not set -# CONFIG_MLX5_CORE is not set -# CONFIG_MLX90614 is not set -# CONFIG_MLX90632 is not set -# CONFIG_MLXFW is not set -# CONFIG_MLXSW_CORE is not set -# CONFIG_MLX_CPLD_PLATFORM is not set -# CONFIG_MLX_PLATFORM is not set -# CONFIG_MMA7455_I2C is not set -# CONFIG_MMA7455_SPI is not set -# CONFIG_MMA7660 is not set -# CONFIG_MMA8452 is not set -# CONFIG_MMA9551 is not set -# CONFIG_MMA9553 is not set -# CONFIG_MMC is not set -# CONFIG_MMC35240 is not set -# CONFIG_MMC_ARMMMCI is not set -# CONFIG_MMC_AU1X is not set -# CONFIG_MMC_BLOCK is not set -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_MMC_BLOCK_MINORS=8 -# CONFIG_MMC_CAVIUM_THUNDERX is not set -# CONFIG_MMC_CB710 is not set -# CONFIG_MMC_CQHCI is not set -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_DW is not set -# CONFIG_MMC_MTK is not set -# CONFIG_MMC_MVSDIO is not set -# CONFIG_MMC_S3C is not set -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_SDHCI_ACPI is not set -# CONFIG_MMC_SDHCI_BCM_KONA is not set -# CONFIG_MMC_SDHCI_CADENCE is not set -# CONFIG_MMC_SDHCI_F_SDH30 is not set -# CONFIG_MMC_SDHCI_IPROC is not set -# CONFIG_MMC_SDHCI_MSM is not set -# CONFIG_MMC_SDHCI_OF_ARASAN is not set -# CONFIG_MMC_SDHCI_OF_AT91 is not set -# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set -# CONFIG_MMC_SDHCI_OF_ESDHC is not set -# CONFIG_MMC_SDHCI_OF_HLWD is not set -# CONFIG_MMC_SDHCI_OMAP is not set -# CONFIG_MMC_SDHCI_PXAV2 is not set -# CONFIG_MMC_SDHCI_PXAV3 is not set -# CONFIG_MMC_SDHCI_S3C is not set -# CONFIG_MMC_SDHCI_XENON is not set -# CONFIG_MMC_SDRICOH_CS is not set -# CONFIG_MMC_SPI is not set -# CONFIG_MMC_TEST is not set -# CONFIG_MMC_TOSHIBA_PCI is not set -# CONFIG_MMC_USDHI6ROL0 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MMC_VIA_SDMMC is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMIOTRACE is not set -CONFIG_MMU=y -CONFIG_MODULES=y -# CONFIG_MODULE_COMPRESS is not set -# CONFIG_MODULE_FORCE_LOAD is not set -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODULE_SIG is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_MODULE_STRIPPED=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MOST is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_ELAN_I2C is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_INPORT is not set -# CONFIG_MOUSE_LOGIBM is not set -# CONFIG_MOUSE_PC110PAD is not set -# CONFIG_MOUSE_PS2_FOCALTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_MPL115 is not set -# CONFIG_MPL115_I2C is not set -# CONFIG_MPL115_SPI is not set -# CONFIG_MPL3115 is not set -# CONFIG_MPLS is not set -# CONFIG_MPU3050_I2C is not set -# CONFIG_MQ_IOSCHED_DEADLINE is not set -# CONFIG_MQ_IOSCHED_KYBER is not set -# CONFIG_MS5611 is not set -# CONFIG_MS5637 is not set -# CONFIG_MSCC_OCELOT_SWITCH is not set -# CONFIG_MSDOS_FS is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_MSI_BITMAP_SELFTEST is not set -# CONFIG_MSI_LAPTOP is not set -CONFIG_MTD=y -# CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_MTD_BLOCK2MTD is not set -CONFIG_MTD_CFI=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_CMDLINE_PARTS is not set -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_DOCG3 is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_GPIO_ADDR is not set -# CONFIG_MTD_INTEL_VR_NOR is not set -# CONFIG_MTD_JEDECPROBE is not set -# CONFIG_MTD_LATCH_ADDR is not set -# CONFIG_MTD_LPDDR is not set -# CONFIG_MTD_LPDDR2_NVM is not set -# CONFIG_MTD_M25P80 is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -CONFIG_MTD_MAP_BANK_WIDTH_2=y -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MCHP23K256 is not set -# CONFIG_MTD_MT81xx_NOR is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_MYLOADER_PARTS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_NAND_AMS_DELTA is not set -# CONFIG_MTD_NAND_AR934X is not set -# CONFIG_MTD_NAND_AR934X_HW_ECC is not set -# CONFIG_MTD_NAND_ATMEL is not set -# CONFIG_MTD_NAND_AU1550 is not set -# CONFIG_MTD_NAND_BCH is not set -# CONFIG_MTD_NAND_BF5XX is not set -# CONFIG_MTD_NAND_BRCMNAND is not set -# CONFIG_MTD_NAND_CAFE is not set -# CONFIG_MTD_NAND_CM_X270 is not set -# CONFIG_MTD_NAND_CS553X is not set -# CONFIG_MTD_NAND_DAVINCI is not set -# CONFIG_MTD_NAND_DENALI is not set -# CONFIG_MTD_NAND_DENALI_DT is not set -# CONFIG_MTD_NAND_DENALI_PCI is not set -CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xff108018 -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_DOCG4 is not set -# CONFIG_MTD_NAND_ECC is not set -# CONFIG_MTD_NAND_ECC_BCH is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_FSL_ELBC is not set -# CONFIG_MTD_NAND_FSL_IFC is not set -# CONFIG_MTD_NAND_FSL_UPM is not set -# CONFIG_MTD_NAND_FSMC is not set -# CONFIG_MTD_NAND_GPIO is not set -# CONFIG_MTD_NAND_GPMI_NAND is not set -# CONFIG_MTD_NAND_HISI504 is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_JZ4740 is not set -# CONFIG_MTD_NAND_MPC5121_NFC is not set -# CONFIG_MTD_NAND_MTK is not set -# CONFIG_MTD_NAND_MXC is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_NDFC is not set -# CONFIG_MTD_NAND_NUC900 is not set -# CONFIG_MTD_NAND_OMAP2 is not set -# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set -# CONFIG_MTD_NAND_ORION is not set -# CONFIG_MTD_NAND_PASEMI is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_NAND_PXA3xx is not set -# CONFIG_MTD_NAND_RB4XX is not set -# CONFIG_MTD_NAND_RB750 is not set -# CONFIG_MTD_NAND_RICOH is not set -# CONFIG_MTD_NAND_S3C2410 is not set -# CONFIG_MTD_NAND_SHARPSL is not set -# CONFIG_MTD_NAND_SH_FLCTL is not set -# CONFIG_MTD_NAND_SOCRATES is not set -# CONFIG_MTD_NAND_TMIO is not set -# CONFIG_MTD_NAND_TXX9NDFMC is not set -CONFIG_MTD_OF_PARTS=y -# CONFIG_MTD_ONENAND is not set -# CONFIG_MTD_OOPS is not set -# CONFIG_MTD_OTP is not set -# CONFIG_MTD_PARTITIONED_MASTER is not set -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PCMCIA is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_PHYSMAP_COMPAT is not set -CONFIG_MTD_PHYSMAP_OF=y -# CONFIG_MTD_PHYSMAP_OF_GEMINI is not set -# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set -# CONFIG_MTD_PLATRAM is not set -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_RAM is not set -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set -# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set -# CONFIG_MTD_ROM is not set -CONFIG_MTD_ROOTFS_ROOT_DEV=y -# CONFIG_MTD_ROUTERBOOT_PARTS is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_SM_COMMON is not set -# CONFIG_MTD_SPINAND_MT29F is not set -# CONFIG_MTD_SPI_NAND is not set -# CONFIG_MTD_SPI_NOR is not set -# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096 -CONFIG_MTD_SPLIT=y -# CONFIG_MTD_SPLIT_BCM_WFI_FW is not set -# CONFIG_MTD_SPLIT_BRNIMAGE_FW is not set -# CONFIG_MTD_SPLIT_ELF_FW is not set -# CONFIG_MTD_SPLIT_EVA_FW is not set -# CONFIG_MTD_SPLIT_FIRMWARE is not set -CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware" -# CONFIG_MTD_SPLIT_FIT_FW is not set -# CONFIG_MTD_SPLIT_JIMAGE_FW is not set -# CONFIG_MTD_SPLIT_LZMA_FW is not set -# CONFIG_MTD_SPLIT_MINOR_FW is not set -# CONFIG_MTD_SPLIT_SEAMA_FW is not set -CONFIG_MTD_SPLIT_SQUASHFS_ROOT=y -CONFIG_MTD_SPLIT_SUPPORT=y -# CONFIG_MTD_SPLIT_TPLINK_FW is not set -# CONFIG_MTD_SPLIT_TRX_FW is not set -# CONFIG_MTD_SPLIT_UIMAGE_FW is not set -# CONFIG_MTD_SPLIT_WRGG_FW is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SWAP is not set -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_UBI is not set -# CONFIG_MTD_UIMAGE_SPLIT is not set -# CONFIG_MTD_VIRT_CONCAT is not set -# CONFIG_MTK_MMC is not set -CONFIG_MULTIUSER=y -# CONFIG_MUTEX_SPIN_ON_OWNER is not set -# CONFIG_MV643XX_ETH is not set -# CONFIG_MVMDIO is not set -# CONFIG_MVNETA_BM is not set -# CONFIG_MVSW61XX_PHY is not set -# CONFIG_MVSWITCH_PHY is not set -# CONFIG_MV_XOR_V2 is not set -# CONFIG_MWAVE is not set -# CONFIG_MWL8K is not set -# CONFIG_MXC4005 is not set -# CONFIG_MXC6255 is not set -# CONFIG_MYRI10GE is not set -# CONFIG_NAMESPACES is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_NATSEMI is not set -# CONFIG_NAU7802 is not set -# CONFIG_NBPFAXI_DMA is not set -# CONFIG_NCP_FS is not set -# CONFIG_NE2000 is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_NEC_MARKEINS is not set -CONFIG_NET=y -# CONFIG_NETCONSOLE is not set -CONFIG_NETDEVICES=y -# CONFIG_NETDEVSIM is not set -# CONFIG_NETFILTER is not set -# CONFIG_NETFILTER_ADVANCED is not set -# CONFIG_NETFILTER_DEBUG is not set -# CONFIG_NETFILTER_INGRESS is not set -# CONFIG_NETFILTER_NETLINK is not set -# CONFIG_NETFILTER_NETLINK_ACCT is not set -# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set -# CONFIG_NETFILTER_NETLINK_OSF is not set -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_XTABLES is not set -# CONFIG_NETFILTER_XT_CONNMARK is not set -# CONFIG_NETFILTER_XT_MARK is not set -# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set -# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -# CONFIG_NETFILTER_XT_MATCH_ECN is not set -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_HELPER is not set -# CONFIG_NETFILTER_XT_MATCH_HL is not set -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set -# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set -# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set -# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_MAC is not set -# CONFIG_NETFILTER_XT_MATCH_MARK is not set -# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -# CONFIG_NETFILTER_XT_MATCH_OWNER is not set -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_POLICY is not set -# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set -# CONFIG_NETFILTER_XT_MATCH_STATE is not set -# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set -# CONFIG_NETFILTER_XT_MATCH_STRING is not set -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -# CONFIG_NETFILTER_XT_MATCH_TIME is not set -# CONFIG_NETFILTER_XT_MATCH_U32 is not set -# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set -# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set -# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set -# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set -# CONFIG_NETFILTER_XT_TARGET_CT is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set -# CONFIG_NETFILTER_XT_TARGET_LED is not set -# CONFIG_NETFILTER_XT_TARGET_LOG is not set -# CONFIG_NETFILTER_XT_TARGET_MARK is not set -# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set -# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set -# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set -# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set -# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set -# CONFIG_NETFILTER_XT_TARGET_TRACE is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_NETLINK_MMAP is not set -# CONFIG_NETPOLL is not set -# CONFIG_NETROM is not set -CONFIG_NETWORK_FILESYSTEMS=y -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETXEN_NIC is not set -# CONFIG_NET_9P is not set -# CONFIG_NET_ACT_BPF is not set -# CONFIG_NET_ACT_CSUM is not set -# CONFIG_NET_ACT_GACT is not set -# CONFIG_NET_ACT_IFE is not set -# CONFIG_NET_ACT_IPT is not set -# CONFIG_NET_ACT_MIRRED is not set -# CONFIG_NET_ACT_NAT is not set -# CONFIG_NET_ACT_PEDIT is not set -# CONFIG_NET_ACT_POLICE is not set -# CONFIG_NET_ACT_SAMPLE is not set -# CONFIG_NET_ACT_SIMP is not set -# CONFIG_NET_ACT_SKBEDIT is not set -# CONFIG_NET_ACT_SKBMOD is not set -# CONFIG_NET_ACT_TUNNEL_KEY is not set -# CONFIG_NET_ACT_VLAN is not set -CONFIG_NET_CADENCE=y -# CONFIG_NET_CALXEDA_XGMAC is not set -CONFIG_NET_CLS=y -# CONFIG_NET_CLS_ACT is not set -# CONFIG_NET_CLS_BASIC is not set -# CONFIG_NET_CLS_BPF is not set -# CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_FLOWER is not set -# CONFIG_NET_CLS_FW is not set -CONFIG_NET_CLS_IND=y -# CONFIG_NET_CLS_MATCHALL is not set -# CONFIG_NET_CLS_ROUTE4 is not set -# CONFIG_NET_CLS_RSVP is not set -# CONFIG_NET_CLS_RSVP6 is not set -# CONFIG_NET_CLS_TCINDEX is not set -# CONFIG_NET_CLS_U32 is not set -CONFIG_NET_CORE=y -# CONFIG_NET_DEVLINK is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_NET_DSA is not set -# CONFIG_NET_DSA_BCM_SF2 is not set -# CONFIG_NET_DSA_LEGACY is not set -# CONFIG_NET_DSA_LOOP is not set -# CONFIG_NET_DSA_MT7530 is not set -# CONFIG_NET_DSA_MV88E6060 is not set -# CONFIG_NET_DSA_MV88E6123_61_65 is not set -# CONFIG_NET_DSA_MV88E6131 is not set -# CONFIG_NET_DSA_MV88E6171 is not set -# CONFIG_NET_DSA_MV88E6352 is not set -# CONFIG_NET_DSA_MV88E6XXX is not set -# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set -# CONFIG_NET_DSA_QCA8K is not set -# CONFIG_NET_DSA_REALTEK_SMI is not set -# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set -# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set -# CONFIG_NET_DSA_TAG_DSA is not set -# CONFIG_NET_DSA_TAG_EDSA is not set -# CONFIG_NET_DSA_VITESSE_VSC73XX is not set -# CONFIG_NET_EMATCH is not set -# CONFIG_NET_EMATCH_CANID is not set -# CONFIG_NET_EMATCH_CMP is not set -# CONFIG_NET_EMATCH_IPT is not set -# CONFIG_NET_EMATCH_META is not set -# CONFIG_NET_EMATCH_NBYTE is not set -CONFIG_NET_EMATCH_STACK=32 -# CONFIG_NET_EMATCH_TEXT is not set -# CONFIG_NET_EMATCH_U32 is not set -# CONFIG_NET_FAILOVER is not set -# CONFIG_NET_FC is not set -# CONFIG_NET_FOU is not set -# CONFIG_NET_FOU_IP_TUNNELS is not set -# CONFIG_NET_IFE is not set -# CONFIG_NET_IPGRE is not set -CONFIG_NET_IPGRE_BROADCAST=y -# CONFIG_NET_IPGRE_DEMUX is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPVTI is not set -# CONFIG_NET_IP_TUNNEL is not set -# CONFIG_NET_KEY is not set -# CONFIG_NET_KEY_MIGRATE is not set -# CONFIG_NET_L3_MASTER_DEV is not set -# CONFIG_NET_MPLS_GSO is not set -# CONFIG_NET_NCSI is not set -# CONFIG_NET_NSH is not set -# CONFIG_NET_PACKET_ENGINE is not set -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_NET_PTP_CLASSIFY is not set -CONFIG_NET_RX_BUSY_POLL=y -# CONFIG_NET_SB1000 is not set -CONFIG_NET_SCHED=y -# CONFIG_NET_SCH_ATM is not set -# CONFIG_NET_SCH_CAKE is not set -# CONFIG_NET_SCH_CBQ is not set -# CONFIG_NET_SCH_CBS is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_CODEL is not set -# CONFIG_NET_SCH_DEFAULT is not set -# CONFIG_NET_SCH_DRR is not set -# CONFIG_NET_SCH_DSMARK is not set -# CONFIG_NET_SCH_ETF is not set -CONFIG_NET_SCH_FIFO=y -# CONFIG_NET_SCH_FQ is not set -CONFIG_NET_SCH_FQ_CODEL=y -# CONFIG_NET_SCH_GRED is not set -# CONFIG_NET_SCH_HFSC is not set -# CONFIG_NET_SCH_HHF is not set -# CONFIG_NET_SCH_HTB is not set -# CONFIG_NET_SCH_INGRESS is not set -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_MULTIQ is not set -# CONFIG_NET_SCH_NETEM is not set -# CONFIG_NET_SCH_PIE is not set -# CONFIG_NET_SCH_PLUG is not set -# CONFIG_NET_SCH_PRIO is not set -# CONFIG_NET_SCH_QFQ is not set -# CONFIG_NET_SCH_RED is not set -# CONFIG_NET_SCH_SFB is not set -# CONFIG_NET_SCH_SFQ is not set -# CONFIG_NET_SCH_SKBPRIO is not set -# CONFIG_NET_SCH_TBF is not set -# CONFIG_NET_SCH_TEQL is not set -# CONFIG_NET_SCTPPROBE is not set -# CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_TCPPROBE is not set -# CONFIG_NET_TEAM is not set -# CONFIG_NET_TULIP is not set -# CONFIG_NET_UDP_TUNNEL is not set -CONFIG_NET_VENDOR_3COM=y -CONFIG_NET_VENDOR_8390=y -CONFIG_NET_VENDOR_ADAPTEC=y -CONFIG_NET_VENDOR_AGERE=y -CONFIG_NET_VENDOR_ALACRITECH=y -CONFIG_NET_VENDOR_ALTEON=y -CONFIG_NET_VENDOR_AMAZON=y -CONFIG_NET_VENDOR_AMD=y -CONFIG_NET_VENDOR_AQUANTIA=y -CONFIG_NET_VENDOR_ARC=y -CONFIG_NET_VENDOR_ATHEROS=y -CONFIG_NET_VENDOR_AURORA=y -CONFIG_NET_VENDOR_BROADCOM=y -CONFIG_NET_VENDOR_BROCADE=y -CONFIG_NET_VENDOR_CADENCE=y -CONFIG_NET_VENDOR_CAVIUM=y -CONFIG_NET_VENDOR_CHELSIO=y -CONFIG_NET_VENDOR_CIRRUS=y -CONFIG_NET_VENDOR_CISCO=y -CONFIG_NET_VENDOR_CORTINA=y -CONFIG_NET_VENDOR_DEC=y -CONFIG_NET_VENDOR_DLINK=y -CONFIG_NET_VENDOR_EMULEX=y -CONFIG_NET_VENDOR_EXAR=y -CONFIG_NET_VENDOR_EZCHIP=y -CONFIG_NET_VENDOR_FARADAY=y -CONFIG_NET_VENDOR_FREESCALE=y -CONFIG_NET_VENDOR_FUJITSU=y -CONFIG_NET_VENDOR_HISILICON=y -CONFIG_NET_VENDOR_HP=y -CONFIG_NET_VENDOR_HUAWEI=y -CONFIG_NET_VENDOR_I825XX=y -CONFIG_NET_VENDOR_IBM=y -CONFIG_NET_VENDOR_INTEL=y -CONFIG_NET_VENDOR_MARVELL=y -CONFIG_NET_VENDOR_MELLANOX=y -CONFIG_NET_VENDOR_MICREL=y -CONFIG_NET_VENDOR_MICROCHIP=y -CONFIG_NET_VENDOR_MICROSEMI=y -CONFIG_NET_VENDOR_MYRI=y -CONFIG_NET_VENDOR_NATSEMI=y -CONFIG_NET_VENDOR_NETERION=y -CONFIG_NET_VENDOR_NETRONOME=y -CONFIG_NET_VENDOR_NI=y -CONFIG_NET_VENDOR_NVIDIA=y -CONFIG_NET_VENDOR_OKI=y -CONFIG_NET_VENDOR_PACKET_ENGINES=y -CONFIG_NET_VENDOR_QLOGIC=y -CONFIG_NET_VENDOR_QUALCOMM=y -CONFIG_NET_VENDOR_RDC=y -CONFIG_NET_VENDOR_REALTEK=y -CONFIG_NET_VENDOR_RENESAS=y -CONFIG_NET_VENDOR_ROCKER=y -CONFIG_NET_VENDOR_SAMSUNG=y -CONFIG_NET_VENDOR_SEEQ=y -CONFIG_NET_VENDOR_SILAN=y -CONFIG_NET_VENDOR_SIS=y -CONFIG_NET_VENDOR_SMSC=y -CONFIG_NET_VENDOR_SOCIONEXT=y -CONFIG_NET_VENDOR_SOLARFLARE=y -CONFIG_NET_VENDOR_STMICRO=y -CONFIG_NET_VENDOR_SUN=y -CONFIG_NET_VENDOR_SYNOPSYS=y -CONFIG_NET_VENDOR_TEHUTI=y -CONFIG_NET_VENDOR_TI=y -CONFIG_NET_VENDOR_TOSHIBA=y -CONFIG_NET_VENDOR_VIA=y -CONFIG_NET_VENDOR_WIZNET=y -CONFIG_NET_VENDOR_XILINX=y -CONFIG_NET_VENDOR_XIRCOM=y -# CONFIG_NET_VRF is not set -# CONFIG_NET_XGENE is not set -CONFIG_NEW_LEDS=y -# CONFIG_NFC is not set -# CONFIG_NFP is not set -# CONFIG_NFSD is not set -# CONFIG_NFSD_V2_ACL is not set -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -# CONFIG_NFS_ACL_SUPPORT is not set -CONFIG_NFS_COMMON=y -# CONFIG_NFS_FS is not set -# CONFIG_NFS_FSCACHE is not set -# CONFIG_NFS_SWAP is not set -# CONFIG_NFS_V2 is not set -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_V4_1 is not set -# CONFIG_NFTL is not set -# CONFIG_NFT_BRIDGE_META is not set -# CONFIG_NFT_BRIDGE_REJECT is not set -# CONFIG_NFT_CONNLIMIT is not set -# CONFIG_NFT_DUP_IPV4 is not set -# CONFIG_NFT_DUP_IPV6 is not set -# CONFIG_NFT_FIB_IPV4 is not set -# CONFIG_NFT_FIB_IPV6 is not set -# CONFIG_NFT_FIB_NETDEV is not set -# CONFIG_NFT_FLOW_OFFLOAD is not set -# CONFIG_NFT_OBJREF is not set -# CONFIG_NFT_OSF is not set -# CONFIG_NFT_RT is not set -# CONFIG_NFT_SET_BITMAP is not set -# CONFIG_NFT_SOCKET is not set -# CONFIG_NFT_TPROXY is not set -# CONFIG_NFT_TUNNEL is not set -# CONFIG_NF_CONNTRACK is not set -# CONFIG_NF_CONNTRACK_AMANDA is not set -# CONFIG_NF_CONNTRACK_EVENTS is not set -# CONFIG_NF_CONNTRACK_FTP is not set -# CONFIG_NF_CONNTRACK_H323 is not set -# CONFIG_NF_CONNTRACK_IPV4 is not set -# CONFIG_NF_CONNTRACK_IPV6 is not set -# CONFIG_NF_CONNTRACK_IRC is not set -# CONFIG_NF_CONNTRACK_LABELS is not set -# CONFIG_NF_CONNTRACK_MARK is not set -# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set -# CONFIG_NF_CONNTRACK_PPTP is not set -CONFIG_NF_CONNTRACK_PROCFS=y -# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set -# CONFIG_NF_CONNTRACK_SANE is not set -# CONFIG_NF_CONNTRACK_SIP is not set -# CONFIG_NF_CONNTRACK_SNMP is not set -# CONFIG_NF_CONNTRACK_TFTP is not set -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CONNTRACK_ZONES is not set -# CONFIG_NF_CT_NETLINK is not set -# CONFIG_NF_CT_NETLINK_TIMEOUT is not set -# CONFIG_NF_CT_PROTO_DCCP is not set -# CONFIG_NF_CT_PROTO_GRE is not set -# CONFIG_NF_CT_PROTO_SCTP is not set -# CONFIG_NF_CT_PROTO_UDPLITE is not set -# CONFIG_NF_DEFRAG_IPV4 is not set -# CONFIG_NF_DUP_IPV4 is not set -# CONFIG_NF_DUP_IPV6 is not set -# CONFIG_NF_FLOW_TABLE is not set -# CONFIG_NF_LOG_ARP is not set -# CONFIG_NF_LOG_BRIDGE is not set -# CONFIG_NF_LOG_IPV4 is not set -# CONFIG_NF_LOG_NETDEV is not set -# CONFIG_NF_NAT is not set -# CONFIG_NF_NAT_AMANDA is not set -# CONFIG_NF_NAT_FTP is not set -# CONFIG_NF_NAT_H323 is not set -# CONFIG_NF_NAT_IPV6 is not set -# CONFIG_NF_NAT_IRC is not set -CONFIG_NF_NAT_MASQUERADE_IPV4=y -CONFIG_NF_NAT_MASQUERADE_IPV6=y -# CONFIG_NF_NAT_NEEDED is not set -# CONFIG_NF_NAT_PPTP is not set -# CONFIG_NF_NAT_PROTO_GRE is not set -# CONFIG_NF_NAT_SIP is not set -# CONFIG_NF_NAT_SNMP_BASIC is not set -# CONFIG_NF_NAT_TFTP is not set -# CONFIG_NF_REJECT_IPV4 is not set -# CONFIG_NF_REJECT_IPV6 is not set -# CONFIG_NF_SOCKET_IPV4 is not set -# CONFIG_NF_SOCKET_IPV6 is not set -# CONFIG_NF_TABLES is not set -CONFIG_NF_TABLES_ARP=y -CONFIG_NF_TABLES_BRIDGE=y -CONFIG_NF_TABLES_INET=y -CONFIG_NF_TABLES_IPV4=y -CONFIG_NF_TABLES_IPV6=y -CONFIG_NF_TABLES_NETDEV=y -# CONFIG_NF_TABLES_SET is not set -# CONFIG_NF_TPROXY_IPV4 is not set -# CONFIG_NF_TPROXY_IPV6 is not set -# CONFIG_NI65 is not set -# CONFIG_NI903X_WDT is not set -# CONFIG_NIC7018_WDT is not set -# CONFIG_NILFS2_FS is not set -# CONFIG_NIU is not set -CONFIG_NLATTR=y -# CONFIG_NLMON is not set -# CONFIG_NLM_XLP_BOARD is not set -# CONFIG_NLM_XLR_BOARD is not set -# CONFIG_NLS is not set -# CONFIG_NLS_ASCII is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -CONFIG_NMI_LOG_BUF_SHIFT=13 -# CONFIG_NOP_USB_XCEIV is not set -# CONFIG_NORTEL_HERMES is not set -# CONFIG_NOTIFIER_ERROR_INJECTION is not set -# CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT is not set -# CONFIG_NOZOMI is not set -# CONFIG_NO_BOOTMEM is not set -# CONFIG_NO_HZ is not set -# CONFIG_NO_HZ_FULL is not set -# CONFIG_NO_HZ_IDLE is not set -# CONFIG_NS83820 is not set -# CONFIG_NTB is not set -# CONFIG_NTFS_DEBUG is not set -# CONFIG_NTFS_FS is not set -# CONFIG_NTFS_RW is not set -# CONFIG_NTP_PPS is not set -# CONFIG_NVM is not set -# CONFIG_NVMEM is not set -# CONFIG_NVMEM_BCM_OCOTP is not set -# CONFIG_NVMEM_IMX_OCOTP is not set -# CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set -# CONFIG_NVRAM is not set -# CONFIG_NV_TCO is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -# CONFIG_N_GSM is not set -# CONFIG_OABI_COMPAT is not set -# CONFIG_OBS600 is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_OF_OVERLAY is not set -# CONFIG_OF_UNITTEST is not set -# CONFIG_OMAP2_DSS_DEBUG is not set -# CONFIG_OMAP2_DSS_DEBUGFS is not set -# CONFIG_OMAP2_DSS_SDI is not set -# CONFIG_OMAP_OCP2SCP is not set -# CONFIG_OMAP_USB2 is not set -# CONFIG_OMFS_FS is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_OPROFILE is not set -# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set -# CONFIG_OPT3001 is not set -CONFIG_OPTIMIZE_INLINING=y -# CONFIG_ORANGEFS_FS is not set -# CONFIG_ORION_WATCHDOG is not set -# CONFIG_OSF_PARTITION is not set -CONFIG_OVERLAY_FS=y -# CONFIG_OVERLAY_FS_INDEX is not set -# CONFIG_OVERLAY_FS_METACOPY is not set -CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y -# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set -CONFIG_OVERLAY_FS_XINO_AUTO=y -# CONFIG_OWL_LOADER is not set -# CONFIG_P54_COMMON is not set -# CONFIG_PA12203001 is not set -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_PAGE_OWNER is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_32KB is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_64KB is not set -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PALMAS_GPADC is not set -# CONFIG_PANASONIC_LAPTOP is not set -# CONFIG_PANEL is not set -CONFIG_PANIC_ON_OOPS=y -CONFIG_PANIC_ON_OOPS_VALUE=1 -CONFIG_PANIC_TIMEOUT=1 -# CONFIG_PANTHERLORD_FF is not set -# CONFIG_PARAVIRT is not set -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set -# CONFIG_PARPORT is not set -# CONFIG_PARPORT_1284 is not set -# CONFIG_PARPORT_AX88796 is not set -# CONFIG_PARPORT_GSC is not set -# CONFIG_PARPORT_PC is not set -CONFIG_PARTITION_ADVANCED=y -# CONFIG_PATA_ALI is not set -# CONFIG_PATA_AMD is not set -# CONFIG_PATA_ARASAN_CF is not set -# CONFIG_PATA_ARTOP is not set -# CONFIG_PATA_ATIIXP is not set -# CONFIG_PATA_ATP867X is not set -# CONFIG_PATA_CMD640_PCI is not set -# CONFIG_PATA_CMD64X is not set -# CONFIG_PATA_CS5520 is not set -# CONFIG_PATA_CS5530 is not set -# CONFIG_PATA_CS5535 is not set -# CONFIG_PATA_CS5536 is not set -# CONFIG_PATA_CYPRESS is not set -# CONFIG_PATA_EFAR is not set -# CONFIG_PATA_HPT366 is not set -# CONFIG_PATA_HPT37X is not set -# CONFIG_PATA_HPT3X2N is not set -# CONFIG_PATA_HPT3X3 is not set -# CONFIG_PATA_IMX is not set -# CONFIG_PATA_ISAPNP is not set -# CONFIG_PATA_IT8213 is not set -# CONFIG_PATA_IT821X is not set -# CONFIG_PATA_JMICRON is not set -# CONFIG_PATA_LEGACY is not set -# CONFIG_PATA_MARVELL is not set -# CONFIG_PATA_MPIIX is not set -# CONFIG_PATA_NETCELL is not set -# CONFIG_PATA_NINJA32 is not set -# CONFIG_PATA_NS87410 is not set -# CONFIG_PATA_NS87415 is not set -# CONFIG_PATA_OCTEON_CF is not set -# CONFIG_PATA_OF_PLATFORM is not set -# CONFIG_PATA_OLDPIIX is not set -# CONFIG_PATA_OPTI is not set -# CONFIG_PATA_OPTIDMA is not set -# CONFIG_PATA_PCMCIA is not set -# CONFIG_PATA_PDC2027X is not set -# CONFIG_PATA_PDC_OLD is not set -# CONFIG_PATA_PLATFORM is not set -# CONFIG_PATA_QDI is not set -# CONFIG_PATA_RADISYS is not set -# CONFIG_PATA_RDC is not set -# CONFIG_PATA_RZ1000 is not set -# CONFIG_PATA_SC1200 is not set -# CONFIG_PATA_SCH is not set -# CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_SIL680 is not set -# CONFIG_PATA_SIS is not set -# CONFIG_PATA_TOSHIBA is not set -# CONFIG_PATA_TRIFLEX is not set -# CONFIG_PATA_VIA is not set -# CONFIG_PATA_WINBOND is not set -# CONFIG_PATA_WINBOND_VLB is not set -# CONFIG_PC104 is not set -# CONFIG_PC300TOO is not set -# CONFIG_PCCARD is not set -# CONFIG_PCH_DMA is not set -# CONFIG_PCH_GBE is not set -# CONFIG_PCH_PHUB is not set -# CONFIG_PCI is not set -# CONFIG_PCI200SYN is not set -# CONFIG_PCIEAER_INJECT is not set -# CONFIG_PCIEASPM is not set -# CONFIG_PCIEPORTBUS is not set -# CONFIG_PCIE_ALTERA is not set -# CONFIG_PCIE_ARMADA_8K is not set -# CONFIG_PCIE_CADENCE_HOST is not set -# CONFIG_PCIE_DPC is not set -# CONFIG_PCIE_DW_PLAT is not set -# CONFIG_PCIE_DW_PLAT_HOST is not set -# CONFIG_PCIE_ECRC is not set -# CONFIG_PCIE_IPROC is not set -# CONFIG_PCIE_KIRIN is not set -# CONFIG_PCIE_PTM is not set -# CONFIG_PCIE_XILINX is not set -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_PCI_ATMEL is not set -# CONFIG_PCI_CNB20LE_QUIRK is not set -# CONFIG_PCI_DEBUG is not set -# CONFIG_PCI_DISABLE_COMMON_QUIRKS is not set -# CONFIG_PCI_ENDPOINT is not set -# CONFIG_PCI_ENDPOINT_TEST is not set -# CONFIG_PCI_FTPCI100 is not set -# CONFIG_PCI_HERMES is not set -# CONFIG_PCI_HISI is not set -# CONFIG_PCI_HOST_GENERIC is not set -# CONFIG_PCI_HOST_THUNDER_ECAM is not set -# CONFIG_PCI_HOST_THUNDER_PEM is not set -# CONFIG_PCI_IOV is not set -# CONFIG_PCI_LAYERSCAPE is not set -# CONFIG_PCI_MSI is not set -# CONFIG_PCI_PASID is not set -# CONFIG_PCI_PF_STUB is not set -# CONFIG_PCI_PRI is not set -CONFIG_PCI_QUIRKS=y -# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set -# CONFIG_PCI_STUB is not set -# CONFIG_PCI_SW_SWITCHTEC is not set -CONFIG_PCI_SYSCALL=y -# CONFIG_PCI_V3_SEMI is not set -# CONFIG_PCI_XGENE is not set -# CONFIG_PCMCIA is not set -# CONFIG_PCMCIA_3C574 is not set -# CONFIG_PCMCIA_3C589 is not set -# CONFIG_PCMCIA_AHA152X is not set -# CONFIG_PCMCIA_ATMEL is not set -# CONFIG_PCMCIA_AXNET is not set -# CONFIG_PCMCIA_DEBUG is not set -# CONFIG_PCMCIA_FDOMAIN is not set -# CONFIG_PCMCIA_FMVJ18X is not set -# CONFIG_PCMCIA_HERMES is not set -# CONFIG_PCMCIA_LOAD_CIS is not set -# CONFIG_PCMCIA_NINJA_SCSI is not set -# CONFIG_PCMCIA_NMCLAN is not set -# CONFIG_PCMCIA_PCNET is not set -# CONFIG_PCMCIA_QLOGIC is not set -# CONFIG_PCMCIA_RAYCS is not set -# CONFIG_PCMCIA_SMC91C92 is not set -# CONFIG_PCMCIA_SPECTRUM is not set -# CONFIG_PCMCIA_SYM53C500 is not set -# CONFIG_PCMCIA_WL3501 is not set -# CONFIG_PCMCIA_XIRC2PS is not set -# CONFIG_PCMCIA_XIRCOM is not set -# CONFIG_PCNET32 is not set -# CONFIG_PCSPKR_PLATFORM is not set -# CONFIG_PD6729 is not set -# CONFIG_PDA_POWER is not set -# CONFIG_PDC_ADMA is not set -# CONFIG_PERCPU_STATS is not set -# CONFIG_PERCPU_TEST is not set -# CONFIG_PERF_EVENTS is not set -# CONFIG_PERF_EVENTS_AMD_POWER is not set -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_PHANTOM is not set -# CONFIG_PHONET is not set -# CONFIG_PHYLIB is not set -# CONFIG_PHYS_ADDR_T_64BIT is not set -# CONFIG_PHY_CPCAP_USB is not set -# CONFIG_PHY_EXYNOS_DP_VIDEO is not set -# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set -# CONFIG_PHY_MAPPHONE_MDM6600 is not set -# CONFIG_PHY_PXA_28NM_HSIC is not set -# CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_QCOM_DWC3 is not set -# CONFIG_PHY_QCOM_USB_HS is not set -# CONFIG_PHY_QCOM_USB_HSIC is not set -# CONFIG_PHY_SAMSUNG_USB2 is not set -# CONFIG_PHY_TUSB1210 is not set -# CONFIG_PHY_XGENE is not set -# CONFIG_PI433 is not set -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_PID_NS is not set -CONFIG_PINCONF=y -# CONFIG_PINCTRL is not set -# CONFIG_PINCTRL_AMD is not set -# CONFIG_PINCTRL_AXP209 is not set -# CONFIG_PINCTRL_CEDARFORK is not set -# CONFIG_PINCTRL_EXYNOS is not set -# CONFIG_PINCTRL_EXYNOS5440 is not set -# CONFIG_PINCTRL_ICELAKE is not set -# CONFIG_PINCTRL_MCP23S08 is not set -# CONFIG_PINCTRL_MSM8X74 is not set -CONFIG_PINCTRL_SINGLE=y -# CONFIG_PINCTRL_SX150X is not set -CONFIG_PINMUX=y -# CONFIG_PKCS7_MESSAGE_PARSER is not set -# CONFIG_PL320_MBOX is not set -# CONFIG_PL330_DMA is not set -# CONFIG_PLATFORM_MHU is not set -# CONFIG_PLAT_SPEAR is not set -# CONFIG_PLIP is not set -CONFIG_PLUGIN_HOSTCC="" -# CONFIG_PLX_HERMES is not set -# CONFIG_PM is not set -# CONFIG_PMBUS is not set -# CONFIG_PMC_MSP is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_PM_AUTOSLEEP is not set -# CONFIG_PM_DEVFREQ is not set -# CONFIG_PM_WAKELOCKS is not set -# CONFIG_POSIX_MQUEUE is not set -CONFIG_POSIX_TIMERS=y -# CONFIG_POWERCAP is not set -# CONFIG_POWER_AVS is not set -# CONFIG_POWER_RESET is not set -# CONFIG_POWER_RESET_BRCMKONA is not set -# CONFIG_POWER_RESET_BRCMSTB is not set -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set -# CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_PIIX4_POWEROFF is not set -# CONFIG_POWER_RESET_RESTART is not set -# CONFIG_POWER_RESET_SYSCON is not set -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -# CONFIG_POWER_RESET_VERSATILE is not set -# CONFIG_POWER_RESET_XGENE is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PPC4xx_GPIO is not set -# CONFIG_PPC_16K_PAGES is not set -# CONFIG_PPC_256K_PAGES is not set -CONFIG_PPC_4K_PAGES=y -# CONFIG_PPC_64K_PAGES is not set -# CONFIG_PPC_DISABLE_WERROR is not set -# CONFIG_PPC_EMULATED_STATS is not set -# CONFIG_PPC_EPAPR_HV_BYTECHAN is not set -# CONFIG_PPP is not set -# CONFIG_PPPOATM is not set -# CONFIG_PPPOE is not set -# CONFIG_PPPOL2TP is not set -# CONFIG_PPP_ASYNC is not set -# CONFIG_PPP_BSDCOMP is not set -# CONFIG_PPP_DEFLATE is not set -CONFIG_PPP_FILTER=y -# CONFIG_PPP_MPPE is not set -CONFIG_PPP_MULTILINK=y -# CONFIG_PPP_SYNC_TTY is not set -# CONFIG_PPS is not set -# CONFIG_PPS_CLIENT_GPIO is not set -# CONFIG_PPS_CLIENT_KTIMER is not set -# CONFIG_PPS_CLIENT_LDISC is not set -# CONFIG_PPS_CLIENT_PARPORT is not set -# CONFIG_PPS_DEBUG is not set -# CONFIG_PPTP is not set -# CONFIG_PREEMPT is not set -# CONFIG_PREEMPTIRQ_DELAY_TEST is not set -# CONFIG_PREEMPTIRQ_EVENTS is not set -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 -# CONFIG_PRINTK_TIME is not set -CONFIG_PRINT_STACK_DEPTH=64 -# CONFIG_PRISM2_USB is not set -# CONFIG_PRISM54 is not set -# CONFIG_PROC_CHILDREN is not set -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -# CONFIG_PROC_PAGE_MONITOR is not set -CONFIG_PROC_STRIPPED=y -CONFIG_PROC_SYSCTL=y -# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILING is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_PROVE_RCU is not set -# CONFIG_PROVE_RCU_REPEATEDLY is not set -# CONFIG_PSAMPLE is not set -# CONFIG_PSB6970_PHY is not set -# CONFIG_PSTORE is not set -# CONFIG_PTP_1588_CLOCK is not set -# CONFIG_PTP_1588_CLOCK_IXP46X is not set -# CONFIG_PTP_1588_CLOCK_KVM is not set -# CONFIG_PTP_1588_CLOCK_PCH is not set -# CONFIG_PUBLIC_KEY_ALGO_RSA is not set -# CONFIG_PWM is not set -# CONFIG_PWM_FSL_FTM is not set -# CONFIG_PWM_PCA9685 is not set -CONFIG_PWRSEQ_EMMC=y -# CONFIG_PWRSEQ_SD8787 is not set -CONFIG_PWRSEQ_SIMPLE=y -# CONFIG_QCA7000 is not set -# CONFIG_QCA7000_SPI is not set -# CONFIG_QCA7000_UART is not set -# CONFIG_QCOM_EMAC is not set -# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set -# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set -# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set -# CONFIG_QCOM_HIDMA is not set -# CONFIG_QCOM_HIDMA_MGMT is not set -# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set -# CONFIG_QCOM_SPMI_IADC is not set -# CONFIG_QCOM_SPMI_TEMP_ALARM is not set -# CONFIG_QCOM_SPMI_VADC is not set -# CONFIG_QED is not set -# CONFIG_QLA3XXX is not set -# CONFIG_QLCNIC is not set -# CONFIG_QLGE is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_QORIQ_CPUFREQ is not set -# CONFIG_QORIQ_THERMAL is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_QUEUED_LOCK_STAT is not set -# CONFIG_QUOTA is not set -# CONFIG_QUOTACTL is not set -# CONFIG_QUOTA_DEBUG is not set -# CONFIG_R3964 is not set -# CONFIG_R6040 is not set -# CONFIG_R8169 is not set -# CONFIG_R8188EU is not set -# CONFIG_R8712U is not set -# CONFIG_R8723AU is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_RADIO_AZTECH is not set -# CONFIG_RADIO_CADET is not set -# CONFIG_RADIO_GEMTEK is not set -# CONFIG_RADIO_MAXIRADIO is not set -# CONFIG_RADIO_RTRACK is not set -# CONFIG_RADIO_RTRACK2 is not set -# CONFIG_RADIO_SF16FMI is not set -# CONFIG_RADIO_SF16FMR2 is not set -# CONFIG_RADIO_TERRATEC is not set -# CONFIG_RADIO_TRUST is not set -# CONFIG_RADIO_TYPHOON is not set -# CONFIG_RADIO_ZOLTRIX is not set -# CONFIG_RAID_ATTRS is not set -# CONFIG_RALINK is not set -# CONFIG_RANDOM32_SELFTEST is not set -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RAPIDIO is not set -# CONFIG_RAS is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_RBTREE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=60 -# CONFIG_RCU_EQS_DEBUG is not set -# CONFIG_RCU_EXPEDITE_BOOT is not set -CONFIG_RCU_EXPERT=y -CONFIG_RCU_FANOUT=32 -CONFIG_RCU_FANOUT_LEAF=16 -# CONFIG_RCU_FAST_NO_HZ is not set -CONFIG_RCU_KTHREAD_PRIO=0 -# CONFIG_RCU_NOCB_CPU is not set -# CONFIG_RCU_PERF_TEST is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3 -# CONFIG_RCU_TRACE is not set -# CONFIG_RC_ATI_REMOTE is not set -# CONFIG_RC_CORE is not set -# CONFIG_RC_DECODERS is not set -# CONFIG_RC_LOOPBACK is not set -# CONFIG_RC_MAP is not set -# CONFIG_RDS is not set -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_GZIP is not set -# CONFIG_RD_LZ4 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_XZ is not set -# CONFIG_READABLE_ASM is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_REDWOOD is not set -# CONFIG_REFCOUNT_FULL is not set -# CONFIG_REGMAP is not set -# CONFIG_REGMAP_I2C is not set -# CONFIG_REGMAP_MMIO is not set -# CONFIG_REGMAP_SPI is not set -# CONFIG_REGULATOR is not set -# CONFIG_REGULATOR_88PG86X is not set -# CONFIG_REGULATOR_ACT8865 is not set -# CONFIG_REGULATOR_AD5398 is not set -# CONFIG_REGULATOR_ANATOP is not set -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_DA9211 is not set -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FAN53555 is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_GPIO is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_ISL9305 is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_LTC3589 is not set -# CONFIG_REGULATOR_LTC3676 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set -# CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PFUZE100 is not set -# CONFIG_REGULATOR_PV88060 is not set -# CONFIG_REGULATOR_PV88080 is not set -# CONFIG_REGULATOR_PV88090 is not set -# CONFIG_REGULATOR_PWM is not set -# CONFIG_REGULATOR_SY8106A is not set -# CONFIG_REGULATOR_TI_ABB is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set -# CONFIG_REGULATOR_TPS65132 is not set -# CONFIG_REGULATOR_TPS6524X is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_VCTRL is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_REISERFS_FS_POSIX_ACL is not set -# CONFIG_REISERFS_FS_SECURITY is not set -# CONFIG_REISERFS_FS_XATTR is not set -# CONFIG_REISERFS_PROC_INFO is not set -# CONFIG_RELAY is not set -# CONFIG_RELOCATABLE is not set -# CONFIG_REMOTEPROC is not set -# CONFIG_RENESAS_PHY is not set -# CONFIG_RESET_ATH79 is not set -# CONFIG_RESET_BERLIN is not set -# CONFIG_RESET_CONTROLLER is not set -# CONFIG_RESET_IMX7 is not set -# CONFIG_RESET_LANTIQ is not set -# CONFIG_RESET_LPC18XX is not set -# CONFIG_RESET_MESON is not set -# CONFIG_RESET_PISTACHIO is not set -# CONFIG_RESET_SOCFPGA is not set -# CONFIG_RESET_STM32 is not set -# CONFIG_RESET_SUNXI is not set -# CONFIG_RESET_TEGRA_BPMP is not set -# CONFIG_RESET_TI_SYSCON is not set -# CONFIG_RESET_ZYNQ is not set -# CONFIG_RFD77402 is not set -# CONFIG_RFD_FTL is not set -CONFIG_RFKILL=y -# CONFIG_RFKILL_FULL is not set -# CONFIG_RFKILL_GPIO is not set -# CONFIG_RFKILL_INPUT is not set -# CONFIG_RFKILL_LEDS is not set -# CONFIG_RFKILL_REGULATOR is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_RING_BUFFER_STARTUP_TEST is not set -# CONFIG_RMI4_CORE is not set -# CONFIG_RMNET is not set -# CONFIG_ROCKCHIP_PHY is not set -# CONFIG_ROCKER is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_ROSE is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPMSG_QCOM_GLINK_RPM is not set -# CONFIG_RPMSG_VIRTIO is not set -# CONFIG_RPR0521 is not set -# CONFIG_RSEQ is not set -# CONFIG_RT2X00 is not set -# CONFIG_RTC_CLASS is not set -# CONFIG_RTC_DEBUG is not set -# CONFIG_RTC_DRV_ABB5ZES3 is not set -# CONFIG_RTC_DRV_ABX80X is not set -# CONFIG_RTC_DRV_ARMADA38X is not set -# CONFIG_RTC_DRV_AU1XXX is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_BQ4802 is not set -CONFIG_RTC_DRV_CMOS=y -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1302 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1307_CENTURY is not set -# CONFIG_RTC_DRV_DS1307_HWMON is not set -# CONFIG_RTC_DRV_DS1343 is not set -# CONFIG_RTC_DRV_DS1347 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS1685_FAMILY is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_DS2404 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_EP93XX is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_FTRTC010 is not set -# CONFIG_RTC_DRV_GENERIC is not set -# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set -# CONFIG_RTC_DRV_HYM8563 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_ISL12026 is not set -# CONFIG_RTC_DRV_ISL12057 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_M41T93 is not set -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_MAX6916 is not set -# CONFIG_RTC_DRV_MCP795 is not set -# CONFIG_RTC_DRV_MOXART is not set -# CONFIG_RTC_DRV_MPC5121 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_OMAP is not set -# CONFIG_RTC_DRV_PCF2123 is not set -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_PCF85063 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF85363 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_PL030 is not set -# CONFIG_RTC_DRV_PL031 is not set -# CONFIG_RTC_DRV_PS3 is not set -# CONFIG_RTC_DRV_PT7C4338 is not set -# CONFIG_RTC_DRV_R7301 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_RTC7301 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set -# CONFIG_RTC_DRV_RV8803 is not set -# CONFIG_RTC_DRV_RX4581 is not set -# CONFIG_RTC_DRV_RX6110 is not set -# CONFIG_RTC_DRV_RX8010 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_SNVS is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_SUN6I is not set -# CONFIG_RTC_DRV_TEST is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_XGENE is not set -# CONFIG_RTC_DRV_ZYNQMP is not set -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_LIB=y -# CONFIG_RTC_NVMEM is not set -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_SYSTOHC_DEVICE="rtc0" -# CONFIG_RTL8180 is not set -# CONFIG_RTL8187 is not set -# CONFIG_RTL8192E is not set -# CONFIG_RTL8192U is not set -# CONFIG_RTL8306_PHY is not set -# CONFIG_RTL8366RB_PHY is not set -# CONFIG_RTL8366S_PHY is not set -# CONFIG_RTL8366_SMI is not set -# CONFIG_RTL8366_SMI_DEBUG_FS is not set -# CONFIG_RTL8367B_PHY is not set -# CONFIG_RTL8367_PHY is not set -# CONFIG_RTLLIB is not set -# CONFIG_RTL_CARDS is not set -# CONFIG_RTS5208 is not set -CONFIG_RT_MUTEXES=y -# CONFIG_RUNTIME_DEBUG is not set -CONFIG_RUNTIME_TESTING_MENU=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_RXKAD=y -# CONFIG_S2IO is not set -# CONFIG_SAMPLES is not set -# CONFIG_SAMSUNG_LAPTOP is not set -# CONFIG_SATA_ACARD_AHCI is not set -# CONFIG_SATA_AHCI is not set -# CONFIG_SATA_AHCI_PLATFORM is not set -# CONFIG_SATA_DWC is not set -# CONFIG_SATA_FSL is not set -# CONFIG_SATA_HIGHBANK is not set -# CONFIG_SATA_INIC162X is not set -CONFIG_SATA_MOBILE_LPM_POLICY=0 -# CONFIG_SATA_MV is not set -# CONFIG_SATA_NV is not set -# CONFIG_SATA_PMP is not set -# CONFIG_SATA_PROMISE is not set -# CONFIG_SATA_QSTOR is not set -# CONFIG_SATA_RCAR is not set -# CONFIG_SATA_SIL is not set -# CONFIG_SATA_SIL24 is not set -# CONFIG_SATA_SIS is not set -# CONFIG_SATA_SVW is not set -# CONFIG_SATA_SX4 is not set -# CONFIG_SATA_ULI is not set -# CONFIG_SATA_VIA is not set -# CONFIG_SATA_VITESSE is not set -# CONFIG_SBC_FITPC2_WATCHDOG is not set -CONFIG_SBITMAP=y -# CONFIG_SC92031 is not set -# CONFIG_SCA3000 is not set -# CONFIG_SCACHE_DEBUGFS is not set -# CONFIG_SCC is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_SCHED_AUTOGROUP is not set -# CONFIG_SCHED_DEBUG is not set -CONFIG_SCHED_HRTICK=y -# CONFIG_SCHED_MC is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCHED_SMT is not set -# CONFIG_SCHED_STACK_END_CHECK is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_SCR24X is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_3W_SAS is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_AM53C974 is not set -# CONFIG_SCSI_ARCMSR is not set -# CONFIG_SCSI_BFA_FC is not set -# CONFIG_SCSI_BNX2X_FCOE is not set -# CONFIG_SCSI_BNX2_ISCSI is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CHELSIO_FCOE is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_CXGB3_ISCSI is not set -# CONFIG_SCSI_CXGB4_ISCSI is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_ESAS2R is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set -# CONFIG_SCSI_HISI_SAS is not set -# CONFIG_SCSI_HPSA is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_ISCI is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_LOGGING is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set -# CONFIG_SCSI_LPFC is not set -CONFIG_SCSI_MOD=y -# CONFIG_SCSI_MPT2SAS is not set -# CONFIG_SCSI_MPT3SAS is not set -# CONFIG_SCSI_MQ_DEFAULT is not set -# CONFIG_SCSI_MVSAS is not set -# CONFIG_SCSI_MVSAS_DEBUG is not set -# CONFIG_SCSI_MVUMI is not set -# CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PM8001 is not set -# CONFIG_SCSI_PMCRAID is not set -CONFIG_SCSI_PROC_FS=y -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -# CONFIG_SCSI_SMARTPQI is not set -# CONFIG_SCSI_SNIC is not set -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -# CONFIG_SCSI_STEX is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_UFSHCD is not set -# CONFIG_SCSI_ULTRASTOR is not set -# CONFIG_SCSI_VIRTIO is not set -# CONFIG_SCSI_WD719X is not set -# CONFIG_SCx200_ACB is not set -# CONFIG_SDIO_UART is not set -# CONFIG_SD_ADC_MODULATOR is not set -# CONFIG_SECCOMP is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -CONFIG_SECURITY_DMESG_RESTRICT=y -CONFIG_SELECT_MEMORY_MODEL=y -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_ABITUGURU3 is not set -# CONFIG_SENSORS_ACPI_POWER is not set -# CONFIG_SENSORS_AD7314 is not set -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM1275 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_ADS7871 is not set -# CONFIG_SENSORS_ADT7310 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_SENSORS_APPLESMC is not set -# CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_ASPEED is not set -# CONFIG_SENSORS_ATK0110 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_BH1780 is not set -# CONFIG_SENSORS_CORETEMP is not set -# CONFIG_SENSORS_DELL_SMM is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FAM15H_POWER is not set -# CONFIG_SENSORS_FSCHMD is not set -# CONFIG_SENSORS_FTSTEUTATES is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_GSC is not set -# CONFIG_SENSORS_HDAPS is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_HMC5843 is not set -# CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_HMC5843_SPI is not set -# CONFIG_SENSORS_HTU21 is not set -# CONFIG_SENSORS_I5500 is not set -# CONFIG_SENSORS_I5K_AMB is not set -# CONFIG_SENSORS_IBM_CFFPS is not set -# CONFIG_SENSORS_IIO_HWMON is not set -# CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA2XX is not set -# CONFIG_SENSORS_INA3221 is not set -# CONFIG_SENSORS_IR35221 is not set -# CONFIG_SENSORS_ISL29018 is not set -# CONFIG_SENSORS_ISL29028 is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_K10TEMP is not set -# CONFIG_SENSORS_K8TEMP is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LIS3LV02D is not set -# CONFIG_SENSORS_LIS3_I2C is not set -# CONFIG_SENSORS_LIS3_SPI is not set -# CONFIG_SENSORS_LM25066 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_LTC2945 is not set -# CONFIG_SENSORS_LTC2978 is not set -# CONFIG_SENSORS_LTC2990 is not set -# CONFIG_SENSORS_LTC3815 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4222 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4260 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX16064 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX20751 is not set -# CONFIG_SENSORS_MAX31722 is not set -# CONFIG_SENSORS_MAX31785 is not set -# CONFIG_SENSORS_MAX31790 is not set -# CONFIG_SENSORS_MAX34440 is not set -# CONFIG_SENSORS_MAX6621 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MAX8688 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_NCT6683 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NCT7802 is not set -# CONFIG_SENSORS_NCT7904 is not set -# CONFIG_SENSORS_NPCM7XX is not set -# CONFIG_SENSORS_NSA320 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_PMBUS is not set -# CONFIG_SENSORS_POWR1220 is not set -# CONFIG_SENSORS_PWM_FAN is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_SCH56XX_COMMON is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SHT3x is not set -# CONFIG_SENSORS_SHTC1 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_TC654 is not set -# CONFIG_SENSORS_TC74 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP103 is not set -# CONFIG_SENSORS_TMP108 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_TPS40422 is not set -# CONFIG_SENSORS_TPS53679 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_TSL2563 is not set -# CONFIG_SENSORS_UCD9000 is not set -# CONFIG_SENSORS_UCD9200 is not set -# CONFIG_SENSORS_VEXPRESS is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_VIA_CPUTEMP is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_VT8231 is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83773G is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_XGENE is not set -# CONFIG_SENSORS_ZL6100 is not set -CONFIG_SERIAL_8250=y -# CONFIG_SERIAL_8250_ACCENT is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set -# CONFIG_SERIAL_8250_BOCA is not set -CONFIG_SERIAL_8250_CONSOLE=y -# CONFIG_SERIAL_8250_CS is not set -# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -CONFIG_SERIAL_8250_DMA=y -# CONFIG_SERIAL_8250_DW is not set -# CONFIG_SERIAL_8250_EM is not set -# CONFIG_SERIAL_8250_EXAR is not set -# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SERIAL_8250_FINTEK is not set -# CONFIG_SERIAL_8250_FOURPORT is not set -# CONFIG_SERIAL_8250_HUB6 is not set -# CONFIG_SERIAL_8250_INGENIC is not set -# CONFIG_SERIAL_8250_LPSS is not set -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_MID is not set -# CONFIG_SERIAL_8250_MOXA is not set -CONFIG_SERIAL_8250_NR_UARTS=2 -# CONFIG_SERIAL_8250_PCI is not set -# CONFIG_SERIAL_8250_RSA is not set -# CONFIG_SERIAL_8250_RT288X is not set -CONFIG_SERIAL_8250_RUNTIME_UARTS=2 -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_AMBA_PL010 is not set -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_BCM63XX is not set -# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_DEV_BUS is not set -CONFIG_SERIAL_EARLYCON=y -# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set -# CONFIG_SERIAL_IFX6X60 is not set -# CONFIG_SERIAL_JSM is not set -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX310X is not set -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_SERIAL_OF_PLATFORM is not set -# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set -# CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_RP2 is not set -# CONFIG_SERIAL_SC16IS7XX is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_SH_SCI is not set -# CONFIG_SERIAL_STM32 is not set -# CONFIG_SERIAL_ST_ASC is not set -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_UARTLITE is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set -# CONFIG_SERIO is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_GPIO_PS2 is not set -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_PARKBD is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_SUN4I_PS2 is not set -# CONFIG_SFC is not set -# CONFIG_SFC_FALCON is not set -# CONFIG_SFI is not set -# CONFIG_SFP is not set -# CONFIG_SGETMASK_SYSCALL is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_SG_POOL is not set -# CONFIG_SG_SPLIT is not set -CONFIG_SHMEM=y -# CONFIG_SH_ETH is not set -# CONFIG_SH_TIMER_CMT is not set -# CONFIG_SH_TIMER_MTU2 is not set -# CONFIG_SH_TIMER_TMU is not set -# CONFIG_SI1133 is not set -# CONFIG_SI1145 is not set -# CONFIG_SI7005 is not set -# CONFIG_SI7020 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -CONFIG_SIGNALFD=y -# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set -# CONFIG_SIMPLE_GPIO is not set -# CONFIG_SIMPLE_PM_BUS is not set -# CONFIG_SIOX is not set -# CONFIG_SIS190 is not set -# CONFIG_SIS900 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SKY2_DEBUG is not set -# CONFIG_SLAB is not set -CONFIG_SLABINFO=y -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SLAB_FREELIST_RANDOM is not set -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLHC is not set -# CONFIG_SLICOSS is not set -# CONFIG_SLIMBUS is not set -# CONFIG_SLIP is not set -# CONFIG_SLOB is not set -CONFIG_SLUB=y -CONFIG_SLUB_CPU_PARTIAL=y -# CONFIG_SLUB_DEBUG is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_MEMCG_SYSFS_ON is not set -# CONFIG_SLUB_STATS is not set -# CONFIG_SMARTJOYPLUS_FF is not set -# CONFIG_SMC911X is not set -# CONFIG_SMC9194 is not set -# CONFIG_SMC91X is not set -# CONFIG_SMP is not set -# CONFIG_SMSC911X is not set -# CONFIG_SMSC9420 is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_SM_FTL is not set -# CONFIG_SND is not set -# CONFIG_SND_AC97_POWER_SAVE is not set -# CONFIG_SND_AD1816A is not set -# CONFIG_SND_AD1848 is not set -# CONFIG_SND_AD1889 is not set -# CONFIG_SND_ADLIB is not set -# CONFIG_SND_ALI5451 is not set -# CONFIG_SND_ALOOP is not set -# CONFIG_SND_ALS100 is not set -# CONFIG_SND_ALS300 is not set -# CONFIG_SND_ALS4000 is not set -# CONFIG_SND_ARM is not set -# CONFIG_SND_ASIHPI is not set -# CONFIG_SND_ATIIXP is not set -# CONFIG_SND_ATIIXP_MODEM is not set -# CONFIG_SND_ATMEL_AC97C is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_AU8810 is not set -# CONFIG_SND_AU8820 is not set -# CONFIG_SND_AU8830 is not set -# CONFIG_SND_AUDIO_GRAPH_CARD is not set -# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set -# CONFIG_SND_AW2 is not set -# CONFIG_SND_AZT2320 is not set -# CONFIG_SND_AZT3328 is not set -# CONFIG_SND_BCD2000 is not set -# CONFIG_SND_BT87X is not set -# CONFIG_SND_CA0106 is not set -# CONFIG_SND_CMI8330 is not set -# CONFIG_SND_CMIPCI is not set -# CONFIG_SND_CS4231 is not set -# CONFIG_SND_CS4236 is not set -# CONFIG_SND_CS4281 is not set -# CONFIG_SND_CS46XX is not set -# CONFIG_SND_CS5530 is not set -# CONFIG_SND_CS5535AUDIO is not set -# CONFIG_SND_CTXFI is not set -# CONFIG_SND_DARLA20 is not set -# CONFIG_SND_DARLA24 is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_DESIGNWARE_I2S is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -# CONFIG_SND_ECHO3G is not set -# CONFIG_SND_EDMA_SOC is not set -# CONFIG_SND_EMU10K1 is not set -# CONFIG_SND_EMU10K1X is not set -# CONFIG_SND_EMU10K1_SEQ is not set -# CONFIG_SND_ENS1370 is not set -# CONFIG_SND_ENS1371 is not set -# CONFIG_SND_ES1688 is not set -# CONFIG_SND_ES18XX is not set -# CONFIG_SND_ES1938 is not set -# CONFIG_SND_ES1968 is not set -# CONFIG_SND_FIREWIRE is not set -# CONFIG_SND_FM801 is not set -# CONFIG_SND_GINA20 is not set -# CONFIG_SND_GINA24 is not set -# CONFIG_SND_GUSCLASSIC is not set -# CONFIG_SND_GUSEXTREME is not set -# CONFIG_SND_GUSMAX is not set -# CONFIG_SND_HDA_INTEL is not set -CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 -CONFIG_SND_HDA_PREALLOC_SIZE=64 -# CONFIG_SND_HDSP is not set -# CONFIG_SND_HDSPM is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_HWDEP is not set -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_ICE1712 is not set -# CONFIG_SND_ICE1724 is not set -# CONFIG_SND_INDIGO is not set -# CONFIG_SND_INDIGODJ is not set -# CONFIG_SND_INDIGODJX is not set -# CONFIG_SND_INDIGOIO is not set -# CONFIG_SND_INDIGOIOX is not set -# CONFIG_SND_INTEL8X0 is not set -# CONFIG_SND_INTEL8X0M is not set -# CONFIG_SND_INTERWAVE is not set -# CONFIG_SND_INTERWAVE_STB is not set -# CONFIG_SND_ISA is not set -# CONFIG_SND_KIRKWOOD_SOC is not set -# CONFIG_SND_KORG1212 is not set -# CONFIG_SND_LAYLA20 is not set -# CONFIG_SND_LAYLA24 is not set -# CONFIG_SND_LOLA is not set -# CONFIG_SND_LX6464ES is not set -# CONFIG_SND_MAESTRO3 is not set -CONFIG_SND_MAX_CARDS=16 -# CONFIG_SND_MIA is not set -# CONFIG_SND_MIPS is not set -# CONFIG_SND_MIRO is not set -# CONFIG_SND_MIXART is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_MONA is not set -# CONFIG_SND_MPC52xx_SOC_EFIKA is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_MTS64 is not set -# CONFIG_SND_MXS_SOC is not set -# CONFIG_SND_NM256 is not set -# CONFIG_SND_OPL3SA2 is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_OPTI92X_AD1848 is not set -# CONFIG_SND_OPTI92X_CS4231 is not set -# CONFIG_SND_OPTI93X is not set -CONFIG_SND_OSSEMUL=y -# CONFIG_SND_OXYGEN is not set -CONFIG_SND_PCI=y -# CONFIG_SND_PCM is not set -# CONFIG_SND_PCMCIA is not set -# CONFIG_SND_PCM_OSS is not set -CONFIG_SND_PCM_OSS_PLUGINS=y -# CONFIG_SND_PCM_TIMER is not set -# CONFIG_SND_PCM_XRUN_DEBUG is not set -# CONFIG_SND_PCXHR is not set -# CONFIG_SND_PDAUDIOCF is not set -# CONFIG_SND_PORTMAN2X4 is not set -# CONFIG_SND_POWERPC_SOC is not set -# CONFIG_SND_PPC is not set -CONFIG_SND_PROC_FS=y -# CONFIG_SND_RAWMIDI is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_RIPTIDE is not set -# CONFIG_SND_RME32 is not set -# CONFIG_SND_RME96 is not set -# CONFIG_SND_RME9652 is not set -# CONFIG_SND_RTCTIMER is not set -# CONFIG_SND_SB16 is not set -# CONFIG_SND_SB8 is not set -# CONFIG_SND_SBAWE is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_SE6X is not set -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_SIMPLE_CARD is not set -# CONFIG_SND_SIMPLE_SCU_CARD is not set -# CONFIG_SND_SIS7019 is not set -# CONFIG_SND_SOC is not set -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU1761_SPI is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_AK4104 is not set -# CONFIG_SND_SOC_AK4458 is not set -# CONFIG_SND_SOC_AK4554 is not set -# CONFIG_SND_SOC_AK4613 is not set -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_AK5558 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_SOC_AU1XAUDIO is not set -# CONFIG_SND_SOC_AU1XPSC is not set -# CONFIG_SND_SOC_BD28623 is not set -# CONFIG_SND_SOC_BT_SCO is not set -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS4271_SPI is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_DIO2125 is not set -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES7241 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_ES8328_SPI is not set -# CONFIG_SND_SOC_EUKREA_TLV320 is not set -# CONFIG_SND_SOC_FSL_ASOC_CARD is not set -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_ICS43432 is not set -# CONFIG_SND_SOC_IMG is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# CONFIG_SND_SOC_IMX_ES8328 is not set -# CONFIG_SND_SOC_IMX_SPDIF is not set -# CONFIG_SND_SOC_IMX_WM8962 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -# CONFIG_SND_SOC_INTEL_BAYTRAIL is not set -# CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH is not set -# CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set -# CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set -# CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH is not set -# CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH is not set -# CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH is not set -# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH is not set -# CONFIG_SND_SOC_INTEL_HASWELL is not set -# CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH is not set -# CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH is not set -# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH is not set -# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH is not set -# CONFIG_SND_SOC_INTEL_SKL_RT286_MACH is not set -# CONFIG_SND_SOC_INTEL_SKYLAKE is not set -# CONFIG_SND_SOC_INTEL_SST is not set -CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y -# CONFIG_SND_SOC_MAX9759 is not set -# CONFIG_SND_SOC_MAX98373 is not set -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX9860 is not set -# CONFIG_SND_SOC_MAX9867 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MEDIATEK is not set -# CONFIG_SND_SOC_MPC5200_AC97 is not set -# CONFIG_SND_SOC_MPC5200_I2S is not set -# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set -# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set -# CONFIG_SND_SOC_MT2701 is not set -# CONFIG_SND_SOC_MT6351 is not set -# CONFIG_SND_SOC_MT8173 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1789_I2C is not set -# CONFIG_SND_SOC_PCM1792A is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM179X_SPI is not set -# CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM186X_SPI is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM3168A_SPI is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_PCM512x_SPI is not set -# CONFIG_SND_SOC_QCOM is not set -# CONFIG_SND_SOC_RT5616 is not set -# CONFIG_SND_SOC_RT5631 is not set -# CONFIG_SND_SOC_RT5677_SPI is not set -# CONFIG_SND_SOC_SGTL5000 is not set -# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -# CONFIG_SND_SOC_SPDIF is not set -# CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM2602_SPI is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TAS6424 is not set -# CONFIG_SND_SOC_TDA7419 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC23_SPI is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_TSCS42XX is not set -# CONFIG_SND_SOC_TSCS454 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8770 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8782 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8804_SPI is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SONICVIBES is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_SSCAPE is not set -# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI is not set -# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set -# CONFIG_SND_SUN4I_CODEC is not set -# CONFIG_SND_SUPPORT_OLD_API is not set -# CONFIG_SND_TIMER is not set -# CONFIG_SND_TRIDENT is not set -CONFIG_SND_USB=y -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_AUDIO is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_USB_POD is not set -# CONFIG_SND_USB_PODHD is not set -# CONFIG_SND_USB_TONEPORT is not set -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_US122L is not set -# CONFIG_SND_USB_USX2Y is not set -# CONFIG_SND_USB_VARIAX is not set -# CONFIG_SND_VERBOSE_PRINTK is not set -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VIA82XX is not set -# CONFIG_SND_VIA82XX_MODEM is not set -# CONFIG_SND_VIRTUOSO is not set -# CONFIG_SND_VX222 is not set -# CONFIG_SND_VXPOCKET is not set -# CONFIG_SND_WAVEFRONT is not set -CONFIG_SND_X86=y -# CONFIG_SND_XEN_FRONTEND is not set -# CONFIG_SND_YMFPCI is not set -# CONFIG_SNI_RM is not set -# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set -# CONFIG_SOCK_CGROUP_DATA is not set -# CONFIG_SOC_AM33XX is not set -# CONFIG_SOC_AM43XX is not set -# CONFIG_SOC_BRCMSTB is not set -# CONFIG_SOC_CAMERA is not set -# CONFIG_SOC_DRA7XX is not set -# CONFIG_SOC_HAS_OMAP2_SDRC is not set -# CONFIG_SOC_OMAP5 is not set -# CONFIG_SOC_TI is not set -# CONFIG_SOFTLOCKUP_DETECTOR is not set -# CONFIG_SOFT_WATCHDOG is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_SONYPI is not set -# CONFIG_SONY_LAPTOP is not set -# CONFIG_SOUND is not set -# CONFIG_SOUNDWIRE is not set -# CONFIG_SOUND_OSS_CORE is not set -# CONFIG_SOUND_PRIME is not set -# CONFIG_SP5100_TCO is not set -# CONFIG_SPARSEMEM_MANUAL is not set -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -# CONFIG_SPARSE_IRQ is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_SPEAKUP is not set -# CONFIG_SPI is not set -# CONFIG_SPINLOCK_TEST is not set -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_AU1550 is not set -# CONFIG_SPI_AXI_SPI_ENGINE is not set -# CONFIG_SPI_BCM2835 is not set -# CONFIG_SPI_BCM_QSPI is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_BUTTERFLY is not set -# CONFIG_SPI_CADENCE is not set -# CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_DEBUG is not set -# CONFIG_SPI_DESIGNWARE is not set -# CONFIG_SPI_FSL_DSPI is not set -# CONFIG_SPI_FSL_ESPI is not set -# CONFIG_SPI_FSL_SPI is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_GPIO_OLD is not set -# CONFIG_SPI_IMG_SPFI is not set -# CONFIG_SPI_LM70_LLP is not set -# CONFIG_SPI_LOOPBACK_TEST is not set -# CONFIG_SPI_MASTER is not set -# CONFIG_SPI_MEM is not set -# CONFIG_SPI_MPC52xx is not set -# CONFIG_SPI_MPC52xx_PSC is not set -# CONFIG_SPI_OCTEON is not set -# CONFIG_SPI_OC_TINY is not set -# CONFIG_SPI_ORION is not set -# CONFIG_SPI_PL022 is not set -# CONFIG_SPI_PPC4xx is not set -# CONFIG_SPI_PXA2XX is not set -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_ROCKCHIP is not set -# CONFIG_SPI_S3C64XX is not set -# CONFIG_SPI_SC18IS602 is not set -# CONFIG_SPI_SLAVE is not set -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_THUNDERX is not set -# CONFIG_SPI_TI_QSPI is not set -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_SPI_TOPCLIFF_PCH is not set -# CONFIG_SPI_XCOMM is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_XWAY is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_SPMI is not set -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -# CONFIG_SQUASHFS_DECOMP_SINGLE is not set -CONFIG_SQUASHFS_EMBEDDED=y -# CONFIG_SQUASHFS_FILE_CACHE is not set -CONFIG_SQUASHFS_FILE_DIRECT=y -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_SQUASHFS_LZ4 is not set -# CONFIG_SQUASHFS_LZO is not set -# CONFIG_SQUASHFS_XATTR is not set -CONFIG_SQUASHFS_XZ=y -# CONFIG_SQUASHFS_ZLIB is not set -# CONFIG_SQUASHFS_ZSTD is not set -# CONFIG_SRAM is not set -# CONFIG_SRF04 is not set -# CONFIG_SRF08 is not set -# CONFIG_SSB is not set -# CONFIG_SSB_DEBUG is not set -# CONFIG_SSB_DRIVER_GPIO is not set -# CONFIG_SSB_HOST_SOC is not set -# CONFIG_SSB_PCMCIAHOST is not set -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB_SDIOHOST is not set -# CONFIG_SSB_SILENT is not set -# CONFIG_SSFDC is not set -# CONFIG_STACKPROTECTOR is not set -# CONFIG_STACKPROTECTOR_STRONG is not set -# CONFIG_STACKTRACE is not set -CONFIG_STACKTRACE_SUPPORT=y -# CONFIG_STACK_TRACER is not set -# CONFIG_STACK_VALIDATION is not set -CONFIG_STAGING=y -# CONFIG_STAGING_BOARD is not set -# CONFIG_STAGING_GASKET_FRAMEWORK is not set -# CONFIG_STAGING_MEDIA is not set -CONFIG_STANDALONE=y -# CONFIG_STATIC_KEYS_SELFTEST is not set -# CONFIG_STATIC_USERMODEHELPER is not set -CONFIG_STDBINUTILS=y -# CONFIG_STE10XP is not set -# CONFIG_STE_MODEM_RPROC is not set -# CONFIG_STK3310 is not set -# CONFIG_STK8312 is not set -# CONFIG_STK8BA50 is not set -# CONFIG_STM is not set -# CONFIG_STMMAC_ETH is not set -# CONFIG_STMMAC_PCI is not set -# CONFIG_STMMAC_PLATFORM is not set -# CONFIG_STM_DUMMY is not set -# CONFIG_STM_SOURCE_CONSOLE is not set -CONFIG_STP=y -# CONFIG_STREAM_PARSER is not set -# CONFIG_STRICT_DEVMEM is not set -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_STRICT_MODULE_RWX=y -# CONFIG_STRING_SELFTEST is not set -CONFIG_STRIP_ASM_SYMS=y -# CONFIG_STX104 is not set -# CONFIG_ST_UVIS25 is not set -# CONFIG_SUN4I_GPADC is not set -# CONFIG_SUN50I_DE2_BUS is not set -# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_SUNGEM is not set -# CONFIG_SUNRPC is not set -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_SUNRPC_GSS is not set -# CONFIG_SUNXI_SRAM is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_SURFACE_3_BUTTON is not set -# CONFIG_SUSPEND is not set -# CONFIG_SUSPEND_SKIP_SYNC is not set -CONFIG_SWAP=y -# CONFIG_SWCONFIG is not set -# CONFIG_SWCONFIG_B53 is not set -# CONFIG_SWCONFIG_B53_MDIO_DRIVER is not set -# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set -# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set -# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set -# CONFIG_SWCONFIG_LEDS is not set -# CONFIG_SW_SYNC is not set -# CONFIG_SX9500 is not set -# CONFIG_SXGBE_ETH is not set -# CONFIG_SYNCLINK_CS is not set -# CONFIG_SYNC_FILE is not set -# CONFIG_SYNOPSYS_DWC_ETH_QOS is not set -CONFIG_SYN_COOKIES=y -# CONFIG_SYSCON_REBOOT_MODE is not set -CONFIG_SYSCTL=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_SYSFS=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_SYSTEMPORT is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -# CONFIG_SYSTEM_DATA_VERIFICATION is not set -# CONFIG_SYSTEM_TRUSTED_KEYRING is not set -CONFIG_SYSTEM_TRUSTED_KEYS="" -# CONFIG_SYSV68_PARTITION is not set -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_SYSV_FS is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_T5403 is not set -# CONFIG_TARGET_CORE is not set -# CONFIG_TASKSTATS is not set -# CONFIG_TASKS_RCU is not set -# CONFIG_TASK_XACCT is not set -# CONFIG_TC35815 is not set -# CONFIG_TCG_ATMEL is not set -# CONFIG_TCG_CRB is not set -# CONFIG_TCG_INFINEON is not set -# CONFIG_TCG_NSC is not set -# CONFIG_TCG_ST33_I2C is not set -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_I2C_ATMEL is not set -# CONFIG_TCG_TIS_I2C_INFINEON is not set -# CONFIG_TCG_TIS_I2C_NUVOTON is not set -# CONFIG_TCG_TIS_SPI is not set -# CONFIG_TCG_TIS_ST33ZP24_I2C is not set -# CONFIG_TCG_TIS_ST33ZP24_SPI is not set -# CONFIG_TCG_TPM is not set -# CONFIG_TCG_VTPM_PROXY is not set -# CONFIG_TCG_XEN is not set -# CONFIG_TCIC is not set -CONFIG_TCP_CONG_ADVANCED=y -# CONFIG_TCP_CONG_BBR is not set -# CONFIG_TCP_CONG_BIC is not set -# CONFIG_TCP_CONG_CDG is not set -CONFIG_TCP_CONG_CUBIC=y -# CONFIG_TCP_CONG_DCTCP is not set -# CONFIG_TCP_CONG_HSTCP is not set -# CONFIG_TCP_CONG_HTCP is not set -# CONFIG_TCP_CONG_HYBLA is not set -# CONFIG_TCP_CONG_ILLINOIS is not set -# CONFIG_TCP_CONG_LP is not set -# CONFIG_TCP_CONG_NV is not set -# CONFIG_TCP_CONG_SCALABLE is not set -# CONFIG_TCP_CONG_VEGAS is not set -# CONFIG_TCP_CONG_VENO is not set -# CONFIG_TCP_CONG_WESTWOOD is not set -# CONFIG_TCP_CONG_YEAH is not set -# CONFIG_TCP_MD5SIG is not set -# CONFIG_TCS3414 is not set -# CONFIG_TCS3472 is not set -# CONFIG_TEE is not set -# CONFIG_TEGRA_AHB is not set -# CONFIG_TEGRA_HOST1X is not set -# CONFIG_TEHUTI is not set -# CONFIG_TERANETICS_PHY is not set -# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -# CONFIG_TEST_BITFIELD is not set -# CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_BPF is not set -# CONFIG_TEST_FIRMWARE is not set -# CONFIG_TEST_HASH is not set -# CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_IDA is not set -# CONFIG_TEST_KASAN is not set -# CONFIG_TEST_KMOD is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_TEST_LKM is not set -# CONFIG_TEST_OVERFLOW is not set -# CONFIG_TEST_POWER is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_SORT is not set -# CONFIG_TEST_STATIC_KEYS is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_SYSCTL is not set -# CONFIG_TEST_UBSAN is not set -# CONFIG_TEST_UDELAY is not set -# CONFIG_TEST_USER_COPY is not set -# CONFIG_TEST_UUID is not set -CONFIG_TEXTSEARCH=y -# CONFIG_TEXTSEARCH_BM is not set -# CONFIG_TEXTSEARCH_FSM is not set -# CONFIG_TEXTSEARCH_KMP is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_EMULATION is not set -# CONFIG_THERMAL_GOV_BANG_BANG is not set -# CONFIG_THERMAL_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set -# CONFIG_THERMAL_GOV_USER_SPACE is not set -# CONFIG_THERMAL_HWMON is not set -# CONFIG_THERMAL_STATISTICS is not set -# CONFIG_THERMAL_WRITABLE_TRIPS is not set -# CONFIG_THINKPAD_ACPI is not set -CONFIG_THIN_ARCHIVES=y -# CONFIG_THRUSTMASTER_FF is not set -# CONFIG_THUNDERBOLT is not set -# CONFIG_THUNDER_NIC_BGX is not set -# CONFIG_THUNDER_NIC_PF is not set -# CONFIG_THUNDER_NIC_RGX is not set -# CONFIG_THUNDER_NIC_VF is not set -# CONFIG_TICK_CPU_ACCOUNTING is not set -CONFIG_TICK_ONESHOT=y -# CONFIG_TIFM_CORE is not set -# CONFIG_TIGON3 is not set -# CONFIG_TIMB_DMA is not set -CONFIG_TIMERFD=y -# CONFIG_TIMER_STATS is not set -CONFIG_TINY_RCU=y -# CONFIG_TIPC is not set -# CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADC0832 is not set -# CONFIG_TI_ADC084S021 is not set -# CONFIG_TI_ADC108S102 is not set -# CONFIG_TI_ADC12138 is not set -# CONFIG_TI_ADC128S052 is not set -# CONFIG_TI_ADC161S626 is not set -# CONFIG_TI_ADS1015 is not set -# CONFIG_TI_ADS7950 is not set -# CONFIG_TI_ADS8688 is not set -# CONFIG_TI_AM335X_ADC is not set -# CONFIG_TI_CPSW is not set -# CONFIG_TI_CPSW_ALE is not set -# CONFIG_TI_CPTS is not set -# CONFIG_TI_DAC082S085 is not set -# CONFIG_TI_DAC5571 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_TI_DAVINCI_CPDMA is not set -# CONFIG_TI_DAVINCI_MDIO is not set -# CONFIG_TI_ST is not set -# CONFIG_TI_SYSCON_RESET is not set -# CONFIG_TI_TLC4541 is not set -# CONFIG_TLAN is not set -# CONFIG_TLS is not set -# CONFIG_TMD_HERMES is not set -# CONFIG_TMP006 is not set -# CONFIG_TMP007 is not set -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -CONFIG_TMPFS_XATTR=y -# CONFIG_TOPSTAR_LAPTOP is not set -# CONFIG_TORTURE_TEST is not set -# CONFIG_TOSHIBA_HAPS is not set -# CONFIG_TOUCHSCREEN_88PM860X is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_AD7879_I2C is not set -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set -# CONFIG_TOUCHSCREEN_ADC is not set -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AR1021_I2C is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_BU21029 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set -# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set -# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_I2C is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_SPI is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP_I2C is not set -# CONFIG_TOUCHSCREEN_CYTTSP_SPI is not set -# CONFIG_TOUCHSCREEN_DA9034 is not set -# CONFIG_TOUCHSCREEN_DA9052 is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set -# CONFIG_TOUCHSCREEN_EKTF2127 is not set -# CONFIG_TOUCHSCREEN_ELAN is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_EXC3000 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GOODIX is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_HIDEEP is not set -# CONFIG_TOUCHSCREEN_HP600 is not set -# CONFIG_TOUCHSCREEN_HP7XX is not set -# CONFIG_TOUCHSCREEN_HTCPEN is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_IPAQ_MICRO is not set -# CONFIG_TOUCHSCREEN_IPROC is not set -# CONFIG_TOUCHSCREEN_LPC32XX is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MC13783 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set -# CONFIG_TOUCHSCREEN_MIGOR is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_MX25 is not set -# CONFIG_TOUCHSCREEN_MXS_LRADC is not set -# CONFIG_TOUCHSCREEN_PCAP is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_PROPERTIES is not set -# CONFIG_TOUCHSCREEN_RM_TS is not set -# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set -# CONFIG_TOUCHSCREEN_S3C2410 is not set -# CONFIG_TOUCHSCREEN_S6SY761 is not set -# CONFIG_TOUCHSCREEN_SILEAD is not set -# CONFIG_TOUCHSCREEN_SIS_I2C is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set -# CONFIG_TOUCHSCREEN_STMPE is not set -# CONFIG_TOUCHSCREEN_SUN4I is not set -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set -# CONFIG_TOUCHSCREEN_SX8654 is not set -# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_TS4800 is not set -# CONFIG_TOUCHSCREEN_TSC2004 is not set -# CONFIG_TOUCHSCREEN_TSC2005 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set -# CONFIG_TOUCHSCREEN_TSC200X_CORE is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_UCB1400 is not set -# CONFIG_TOUCHSCREEN_USB_3M is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set -# CONFIG_TOUCHSCREEN_USB_E2I is not set -# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set -# CONFIG_TOUCHSCREEN_USB_EGALAX is not set -# CONFIG_TOUCHSCREEN_USB_ELO is not set -# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set -# CONFIG_TOUCHSCREEN_USB_ETURBO is not set -# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set -# CONFIG_TOUCHSCREEN_USB_GOTOP is not set -# CONFIG_TOUCHSCREEN_USB_GUNZE is not set -# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set -# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set -# CONFIG_TOUCHSCREEN_USB_ITM is not set -# CONFIG_TOUCHSCREEN_USB_JASTEC is not set -# CONFIG_TOUCHSCREEN_USB_NEXIO is not set -# CONFIG_TOUCHSCREEN_USB_PANJIT is not set -# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -# CONFIG_TOUCHSCREEN_WM831X is not set -# CONFIG_TOUCHSCREEN_WM9705 is not set -# CONFIG_TOUCHSCREEN_WM9712 is not set -# CONFIG_TOUCHSCREEN_WM9713 is not set -# CONFIG_TOUCHSCREEN_WM97XX is not set -# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set -# CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE is not set -# CONFIG_TOUCHSCREEN_ZET6223 is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TPL0102 is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_TRACEPOINT_BENCHMARK is not set -# CONFIG_TRACER_SNAPSHOT is not set -# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_TRACE_EVAL_MAP_FILE is not set -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_TRACE_SINK is not set -# CONFIG_TRACING_EVENTS_GPIO is not set -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -# CONFIG_TRANSPARENT_HUGEPAGE is not set -# CONFIG_TREE_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_TSL2583 is not set -# CONFIG_TSL2772 is not set -# CONFIG_TSL2x7x is not set -# CONFIG_TSL4531 is not set -# CONFIG_TSYS01 is not set -# CONFIG_TSYS02D is not set -# CONFIG_TTPCI_EEPROM is not set -CONFIG_TTY=y -# CONFIG_TTY_PRINTK is not set -# CONFIG_TUN is not set -# CONFIG_TUN_VNET_CROSS_LE is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TWL4030_MADC is not set -# CONFIG_TWL6030_GPADC is not set -# CONFIG_TWL6040_CORE is not set -# CONFIG_TYPEC is not set -# CONFIG_TYPEC_TCPM is not set -# CONFIG_TYPEC_UCSI is not set -# CONFIG_TYPHOON is not set -# CONFIG_UACCESS_WITH_MEMCPY is not set -# CONFIG_UBIFS_ATIME_SUPPORT is not set -# CONFIG_UBIFS_FS_ENCRYPTION is not set -# CONFIG_UBIFS_FS_SECURITY is not set -# CONFIG_UBIFS_FS_XATTR is not set -# CONFIG_UBSAN is not set -# CONFIG_UCB1400_CORE is not set -# CONFIG_UCSI is not set -# CONFIG_UDF_FS is not set -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_UFS_FS is not set -# CONFIG_UHID is not set -CONFIG_UID16=y -# CONFIG_UIO is not set -# CONFIG_ULTRA is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_UNISYS_VISORBUS is not set -CONFIG_UNIX=y -CONFIG_UNIX98_PTYS=y -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_UNIX_DIAG is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_UPROBES is not set -# CONFIG_UPROBE_EVENTS is not set -# CONFIG_US5182D is not set -# CONFIG_USB is not set -# CONFIG_USBIP_CORE is not set -CONFIG_USBIP_VHCI_HC_PORTS=8 -CONFIG_USBIP_VHCI_NR_HCS=1 -# CONFIG_USBIP_VUDC is not set -# CONFIG_USBPCWATCHDOG is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_ADUTUX is not set -CONFIG_USB_ALI_M5632=y -# CONFIG_USB_AMD5536UDC is not set -CONFIG_USB_AN2720=y -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set -# CONFIG_USB_APPLEDISPLAY is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARMLINUX=y -# CONFIG_USB_ATM is not set -# CONFIG_USB_BDC_UDC is not set -CONFIG_USB_BELKIN=y -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_CATC is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_CHIPIDEA is not set -# CONFIG_USB_CONFIGFS is not set -# CONFIG_USB_CXACRU is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_DSBR is not set -# CONFIG_USB_DUMMY_HCD is not set -# CONFIG_USB_DWC2 is not set -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_DUAL_ROLE is not set -# CONFIG_USB_DWC2_HOST is not set -# CONFIG_USB_DWC2_PERIPHERAL is not set -# CONFIG_USB_DWC3 is not set -# CONFIG_USB_DWC3_EXYNOS is not set -# CONFIG_USB_DWC3_HAPS is not set -# CONFIG_USB_DWC3_KEYSTONE is not set -# CONFIG_USB_DWC3_OF_SIMPLE is not set -# CONFIG_USB_DWC3_PCI is not set -# CONFIG_USB_DWC3_QCOM is not set -# CONFIG_USB_DWC3_ULPI is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_EG20T is not set -# CONFIG_USB_EHCI_ATH79 is not set -# CONFIG_USB_EHCI_HCD is not set -# CONFIG_USB_EHCI_HCD_AT91 is not set -# CONFIG_USB_EHCI_HCD_OMAP is not set -# CONFIG_USB_EHCI_HCD_PPC_OF is not set -# CONFIG_USB_EHCI_MSM is not set -# CONFIG_USB_EHCI_MV is not set -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EPSON2888 is not set -# CONFIG_USB_EZUSB_FX2 is not set -# CONFIG_USB_FOTG210_HCD is not set -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_FSL_USB2 is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_FUNCTIONFS is not set -# CONFIG_USB_FUSB300 is not set -# CONFIG_USB_GADGET is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 -CONFIG_USB_GADGET_VBUS_DRAW=2 -# CONFIG_USB_GADGET_XILINX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GOKU is not set -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_GR_UDC is not set -# CONFIG_USB_GSPCA is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_DTCS033 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TOUPTEK is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_G_NOKIA is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_G_SERIAL is not set -# CONFIG_USB_G_WEBCAM is not set -# CONFIG_USB_HCD_TEST_MODE is not set -# CONFIG_USB_HID is not set -# CONFIG_USB_HIDDEV is not set -# CONFIG_USB_HSIC_USB3503 is not set -# CONFIG_USB_HSIC_USB4604 is not set -# CONFIG_USB_HSO is not set -# CONFIG_USB_HUB_USB251XB is not set -# CONFIG_USB_HWA_HCD is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_IMX21_HCD is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_IPHETH is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1301 is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_ISP1760 is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_KBD is not set -# CONFIG_USB_KC2190 is not set -# CONFIG_USB_LAN78XX is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set -# CONFIG_USB_LED_TRIG is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LINK_LAYER_TEST is not set -# CONFIG_USB_M5602 is not set -# CONFIG_USB_M66592 is not set -# CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_MAX3421_HCD is not set -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_MOUSE is not set -# CONFIG_USB_MSM_OTG is not set -# CONFIG_USB_MTU3 is not set -# CONFIG_USB_MUSB_HDRC is not set -# CONFIG_USB_MV_U3D is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MXS_PHY is not set -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_NET2280 is not set -# CONFIG_USB_NET_AX88179_178A is not set -# CONFIG_USB_NET_AX8817X is not set -# CONFIG_USB_NET_CDCETHER is not set -# CONFIG_USB_NET_CDC_EEM is not set -# CONFIG_USB_NET_CDC_MBIM is not set -# CONFIG_USB_NET_CDC_NCM is not set -# CONFIG_USB_NET_CDC_SUBSET is not set -# CONFIG_USB_NET_CH9200 is not set -# CONFIG_USB_NET_CX82310_ETH is not set -# CONFIG_USB_NET_DM9601 is not set -# CONFIG_USB_NET_DRIVERS is not set -# CONFIG_USB_NET_GL620A is not set -# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set -# CONFIG_USB_NET_INT51X1 is not set -# CONFIG_USB_NET_KALMIA is not set -# CONFIG_USB_NET_MCS7830 is not set -# CONFIG_USB_NET_NET1080 is not set -# CONFIG_USB_NET_PLUSB is not set -# CONFIG_USB_NET_QMI_WWAN is not set -# CONFIG_USB_NET_RNDIS_HOST is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_USB_NET_SMSC75XX is not set -# CONFIG_USB_NET_SMSC95XX is not set -# CONFIG_USB_NET_SR9700 is not set -# CONFIG_USB_NET_SR9800 is not set -# CONFIG_USB_NET_ZAURUS is not set -# CONFIG_USB_OHCI_HCD is not set -# CONFIG_USB_OHCI_HCD_PCI is not set -# CONFIG_USB_OHCI_HCD_PPC_OF is not set -# CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set -# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set -# CONFIG_USB_OHCI_HCD_SSB is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_PCI is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_PHY is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_PWC_INPUT_EVDEV is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_RCAR_PHY is not set -# CONFIG_USB_RENESAS_USBHS is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_ROLE_SWITCH is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_RTL8152 is not set -# CONFIG_USB_S2255 is not set -# CONFIG_USB_SERIAL is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_CH341 is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_DEBUG is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_F8153X is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_GARMIN is not set -CONFIG_USB_SERIAL_GENERIC=y -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7715_PARPORT is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_MXUPORT is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_OPTION is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SAFE is not set -CONFIG_USB_SERIAL_SAFE_PADDED=y -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_SIERRA_NET is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_SNP_UDC_PLAT is not set -# CONFIG_USB_SPEEDTOUCH is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_STORAGE is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_USB_SWITCH_FSA9480 is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_TMC is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_UAS is not set -# CONFIG_USB_UEAGLEATM is not set -# CONFIG_USB_ULPI is not set -# CONFIG_USB_ULPI_BUS is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_USS720 is not set -# CONFIG_USB_VIDEO_CLASS is not set -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -# CONFIG_USB_VL600 is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_WHCI_HCD is not set -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set -# CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_HCD is not set -# CONFIG_USB_XHCI_MVEBU is not set -# CONFIG_USB_XUSBATM is not set -# CONFIG_USB_YUREX is not set -# CONFIG_USB_ZD1201 is not set -# CONFIG_USB_ZERO is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USELIB is not set -# CONFIG_USERFAULTFD is not set -# CONFIG_USE_OF is not set -# CONFIG_UTS_NS is not set -# CONFIG_UWB is not set -# CONFIG_U_SERIAL_CONSOLE is not set -# CONFIG_V4L_MEM2MEM_DRIVERS is not set -# CONFIG_V4L_TEST_DRIVERS is not set -# CONFIG_VBOXGUEST is not set -# CONFIG_VCNL4000 is not set -CONFIG_VDSO=y -# CONFIG_VEML6070 is not set -# CONFIG_VETH is not set -# CONFIG_VEXPRESS_CONFIG is not set -# CONFIG_VF610_ADC is not set -# CONFIG_VF610_DAC is not set -# CONFIG_VFAT_FS is not set -# CONFIG_VGASTATE is not set -# CONFIG_VGA_ARB is not set -# CONFIG_VGA_SWITCHEROO is not set -# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set -# CONFIG_VHOST_NET is not set -# CONFIG_VHOST_VSOCK is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_VIDEO_ADV7170 is not set -# CONFIG_VIDEO_ADV7175 is not set -# CONFIG_VIDEO_ADV7180 is not set -# CONFIG_VIDEO_ADV7183 is not set -# CONFIG_VIDEO_ADV7343 is not set -# CONFIG_VIDEO_ADV7393 is not set -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_AK881X is not set -# CONFIG_VIDEO_BT819 is not set -# CONFIG_VIDEO_BT848 is not set -# CONFIG_VIDEO_BT856 is not set -# CONFIG_VIDEO_BT866 is not set -# CONFIG_VIDEO_CADENCE is not set -# CONFIG_VIDEO_CAFE_CCIC is not set -# CONFIG_VIDEO_CS3308 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_CX2341X is not set -# CONFIG_VIDEO_CX25840 is not set -# CONFIG_VIDEO_CX88 is not set -# CONFIG_VIDEO_DEV is not set -# CONFIG_VIDEO_DM6446_CCDC is not set -# CONFIG_VIDEO_DT3155 is not set -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_GO7007 is not set -# CONFIG_VIDEO_HDPVR is not set -# CONFIG_VIDEO_HEXIUM_GEMINI is not set -# CONFIG_VIDEO_HEXIUM_ORION is not set -# CONFIG_VIDEO_I2C is not set -# CONFIG_VIDEO_IR_I2C is not set -# CONFIG_VIDEO_IVTV is not set -# CONFIG_VIDEO_KS0127 is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_ML86V7667 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_MT9M111 is not set -# CONFIG_VIDEO_MT9T112 is not set -# CONFIG_VIDEO_MT9V011 is not set -# CONFIG_VIDEO_MT9V111 is not set -# CONFIG_VIDEO_MXB is not set -# CONFIG_VIDEO_NOON010PC30 is not set -# CONFIG_VIDEO_OMAP2_VOUT is not set -# CONFIG_VIDEO_OV2640 is not set -# CONFIG_VIDEO_OV2659 is not set -# CONFIG_VIDEO_OV5695 is not set -# CONFIG_VIDEO_OV6650 is not set -# CONFIG_VIDEO_OV7640 is not set -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_OV772X is not set -# CONFIG_VIDEO_OV7740 is not set -# CONFIG_VIDEO_PVRUSB2 is not set -# CONFIG_VIDEO_RJ54N1 is not set -# CONFIG_VIDEO_SAA6588 is not set -# CONFIG_VIDEO_SAA6752HS is not set -# CONFIG_VIDEO_SAA7110 is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA7127 is not set -# CONFIG_VIDEO_SAA7134 is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_SAA7185 is not set -# CONFIG_VIDEO_SH_MOBILE_CEU is not set -# CONFIG_VIDEO_SONY_BTF_MPX is not set -# CONFIG_VIDEO_SR030PC30 is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_THS7303 is not set -# CONFIG_VIDEO_THS8200 is not set -# CONFIG_VIDEO_TIMBERDALE is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_TM6000 is not set -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set -# CONFIG_VIDEO_TVP7002 is not set -# CONFIG_VIDEO_TW2804 is not set -# CONFIG_VIDEO_TW9903 is not set -# CONFIG_VIDEO_TW9906 is not set -# CONFIG_VIDEO_TW9910 is not set -# CONFIG_VIDEO_UDA1342 is not set -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_USBTV is not set -# CONFIG_VIDEO_USBVISION is not set -# CONFIG_VIDEO_V4L2 is not set -# CONFIG_VIDEO_VP27SMPX is not set -# CONFIG_VIDEO_VPX3220 is not set -# CONFIG_VIDEO_VS6624 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_ZORAN is not set -# CONFIG_VIRTIO_BALLOON is not set -# CONFIG_VIRTIO_BLK_SCSI is not set -# CONFIG_VIRTIO_INPUT is not set -CONFIG_VIRTIO_MENU=y -# CONFIG_VIRTIO_MMIO is not set -# CONFIG_VIRTIO_PCI is not set -# CONFIG_VIRTUALIZATION is not set -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -# CONFIG_VIRT_DRIVERS is not set -CONFIG_VIRT_TO_BUS=y -# CONFIG_VITESSE_PHY is not set -# CONFIG_VL6180 is not set -CONFIG_VLAN_8021Q=y -# CONFIG_VLAN_8021Q_GVRP is not set -# CONFIG_VLAN_8021Q_MVRP is not set -# CONFIG_VME_BUS is not set -# CONFIG_VMSPLIT_1G is not set -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_2G_OPT is not set -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_3G_OPT is not set -# CONFIG_VMWARE_PVSCSI is not set -# CONFIG_VMXNET3 is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_VOP_BUS is not set -# CONFIG_VORTEX is not set -# CONFIG_VSOCKETS is not set -# CONFIG_VSOCKETS_DIAG is not set -# CONFIG_VT is not set -# CONFIG_VT6655 is not set -# CONFIG_VT6656 is not set -# CONFIG_VXFS_FS is not set -# CONFIG_VXGE is not set -# CONFIG_VXLAN is not set -# CONFIG_VZ89X is not set -# CONFIG_W1 is not set -# CONFIG_W1_CON is not set -# CONFIG_W1_MASTER_DS1WM is not set -# CONFIG_W1_MASTER_DS2482 is not set -# CONFIG_W1_MASTER_DS2490 is not set -# CONFIG_W1_MASTER_GPIO is not set -# CONFIG_W1_MASTER_MATROX is not set -# CONFIG_W1_SLAVE_DS2405 is not set -# CONFIG_W1_SLAVE_DS2406 is not set -# CONFIG_W1_SLAVE_DS2408 is not set -# CONFIG_W1_SLAVE_DS2413 is not set -# CONFIG_W1_SLAVE_DS2423 is not set -# CONFIG_W1_SLAVE_DS2431 is not set -# CONFIG_W1_SLAVE_DS2433 is not set -# CONFIG_W1_SLAVE_DS2438 is not set -# CONFIG_W1_SLAVE_DS2780 is not set -# CONFIG_W1_SLAVE_DS2781 is not set -# CONFIG_W1_SLAVE_DS2805 is not set -# CONFIG_W1_SLAVE_DS28E04 is not set -# CONFIG_W1_SLAVE_DS28E17 is not set -# CONFIG_W1_SLAVE_SMEM is not set -# CONFIG_W1_SLAVE_THERM is not set -# CONFIG_W83627HF_WDT is not set -# CONFIG_W83877F_WDT is not set -# CONFIG_W83977F_WDT is not set -# CONFIG_WAN is not set -# CONFIG_WANXL is not set -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_CORE is not set -CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y -# CONFIG_WATCHDOG_NOWAYOUT is not set -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set -# CONFIG_WATCHDOG_SYSFS is not set -# CONFIG_WD80x3 is not set -# CONFIG_WDAT_WDT is not set -# CONFIG_WDTPCI is not set -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PRIV=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WILINK_PLATFORM_DATA=y -# CONFIG_WIMAX is not set -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -# CONFIG_WIRELESS_WDS is not set -# CONFIG_WIZNET_W5100 is not set -# CONFIG_WIZNET_W5300 is not set -# CONFIG_WL1251 is not set -# CONFIG_WL12XX is not set -# CONFIG_WL18XX is not set -CONFIG_WLAN=y -# CONFIG_WLAN_VENDOR_ADMTEK is not set -# CONFIG_WLAN_VENDOR_ATH is not set -# CONFIG_WLAN_VENDOR_ATMEL is not set -# CONFIG_WLAN_VENDOR_BROADCOM is not set -# CONFIG_WLAN_VENDOR_CISCO is not set -# CONFIG_WLAN_VENDOR_INTEL is not set -# CONFIG_WLAN_VENDOR_INTERSIL is not set -# CONFIG_WLAN_VENDOR_MARVELL is not set -# CONFIG_WLAN_VENDOR_MEDIATEK is not set -# CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_WLAN_VENDOR_RALINK is not set -# CONFIG_WLAN_VENDOR_REALTEK is not set -# CONFIG_WLAN_VENDOR_RSI is not set -# CONFIG_WLAN_VENDOR_ST is not set -# CONFIG_WLAN_VENDOR_TI is not set -# CONFIG_WLAN_VENDOR_ZYDAS is not set -# CONFIG_WLCORE is not set -CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y -# CONFIG_WQ_WATCHDOG is not set -# CONFIG_WW_MUTEX_SELFTEST is not set -# CONFIG_X25 is not set -# CONFIG_X509_CERTIFICATE_PARSER is not set -# CONFIG_X86_PKG_TEMP_THERMAL is not set -CONFIG_X86_SYSFB=y -# CONFIG_XDP_SOCKETS is not set -# CONFIG_XEN is not set -# CONFIG_XEN_GRANT_DMA_ALLOC is not set -# CONFIG_XEN_PVCALLS_FRONTEND is not set -CONFIG_XEN_SCRUB_PAGES_DEFAULT=y -CONFIG_XFRM=y -# CONFIG_XFRM_INTERFACE is not set -# CONFIG_XFRM_IPCOMP is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_USER is not set -# CONFIG_XFS_DEBUG is not set -# CONFIG_XFS_FS is not set -# CONFIG_XFS_ONLINE_SCRUB is not set -# CONFIG_XFS_POSIX_ACL is not set -# CONFIG_XFS_QUOTA is not set -# CONFIG_XFS_RT is not set -# CONFIG_XFS_WARN is not set -# CONFIG_XILINX_AXI_EMAC is not set -# CONFIG_XILINX_DMA is not set -# CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_GMII2RGMII is not set -# CONFIG_XILINX_LL_TEMAC is not set -# CONFIG_XILINX_VCU is not set -# CONFIG_XILINX_WATCHDOG is not set -# CONFIG_XILINX_ZYNQMP_DMA is not set -# CONFIG_XILLYBUS is not set -# CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_XIP_KERNEL is not set -# CONFIG_XMON is not set -CONFIG_XZ_DEC=y -# CONFIG_XZ_DEC_ARM is not set -# CONFIG_XZ_DEC_ARMTHUMB is not set -# CONFIG_XZ_DEC_BCJ is not set -# CONFIG_XZ_DEC_IA64 is not set -# CONFIG_XZ_DEC_POWERPC is not set -# CONFIG_XZ_DEC_SPARC is not set -# CONFIG_XZ_DEC_TEST is not set -# CONFIG_XZ_DEC_X86 is not set -# CONFIG_YAM is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_YENTA is not set -# CONFIG_YENTA_O2 is not set -# CONFIG_YENTA_RICOH is not set -# CONFIG_YENTA_TI is not set -# CONFIG_YENTA_TOSHIBA is not set -# CONFIG_ZBUD is not set -# CONFIG_ZD1211RW is not set -# CONFIG_ZD1211RW_DEBUG is not set -# CONFIG_ZEROPLUS_FF is not set -# CONFIG_ZIIRAVE_WATCHDOG is not set -# CONFIG_ZISOFS is not set -# CONFIG_ZLIB_DEFLATE is not set -# CONFIG_ZLIB_INFLATE is not set -CONFIG_ZONE_DMA=y -# CONFIG_ZOPT2201 is not set -# CONFIG_ZPA2326 is not set -# CONFIG_ZPOOL is not set -# CONFIG_ZRAM is not set -# CONFIG_ZRAM_MEMORY_TRACKING is not set -# CONFIG_ZSMALLOC is not set -# CONFIG_ZX_TDM is not set diff --git a/target/linux/generic/hack-4.19/204-module_strip.patch b/target/linux/generic/hack-4.19/204-module_strip.patch deleted file mode 100644 index c5170ba295..0000000000 --- a/target/linux/generic/hack-4.19/204-module_strip.patch +++ /dev/null @@ -1,206 +0,0 @@ -From a779a482fb9b9f8fcdf8b2519c789b4b9bb5dd05 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 16:56:48 +0200 -Subject: build: add a hack for removing non-essential module info - -Signed-off-by: Felix Fietkau ---- - include/linux/module.h | 13 ++++++++----- - include/linux/moduleparam.h | 15 ++++++++++++--- - init/Kconfig | 7 +++++++ - kernel/module.c | 5 ++++- - scripts/mod/modpost.c | 12 ++++++++++++ - 5 files changed, 43 insertions(+), 9 deletions(-) - ---- a/include/linux/module.h -+++ b/include/linux/module.h -@@ -160,6 +160,7 @@ extern void cleanup_module(void); - - /* Generic info of form tag = "info" */ - #define MODULE_INFO(tag, info) __MODULE_INFO(tag, tag, info) -+#define MODULE_INFO_STRIP(tag, info) __MODULE_INFO_STRIP(tag, tag, info) - - /* For userspace: you can also call me... */ - #define MODULE_ALIAS(_alias) MODULE_INFO(alias, _alias) -@@ -203,12 +204,12 @@ extern void cleanup_module(void); - * Author(s), use "Name " or just "Name", for multiple - * authors use multiple MODULE_AUTHOR() statements/lines. - */ --#define MODULE_AUTHOR(_author) MODULE_INFO(author, _author) -+#define MODULE_AUTHOR(_author) MODULE_INFO_STRIP(author, _author) - - /* What your module does. */ --#define MODULE_DESCRIPTION(_description) MODULE_INFO(description, _description) -+#define MODULE_DESCRIPTION(_description) MODULE_INFO_STRIP(description, _description) - --#ifdef MODULE -+#if defined(MODULE) && !defined(CONFIG_MODULE_STRIPPED) - /* Creates an alias so file2alias.c can find device table. */ - #define MODULE_DEVICE_TABLE(type, name) \ - extern typeof(name) __mod_##type##__##name##_device_table \ -@@ -235,7 +236,9 @@ extern typeof(name) __mod_##type##__##na - */ - - #if defined(MODULE) || !defined(CONFIG_SYSFS) --#define MODULE_VERSION(_version) MODULE_INFO(version, _version) -+#define MODULE_VERSION(_version) MODULE_INFO_STRIP(version, _version) -+#elif defined(CONFIG_MODULE_STRIPPED) -+#define MODULE_VERSION(_version) __MODULE_INFO_DISABLED(version) - #else - #define MODULE_VERSION(_version) \ - static struct module_version_attribute ___modver_attr = { \ -@@ -257,7 +260,7 @@ extern typeof(name) __mod_##type##__##na - /* Optional firmware file (or files) needed by the module - * format is simply firmware file name. Multiple firmware - * files require multiple MODULE_FIRMWARE() specifiers */ --#define MODULE_FIRMWARE(_firmware) MODULE_INFO(firmware, _firmware) -+#define MODULE_FIRMWARE(_firmware) MODULE_INFO_STRIP(firmware, _firmware) - - struct notifier_block; - ---- a/include/linux/moduleparam.h -+++ b/include/linux/moduleparam.h -@@ -17,6 +17,16 @@ - /* Chosen so that structs with an unsigned long line up. */ - #define MAX_PARAM_PREFIX_LEN (64 - sizeof(unsigned long)) - -+/* This struct is here for syntactic coherency, it is not used */ -+#define __MODULE_INFO_DISABLED(name) \ -+ struct __UNIQUE_ID(name) {} -+ -+#ifdef CONFIG_MODULE_STRIPPED -+#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO_DISABLED(name) -+#else -+#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO(tag, name, info) -+#endif -+ - #ifdef MODULE - #define __MODULE_INFO(tag, name, info) \ - static const char __UNIQUE_ID(name)[] \ -@@ -24,8 +34,7 @@ static const char __UNIQUE_ID(name)[] - = __stringify(tag) "=" info - #else /* !MODULE */ - /* This struct is here for syntactic coherency, it is not used */ --#define __MODULE_INFO(tag, name, info) \ -- struct __UNIQUE_ID(name) {} -+#define __MODULE_INFO(tag, name, info) __MODULE_INFO_DISABLED(name) - #endif - #define __MODULE_PARM_TYPE(name, _type) \ - __MODULE_INFO(parmtype, name##type, #name ":" _type) -@@ -33,7 +42,7 @@ static const char __UNIQUE_ID(name)[] - /* One for each parameter, describing how to use it. Some files do - multiple of these per line, so can't just use MODULE_INFO. */ - #define MODULE_PARM_DESC(_parm, desc) \ -- __MODULE_INFO(parm, _parm, #_parm ":" desc) -+ __MODULE_INFO_STRIP(parm, _parm, #_parm ":" desc) - - struct kernel_param; - ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1997,6 +1997,13 @@ config TRIM_UNUSED_KSYMS - - If unsure, or if you need to build out-of-tree modules, say N. - -+config MODULE_STRIPPED -+ bool "Reduce module size" -+ depends on MODULES -+ help -+ Remove module parameter descriptions, author info, version, aliases, -+ device tables, etc. -+ - endif # MODULES - - config MODULES_TREE_LOOKUP ---- a/kernel/module.c -+++ b/kernel/module.c -@@ -3030,9 +3030,11 @@ static int setup_load_info(struct load_i - - static int check_modinfo(struct module *mod, struct load_info *info, int flags) - { -- const char *modmagic = get_modinfo(info, "vermagic"); - int err; - -+#ifndef CONFIG_MODULE_STRIPPED -+ const char *modmagic = get_modinfo(info, "vermagic"); -+ - if (flags & MODULE_INIT_IGNORE_VERMAGIC) - modmagic = NULL; - -@@ -3053,6 +3055,7 @@ static int check_modinfo(struct module * - mod->name); - add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK); - } -+#endif - - check_modinfo_retpoline(mod, info); - ---- a/scripts/mod/modpost.c -+++ b/scripts/mod/modpost.c -@@ -1983,7 +1983,9 @@ static void read_symbols(const char *mod - symname = remove_dot(info.strtab + sym->st_name); - - handle_modversions(mod, &info, sym, symname); -+#ifndef CONFIG_MODULE_STRIPPED - handle_moddevtable(mod, &info, sym, symname); -+#endif - } - if (!is_vmlinux(modname) || vmlinux_section_warnings) - check_sec_ref(mod, modname, &info); -@@ -2146,8 +2148,10 @@ static void add_header(struct buffer *b, - buf_printf(b, "\n"); - buf_printf(b, "BUILD_SALT;\n"); - buf_printf(b, "\n"); -+#ifndef CONFIG_MODULE_STRIPPED - buf_printf(b, "MODULE_INFO(vermagic, VERMAGIC_STRING);\n"); - buf_printf(b, "MODULE_INFO(name, KBUILD_MODNAME);\n"); -+#endif - buf_printf(b, "\n"); - buf_printf(b, "__visible struct module __this_module\n"); - buf_printf(b, "__attribute__((section(\".gnu.linkonce.this_module\"))) = {\n"); -@@ -2164,8 +2168,10 @@ static void add_header(struct buffer *b, - - static void add_intree_flag(struct buffer *b, int is_intree) - { -+#ifndef CONFIG_MODULE_STRIPPED - if (is_intree) - buf_printf(b, "\nMODULE_INFO(intree, \"Y\");\n"); -+#endif - } - - /* Cannot check for assembler */ -@@ -2178,8 +2184,10 @@ static void add_retpoline(struct buffer - - static void add_staging_flag(struct buffer *b, const char *name) - { -+#ifndef CONFIG_MODULE_STRIPPED - if (strstarts(name, "drivers/staging")) - buf_printf(b, "\nMODULE_INFO(staging, \"Y\");\n"); -+#endif - } - - /** -@@ -2278,11 +2286,13 @@ static void add_depends(struct buffer *b - - static void add_srcversion(struct buffer *b, struct module *mod) - { -+#ifndef CONFIG_MODULE_STRIPPED - if (mod->srcversion[0]) { - buf_printf(b, "\n"); - buf_printf(b, "MODULE_INFO(srcversion, \"%s\");\n", - mod->srcversion); - } -+#endif - } - - static void write_if_changed(struct buffer *b, const char *fname) -@@ -2519,7 +2529,9 @@ int main(int argc, char **argv) - add_staging_flag(&buf, mod->name); - err |= add_versions(&buf, mod); - add_depends(&buf, mod, modules); -+#ifndef CONFIG_MODULE_STRIPPED - add_moddevtable(&buf, mod); -+#endif - add_srcversion(&buf, mod); - - sprintf(fname, "%s.mod.c", mod->name); diff --git a/target/linux/generic/hack-4.19/207-disable-modorder.patch b/target/linux/generic/hack-4.19/207-disable-modorder.patch deleted file mode 100644 index cf38cd3245..0000000000 --- a/target/linux/generic/hack-4.19/207-disable-modorder.patch +++ /dev/null @@ -1,44 +0,0 @@ -From c9ef4ab0f54356ee9f91d9676ea0ec123840ddc7 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 16:57:33 +0200 -Subject: kernel: do not build modules.order - -It is not needed for anything on the system and skipping this saves some -build time, especially in cases where there is nothing to do. - -lede-commit: afc1675833a7bf5df094f59f7250369520646d04 -Signed-off-by: Felix Fietkau ---- - Makefile | 2 -- - scripts/Makefile.build | 2 +- - 2 files changed, 1 insertion(+), 3 deletions(-) - ---- a/Makefile -+++ b/Makefile -@@ -1240,7 +1240,6 @@ endif - - PHONY += modules - modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) modules.builtin -- $(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.order) > $(objtree)/modules.order - @$(kecho) ' Building modules, stage 2.'; - $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost - -@@ -1269,7 +1268,6 @@ _modinst_: - rm -f $(MODLIB)/build ; \ - ln -s $(CURDIR) $(MODLIB)/build ; \ - fi -- @cp -f $(objtree)/modules.order $(MODLIB)/ - @cp -f $(objtree)/modules.builtin $(MODLIB)/ - $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst - ---- a/scripts/Makefile.build -+++ b/scripts/Makefile.build -@@ -78,7 +78,7 @@ modorder-target := $(obj)/modules.order - # We keep a list of all modules in $(MODVERDIR) - - __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ -- $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \ -+ $(if $(KBUILD_MODULES),$(obj-m)) \ - $(subdir-ym) $(always) - @: - diff --git a/target/linux/generic/hack-4.19/210-darwin_scripts_include.patch b/target/linux/generic/hack-4.19/210-darwin_scripts_include.patch deleted file mode 100644 index be6adc0d11..0000000000 --- a/target/linux/generic/hack-4.19/210-darwin_scripts_include.patch +++ /dev/null @@ -1,3053 +0,0 @@ -From db7c30dcd9a0391bf13b62c9f91e144d762ef43a Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Fri, 7 Jul 2017 17:00:49 +0200 -Subject: Add an OSX specific patch to make the kernel be compiled - -lede-commit: 3fc2a24f0422b2f55f9ed43f116db3111f700526 -Signed-off-by: Florian Fainelli ---- - scripts/kconfig/Makefile | 3 + - scripts/mod/elf.h | 3007 ++++++++++++++++++++++++++++++++++++++++++++ - scripts/mod/mk_elfconfig.c | 4 + - scripts/mod/modpost.h | 4 + - 4 files changed, 3018 insertions(+) - create mode 100644 scripts/mod/elf.h - ---- /dev/null -+++ b/scripts/mod/elf.h -@@ -0,0 +1,3007 @@ -+/* This file defines standard ELF types, structures, and macros. -+ Copyright (C) 1995-2012 Free Software Foundation, Inc. -+ This file is part of the GNU C Library. -+ -+ The GNU C Library is free software; you can redistribute it and/or -+ modify it under the terms of the GNU Lesser General Public -+ License as published by the Free Software Foundation; either -+ version 2.1 of the License, or (at your option) any later version. -+ -+ The GNU C Library is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ Lesser General Public License for more details. -+ -+ You should have received a copy of the GNU Lesser General Public -+ License along with the GNU C Library; if not, see -+ . */ -+ -+#ifndef _ELF_H -+#define _ELF_H 1 -+ -+/* Standard ELF types. */ -+ -+#include -+ -+/* Type for a 16-bit quantity. */ -+typedef uint16_t Elf32_Half; -+typedef uint16_t Elf64_Half; -+ -+/* Types for signed and unsigned 32-bit quantities. */ -+typedef uint32_t Elf32_Word; -+typedef int32_t Elf32_Sword; -+typedef uint32_t Elf64_Word; -+typedef int32_t Elf64_Sword; -+ -+/* Types for signed and unsigned 64-bit quantities. */ -+typedef uint64_t Elf32_Xword; -+typedef int64_t Elf32_Sxword; -+typedef uint64_t Elf64_Xword; -+typedef int64_t Elf64_Sxword; -+ -+/* Type of addresses. */ -+typedef uint32_t Elf32_Addr; -+typedef uint64_t Elf64_Addr; -+ -+/* Type of file offsets. */ -+typedef uint32_t Elf32_Off; -+typedef uint64_t Elf64_Off; -+ -+/* Type for section indices, which are 16-bit quantities. */ -+typedef uint16_t Elf32_Section; -+typedef uint16_t Elf64_Section; -+ -+/* Type for version symbol information. */ -+typedef Elf32_Half Elf32_Versym; -+typedef Elf64_Half Elf64_Versym; -+ -+ -+/* The ELF file header. This appears at the start of every ELF file. */ -+ -+#define EI_NIDENT (16) -+ -+typedef struct -+{ -+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */ -+ Elf32_Half e_type; /* Object file type */ -+ Elf32_Half e_machine; /* Architecture */ -+ Elf32_Word e_version; /* Object file version */ -+ Elf32_Addr e_entry; /* Entry point virtual address */ -+ Elf32_Off e_phoff; /* Program header table file offset */ -+ Elf32_Off e_shoff; /* Section header table file offset */ -+ Elf32_Word e_flags; /* Processor-specific flags */ -+ Elf32_Half e_ehsize; /* ELF header size in bytes */ -+ Elf32_Half e_phentsize; /* Program header table entry size */ -+ Elf32_Half e_phnum; /* Program header table entry count */ -+ Elf32_Half e_shentsize; /* Section header table entry size */ -+ Elf32_Half e_shnum; /* Section header table entry count */ -+ Elf32_Half e_shstrndx; /* Section header string table index */ -+} Elf32_Ehdr; -+ -+typedef struct -+{ -+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */ -+ Elf64_Half e_type; /* Object file type */ -+ Elf64_Half e_machine; /* Architecture */ -+ Elf64_Word e_version; /* Object file version */ -+ Elf64_Addr e_entry; /* Entry point virtual address */ -+ Elf64_Off e_phoff; /* Program header table file offset */ -+ Elf64_Off e_shoff; /* Section header table file offset */ -+ Elf64_Word e_flags; /* Processor-specific flags */ -+ Elf64_Half e_ehsize; /* ELF header size in bytes */ -+ Elf64_Half e_phentsize; /* Program header table entry size */ -+ Elf64_Half e_phnum; /* Program header table entry count */ -+ Elf64_Half e_shentsize; /* Section header table entry size */ -+ Elf64_Half e_shnum; /* Section header table entry count */ -+ Elf64_Half e_shstrndx; /* Section header string table index */ -+} Elf64_Ehdr; -+ -+/* Fields in the e_ident array. The EI_* macros are indices into the -+ array. The macros under each EI_* macro are the values the byte -+ may have. */ -+ -+#define EI_MAG0 0 /* File identification byte 0 index */ -+#define ELFMAG0 0x7f /* Magic number byte 0 */ -+ -+#define EI_MAG1 1 /* File identification byte 1 index */ -+#define ELFMAG1 'E' /* Magic number byte 1 */ -+ -+#define EI_MAG2 2 /* File identification byte 2 index */ -+#define ELFMAG2 'L' /* Magic number byte 2 */ -+ -+#define EI_MAG3 3 /* File identification byte 3 index */ -+#define ELFMAG3 'F' /* Magic number byte 3 */ -+ -+/* Conglomeration of the identification bytes, for easy testing as a word. */ -+#define ELFMAG "\177ELF" -+#define SELFMAG 4 -+ -+#define EI_CLASS 4 /* File class byte index */ -+#define ELFCLASSNONE 0 /* Invalid class */ -+#define ELFCLASS32 1 /* 32-bit objects */ -+#define ELFCLASS64 2 /* 64-bit objects */ -+#define ELFCLASSNUM 3 -+ -+#define EI_DATA 5 /* Data encoding byte index */ -+#define ELFDATANONE 0 /* Invalid data encoding */ -+#define ELFDATA2LSB 1 /* 2's complement, little endian */ -+#define ELFDATA2MSB 2 /* 2's complement, big endian */ -+#define ELFDATANUM 3 -+ -+#define EI_VERSION 6 /* File version byte index */ -+ /* Value must be EV_CURRENT */ -+ -+#define EI_OSABI 7 /* OS ABI identification */ -+#define ELFOSABI_NONE 0 /* UNIX System V ABI */ -+#define ELFOSABI_SYSV 0 /* Alias. */ -+#define ELFOSABI_HPUX 1 /* HP-UX */ -+#define ELFOSABI_NETBSD 2 /* NetBSD. */ -+#define ELFOSABI_GNU 3 /* Object uses GNU ELF extensions. */ -+#define ELFOSABI_LINUX ELFOSABI_GNU /* Compatibility alias. */ -+#define ELFOSABI_SOLARIS 6 /* Sun Solaris. */ -+#define ELFOSABI_AIX 7 /* IBM AIX. */ -+#define ELFOSABI_IRIX 8 /* SGI Irix. */ -+#define ELFOSABI_FREEBSD 9 /* FreeBSD. */ -+#define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */ -+#define ELFOSABI_MODESTO 11 /* Novell Modesto. */ -+#define ELFOSABI_OPENBSD 12 /* OpenBSD. */ -+#define ELFOSABI_ARM_AEABI 64 /* ARM EABI */ -+#define ELFOSABI_ARM 97 /* ARM */ -+#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ -+ -+#define EI_ABIVERSION 8 /* ABI version */ -+ -+#define EI_PAD 9 /* Byte index of padding bytes */ -+ -+/* Legal values for e_type (object file type). */ -+ -+#define ET_NONE 0 /* No file type */ -+#define ET_REL 1 /* Relocatable file */ -+#define ET_EXEC 2 /* Executable file */ -+#define ET_DYN 3 /* Shared object file */ -+#define ET_CORE 4 /* Core file */ -+#define ET_NUM 5 /* Number of defined types */ -+#define ET_LOOS 0xfe00 /* OS-specific range start */ -+#define ET_HIOS 0xfeff /* OS-specific range end */ -+#define ET_LOPROC 0xff00 /* Processor-specific range start */ -+#define ET_HIPROC 0xffff /* Processor-specific range end */ -+ -+/* Legal values for e_machine (architecture). */ -+ -+#define EM_NONE 0 /* No machine */ -+#define EM_M32 1 /* AT&T WE 32100 */ -+#define EM_SPARC 2 /* SUN SPARC */ -+#define EM_386 3 /* Intel 80386 */ -+#define EM_68K 4 /* Motorola m68k family */ -+#define EM_88K 5 /* Motorola m88k family */ -+#define EM_860 7 /* Intel 80860 */ -+#define EM_MIPS 8 /* MIPS R3000 big-endian */ -+#define EM_S370 9 /* IBM System/370 */ -+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */ -+ -+#define EM_PARISC 15 /* HPPA */ -+#define EM_VPP500 17 /* Fujitsu VPP500 */ -+#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ -+#define EM_960 19 /* Intel 80960 */ -+#define EM_PPC 20 /* PowerPC */ -+#define EM_PPC64 21 /* PowerPC 64-bit */ -+#define EM_S390 22 /* IBM S390 */ -+ -+#define EM_V800 36 /* NEC V800 series */ -+#define EM_FR20 37 /* Fujitsu FR20 */ -+#define EM_RH32 38 /* TRW RH-32 */ -+#define EM_RCE 39 /* Motorola RCE */ -+#define EM_ARM 40 /* ARM */ -+#define EM_FAKE_ALPHA 41 /* Digital Alpha */ -+#define EM_SH 42 /* Hitachi SH */ -+#define EM_SPARCV9 43 /* SPARC v9 64-bit */ -+#define EM_TRICORE 44 /* Siemens Tricore */ -+#define EM_ARC 45 /* Argonaut RISC Core */ -+#define EM_H8_300 46 /* Hitachi H8/300 */ -+#define EM_H8_300H 47 /* Hitachi H8/300H */ -+#define EM_H8S 48 /* Hitachi H8S */ -+#define EM_H8_500 49 /* Hitachi H8/500 */ -+#define EM_IA_64 50 /* Intel Merced */ -+#define EM_MIPS_X 51 /* Stanford MIPS-X */ -+#define EM_COLDFIRE 52 /* Motorola Coldfire */ -+#define EM_68HC12 53 /* Motorola M68HC12 */ -+#define EM_MMA 54 /* Fujitsu MMA Multimedia Accelerator*/ -+#define EM_PCP 55 /* Siemens PCP */ -+#define EM_NCPU 56 /* Sony nCPU embeeded RISC */ -+#define EM_NDR1 57 /* Denso NDR1 microprocessor */ -+#define EM_STARCORE 58 /* Motorola Start*Core processor */ -+#define EM_ME16 59 /* Toyota ME16 processor */ -+#define EM_ST100 60 /* STMicroelectronic ST100 processor */ -+#define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/ -+#define EM_X86_64 62 /* AMD x86-64 architecture */ -+#define EM_PDSP 63 /* Sony DSP Processor */ -+ -+#define EM_FX66 66 /* Siemens FX66 microcontroller */ -+#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */ -+#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */ -+#define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */ -+#define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */ -+#define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */ -+#define EM_68HC05 72 /* Motorola MC68HC05 microcontroller */ -+#define EM_SVX 73 /* Silicon Graphics SVx */ -+#define EM_ST19 74 /* STMicroelectronics ST19 8 bit mc */ -+#define EM_VAX 75 /* Digital VAX */ -+#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ -+#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded processor */ -+#define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */ -+#define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */ -+#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */ -+#define EM_HUANY 81 /* Harvard University machine-independent object files */ -+#define EM_PRISM 82 /* SiTera Prism */ -+#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */ -+#define EM_FR30 84 /* Fujitsu FR30 */ -+#define EM_D10V 85 /* Mitsubishi D10V */ -+#define EM_D30V 86 /* Mitsubishi D30V */ -+#define EM_V850 87 /* NEC v850 */ -+#define EM_M32R 88 /* Mitsubishi M32R */ -+#define EM_MN10300 89 /* Matsushita MN10300 */ -+#define EM_MN10200 90 /* Matsushita MN10200 */ -+#define EM_PJ 91 /* picoJava */ -+#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */ -+#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ -+#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ -+#define EM_TILEPRO 188 /* Tilera TILEPro */ -+#define EM_TILEGX 191 /* Tilera TILE-Gx */ -+#define EM_NUM 192 -+ -+/* If it is necessary to assign new unofficial EM_* values, please -+ pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the -+ chances of collision with official or non-GNU unofficial values. */ -+ -+#define EM_ALPHA 0x9026 -+ -+/* Legal values for e_version (version). */ -+ -+#define EV_NONE 0 /* Invalid ELF version */ -+#define EV_CURRENT 1 /* Current version */ -+#define EV_NUM 2 -+ -+/* Section header. */ -+ -+typedef struct -+{ -+ Elf32_Word sh_name; /* Section name (string tbl index) */ -+ Elf32_Word sh_type; /* Section type */ -+ Elf32_Word sh_flags; /* Section flags */ -+ Elf32_Addr sh_addr; /* Section virtual addr at execution */ -+ Elf32_Off sh_offset; /* Section file offset */ -+ Elf32_Word sh_size; /* Section size in bytes */ -+ Elf32_Word sh_link; /* Link to another section */ -+ Elf32_Word sh_info; /* Additional section information */ -+ Elf32_Word sh_addralign; /* Section alignment */ -+ Elf32_Word sh_entsize; /* Entry size if section holds table */ -+} Elf32_Shdr; -+ -+typedef struct -+{ -+ Elf64_Word sh_name; /* Section name (string tbl index) */ -+ Elf64_Word sh_type; /* Section type */ -+ Elf64_Xword sh_flags; /* Section flags */ -+ Elf64_Addr sh_addr; /* Section virtual addr at execution */ -+ Elf64_Off sh_offset; /* Section file offset */ -+ Elf64_Xword sh_size; /* Section size in bytes */ -+ Elf64_Word sh_link; /* Link to another section */ -+ Elf64_Word sh_info; /* Additional section information */ -+ Elf64_Xword sh_addralign; /* Section alignment */ -+ Elf64_Xword sh_entsize; /* Entry size if section holds table */ -+} Elf64_Shdr; -+ -+/* Special section indices. */ -+ -+#define SHN_UNDEF 0 /* Undefined section */ -+#define SHN_LORESERVE 0xff00 /* Start of reserved indices */ -+#define SHN_LOPROC 0xff00 /* Start of processor-specific */ -+#define SHN_BEFORE 0xff00 /* Order section before all others -+ (Solaris). */ -+#define SHN_AFTER 0xff01 /* Order section after all others -+ (Solaris). */ -+#define SHN_HIPROC 0xff1f /* End of processor-specific */ -+#define SHN_LOOS 0xff20 /* Start of OS-specific */ -+#define SHN_HIOS 0xff3f /* End of OS-specific */ -+#define SHN_ABS 0xfff1 /* Associated symbol is absolute */ -+#define SHN_COMMON 0xfff2 /* Associated symbol is common */ -+#define SHN_XINDEX 0xffff /* Index is in extra table. */ -+#define SHN_HIRESERVE 0xffff /* End of reserved indices */ -+ -+/* Legal values for sh_type (section type). */ -+ -+#define SHT_NULL 0 /* Section header table entry unused */ -+#define SHT_PROGBITS 1 /* Program data */ -+#define SHT_SYMTAB 2 /* Symbol table */ -+#define SHT_STRTAB 3 /* String table */ -+#define SHT_RELA 4 /* Relocation entries with addends */ -+#define SHT_HASH 5 /* Symbol hash table */ -+#define SHT_DYNAMIC 6 /* Dynamic linking information */ -+#define SHT_NOTE 7 /* Notes */ -+#define SHT_NOBITS 8 /* Program space with no data (bss) */ -+#define SHT_REL 9 /* Relocation entries, no addends */ -+#define SHT_SHLIB 10 /* Reserved */ -+#define SHT_DYNSYM 11 /* Dynamic linker symbol table */ -+#define SHT_INIT_ARRAY 14 /* Array of constructors */ -+#define SHT_FINI_ARRAY 15 /* Array of destructors */ -+#define SHT_PREINIT_ARRAY 16 /* Array of pre-constructors */ -+#define SHT_GROUP 17 /* Section group */ -+#define SHT_SYMTAB_SHNDX 18 /* Extended section indeces */ -+#define SHT_NUM 19 /* Number of defined types. */ -+#define SHT_LOOS 0x60000000 /* Start OS-specific. */ -+#define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes. */ -+#define SHT_GNU_HASH 0x6ffffff6 /* GNU-style hash table. */ -+#define SHT_GNU_LIBLIST 0x6ffffff7 /* Prelink library list */ -+#define SHT_CHECKSUM 0x6ffffff8 /* Checksum for DSO content. */ -+#define SHT_LOSUNW 0x6ffffffa /* Sun-specific low bound. */ -+#define SHT_SUNW_move 0x6ffffffa -+#define SHT_SUNW_COMDAT 0x6ffffffb -+#define SHT_SUNW_syminfo 0x6ffffffc -+#define SHT_GNU_verdef 0x6ffffffd /* Version definition section. */ -+#define SHT_GNU_verneed 0x6ffffffe /* Version needs section. */ -+#define SHT_GNU_versym 0x6fffffff /* Version symbol table. */ -+#define SHT_HISUNW 0x6fffffff /* Sun-specific high bound. */ -+#define SHT_HIOS 0x6fffffff /* End OS-specific type */ -+#define SHT_LOPROC 0x70000000 /* Start of processor-specific */ -+#define SHT_HIPROC 0x7fffffff /* End of processor-specific */ -+#define SHT_LOUSER 0x80000000 /* Start of application-specific */ -+#define SHT_HIUSER 0x8fffffff /* End of application-specific */ -+ -+/* Legal values for sh_flags (section flags). */ -+ -+#define SHF_WRITE (1 << 0) /* Writable */ -+#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */ -+#define SHF_EXECINSTR (1 << 2) /* Executable */ -+#define SHF_MERGE (1 << 4) /* Might be merged */ -+#define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */ -+#define SHF_INFO_LINK (1 << 6) /* `sh_info' contains SHT index */ -+#define SHF_LINK_ORDER (1 << 7) /* Preserve order after combining */ -+#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling -+ required */ -+#define SHF_GROUP (1 << 9) /* Section is member of a group. */ -+#define SHF_TLS (1 << 10) /* Section hold thread-local data. */ -+#define SHF_MASKOS 0x0ff00000 /* OS-specific. */ -+#define SHF_MASKPROC 0xf0000000 /* Processor-specific */ -+#define SHF_ORDERED (1 << 30) /* Special ordering requirement -+ (Solaris). */ -+#define SHF_EXCLUDE (1 << 31) /* Section is excluded unless -+ referenced or allocated (Solaris).*/ -+ -+/* Section group handling. */ -+#define GRP_COMDAT 0x1 /* Mark group as COMDAT. */ -+ -+/* Symbol table entry. */ -+ -+typedef struct -+{ -+ Elf32_Word st_name; /* Symbol name (string tbl index) */ -+ Elf32_Addr st_value; /* Symbol value */ -+ Elf32_Word st_size; /* Symbol size */ -+ unsigned char st_info; /* Symbol type and binding */ -+ unsigned char st_other; /* Symbol visibility */ -+ Elf32_Section st_shndx; /* Section index */ -+} Elf32_Sym; -+ -+typedef struct -+{ -+ Elf64_Word st_name; /* Symbol name (string tbl index) */ -+ unsigned char st_info; /* Symbol type and binding */ -+ unsigned char st_other; /* Symbol visibility */ -+ Elf64_Section st_shndx; /* Section index */ -+ Elf64_Addr st_value; /* Symbol value */ -+ Elf64_Xword st_size; /* Symbol size */ -+} Elf64_Sym; -+ -+/* The syminfo section if available contains additional information about -+ every dynamic symbol. */ -+ -+typedef struct -+{ -+ Elf32_Half si_boundto; /* Direct bindings, symbol bound to */ -+ Elf32_Half si_flags; /* Per symbol flags */ -+} Elf32_Syminfo; -+ -+typedef struct -+{ -+ Elf64_Half si_boundto; /* Direct bindings, symbol bound to */ -+ Elf64_Half si_flags; /* Per symbol flags */ -+} Elf64_Syminfo; -+ -+/* Possible values for si_boundto. */ -+#define SYMINFO_BT_SELF 0xffff /* Symbol bound to self */ -+#define SYMINFO_BT_PARENT 0xfffe /* Symbol bound to parent */ -+#define SYMINFO_BT_LOWRESERVE 0xff00 /* Beginning of reserved entries */ -+ -+/* Possible bitmasks for si_flags. */ -+#define SYMINFO_FLG_DIRECT 0x0001 /* Direct bound symbol */ -+#define SYMINFO_FLG_PASSTHRU 0x0002 /* Pass-thru symbol for translator */ -+#define SYMINFO_FLG_COPY 0x0004 /* Symbol is a copy-reloc */ -+#define SYMINFO_FLG_LAZYLOAD 0x0008 /* Symbol bound to object to be lazy -+ loaded */ -+/* Syminfo version values. */ -+#define SYMINFO_NONE 0 -+#define SYMINFO_CURRENT 1 -+#define SYMINFO_NUM 2 -+ -+ -+/* How to extract and insert information held in the st_info field. */ -+ -+#define ELF32_ST_BIND(val) (((unsigned char) (val)) >> 4) -+#define ELF32_ST_TYPE(val) ((val) & 0xf) -+#define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf)) -+ -+/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field. */ -+#define ELF64_ST_BIND(val) ELF32_ST_BIND (val) -+#define ELF64_ST_TYPE(val) ELF32_ST_TYPE (val) -+#define ELF64_ST_INFO(bind, type) ELF32_ST_INFO ((bind), (type)) -+ -+/* Legal values for ST_BIND subfield of st_info (symbol binding). */ -+ -+#define STB_LOCAL 0 /* Local symbol */ -+#define STB_GLOBAL 1 /* Global symbol */ -+#define STB_WEAK 2 /* Weak symbol */ -+#define STB_NUM 3 /* Number of defined types. */ -+#define STB_LOOS 10 /* Start of OS-specific */ -+#define STB_GNU_UNIQUE 10 /* Unique symbol. */ -+#define STB_HIOS 12 /* End of OS-specific */ -+#define STB_LOPROC 13 /* Start of processor-specific */ -+#define STB_HIPROC 15 /* End of processor-specific */ -+ -+/* Legal values for ST_TYPE subfield of st_info (symbol type). */ -+ -+#define STT_NOTYPE 0 /* Symbol type is unspecified */ -+#define STT_OBJECT 1 /* Symbol is a data object */ -+#define STT_FUNC 2 /* Symbol is a code object */ -+#define STT_SECTION 3 /* Symbol associated with a section */ -+#define STT_FILE 4 /* Symbol's name is file name */ -+#define STT_COMMON 5 /* Symbol is a common data object */ -+#define STT_TLS 6 /* Symbol is thread-local data object*/ -+#define STT_NUM 7 /* Number of defined types. */ -+#define STT_LOOS 10 /* Start of OS-specific */ -+#define STT_GNU_IFUNC 10 /* Symbol is indirect code object */ -+#define STT_HIOS 12 /* End of OS-specific */ -+#define STT_LOPROC 13 /* Start of processor-specific */ -+#define STT_HIPROC 15 /* End of processor-specific */ -+ -+ -+/* Symbol table indices are found in the hash buckets and chain table -+ of a symbol hash table section. This special index value indicates -+ the end of a chain, meaning no further symbols are found in that bucket. */ -+ -+#define STN_UNDEF 0 /* End of a chain. */ -+ -+ -+/* How to extract and insert information held in the st_other field. */ -+ -+#define ELF32_ST_VISIBILITY(o) ((o) & 0x03) -+ -+/* For ELF64 the definitions are the same. */ -+#define ELF64_ST_VISIBILITY(o) ELF32_ST_VISIBILITY (o) -+ -+/* Symbol visibility specification encoded in the st_other field. */ -+#define STV_DEFAULT 0 /* Default symbol visibility rules */ -+#define STV_INTERNAL 1 /* Processor specific hidden class */ -+#define STV_HIDDEN 2 /* Sym unavailable in other modules */ -+#define STV_PROTECTED 3 /* Not preemptible, not exported */ -+ -+ -+/* Relocation table entry without addend (in section of type SHT_REL). */ -+ -+typedef struct -+{ -+ Elf32_Addr r_offset; /* Address */ -+ Elf32_Word r_info; /* Relocation type and symbol index */ -+} Elf32_Rel; -+ -+/* I have seen two different definitions of the Elf64_Rel and -+ Elf64_Rela structures, so we'll leave them out until Novell (or -+ whoever) gets their act together. */ -+/* The following, at least, is used on Sparc v9, MIPS, and Alpha. */ -+ -+typedef struct -+{ -+ Elf64_Addr r_offset; /* Address */ -+ Elf64_Xword r_info; /* Relocation type and symbol index */ -+} Elf64_Rel; -+ -+/* Relocation table entry with addend (in section of type SHT_RELA). */ -+ -+typedef struct -+{ -+ Elf32_Addr r_offset; /* Address */ -+ Elf32_Word r_info; /* Relocation type and symbol index */ -+ Elf32_Sword r_addend; /* Addend */ -+} Elf32_Rela; -+ -+typedef struct -+{ -+ Elf64_Addr r_offset; /* Address */ -+ Elf64_Xword r_info; /* Relocation type and symbol index */ -+ Elf64_Sxword r_addend; /* Addend */ -+} Elf64_Rela; -+ -+/* How to extract and insert information held in the r_info field. */ -+ -+#define ELF32_R_SYM(val) ((val) >> 8) -+#define ELF32_R_TYPE(val) ((val) & 0xff) -+#define ELF32_R_INFO(sym, type) (((sym) << 8) + ((type) & 0xff)) -+ -+#define ELF64_R_SYM(i) ((i) >> 32) -+#define ELF64_R_TYPE(i) ((i) & 0xffffffff) -+#define ELF64_R_INFO(sym,type) ((((Elf64_Xword) (sym)) << 32) + (type)) -+ -+/* Program segment header. */ -+ -+typedef struct -+{ -+ Elf32_Word p_type; /* Segment type */ -+ Elf32_Off p_offset; /* Segment file offset */ -+ Elf32_Addr p_vaddr; /* Segment virtual address */ -+ Elf32_Addr p_paddr; /* Segment physical address */ -+ Elf32_Word p_filesz; /* Segment size in file */ -+ Elf32_Word p_memsz; /* Segment size in memory */ -+ Elf32_Word p_flags; /* Segment flags */ -+ Elf32_Word p_align; /* Segment alignment */ -+} Elf32_Phdr; -+ -+typedef struct -+{ -+ Elf64_Word p_type; /* Segment type */ -+ Elf64_Word p_flags; /* Segment flags */ -+ Elf64_Off p_offset; /* Segment file offset */ -+ Elf64_Addr p_vaddr; /* Segment virtual address */ -+ Elf64_Addr p_paddr; /* Segment physical address */ -+ Elf64_Xword p_filesz; /* Segment size in file */ -+ Elf64_Xword p_memsz; /* Segment size in memory */ -+ Elf64_Xword p_align; /* Segment alignment */ -+} Elf64_Phdr; -+ -+/* Special value for e_phnum. This indicates that the real number of -+ program headers is too large to fit into e_phnum. Instead the real -+ value is in the field sh_info of section 0. */ -+ -+#define PN_XNUM 0xffff -+ -+/* Legal values for p_type (segment type). */ -+ -+#define PT_NULL 0 /* Program header table entry unused */ -+#define PT_LOAD 1 /* Loadable program segment */ -+#define PT_DYNAMIC 2 /* Dynamic linking information */ -+#define PT_INTERP 3 /* Program interpreter */ -+#define PT_NOTE 4 /* Auxiliary information */ -+#define PT_SHLIB 5 /* Reserved */ -+#define PT_PHDR 6 /* Entry for header table itself */ -+#define PT_TLS 7 /* Thread-local storage segment */ -+#define PT_NUM 8 /* Number of defined types */ -+#define PT_LOOS 0x60000000 /* Start of OS-specific */ -+#define PT_GNU_EH_FRAME 0x6474e550 /* GCC .eh_frame_hdr segment */ -+#define PT_GNU_STACK 0x6474e551 /* Indicates stack executability */ -+#define PT_GNU_RELRO 0x6474e552 /* Read-only after relocation */ -+#define PT_LOSUNW 0x6ffffffa -+#define PT_SUNWBSS 0x6ffffffa /* Sun Specific segment */ -+#define PT_SUNWSTACK 0x6ffffffb /* Stack segment */ -+#define PT_HISUNW 0x6fffffff -+#define PT_HIOS 0x6fffffff /* End of OS-specific */ -+#define PT_LOPROC 0x70000000 /* Start of processor-specific */ -+#define PT_HIPROC 0x7fffffff /* End of processor-specific */ -+ -+/* Legal values for p_flags (segment flags). */ -+ -+#define PF_X (1 << 0) /* Segment is executable */ -+#define PF_W (1 << 1) /* Segment is writable */ -+#define PF_R (1 << 2) /* Segment is readable */ -+#define PF_MASKOS 0x0ff00000 /* OS-specific */ -+#define PF_MASKPROC 0xf0000000 /* Processor-specific */ -+ -+/* Legal values for note segment descriptor types for core files. */ -+ -+#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */ -+#define NT_FPREGSET 2 /* Contains copy of fpregset struct */ -+#define NT_PRPSINFO 3 /* Contains copy of prpsinfo struct */ -+#define NT_PRXREG 4 /* Contains copy of prxregset struct */ -+#define NT_TASKSTRUCT 4 /* Contains copy of task structure */ -+#define NT_PLATFORM 5 /* String from sysinfo(SI_PLATFORM) */ -+#define NT_AUXV 6 /* Contains copy of auxv array */ -+#define NT_GWINDOWS 7 /* Contains copy of gwindows struct */ -+#define NT_ASRS 8 /* Contains copy of asrset struct */ -+#define NT_PSTATUS 10 /* Contains copy of pstatus struct */ -+#define NT_PSINFO 13 /* Contains copy of psinfo struct */ -+#define NT_PRCRED 14 /* Contains copy of prcred struct */ -+#define NT_UTSNAME 15 /* Contains copy of utsname struct */ -+#define NT_LWPSTATUS 16 /* Contains copy of lwpstatus struct */ -+#define NT_LWPSINFO 17 /* Contains copy of lwpinfo struct */ -+#define NT_PRFPXREG 20 /* Contains copy of fprxregset struct */ -+#define NT_PRXFPREG 0x46e62b7f /* Contains copy of user_fxsr_struct */ -+#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */ -+#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */ -+#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */ -+#define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */ -+#define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */ -+#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */ -+ -+/* Legal values for the note segment descriptor types for object files. */ -+ -+#define NT_VERSION 1 /* Contains a version string. */ -+ -+ -+/* Dynamic section entry. */ -+ -+typedef struct -+{ -+ Elf32_Sword d_tag; /* Dynamic entry type */ -+ union -+ { -+ Elf32_Word d_val; /* Integer value */ -+ Elf32_Addr d_ptr; /* Address value */ -+ } d_un; -+} Elf32_Dyn; -+ -+typedef struct -+{ -+ Elf64_Sxword d_tag; /* Dynamic entry type */ -+ union -+ { -+ Elf64_Xword d_val; /* Integer value */ -+ Elf64_Addr d_ptr; /* Address value */ -+ } d_un; -+} Elf64_Dyn; -+ -+/* Legal values for d_tag (dynamic entry type). */ -+ -+#define DT_NULL 0 /* Marks end of dynamic section */ -+#define DT_NEEDED 1 /* Name of needed library */ -+#define DT_PLTRELSZ 2 /* Size in bytes of PLT relocs */ -+#define DT_PLTGOT 3 /* Processor defined value */ -+#define DT_HASH 4 /* Address of symbol hash table */ -+#define DT_STRTAB 5 /* Address of string table */ -+#define DT_SYMTAB 6 /* Address of symbol table */ -+#define DT_RELA 7 /* Address of Rela relocs */ -+#define DT_RELASZ 8 /* Total size of Rela relocs */ -+#define DT_RELAENT 9 /* Size of one Rela reloc */ -+#define DT_STRSZ 10 /* Size of string table */ -+#define DT_SYMENT 11 /* Size of one symbol table entry */ -+#define DT_INIT 12 /* Address of init function */ -+#define DT_FINI 13 /* Address of termination function */ -+#define DT_SONAME 14 /* Name of shared object */ -+#define DT_RPATH 15 /* Library search path (deprecated) */ -+#define DT_SYMBOLIC 16 /* Start symbol search here */ -+#define DT_REL 17 /* Address of Rel relocs */ -+#define DT_RELSZ 18 /* Total size of Rel relocs */ -+#define DT_RELENT 19 /* Size of one Rel reloc */ -+#define DT_PLTREL 20 /* Type of reloc in PLT */ -+#define DT_DEBUG 21 /* For debugging; unspecified */ -+#define DT_TEXTREL 22 /* Reloc might modify .text */ -+#define DT_JMPREL 23 /* Address of PLT relocs */ -+#define DT_BIND_NOW 24 /* Process relocations of object */ -+#define DT_INIT_ARRAY 25 /* Array with addresses of init fct */ -+#define DT_FINI_ARRAY 26 /* Array with addresses of fini fct */ -+#define DT_INIT_ARRAYSZ 27 /* Size in bytes of DT_INIT_ARRAY */ -+#define DT_FINI_ARRAYSZ 28 /* Size in bytes of DT_FINI_ARRAY */ -+#define DT_RUNPATH 29 /* Library search path */ -+#define DT_FLAGS 30 /* Flags for the object being loaded */ -+#define DT_ENCODING 32 /* Start of encoded range */ -+#define DT_PREINIT_ARRAY 32 /* Array with addresses of preinit fct*/ -+#define DT_PREINIT_ARRAYSZ 33 /* size in bytes of DT_PREINIT_ARRAY */ -+#define DT_NUM 34 /* Number used */ -+#define DT_LOOS 0x6000000d /* Start of OS-specific */ -+#define DT_HIOS 0x6ffff000 /* End of OS-specific */ -+#define DT_LOPROC 0x70000000 /* Start of processor-specific */ -+#define DT_HIPROC 0x7fffffff /* End of processor-specific */ -+#define DT_PROCNUM DT_MIPS_NUM /* Most used by any processor */ -+ -+/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the -+ Dyn.d_un.d_val field of the Elf*_Dyn structure. This follows Sun's -+ approach. */ -+#define DT_VALRNGLO 0x6ffffd00 -+#define DT_GNU_PRELINKED 0x6ffffdf5 /* Prelinking timestamp */ -+#define DT_GNU_CONFLICTSZ 0x6ffffdf6 /* Size of conflict section */ -+#define DT_GNU_LIBLISTSZ 0x6ffffdf7 /* Size of library list */ -+#define DT_CHECKSUM 0x6ffffdf8 -+#define DT_PLTPADSZ 0x6ffffdf9 -+#define DT_MOVEENT 0x6ffffdfa -+#define DT_MOVESZ 0x6ffffdfb -+#define DT_FEATURE_1 0x6ffffdfc /* Feature selection (DTF_*). */ -+#define DT_POSFLAG_1 0x6ffffdfd /* Flags for DT_* entries, effecting -+ the following DT_* entry. */ -+#define DT_SYMINSZ 0x6ffffdfe /* Size of syminfo table (in bytes) */ -+#define DT_SYMINENT 0x6ffffdff /* Entry size of syminfo */ -+#define DT_VALRNGHI 0x6ffffdff -+#define DT_VALTAGIDX(tag) (DT_VALRNGHI - (tag)) /* Reverse order! */ -+#define DT_VALNUM 12 -+ -+/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the -+ Dyn.d_un.d_ptr field of the Elf*_Dyn structure. -+ -+ If any adjustment is made to the ELF object after it has been -+ built these entries will need to be adjusted. */ -+#define DT_ADDRRNGLO 0x6ffffe00 -+#define DT_GNU_HASH 0x6ffffef5 /* GNU-style hash table. */ -+#define DT_TLSDESC_PLT 0x6ffffef6 -+#define DT_TLSDESC_GOT 0x6ffffef7 -+#define DT_GNU_CONFLICT 0x6ffffef8 /* Start of conflict section */ -+#define DT_GNU_LIBLIST 0x6ffffef9 /* Library list */ -+#define DT_CONFIG 0x6ffffefa /* Configuration information. */ -+#define DT_DEPAUDIT 0x6ffffefb /* Dependency auditing. */ -+#define DT_AUDIT 0x6ffffefc /* Object auditing. */ -+#define DT_PLTPAD 0x6ffffefd /* PLT padding. */ -+#define DT_MOVETAB 0x6ffffefe /* Move table. */ -+#define DT_SYMINFO 0x6ffffeff /* Syminfo table. */ -+#define DT_ADDRRNGHI 0x6ffffeff -+#define DT_ADDRTAGIDX(tag) (DT_ADDRRNGHI - (tag)) /* Reverse order! */ -+#define DT_ADDRNUM 11 -+ -+/* The versioning entry types. The next are defined as part of the -+ GNU extension. */ -+#define DT_VERSYM 0x6ffffff0 -+ -+#define DT_RELACOUNT 0x6ffffff9 -+#define DT_RELCOUNT 0x6ffffffa -+ -+/* These were chosen by Sun. */ -+#define DT_FLAGS_1 0x6ffffffb /* State flags, see DF_1_* below. */ -+#define DT_VERDEF 0x6ffffffc /* Address of version definition -+ table */ -+#define DT_VERDEFNUM 0x6ffffffd /* Number of version definitions */ -+#define DT_VERNEED 0x6ffffffe /* Address of table with needed -+ versions */ -+#define DT_VERNEEDNUM 0x6fffffff /* Number of needed versions */ -+#define DT_VERSIONTAGIDX(tag) (DT_VERNEEDNUM - (tag)) /* Reverse order! */ -+#define DT_VERSIONTAGNUM 16 -+ -+/* Sun added these machine-independent extensions in the "processor-specific" -+ range. Be compatible. */ -+#define DT_AUXILIARY 0x7ffffffd /* Shared object to load before self */ -+#define DT_FILTER 0x7fffffff /* Shared object to get values from */ -+#define DT_EXTRATAGIDX(tag) ((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1) -+#define DT_EXTRANUM 3 -+ -+/* Values of `d_un.d_val' in the DT_FLAGS entry. */ -+#define DF_ORIGIN 0x00000001 /* Object may use DF_ORIGIN */ -+#define DF_SYMBOLIC 0x00000002 /* Symbol resolutions starts here */ -+#define DF_TEXTREL 0x00000004 /* Object contains text relocations */ -+#define DF_BIND_NOW 0x00000008 /* No lazy binding for this object */ -+#define DF_STATIC_TLS 0x00000010 /* Module uses the static TLS model */ -+ -+/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 -+ entry in the dynamic section. */ -+#define DF_1_NOW 0x00000001 /* Set RTLD_NOW for this object. */ -+#define DF_1_GLOBAL 0x00000002 /* Set RTLD_GLOBAL for this object. */ -+#define DF_1_GROUP 0x00000004 /* Set RTLD_GROUP for this object. */ -+#define DF_1_NODELETE 0x00000008 /* Set RTLD_NODELETE for this object.*/ -+#define DF_1_LOADFLTR 0x00000010 /* Trigger filtee loading at runtime.*/ -+#define DF_1_INITFIRST 0x00000020 /* Set RTLD_INITFIRST for this object*/ -+#define DF_1_NOOPEN 0x00000040 /* Set RTLD_NOOPEN for this object. */ -+#define DF_1_ORIGIN 0x00000080 /* $ORIGIN must be handled. */ -+#define DF_1_DIRECT 0x00000100 /* Direct binding enabled. */ -+#define DF_1_TRANS 0x00000200 -+#define DF_1_INTERPOSE 0x00000400 /* Object is used to interpose. */ -+#define DF_1_NODEFLIB 0x00000800 /* Ignore default lib search path. */ -+#define DF_1_NODUMP 0x00001000 /* Object can't be dldump'ed. */ -+#define DF_1_CONFALT 0x00002000 /* Configuration alternative created.*/ -+#define DF_1_ENDFILTEE 0x00004000 /* Filtee terminates filters search. */ -+#define DF_1_DISPRELDNE 0x00008000 /* Disp reloc applied at build time. */ -+#define DF_1_DISPRELPND 0x00010000 /* Disp reloc applied at run-time. */ -+ -+/* Flags for the feature selection in DT_FEATURE_1. */ -+#define DTF_1_PARINIT 0x00000001 -+#define DTF_1_CONFEXP 0x00000002 -+ -+/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry. */ -+#define DF_P1_LAZYLOAD 0x00000001 /* Lazyload following object. */ -+#define DF_P1_GROUPPERM 0x00000002 /* Symbols from next object are not -+ generally available. */ -+ -+/* Version definition sections. */ -+ -+typedef struct -+{ -+ Elf32_Half vd_version; /* Version revision */ -+ Elf32_Half vd_flags; /* Version information */ -+ Elf32_Half vd_ndx; /* Version Index */ -+ Elf32_Half vd_cnt; /* Number of associated aux entries */ -+ Elf32_Word vd_hash; /* Version name hash value */ -+ Elf32_Word vd_aux; /* Offset in bytes to verdaux array */ -+ Elf32_Word vd_next; /* Offset in bytes to next verdef -+ entry */ -+} Elf32_Verdef; -+ -+typedef struct -+{ -+ Elf64_Half vd_version; /* Version revision */ -+ Elf64_Half vd_flags; /* Version information */ -+ Elf64_Half vd_ndx; /* Version Index */ -+ Elf64_Half vd_cnt; /* Number of associated aux entries */ -+ Elf64_Word vd_hash; /* Version name hash value */ -+ Elf64_Word vd_aux; /* Offset in bytes to verdaux array */ -+ Elf64_Word vd_next; /* Offset in bytes to next verdef -+ entry */ -+} Elf64_Verdef; -+ -+ -+/* Legal values for vd_version (version revision). */ -+#define VER_DEF_NONE 0 /* No version */ -+#define VER_DEF_CURRENT 1 /* Current version */ -+#define VER_DEF_NUM 2 /* Given version number */ -+ -+/* Legal values for vd_flags (version information flags). */ -+#define VER_FLG_BASE 0x1 /* Version definition of file itself */ -+#define VER_FLG_WEAK 0x2 /* Weak version identifier */ -+ -+/* Versym symbol index values. */ -+#define VER_NDX_LOCAL 0 /* Symbol is local. */ -+#define VER_NDX_GLOBAL 1 /* Symbol is global. */ -+#define VER_NDX_LORESERVE 0xff00 /* Beginning of reserved entries. */ -+#define VER_NDX_ELIMINATE 0xff01 /* Symbol is to be eliminated. */ -+ -+/* Auxialiary version information. */ -+ -+typedef struct -+{ -+ Elf32_Word vda_name; /* Version or dependency names */ -+ Elf32_Word vda_next; /* Offset in bytes to next verdaux -+ entry */ -+} Elf32_Verdaux; -+ -+typedef struct -+{ -+ Elf64_Word vda_name; /* Version or dependency names */ -+ Elf64_Word vda_next; /* Offset in bytes to next verdaux -+ entry */ -+} Elf64_Verdaux; -+ -+ -+/* Version dependency section. */ -+ -+typedef struct -+{ -+ Elf32_Half vn_version; /* Version of structure */ -+ Elf32_Half vn_cnt; /* Number of associated aux entries */ -+ Elf32_Word vn_file; /* Offset of filename for this -+ dependency */ -+ Elf32_Word vn_aux; /* Offset in bytes to vernaux array */ -+ Elf32_Word vn_next; /* Offset in bytes to next verneed -+ entry */ -+} Elf32_Verneed; -+ -+typedef struct -+{ -+ Elf64_Half vn_version; /* Version of structure */ -+ Elf64_Half vn_cnt; /* Number of associated aux entries */ -+ Elf64_Word vn_file; /* Offset of filename for this -+ dependency */ -+ Elf64_Word vn_aux; /* Offset in bytes to vernaux array */ -+ Elf64_Word vn_next; /* Offset in bytes to next verneed -+ entry */ -+} Elf64_Verneed; -+ -+ -+/* Legal values for vn_version (version revision). */ -+#define VER_NEED_NONE 0 /* No version */ -+#define VER_NEED_CURRENT 1 /* Current version */ -+#define VER_NEED_NUM 2 /* Given version number */ -+ -+/* Auxiliary needed version information. */ -+ -+typedef struct -+{ -+ Elf32_Word vna_hash; /* Hash value of dependency name */ -+ Elf32_Half vna_flags; /* Dependency specific information */ -+ Elf32_Half vna_other; /* Unused */ -+ Elf32_Word vna_name; /* Dependency name string offset */ -+ Elf32_Word vna_next; /* Offset in bytes to next vernaux -+ entry */ -+} Elf32_Vernaux; -+ -+typedef struct -+{ -+ Elf64_Word vna_hash; /* Hash value of dependency name */ -+ Elf64_Half vna_flags; /* Dependency specific information */ -+ Elf64_Half vna_other; /* Unused */ -+ Elf64_Word vna_name; /* Dependency name string offset */ -+ Elf64_Word vna_next; /* Offset in bytes to next vernaux -+ entry */ -+} Elf64_Vernaux; -+ -+ -+/* Legal values for vna_flags. */ -+#define VER_FLG_WEAK 0x2 /* Weak version identifier */ -+ -+ -+/* Auxiliary vector. */ -+ -+/* This vector is normally only used by the program interpreter. The -+ usual definition in an ABI supplement uses the name auxv_t. The -+ vector is not usually defined in a standard file, but it -+ can't hurt. We rename it to avoid conflicts. The sizes of these -+ types are an arrangement between the exec server and the program -+ interpreter, so we don't fully specify them here. */ -+ -+typedef struct -+{ -+ uint32_t a_type; /* Entry type */ -+ union -+ { -+ uint32_t a_val; /* Integer value */ -+ /* We use to have pointer elements added here. We cannot do that, -+ though, since it does not work when using 32-bit definitions -+ on 64-bit platforms and vice versa. */ -+ } a_un; -+} Elf32_auxv_t; -+ -+typedef struct -+{ -+ uint64_t a_type; /* Entry type */ -+ union -+ { -+ uint64_t a_val; /* Integer value */ -+ /* We use to have pointer elements added here. We cannot do that, -+ though, since it does not work when using 32-bit definitions -+ on 64-bit platforms and vice versa. */ -+ } a_un; -+} Elf64_auxv_t; -+ -+/* Legal values for a_type (entry type). */ -+ -+#define AT_NULL 0 /* End of vector */ -+#define AT_IGNORE 1 /* Entry should be ignored */ -+#define AT_EXECFD 2 /* File descriptor of program */ -+#define AT_PHDR 3 /* Program headers for program */ -+#define AT_PHENT 4 /* Size of program header entry */ -+#define AT_PHNUM 5 /* Number of program headers */ -+#define AT_PAGESZ 6 /* System page size */ -+#define AT_BASE 7 /* Base address of interpreter */ -+#define AT_FLAGS 8 /* Flags */ -+#define AT_ENTRY 9 /* Entry point of program */ -+#define AT_NOTELF 10 /* Program is not ELF */ -+#define AT_UID 11 /* Real uid */ -+#define AT_EUID 12 /* Effective uid */ -+#define AT_GID 13 /* Real gid */ -+#define AT_EGID 14 /* Effective gid */ -+#define AT_CLKTCK 17 /* Frequency of times() */ -+ -+/* Some more special a_type values describing the hardware. */ -+#define AT_PLATFORM 15 /* String identifying platform. */ -+#define AT_HWCAP 16 /* Machine dependent hints about -+ processor capabilities. */ -+ -+/* This entry gives some information about the FPU initialization -+ performed by the kernel. */ -+#define AT_FPUCW 18 /* Used FPU control word. */ -+ -+/* Cache block sizes. */ -+#define AT_DCACHEBSIZE 19 /* Data cache block size. */ -+#define AT_ICACHEBSIZE 20 /* Instruction cache block size. */ -+#define AT_UCACHEBSIZE 21 /* Unified cache block size. */ -+ -+/* A special ignored value for PPC, used by the kernel to control the -+ interpretation of the AUXV. Must be > 16. */ -+#define AT_IGNOREPPC 22 /* Entry should be ignored. */ -+ -+#define AT_SECURE 23 /* Boolean, was exec setuid-like? */ -+ -+#define AT_BASE_PLATFORM 24 /* String identifying real platforms.*/ -+ -+#define AT_RANDOM 25 /* Address of 16 random bytes. */ -+ -+#define AT_EXECFN 31 /* Filename of executable. */ -+ -+/* Pointer to the global system page used for system calls and other -+ nice things. */ -+#define AT_SYSINFO 32 -+#define AT_SYSINFO_EHDR 33 -+ -+/* Shapes of the caches. Bits 0-3 contains associativity; bits 4-7 contains -+ log2 of line size; mask those to get cache size. */ -+#define AT_L1I_CACHESHAPE 34 -+#define AT_L1D_CACHESHAPE 35 -+#define AT_L2_CACHESHAPE 36 -+#define AT_L3_CACHESHAPE 37 -+ -+/* Note section contents. Each entry in the note section begins with -+ a header of a fixed form. */ -+ -+typedef struct -+{ -+ Elf32_Word n_namesz; /* Length of the note's name. */ -+ Elf32_Word n_descsz; /* Length of the note's descriptor. */ -+ Elf32_Word n_type; /* Type of the note. */ -+} Elf32_Nhdr; -+ -+typedef struct -+{ -+ Elf64_Word n_namesz; /* Length of the note's name. */ -+ Elf64_Word n_descsz; /* Length of the note's descriptor. */ -+ Elf64_Word n_type; /* Type of the note. */ -+} Elf64_Nhdr; -+ -+/* Known names of notes. */ -+ -+/* Solaris entries in the note section have this name. */ -+#define ELF_NOTE_SOLARIS "SUNW Solaris" -+ -+/* Note entries for GNU systems have this name. */ -+#define ELF_NOTE_GNU "GNU" -+ -+ -+/* Defined types of notes for Solaris. */ -+ -+/* Value of descriptor (one word) is desired pagesize for the binary. */ -+#define ELF_NOTE_PAGESIZE_HINT 1 -+ -+ -+/* Defined note types for GNU systems. */ -+ -+/* ABI information. The descriptor consists of words: -+ word 0: OS descriptor -+ word 1: major version of the ABI -+ word 2: minor version of the ABI -+ word 3: subminor version of the ABI -+*/ -+#define NT_GNU_ABI_TAG 1 -+#define ELF_NOTE_ABI NT_GNU_ABI_TAG /* Old name. */ -+ -+/* Known OSes. These values can appear in word 0 of an -+ NT_GNU_ABI_TAG note section entry. */ -+#define ELF_NOTE_OS_LINUX 0 -+#define ELF_NOTE_OS_GNU 1 -+#define ELF_NOTE_OS_SOLARIS2 2 -+#define ELF_NOTE_OS_FREEBSD 3 -+ -+/* Synthetic hwcap information. The descriptor begins with two words: -+ word 0: number of entries -+ word 1: bitmask of enabled entries -+ Then follow variable-length entries, one byte followed by a -+ '\0'-terminated hwcap name string. The byte gives the bit -+ number to test if enabled, (1U << bit) & bitmask. */ -+#define NT_GNU_HWCAP 2 -+ -+/* Build ID bits as generated by ld --build-id. -+ The descriptor consists of any nonzero number of bytes. */ -+#define NT_GNU_BUILD_ID 3 -+ -+/* Version note generated by GNU gold containing a version string. */ -+#define NT_GNU_GOLD_VERSION 4 -+ -+ -+/* Move records. */ -+typedef struct -+{ -+ Elf32_Xword m_value; /* Symbol value. */ -+ Elf32_Word m_info; /* Size and index. */ -+ Elf32_Word m_poffset; /* Symbol offset. */ -+ Elf32_Half m_repeat; /* Repeat count. */ -+ Elf32_Half m_stride; /* Stride info. */ -+} Elf32_Move; -+ -+typedef struct -+{ -+ Elf64_Xword m_value; /* Symbol value. */ -+ Elf64_Xword m_info; /* Size and index. */ -+ Elf64_Xword m_poffset; /* Symbol offset. */ -+ Elf64_Half m_repeat; /* Repeat count. */ -+ Elf64_Half m_stride; /* Stride info. */ -+} Elf64_Move; -+ -+/* Macro to construct move records. */ -+#define ELF32_M_SYM(info) ((info) >> 8) -+#define ELF32_M_SIZE(info) ((unsigned char) (info)) -+#define ELF32_M_INFO(sym, size) (((sym) << 8) + (unsigned char) (size)) -+ -+#define ELF64_M_SYM(info) ELF32_M_SYM (info) -+#define ELF64_M_SIZE(info) ELF32_M_SIZE (info) -+#define ELF64_M_INFO(sym, size) ELF32_M_INFO (sym, size) -+ -+ -+/* Motorola 68k specific definitions. */ -+ -+/* Values for Elf32_Ehdr.e_flags. */ -+#define EF_CPU32 0x00810000 -+ -+/* m68k relocs. */ -+ -+#define R_68K_NONE 0 /* No reloc */ -+#define R_68K_32 1 /* Direct 32 bit */ -+#define R_68K_16 2 /* Direct 16 bit */ -+#define R_68K_8 3 /* Direct 8 bit */ -+#define R_68K_PC32 4 /* PC relative 32 bit */ -+#define R_68K_PC16 5 /* PC relative 16 bit */ -+#define R_68K_PC8 6 /* PC relative 8 bit */ -+#define R_68K_GOT32 7 /* 32 bit PC relative GOT entry */ -+#define R_68K_GOT16 8 /* 16 bit PC relative GOT entry */ -+#define R_68K_GOT8 9 /* 8 bit PC relative GOT entry */ -+#define R_68K_GOT32O 10 /* 32 bit GOT offset */ -+#define R_68K_GOT16O 11 /* 16 bit GOT offset */ -+#define R_68K_GOT8O 12 /* 8 bit GOT offset */ -+#define R_68K_PLT32 13 /* 32 bit PC relative PLT address */ -+#define R_68K_PLT16 14 /* 16 bit PC relative PLT address */ -+#define R_68K_PLT8 15 /* 8 bit PC relative PLT address */ -+#define R_68K_PLT32O 16 /* 32 bit PLT offset */ -+#define R_68K_PLT16O 17 /* 16 bit PLT offset */ -+#define R_68K_PLT8O 18 /* 8 bit PLT offset */ -+#define R_68K_COPY 19 /* Copy symbol at runtime */ -+#define R_68K_GLOB_DAT 20 /* Create GOT entry */ -+#define R_68K_JMP_SLOT 21 /* Create PLT entry */ -+#define R_68K_RELATIVE 22 /* Adjust by program base */ -+#define R_68K_TLS_GD32 25 /* 32 bit GOT offset for GD */ -+#define R_68K_TLS_GD16 26 /* 16 bit GOT offset for GD */ -+#define R_68K_TLS_GD8 27 /* 8 bit GOT offset for GD */ -+#define R_68K_TLS_LDM32 28 /* 32 bit GOT offset for LDM */ -+#define R_68K_TLS_LDM16 29 /* 16 bit GOT offset for LDM */ -+#define R_68K_TLS_LDM8 30 /* 8 bit GOT offset for LDM */ -+#define R_68K_TLS_LDO32 31 /* 32 bit module-relative offset */ -+#define R_68K_TLS_LDO16 32 /* 16 bit module-relative offset */ -+#define R_68K_TLS_LDO8 33 /* 8 bit module-relative offset */ -+#define R_68K_TLS_IE32 34 /* 32 bit GOT offset for IE */ -+#define R_68K_TLS_IE16 35 /* 16 bit GOT offset for IE */ -+#define R_68K_TLS_IE8 36 /* 8 bit GOT offset for IE */ -+#define R_68K_TLS_LE32 37 /* 32 bit offset relative to -+ static TLS block */ -+#define R_68K_TLS_LE16 38 /* 16 bit offset relative to -+ static TLS block */ -+#define R_68K_TLS_LE8 39 /* 8 bit offset relative to -+ static TLS block */ -+#define R_68K_TLS_DTPMOD32 40 /* 32 bit module number */ -+#define R_68K_TLS_DTPREL32 41 /* 32 bit module-relative offset */ -+#define R_68K_TLS_TPREL32 42 /* 32 bit TP-relative offset */ -+/* Keep this the last entry. */ -+#define R_68K_NUM 43 -+ -+/* Intel 80386 specific definitions. */ -+ -+/* i386 relocs. */ -+ -+#define R_386_NONE 0 /* No reloc */ -+#define R_386_32 1 /* Direct 32 bit */ -+#define R_386_PC32 2 /* PC relative 32 bit */ -+#define R_386_GOT32 3 /* 32 bit GOT entry */ -+#define R_386_PLT32 4 /* 32 bit PLT address */ -+#define R_386_COPY 5 /* Copy symbol at runtime */ -+#define R_386_GLOB_DAT 6 /* Create GOT entry */ -+#define R_386_JMP_SLOT 7 /* Create PLT entry */ -+#define R_386_RELATIVE 8 /* Adjust by program base */ -+#define R_386_GOTOFF 9 /* 32 bit offset to GOT */ -+#define R_386_GOTPC 10 /* 32 bit PC relative offset to GOT */ -+#define R_386_32PLT 11 -+#define R_386_TLS_TPOFF 14 /* Offset in static TLS block */ -+#define R_386_TLS_IE 15 /* Address of GOT entry for static TLS -+ block offset */ -+#define R_386_TLS_GOTIE 16 /* GOT entry for static TLS block -+ offset */ -+#define R_386_TLS_LE 17 /* Offset relative to static TLS -+ block */ -+#define R_386_TLS_GD 18 /* Direct 32 bit for GNU version of -+ general dynamic thread local data */ -+#define R_386_TLS_LDM 19 /* Direct 32 bit for GNU version of -+ local dynamic thread local data -+ in LE code */ -+#define R_386_16 20 -+#define R_386_PC16 21 -+#define R_386_8 22 -+#define R_386_PC8 23 -+#define R_386_TLS_GD_32 24 /* Direct 32 bit for general dynamic -+ thread local data */ -+#define R_386_TLS_GD_PUSH 25 /* Tag for pushl in GD TLS code */ -+#define R_386_TLS_GD_CALL 26 /* Relocation for call to -+ __tls_get_addr() */ -+#define R_386_TLS_GD_POP 27 /* Tag for popl in GD TLS code */ -+#define R_386_TLS_LDM_32 28 /* Direct 32 bit for local dynamic -+ thread local data in LE code */ -+#define R_386_TLS_LDM_PUSH 29 /* Tag for pushl in LDM TLS code */ -+#define R_386_TLS_LDM_CALL 30 /* Relocation for call to -+ __tls_get_addr() in LDM code */ -+#define R_386_TLS_LDM_POP 31 /* Tag for popl in LDM TLS code */ -+#define R_386_TLS_LDO_32 32 /* Offset relative to TLS block */ -+#define R_386_TLS_IE_32 33 /* GOT entry for negated static TLS -+ block offset */ -+#define R_386_TLS_LE_32 34 /* Negated offset relative to static -+ TLS block */ -+#define R_386_TLS_DTPMOD32 35 /* ID of module containing symbol */ -+#define R_386_TLS_DTPOFF32 36 /* Offset in TLS block */ -+#define R_386_TLS_TPOFF32 37 /* Negated offset in static TLS block */ -+/* 38? */ -+#define R_386_TLS_GOTDESC 39 /* GOT offset for TLS descriptor. */ -+#define R_386_TLS_DESC_CALL 40 /* Marker of call through TLS -+ descriptor for -+ relaxation. */ -+#define R_386_TLS_DESC 41 /* TLS descriptor containing -+ pointer to code and to -+ argument, returning the TLS -+ offset for the symbol. */ -+#define R_386_IRELATIVE 42 /* Adjust indirectly by program base */ -+/* Keep this the last entry. */ -+#define R_386_NUM 43 -+ -+/* SUN SPARC specific definitions. */ -+ -+/* Legal values for ST_TYPE subfield of st_info (symbol type). */ -+ -+#define STT_SPARC_REGISTER 13 /* Global register reserved to app. */ -+ -+/* Values for Elf64_Ehdr.e_flags. */ -+ -+#define EF_SPARCV9_MM 3 -+#define EF_SPARCV9_TSO 0 -+#define EF_SPARCV9_PSO 1 -+#define EF_SPARCV9_RMO 2 -+#define EF_SPARC_LEDATA 0x800000 /* little endian data */ -+#define EF_SPARC_EXT_MASK 0xFFFF00 -+#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */ -+#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */ -+#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */ -+#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */ -+ -+/* SPARC relocs. */ -+ -+#define R_SPARC_NONE 0 /* No reloc */ -+#define R_SPARC_8 1 /* Direct 8 bit */ -+#define R_SPARC_16 2 /* Direct 16 bit */ -+#define R_SPARC_32 3 /* Direct 32 bit */ -+#define R_SPARC_DISP8 4 /* PC relative 8 bit */ -+#define R_SPARC_DISP16 5 /* PC relative 16 bit */ -+#define R_SPARC_DISP32 6 /* PC relative 32 bit */ -+#define R_SPARC_WDISP30 7 /* PC relative 30 bit shifted */ -+#define R_SPARC_WDISP22 8 /* PC relative 22 bit shifted */ -+#define R_SPARC_HI22 9 /* High 22 bit */ -+#define R_SPARC_22 10 /* Direct 22 bit */ -+#define R_SPARC_13 11 /* Direct 13 bit */ -+#define R_SPARC_LO10 12 /* Truncated 10 bit */ -+#define R_SPARC_GOT10 13 /* Truncated 10 bit GOT entry */ -+#define R_SPARC_GOT13 14 /* 13 bit GOT entry */ -+#define R_SPARC_GOT22 15 /* 22 bit GOT entry shifted */ -+#define R_SPARC_PC10 16 /* PC relative 10 bit truncated */ -+#define R_SPARC_PC22 17 /* PC relative 22 bit shifted */ -+#define R_SPARC_WPLT30 18 /* 30 bit PC relative PLT address */ -+#define R_SPARC_COPY 19 /* Copy symbol at runtime */ -+#define R_SPARC_GLOB_DAT 20 /* Create GOT entry */ -+#define R_SPARC_JMP_SLOT 21 /* Create PLT entry */ -+#define R_SPARC_RELATIVE 22 /* Adjust by program base */ -+#define R_SPARC_UA32 23 /* Direct 32 bit unaligned */ -+ -+/* Additional Sparc64 relocs. */ -+ -+#define R_SPARC_PLT32 24 /* Direct 32 bit ref to PLT entry */ -+#define R_SPARC_HIPLT22 25 /* High 22 bit PLT entry */ -+#define R_SPARC_LOPLT10 26 /* Truncated 10 bit PLT entry */ -+#define R_SPARC_PCPLT32 27 /* PC rel 32 bit ref to PLT entry */ -+#define R_SPARC_PCPLT22 28 /* PC rel high 22 bit PLT entry */ -+#define R_SPARC_PCPLT10 29 /* PC rel trunc 10 bit PLT entry */ -+#define R_SPARC_10 30 /* Direct 10 bit */ -+#define R_SPARC_11 31 /* Direct 11 bit */ -+#define R_SPARC_64 32 /* Direct 64 bit */ -+#define R_SPARC_OLO10 33 /* 10bit with secondary 13bit addend */ -+#define R_SPARC_HH22 34 /* Top 22 bits of direct 64 bit */ -+#define R_SPARC_HM10 35 /* High middle 10 bits of ... */ -+#define R_SPARC_LM22 36 /* Low middle 22 bits of ... */ -+#define R_SPARC_PC_HH22 37 /* Top 22 bits of pc rel 64 bit */ -+#define R_SPARC_PC_HM10 38 /* High middle 10 bit of ... */ -+#define R_SPARC_PC_LM22 39 /* Low miggle 22 bits of ... */ -+#define R_SPARC_WDISP16 40 /* PC relative 16 bit shifted */ -+#define R_SPARC_WDISP19 41 /* PC relative 19 bit shifted */ -+#define R_SPARC_GLOB_JMP 42 /* was part of v9 ABI but was removed */ -+#define R_SPARC_7 43 /* Direct 7 bit */ -+#define R_SPARC_5 44 /* Direct 5 bit */ -+#define R_SPARC_6 45 /* Direct 6 bit */ -+#define R_SPARC_DISP64 46 /* PC relative 64 bit */ -+#define R_SPARC_PLT64 47 /* Direct 64 bit ref to PLT entry */ -+#define R_SPARC_HIX22 48 /* High 22 bit complemented */ -+#define R_SPARC_LOX10 49 /* Truncated 11 bit complemented */ -+#define R_SPARC_H44 50 /* Direct high 12 of 44 bit */ -+#define R_SPARC_M44 51 /* Direct mid 22 of 44 bit */ -+#define R_SPARC_L44 52 /* Direct low 10 of 44 bit */ -+#define R_SPARC_REGISTER 53 /* Global register usage */ -+#define R_SPARC_UA64 54 /* Direct 64 bit unaligned */ -+#define R_SPARC_UA16 55 /* Direct 16 bit unaligned */ -+#define R_SPARC_TLS_GD_HI22 56 -+#define R_SPARC_TLS_GD_LO10 57 -+#define R_SPARC_TLS_GD_ADD 58 -+#define R_SPARC_TLS_GD_CALL 59 -+#define R_SPARC_TLS_LDM_HI22 60 -+#define R_SPARC_TLS_LDM_LO10 61 -+#define R_SPARC_TLS_LDM_ADD 62 -+#define R_SPARC_TLS_LDM_CALL 63 -+#define R_SPARC_TLS_LDO_HIX22 64 -+#define R_SPARC_TLS_LDO_LOX10 65 -+#define R_SPARC_TLS_LDO_ADD 66 -+#define R_SPARC_TLS_IE_HI22 67 -+#define R_SPARC_TLS_IE_LO10 68 -+#define R_SPARC_TLS_IE_LD 69 -+#define R_SPARC_TLS_IE_LDX 70 -+#define R_SPARC_TLS_IE_ADD 71 -+#define R_SPARC_TLS_LE_HIX22 72 -+#define R_SPARC_TLS_LE_LOX10 73 -+#define R_SPARC_TLS_DTPMOD32 74 -+#define R_SPARC_TLS_DTPMOD64 75 -+#define R_SPARC_TLS_DTPOFF32 76 -+#define R_SPARC_TLS_DTPOFF64 77 -+#define R_SPARC_TLS_TPOFF32 78 -+#define R_SPARC_TLS_TPOFF64 79 -+#define R_SPARC_GOTDATA_HIX22 80 -+#define R_SPARC_GOTDATA_LOX10 81 -+#define R_SPARC_GOTDATA_OP_HIX22 82 -+#define R_SPARC_GOTDATA_OP_LOX10 83 -+#define R_SPARC_GOTDATA_OP 84 -+#define R_SPARC_H34 85 -+#define R_SPARC_SIZE32 86 -+#define R_SPARC_SIZE64 87 -+#define R_SPARC_WDISP10 88 -+#define R_SPARC_JMP_IREL 248 -+#define R_SPARC_IRELATIVE 249 -+#define R_SPARC_GNU_VTINHERIT 250 -+#define R_SPARC_GNU_VTENTRY 251 -+#define R_SPARC_REV32 252 -+/* Keep this the last entry. */ -+#define R_SPARC_NUM 253 -+ -+/* For Sparc64, legal values for d_tag of Elf64_Dyn. */ -+ -+#define DT_SPARC_REGISTER 0x70000001 -+#define DT_SPARC_NUM 2 -+ -+/* MIPS R3000 specific definitions. */ -+ -+/* Legal values for e_flags field of Elf32_Ehdr. */ -+ -+#define EF_MIPS_NOREORDER 1 /* A .noreorder directive was used */ -+#define EF_MIPS_PIC 2 /* Contains PIC code */ -+#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence */ -+#define EF_MIPS_XGOT 8 -+#define EF_MIPS_64BIT_WHIRL 16 -+#define EF_MIPS_ABI2 32 -+#define EF_MIPS_ABI_ON32 64 -+#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */ -+ -+/* Legal values for MIPS architecture level. */ -+ -+#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ -+#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ -+#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ -+#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ -+#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ -+#define EF_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */ -+#define EF_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */ -+ -+/* The following are non-official names and should not be used. */ -+ -+#define E_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ -+#define E_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ -+#define E_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ -+#define E_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ -+#define E_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ -+#define E_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */ -+#define E_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */ -+ -+/* Special section indices. */ -+ -+#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */ -+#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */ -+#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */ -+#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */ -+#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */ -+ -+/* Legal values for sh_type field of Elf32_Shdr. */ -+ -+#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */ -+#define SHT_MIPS_MSYM 0x70000001 -+#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */ -+#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */ -+#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */ -+#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information*/ -+#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */ -+#define SHT_MIPS_PACKAGE 0x70000007 -+#define SHT_MIPS_PACKSYM 0x70000008 -+#define SHT_MIPS_RELD 0x70000009 -+#define SHT_MIPS_IFACE 0x7000000b -+#define SHT_MIPS_CONTENT 0x7000000c -+#define SHT_MIPS_OPTIONS 0x7000000d /* Miscellaneous options. */ -+#define SHT_MIPS_SHDR 0x70000010 -+#define SHT_MIPS_FDESC 0x70000011 -+#define SHT_MIPS_EXTSYM 0x70000012 -+#define SHT_MIPS_DENSE 0x70000013 -+#define SHT_MIPS_PDESC 0x70000014 -+#define SHT_MIPS_LOCSYM 0x70000015 -+#define SHT_MIPS_AUXSYM 0x70000016 -+#define SHT_MIPS_OPTSYM 0x70000017 -+#define SHT_MIPS_LOCSTR 0x70000018 -+#define SHT_MIPS_LINE 0x70000019 -+#define SHT_MIPS_RFDESC 0x7000001a -+#define SHT_MIPS_DELTASYM 0x7000001b -+#define SHT_MIPS_DELTAINST 0x7000001c -+#define SHT_MIPS_DELTACLASS 0x7000001d -+#define SHT_MIPS_DWARF 0x7000001e /* DWARF debugging information. */ -+#define SHT_MIPS_DELTADECL 0x7000001f -+#define SHT_MIPS_SYMBOL_LIB 0x70000020 -+#define SHT_MIPS_EVENTS 0x70000021 /* Event section. */ -+#define SHT_MIPS_TRANSLATE 0x70000022 -+#define SHT_MIPS_PIXIE 0x70000023 -+#define SHT_MIPS_XLATE 0x70000024 -+#define SHT_MIPS_XLATE_DEBUG 0x70000025 -+#define SHT_MIPS_WHIRL 0x70000026 -+#define SHT_MIPS_EH_REGION 0x70000027 -+#define SHT_MIPS_XLATE_OLD 0x70000028 -+#define SHT_MIPS_PDR_EXCEPTION 0x70000029 -+ -+/* Legal values for sh_flags field of Elf32_Shdr. */ -+ -+#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */ -+#define SHF_MIPS_MERGE 0x20000000 -+#define SHF_MIPS_ADDR 0x40000000 -+#define SHF_MIPS_STRINGS 0x80000000 -+#define SHF_MIPS_NOSTRIP 0x08000000 -+#define SHF_MIPS_LOCAL 0x04000000 -+#define SHF_MIPS_NAMES 0x02000000 -+#define SHF_MIPS_NODUPE 0x01000000 -+ -+ -+/* Symbol tables. */ -+ -+/* MIPS specific values for `st_other'. */ -+#define STO_MIPS_DEFAULT 0x0 -+#define STO_MIPS_INTERNAL 0x1 -+#define STO_MIPS_HIDDEN 0x2 -+#define STO_MIPS_PROTECTED 0x3 -+#define STO_MIPS_PLT 0x8 -+#define STO_MIPS_SC_ALIGN_UNUSED 0xff -+ -+/* MIPS specific values for `st_info'. */ -+#define STB_MIPS_SPLIT_COMMON 13 -+ -+/* Entries found in sections of type SHT_MIPS_GPTAB. */ -+ -+typedef union -+{ -+ struct -+ { -+ Elf32_Word gt_current_g_value; /* -G value used for compilation */ -+ Elf32_Word gt_unused; /* Not used */ -+ } gt_header; /* First entry in section */ -+ struct -+ { -+ Elf32_Word gt_g_value; /* If this value were used for -G */ -+ Elf32_Word gt_bytes; /* This many bytes would be used */ -+ } gt_entry; /* Subsequent entries in section */ -+} Elf32_gptab; -+ -+/* Entry found in sections of type SHT_MIPS_REGINFO. */ -+ -+typedef struct -+{ -+ Elf32_Word ri_gprmask; /* General registers used */ -+ Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */ -+ Elf32_Sword ri_gp_value; /* $gp register value */ -+} Elf32_RegInfo; -+ -+/* Entries found in sections of type SHT_MIPS_OPTIONS. */ -+ -+typedef struct -+{ -+ unsigned char kind; /* Determines interpretation of the -+ variable part of descriptor. */ -+ unsigned char size; /* Size of descriptor, including header. */ -+ Elf32_Section section; /* Section header index of section affected, -+ 0 for global options. */ -+ Elf32_Word info; /* Kind-specific information. */ -+} Elf_Options; -+ -+/* Values for `kind' field in Elf_Options. */ -+ -+#define ODK_NULL 0 /* Undefined. */ -+#define ODK_REGINFO 1 /* Register usage information. */ -+#define ODK_EXCEPTIONS 2 /* Exception processing options. */ -+#define ODK_PAD 3 /* Section padding options. */ -+#define ODK_HWPATCH 4 /* Hardware workarounds performed */ -+#define ODK_FILL 5 /* record the fill value used by the linker. */ -+#define ODK_TAGS 6 /* reserve space for desktop tools to write. */ -+#define ODK_HWAND 7 /* HW workarounds. 'AND' bits when merging. */ -+#define ODK_HWOR 8 /* HW workarounds. 'OR' bits when merging. */ -+ -+/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries. */ -+ -+#define OEX_FPU_MIN 0x1f /* FPE's which MUST be enabled. */ -+#define OEX_FPU_MAX 0x1f00 /* FPE's which MAY be enabled. */ -+#define OEX_PAGE0 0x10000 /* page zero must be mapped. */ -+#define OEX_SMM 0x20000 /* Force sequential memory mode? */ -+#define OEX_FPDBUG 0x40000 /* Force floating point debug mode? */ -+#define OEX_PRECISEFP OEX_FPDBUG -+#define OEX_DISMISS 0x80000 /* Dismiss invalid address faults? */ -+ -+#define OEX_FPU_INVAL 0x10 -+#define OEX_FPU_DIV0 0x08 -+#define OEX_FPU_OFLO 0x04 -+#define OEX_FPU_UFLO 0x02 -+#define OEX_FPU_INEX 0x01 -+ -+/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry. */ -+ -+#define OHW_R4KEOP 0x1 /* R4000 end-of-page patch. */ -+#define OHW_R8KPFETCH 0x2 /* may need R8000 prefetch patch. */ -+#define OHW_R5KEOP 0x4 /* R5000 end-of-page patch. */ -+#define OHW_R5KCVTL 0x8 /* R5000 cvt.[ds].l bug. clean=1. */ -+ -+#define OPAD_PREFIX 0x1 -+#define OPAD_POSTFIX 0x2 -+#define OPAD_SYMBOL 0x4 -+ -+/* Entry found in `.options' section. */ -+ -+typedef struct -+{ -+ Elf32_Word hwp_flags1; /* Extra flags. */ -+ Elf32_Word hwp_flags2; /* Extra flags. */ -+} Elf_Options_Hw; -+ -+/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries. */ -+ -+#define OHWA0_R4KEOP_CHECKED 0x00000001 -+#define OHWA1_R4KEOP_CLEAN 0x00000002 -+ -+/* MIPS relocs. */ -+ -+#define R_MIPS_NONE 0 /* No reloc */ -+#define R_MIPS_16 1 /* Direct 16 bit */ -+#define R_MIPS_32 2 /* Direct 32 bit */ -+#define R_MIPS_REL32 3 /* PC relative 32 bit */ -+#define R_MIPS_26 4 /* Direct 26 bit shifted */ -+#define R_MIPS_HI16 5 /* High 16 bit */ -+#define R_MIPS_LO16 6 /* Low 16 bit */ -+#define R_MIPS_GPREL16 7 /* GP relative 16 bit */ -+#define R_MIPS_LITERAL 8 /* 16 bit literal entry */ -+#define R_MIPS_GOT16 9 /* 16 bit GOT entry */ -+#define R_MIPS_PC16 10 /* PC relative 16 bit */ -+#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */ -+#define R_MIPS_GPREL32 12 /* GP relative 32 bit */ -+ -+#define R_MIPS_SHIFT5 16 -+#define R_MIPS_SHIFT6 17 -+#define R_MIPS_64 18 -+#define R_MIPS_GOT_DISP 19 -+#define R_MIPS_GOT_PAGE 20 -+#define R_MIPS_GOT_OFST 21 -+#define R_MIPS_GOT_HI16 22 -+#define R_MIPS_GOT_LO16 23 -+#define R_MIPS_SUB 24 -+#define R_MIPS_INSERT_A 25 -+#define R_MIPS_INSERT_B 26 -+#define R_MIPS_DELETE 27 -+#define R_MIPS_HIGHER 28 -+#define R_MIPS_HIGHEST 29 -+#define R_MIPS_CALL_HI16 30 -+#define R_MIPS_CALL_LO16 31 -+#define R_MIPS_SCN_DISP 32 -+#define R_MIPS_REL16 33 -+#define R_MIPS_ADD_IMMEDIATE 34 -+#define R_MIPS_PJUMP 35 -+#define R_MIPS_RELGOT 36 -+#define R_MIPS_JALR 37 -+#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */ -+#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */ -+#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */ -+#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */ -+#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */ -+#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */ -+#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */ -+#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */ -+#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */ -+#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */ -+#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */ -+#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */ -+#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */ -+#define R_MIPS_GLOB_DAT 51 -+#define R_MIPS_COPY 126 -+#define R_MIPS_JUMP_SLOT 127 -+/* Keep this the last entry. */ -+#define R_MIPS_NUM 128 -+ -+/* Legal values for p_type field of Elf32_Phdr. */ -+ -+#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */ -+#define PT_MIPS_RTPROC 0x70000001 /* Runtime procedure table. */ -+#define PT_MIPS_OPTIONS 0x70000002 -+ -+/* Special program header types. */ -+ -+#define PF_MIPS_LOCAL 0x10000000 -+ -+/* Legal values for d_tag field of Elf32_Dyn. */ -+ -+#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime linker interface version */ -+#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */ -+#define DT_MIPS_ICHECKSUM 0x70000003 /* Checksum */ -+#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */ -+#define DT_MIPS_FLAGS 0x70000005 /* Flags */ -+#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Base address */ -+#define DT_MIPS_MSYM 0x70000007 -+#define DT_MIPS_CONFLICT 0x70000008 /* Address of CONFLICT section */ -+#define DT_MIPS_LIBLIST 0x70000009 /* Address of LIBLIST section */ -+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local GOT entries */ -+#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of CONFLICT entries */ -+#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of LIBLIST entries */ -+#define DT_MIPS_SYMTABNO 0x70000011 /* Number of DYNSYM entries */ -+#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */ -+#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in DYNSYM */ -+#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */ -+#define DT_MIPS_RLD_MAP 0x70000016 /* Address of run time loader map. */ -+#define DT_MIPS_DELTA_CLASS 0x70000017 /* Delta C++ class definition. */ -+#define DT_MIPS_DELTA_CLASS_NO 0x70000018 /* Number of entries in -+ DT_MIPS_DELTA_CLASS. */ -+#define DT_MIPS_DELTA_INSTANCE 0x70000019 /* Delta C++ class instances. */ -+#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in -+ DT_MIPS_DELTA_INSTANCE. */ -+#define DT_MIPS_DELTA_RELOC 0x7000001b /* Delta relocations. */ -+#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in -+ DT_MIPS_DELTA_RELOC. */ -+#define DT_MIPS_DELTA_SYM 0x7000001d /* Delta symbols that Delta -+ relocations refer to. */ -+#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in -+ DT_MIPS_DELTA_SYM. */ -+#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the -+ class declaration. */ -+#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in -+ DT_MIPS_DELTA_CLASSSYM. */ -+#define DT_MIPS_CXX_FLAGS 0x70000022 /* Flags indicating for C++ flavor. */ -+#define DT_MIPS_PIXIE_INIT 0x70000023 -+#define DT_MIPS_SYMBOL_LIB 0x70000024 -+#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025 -+#define DT_MIPS_LOCAL_GOTIDX 0x70000026 -+#define DT_MIPS_HIDDEN_GOTIDX 0x70000027 -+#define DT_MIPS_PROTECTED_GOTIDX 0x70000028 -+#define DT_MIPS_OPTIONS 0x70000029 /* Address of .options. */ -+#define DT_MIPS_INTERFACE 0x7000002a /* Address of .interface. */ -+#define DT_MIPS_DYNSTR_ALIGN 0x7000002b -+#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */ -+#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve -+ function stored in GOT. */ -+#define DT_MIPS_PERF_SUFFIX 0x7000002e /* Default suffix of dso to be added -+ by rld on dlopen() calls. */ -+#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */ -+#define DT_MIPS_GP_VALUE 0x70000030 /* GP value for aux GOTs. */ -+#define DT_MIPS_AUX_DYNAMIC 0x70000031 /* Address of aux .dynamic. */ -+/* The address of .got.plt in an executable using the new non-PIC ABI. */ -+#define DT_MIPS_PLTGOT 0x70000032 -+/* The base of the PLT in an executable using the new non-PIC ABI if that -+ PLT is writable. For a non-writable PLT, this is omitted or has a zero -+ value. */ -+#define DT_MIPS_RWPLT 0x70000034 -+#define DT_MIPS_NUM 0x35 -+ -+/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry. */ -+ -+#define RHF_NONE 0 /* No flags */ -+#define RHF_QUICKSTART (1 << 0) /* Use quickstart */ -+#define RHF_NOTPOT (1 << 1) /* Hash size not power of 2 */ -+#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2) /* Ignore LD_LIBRARY_PATH */ -+#define RHF_NO_MOVE (1 << 3) -+#define RHF_SGI_ONLY (1 << 4) -+#define RHF_GUARANTEE_INIT (1 << 5) -+#define RHF_DELTA_C_PLUS_PLUS (1 << 6) -+#define RHF_GUARANTEE_START_INIT (1 << 7) -+#define RHF_PIXIE (1 << 8) -+#define RHF_DEFAULT_DELAY_LOAD (1 << 9) -+#define RHF_REQUICKSTART (1 << 10) -+#define RHF_REQUICKSTARTED (1 << 11) -+#define RHF_CORD (1 << 12) -+#define RHF_NO_UNRES_UNDEF (1 << 13) -+#define RHF_RLD_ORDER_SAFE (1 << 14) -+ -+/* Entries found in sections of type SHT_MIPS_LIBLIST. */ -+ -+typedef struct -+{ -+ Elf32_Word l_name; /* Name (string table index) */ -+ Elf32_Word l_time_stamp; /* Timestamp */ -+ Elf32_Word l_checksum; /* Checksum */ -+ Elf32_Word l_version; /* Interface version */ -+ Elf32_Word l_flags; /* Flags */ -+} Elf32_Lib; -+ -+typedef struct -+{ -+ Elf64_Word l_name; /* Name (string table index) */ -+ Elf64_Word l_time_stamp; /* Timestamp */ -+ Elf64_Word l_checksum; /* Checksum */ -+ Elf64_Word l_version; /* Interface version */ -+ Elf64_Word l_flags; /* Flags */ -+} Elf64_Lib; -+ -+ -+/* Legal values for l_flags. */ -+ -+#define LL_NONE 0 -+#define LL_EXACT_MATCH (1 << 0) /* Require exact match */ -+#define LL_IGNORE_INT_VER (1 << 1) /* Ignore interface version */ -+#define LL_REQUIRE_MINOR (1 << 2) -+#define LL_EXPORTS (1 << 3) -+#define LL_DELAY_LOAD (1 << 4) -+#define LL_DELTA (1 << 5) -+ -+/* Entries found in sections of type SHT_MIPS_CONFLICT. */ -+ -+typedef Elf32_Addr Elf32_Conflict; -+ -+ -+/* HPPA specific definitions. */ -+ -+/* Legal values for e_flags field of Elf32_Ehdr. */ -+ -+#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */ -+#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */ -+#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ -+#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ -+#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch -+ prediction. */ -+#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ -+#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ -+ -+/* Defined values for `e_flags & EF_PARISC_ARCH' are: */ -+ -+#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */ -+#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */ -+#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */ -+ -+/* Additional section indeces. */ -+ -+#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared -+ symbols in ANSI C. */ -+#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ -+ -+/* Legal values for sh_type field of Elf32_Shdr. */ -+ -+#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */ -+#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */ -+#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */ -+ -+/* Legal values for sh_flags field of Elf32_Shdr. */ -+ -+#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */ -+#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */ -+#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */ -+ -+/* Legal values for ST_TYPE subfield of st_info (symbol type). */ -+ -+#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */ -+ -+#define STT_HP_OPAQUE (STT_LOOS + 0x1) -+#define STT_HP_STUB (STT_LOOS + 0x2) -+ -+/* HPPA relocs. */ -+ -+#define R_PARISC_NONE 0 /* No reloc. */ -+#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */ -+#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */ -+#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */ -+#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */ -+#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */ -+#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */ -+#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */ -+#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */ -+#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */ -+#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */ -+#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */ -+#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */ -+#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */ -+#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */ -+#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */ -+#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */ -+#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */ -+#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */ -+#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */ -+#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */ -+#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */ -+#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */ -+#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */ -+#define R_PARISC_FPTR64 64 /* 64 bits function address. */ -+#define R_PARISC_PLABEL32 65 /* 32 bits function address. */ -+#define R_PARISC_PLABEL21L 66 /* Left 21 bits of fdesc address. */ -+#define R_PARISC_PLABEL14R 70 /* Right 14 bits of fdesc address. */ -+#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */ -+#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */ -+#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */ -+#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */ -+#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */ -+#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */ -+#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */ -+#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */ -+#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */ -+#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */ -+#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */ -+#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */ -+#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */ -+#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */ -+#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */ -+#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */ -+#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */ -+#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */ -+#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */ -+#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */ -+#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */ -+#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */ -+#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */ -+#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */ -+#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */ -+#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */ -+#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */ -+#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */ -+#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */ -+#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */ -+#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */ -+#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */ -+#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */ -+#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */ -+#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */ -+#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */ -+#define R_PARISC_LORESERVE 128 -+#define R_PARISC_COPY 128 /* Copy relocation. */ -+#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */ -+#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */ -+#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */ -+#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */ -+#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */ -+#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */ -+#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/ -+#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */ -+#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */ -+#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */ -+#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */ -+#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */ -+#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */ -+#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */ -+#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */ -+#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/ -+#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/ -+#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */ -+#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */ -+#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */ -+#define R_PARISC_GNU_VTENTRY 232 -+#define R_PARISC_GNU_VTINHERIT 233 -+#define R_PARISC_TLS_GD21L 234 /* GD 21-bit left. */ -+#define R_PARISC_TLS_GD14R 235 /* GD 14-bit right. */ -+#define R_PARISC_TLS_GDCALL 236 /* GD call to __t_g_a. */ -+#define R_PARISC_TLS_LDM21L 237 /* LD module 21-bit left. */ -+#define R_PARISC_TLS_LDM14R 238 /* LD module 14-bit right. */ -+#define R_PARISC_TLS_LDMCALL 239 /* LD module call to __t_g_a. */ -+#define R_PARISC_TLS_LDO21L 240 /* LD offset 21-bit left. */ -+#define R_PARISC_TLS_LDO14R 241 /* LD offset 14-bit right. */ -+#define R_PARISC_TLS_DTPMOD32 242 /* DTP module 32-bit. */ -+#define R_PARISC_TLS_DTPMOD64 243 /* DTP module 64-bit. */ -+#define R_PARISC_TLS_DTPOFF32 244 /* DTP offset 32-bit. */ -+#define R_PARISC_TLS_DTPOFF64 245 /* DTP offset 32-bit. */ -+#define R_PARISC_TLS_LE21L R_PARISC_TPREL21L -+#define R_PARISC_TLS_LE14R R_PARISC_TPREL14R -+#define R_PARISC_TLS_IE21L R_PARISC_LTOFF_TP21L -+#define R_PARISC_TLS_IE14R R_PARISC_LTOFF_TP14R -+#define R_PARISC_TLS_TPREL32 R_PARISC_TPREL32 -+#define R_PARISC_TLS_TPREL64 R_PARISC_TPREL64 -+#define R_PARISC_HIRESERVE 255 -+ -+/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */ -+ -+#define PT_HP_TLS (PT_LOOS + 0x0) -+#define PT_HP_CORE_NONE (PT_LOOS + 0x1) -+#define PT_HP_CORE_VERSION (PT_LOOS + 0x2) -+#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3) -+#define PT_HP_CORE_COMM (PT_LOOS + 0x4) -+#define PT_HP_CORE_PROC (PT_LOOS + 0x5) -+#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6) -+#define PT_HP_CORE_STACK (PT_LOOS + 0x7) -+#define PT_HP_CORE_SHM (PT_LOOS + 0x8) -+#define PT_HP_CORE_MMF (PT_LOOS + 0x9) -+#define PT_HP_PARALLEL (PT_LOOS + 0x10) -+#define PT_HP_FASTBIND (PT_LOOS + 0x11) -+#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12) -+#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13) -+#define PT_HP_STACK (PT_LOOS + 0x14) -+ -+#define PT_PARISC_ARCHEXT 0x70000000 -+#define PT_PARISC_UNWIND 0x70000001 -+ -+/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */ -+ -+#define PF_PARISC_SBP 0x08000000 -+ -+#define PF_HP_PAGE_SIZE 0x00100000 -+#define PF_HP_FAR_SHARED 0x00200000 -+#define PF_HP_NEAR_SHARED 0x00400000 -+#define PF_HP_CODE 0x01000000 -+#define PF_HP_MODIFY 0x02000000 -+#define PF_HP_LAZYSWAP 0x04000000 -+#define PF_HP_SBP 0x08000000 -+ -+ -+/* Alpha specific definitions. */ -+ -+/* Legal values for e_flags field of Elf64_Ehdr. */ -+ -+#define EF_ALPHA_32BIT 1 /* All addresses must be < 2GB. */ -+#define EF_ALPHA_CANRELAX 2 /* Relocations for relaxing exist. */ -+ -+/* Legal values for sh_type field of Elf64_Shdr. */ -+ -+/* These two are primerily concerned with ECOFF debugging info. */ -+#define SHT_ALPHA_DEBUG 0x70000001 -+#define SHT_ALPHA_REGINFO 0x70000002 -+ -+/* Legal values for sh_flags field of Elf64_Shdr. */ -+ -+#define SHF_ALPHA_GPREL 0x10000000 -+ -+/* Legal values for st_other field of Elf64_Sym. */ -+#define STO_ALPHA_NOPV 0x80 /* No PV required. */ -+#define STO_ALPHA_STD_GPLOAD 0x88 /* PV only used for initial ldgp. */ -+ -+/* Alpha relocs. */ -+ -+#define R_ALPHA_NONE 0 /* No reloc */ -+#define R_ALPHA_REFLONG 1 /* Direct 32 bit */ -+#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */ -+#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */ -+#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */ -+#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */ -+#define R_ALPHA_GPDISP 6 /* Add displacement to GP */ -+#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */ -+#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */ -+#define R_ALPHA_SREL16 9 /* PC relative 16 bit */ -+#define R_ALPHA_SREL32 10 /* PC relative 32 bit */ -+#define R_ALPHA_SREL64 11 /* PC relative 64 bit */ -+#define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */ -+#define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */ -+#define R_ALPHA_GPREL16 19 /* GP relative 16 bit */ -+#define R_ALPHA_COPY 24 /* Copy symbol at runtime */ -+#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */ -+#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */ -+#define R_ALPHA_RELATIVE 27 /* Adjust by program base */ -+#define R_ALPHA_TLS_GD_HI 28 -+#define R_ALPHA_TLSGD 29 -+#define R_ALPHA_TLS_LDM 30 -+#define R_ALPHA_DTPMOD64 31 -+#define R_ALPHA_GOTDTPREL 32 -+#define R_ALPHA_DTPREL64 33 -+#define R_ALPHA_DTPRELHI 34 -+#define R_ALPHA_DTPRELLO 35 -+#define R_ALPHA_DTPREL16 36 -+#define R_ALPHA_GOTTPREL 37 -+#define R_ALPHA_TPREL64 38 -+#define R_ALPHA_TPRELHI 39 -+#define R_ALPHA_TPRELLO 40 -+#define R_ALPHA_TPREL16 41 -+/* Keep this the last entry. */ -+#define R_ALPHA_NUM 46 -+ -+/* Magic values of the LITUSE relocation addend. */ -+#define LITUSE_ALPHA_ADDR 0 -+#define LITUSE_ALPHA_BASE 1 -+#define LITUSE_ALPHA_BYTOFF 2 -+#define LITUSE_ALPHA_JSR 3 -+#define LITUSE_ALPHA_TLS_GD 4 -+#define LITUSE_ALPHA_TLS_LDM 5 -+ -+/* Legal values for d_tag of Elf64_Dyn. */ -+#define DT_ALPHA_PLTRO (DT_LOPROC + 0) -+#define DT_ALPHA_NUM 1 -+ -+/* PowerPC specific declarations */ -+ -+/* Values for Elf32/64_Ehdr.e_flags. */ -+#define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag */ -+ -+/* Cygnus local bits below */ -+#define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag*/ -+#define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib -+ flag */ -+ -+/* PowerPC relocations defined by the ABIs */ -+#define R_PPC_NONE 0 -+#define R_PPC_ADDR32 1 /* 32bit absolute address */ -+#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ -+#define R_PPC_ADDR16 3 /* 16bit absolute address */ -+#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ -+#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ -+#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ -+#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ -+#define R_PPC_ADDR14_BRTAKEN 8 -+#define R_PPC_ADDR14_BRNTAKEN 9 -+#define R_PPC_REL24 10 /* PC relative 26 bit */ -+#define R_PPC_REL14 11 /* PC relative 16 bit */ -+#define R_PPC_REL14_BRTAKEN 12 -+#define R_PPC_REL14_BRNTAKEN 13 -+#define R_PPC_GOT16 14 -+#define R_PPC_GOT16_LO 15 -+#define R_PPC_GOT16_HI 16 -+#define R_PPC_GOT16_HA 17 -+#define R_PPC_PLTREL24 18 -+#define R_PPC_COPY 19 -+#define R_PPC_GLOB_DAT 20 -+#define R_PPC_JMP_SLOT 21 -+#define R_PPC_RELATIVE 22 -+#define R_PPC_LOCAL24PC 23 -+#define R_PPC_UADDR32 24 -+#define R_PPC_UADDR16 25 -+#define R_PPC_REL32 26 -+#define R_PPC_PLT32 27 -+#define R_PPC_PLTREL32 28 -+#define R_PPC_PLT16_LO 29 -+#define R_PPC_PLT16_HI 30 -+#define R_PPC_PLT16_HA 31 -+#define R_PPC_SDAREL16 32 -+#define R_PPC_SECTOFF 33 -+#define R_PPC_SECTOFF_LO 34 -+#define R_PPC_SECTOFF_HI 35 -+#define R_PPC_SECTOFF_HA 36 -+ -+/* PowerPC relocations defined for the TLS access ABI. */ -+#define R_PPC_TLS 67 /* none (sym+add)@tls */ -+#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */ -+#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */ -+#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ -+#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ -+#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ -+#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */ -+#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */ -+#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ -+#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ -+#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ -+#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */ -+#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ -+#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ -+#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ -+#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ -+#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ -+#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ -+#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ -+#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ -+#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */ -+#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */ -+#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ -+#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ -+#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */ -+#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */ -+#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ -+#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ -+ -+/* The remaining relocs are from the Embedded ELF ABI, and are not -+ in the SVR4 ELF ABI. */ -+#define R_PPC_EMB_NADDR32 101 -+#define R_PPC_EMB_NADDR16 102 -+#define R_PPC_EMB_NADDR16_LO 103 -+#define R_PPC_EMB_NADDR16_HI 104 -+#define R_PPC_EMB_NADDR16_HA 105 -+#define R_PPC_EMB_SDAI16 106 -+#define R_PPC_EMB_SDA2I16 107 -+#define R_PPC_EMB_SDA2REL 108 -+#define R_PPC_EMB_SDA21 109 /* 16 bit offset in SDA */ -+#define R_PPC_EMB_MRKREF 110 -+#define R_PPC_EMB_RELSEC16 111 -+#define R_PPC_EMB_RELST_LO 112 -+#define R_PPC_EMB_RELST_HI 113 -+#define R_PPC_EMB_RELST_HA 114 -+#define R_PPC_EMB_BIT_FLD 115 -+#define R_PPC_EMB_RELSDA 116 /* 16 bit relative offset in SDA */ -+ -+/* Diab tool relocations. */ -+#define R_PPC_DIAB_SDA21_LO 180 /* like EMB_SDA21, but lower 16 bit */ -+#define R_PPC_DIAB_SDA21_HI 181 /* like EMB_SDA21, but high 16 bit */ -+#define R_PPC_DIAB_SDA21_HA 182 /* like EMB_SDA21, adjusted high 16 */ -+#define R_PPC_DIAB_RELSDA_LO 183 /* like EMB_RELSDA, but lower 16 bit */ -+#define R_PPC_DIAB_RELSDA_HI 184 /* like EMB_RELSDA, but high 16 bit */ -+#define R_PPC_DIAB_RELSDA_HA 185 /* like EMB_RELSDA, adjusted high 16 */ -+ -+/* GNU extension to support local ifunc. */ -+#define R_PPC_IRELATIVE 248 -+ -+/* GNU relocs used in PIC code sequences. */ -+#define R_PPC_REL16 249 /* half16 (sym+add-.) */ -+#define R_PPC_REL16_LO 250 /* half16 (sym+add-.)@l */ -+#define R_PPC_REL16_HI 251 /* half16 (sym+add-.)@h */ -+#define R_PPC_REL16_HA 252 /* half16 (sym+add-.)@ha */ -+ -+/* This is a phony reloc to handle any old fashioned TOC16 references -+ that may still be in object files. */ -+#define R_PPC_TOC16 255 -+ -+/* PowerPC specific values for the Dyn d_tag field. */ -+#define DT_PPC_GOT (DT_LOPROC + 0) -+#define DT_PPC_NUM 1 -+ -+/* PowerPC64 relocations defined by the ABIs */ -+#define R_PPC64_NONE R_PPC_NONE -+#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address */ -+#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned */ -+#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address */ -+#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of address */ -+#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of address. */ -+#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */ -+#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned */ -+#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN -+#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN -+#define R_PPC64_REL24 R_PPC_REL24 /* PC-rel. 26 bit, word aligned */ -+#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit */ -+#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN -+#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN -+#define R_PPC64_GOT16 R_PPC_GOT16 -+#define R_PPC64_GOT16_LO R_PPC_GOT16_LO -+#define R_PPC64_GOT16_HI R_PPC_GOT16_HI -+#define R_PPC64_GOT16_HA R_PPC_GOT16_HA -+ -+#define R_PPC64_COPY R_PPC_COPY -+#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT -+#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT -+#define R_PPC64_RELATIVE R_PPC_RELATIVE -+ -+#define R_PPC64_UADDR32 R_PPC_UADDR32 -+#define R_PPC64_UADDR16 R_PPC_UADDR16 -+#define R_PPC64_REL32 R_PPC_REL32 -+#define R_PPC64_PLT32 R_PPC_PLT32 -+#define R_PPC64_PLTREL32 R_PPC_PLTREL32 -+#define R_PPC64_PLT16_LO R_PPC_PLT16_LO -+#define R_PPC64_PLT16_HI R_PPC_PLT16_HI -+#define R_PPC64_PLT16_HA R_PPC_PLT16_HA -+ -+#define R_PPC64_SECTOFF R_PPC_SECTOFF -+#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO -+#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI -+#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA -+#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2 */ -+#define R_PPC64_ADDR64 38 /* doubleword64 S + A */ -+#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A) */ -+#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A) */ -+#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A) */ -+#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A) */ -+#define R_PPC64_UADDR64 43 /* doubleword64 S + A */ -+#define R_PPC64_REL64 44 /* doubleword64 S + A - P */ -+#define R_PPC64_PLT64 45 /* doubleword64 L + A */ -+#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P */ -+#define R_PPC64_TOC16 47 /* half16* S + A - .TOC */ -+#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.) */ -+#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.) */ -+#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.) */ -+#define R_PPC64_TOC 51 /* doubleword64 .TOC */ -+#define R_PPC64_PLTGOT16 52 /* half16* M + A */ -+#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A) */ -+#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A) */ -+#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A) */ -+ -+#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2 */ -+#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2 */ -+#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2 */ -+#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2 */ -+#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2 */ -+#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2 */ -+#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2 */ -+#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2 */ -+#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2 */ -+#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2 */ -+#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2 */ -+ -+/* PowerPC64 relocations defined for the TLS access ABI. */ -+#define R_PPC64_TLS 67 /* none (sym+add)@tls */ -+#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */ -+#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */ -+#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ -+#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ -+#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ -+#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */ -+#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */ -+#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ -+#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ -+#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ -+#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */ -+#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ -+#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ -+#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ -+#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ -+#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ -+#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ -+#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ -+#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ -+#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */ -+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */ -+#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ -+#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ -+#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */ -+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */ -+#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */ -+#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */ -+#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */ -+#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */ -+#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */ -+#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */ -+#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */ -+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */ -+#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */ -+#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */ -+#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */ -+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */ -+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */ -+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */ -+ -+/* GNU extension to support local ifunc. */ -+#define R_PPC64_JMP_IREL 247 -+#define R_PPC64_IRELATIVE 248 -+#define R_PPC64_REL16 249 /* half16 (sym+add-.) */ -+#define R_PPC64_REL16_LO 250 /* half16 (sym+add-.)@l */ -+#define R_PPC64_REL16_HI 251 /* half16 (sym+add-.)@h */ -+#define R_PPC64_REL16_HA 252 /* half16 (sym+add-.)@ha */ -+ -+/* PowerPC64 specific values for the Dyn d_tag field. */ -+#define DT_PPC64_GLINK (DT_LOPROC + 0) -+#define DT_PPC64_OPD (DT_LOPROC + 1) -+#define DT_PPC64_OPDSZ (DT_LOPROC + 2) -+#define DT_PPC64_NUM 3 -+ -+ -+/* ARM specific declarations */ -+ -+/* Processor specific flags for the ELF header e_flags field. */ -+#define EF_ARM_RELEXEC 0x01 -+#define EF_ARM_HASENTRY 0x02 -+#define EF_ARM_INTERWORK 0x04 -+#define EF_ARM_APCS_26 0x08 -+#define EF_ARM_APCS_FLOAT 0x10 -+#define EF_ARM_PIC 0x20 -+#define EF_ARM_ALIGN8 0x40 /* 8-bit structure alignment is in use */ -+#define EF_ARM_NEW_ABI 0x80 -+#define EF_ARM_OLD_ABI 0x100 -+#define EF_ARM_SOFT_FLOAT 0x200 -+#define EF_ARM_VFP_FLOAT 0x400 -+#define EF_ARM_MAVERICK_FLOAT 0x800 -+ -+ -+/* Other constants defined in the ARM ELF spec. version B-01. */ -+/* NB. These conflict with values defined above. */ -+#define EF_ARM_SYMSARESORTED 0x04 -+#define EF_ARM_DYNSYMSUSESEGIDX 0x08 -+#define EF_ARM_MAPSYMSFIRST 0x10 -+#define EF_ARM_EABIMASK 0XFF000000 -+ -+/* Constants defined in AAELF. */ -+#define EF_ARM_BE8 0x00800000 -+#define EF_ARM_LE8 0x00400000 -+ -+#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK) -+#define EF_ARM_EABI_UNKNOWN 0x00000000 -+#define EF_ARM_EABI_VER1 0x01000000 -+#define EF_ARM_EABI_VER2 0x02000000 -+#define EF_ARM_EABI_VER3 0x03000000 -+#define EF_ARM_EABI_VER4 0x04000000 -+#define EF_ARM_EABI_VER5 0x05000000 -+ -+/* Additional symbol types for Thumb. */ -+#define STT_ARM_TFUNC STT_LOPROC /* A Thumb function. */ -+#define STT_ARM_16BIT STT_HIPROC /* A Thumb label. */ -+ -+/* ARM-specific values for sh_flags */ -+#define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ -+#define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined -+ in the input to a link step. */ -+ -+/* ARM-specific program header flags */ -+#define PF_ARM_SB 0x10000000 /* Segment contains the location -+ addressed by the static base. */ -+#define PF_ARM_PI 0x20000000 /* Position-independent segment. */ -+#define PF_ARM_ABS 0x40000000 /* Absolute segment. */ -+ -+/* Processor specific values for the Phdr p_type field. */ -+#define PT_ARM_EXIDX (PT_LOPROC + 1) /* ARM unwind segment. */ -+ -+/* Processor specific values for the Shdr sh_type field. */ -+#define SHT_ARM_EXIDX (SHT_LOPROC + 1) /* ARM unwind section. */ -+#define SHT_ARM_PREEMPTMAP (SHT_LOPROC + 2) /* Preemption details. */ -+#define SHT_ARM_ATTRIBUTES (SHT_LOPROC + 3) /* ARM attributes section. */ -+ -+ -+/* ARM relocs. */ -+ -+#define R_ARM_NONE 0 /* No reloc */ -+#define R_ARM_PC24 1 /* PC relative 26 bit branch */ -+#define R_ARM_ABS32 2 /* Direct 32 bit */ -+#define R_ARM_REL32 3 /* PC relative 32 bit */ -+#define R_ARM_PC13 4 -+#define R_ARM_ABS16 5 /* Direct 16 bit */ -+#define R_ARM_ABS12 6 /* Direct 12 bit */ -+#define R_ARM_THM_ABS5 7 -+#define R_ARM_ABS8 8 /* Direct 8 bit */ -+#define R_ARM_SBREL32 9 -+#define R_ARM_THM_PC22 10 -+#define R_ARM_THM_PC8 11 -+#define R_ARM_AMP_VCALL9 12 -+#define R_ARM_SWI24 13 /* Obsolete static relocation. */ -+#define R_ARM_TLS_DESC 13 /* Dynamic relocation. */ -+#define R_ARM_THM_SWI8 14 -+#define R_ARM_XPC25 15 -+#define R_ARM_THM_XPC22 16 -+#define R_ARM_TLS_DTPMOD32 17 /* ID of module containing symbol */ -+#define R_ARM_TLS_DTPOFF32 18 /* Offset in TLS block */ -+#define R_ARM_TLS_TPOFF32 19 /* Offset in static TLS block */ -+#define R_ARM_COPY 20 /* Copy symbol at runtime */ -+#define R_ARM_GLOB_DAT 21 /* Create GOT entry */ -+#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */ -+#define R_ARM_RELATIVE 23 /* Adjust by program base */ -+#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */ -+#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ -+#define R_ARM_GOT32 26 /* 32 bit GOT entry */ -+#define R_ARM_PLT32 27 /* 32 bit PLT address */ -+#define R_ARM_ALU_PCREL_7_0 32 -+#define R_ARM_ALU_PCREL_15_8 33 -+#define R_ARM_ALU_PCREL_23_15 34 -+#define R_ARM_LDR_SBREL_11_0 35 -+#define R_ARM_ALU_SBREL_19_12 36 -+#define R_ARM_ALU_SBREL_27_20 37 -+#define R_ARM_TLS_GOTDESC 90 -+#define R_ARM_TLS_CALL 91 -+#define R_ARM_TLS_DESCSEQ 92 -+#define R_ARM_THM_TLS_CALL 93 -+#define R_ARM_GNU_VTENTRY 100 -+#define R_ARM_GNU_VTINHERIT 101 -+#define R_ARM_THM_PC11 102 /* thumb unconditional branch */ -+#define R_ARM_THM_PC9 103 /* thumb conditional branch */ -+#define R_ARM_TLS_GD32 104 /* PC-rel 32 bit for global dynamic -+ thread local data */ -+#define R_ARM_TLS_LDM32 105 /* PC-rel 32 bit for local dynamic -+ thread local data */ -+#define R_ARM_TLS_LDO32 106 /* 32 bit offset relative to TLS -+ block */ -+#define R_ARM_TLS_IE32 107 /* PC-rel 32 bit for GOT entry of -+ static TLS block offset */ -+#define R_ARM_TLS_LE32 108 /* 32 bit offset relative to static -+ TLS block */ -+#define R_ARM_THM_TLS_DESCSEQ 129 -+#define R_ARM_IRELATIVE 160 -+#define R_ARM_RXPC25 249 -+#define R_ARM_RSBREL32 250 -+#define R_ARM_THM_RPC22 251 -+#define R_ARM_RREL32 252 -+#define R_ARM_RABS22 253 -+#define R_ARM_RPC24 254 -+#define R_ARM_RBASE 255 -+/* Keep this the last entry. */ -+#define R_ARM_NUM 256 -+ -+/* IA-64 specific declarations. */ -+ -+/* Processor specific flags for the Ehdr e_flags field. */ -+#define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */ -+#define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */ -+#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */ -+ -+/* Processor specific values for the Phdr p_type field. */ -+#define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */ -+#define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */ -+#define PT_IA_64_HP_OPT_ANOT (PT_LOOS + 0x12) -+#define PT_IA_64_HP_HSL_ANOT (PT_LOOS + 0x13) -+#define PT_IA_64_HP_STACK (PT_LOOS + 0x14) -+ -+/* Processor specific flags for the Phdr p_flags field. */ -+#define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */ -+ -+/* Processor specific values for the Shdr sh_type field. */ -+#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */ -+#define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */ -+ -+/* Processor specific flags for the Shdr sh_flags field. */ -+#define SHF_IA_64_SHORT 0x10000000 /* section near gp */ -+#define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */ -+ -+/* Processor specific values for the Dyn d_tag field. */ -+#define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) -+#define DT_IA_64_NUM 1 -+ -+/* IA-64 relocations. */ -+#define R_IA64_NONE 0x00 /* none */ -+#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ -+#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ -+#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ -+#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ -+#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ -+#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ -+#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ -+#define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */ -+#define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */ -+#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */ -+#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */ -+#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */ -+#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */ -+#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */ -+#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */ -+#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */ -+#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */ -+#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */ -+#define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */ -+#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */ -+#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */ -+#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */ -+#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */ -+#define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */ -+#define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */ -+#define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */ -+#define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */ -+#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */ -+#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */ -+#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */ -+#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ -+#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ -+#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */ -+#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */ -+#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */ -+#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */ -+#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */ -+#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */ -+#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */ -+#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */ -+#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */ -+#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */ -+#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */ -+#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */ -+#define R_IA64_REL32MSB 0x6c /* data 4 + REL */ -+#define R_IA64_REL32LSB 0x6d /* data 4 + REL */ -+#define R_IA64_REL64MSB 0x6e /* data 8 + REL */ -+#define R_IA64_REL64LSB 0x6f /* data 8 + REL */ -+#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ -+#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ -+#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ -+#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ -+#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */ -+#define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */ -+#define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */ -+#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ -+#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ -+#define R_IA64_COPY 0x84 /* copy relocation */ -+#define R_IA64_SUB 0x85 /* Addend and symbol difference */ -+#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ -+#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ -+#define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */ -+#define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */ -+#define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */ -+#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */ -+#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */ -+#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */ -+#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */ -+#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */ -+#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */ -+#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */ -+#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */ -+#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */ -+#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */ -+#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */ -+#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ -+ -+/* SH specific declarations */ -+ -+/* Processor specific flags for the ELF header e_flags field. */ -+#define EF_SH_MACH_MASK 0x1f -+#define EF_SH_UNKNOWN 0x0 -+#define EF_SH1 0x1 -+#define EF_SH2 0x2 -+#define EF_SH3 0x3 -+#define EF_SH_DSP 0x4 -+#define EF_SH3_DSP 0x5 -+#define EF_SH4AL_DSP 0x6 -+#define EF_SH3E 0x8 -+#define EF_SH4 0x9 -+#define EF_SH2E 0xb -+#define EF_SH4A 0xc -+#define EF_SH2A 0xd -+#define EF_SH4_NOFPU 0x10 -+#define EF_SH4A_NOFPU 0x11 -+#define EF_SH4_NOMMU_NOFPU 0x12 -+#define EF_SH2A_NOFPU 0x13 -+#define EF_SH3_NOMMU 0x14 -+#define EF_SH2A_SH4_NOFPU 0x15 -+#define EF_SH2A_SH3_NOFPU 0x16 -+#define EF_SH2A_SH4 0x17 -+#define EF_SH2A_SH3E 0x18 -+ -+/* SH relocs. */ -+#define R_SH_NONE 0 -+#define R_SH_DIR32 1 -+#define R_SH_REL32 2 -+#define R_SH_DIR8WPN 3 -+#define R_SH_IND12W 4 -+#define R_SH_DIR8WPL 5 -+#define R_SH_DIR8WPZ 6 -+#define R_SH_DIR8BP 7 -+#define R_SH_DIR8W 8 -+#define R_SH_DIR8L 9 -+#define R_SH_SWITCH16 25 -+#define R_SH_SWITCH32 26 -+#define R_SH_USES 27 -+#define R_SH_COUNT 28 -+#define R_SH_ALIGN 29 -+#define R_SH_CODE 30 -+#define R_SH_DATA 31 -+#define R_SH_LABEL 32 -+#define R_SH_SWITCH8 33 -+#define R_SH_GNU_VTINHERIT 34 -+#define R_SH_GNU_VTENTRY 35 -+#define R_SH_TLS_GD_32 144 -+#define R_SH_TLS_LD_32 145 -+#define R_SH_TLS_LDO_32 146 -+#define R_SH_TLS_IE_32 147 -+#define R_SH_TLS_LE_32 148 -+#define R_SH_TLS_DTPMOD32 149 -+#define R_SH_TLS_DTPOFF32 150 -+#define R_SH_TLS_TPOFF32 151 -+#define R_SH_GOT32 160 -+#define R_SH_PLT32 161 -+#define R_SH_COPY 162 -+#define R_SH_GLOB_DAT 163 -+#define R_SH_JMP_SLOT 164 -+#define R_SH_RELATIVE 165 -+#define R_SH_GOTOFF 166 -+#define R_SH_GOTPC 167 -+/* Keep this the last entry. */ -+#define R_SH_NUM 256 -+ -+/* S/390 specific definitions. */ -+ -+/* Valid values for the e_flags field. */ -+ -+#define EF_S390_HIGH_GPRS 0x00000001 /* High GPRs kernel facility needed. */ -+ -+/* Additional s390 relocs */ -+ -+#define R_390_NONE 0 /* No reloc. */ -+#define R_390_8 1 /* Direct 8 bit. */ -+#define R_390_12 2 /* Direct 12 bit. */ -+#define R_390_16 3 /* Direct 16 bit. */ -+#define R_390_32 4 /* Direct 32 bit. */ -+#define R_390_PC32 5 /* PC relative 32 bit. */ -+#define R_390_GOT12 6 /* 12 bit GOT offset. */ -+#define R_390_GOT32 7 /* 32 bit GOT offset. */ -+#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */ -+#define R_390_COPY 9 /* Copy symbol at runtime. */ -+#define R_390_GLOB_DAT 10 /* Create GOT entry. */ -+#define R_390_JMP_SLOT 11 /* Create PLT entry. */ -+#define R_390_RELATIVE 12 /* Adjust by program base. */ -+#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */ -+#define R_390_GOTPC 14 /* 32 bit PC relative offset to GOT. */ -+#define R_390_GOT16 15 /* 16 bit GOT offset. */ -+#define R_390_PC16 16 /* PC relative 16 bit. */ -+#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */ -+#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */ -+#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */ -+#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */ -+#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */ -+#define R_390_64 22 /* Direct 64 bit. */ -+#define R_390_PC64 23 /* PC relative 64 bit. */ -+#define R_390_GOT64 24 /* 64 bit GOT offset. */ -+#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */ -+#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */ -+#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */ -+#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */ -+#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */ -+#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */ -+#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */ -+#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */ -+#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */ -+#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */ -+#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */ -+#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */ -+#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */ -+#define R_390_TLS_GDCALL 38 /* Tag for function call in general -+ dynamic TLS code. */ -+#define R_390_TLS_LDCALL 39 /* Tag for function call in local -+ dynamic TLS code. */ -+#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic -+ thread local data. */ -+#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic -+ thread local data. */ -+#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic -+ thread local data in LE code. */ -+#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic -+ thread local data in LE code. */ -+#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for -+ negated static TLS block offset. */ -+#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for -+ negated static TLS block offset. */ -+#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for -+ negated static TLS block offset. */ -+#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to -+ static TLS block. */ -+#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to -+ static TLS block. */ -+#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS -+ block. */ -+#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS -+ block. */ -+#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */ -+#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */ -+#define R_390_TLS_TPOFF 56 /* Negated offset in static TLS -+ block. */ -+#define R_390_20 57 /* Direct 20 bit. */ -+#define R_390_GOT20 58 /* 20 bit GOT offset. */ -+#define R_390_GOTPLT20 59 /* 20 bit offset to jump slot. */ -+#define R_390_TLS_GOTIE20 60 /* 20 bit GOT offset for static TLS -+ block offset. */ -+#define R_390_IRELATIVE 61 /* STT_GNU_IFUNC relocation. */ -+/* Keep this the last entry. */ -+#define R_390_NUM 62 -+ -+ -+/* CRIS relocations. */ -+#define R_CRIS_NONE 0 -+#define R_CRIS_8 1 -+#define R_CRIS_16 2 -+#define R_CRIS_32 3 -+#define R_CRIS_8_PCREL 4 -+#define R_CRIS_16_PCREL 5 -+#define R_CRIS_32_PCREL 6 -+#define R_CRIS_GNU_VTINHERIT 7 -+#define R_CRIS_GNU_VTENTRY 8 -+#define R_CRIS_COPY 9 -+#define R_CRIS_GLOB_DAT 10 -+#define R_CRIS_JUMP_SLOT 11 -+#define R_CRIS_RELATIVE 12 -+#define R_CRIS_16_GOT 13 -+#define R_CRIS_32_GOT 14 -+#define R_CRIS_16_GOTPLT 15 -+#define R_CRIS_32_GOTPLT 16 -+#define R_CRIS_32_GOTREL 17 -+#define R_CRIS_32_PLT_GOTREL 18 -+#define R_CRIS_32_PLT_PCREL 19 -+ -+#define R_CRIS_NUM 20 -+ -+ -+/* AMD x86-64 relocations. */ -+#define R_X86_64_NONE 0 /* No reloc */ -+#define R_X86_64_64 1 /* Direct 64 bit */ -+#define R_X86_64_PC32 2 /* PC relative 32 bit signed */ -+#define R_X86_64_GOT32 3 /* 32 bit GOT entry */ -+#define R_X86_64_PLT32 4 /* 32 bit PLT address */ -+#define R_X86_64_COPY 5 /* Copy symbol at runtime */ -+#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */ -+#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ -+#define R_X86_64_RELATIVE 8 /* Adjust by program base */ -+#define R_X86_64_GOTPCREL 9 /* 32 bit signed PC relative -+ offset to GOT */ -+#define R_X86_64_32 10 /* Direct 32 bit zero extended */ -+#define R_X86_64_32S 11 /* Direct 32 bit sign extended */ -+#define R_X86_64_16 12 /* Direct 16 bit zero extended */ -+#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */ -+#define R_X86_64_8 14 /* Direct 8 bit sign extended */ -+#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */ -+#define R_X86_64_DTPMOD64 16 /* ID of module containing symbol */ -+#define R_X86_64_DTPOFF64 17 /* Offset in module's TLS block */ -+#define R_X86_64_TPOFF64 18 /* Offset in initial TLS block */ -+#define R_X86_64_TLSGD 19 /* 32 bit signed PC relative offset -+ to two GOT entries for GD symbol */ -+#define R_X86_64_TLSLD 20 /* 32 bit signed PC relative offset -+ to two GOT entries for LD symbol */ -+#define R_X86_64_DTPOFF32 21 /* Offset in TLS block */ -+#define R_X86_64_GOTTPOFF 22 /* 32 bit signed PC relative offset -+ to GOT entry for IE symbol */ -+#define R_X86_64_TPOFF32 23 /* Offset in initial TLS block */ -+#define R_X86_64_PC64 24 /* PC relative 64 bit */ -+#define R_X86_64_GOTOFF64 25 /* 64 bit offset to GOT */ -+#define R_X86_64_GOTPC32 26 /* 32 bit signed pc relative -+ offset to GOT */ -+#define R_X86_64_GOT64 27 /* 64-bit GOT entry offset */ -+#define R_X86_64_GOTPCREL64 28 /* 64-bit PC relative offset -+ to GOT entry */ -+#define R_X86_64_GOTPC64 29 /* 64-bit PC relative offset to GOT */ -+#define R_X86_64_GOTPLT64 30 /* like GOT64, says PLT entry needed */ -+#define R_X86_64_PLTOFF64 31 /* 64-bit GOT relative offset -+ to PLT entry */ -+#define R_X86_64_SIZE32 32 /* Size of symbol plus 32-bit addend */ -+#define R_X86_64_SIZE64 33 /* Size of symbol plus 64-bit addend */ -+#define R_X86_64_GOTPC32_TLSDESC 34 /* GOT offset for TLS descriptor. */ -+#define R_X86_64_TLSDESC_CALL 35 /* Marker for call through TLS -+ descriptor. */ -+#define R_X86_64_TLSDESC 36 /* TLS descriptor. */ -+#define R_X86_64_IRELATIVE 37 /* Adjust indirectly by program base */ -+#define R_X86_64_RELATIVE64 38 /* 64-bit adjust by program base */ -+ -+#define R_X86_64_NUM 39 -+ -+ -+/* AM33 relocations. */ -+#define R_MN10300_NONE 0 /* No reloc. */ -+#define R_MN10300_32 1 /* Direct 32 bit. */ -+#define R_MN10300_16 2 /* Direct 16 bit. */ -+#define R_MN10300_8 3 /* Direct 8 bit. */ -+#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */ -+#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */ -+#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */ -+#define R_MN10300_GNU_VTINHERIT 7 /* Ancient C++ vtable garbage... */ -+#define R_MN10300_GNU_VTENTRY 8 /* ... collection annotation. */ -+#define R_MN10300_24 9 /* Direct 24 bit. */ -+#define R_MN10300_GOTPC32 10 /* 32-bit PCrel offset to GOT. */ -+#define R_MN10300_GOTPC16 11 /* 16-bit PCrel offset to GOT. */ -+#define R_MN10300_GOTOFF32 12 /* 32-bit offset from GOT. */ -+#define R_MN10300_GOTOFF24 13 /* 24-bit offset from GOT. */ -+#define R_MN10300_GOTOFF16 14 /* 16-bit offset from GOT. */ -+#define R_MN10300_PLT32 15 /* 32-bit PCrel to PLT entry. */ -+#define R_MN10300_PLT16 16 /* 16-bit PCrel to PLT entry. */ -+#define R_MN10300_GOT32 17 /* 32-bit offset to GOT entry. */ -+#define R_MN10300_GOT24 18 /* 24-bit offset to GOT entry. */ -+#define R_MN10300_GOT16 19 /* 16-bit offset to GOT entry. */ -+#define R_MN10300_COPY 20 /* Copy symbol at runtime. */ -+#define R_MN10300_GLOB_DAT 21 /* Create GOT entry. */ -+#define R_MN10300_JMP_SLOT 22 /* Create PLT entry. */ -+#define R_MN10300_RELATIVE 23 /* Adjust by program base. */ -+ -+#define R_MN10300_NUM 24 -+ -+ -+/* M32R relocs. */ -+#define R_M32R_NONE 0 /* No reloc. */ -+#define R_M32R_16 1 /* Direct 16 bit. */ -+#define R_M32R_32 2 /* Direct 32 bit. */ -+#define R_M32R_24 3 /* Direct 24 bit. */ -+#define R_M32R_10_PCREL 4 /* PC relative 10 bit shifted. */ -+#define R_M32R_18_PCREL 5 /* PC relative 18 bit shifted. */ -+#define R_M32R_26_PCREL 6 /* PC relative 26 bit shifted. */ -+#define R_M32R_HI16_ULO 7 /* High 16 bit with unsigned low. */ -+#define R_M32R_HI16_SLO 8 /* High 16 bit with signed low. */ -+#define R_M32R_LO16 9 /* Low 16 bit. */ -+#define R_M32R_SDA16 10 /* 16 bit offset in SDA. */ -+#define R_M32R_GNU_VTINHERIT 11 -+#define R_M32R_GNU_VTENTRY 12 -+/* M32R relocs use SHT_RELA. */ -+#define R_M32R_16_RELA 33 /* Direct 16 bit. */ -+#define R_M32R_32_RELA 34 /* Direct 32 bit. */ -+#define R_M32R_24_RELA 35 /* Direct 24 bit. */ -+#define R_M32R_10_PCREL_RELA 36 /* PC relative 10 bit shifted. */ -+#define R_M32R_18_PCREL_RELA 37 /* PC relative 18 bit shifted. */ -+#define R_M32R_26_PCREL_RELA 38 /* PC relative 26 bit shifted. */ -+#define R_M32R_HI16_ULO_RELA 39 /* High 16 bit with unsigned low */ -+#define R_M32R_HI16_SLO_RELA 40 /* High 16 bit with signed low */ -+#define R_M32R_LO16_RELA 41 /* Low 16 bit */ -+#define R_M32R_SDA16_RELA 42 /* 16 bit offset in SDA */ -+#define R_M32R_RELA_GNU_VTINHERIT 43 -+#define R_M32R_RELA_GNU_VTENTRY 44 -+#define R_M32R_REL32 45 /* PC relative 32 bit. */ -+ -+#define R_M32R_GOT24 48 /* 24 bit GOT entry */ -+#define R_M32R_26_PLTREL 49 /* 26 bit PC relative to PLT shifted */ -+#define R_M32R_COPY 50 /* Copy symbol at runtime */ -+#define R_M32R_GLOB_DAT 51 /* Create GOT entry */ -+#define R_M32R_JMP_SLOT 52 /* Create PLT entry */ -+#define R_M32R_RELATIVE 53 /* Adjust by program base */ -+#define R_M32R_GOTOFF 54 /* 24 bit offset to GOT */ -+#define R_M32R_GOTPC24 55 /* 24 bit PC relative offset to GOT */ -+#define R_M32R_GOT16_HI_ULO 56 /* High 16 bit GOT entry with unsigned -+ low */ -+#define R_M32R_GOT16_HI_SLO 57 /* High 16 bit GOT entry with signed -+ low */ -+#define R_M32R_GOT16_LO 58 /* Low 16 bit GOT entry */ -+#define R_M32R_GOTPC_HI_ULO 59 /* High 16 bit PC relative offset to -+ GOT with unsigned low */ -+#define R_M32R_GOTPC_HI_SLO 60 /* High 16 bit PC relative offset to -+ GOT with signed low */ -+#define R_M32R_GOTPC_LO 61 /* Low 16 bit PC relative offset to -+ GOT */ -+#define R_M32R_GOTOFF_HI_ULO 62 /* High 16 bit offset to GOT -+ with unsigned low */ -+#define R_M32R_GOTOFF_HI_SLO 63 /* High 16 bit offset to GOT -+ with signed low */ -+#define R_M32R_GOTOFF_LO 64 /* Low 16 bit offset to GOT */ -+#define R_M32R_NUM 256 /* Keep this the last entry. */ -+ -+ -+/* TILEPro relocations. */ -+#define R_TILEPRO_NONE 0 /* No reloc */ -+#define R_TILEPRO_32 1 /* Direct 32 bit */ -+#define R_TILEPRO_16 2 /* Direct 16 bit */ -+#define R_TILEPRO_8 3 /* Direct 8 bit */ -+#define R_TILEPRO_32_PCREL 4 /* PC relative 32 bit */ -+#define R_TILEPRO_16_PCREL 5 /* PC relative 16 bit */ -+#define R_TILEPRO_8_PCREL 6 /* PC relative 8 bit */ -+#define R_TILEPRO_LO16 7 /* Low 16 bit */ -+#define R_TILEPRO_HI16 8 /* High 16 bit */ -+#define R_TILEPRO_HA16 9 /* High 16 bit, adjusted */ -+#define R_TILEPRO_COPY 10 /* Copy relocation */ -+#define R_TILEPRO_GLOB_DAT 11 /* Create GOT entry */ -+#define R_TILEPRO_JMP_SLOT 12 /* Create PLT entry */ -+#define R_TILEPRO_RELATIVE 13 /* Adjust by program base */ -+#define R_TILEPRO_BROFF_X1 14 /* X1 pipe branch offset */ -+#define R_TILEPRO_JOFFLONG_X1 15 /* X1 pipe jump offset */ -+#define R_TILEPRO_JOFFLONG_X1_PLT 16 /* X1 pipe jump offset to PLT */ -+#define R_TILEPRO_IMM8_X0 17 /* X0 pipe 8-bit */ -+#define R_TILEPRO_IMM8_Y0 18 /* Y0 pipe 8-bit */ -+#define R_TILEPRO_IMM8_X1 19 /* X1 pipe 8-bit */ -+#define R_TILEPRO_IMM8_Y1 20 /* Y1 pipe 8-bit */ -+#define R_TILEPRO_MT_IMM15_X1 21 /* X1 pipe mtspr */ -+#define R_TILEPRO_MF_IMM15_X1 22 /* X1 pipe mfspr */ -+#define R_TILEPRO_IMM16_X0 23 /* X0 pipe 16-bit */ -+#define R_TILEPRO_IMM16_X1 24 /* X1 pipe 16-bit */ -+#define R_TILEPRO_IMM16_X0_LO 25 /* X0 pipe low 16-bit */ -+#define R_TILEPRO_IMM16_X1_LO 26 /* X1 pipe low 16-bit */ -+#define R_TILEPRO_IMM16_X0_HI 27 /* X0 pipe high 16-bit */ -+#define R_TILEPRO_IMM16_X1_HI 28 /* X1 pipe high 16-bit */ -+#define R_TILEPRO_IMM16_X0_HA 29 /* X0 pipe high 16-bit, adjusted */ -+#define R_TILEPRO_IMM16_X1_HA 30 /* X1 pipe high 16-bit, adjusted */ -+#define R_TILEPRO_IMM16_X0_PCREL 31 /* X0 pipe PC relative 16 bit */ -+#define R_TILEPRO_IMM16_X1_PCREL 32 /* X1 pipe PC relative 16 bit */ -+#define R_TILEPRO_IMM16_X0_LO_PCREL 33 /* X0 pipe PC relative low 16 bit */ -+#define R_TILEPRO_IMM16_X1_LO_PCREL 34 /* X1 pipe PC relative low 16 bit */ -+#define R_TILEPRO_IMM16_X0_HI_PCREL 35 /* X0 pipe PC relative high 16 bit */ -+#define R_TILEPRO_IMM16_X1_HI_PCREL 36 /* X1 pipe PC relative high 16 bit */ -+#define R_TILEPRO_IMM16_X0_HA_PCREL 37 /* X0 pipe PC relative ha() 16 bit */ -+#define R_TILEPRO_IMM16_X1_HA_PCREL 38 /* X1 pipe PC relative ha() 16 bit */ -+#define R_TILEPRO_IMM16_X0_GOT 39 /* X0 pipe 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT 40 /* X1 pipe 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X0_GOT_LO 41 /* X0 pipe low 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT_LO 42 /* X1 pipe low 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X0_GOT_HI 43 /* X0 pipe high 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT_HI 44 /* X1 pipe high 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X0_GOT_HA 45 /* X0 pipe ha() 16-bit GOT offset */ -+#define R_TILEPRO_IMM16_X1_GOT_HA 46 /* X1 pipe ha() 16-bit GOT offset */ -+#define R_TILEPRO_MMSTART_X0 47 /* X0 pipe mm "start" */ -+#define R_TILEPRO_MMEND_X0 48 /* X0 pipe mm "end" */ -+#define R_TILEPRO_MMSTART_X1 49 /* X1 pipe mm "start" */ -+#define R_TILEPRO_MMEND_X1 50 /* X1 pipe mm "end" */ -+#define R_TILEPRO_SHAMT_X0 51 /* X0 pipe shift amount */ -+#define R_TILEPRO_SHAMT_X1 52 /* X1 pipe shift amount */ -+#define R_TILEPRO_SHAMT_Y0 53 /* Y0 pipe shift amount */ -+#define R_TILEPRO_SHAMT_Y1 54 /* Y1 pipe shift amount */ -+#define R_TILEPRO_DEST_IMM8_X1 55 /* X1 pipe destination 8-bit */ -+/* Relocs 56-59 are currently not defined. */ -+#define R_TILEPRO_TLS_GD_CALL 60 /* "jal" for TLS GD */ -+#define R_TILEPRO_IMM8_X0_TLS_GD_ADD 61 /* X0 pipe "addi" for TLS GD */ -+#define R_TILEPRO_IMM8_X1_TLS_GD_ADD 62 /* X1 pipe "addi" for TLS GD */ -+#define R_TILEPRO_IMM8_Y0_TLS_GD_ADD 63 /* Y0 pipe "addi" for TLS GD */ -+#define R_TILEPRO_IMM8_Y1_TLS_GD_ADD 64 /* Y1 pipe "addi" for TLS GD */ -+#define R_TILEPRO_TLS_IE_LOAD 65 /* "lw_tls" for TLS IE */ -+#define R_TILEPRO_IMM16_X0_TLS_GD 66 /* X0 pipe 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD 67 /* X1 pipe 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_GD_LO 68 /* X0 pipe low 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD_LO 69 /* X1 pipe low 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_GD_HI 70 /* X0 pipe high 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD_HI 71 /* X1 pipe high 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_GD_HA 72 /* X0 pipe ha() 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X1_TLS_GD_HA 73 /* X1 pipe ha() 16-bit TLS GD offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE 74 /* X0 pipe 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE 75 /* X1 pipe 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE_LO 76 /* X0 pipe low 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE_LO 77 /* X1 pipe low 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE_HI 78 /* X0 pipe high 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE_HI 79 /* X1 pipe high 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_IE_HA 80 /* X0 pipe ha() 16-bit TLS IE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_IE_HA 81 /* X1 pipe ha() 16-bit TLS IE offset */ -+#define R_TILEPRO_TLS_DTPMOD32 82 /* ID of module containing symbol */ -+#define R_TILEPRO_TLS_DTPOFF32 83 /* Offset in TLS block */ -+#define R_TILEPRO_TLS_TPOFF32 84 /* Offset in static TLS block */ -+#define R_TILEPRO_IMM16_X0_TLS_LE 85 /* X0 pipe 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE 86 /* X1 pipe 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_LE_LO 87 /* X0 pipe low 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE_LO 88 /* X1 pipe low 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_LE_HI 89 /* X0 pipe high 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE_HI 90 /* X1 pipe high 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X0_TLS_LE_HA 91 /* X0 pipe ha() 16-bit TLS LE offset */ -+#define R_TILEPRO_IMM16_X1_TLS_LE_HA 92 /* X1 pipe ha() 16-bit TLS LE offset */ -+ -+#define R_TILEPRO_GNU_VTINHERIT 128 /* GNU C++ vtable hierarchy */ -+#define R_TILEPRO_GNU_VTENTRY 129 /* GNU C++ vtable member usage */ -+ -+#define R_TILEPRO_NUM 130 -+ -+ -+/* TILE-Gx relocations. */ -+#define R_TILEGX_NONE 0 /* No reloc */ -+#define R_TILEGX_64 1 /* Direct 64 bit */ -+#define R_TILEGX_32 2 /* Direct 32 bit */ -+#define R_TILEGX_16 3 /* Direct 16 bit */ -+#define R_TILEGX_8 4 /* Direct 8 bit */ -+#define R_TILEGX_64_PCREL 5 /* PC relative 64 bit */ -+#define R_TILEGX_32_PCREL 6 /* PC relative 32 bit */ -+#define R_TILEGX_16_PCREL 7 /* PC relative 16 bit */ -+#define R_TILEGX_8_PCREL 8 /* PC relative 8 bit */ -+#define R_TILEGX_HW0 9 /* hword 0 16-bit */ -+#define R_TILEGX_HW1 10 /* hword 1 16-bit */ -+#define R_TILEGX_HW2 11 /* hword 2 16-bit */ -+#define R_TILEGX_HW3 12 /* hword 3 16-bit */ -+#define R_TILEGX_HW0_LAST 13 /* last hword 0 16-bit */ -+#define R_TILEGX_HW1_LAST 14 /* last hword 1 16-bit */ -+#define R_TILEGX_HW2_LAST 15 /* last hword 2 16-bit */ -+#define R_TILEGX_COPY 16 /* Copy relocation */ -+#define R_TILEGX_GLOB_DAT 17 /* Create GOT entry */ -+#define R_TILEGX_JMP_SLOT 18 /* Create PLT entry */ -+#define R_TILEGX_RELATIVE 19 /* Adjust by program base */ -+#define R_TILEGX_BROFF_X1 20 /* X1 pipe branch offset */ -+#define R_TILEGX_JUMPOFF_X1 21 /* X1 pipe jump offset */ -+#define R_TILEGX_JUMPOFF_X1_PLT 22 /* X1 pipe jump offset to PLT */ -+#define R_TILEGX_IMM8_X0 23 /* X0 pipe 8-bit */ -+#define R_TILEGX_IMM8_Y0 24 /* Y0 pipe 8-bit */ -+#define R_TILEGX_IMM8_X1 25 /* X1 pipe 8-bit */ -+#define R_TILEGX_IMM8_Y1 26 /* Y1 pipe 8-bit */ -+#define R_TILEGX_DEST_IMM8_X1 27 /* X1 pipe destination 8-bit */ -+#define R_TILEGX_MT_IMM14_X1 28 /* X1 pipe mtspr */ -+#define R_TILEGX_MF_IMM14_X1 29 /* X1 pipe mfspr */ -+#define R_TILEGX_MMSTART_X0 30 /* X0 pipe mm "start" */ -+#define R_TILEGX_MMEND_X0 31 /* X0 pipe mm "end" */ -+#define R_TILEGX_SHAMT_X0 32 /* X0 pipe shift amount */ -+#define R_TILEGX_SHAMT_X1 33 /* X1 pipe shift amount */ -+#define R_TILEGX_SHAMT_Y0 34 /* Y0 pipe shift amount */ -+#define R_TILEGX_SHAMT_Y1 35 /* Y1 pipe shift amount */ -+#define R_TILEGX_IMM16_X0_HW0 36 /* X0 pipe hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0 37 /* X1 pipe hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1 38 /* X0 pipe hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1 39 /* X1 pipe hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2 40 /* X0 pipe hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2 41 /* X1 pipe hword 2 */ -+#define R_TILEGX_IMM16_X0_HW3 42 /* X0 pipe hword 3 */ -+#define R_TILEGX_IMM16_X1_HW3 43 /* X1 pipe hword 3 */ -+#define R_TILEGX_IMM16_X0_HW0_LAST 44 /* X0 pipe last hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0_LAST 45 /* X1 pipe last hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1_LAST 46 /* X0 pipe last hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1_LAST 47 /* X1 pipe last hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2_LAST 48 /* X0 pipe last hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2_LAST 49 /* X1 pipe last hword 2 */ -+#define R_TILEGX_IMM16_X0_HW0_PCREL 50 /* X0 pipe PC relative hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0_PCREL 51 /* X1 pipe PC relative hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1_PCREL 52 /* X0 pipe PC relative hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1_PCREL 53 /* X1 pipe PC relative hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2_PCREL 54 /* X0 pipe PC relative hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2_PCREL 55 /* X1 pipe PC relative hword 2 */ -+#define R_TILEGX_IMM16_X0_HW3_PCREL 56 /* X0 pipe PC relative hword 3 */ -+#define R_TILEGX_IMM16_X1_HW3_PCREL 57 /* X1 pipe PC relative hword 3 */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_PCREL 58 /* X0 pipe PC-rel last hword 0 */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_PCREL 59 /* X1 pipe PC-rel last hword 0 */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_PCREL 60 /* X0 pipe PC-rel last hword 1 */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_PCREL 61 /* X1 pipe PC-rel last hword 1 */ -+#define R_TILEGX_IMM16_X0_HW2_LAST_PCREL 62 /* X0 pipe PC-rel last hword 2 */ -+#define R_TILEGX_IMM16_X1_HW2_LAST_PCREL 63 /* X1 pipe PC-rel last hword 2 */ -+#define R_TILEGX_IMM16_X0_HW0_GOT 64 /* X0 pipe hword 0 GOT offset */ -+#define R_TILEGX_IMM16_X1_HW0_GOT 65 /* X1 pipe hword 0 GOT offset */ -+/* Relocs 66-71 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_GOT 72 /* X0 pipe last hword 0 GOT offset */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_GOT 73 /* X1 pipe last hword 0 GOT offset */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_GOT 74 /* X0 pipe last hword 1 GOT offset */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_GOT 75 /* X1 pipe last hword 1 GOT offset */ -+/* Relocs 76-77 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_TLS_GD 78 /* X0 pipe hword 0 TLS GD offset */ -+#define R_TILEGX_IMM16_X1_HW0_TLS_GD 79 /* X1 pipe hword 0 TLS GD offset */ -+#define R_TILEGX_IMM16_X0_HW0_TLS_LE 80 /* X0 pipe hword 0 TLS LE offset */ -+#define R_TILEGX_IMM16_X1_HW0_TLS_LE 81 /* X1 pipe hword 0 TLS LE offset */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE 82 /* X0 pipe last hword 0 LE off */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE 83 /* X1 pipe last hword 0 LE off */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE 84 /* X0 pipe last hword 1 LE off */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE 85 /* X1 pipe last hword 1 LE off */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD 86 /* X0 pipe last hword 0 GD off */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD 87 /* X1 pipe last hword 0 GD off */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD 88 /* X0 pipe last hword 1 GD off */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD 89 /* X1 pipe last hword 1 GD off */ -+/* Relocs 90-91 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_TLS_IE 92 /* X0 pipe hword 0 TLS IE offset */ -+#define R_TILEGX_IMM16_X1_HW0_TLS_IE 93 /* X1 pipe hword 0 TLS IE offset */ -+/* Relocs 94-99 are currently not defined. */ -+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE 100 /* X0 pipe last hword 0 IE off */ -+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE 101 /* X1 pipe last hword 0 IE off */ -+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE 102 /* X0 pipe last hword 1 IE off */ -+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE 103 /* X1 pipe last hword 1 IE off */ -+/* Relocs 104-105 are currently not defined. */ -+#define R_TILEGX_TLS_DTPMOD64 106 /* 64-bit ID of symbol's module */ -+#define R_TILEGX_TLS_DTPOFF64 107 /* 64-bit offset in TLS block */ -+#define R_TILEGX_TLS_TPOFF64 108 /* 64-bit offset in static TLS block */ -+#define R_TILEGX_TLS_DTPMOD32 109 /* 32-bit ID of symbol's module */ -+#define R_TILEGX_TLS_DTPOFF32 110 /* 32-bit offset in TLS block */ -+#define R_TILEGX_TLS_TPOFF32 111 /* 32-bit offset in static TLS block */ -+#define R_TILEGX_TLS_GD_CALL 112 /* "jal" for TLS GD */ -+#define R_TILEGX_IMM8_X0_TLS_GD_ADD 113 /* X0 pipe "addi" for TLS GD */ -+#define R_TILEGX_IMM8_X1_TLS_GD_ADD 114 /* X1 pipe "addi" for TLS GD */ -+#define R_TILEGX_IMM8_Y0_TLS_GD_ADD 115 /* Y0 pipe "addi" for TLS GD */ -+#define R_TILEGX_IMM8_Y1_TLS_GD_ADD 116 /* Y1 pipe "addi" for TLS GD */ -+#define R_TILEGX_TLS_IE_LOAD 117 /* "ld_tls" for TLS IE */ -+#define R_TILEGX_IMM8_X0_TLS_ADD 118 /* X0 pipe "addi" for TLS GD/IE */ -+#define R_TILEGX_IMM8_X1_TLS_ADD 119 /* X1 pipe "addi" for TLS GD/IE */ -+#define R_TILEGX_IMM8_Y0_TLS_ADD 120 /* Y0 pipe "addi" for TLS GD/IE */ -+#define R_TILEGX_IMM8_Y1_TLS_ADD 121 /* Y1 pipe "addi" for TLS GD/IE */ -+ -+#define R_TILEGX_GNU_VTINHERIT 128 /* GNU C++ vtable hierarchy */ -+#define R_TILEGX_GNU_VTENTRY 129 /* GNU C++ vtable member usage */ -+ -+#define R_TILEGX_NUM 130 -+ -+#endif /* elf.h */ ---- a/scripts/mod/mk_elfconfig.c -+++ b/scripts/mod/mk_elfconfig.c -@@ -2,7 +2,11 @@ - #include - #include - #include -+#ifndef __APPLE__ - #include -+#else -+#include "elf.h" -+#endif - - int - main(int argc, char **argv) ---- a/scripts/mod/modpost.h -+++ b/scripts/mod/modpost.h -@@ -8,7 +8,11 @@ - #include - #include - #include -+#if !(defined(__APPLE__) || defined(__CYGWIN__)) - #include -+#else -+#include "elf.h" -+#endif - - #include "elfconfig.h" - diff --git a/target/linux/generic/hack-4.19/212-byteshift_portability.patch b/target/linux/generic/hack-4.19/212-byteshift_portability.patch deleted file mode 100644 index 1a5ac87988..0000000000 --- a/target/linux/generic/hack-4.19/212-byteshift_portability.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 48232d3d931c95953ce2ddfe7da7bb164aef6a73 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:03:16 +0200 -Subject: linux-3.6: fix portability of some includes files in tools/ used on the host - -lede-commit: 6040b1d29ab1f047c5e49b748abcb6a3196add28 -Signed-off-by: Felix Fietkau ---- - tools/include/tools/be_byteshift.h | 4 ++++ - tools/include/tools/le_byteshift.h | 4 ++++ - tools/include/tools/linux_types.h | 22 ++++++++++++++++++++++ - 3 files changed, 30 insertions(+) - create mode 100644 tools/include/tools/linux_types.h - ---- a/tools/include/tools/be_byteshift.h -+++ b/tools/include/tools/be_byteshift.h -@@ -2,6 +2,10 @@ - #ifndef _TOOLS_BE_BYTESHIFT_H - #define _TOOLS_BE_BYTESHIFT_H - -+#ifndef __linux__ -+#include "linux_types.h" -+#endif -+ - #include - - static inline uint16_t __get_unaligned_be16(const uint8_t *p) ---- a/tools/include/tools/le_byteshift.h -+++ b/tools/include/tools/le_byteshift.h -@@ -2,6 +2,10 @@ - #ifndef _TOOLS_LE_BYTESHIFT_H - #define _TOOLS_LE_BYTESHIFT_H - -+#ifndef __linux__ -+#include "linux_types.h" -+#endif -+ - #include - - static inline uint16_t __get_unaligned_le16(const uint8_t *p) ---- /dev/null -+++ b/tools/include/tools/linux_types.h -@@ -0,0 +1,22 @@ -+#ifndef __LINUX_TYPES_H -+#define __LINUX_TYPES_H -+ -+#include -+ -+typedef uint8_t __u8; -+typedef uint8_t __be8; -+typedef uint8_t __le8; -+ -+typedef uint16_t __u16; -+typedef uint16_t __be16; -+typedef uint16_t __le16; -+ -+typedef uint32_t __u32; -+typedef uint32_t __be32; -+typedef uint32_t __le32; -+ -+typedef uint64_t __u64; -+typedef uint64_t __be64; -+typedef uint64_t __le64; -+ -+#endif diff --git a/target/linux/generic/hack-4.19/214-spidev_h_portability.patch b/target/linux/generic/hack-4.19/214-spidev_h_portability.patch deleted file mode 100644 index 093f600c85..0000000000 --- a/target/linux/generic/hack-4.19/214-spidev_h_portability.patch +++ /dev/null @@ -1,24 +0,0 @@ -From be9be95ff10e16a5b4ad36f903978d0cc5747024 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:04:08 +0200 -Subject: kernel: fix linux/spi/spidev.h portability issues with musl - -Felix will try to get this define included into musl - -lede-commit: 795e7cf60de19e7a076a46874fab7bb88b43bbff -Signed-off-by: Felix Fietkau ---- - include/uapi/linux/spi/spidev.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/include/uapi/linux/spi/spidev.h -+++ b/include/uapi/linux/spi/spidev.h -@@ -113,7 +113,7 @@ struct spi_ioc_transfer { - - /* not all platforms use or _IOC_TYPECHECK() ... */ - #define SPI_MSGSIZE(N) \ -- ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \ -+ ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << 13)) \ - ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0) - #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)]) - diff --git a/target/linux/generic/hack-4.19/220-gc_sections.patch b/target/linux/generic/hack-4.19/220-gc_sections.patch deleted file mode 100644 index 36deac48b7..0000000000 --- a/target/linux/generic/hack-4.19/220-gc_sections.patch +++ /dev/null @@ -1,192 +0,0 @@ -From e3d8676f5722b7622685581e06e8f53e6138e3ab Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 15 Jul 2017 23:42:36 +0200 -Subject: use -ffunction-sections, -fdata-sections and --gc-sections - -In combination with kernel symbol export stripping this significantly reduces -the kernel image size. Used on both ARM and MIPS architectures. - -Signed-off-by: Felix Fietkau -Signed-off-by: Jonas Gorski -Signed-off-by: Gabor Juhos ---- - Makefile | 10 +++---- - arch/arm/Kconfig | 1 + - arch/arm/boot/compressed/Makefile | 1 + - arch/arm/kernel/vmlinux.lds.S | 26 ++++++++-------- - arch/mips/Kconfig | 1 + - arch/mips/kernel/vmlinux.lds.S | 4 +-- - include/asm-generic/vmlinux.lds.h | 63 ++++++++++++++++++++------------------- - 7 files changed, 55 insertions(+), 51 deletions(-) - ---- a/Makefile -+++ b/Makefile -@@ -294,6 +294,11 @@ else - scripts/Kbuild.include: ; - include scripts/Kbuild.include - -+ifdef CONFIG_LD_DEAD_CODE_DATA_ELIMINATION -+KBUILD_CFLAGS_KERNEL += -ffunction-sections -fdata-sections -+LDFLAGS_vmlinux += --gc-sections -+endif -+ - # Read KERNELRELEASE from include/config/kernel.release (if it exists) - KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null) - KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) -@@ -772,11 +777,6 @@ ifdef CONFIG_DEBUG_SECTION_MISMATCH - KBUILD_CFLAGS += $(call cc-option, -fno-inline-functions-called-once) - endif - --ifdef CONFIG_LD_DEAD_CODE_DATA_ELIMINATION --KBUILD_CFLAGS_KERNEL += -ffunction-sections -fdata-sections --LDFLAGS_vmlinux += --gc-sections --endif -- - # arch Makefile may override CC so keep this after arch Makefile is included - NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -98,6 +98,7 @@ config ARM - select HAVE_UID16 - select HAVE_VIRT_CPU_ACCOUNTING_GEN - select IRQ_FORCED_THREADING -+ select HAVE_LD_DEAD_CODE_DATA_ELIMINATION - select MODULES_USE_ELF_REL - select NEED_DMA_MAP_STATE - select NO_BOOTMEM ---- a/arch/arm/boot/compressed/Makefile -+++ b/arch/arm/boot/compressed/Makefile -@@ -106,6 +106,7 @@ ifeq ($(CONFIG_FUNCTION_TRACER),y) - ORIG_CFLAGS := $(KBUILD_CFLAGS) - KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) - endif -+KBUILD_CFLAGS_KERNEL := $(patsubst -f%-sections,,$(KBUILD_CFLAGS_KERNEL)) - - # -fstack-protector-strong triggers protection checks in this code, - # but it is being used too early to link to meaningful stack_chk logic. ---- a/arch/arm/kernel/vmlinux.lds.S -+++ b/arch/arm/kernel/vmlinux.lds.S -@@ -100,24 +100,24 @@ SECTIONS - } - .init.arch.info : { - __arch_info_begin = .; -- *(.arch.info.init) -+ KEEP(*(.arch.info.init)) - __arch_info_end = .; - } - .init.tagtable : { - __tagtable_begin = .; -- *(.taglist.init) -+ KEEP(*(.taglist.init)) - __tagtable_end = .; - } - #ifdef CONFIG_SMP_ON_UP - .init.smpalt : { - __smpalt_begin = .; -- *(.alt.smp.init) -+ KEEP(*(.alt.smp.init)) - __smpalt_end = .; - } - #endif - .init.pv_table : { - __pv_table_begin = .; -- *(.pv_table) -+ KEEP(*(.pv_table)) - __pv_table_end = .; - } - ---- a/arch/arm/kernel/vmlinux.lds.h -+++ b/arch/arm/kernel/vmlinux.lds.h -@@ -22,13 +22,13 @@ - #define ARM_MMU_DISCARD(x) - #else - #define ARM_MMU_KEEP(x) --#define ARM_MMU_DISCARD(x) x -+#define ARM_MMU_DISCARD(x) KEEP(x) - #endif - - #define PROC_INFO \ - . = ALIGN(4); \ - __proc_info_begin = .; \ -- *(.proc.info.init) \ -+ KEEP(*(.proc.info.init)) \ - __proc_info_end = .; - - #define HYPERVISOR_TEXT \ -@@ -39,11 +39,11 @@ - #define IDMAP_TEXT \ - ALIGN_FUNCTION(); \ - __idmap_text_start = .; \ -- *(.idmap.text) \ -+ KEEP(*(.idmap.text)) \ - __idmap_text_end = .; \ - . = ALIGN(PAGE_SIZE); \ - __hyp_idmap_text_start = .; \ -- *(.hyp.idmap.text) \ -+ KEEP(*(.hyp.idmap.text)) \ - __hyp_idmap_text_end = .; - - #define ARM_DISCARD \ -@@ -86,12 +86,12 @@ - . = ALIGN(8); \ - .ARM.unwind_idx : { \ - __start_unwind_idx = .; \ -- *(.ARM.exidx*) \ -+ KEEP(*(.ARM.exidx*)) \ - __stop_unwind_idx = .; \ - } \ - .ARM.unwind_tab : { \ - __start_unwind_tab = .; \ -- *(.ARM.extab*) \ -+ KEEP(*(.ARM.extab*)) \ - __stop_unwind_tab = .; \ - } - -@@ -102,14 +102,14 @@ - #define ARM_VECTORS \ - __vectors_start = .; \ - .vectors 0xffff0000 : AT(__vectors_start) { \ -- *(.vectors) \ -+ KEEP(*(.vectors)) \ - } \ - . = __vectors_start + SIZEOF(.vectors); \ - __vectors_end = .; \ - \ - __stubs_start = .; \ - .stubs ADDR(.vectors) + 0x1000 : AT(__stubs_start) { \ -- *(.stubs) \ -+ KEEP(*(.stubs)) \ - } \ - . = __stubs_start + SIZEOF(.stubs); \ - __stubs_end = .; \ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -43,6 +43,7 @@ config MIPS - select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT - select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) - select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) -+ select HAVE_LD_DEAD_CODE_DATA_ELIMINATION - select HAVE_CONTEXT_TRACKING - select HAVE_COPY_THREAD_TLS - select HAVE_C_RECORDMCOUNT ---- a/arch/mips/kernel/vmlinux.lds.S -+++ b/arch/mips/kernel/vmlinux.lds.S -@@ -72,7 +72,7 @@ SECTIONS - /* Exception table for data bus errors */ - __dbe_table : { - __start___dbe_table = .; -- *(__dbe_table) -+ KEEP(*(__dbe_table)) - __stop___dbe_table = .; - } - -@@ -123,7 +123,7 @@ SECTIONS - . = ALIGN(4); - .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { - __mips_machines_start = .; -- *(.mips.machines.init) -+ KEEP(*(.mips.machines.init)) - __mips_machines_end = .; - } - diff --git a/target/linux/generic/hack-4.19/221-module_exports.patch b/target/linux/generic/hack-4.19/221-module_exports.patch deleted file mode 100644 index 457baa5a1e..0000000000 --- a/target/linux/generic/hack-4.19/221-module_exports.patch +++ /dev/null @@ -1,101 +0,0 @@ -From b14784e7883390c20ed3ff904892255404a5914b Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:05:53 +0200 -Subject: add an optional config option for stripping all unnecessary symbol exports from the kernel image - -lede-commit: bb5a40c64b7c4f4848509fa0a6625055fc9e66cc -Signed-off-by: Felix Fietkau ---- - include/asm-generic/vmlinux.lds.h | 18 +++++++++++++++--- - include/linux/export.h | 9 ++++++++- - scripts/Makefile.build | 2 +- - 3 files changed, 24 insertions(+), 5 deletions(-) - ---- a/include/asm-generic/vmlinux.lds.h -+++ b/include/asm-generic/vmlinux.lds.h -@@ -54,6 +54,16 @@ - #define LOAD_OFFSET 0 - #endif - -+#ifndef SYMTAB_KEEP -+#define SYMTAB_KEEP KEEP(*(SORT(___ksymtab+*))) -+#define SYMTAB_KEEP_GPL KEEP(*(SORT(___ksymtab_gpl+*))) -+#endif -+ -+#ifndef SYMTAB_DISCARD -+#define SYMTAB_DISCARD -+#define SYMTAB_DISCARD_GPL -+#endif -+ - /* Align . to a 8 byte boundary equals to maximum function alignment. */ - #define ALIGN_FUNCTION() . = ALIGN(8) - -@@ -373,14 +383,14 @@ - /* Kernel symbol table: Normal symbols */ \ - __ksymtab : AT(ADDR(__ksymtab) - LOAD_OFFSET) { \ - __start___ksymtab = .; \ -- KEEP(*(SORT(___ksymtab+*))) \ -+ SYMTAB_KEEP \ - __stop___ksymtab = .; \ - } \ - \ - /* Kernel symbol table: GPL-only symbols */ \ - __ksymtab_gpl : AT(ADDR(__ksymtab_gpl) - LOAD_OFFSET) { \ - __start___ksymtab_gpl = .; \ -- KEEP(*(SORT(___ksymtab_gpl+*))) \ -+ SYMTAB_KEEP_GPL \ - __stop___ksymtab_gpl = .; \ - } \ - \ -@@ -442,7 +452,7 @@ - \ - /* Kernel symbol table: strings */ \ - __ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) { \ -- *(__ksymtab_strings) \ -+ *(__ksymtab_strings+*) \ - } \ - \ - /* __*init sections */ \ -@@ -844,6 +854,8 @@ - EXIT_TEXT \ - EXIT_DATA \ - EXIT_CALL \ -+ SYMTAB_DISCARD \ -+ SYMTAB_DISCARD_GPL \ - *(.discard) \ - *(.discard.*) \ - } ---- a/include/linux/export.h -+++ b/include/linux/export.h -@@ -74,12 +74,19 @@ struct kernel_symbol { - }; - #endif - -+#ifdef MODULE -+#define __EXPORT_SUFFIX(sym) -+#else -+#define __EXPORT_SUFFIX(sym) "+" #sym -+#endif -+ - /* For every exported symbol, place a struct in the __ksymtab section */ - #define ___EXPORT_SYMBOL(sym, sec) \ - extern typeof(sym) sym; \ - __CRC_SYMBOL(sym, sec) \ - static const char __kstrtab_##sym[] \ -- __attribute__((section("__ksymtab_strings"), used, aligned(1))) \ -+ __attribute__((section("__ksymtab_strings" \ -+ __EXPORT_SUFFIX(sym)), used, aligned(1))) \ - = #sym; \ - __KSYMTAB_ENTRY(sym, sec) - ---- a/scripts/Makefile.build -+++ b/scripts/Makefile.build -@@ -408,7 +408,7 @@ targets += $(extra-y) $(MAKECMDGOALS) $( - # Linker scripts preprocessor (.lds.S -> .lds) - # --------------------------------------------------------------------------- - quiet_cmd_cpp_lds_S = LDS $@ -- cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \ -+ cmd_cpp_lds_S = $(CPP) $(EXTRA_LDSFLAGS) $(cpp_flags) -P -U$(ARCH) \ - -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $< - - $(obj)/%.lds: $(src)/%.lds.S FORCE diff --git a/target/linux/generic/hack-4.19/230-openwrt_lzma_options.patch b/target/linux/generic/hack-4.19/230-openwrt_lzma_options.patch deleted file mode 100644 index 1e945cd4c1..0000000000 --- a/target/linux/generic/hack-4.19/230-openwrt_lzma_options.patch +++ /dev/null @@ -1,71 +0,0 @@ -From b3d00b452467f621317953d9e4c6f9ae8dcfd271 Mon Sep 17 00:00:00 2001 -From: Imre Kaloz -Date: Fri, 7 Jul 2017 17:06:55 +0200 -Subject: use the openwrt lzma options for now - -lede-commit: 548de949f392049420a6a1feeef118b30ab8ea8c -Signed-off-by: Imre Kaloz ---- - lib/decompress.c | 1 + - scripts/Makefile.lib | 2 +- - usr/gen_initramfs_list.sh | 10 +++++----- - 3 files changed, 7 insertions(+), 6 deletions(-) - ---- a/lib/decompress.c -+++ b/lib/decompress.c -@@ -49,6 +49,7 @@ static const struct compress_format comp - { {0x1f, 0x9e}, "gzip", gunzip }, - { {0x42, 0x5a}, "bzip2", bunzip2 }, - { {0x5d, 0x00}, "lzma", unlzma }, -+ { {0x6d, 0x00}, "lzma-openwrt", unlzma }, - { {0xfd, 0x37}, "xz", unxz }, - { {0x89, 0x4c}, "lzo", unlzo }, - { {0x02, 0x21}, "lz4", unlz4 }, ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -325,7 +325,7 @@ cmd_bzip2 = (cat $(filter-out FORCE,$^) - - quiet_cmd_lzma = LZMA $@ - cmd_lzma = (cat $(filter-out FORCE,$^) | \ -- lzma -9 && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ -+ lzma e -d20 -lc1 -lp2 -pb2 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ - (rm -f $@ ; false) - - quiet_cmd_lzo = LZO $@ ---- a/usr/gen_initramfs_list.sh -+++ b/usr/gen_initramfs_list.sh -@@ -229,7 +229,7 @@ cpio_list= - output="/dev/stdout" - output_file="" - is_cpio_compressed= --compr="gzip -n -9 -f" -+compr="gzip -n -9 -f -" - - arg="$1" - case "$arg" in -@@ -245,13 +245,13 @@ case "$arg" in - output=${cpio_list} - echo "$output_file" | grep -q "\.gz$" \ - && [ -x "`which gzip 2> /dev/null`" ] \ -- && compr="gzip -n -9 -f" -+ && compr="gzip -n -9 -f -" - echo "$output_file" | grep -q "\.bz2$" \ - && [ -x "`which bzip2 2> /dev/null`" ] \ -- && compr="bzip2 -9 -f" -+ && compr="bzip2 -9 -f -" - echo "$output_file" | grep -q "\.lzma$" \ - && [ -x "`which lzma 2> /dev/null`" ] \ -- && compr="lzma -9 -f" -+ && compr="lzma e -d20 -lc1 -lp2 -pb2 -eos -si -so" - echo "$output_file" | grep -q "\.xz$" \ - && [ -x "`which xz 2> /dev/null`" ] \ - && compr="xz --check=crc32 --lzma2=dict=1MiB" -@@ -320,7 +320,7 @@ if [ ! -z ${output_file} ]; then - if [ "${is_cpio_compressed}" = "compressed" ]; then - cat ${cpio_tfile} > ${output_file} - else -- (cat ${cpio_tfile} | ${compr} - > ${output_file}) \ -+ (cat ${cpio_tfile} | ${compr} > ${output_file}) \ - || (rm -f ${output_file} ; false) - fi - [ -z ${cpio_file} ] && rm ${cpio_tfile} diff --git a/target/linux/generic/hack-4.19/250-netfilter_depends.patch b/target/linux/generic/hack-4.19/250-netfilter_depends.patch deleted file mode 100644 index cb744bd8ab..0000000000 --- a/target/linux/generic/hack-4.19/250-netfilter_depends.patch +++ /dev/null @@ -1,27 +0,0 @@ -From: Felix Fietkau -Subject: hack: net: remove bogus netfilter dependencies - -lede-commit: 589d2a377dee27d206fc3725325309cf649e4df6 -Signed-off-by: Felix Fietkau ---- - net/netfilter/Kconfig | 2 -- - 1 file changed, 2 deletions(-) - ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -241,7 +241,6 @@ config NF_CONNTRACK_FTP - - config NF_CONNTRACK_H323 - tristate "H.323 protocol support" -- depends on IPV6 || IPV6=n - depends on NETFILTER_ADVANCED - help - H.323 is a VoIP signalling protocol from ITU-T. As one of the most -@@ -1077,7 +1076,6 @@ config NETFILTER_XT_TARGET_SECMARK - - config NETFILTER_XT_TARGET_TCPMSS - tristate '"TCPMSS" target support' -- depends on IPV6 || IPV6=n - default m if NETFILTER_ADVANCED=n - ---help--- - This option adds a `TCPMSS' target, which allows you to alter the diff --git a/target/linux/generic/hack-4.19/251-sound_kconfig.patch b/target/linux/generic/hack-4.19/251-sound_kconfig.patch deleted file mode 100644 index 2cfc2fab3a..0000000000 --- a/target/linux/generic/hack-4.19/251-sound_kconfig.patch +++ /dev/null @@ -1,197 +0,0 @@ -From da3c50704f14132f4adf80d48e9a4cd5d46e54c9 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 7 Jul 2017 17:09:21 +0200 -Subject: kconfig: owrt specifc dependencies - -Signed-off-by: John Crispin ---- - crypto/Kconfig | 10 +++++----- - drivers/bcma/Kconfig | 1 + - drivers/ssb/Kconfig | 3 ++- - lib/Kconfig | 8 ++++---- - net/netfilter/Kconfig | 2 +- - net/wireless/Kconfig | 17 ++++++++++------- - sound/core/Kconfig | 4 ++-- - 7 files changed, 25 insertions(+), 20 deletions(-) - ---- a/crypto/Kconfig -+++ b/crypto/Kconfig -@@ -33,7 +33,7 @@ config CRYPTO_FIPS - this is. - - config CRYPTO_ALGAPI -- tristate -+ tristate "ALGAPI" - select CRYPTO_ALGAPI2 - help - This option provides the API for cryptographic algorithms. -@@ -42,7 +42,7 @@ config CRYPTO_ALGAPI2 - tristate - - config CRYPTO_AEAD -- tristate -+ tristate "AEAD" - select CRYPTO_AEAD2 - select CRYPTO_ALGAPI - -@@ -53,7 +53,7 @@ config CRYPTO_AEAD2 - select CRYPTO_RNG2 - - config CRYPTO_BLKCIPHER -- tristate -+ tristate "BLKCIPHER" - select CRYPTO_BLKCIPHER2 - select CRYPTO_ALGAPI - -@@ -64,7 +64,7 @@ config CRYPTO_BLKCIPHER2 - select CRYPTO_WORKQUEUE - - config CRYPTO_HASH -- tristate -+ tristate "HASH" - select CRYPTO_HASH2 - select CRYPTO_ALGAPI - -@@ -73,7 +73,7 @@ config CRYPTO_HASH2 - select CRYPTO_ALGAPI2 - - config CRYPTO_RNG -- tristate -+ tristate "RNG" - select CRYPTO_RNG2 - select CRYPTO_ALGAPI - ---- a/drivers/bcma/Kconfig -+++ b/drivers/bcma/Kconfig -@@ -16,6 +16,7 @@ if BCMA - # Support for Block-I/O. SELECT this from the driver that needs it. - config BCMA_BLOCKIO - bool -+ default y - - config BCMA_HOST_PCI_POSSIBLE - bool ---- a/drivers/ssb/Kconfig -+++ b/drivers/ssb/Kconfig -@@ -28,6 +28,7 @@ config SSB_SPROM - config SSB_BLOCKIO - bool - depends on SSB -+ default y - - config SSB_PCIHOST_POSSIBLE - bool -@@ -48,7 +49,7 @@ config SSB_PCIHOST - config SSB_B43_PCI_BRIDGE - bool - depends on SSB_PCIHOST -- default n -+ default y - - config SSB_PCMCIAHOST_POSSIBLE - bool ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -377,16 +377,16 @@ config BCH_CONST_T - # Textsearch support is select'ed if needed - # - config TEXTSEARCH -- bool -+ bool "Textsearch support" - - config TEXTSEARCH_KMP -- tristate -+ tristate "Textsearch KMP" - - config TEXTSEARCH_BM -- tristate -+ tristate "Textsearch BM" - - config TEXTSEARCH_FSM -- tristate -+ tristate "Textsearch FSM" - - config BTREE - bool ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -10,7 +10,7 @@ config NETFILTER_INGRESS - infrastructure. - - config NETFILTER_NETLINK -- tristate -+ tristate "Netfilter NFNETLINK interface" - - config NETFILTER_FAMILY_BRIDGE - bool ---- a/net/wireless/Kconfig -+++ b/net/wireless/Kconfig -@@ -1,5 +1,5 @@ - config WIRELESS_EXT -- bool -+ bool "Wireless extensions" - - config WEXT_CORE - def_bool y -@@ -11,10 +11,10 @@ config WEXT_PROC - depends on WEXT_CORE - - config WEXT_SPY -- bool -+ bool "WEXT_SPY" - - config WEXT_PRIV -- bool -+ bool "WEXT_PRIV" - - config CFG80211 - tristate "cfg80211 - wireless configuration API" -@@ -202,7 +202,7 @@ config CFG80211_WEXT_EXPORT - endif # CFG80211 - - config LIB80211 -- tristate -+ tristate "LIB80211" - default n - help - This options enables a library of common routines used -@@ -211,13 +211,16 @@ config LIB80211 - Drivers should select this themselves if needed. - - config LIB80211_CRYPT_WEP -- tristate -+ tristate "LIB80211_CRYPT_WEP" -+ select LIB80211 - - config LIB80211_CRYPT_CCMP -- tristate -+ tristate "LIB80211_CRYPT_CCMP" -+ select LIB80211 - - config LIB80211_CRYPT_TKIP -- tristate -+ tristate "LIB80211_CRYPT_TKIP" -+ select LIB80211 - - config LIB80211_DEBUG - bool "lib80211 debugging messages" ---- a/sound/core/Kconfig -+++ b/sound/core/Kconfig -@@ -16,7 +16,7 @@ config SND_DMAENGINE_PCM - tristate - - config SND_HWDEP -- tristate -+ tristate "Sound hardware support" - - config SND_SEQ_DEVICE - tristate -@@ -26,7 +26,7 @@ config SND_RAWMIDI - select SND_SEQ_DEVICE if SND_SEQUENCER != n - - config SND_COMPRESS_OFFLOAD -- tristate -+ tristate "Compression offloading support" - - config SND_JACK - bool diff --git a/target/linux/generic/hack-4.19/259-regmap_dynamic.patch b/target/linux/generic/hack-4.19/259-regmap_dynamic.patch deleted file mode 100644 index c9d88a4e5f..0000000000 --- a/target/linux/generic/hack-4.19/259-regmap_dynamic.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 811d9e2268a62b830cfe93cd8bc929afcb8b198b Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 15 Jul 2017 21:12:38 +0200 -Subject: kernel: move regmap bloat out of the kernel image if it is only being used in modules - -lede-commit: 96f39119815028073583e4fca3a9c5fe9141e998 -Signed-off-by: Felix Fietkau ---- - drivers/base/regmap/Kconfig | 15 ++++++++++----- - drivers/base/regmap/Makefile | 12 ++++++++---- - drivers/base/regmap/regmap.c | 3 +++ - include/linux/regmap.h | 2 +- - 4 files changed, 22 insertions(+), 10 deletions(-) - ---- a/drivers/base/regmap/Kconfig -+++ b/drivers/base/regmap/Kconfig -@@ -4,9 +4,8 @@ - # subsystems should select the appropriate symbols. - - config REGMAP -- default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ) - select IRQ_DOMAIN if REGMAP_IRQ -- bool -+ tristate - - config REGCACHE_COMPRESSED - select LZO_COMPRESS -@@ -18,6 +17,7 @@ config REGMAP_AC97 - - config REGMAP_I2C - tristate -+ select REGMAP - depends on I2C - - config REGMAP_SLIMBUS -@@ -26,20 +26,26 @@ config REGMAP_SLIMBUS - - config REGMAP_SPI - tristate -+ select REGMAP -+ depends on SPI_MASTER - depends on SPI - - config REGMAP_SPMI -+ select REGMAP - tristate - depends on SPMI - - config REGMAP_W1 -+ select REGMAP - tristate - depends on W1 - - config REGMAP_MMIO - tristate -+ select REGMAP - - config REGMAP_IRQ -+ select REGMAP - bool - - config REGMAP_SOUNDWIRE ---- a/drivers/base/regmap/Makefile -+++ b/drivers/base/regmap/Makefile -@@ -2,10 +2,14 @@ - # For include/trace/define_trace.h to include trace.h - CFLAGS_regmap.o := -I$(src) - --obj-$(CONFIG_REGMAP) += regmap.o regcache.o --obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-flat.o --obj-$(CONFIG_REGCACHE_COMPRESSED) += regcache-lzo.o --obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o -+regmap-core-objs = regmap.o regcache.o regcache-rbtree.o regcache-flat.o -+ifdef CONFIG_DEBUG_FS -+regmap-core-objs += regmap-debugfs.o -+endif -+ifdef CONFIG_REGCACHE_COMPRESSED -+regmap-core-objs += regcache-lzo.o -+endif -+obj-$(CONFIG_REGMAP) += regmap-core.o - obj-$(CONFIG_REGMAP_AC97) += regmap-ac97.o - obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o - obj-$(CONFIG_REGMAP_SLIMBUS) += regmap-slimbus.o ---- a/drivers/base/regmap/regmap.c -+++ b/drivers/base/regmap/regmap.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -3032,3 +3033,5 @@ static int __init regmap_initcall(void) - return 0; - } - postcore_initcall(regmap_initcall); -+ -+MODULE_LICENSE("GPL"); ---- a/include/linux/regmap.h -+++ b/include/linux/regmap.h -@@ -187,7 +187,7 @@ struct reg_sequence { - pollret ?: ((cond) ? 0 : -ETIMEDOUT); \ - }) - --#ifdef CONFIG_REGMAP -+#if IS_REACHABLE(CONFIG_REGMAP) - - enum regmap_endian { - /* Unspecified -> 0 -> Backwards compatible default */ diff --git a/target/linux/generic/hack-4.19/260-crypto_test_dependencies.patch b/target/linux/generic/hack-4.19/260-crypto_test_dependencies.patch deleted file mode 100644 index 10eb7f1c6e..0000000000 --- a/target/linux/generic/hack-4.19/260-crypto_test_dependencies.patch +++ /dev/null @@ -1,60 +0,0 @@ -From fd1799b0bf5efa46dd3e6dfbbf3955564807e508 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:12:51 +0200 -Subject: kernel: prevent cryptomgr from pulling in useless extra dependencies for tests that are not run - -Reduces kernel size after LZMA by about 5k on MIPS - -lede-commit: 044c316167e076479a344c59905e5b435b84a77f -Signed-off-by: Felix Fietkau ---- - crypto/Kconfig | 13 ++++++------- - crypto/algboss.c | 4 ++++ - 2 files changed, 10 insertions(+), 7 deletions(-) - ---- a/crypto/Kconfig -+++ b/crypto/Kconfig -@@ -144,13 +144,13 @@ config CRYPTO_MANAGER - cbc(aes). - - config CRYPTO_MANAGER2 -- def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y) -- select CRYPTO_AEAD2 -- select CRYPTO_HASH2 -- select CRYPTO_BLKCIPHER2 -- select CRYPTO_AKCIPHER2 -- select CRYPTO_KPP2 -- select CRYPTO_ACOMP2 -+ def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y && !CRYPTO_MANAGER_DISABLE_TESTS) -+ select CRYPTO_AEAD2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_HASH2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_BLKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_AKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_KPP2 if !CRYPTO_MANAGER_DISABLE_TESTS -+ select CRYPTO_ACOMP2 if !CRYPTO_MANAGER_DISABLE_TESTS - - config CRYPTO_USER - tristate "Userspace cryptographic algorithm configuration" -@@ -163,7 +163,6 @@ config CRYPTO_USER - config CRYPTO_MANAGER_DISABLE_TESTS - bool "Disable run-time self tests" - default y -- depends on CRYPTO_MANAGER2 - help - Disable run-time self tests that normally take place at - algorithm registration. ---- a/crypto/algboss.c -+++ b/crypto/algboss.c -@@ -245,8 +245,12 @@ static int cryptomgr_schedule_test(struc - type = alg->cra_flags; - - /* Do not test internal algorithms. */ -+#ifdef CONFIG_CRYPTO_MANAGER_DISABLE_TESTS -+ type |= CRYPTO_ALG_TESTED; -+#else - if (type & CRYPTO_ALG_INTERNAL) - type |= CRYPTO_ALG_TESTED; -+#endif - - param->type = type; - diff --git a/target/linux/generic/hack-4.19/280-rfkill-stubs.patch b/target/linux/generic/hack-4.19/280-rfkill-stubs.patch deleted file mode 100644 index 7bb7d26b90..0000000000 --- a/target/linux/generic/hack-4.19/280-rfkill-stubs.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 236c1acdfef5958010ac9814a9872e0a46fd78ee Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 7 Jul 2017 17:13:44 +0200 -Subject: rfkill: add fake rfkill support - -allow building of modules depending on RFKILL even if RFKILL is not enabled. - -Signed-off-by: John Crispin ---- - include/linux/rfkill.h | 2 +- - net/Makefile | 2 +- - net/rfkill/Kconfig | 14 +++++++++----- - net/rfkill/Makefile | 2 +- - 4 files changed, 12 insertions(+), 8 deletions(-) - ---- a/include/linux/rfkill.h -+++ b/include/linux/rfkill.h -@@ -64,7 +64,7 @@ struct rfkill_ops { - int (*set_block)(void *data, bool blocked); - }; - --#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) -+#if defined(CONFIG_RFKILL_FULL) || defined(CONFIG_RFKILL_FULL_MODULE) - /** - * rfkill_alloc - Allocate rfkill structure - * @name: name of the struct -- the string is not copied internally ---- a/net/Makefile -+++ b/net/Makefile -@@ -53,7 +53,7 @@ obj-$(CONFIG_TIPC) += tipc/ - obj-$(CONFIG_NETLABEL) += netlabel/ - obj-$(CONFIG_IUCV) += iucv/ - obj-$(CONFIG_SMC) += smc/ --obj-$(CONFIG_RFKILL) += rfkill/ -+obj-$(CONFIG_RFKILL_FULL) += rfkill/ - obj-$(CONFIG_NET_9P) += 9p/ - obj-$(CONFIG_CAIF) += caif/ - ifneq ($(CONFIG_DCB),) ---- a/net/rfkill/Kconfig -+++ b/net/rfkill/Kconfig -@@ -1,7 +1,11 @@ - # - # RF switch subsystem configuration - # --menuconfig RFKILL -+config RFKILL -+ bool -+ default y -+ -+menuconfig RFKILL_FULL - tristate "RF switch subsystem support" - help - Say Y here if you want to have control over RF switches -@@ -13,19 +17,19 @@ menuconfig RFKILL - # LED trigger support - config RFKILL_LEDS - bool -- depends on RFKILL -+ depends on RFKILL_FULL - depends on LEDS_TRIGGERS = y || RFKILL = LEDS_TRIGGERS - default y - - config RFKILL_INPUT - bool "RF switch input support" if EXPERT -- depends on RFKILL -+ depends on RFKILL_FULL - depends on INPUT = y || RFKILL = INPUT - default y if !EXPERT - - config RFKILL_GPIO - tristate "GPIO RFKILL driver" -- depends on RFKILL -+ depends on RFKILL_FULL - depends on GPIOLIB || COMPILE_TEST - default n - help ---- a/net/rfkill/Makefile -+++ b/net/rfkill/Makefile -@@ -4,5 +4,5 @@ - - rfkill-y += core.o - rfkill-$(CONFIG_RFKILL_INPUT) += input.o --obj-$(CONFIG_RFKILL) += rfkill.o -+obj-$(CONFIG_RFKILL_FULL) += rfkill.o - obj-$(CONFIG_RFKILL_GPIO) += rfkill-gpio.o diff --git a/target/linux/generic/hack-4.19/290-nvmem-make-CONFIG_NVMEM-tristate-again.patch b/target/linux/generic/hack-4.19/290-nvmem-make-CONFIG_NVMEM-tristate-again.patch deleted file mode 100644 index ad45dc9168..0000000000 --- a/target/linux/generic/hack-4.19/290-nvmem-make-CONFIG_NVMEM-tristate-again.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 2579d9b982c7232f9354bcca5262e26a84c38799 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Fri, 2 Nov 2018 17:40:32 +0100 -Subject: [PATCH] nvmem: make CONFIG_NVMEM tristate again - -Only build it in when OF_NET is selected and make it possible to build -it as module otherwise. - -Signed-off-by: Hauke Mehrtens ---- - drivers/nvmem/Kconfig | 2 +- - drivers/of/Kconfig | 1 + - 2 files changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/nvmem/Kconfig -+++ b/drivers/nvmem/Kconfig -@@ -1,5 +1,5 @@ - menuconfig NVMEM -- bool "NVMEM Support" -+ tristate "NVMEM Support" - help - Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES... - ---- a/drivers/of/Kconfig -+++ b/drivers/of/Kconfig -@@ -71,6 +71,7 @@ config OF_IRQ - - config OF_NET - depends on NETDEVICES -+ select NVMEM - def_bool y - - config OF_MDIO diff --git a/target/linux/generic/hack-4.19/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch b/target/linux/generic/hack-4.19/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch deleted file mode 100644 index c07ccf9474..0000000000 --- a/target/linux/generic/hack-4.19/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch +++ /dev/null @@ -1,66 +0,0 @@ -From: Ben Menchaca -Date: Fri, 7 Jun 2013 18:35:22 -0500 -Subject: MIPS: r4k_cache: use more efficient cache blast - -Optimize the compiler output for larger cache blast cases that are -common for DMA-based networking. - -Signed-off-by: Ben Menchaca -Signed-off-by: Felix Fietkau ---- ---- a/arch/mips/include/asm/r4kcache.h -+++ b/arch/mips/include/asm/r4kcache.h -@@ -683,16 +683,48 @@ static inline void prot##extra##blast_## - unsigned long end) \ - { \ - unsigned long lsize = cpu_##desc##_line_size(); \ -+ unsigned long lsize_2 = lsize * 2; \ -+ unsigned long lsize_3 = lsize * 3; \ -+ unsigned long lsize_4 = lsize * 4; \ -+ unsigned long lsize_5 = lsize * 5; \ -+ unsigned long lsize_6 = lsize * 6; \ -+ unsigned long lsize_7 = lsize * 7; \ -+ unsigned long lsize_8 = lsize * 8; \ - unsigned long addr = start & ~(lsize - 1); \ -- unsigned long aend = (end - 1) & ~(lsize - 1); \ -+ unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \ -+ int lines = (aend - addr) / lsize; \ - \ - __##pfx##flush_prologue \ - \ -- while (1) { \ -+ while (lines >= 8) { \ -+ prot##cache_op(hitop, addr); \ -+ prot##cache_op(hitop, addr + lsize); \ -+ prot##cache_op(hitop, addr + lsize_2); \ -+ prot##cache_op(hitop, addr + lsize_3); \ -+ prot##cache_op(hitop, addr + lsize_4); \ -+ prot##cache_op(hitop, addr + lsize_5); \ -+ prot##cache_op(hitop, addr + lsize_6); \ -+ prot##cache_op(hitop, addr + lsize_7); \ -+ addr += lsize_8; \ -+ lines -= 8; \ -+ } \ -+ \ -+ if (lines & 0x4) { \ -+ prot##cache_op(hitop, addr); \ -+ prot##cache_op(hitop, addr + lsize); \ -+ prot##cache_op(hitop, addr + lsize_2); \ -+ prot##cache_op(hitop, addr + lsize_3); \ -+ addr += lsize_4; \ -+ } \ -+ \ -+ if (lines & 0x2) { \ -+ prot##cache_op(hitop, addr); \ -+ prot##cache_op(hitop, addr + lsize); \ -+ addr += lsize_2; \ -+ } \ -+ \ -+ if (lines & 0x1) { \ - prot##cache_op(hitop, addr); \ -- if (addr == aend) \ -- break; \ -- addr += lsize; \ - } \ - \ - __##pfx##flush_epilogue \ diff --git a/target/linux/generic/hack-4.19/301-mips_image_cmdline_hack.patch b/target/linux/generic/hack-4.19/301-mips_image_cmdline_hack.patch deleted file mode 100644 index da7d1fdbe0..0000000000 --- a/target/linux/generic/hack-4.19/301-mips_image_cmdline_hack.patch +++ /dev/null @@ -1,38 +0,0 @@ -From: John Crispin -Subject: hack: kernel: add generic image_cmdline hack to MIPS targets - -lede-commit: d59f5b3a987a48508257a0ddbaeadc7909f9f976 -Signed-off-by: Gabor Juhos ---- - arch/mips/Kconfig | 4 ++++ - arch/mips/kernel/head.S | 6 ++++++ - 2 files changed, 10 insertions(+) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -1144,6 +1144,10 @@ config SYNC_R4K - config MIPS_MACHINE - def_bool n - -+config IMAGE_CMDLINE_HACK -+ bool "OpenWrt specific image command line hack" -+ default n -+ - config NO_IOPORT_MAP - def_bool n - ---- a/arch/mips/kernel/head.S -+++ b/arch/mips/kernel/head.S -@@ -79,6 +79,12 @@ FEXPORT(__kernel_entry) - j kernel_entry - #endif - -+#ifdef CONFIG_IMAGE_CMDLINE_HACK -+ .ascii "CMDLINE:" -+EXPORT(__image_cmdline) -+ .fill 0x400 -+#endif /* CONFIG_IMAGE_CMDLINE_HACK */ -+ - __REF - - NESTED(kernel_entry, 16, sp) # kernel entry point diff --git a/target/linux/generic/hack-4.19/321-powerpc_crtsavres_prereq.patch b/target/linux/generic/hack-4.19/321-powerpc_crtsavres_prereq.patch deleted file mode 100644 index 26c385f011..0000000000 --- a/target/linux/generic/hack-4.19/321-powerpc_crtsavres_prereq.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 107c0964cb8db7ca28ac5199426414fdab3c274d Mon Sep 17 00:00:00 2001 -From: "Alexandros C. Couloumbis" -Date: Fri, 7 Jul 2017 17:14:51 +0200 -Subject: hack: arch: powerpc: drop register save/restore library from modules - -Upstream GCC uses a libgcc function for saving/restoring registers. This -makes the code bigger, and upstream kernels need to carry that function -for every single kernel module. Our GCC is patched to avoid those -references, so we can drop the extra bloat for modules. - -lede-commit: e8e1084654f50904e6bf77b70b2de3f137d7b3ec -Signed-off-by: Alexandros C. Couloumbis ---- - arch/powerpc/Makefile | 1 - - 1 file changed, 1 deletion(-) - ---- a/arch/powerpc/Makefile -+++ b/arch/powerpc/Makefile -@@ -60,20 +60,6 @@ machine-$(CONFIG_PPC64) += 64 - machine-$(CONFIG_CPU_LITTLE_ENDIAN) += le - UTS_MACHINE := $(subst $(space),,$(machine-y)) - --# XXX This needs to be before we override LD below --ifdef CONFIG_PPC32 --KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o --else --KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/powerpc/kernel/module.lds --ifeq ($(call ld-ifversion, -ge, 225000000, y),y) --# Have the linker provide sfpr if possible. --# There is a corresponding test in arch/powerpc/lib/Makefile --KBUILD_LDFLAGS_MODULE += --save-restore-funcs --else --KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o --endif --endif -- - ifdef CONFIG_CPU_LITTLE_ENDIAN - KBUILD_CFLAGS += -mlittle-endian - KBUILD_LDFLAGS += -EL diff --git a/target/linux/generic/hack-4.19/531-debloat_lzma.patch b/target/linux/generic/hack-4.19/531-debloat_lzma.patch deleted file mode 100644 index 2e453cc2f2..0000000000 --- a/target/linux/generic/hack-4.19/531-debloat_lzma.patch +++ /dev/null @@ -1,1040 +0,0 @@ -From 3fd297761ac246c54d7723c57fca95c112b99465 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 15 Jul 2017 21:15:44 +0200 -Subject: lzma: de-bloat the lzma library used by jffs2 - -lede-commit: 3fd1dd08fbcbb78b34efefd32c3032e5c99108d6 -Signed-off-by: Felix Fietkau ---- - include/linux/lzma/LzFind.h | 17 --- - include/linux/lzma/LzmaDec.h | 101 --------------- - include/linux/lzma/LzmaEnc.h | 20 --- - lib/lzma/LzFind.c | 287 ++++--------------------------------------- - lib/lzma/LzmaDec.c | 86 +------------ - lib/lzma/LzmaEnc.c | 172 ++------------------------ - 6 files changed, 42 insertions(+), 641 deletions(-) - ---- a/include/linux/lzma/LzFind.h -+++ b/include/linux/lzma/LzFind.h -@@ -55,11 +55,6 @@ typedef struct _CMatchFinder - - #define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos) - --int MatchFinder_NeedMove(CMatchFinder *p); --Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p); --void MatchFinder_MoveBlock(CMatchFinder *p); --void MatchFinder_ReadIfRequired(CMatchFinder *p); -- - void MatchFinder_Construct(CMatchFinder *p); - - /* Conditions: -@@ -70,12 +65,6 @@ int MatchFinder_Create(CMatchFinder *p, - UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, - ISzAlloc *alloc); - void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc); --void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems); --void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue); -- --UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son, -- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue, -- UInt32 *distances, UInt32 maxLen); - - /* - Conditions: -@@ -102,12 +91,6 @@ typedef struct _IMatchFinder - - void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable); - --void MatchFinder_Init(CMatchFinder *p); --UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); --UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); --void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); --void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -- - #ifdef __cplusplus - } - #endif ---- a/include/linux/lzma/LzmaDec.h -+++ b/include/linux/lzma/LzmaDec.h -@@ -31,14 +31,6 @@ typedef struct _CLzmaProps - UInt32 dicSize; - } CLzmaProps; - --/* LzmaProps_Decode - decodes properties --Returns: -- SZ_OK -- SZ_ERROR_UNSUPPORTED - Unsupported properties --*/ -- --SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size); -- - - /* ---------- LZMA Decoder state ---------- */ - -@@ -70,8 +62,6 @@ typedef struct - - #define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; } - --void LzmaDec_Init(CLzmaDec *p); -- - /* There are two types of LZMA streams: - 0) Stream with end mark. That end mark adds about 6 bytes to compressed size. - 1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */ -@@ -108,97 +98,6 @@ typedef enum - - /* ELzmaStatus is used only as output value for function call */ - -- --/* ---------- Interfaces ---------- */ -- --/* There are 3 levels of interfaces: -- 1) Dictionary Interface -- 2) Buffer Interface -- 3) One Call Interface -- You can select any of these interfaces, but don't mix functions from different -- groups for same object. */ -- -- --/* There are two variants to allocate state for Dictionary Interface: -- 1) LzmaDec_Allocate / LzmaDec_Free -- 2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs -- You can use variant 2, if you set dictionary buffer manually. -- For Buffer Interface you must always use variant 1. -- --LzmaDec_Allocate* can return: -- SZ_OK -- SZ_ERROR_MEM - Memory allocation error -- SZ_ERROR_UNSUPPORTED - Unsupported properties --*/ -- --SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc); --void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc); -- --SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc); --void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc); -- --/* ---------- Dictionary Interface ---------- */ -- --/* You can use it, if you want to eliminate the overhead for data copying from -- dictionary to some other external buffer. -- You must work with CLzmaDec variables directly in this interface. -- -- STEPS: -- LzmaDec_Constr() -- LzmaDec_Allocate() -- for (each new stream) -- { -- LzmaDec_Init() -- while (it needs more decompression) -- { -- LzmaDec_DecodeToDic() -- use data from CLzmaDec::dic and update CLzmaDec::dicPos -- } -- } -- LzmaDec_Free() --*/ -- --/* LzmaDec_DecodeToDic -- -- The decoding to internal dictionary buffer (CLzmaDec::dic). -- You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!! -- --finishMode: -- It has meaning only if the decoding reaches output limit (dicLimit). -- LZMA_FINISH_ANY - Decode just dicLimit bytes. -- LZMA_FINISH_END - Stream must be finished after dicLimit. -- --Returns: -- SZ_OK -- status: -- LZMA_STATUS_FINISHED_WITH_MARK -- LZMA_STATUS_NOT_FINISHED -- LZMA_STATUS_NEEDS_MORE_INPUT -- LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -- SZ_ERROR_DATA - Data error --*/ -- --SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, -- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -- -- --/* ---------- Buffer Interface ---------- */ -- --/* It's zlib-like interface. -- See LzmaDec_DecodeToDic description for information about STEPS and return results, -- but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need -- to work with CLzmaDec variables manually. -- --finishMode: -- It has meaning only if the decoding reaches output limit (*destLen). -- LZMA_FINISH_ANY - Decode just destLen bytes. -- LZMA_FINISH_END - Stream must be finished after (*destLen). --*/ -- --SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, -- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -- -- - /* ---------- One Call Interface ---------- */ - - /* LzmaDecode ---- a/include/linux/lzma/LzmaEnc.h -+++ b/include/linux/lzma/LzmaEnc.h -@@ -31,9 +31,6 @@ typedef struct _CLzmaEncProps - } CLzmaEncProps; - - void LzmaEncProps_Init(CLzmaEncProps *p); --void LzmaEncProps_Normalize(CLzmaEncProps *p); --UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2); -- - - /* ---------- CLzmaEncHandle Interface ---------- */ - -@@ -53,26 +50,9 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc * - void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig); - SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props); - SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size); --SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream, -- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); - SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, - int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); - --/* ---------- One Call Interface ---------- */ -- --/* LzmaEncode --Return code: -- SZ_OK - OK -- SZ_ERROR_MEM - Memory allocation error -- SZ_ERROR_PARAM - Incorrect paramater -- SZ_ERROR_OUTPUT_EOF - output buffer overflow -- SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) --*/ -- --SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -- const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -- - #ifdef __cplusplus - } - #endif ---- a/lib/lzma/LzFind.c -+++ b/lib/lzma/LzFind.c -@@ -14,9 +14,15 @@ - - #define kStartMaxLen 3 - -+#if 0 -+#define DIRECT_INPUT p->directInput -+#else -+#define DIRECT_INPUT 1 -+#endif -+ - static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc) - { -- if (!p->directInput) -+ if (!DIRECT_INPUT) - { - alloc->Free(alloc, p->bufferBase); - p->bufferBase = 0; -@@ -28,7 +34,7 @@ static void LzInWindow_Free(CMatchFinder - static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc) - { - UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv; -- if (p->directInput) -+ if (DIRECT_INPUT) - { - p->blockSize = blockSize; - return 1; -@@ -42,12 +48,12 @@ static int LzInWindow_Create(CMatchFinde - return (p->bufferBase != 0); - } - --Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } --Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } -+static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } -+static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } - --UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } -+static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } - --void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) -+static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) - { - p->posLimit -= subValue; - p->pos -= subValue; -@@ -58,7 +64,7 @@ static void MatchFinder_ReadBlock(CMatch - { - if (p->streamEndWasReached || p->result != SZ_OK) - return; -- if (p->directInput) -+ if (DIRECT_INPUT) - { - UInt32 curSize = 0xFFFFFFFF - p->streamPos; - if (curSize > p->directInputRem) -@@ -89,7 +95,7 @@ static void MatchFinder_ReadBlock(CMatch - } - } - --void MatchFinder_MoveBlock(CMatchFinder *p) -+static void MatchFinder_MoveBlock(CMatchFinder *p) - { - memmove(p->bufferBase, - p->buffer - p->keepSizeBefore, -@@ -97,22 +103,14 @@ void MatchFinder_MoveBlock(CMatchFinder - p->buffer = p->bufferBase + p->keepSizeBefore; - } - --int MatchFinder_NeedMove(CMatchFinder *p) -+static int MatchFinder_NeedMove(CMatchFinder *p) - { -- if (p->directInput) -+ if (DIRECT_INPUT) - return 0; - /* if (p->streamEndWasReached) return 0; */ - return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter); - } - --void MatchFinder_ReadIfRequired(CMatchFinder *p) --{ -- if (p->streamEndWasReached) -- return; -- if (p->keepSizeAfter >= p->streamPos - p->pos) -- MatchFinder_ReadBlock(p); --} -- - static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p) - { - if (MatchFinder_NeedMove(p)) -@@ -268,7 +266,7 @@ static void MatchFinder_SetLimits(CMatch - p->posLimit = p->pos + limit; - } - --void MatchFinder_Init(CMatchFinder *p) -+static void MatchFinder_Init(CMatchFinder *p) - { - UInt32 i; - for (i = 0; i < p->hashSizeSum; i++) -@@ -287,7 +285,7 @@ static UInt32 MatchFinder_GetSubValue(CM - return (p->pos - p->historySize - 1) & kNormalizeMask; - } - --void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems) -+static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems) - { - UInt32 i; - for (i = 0; i < numItems; i++) -@@ -319,38 +317,7 @@ static void MatchFinder_CheckLimits(CMat - MatchFinder_SetLimits(p); - } - --static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -- UInt32 *distances, UInt32 maxLen) --{ -- son[_cyclicBufferPos] = curMatch; -- for (;;) -- { -- UInt32 delta = pos - curMatch; -- if (cutValue-- == 0 || delta >= _cyclicBufferSize) -- return distances; -- { -- const Byte *pb = cur - delta; -- curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)]; -- if (pb[maxLen] == cur[maxLen] && *pb == *cur) -- { -- UInt32 len = 0; -- while (++len != lenLimit) -- if (pb[len] != cur[len]) -- break; -- if (maxLen < len) -- { -- *distances++ = maxLen = len; -- *distances++ = delta - 1; -- if (len == lenLimit) -- return distances; -- } -- } -- } -- } --} -- --UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, - UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, - UInt32 *distances, UInt32 maxLen) - { -@@ -460,10 +427,10 @@ static void SkipMatchesSpec(UInt32 lenLi - p->buffer++; \ - if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p); - --#define MOVE_POS_RET MOVE_POS return offset; -- - static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; } - -+#define MOVE_POS_RET MatchFinder_MovePos(p); return offset; -+ - #define GET_MATCHES_HEADER2(minLen, ret_op) \ - UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \ - lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \ -@@ -479,62 +446,7 @@ static void MatchFinder_MovePos(CMatchFi - distances + offset, maxLen) - distances); MOVE_POS_RET; - - #define SKIP_FOOTER \ -- SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS; -- --static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 offset; -- GET_MATCHES_HEADER(2) -- HASH2_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- offset = 0; -- GET_MATCHES_FOOTER(offset, 1) --} -- --UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 offset; -- GET_MATCHES_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- offset = 0; -- GET_MATCHES_FOOTER(offset, 2) --} -- --static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 hash2Value, delta2, maxLen, offset; -- GET_MATCHES_HEADER(3) -- -- HASH3_CALC; -- -- delta2 = p->pos - p->hash[hash2Value]; -- curMatch = p->hash[kFix3HashSize + hashValue]; -- -- p->hash[hash2Value] = -- p->hash[kFix3HashSize + hashValue] = p->pos; -- -- -- maxLen = 2; -- offset = 0; -- if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -- { -- for (; maxLen != lenLimit; maxLen++) -- if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -- break; -- distances[0] = maxLen; -- distances[1] = delta2 - 1; -- offset = 2; -- if (maxLen == lenLimit) -- { -- SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -- MOVE_POS_RET; -- } -- } -- GET_MATCHES_FOOTER(offset, maxLen) --} -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p); - - static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) - { -@@ -583,108 +495,6 @@ static UInt32 Bt4_MatchFinder_GetMatches - GET_MATCHES_FOOTER(offset, maxLen) - } - --static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -- GET_MATCHES_HEADER(4) -- -- HASH4_CALC; -- -- delta2 = p->pos - p->hash[ hash2Value]; -- delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -- curMatch = p->hash[kFix4HashSize + hashValue]; -- -- p->hash[ hash2Value] = -- p->hash[kFix3HashSize + hash3Value] = -- p->hash[kFix4HashSize + hashValue] = p->pos; -- -- maxLen = 1; -- offset = 0; -- if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -- { -- distances[0] = maxLen = 2; -- distances[1] = delta2 - 1; -- offset = 2; -- } -- if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -- { -- maxLen = 3; -- distances[offset + 1] = delta3 - 1; -- offset += 2; -- delta2 = delta3; -- } -- if (offset != 0) -- { -- for (; maxLen != lenLimit; maxLen++) -- if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -- break; -- distances[offset - 2] = maxLen; -- if (maxLen == lenLimit) -- { -- p->son[p->cyclicBufferPos] = curMatch; -- MOVE_POS_RET; -- } -- } -- if (maxLen < 3) -- maxLen = 3; -- offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -- distances + offset, maxLen) - (distances)); -- MOVE_POS_RET --} -- --UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) --{ -- UInt32 offset; -- GET_MATCHES_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -- distances, 2) - (distances)); -- MOVE_POS_RET --} -- --static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- SKIP_HEADER(2) -- HASH2_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- SKIP_FOOTER -- } -- while (--num != 0); --} -- --void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- SKIP_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- SKIP_FOOTER -- } -- while (--num != 0); --} -- --static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- UInt32 hash2Value; -- SKIP_HEADER(3) -- HASH3_CALC; -- curMatch = p->hash[kFix3HashSize + hashValue]; -- p->hash[hash2Value] = -- p->hash[kFix3HashSize + hashValue] = p->pos; -- SKIP_FOOTER -- } -- while (--num != 0); --} -- - static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) - { - do -@@ -701,61 +511,12 @@ static void Bt4_MatchFinder_Skip(CMatchF - while (--num != 0); - } - --static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- UInt32 hash2Value, hash3Value; -- SKIP_HEADER(4) -- HASH4_CALC; -- curMatch = p->hash[kFix4HashSize + hashValue]; -- p->hash[ hash2Value] = -- p->hash[kFix3HashSize + hash3Value] = -- p->hash[kFix4HashSize + hashValue] = p->pos; -- p->son[p->cyclicBufferPos] = curMatch; -- MOVE_POS -- } -- while (--num != 0); --} -- --void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) --{ -- do -- { -- SKIP_HEADER(3) -- HASH_ZIP_CALC; -- curMatch = p->hash[hashValue]; -- p->hash[hashValue] = p->pos; -- p->son[p->cyclicBufferPos] = curMatch; -- MOVE_POS -- } -- while (--num != 0); --} -- - void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable) - { - vTable->Init = (Mf_Init_Func)MatchFinder_Init; - vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte; - vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes; - vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos; -- if (!p->btMode) -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip; -- } -- else if (p->numHashBytes == 2) -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip; -- } -- else if (p->numHashBytes == 3) -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip; -- } -- else -- { -- vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches; -- vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip; -- } -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip; - } ---- a/lib/lzma/LzmaDec.c -+++ b/lib/lzma/LzmaDec.c -@@ -682,7 +682,7 @@ static void LzmaDec_InitRc(CLzmaDec *p, - p->needFlush = 0; - } - --void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) -+static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) - { - p->needFlush = 1; - p->remainLen = 0; -@@ -698,7 +698,7 @@ void LzmaDec_InitDicAndState(CLzmaDec *p - p->needInitState = 1; - } - --void LzmaDec_Init(CLzmaDec *p) -+static void LzmaDec_Init(CLzmaDec *p) - { - p->dicPos = 0; - LzmaDec_InitDicAndState(p, True, True); -@@ -716,7 +716,7 @@ static void LzmaDec_InitStateReal(CLzmaD - p->needInitState = 0; - } - --SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, -+static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, - ELzmaFinishMode finishMode, ELzmaStatus *status) - { - SizeT inSize = *srcLen; -@@ -837,65 +837,13 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, Si - return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA; - } - --SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status) --{ -- SizeT outSize = *destLen; -- SizeT inSize = *srcLen; -- *srcLen = *destLen = 0; -- for (;;) -- { -- SizeT inSizeCur = inSize, outSizeCur, dicPos; -- ELzmaFinishMode curFinishMode; -- SRes res; -- if (p->dicPos == p->dicBufSize) -- p->dicPos = 0; -- dicPos = p->dicPos; -- if (outSize > p->dicBufSize - dicPos) -- { -- outSizeCur = p->dicBufSize; -- curFinishMode = LZMA_FINISH_ANY; -- } -- else -- { -- outSizeCur = dicPos + outSize; -- curFinishMode = finishMode; -- } -- -- res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status); -- src += inSizeCur; -- inSize -= inSizeCur; -- *srcLen += inSizeCur; -- outSizeCur = p->dicPos - dicPos; -- memcpy(dest, p->dic + dicPos, outSizeCur); -- dest += outSizeCur; -- outSize -= outSizeCur; -- *destLen += outSizeCur; -- if (res != 0) -- return res; -- if (outSizeCur == 0 || outSize == 0) -- return SZ_OK; -- } --} -- --void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc) -+static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc) - { - alloc->Free(alloc, p->probs); - p->probs = 0; - } - --static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc) --{ -- alloc->Free(alloc, p->dic); -- p->dic = 0; --} -- --void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc) --{ -- LzmaDec_FreeProbs(p, alloc); -- LzmaDec_FreeDict(p, alloc); --} -- --SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) -+static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) - { - UInt32 dicSize; - Byte d; -@@ -935,7 +883,7 @@ static SRes LzmaDec_AllocateProbs2(CLzma - return SZ_OK; - } - --SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) - { - CLzmaProps propNew; - RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -@@ -943,28 +891,6 @@ SRes LzmaDec_AllocateProbs(CLzmaDec *p, - p->prop = propNew; - return SZ_OK; - } -- --SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) --{ -- CLzmaProps propNew; -- SizeT dicBufSize; -- RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -- RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -- dicBufSize = propNew.dicSize; -- if (p->dic == 0 || dicBufSize != p->dicBufSize) -- { -- LzmaDec_FreeDict(p, alloc); -- p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize); -- if (p->dic == 0) -- { -- LzmaDec_FreeProbs(p, alloc); -- return SZ_ERROR_MEM; -- } -- } -- p->dicBufSize = dicBufSize; -- p->prop = propNew; -- return SZ_OK; --} - - SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, - const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, ---- a/lib/lzma/LzmaEnc.c -+++ b/lib/lzma/LzmaEnc.c -@@ -53,7 +53,7 @@ void LzmaEncProps_Init(CLzmaEncProps *p) - p->writeEndMark = 0; - } - --void LzmaEncProps_Normalize(CLzmaEncProps *p) -+static void LzmaEncProps_Normalize(CLzmaEncProps *p) - { - int level = p->level; - if (level < 0) level = 5; -@@ -76,7 +76,7 @@ void LzmaEncProps_Normalize(CLzmaEncProp - #endif - } - --UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2) -+static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2) - { - CLzmaEncProps props = *props2; - LzmaEncProps_Normalize(&props); -@@ -93,7 +93,7 @@ UInt32 LzmaEncProps_GetDictSize(const CL - - #define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); } - --UInt32 GetPosSlot1(UInt32 pos) -+static UInt32 GetPosSlot1(UInt32 pos) - { - UInt32 res; - BSR2_RET(pos, res); -@@ -107,7 +107,7 @@ UInt32 GetPosSlot1(UInt32 pos) - #define kNumLogBits (9 + (int)sizeof(size_t) / 2) - #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7) - --void LzmaEnc_FastPosInit(Byte *g_FastPos) -+static void LzmaEnc_FastPosInit(Byte *g_FastPos) - { - int c = 2, slotFast; - g_FastPos[0] = 0; -@@ -339,58 +339,6 @@ typedef struct - CSaveState saveState; - } CLzmaEnc; - --void LzmaEnc_SaveState(CLzmaEncHandle pp) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- CSaveState *dest = &p->saveState; -- int i; -- dest->lenEnc = p->lenEnc; -- dest->repLenEnc = p->repLenEnc; -- dest->state = p->state; -- -- for (i = 0; i < kNumStates; i++) -- { -- memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -- memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -- } -- for (i = 0; i < kNumLenToPosStates; i++) -- memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -- memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -- memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -- memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -- memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -- memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -- memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -- memcpy(dest->reps, p->reps, sizeof(p->reps)); -- memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb)); --} -- --void LzmaEnc_RestoreState(CLzmaEncHandle pp) --{ -- CLzmaEnc *dest = (CLzmaEnc *)pp; -- const CSaveState *p = &dest->saveState; -- int i; -- dest->lenEnc = p->lenEnc; -- dest->repLenEnc = p->repLenEnc; -- dest->state = p->state; -- -- for (i = 0; i < kNumStates; i++) -- { -- memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -- memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -- } -- for (i = 0; i < kNumLenToPosStates; i++) -- memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -- memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -- memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -- memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -- memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -- memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -- memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -- memcpy(dest->reps, p->reps, sizeof(p->reps)); -- memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb)); --} -- - SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2) - { - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -600,7 +548,7 @@ static void LitEnc_EncodeMatched(CRangeE - while (symbol < 0x10000); - } - --void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) -+static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) - { - UInt32 i; - for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits)) -@@ -1676,7 +1624,7 @@ static void FillDistancesPrices(CLzmaEnc - p->matchPriceCount = 0; - } - --void LzmaEnc_Construct(CLzmaEnc *p) -+static void LzmaEnc_Construct(CLzmaEnc *p) - { - RangeEnc_Construct(&p->rc); - MatchFinder_Construct(&p->matchFinderBase); -@@ -1709,7 +1657,7 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc * - return p; - } - --void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) -+static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) - { - alloc->Free(alloc, p->litProbs); - alloc->Free(alloc, p->saveState.litProbs); -@@ -1717,7 +1665,7 @@ void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAl - p->saveState.litProbs = 0; - } - --void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) -+static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) - { - #ifndef _7ZIP_ST - MatchFinderMt_Destruct(&p->matchFinderMt, allocBig); -@@ -1947,7 +1895,7 @@ static SRes LzmaEnc_Alloc(CLzmaEnc *p, U - return SZ_OK; - } - --void LzmaEnc_Init(CLzmaEnc *p) -+static void LzmaEnc_Init(CLzmaEnc *p) - { - UInt32 i; - p->state = 0; -@@ -2005,7 +1953,7 @@ void LzmaEnc_Init(CLzmaEnc *p) - p->lpMask = (1 << p->lp) - 1; - } - --void LzmaEnc_InitPrices(CLzmaEnc *p) -+static void LzmaEnc_InitPrices(CLzmaEnc *p) - { - if (!p->fastMode) - { -@@ -2037,26 +1985,6 @@ static SRes LzmaEnc_AllocAndInit(CLzmaEn - return SZ_OK; - } - --static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, -- ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- p->matchFinderBase.stream = inStream; -- p->needInit = 1; -- p->rc.outStream = outStream; -- return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig); --} -- --SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, -- ISeqInStream *inStream, UInt32 keepWindowSize, -- ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- p->matchFinderBase.stream = inStream; -- p->needInit = 1; -- return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); --} -- - static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen) - { - p->matchFinderBase.directInput = 1; -@@ -2064,7 +1992,7 @@ static void LzmaEnc_SetInputBuf(CLzmaEnc - p->matchFinderBase.directInputRem = srcLen; - } - --SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, -+static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, - UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) - { - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -2074,7 +2002,7 @@ SRes LzmaEnc_MemPrepare(CLzmaEncHandle p - return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); - } - --void LzmaEnc_Finish(CLzmaEncHandle pp) -+static void LzmaEnc_Finish(CLzmaEncHandle pp) - { - #ifndef _7ZIP_ST - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -2107,53 +2035,6 @@ static size_t MyWrite(void *pp, const vo - return size; - } - -- --UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp) --{ -- const CLzmaEnc *p = (CLzmaEnc *)pp; -- return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); --} -- --const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp) --{ -- const CLzmaEnc *p = (CLzmaEnc *)pp; -- return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; --} -- --SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit, -- Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize) --{ -- CLzmaEnc *p = (CLzmaEnc *)pp; -- UInt64 nowPos64; -- SRes res; -- CSeqOutStreamBuf outStream; -- -- outStream.funcTable.Write = MyWrite; -- outStream.data = dest; -- outStream.rem = *destLen; -- outStream.overflow = False; -- -- p->writeEndMark = False; -- p->finished = False; -- p->result = SZ_OK; -- -- if (reInit) -- LzmaEnc_Init(p); -- LzmaEnc_InitPrices(p); -- nowPos64 = p->nowPos64; -- RangeEnc_Init(&p->rc); -- p->rc.outStream = &outStream.funcTable; -- -- res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize); -- -- *unpackSize = (UInt32)(p->nowPos64 - nowPos64); -- *destLen -= outStream.rem; -- if (outStream.overflow) -- return SZ_ERROR_OUTPUT_EOF; -- -- return res; --} -- - static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress) - { - SRes res = SZ_OK; -@@ -2184,13 +2065,6 @@ static SRes LzmaEnc_Encode2(CLzmaEnc *p, - return res; - } - --SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress, -- ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig)); -- return LzmaEnc_Encode2((CLzmaEnc *)pp, progress); --} -- - SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size) - { - CLzmaEnc *p = (CLzmaEnc *)pp; -@@ -2247,25 +2121,3 @@ SRes LzmaEnc_MemEncode(CLzmaEncHandle pp - return SZ_ERROR_OUTPUT_EOF; - return res; - } -- --SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -- const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) --{ -- CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc); -- SRes res; -- if (p == 0) -- return SZ_ERROR_MEM; -- -- res = LzmaEnc_SetProps(p, props); -- if (res == SZ_OK) -- { -- res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize); -- if (res == SZ_OK) -- res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen, -- writeEndMark, progress, alloc, allocBig); -- } -- -- LzmaEnc_Destroy(p, alloc, allocBig); -- return res; --} diff --git a/target/linux/generic/hack-4.19/550-loop-Report-EOPNOTSUPP-properly.patch b/target/linux/generic/hack-4.19/550-loop-Report-EOPNOTSUPP-properly.patch deleted file mode 100644 index c05297f45a..0000000000 --- a/target/linux/generic/hack-4.19/550-loop-Report-EOPNOTSUPP-properly.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 2e864386e62e702a343be2507062ee08d5dfc810 Mon Sep 17 00:00:00 2001 -From: Evan Green -Date: Thu, 14 Nov 2019 15:50:07 -0800 -Subject: loop: Report EOPNOTSUPP properly - -Properly plumb out EOPNOTSUPP from loop driver operations, which may -get returned when for instance a discard operation is attempted but not -supported by the underlying block device. Before this change, everything -was reported in the log as an I/O error, which is scary and not -helpful in debugging. - -Signed-off-by: Evan Green -Reviewed-by: Gwendal Grignou -Reviewed-by: Bart Van Assche ---- - drivers/block/loop.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - ---- a/drivers/block/loop.c -+++ b/drivers/block/loop.c -@@ -461,7 +461,7 @@ static void lo_complete_rq(struct reques - if (!cmd->use_aio || cmd->ret < 0 || cmd->ret == blk_rq_bytes(rq) || - req_op(rq) != REQ_OP_READ) { - if (cmd->ret < 0) -- ret = BLK_STS_IOERR; -+ ret = errno_to_blk_status(cmd->ret); - goto end_io; - } - -@@ -1924,7 +1924,10 @@ static void loop_handle_cmd(struct loop_ - failed: - /* complete non-aio request */ - if (!cmd->use_aio || ret) { -- cmd->ret = ret ? -EIO : 0; -+ if (ret == -EOPNOTSUPP) -+ cmd->ret = ret; -+ else -+ cmd->ret = ret ? -EIO : 0; - blk_mq_complete_request(rq); - } - } diff --git a/target/linux/generic/hack-4.19/640-bridge-only-accept-EAP-locally.patch b/target/linux/generic/hack-4.19/640-bridge-only-accept-EAP-locally.patch deleted file mode 100644 index f77a1965ca..0000000000 --- a/target/linux/generic/hack-4.19/640-bridge-only-accept-EAP-locally.patch +++ /dev/null @@ -1,82 +0,0 @@ -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:18:54 +0200 -Subject: bridge: only accept EAP locally - -When bridging, do not forward EAP frames to other ports, only deliver -them locally, regardless of the state. - -Signed-off-by: Felix Fietkau -[add disable_eap_hack sysfs attribute] -Signed-off-by: Etienne Champetier ---- - ---- a/net/bridge/br_input.c -+++ b/net/bridge/br_input.c -@@ -108,10 +108,14 @@ int br_handle_frame_finish(struct net *n - } - } - -+ BR_INPUT_SKB_CB(skb)->brdev = br->dev; -+ -+ if (skb->protocol == htons(ETH_P_PAE) && !br->disable_eap_hack) -+ return br_pass_frame_up(skb); -+ - if (p->state == BR_STATE_LEARNING) - goto drop; - -- BR_INPUT_SKB_CB(skb)->brdev = br->dev; - BR_INPUT_SKB_CB(skb)->src_port_isolated = !!(p->flags & BR_ISOLATED); - - if (IS_ENABLED(CONFIG_INET) && ---- a/net/bridge/br_private.h -+++ b/net/bridge/br_private.h -@@ -337,6 +337,8 @@ struct net_bridge { - u16 group_fwd_mask; - u16 group_fwd_mask_required; - -+ bool disable_eap_hack; -+ - /* STP */ - bridge_id designated_root; - bridge_id bridge_id; ---- a/net/bridge/br_sysfs_br.c -+++ b/net/bridge/br_sysfs_br.c -@@ -170,6 +170,30 @@ static ssize_t group_fwd_mask_store(stru - } - static DEVICE_ATTR_RW(group_fwd_mask); - -+static ssize_t disable_eap_hack_show(struct device *d, -+ struct device_attribute *attr, -+ char *buf) -+{ -+ struct net_bridge *br = to_bridge(d); -+ return sprintf(buf, "%u\n", br->disable_eap_hack); -+} -+ -+static int set_disable_eap_hack(struct net_bridge *br, unsigned long val) -+{ -+ br->disable_eap_hack = !!val; -+ -+ return 0; -+} -+ -+static ssize_t disable_eap_hack_store(struct device *d, -+ struct device_attribute *attr, -+ const char *buf, -+ size_t len) -+{ -+ return store_bridge_parm(d, buf, len, set_disable_eap_hack); -+} -+static DEVICE_ATTR_RW(disable_eap_hack); -+ - static ssize_t priority_show(struct device *d, struct device_attribute *attr, - char *buf) - { -@@ -810,6 +834,7 @@ static struct attribute *bridge_attrs[] - &dev_attr_ageing_time.attr, - &dev_attr_stp_state.attr, - &dev_attr_group_fwd_mask.attr, -+ &dev_attr_disable_eap_hack.attr, - &dev_attr_priority.attr, - &dev_attr_bridge_id.attr, - &dev_attr_root_id.attr, diff --git a/target/linux/generic/hack-4.19/641-sch_cake-fix-IP-protocol-handling-in-the-presence-of.patch b/target/linux/generic/hack-4.19/641-sch_cake-fix-IP-protocol-handling-in-the-presence-of.patch deleted file mode 100644 index c962b71068..0000000000 --- a/target/linux/generic/hack-4.19/641-sch_cake-fix-IP-protocol-handling-in-the-presence-of.patch +++ /dev/null @@ -1,114 +0,0 @@ -From a00590d570212c3c633bd463cef8ec7377cc7993 Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Tue, 30 Jun 2020 12:07:44 +0100 -Subject: [PATCH] sch_cake: fix IP protocol handling in the presence of VLAN - tags -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Ilya Ponetayev - -CAKE was using the return value of tc_skb_protocol() and expecting it to be -the IP protocol type. This can fail in the presence of QinQ VLAN tags, -making CAKE unable to handle ECN marking and diffserv parsing in this case. -Fix this by implementing our own version of tc_skb_protocol(), which will -use skb->protocol directly, but also parse and skip over any VLAN tags and -return the inner protocol number instead. - -Also fix CE marking by implementing a version of INET_ECN_set_ce() that -uses the same parsing routine. - -Fixes: ea82511518f4 ("sch_cake: Add NAT awareness to packet classifier") -Fixes: b2100cc56fca ("sch_cake: Use tc_skb_protocol() helper for getting packet protocol") -Fixes: 046f6fd5daef ("sched: Add Common Applications Kept Enhanced (cake) qdisc") -Signed-off-by: Ilya Ponetayev -[ squash original two patches, rewrite commit message ] -Signed-off-by: Toke Høiland-Jørgensen -Signed-off-by: Kevin Darbyshire-Bryant ---- - net/sched/sch_cake.c | 52 +++++++++++++++++++++++++++++++++++++++++--- - 1 file changed, 49 insertions(+), 3 deletions(-) - ---- a/net/sched/sch_cake.c -+++ b/net/sched/sch_cake.c -@@ -497,6 +497,52 @@ static bool cobalt_queue_empty(struct co - return down; - } - -+static __be16 cake_skb_proto(const struct sk_buff *skb) -+{ -+ unsigned int offset = skb_mac_offset(skb) + sizeof(struct ethhdr); -+ __be16 proto = skb->protocol; -+ struct vlan_hdr vhdr, *vh; -+ -+ while (proto == htons(ETH_P_8021Q) || proto == htons(ETH_P_8021AD)) { -+ vh = skb_header_pointer(skb, offset, sizeof(vhdr), &vhdr); -+ if (!vh) -+ break; -+ -+ proto = vh->h_vlan_encapsulated_proto; -+ offset += sizeof(vhdr); -+ } -+ -+ return proto; -+} -+ -+static int cake_set_ce(struct sk_buff *skb) -+{ -+ int wlen = skb_network_offset(skb); -+ -+ switch (cake_skb_proto(skb)) { -+ case htons(ETH_P_IP): -+ wlen += sizeof(struct iphdr); -+ if (!pskb_may_pull(skb, wlen) || -+ skb_try_make_writable(skb, wlen)) -+ return 0; -+ -+ return IP_ECN_set_ce(ip_hdr(skb)); -+ -+ case htons(ETH_P_IPV6): -+ wlen += sizeof(struct ipv6hdr); -+ if (!pskb_may_pull(skb, wlen) || -+ skb_try_make_writable(skb, wlen)) -+ return 0; -+ -+ return IP6_ECN_set_ce(skb, ipv6_hdr(skb)); -+ -+ default: -+ return 0; -+ } -+ -+ return 0; -+} -+ - /* Call this with a freshly dequeued packet for possible congestion marking. - * Returns true as an instruction to drop the packet, false for delivery. - */ -@@ -549,7 +595,7 @@ static bool cobalt_should_drop(struct co - - if (next_due && vars->dropping) { - /* Use ECN mark if possible, otherwise drop */ -- drop = !(vars->ecn_marked = INET_ECN_set_ce(skb)); -+ drop = !(vars->ecn_marked = cake_set_ce(skb)); - - vars->count++; - if (!vars->count) -@@ -592,7 +638,7 @@ static bool cake_update_flowkeys(struct - bool rev = !skb->_nfct, upd = false; - __be32 ip; - -- if (skb_protocol(skb, true) != htons(ETH_P_IP)) -+ if (cake_skb_proto(skb) != htons(ETH_P_IP)) - return false; - - if (!nf_ct_get_tuple_skb(&tuple, skb)) -@@ -1557,7 +1603,7 @@ static u8 cake_handle_diffserv(struct sk - u16 *buf, buf_; - u8 dscp; - -- switch (skb_protocol(skb, true)) { -+ switch (cake_skb_proto(skb)) { - case htons(ETH_P_IP): - buf = skb_header_pointer(skb, offset, sizeof(buf_), &buf_); - if (unlikely(!buf)) diff --git a/target/linux/generic/hack-4.19/645-netfilter-connmark-introduce-set-dscpmark.patch b/target/linux/generic/hack-4.19/645-netfilter-connmark-introduce-set-dscpmark.patch deleted file mode 100644 index ca98187059..0000000000 --- a/target/linux/generic/hack-4.19/645-netfilter-connmark-introduce-set-dscpmark.patch +++ /dev/null @@ -1,212 +0,0 @@ -From eda40b8c8c82e0f2789d6bc8bf63846dce2e8f32 Mon Sep 17 00:00:00 2001 -From: Kevin Darbyshire-Bryant -Date: Sat, 23 Mar 2019 09:29:49 +0000 -Subject: [PATCH] netfilter: connmark: introduce set-dscpmark - -set-dscpmark is a method of storing the DSCP of an ip packet into -conntrack mark. In combination with a suitable tc filter action -(act_ctinfo) DSCP values are able to be stored in the mark on egress and -restored on ingress across links that otherwise alter or bleach DSCP. - -This is useful for qdiscs such as CAKE which are able to shape according -to policies based on DSCP. - -Ingress classification is traditionally a challenging task since -iptables rules haven't yet run and tc filter/eBPF programs are pre-NAT -lookups, hence are unable to see internal IPv4 addresses as used on the -typical home masquerading gateway. - -x_tables CONNMARK set-dscpmark target solves the problem of storing the -DSCP to the conntrack mark in a way suitable for the new act_ctinfo tc -action to restore. - -The set-dscpmark option accepts 2 parameters, a 32bit 'dscpmask' and a -32bit 'statemask'. The dscp mask must be 6 contiguous bits and -represents the area where the DSCP will be stored in the connmark. The -state mask is a minimum 1 bit length mask that must not overlap with the -dscpmask. It represents a flag which is set when the DSCP has been -stored in the conntrack mark. This is useful to implement a 'one shot' -iptables based classification where the 'complicated' iptables rules are -only run once to classify the connection on initial (egress) packet and -subsequent packets are all marked/restored with the same DSCP. A state -mask of zero disables the setting of a status bit/s. - -example syntax with a suitably modified iptables user space application: - -iptables -A QOS_MARK_eth0 -t mangle -j CONNMARK --set-dscpmark 0xfc000000/0x01000000 - -Would store the DSCP in the top 6 bits of the 32bit mark field, and use -the LSB of the top byte as the 'DSCP has been stored' marker. - -|----0xFC----conntrack mark----000000---| -| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0| -| DSCP | unused | flag |unused | -|-----------------------0x01---000000---| - ^ ^ - | | - ---| Conditional flag - | set this when dscp -|-ip diffserv-| stored in mark -| 6 bits | -|-------------| - -an identically configured tc action to restore looks like: - -tc filter show dev eth0 ingress -filter parent ffff: protocol all pref 10 u32 chain 0 -filter parent ffff: protocol all pref 10 u32 chain 0 fh 800: ht divisor 1 -filter parent ffff: protocol all pref 10 u32 chain 0 fh 800::800 order 2048 key ht 800 bkt 0 flowid 1: not_in_hw - match 00000000/00000000 at 0 - action order 1: ctinfo zone 0 pipe - index 2 ref 1 bind 1 dscp 0xfc000000/0x1000000 - - action order 2: mirred (Egress Redirect to device ifb4eth0) stolen - index 1 ref 1 bind 1 - -|----0xFC----conntrack mark----000000---| -| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0| -| DSCP | unused | flag |unused | -|-----------------------0x01---000000---| - | | - | | - ---| Conditional flag - v only restore if set -|-ip diffserv-| -| 6 bits | -|-------------| - -Signed-off-by: Kevin Darbyshire-Bryant ---- - include/uapi/linux/netfilter/xt_connmark.h | 10 ++++ - net/netfilter/xt_connmark.c | 55 ++++++++++++++++++---- - 2 files changed, 57 insertions(+), 8 deletions(-) - ---- a/include/uapi/linux/netfilter/xt_connmark.h -+++ b/include/uapi/linux/netfilter/xt_connmark.h -@@ -20,6 +20,11 @@ enum { - }; - - enum { -+ XT_CONNMARK_VALUE = (1 << 0), -+ XT_CONNMARK_DSCP = (1 << 1) -+}; -+ -+enum { - D_SHIFT_LEFT = 0, - D_SHIFT_RIGHT, - }; -@@ -34,6 +39,11 @@ struct xt_connmark_tginfo2 { - __u8 shift_dir, shift_bits, mode; - }; - -+struct xt_connmark_tginfo3 { -+ __u32 ctmark, ctmask, nfmask; -+ __u8 shift_dir, shift_bits, mode, func; -+}; -+ - struct xt_connmark_mtinfo1 { - __u32 mark, mask; - __u8 invert; ---- a/net/netfilter/xt_connmark.c -+++ b/net/netfilter/xt_connmark.c -@@ -36,12 +36,13 @@ MODULE_ALIAS("ipt_connmark"); - MODULE_ALIAS("ip6t_connmark"); - - static unsigned int --connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo2 *info) -+connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo3 *info) - { - enum ip_conntrack_info ctinfo; - u_int32_t new_targetmark; - struct nf_conn *ct; - u_int32_t newmark; -+ u_int8_t dscp; - - ct = nf_ct_get(skb, &ctinfo); - if (ct == NULL) -@@ -49,12 +50,24 @@ connmark_tg_shift(struct sk_buff *skb, c - - switch (info->mode) { - case XT_CONNMARK_SET: -- newmark = (ct->mark & ~info->ctmask) ^ info->ctmark; -- if (info->shift_dir == D_SHIFT_RIGHT) -- newmark >>= info->shift_bits; -- else -- newmark <<= info->shift_bits; -+ newmark = ct->mark; -+ if (info->func & XT_CONNMARK_VALUE) { -+ newmark = (newmark & ~info->ctmask) ^ info->ctmark; -+ if (info->shift_dir == D_SHIFT_RIGHT) -+ newmark >>= info->shift_bits; -+ else -+ newmark <<= info->shift_bits; -+ } else if (info->func & XT_CONNMARK_DSCP) { -+ if (skb->protocol == htons(ETH_P_IP)) -+ dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2; -+ else if (skb->protocol == htons(ETH_P_IPV6)) -+ dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2; -+ else /* protocol doesn't have diffserv */ -+ break; - -+ newmark = (newmark & ~info->ctmark) | -+ (info->ctmask | (dscp << info->shift_bits)); -+ } - if (ct->mark != newmark) { - ct->mark = newmark; - nf_conntrack_event_cache(IPCT_MARK, ct); -@@ -93,20 +106,36 @@ static unsigned int - connmark_tg(struct sk_buff *skb, const struct xt_action_param *par) - { - const struct xt_connmark_tginfo1 *info = par->targinfo; -- const struct xt_connmark_tginfo2 info2 = { -+ const struct xt_connmark_tginfo3 info3 = { - .ctmark = info->ctmark, - .ctmask = info->ctmask, - .nfmask = info->nfmask, - .mode = info->mode, -+ .func = XT_CONNMARK_VALUE - }; - -- return connmark_tg_shift(skb, &info2); -+ return connmark_tg_shift(skb, &info3); - } - - static unsigned int - connmark_tg_v2(struct sk_buff *skb, const struct xt_action_param *par) - { - const struct xt_connmark_tginfo2 *info = par->targinfo; -+ const struct xt_connmark_tginfo3 info3 = { -+ .ctmark = info->ctmark, -+ .ctmask = info->ctmask, -+ .nfmask = info->nfmask, -+ .mode = info->mode, -+ .func = XT_CONNMARK_VALUE -+ }; -+ -+ return connmark_tg_shift(skb, &info3); -+} -+ -+static unsigned int -+connmark_tg_v3(struct sk_buff *skb, const struct xt_action_param *par) -+{ -+ const struct xt_connmark_tginfo3 *info = par->targinfo; - - return connmark_tg_shift(skb, info); - } -@@ -177,6 +206,16 @@ static struct xt_target connmark_tg_reg[ - .targetsize = sizeof(struct xt_connmark_tginfo2), - .destroy = connmark_tg_destroy, - .me = THIS_MODULE, -+ }, -+ { -+ .name = "CONNMARK", -+ .revision = 3, -+ .family = NFPROTO_UNSPEC, -+ .checkentry = connmark_tg_check, -+ .target = connmark_tg_v3, -+ .targetsize = sizeof(struct xt_connmark_tginfo3), -+ .destroy = connmark_tg_destroy, -+ .me = THIS_MODULE, - } - }; - diff --git a/target/linux/generic/hack-4.19/647-netfilter-flow-acct.patch b/target/linux/generic/hack-4.19/647-netfilter-flow-acct.patch deleted file mode 100644 index ac270944e6..0000000000 --- a/target/linux/generic/hack-4.19/647-netfilter-flow-acct.patch +++ /dev/null @@ -1,70 +0,0 @@ ---- a/include/net/netfilter/nf_flow_table.h -+++ b/include/net/netfilter/nf_flow_table.h -@@ -163,6 +163,8 @@ struct nf_flow_table_hw { - int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload); - void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload); - -+void nf_flow_table_acct(struct flow_offload *flow, struct sk_buff *skb, int dir); -+ - extern struct work_struct nf_flow_offload_hw_work; - - #define MODULE_ALIAS_NF_FLOWTABLE(family) \ ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - - struct flow_offload_entry { - struct flow_offload flow; -@@ -149,6 +150,22 @@ void flow_offload_free(struct flow_offlo - } - EXPORT_SYMBOL_GPL(flow_offload_free); - -+void nf_flow_table_acct(struct flow_offload *flow, struct sk_buff *skb, int dir) -+{ -+ struct flow_offload_entry *entry; -+ struct nf_conn_acct *acct; -+ -+ entry = container_of(flow, struct flow_offload_entry, flow); -+ acct = nf_conn_acct_find(entry->ct); -+ if (acct) { -+ struct nf_conn_counter *counter = acct->counter; -+ -+ atomic64_inc(&counter[dir].packets); -+ atomic64_add(skb->len, &counter[dir].bytes); -+ } -+} -+EXPORT_SYMBOL_GPL(nf_flow_table_acct); -+ - static u32 flow_offload_hash(const void *data, u32 len, u32 seed) - { - const struct flow_offload_tuple *tuple = data; ---- a/net/netfilter/nf_flow_table_ip.c -+++ b/net/netfilter/nf_flow_table_ip.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+ - /* For layer 4 checksum field offset. */ - #include - #include -@@ -268,6 +269,7 @@ nf_flow_offload_ip_hook(void *priv, stru - skb->dev = outdev; - nexthop = rt_nexthop(rt, flow->tuplehash[!dir].tuple.src_v4.s_addr); - skb_dst_set_noref(skb, &rt->dst); -+ nf_flow_table_acct(flow, skb, dir); - neigh_xmit(NEIGH_ARP_TABLE, outdev, &nexthop, skb); - - return NF_STOLEN; -@@ -489,6 +491,7 @@ nf_flow_offload_ipv6_hook(void *priv, st - skb->dev = outdev; - nexthop = rt6_nexthop(rt, &flow->tuplehash[!dir].tuple.src_v6); - skb_dst_set_noref(skb, &rt->dst); -+ nf_flow_table_acct(flow, skb, dir); - neigh_xmit(NEIGH_ND_TABLE, outdev, nexthop, skb); - - return NF_STOLEN; diff --git a/target/linux/generic/hack-4.19/650-netfilter-add-xt_OFFLOAD-target.patch b/target/linux/generic/hack-4.19/650-netfilter-add-xt_OFFLOAD-target.patch deleted file mode 100644 index 55247bc2a3..0000000000 --- a/target/linux/generic/hack-4.19/650-netfilter-add-xt_OFFLOAD-target.patch +++ /dev/null @@ -1,553 +0,0 @@ -From: Felix Fietkau -Date: Tue, 20 Feb 2018 15:56:02 +0100 -Subject: [PATCH] netfilter: add xt_OFFLOAD target - -Signed-off-by: Felix Fietkau ---- - create mode 100644 net/netfilter/xt_OFFLOAD.c - ---- a/net/ipv4/netfilter/Kconfig -+++ b/net/ipv4/netfilter/Kconfig -@@ -63,8 +63,6 @@ config NF_TABLES_ARP - help - This option enables the ARP support for nf_tables. - --endif # NF_TABLES -- - config NF_FLOW_TABLE_IPV4 - tristate "Netfilter flow table IPv4 module" - depends on NF_FLOW_TABLE -@@ -73,6 +71,8 @@ config NF_FLOW_TABLE_IPV4 - - To compile it as a module, choose M here. - -+endif # NF_TABLES -+ - config NF_DUP_IPV4 - tristate "Netfilter IPv4 packet duplication to alternate destination" - depends on !NF_CONNTRACK || NF_CONNTRACK ---- a/net/ipv6/netfilter/Kconfig -+++ b/net/ipv6/netfilter/Kconfig -@@ -80,7 +80,6 @@ config NFT_FIB_IPV6 - multicast or blackhole. - - endif # NF_TABLES_IPV6 --endif # NF_TABLES - - config NF_FLOW_TABLE_IPV6 - tristate "Netfilter flow table IPv6 module" -@@ -90,6 +89,8 @@ config NF_FLOW_TABLE_IPV6 - - To compile it as a module, choose M here. - -+endif # NF_TABLES -+ - config NF_DUP_IPV6 - tristate "Netfilter IPv6 packet duplication to alternate destination" - depends on !NF_CONNTRACK || NF_CONNTRACK ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -693,8 +693,6 @@ config NFT_FIB_NETDEV - - endif # NF_TABLES_NETDEV - --endif # NF_TABLES -- - config NF_FLOW_TABLE_INET - tristate "Netfilter flow table mixed IPv4/IPv6 module" - depends on NF_FLOW_TABLE -@@ -703,11 +701,12 @@ config NF_FLOW_TABLE_INET - - To compile it as a module, choose M here. - -+endif # NF_TABLES -+ - config NF_FLOW_TABLE - tristate "Netfilter flow table module" - depends on NETFILTER_INGRESS - depends on NF_CONNTRACK -- depends on NF_TABLES - help - This option adds the flow table core infrastructure. - -@@ -996,6 +995,15 @@ config NETFILTER_XT_TARGET_NOTRACK - depends on NETFILTER_ADVANCED - select NETFILTER_XT_TARGET_CT - -+config NETFILTER_XT_TARGET_FLOWOFFLOAD -+ tristate '"FLOWOFFLOAD" target support' -+ depends on NF_FLOW_TABLE -+ depends on NETFILTER_INGRESS -+ help -+ This option adds a `FLOWOFFLOAD' target, which uses the nf_flow_offload -+ module to speed up processing of packets by bypassing the usual -+ netfilter chains -+ - config NETFILTER_XT_TARGET_RATEEST - tristate '"RATEEST" target support' - depends on NETFILTER_ADVANCED ---- a/net/netfilter/Makefile -+++ b/net/netfilter/Makefile -@@ -144,6 +144,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF - obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o - obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o -+obj-$(CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD) += xt_FLOWOFFLOAD.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HMARK) += xt_HMARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o ---- /dev/null -+++ b/net/netfilter/xt_FLOWOFFLOAD.c -@@ -0,0 +1,422 @@ -+/* -+ * Copyright (C) 2018 Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct nf_flowtable nf_flowtable; -+static HLIST_HEAD(hooks); -+static DEFINE_SPINLOCK(hooks_lock); -+static struct delayed_work hook_work; -+ -+struct xt_flowoffload_hook { -+ struct hlist_node list; -+ struct nf_hook_ops ops; -+ struct net *net; -+ bool registered; -+ bool used; -+}; -+ -+static unsigned int -+xt_flowoffload_net_hook(void *priv, struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ switch (skb->protocol) { -+ case htons(ETH_P_IP): -+ return nf_flow_offload_ip_hook(priv, skb, state); -+ case htons(ETH_P_IPV6): -+ return nf_flow_offload_ipv6_hook(priv, skb, state); -+ } -+ -+ return NF_ACCEPT; -+} -+ -+static int -+xt_flowoffload_create_hook(struct net_device *dev) -+{ -+ struct xt_flowoffload_hook *hook; -+ struct nf_hook_ops *ops; -+ -+ hook = kzalloc(sizeof(*hook), GFP_ATOMIC); -+ if (!hook) -+ return -ENOMEM; -+ -+ ops = &hook->ops; -+ ops->pf = NFPROTO_NETDEV; -+ ops->hooknum = NF_NETDEV_INGRESS; -+ ops->priority = 10; -+ ops->priv = &nf_flowtable; -+ ops->hook = xt_flowoffload_net_hook; -+ ops->dev = dev; -+ -+ hlist_add_head(&hook->list, &hooks); -+ mod_delayed_work(system_power_efficient_wq, &hook_work, 0); -+ -+ return 0; -+} -+ -+static struct xt_flowoffload_hook * -+flow_offload_lookup_hook(struct net_device *dev) -+{ -+ struct xt_flowoffload_hook *hook; -+ -+ hlist_for_each_entry(hook, &hooks, list) { -+ if (hook->ops.dev == dev) -+ return hook; -+ } -+ -+ return NULL; -+} -+ -+static void -+xt_flowoffload_check_device(struct net_device *dev) -+{ -+ struct xt_flowoffload_hook *hook; -+ -+ spin_lock_bh(&hooks_lock); -+ hook = flow_offload_lookup_hook(dev); -+ if (hook) -+ hook->used = true; -+ else -+ xt_flowoffload_create_hook(dev); -+ spin_unlock_bh(&hooks_lock); -+} -+ -+static void -+xt_flowoffload_register_hooks(void) -+{ -+ struct xt_flowoffload_hook *hook; -+ -+restart: -+ hlist_for_each_entry(hook, &hooks, list) { -+ if (hook->registered) -+ continue; -+ -+ hook->registered = true; -+ hook->net = dev_net(hook->ops.dev); -+ spin_unlock_bh(&hooks_lock); -+ nf_register_net_hook(hook->net, &hook->ops); -+ spin_lock_bh(&hooks_lock); -+ goto restart; -+ } -+ -+} -+ -+static void -+xt_flowoffload_cleanup_hooks(void) -+{ -+ struct xt_flowoffload_hook *hook; -+ -+restart: -+ hlist_for_each_entry(hook, &hooks, list) { -+ if (hook->used || !hook->registered) -+ continue; -+ -+ hlist_del(&hook->list); -+ spin_unlock_bh(&hooks_lock); -+ nf_unregister_net_hook(hook->net, &hook->ops); -+ kfree(hook); -+ spin_lock_bh(&hooks_lock); -+ goto restart; -+ } -+ -+} -+ -+static void -+xt_flowoffload_check_hook(struct flow_offload *flow, void *data) -+{ -+ struct flow_offload_tuple *tuple = &flow->tuplehash[0].tuple; -+ struct xt_flowoffload_hook *hook; -+ bool *found = data; -+ -+ spin_lock_bh(&hooks_lock); -+ hlist_for_each_entry(hook, &hooks, list) { -+ if (hook->ops.dev->ifindex != tuple->iifidx && -+ hook->ops.dev->ifindex != tuple->oifidx) -+ continue; -+ -+ hook->used = true; -+ *found = true; -+ } -+ spin_unlock_bh(&hooks_lock); -+} -+ -+static void -+xt_flowoffload_hook_work(struct work_struct *work) -+{ -+ struct xt_flowoffload_hook *hook; -+ bool found = false; -+ int err; -+ -+ spin_lock_bh(&hooks_lock); -+ xt_flowoffload_register_hooks(); -+ hlist_for_each_entry(hook, &hooks, list) -+ hook->used = false; -+ spin_unlock_bh(&hooks_lock); -+ -+ err = nf_flow_table_iterate(&nf_flowtable, xt_flowoffload_check_hook, -+ &found); -+ if (err && err != -EAGAIN) -+ goto out; -+ -+ spin_lock_bh(&hooks_lock); -+ xt_flowoffload_cleanup_hooks(); -+ spin_unlock_bh(&hooks_lock); -+ -+out: -+ if (found) -+ queue_delayed_work(system_power_efficient_wq, &hook_work, HZ); -+} -+ -+static bool -+xt_flowoffload_skip(struct sk_buff *skb, int family) -+{ -+ if (skb_sec_path(skb)) -+ return true; -+ -+ if (family == NFPROTO_IPV4) { -+ const struct ip_options *opt = &(IPCB(skb)->opt); -+ -+ if (unlikely(opt->optlen)) -+ return true; -+ } -+ -+ return false; -+} -+ -+static struct dst_entry * -+xt_flowoffload_dst(const struct nf_conn *ct, enum ip_conntrack_dir dir, -+ const struct xt_action_param *par, int ifindex) -+{ -+ struct dst_entry *dst = NULL; -+ struct flowi fl; -+ -+ memset(&fl, 0, sizeof(fl)); -+ switch (xt_family(par)) { -+ case NFPROTO_IPV4: -+ fl.u.ip4.daddr = ct->tuplehash[dir].tuple.src.u3.ip; -+ fl.u.ip4.flowi4_oif = ifindex; -+ break; -+ case NFPROTO_IPV6: -+ fl.u.ip6.saddr = ct->tuplehash[dir].tuple.dst.u3.in6; -+ fl.u.ip6.daddr = ct->tuplehash[dir].tuple.src.u3.in6; -+ fl.u.ip6.flowi6_oif = ifindex; -+ break; -+ } -+ -+ nf_route(xt_net(par), &dst, &fl, false, xt_family(par)); -+ -+ return dst; -+} -+ -+static int -+xt_flowoffload_route(struct sk_buff *skb, const struct nf_conn *ct, -+ const struct xt_action_param *par, -+ struct nf_flow_route *route, enum ip_conntrack_dir dir) -+{ -+ struct dst_entry *this_dst, *other_dst; -+ -+ this_dst = xt_flowoffload_dst(ct, !dir, par, xt_out(par)->ifindex); -+ other_dst = xt_flowoffload_dst(ct, dir, par, xt_in(par)->ifindex); -+ -+ route->tuple[dir].dst = this_dst; -+ route->tuple[!dir].dst = other_dst; -+ -+ if (!this_dst || !other_dst) -+ return -ENOENT; -+ -+ if (dst_xfrm(this_dst) || dst_xfrm(other_dst)) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static unsigned int -+flowoffload_tg(struct sk_buff *skb, const struct xt_action_param *par) -+{ -+ const struct xt_flowoffload_target_info *info = par->targinfo; -+ struct tcphdr _tcph, *tcph = NULL; -+ enum ip_conntrack_info ctinfo; -+ enum ip_conntrack_dir dir; -+ struct nf_flow_route route; -+ struct flow_offload *flow = NULL; -+ struct nf_conn *ct; -+ struct net *net; -+ -+ if (xt_flowoffload_skip(skb, xt_family(par))) -+ return XT_CONTINUE; -+ -+ ct = nf_ct_get(skb, &ctinfo); -+ if (ct == NULL) -+ return XT_CONTINUE; -+ -+ switch (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.dst.protonum) { -+ case IPPROTO_TCP: -+ if (ct->proto.tcp.state != TCP_CONNTRACK_ESTABLISHED) -+ return XT_CONTINUE; -+ -+ tcph = skb_header_pointer(skb, par->thoff, -+ sizeof(_tcph), &_tcph); -+ if (unlikely(!tcph || tcph->fin || tcph->rst)) -+ return XT_CONTINUE; -+ break; -+ case IPPROTO_UDP: -+ break; -+ default: -+ return XT_CONTINUE; -+ } -+ -+ if (nf_ct_ext_exist(ct, NF_CT_EXT_HELPER) || -+ ct->status & IPS_SEQ_ADJUST) -+ return XT_CONTINUE; -+ -+ if (!nf_ct_is_confirmed(ct)) -+ return XT_CONTINUE; -+ -+ if (!xt_in(par) || !xt_out(par)) -+ return XT_CONTINUE; -+ -+ if (test_and_set_bit(IPS_OFFLOAD_BIT, &ct->status)) -+ return XT_CONTINUE; -+ -+ dir = CTINFO2DIR(ctinfo); -+ -+ if (xt_flowoffload_route(skb, ct, par, &route, dir) == 0) -+ flow = flow_offload_alloc(ct, &route); -+ -+ dst_release(route.tuple[dir].dst); -+ dst_release(route.tuple[!dir].dst); -+ -+ if (!flow) -+ goto err_flow_route; -+ -+ if (tcph) { -+ ct->proto.tcp.seen[0].flags |= IP_CT_TCP_FLAG_BE_LIBERAL; -+ ct->proto.tcp.seen[1].flags |= IP_CT_TCP_FLAG_BE_LIBERAL; -+ } -+ -+ if (flow_offload_add(&nf_flowtable, flow) < 0) -+ goto err_flow_add; -+ -+ xt_flowoffload_check_device(xt_in(par)); -+ xt_flowoffload_check_device(xt_out(par)); -+ -+ net = read_pnet(&nf_flowtable.ft_net); -+ if (!net) -+ write_pnet(&nf_flowtable.ft_net, xt_net(par)); -+ -+ if (info->flags & XT_FLOWOFFLOAD_HW) -+ nf_flow_offload_hw_add(xt_net(par), flow, ct); -+ -+ return XT_CONTINUE; -+ -+err_flow_add: -+ flow_offload_free(flow); -+err_flow_route: -+ clear_bit(IPS_OFFLOAD_BIT, &ct->status); -+ return XT_CONTINUE; -+} -+ -+ -+static int flowoffload_chk(const struct xt_tgchk_param *par) -+{ -+ struct xt_flowoffload_target_info *info = par->targinfo; -+ -+ if (info->flags & ~XT_FLOWOFFLOAD_MASK) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static struct xt_target offload_tg_reg __read_mostly = { -+ .family = NFPROTO_UNSPEC, -+ .name = "FLOWOFFLOAD", -+ .revision = 0, -+ .targetsize = sizeof(struct xt_flowoffload_target_info), -+ .usersize = sizeof(struct xt_flowoffload_target_info), -+ .checkentry = flowoffload_chk, -+ .target = flowoffload_tg, -+ .me = THIS_MODULE, -+}; -+ -+static int xt_flowoffload_table_init(struct nf_flowtable *table) -+{ -+ table->flags = NF_FLOWTABLE_F_HW; -+ nf_flow_table_init(table); -+ return 0; -+} -+ -+static void xt_flowoffload_table_cleanup(struct nf_flowtable *table) -+{ -+ nf_flow_table_free(table); -+} -+ -+static int flow_offload_netdev_event(struct notifier_block *this, -+ unsigned long event, void *ptr) -+{ -+ struct xt_flowoffload_hook *hook = NULL; -+ struct net_device *dev = netdev_notifier_info_to_dev(ptr); -+ -+ if (event != NETDEV_UNREGISTER) -+ return NOTIFY_DONE; -+ -+ spin_lock_bh(&hooks_lock); -+ hook = flow_offload_lookup_hook(dev); -+ if (hook) { -+ hlist_del(&hook->list); -+ } -+ spin_unlock_bh(&hooks_lock); -+ if (hook) { -+ nf_unregister_net_hook(hook->net, &hook->ops); -+ kfree(hook); -+ } -+ -+ nf_flow_table_cleanup(dev_net(dev), dev); -+ -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block flow_offload_netdev_notifier = { -+ .notifier_call = flow_offload_netdev_event, -+}; -+ -+static int __init xt_flowoffload_tg_init(void) -+{ -+ int ret; -+ -+ register_netdevice_notifier(&flow_offload_netdev_notifier); -+ -+ INIT_DELAYED_WORK(&hook_work, xt_flowoffload_hook_work); -+ -+ ret = xt_flowoffload_table_init(&nf_flowtable); -+ if (ret) -+ return ret; -+ -+ ret = xt_register_target(&offload_tg_reg); -+ if (ret) -+ xt_flowoffload_table_cleanup(&nf_flowtable); -+ -+ return ret; -+} -+ -+static void __exit xt_flowoffload_tg_exit(void) -+{ -+ xt_unregister_target(&offload_tg_reg); -+ xt_flowoffload_table_cleanup(&nf_flowtable); -+ unregister_netdevice_notifier(&flow_offload_netdev_notifier); -+} -+ -+MODULE_LICENSE("GPL"); -+module_init(xt_flowoffload_tg_init); -+module_exit(xt_flowoffload_tg_exit); ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -6,7 +6,6 @@ - #include - #include - #include --#include - #include - #include - #include ---- /dev/null -+++ b/include/uapi/linux/netfilter/xt_FLOWOFFLOAD.h -@@ -0,0 +1,17 @@ -+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ -+#ifndef _XT_FLOWOFFLOAD_H -+#define _XT_FLOWOFFLOAD_H -+ -+#include -+ -+enum { -+ XT_FLOWOFFLOAD_HW = 1 << 0, -+ -+ XT_FLOWOFFLOAD_MASK = XT_FLOWOFFLOAD_HW -+}; -+ -+struct xt_flowoffload_target_info { -+ __u32 flags; -+}; -+ -+#endif /* _XT_FLOWOFFLOAD_H */ diff --git a/target/linux/generic/hack-4.19/651-wireless_mesh_header.patch b/target/linux/generic/hack-4.19/651-wireless_mesh_header.patch deleted file mode 100644 index 965b431d01..0000000000 --- a/target/linux/generic/hack-4.19/651-wireless_mesh_header.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 6d3bc769657b0ee7c7506dad9911111c4226a7ea Mon Sep 17 00:00:00 2001 -From: Imre Kaloz -Date: Fri, 7 Jul 2017 17:21:05 +0200 -Subject: mac80211: increase wireless mesh header size - -lede-commit 3d4466cfd8f75f717efdb1f96fdde3c70d865fc1 -Signed-off-by: Imre Kaloz ---- - include/linux/netdevice.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -140,8 +140,8 @@ static inline bool dev_xmit_complete(int - - #if defined(CONFIG_HYPERV_NET) - # define LL_MAX_HEADER 128 --#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) --# if defined(CONFIG_MAC80211_MESH) -+#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) || 1 -+# if defined(CONFIG_MAC80211_MESH) || 1 - # define LL_MAX_HEADER 128 - # else - # define LL_MAX_HEADER 96 diff --git a/target/linux/generic/hack-4.19/660-fq_codel_defaults.patch b/target/linux/generic/hack-4.19/660-fq_codel_defaults.patch deleted file mode 100644 index 42698c6451..0000000000 --- a/target/linux/generic/hack-4.19/660-fq_codel_defaults.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a6ccb238939b25851474a279b20367fd24a0e816 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:21:53 +0200 -Subject: hack: net: fq_codel: tune defaults for small devices - -Assume that x86_64 devices always have a big memory and do not need this -optimization compared to devices with only 32 MB or 64 MB RAM. - -Signed-off-by: Felix Fietkau ---- - net/sched/sch_fq_codel.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/net/sched/sch_fq_codel.c -+++ b/net/sched/sch_fq_codel.c -@@ -474,7 +474,11 @@ static int fq_codel_init(struct Qdisc *s - - sch->limit = 10*1024; - q->flows_cnt = 1024; -+#ifdef CONFIG_X86_64 - q->memory_limit = 32 << 20; /* 32 MBytes */ -+#else -+ q->memory_limit = 4 << 20; /* 4 MBytes */ -+#endif - q->drop_batch_size = 64; - q->quantum = psched_mtu(qdisc_dev(sch)); - INIT_LIST_HEAD(&q->new_flows); diff --git a/target/linux/generic/hack-4.19/661-use_fq_codel_by_default.patch b/target/linux/generic/hack-4.19/661-use_fq_codel_by_default.patch deleted file mode 100644 index 1710c13b15..0000000000 --- a/target/linux/generic/hack-4.19/661-use_fq_codel_by_default.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 1d418f7e88035ed7a94073f6354246c66e9193e9 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:22:58 +0200 -Subject: fq_codel: switch default qdisc from pfifo_fast to fq_codel and remove pfifo_fast - -Signed-off-by: Felix Fietkau ---- - include/net/sch_generic.h | 3 ++- - net/sched/Kconfig | 3 ++- - net/sched/sch_api.c | 2 +- - net/sched/sch_fq_codel.c | 3 ++- - net/sched/sch_generic.c | 4 ++-- - 5 files changed, 9 insertions(+), 6 deletions(-) - ---- a/include/net/sch_generic.h -+++ b/include/net/sch_generic.h -@@ -487,12 +487,13 @@ extern struct Qdisc_ops noop_qdisc_ops; - extern struct Qdisc_ops pfifo_fast_ops; - extern struct Qdisc_ops mq_qdisc_ops; - extern struct Qdisc_ops noqueue_qdisc_ops; -+extern struct Qdisc_ops fq_codel_qdisc_ops; - extern const struct Qdisc_ops *default_qdisc_ops; - static inline const struct Qdisc_ops * - get_default_qdisc_ops(const struct net_device *dev, int ntx) - { - return ntx < dev->real_num_tx_queues ? -- default_qdisc_ops : &pfifo_fast_ops; -+ default_qdisc_ops : &fq_codel_qdisc_ops; - } - - struct Qdisc_class_common { ---- a/net/sched/Kconfig -+++ b/net/sched/Kconfig -@@ -3,8 +3,9 @@ - # - - menuconfig NET_SCHED -- bool "QoS and/or fair queueing" -+ def_bool y - select NET_SCH_FIFO -+ select NET_SCH_FQ_CODEL - ---help--- - When the kernel has several packets to send out over a network - device, it has to decide which ones to send first, which ones to ---- a/net/sched/sch_api.c -+++ b/net/sched/sch_api.c -@@ -2162,7 +2162,7 @@ static int __init pktsched_init(void) - return err; - } - -- register_qdisc(&pfifo_fast_ops); -+ register_qdisc(&fq_codel_qdisc_ops); - register_qdisc(&pfifo_qdisc_ops); - register_qdisc(&bfifo_qdisc_ops); - register_qdisc(&pfifo_head_drop_qdisc_ops); ---- a/net/sched/sch_fq_codel.c -+++ b/net/sched/sch_fq_codel.c -@@ -714,7 +714,7 @@ static const struct Qdisc_class_ops fq_c - .walk = fq_codel_walk, - }; - --static struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = { -+struct Qdisc_ops fq_codel_qdisc_ops __read_mostly = { - .cl_ops = &fq_codel_class_ops, - .id = "fq_codel", - .priv_size = sizeof(struct fq_codel_sched_data), -@@ -729,6 +729,7 @@ static struct Qdisc_ops fq_codel_qdisc_o - .dump_stats = fq_codel_dump_stats, - .owner = THIS_MODULE, - }; -+EXPORT_SYMBOL(fq_codel_qdisc_ops); - - static int __init fq_codel_module_init(void) - { ---- a/net/sched/sch_generic.c -+++ b/net/sched/sch_generic.c -@@ -35,7 +35,7 @@ - #include - - /* Qdisc to use by default */ --const struct Qdisc_ops *default_qdisc_ops = &pfifo_fast_ops; -+const struct Qdisc_ops *default_qdisc_ops = &fq_codel_qdisc_ops; - EXPORT_SYMBOL(default_qdisc_ops); - - /* Main transmission queue. */ -@@ -1026,7 +1026,7 @@ static void attach_one_default_qdisc(str - void *_unused) - { - struct Qdisc *qdisc; -- const struct Qdisc_ops *ops = default_qdisc_ops; -+ const struct Qdisc_ops *ops = &fq_codel_qdisc_ops; - - if (dev->priv_flags & IFF_NO_QUEUE) - ops = &noqueue_qdisc_ops; diff --git a/target/linux/generic/hack-4.19/662-remove_pfifo_fast.patch b/target/linux/generic/hack-4.19/662-remove_pfifo_fast.patch deleted file mode 100644 index c89329c1cc..0000000000 --- a/target/linux/generic/hack-4.19/662-remove_pfifo_fast.patch +++ /dev/null @@ -1,220 +0,0 @@ -From b531d492d5ef1cf9dba0f4888eb5fd8624a6d762 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:23:42 +0200 -Subject: net: sched: switch default qdisc from pfifo_fast to fq_codel and remove pfifo_fast - -Signed-off-by: Felix Fietkau ---- - net/sched/sch_generic.c | 140 ------------------------------------------------ - 1 file changed, 140 deletions(-) - ---- a/net/sched/sch_generic.c -+++ b/net/sched/sch_generic.c -@@ -613,207 +613,6 @@ struct Qdisc_ops noqueue_qdisc_ops __rea - .owner = THIS_MODULE, - }; - --static const u8 prio2band[TC_PRIO_MAX + 1] = { -- 1, 2, 2, 2, 1, 2, 0, 0 , 1, 1, 1, 1, 1, 1, 1, 1 --}; -- --/* 3-band FIFO queue: old style, but should be a bit faster than -- generic prio+fifo combination. -- */ -- --#define PFIFO_FAST_BANDS 3 -- --/* -- * Private data for a pfifo_fast scheduler containing: -- * - rings for priority bands -- */ --struct pfifo_fast_priv { -- struct skb_array q[PFIFO_FAST_BANDS]; --}; -- --static inline struct skb_array *band2list(struct pfifo_fast_priv *priv, -- int band) --{ -- return &priv->q[band]; --} -- --static int pfifo_fast_enqueue(struct sk_buff *skb, struct Qdisc *qdisc, -- struct sk_buff **to_free) --{ -- int band = prio2band[skb->priority & TC_PRIO_MAX]; -- struct pfifo_fast_priv *priv = qdisc_priv(qdisc); -- struct skb_array *q = band2list(priv, band); -- unsigned int pkt_len = qdisc_pkt_len(skb); -- int err; -- -- err = skb_array_produce(q, skb); -- -- if (unlikely(err)) -- return qdisc_drop_cpu(skb, qdisc, to_free); -- -- qdisc_qstats_atomic_qlen_inc(qdisc); -- /* Note: skb can not be used after skb_array_produce(), -- * so we better not use qdisc_qstats_cpu_backlog_inc() -- */ -- this_cpu_add(qdisc->cpu_qstats->backlog, pkt_len); -- return NET_XMIT_SUCCESS; --} -- --static struct sk_buff *pfifo_fast_dequeue(struct Qdisc *qdisc) --{ -- struct pfifo_fast_priv *priv = qdisc_priv(qdisc); -- struct sk_buff *skb = NULL; -- int band; -- -- for (band = 0; band < PFIFO_FAST_BANDS && !skb; band++) { -- struct skb_array *q = band2list(priv, band); -- -- if (__skb_array_empty(q)) -- continue; -- -- skb = __skb_array_consume(q); -- } -- if (likely(skb)) { -- qdisc_qstats_cpu_backlog_dec(qdisc, skb); -- qdisc_bstats_cpu_update(qdisc, skb); -- qdisc_qstats_atomic_qlen_dec(qdisc); -- } -- -- return skb; --} -- --static struct sk_buff *pfifo_fast_peek(struct Qdisc *qdisc) --{ -- struct pfifo_fast_priv *priv = qdisc_priv(qdisc); -- struct sk_buff *skb = NULL; -- int band; -- -- for (band = 0; band < PFIFO_FAST_BANDS && !skb; band++) { -- struct skb_array *q = band2list(priv, band); -- -- skb = __skb_array_peek(q); -- } -- -- return skb; --} -- --static void pfifo_fast_reset(struct Qdisc *qdisc) --{ -- int i, band; -- struct pfifo_fast_priv *priv = qdisc_priv(qdisc); -- -- for (band = 0; band < PFIFO_FAST_BANDS; band++) { -- struct skb_array *q = band2list(priv, band); -- struct sk_buff *skb; -- -- /* NULL ring is possible if destroy path is due to a failed -- * skb_array_init() in pfifo_fast_init() case. -- */ -- if (!q->ring.queue) -- continue; -- -- while ((skb = __skb_array_consume(q)) != NULL) -- kfree_skb(skb); -- } -- -- for_each_possible_cpu(i) { -- struct gnet_stats_queue *q = per_cpu_ptr(qdisc->cpu_qstats, i); -- -- q->backlog = 0; -- } --} -- --static int pfifo_fast_dump(struct Qdisc *qdisc, struct sk_buff *skb) --{ -- struct tc_prio_qopt opt = { .bands = PFIFO_FAST_BANDS }; -- -- memcpy(&opt.priomap, prio2band, TC_PRIO_MAX + 1); -- if (nla_put(skb, TCA_OPTIONS, sizeof(opt), &opt)) -- goto nla_put_failure; -- return skb->len; -- --nla_put_failure: -- return -1; --} -- --static int pfifo_fast_init(struct Qdisc *qdisc, struct nlattr *opt, -- struct netlink_ext_ack *extack) --{ -- unsigned int qlen = qdisc_dev(qdisc)->tx_queue_len; -- struct pfifo_fast_priv *priv = qdisc_priv(qdisc); -- int prio; -- -- /* guard against zero length rings */ -- if (!qlen) -- return -EINVAL; -- -- for (prio = 0; prio < PFIFO_FAST_BANDS; prio++) { -- struct skb_array *q = band2list(priv, prio); -- int err; -- -- err = skb_array_init(q, qlen, GFP_KERNEL); -- if (err) -- return -ENOMEM; -- } -- -- /* Can by-pass the queue discipline */ -- qdisc->flags |= TCQ_F_CAN_BYPASS; -- return 0; --} -- --static void pfifo_fast_destroy(struct Qdisc *sch) --{ -- struct pfifo_fast_priv *priv = qdisc_priv(sch); -- int prio; -- -- for (prio = 0; prio < PFIFO_FAST_BANDS; prio++) { -- struct skb_array *q = band2list(priv, prio); -- -- /* NULL ring is possible if destroy path is due to a failed -- * skb_array_init() in pfifo_fast_init() case. -- */ -- if (!q->ring.queue) -- continue; -- /* Destroy ring but no need to kfree_skb because a call to -- * pfifo_fast_reset() has already done that work. -- */ -- ptr_ring_cleanup(&q->ring, NULL); -- } --} -- --static int pfifo_fast_change_tx_queue_len(struct Qdisc *sch, -- unsigned int new_len) --{ -- struct pfifo_fast_priv *priv = qdisc_priv(sch); -- struct skb_array *bands[PFIFO_FAST_BANDS]; -- int prio; -- -- for (prio = 0; prio < PFIFO_FAST_BANDS; prio++) { -- struct skb_array *q = band2list(priv, prio); -- -- bands[prio] = q; -- } -- -- return skb_array_resize_multiple(bands, PFIFO_FAST_BANDS, new_len, -- GFP_KERNEL); --} -- --struct Qdisc_ops pfifo_fast_ops __read_mostly = { -- .id = "pfifo_fast", -- .priv_size = sizeof(struct pfifo_fast_priv), -- .enqueue = pfifo_fast_enqueue, -- .dequeue = pfifo_fast_dequeue, -- .peek = pfifo_fast_peek, -- .init = pfifo_fast_init, -- .destroy = pfifo_fast_destroy, -- .reset = pfifo_fast_reset, -- .dump = pfifo_fast_dump, -- .change_tx_queue_len = pfifo_fast_change_tx_queue_len, -- .owner = THIS_MODULE, -- .static_flags = TCQ_F_NOLOCK | TCQ_F_CPUSTATS, --}; --EXPORT_SYMBOL(pfifo_fast_ops); -- - static struct lock_class_key qdisc_tx_busylock; - static struct lock_class_key qdisc_running_key; - diff --git a/target/linux/generic/hack-4.19/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-4.19/700-swconfig_switch_drivers.patch deleted file mode 100644 index ebfcfe81c7..0000000000 --- a/target/linux/generic/hack-4.19/700-swconfig_switch_drivers.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 36e516290611e613aa92996cb4339561452695b4 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:24:23 +0200 -Subject: net: swconfig: adds openwrt switch layer - -Signed-off-by: Felix Fietkau ---- - drivers/net/phy/Kconfig | 83 +++++++++++++++++++++++++++++++++++++++++++++++ - drivers/net/phy/Makefile | 15 +++++++++ - include/uapi/linux/Kbuild | 1 + - 3 files changed, 99 insertions(+) - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -209,6 +209,89 @@ config LED_TRIGGER_PHY - for any speed known to the PHY. - - -+comment "Switch configuration API + drivers" -+ -+config SWCONFIG -+ tristate "Switch configuration API" -+ ---help--- -+ Switch configuration API using netlink. This allows -+ you to configure the VLAN features of certain switches. -+ -+config SWCONFIG_LEDS -+ bool "Switch LED trigger support" -+ depends on (SWCONFIG && LEDS_TRIGGERS) -+ -+config ADM6996_PHY -+ tristate "Driver for ADM6996 switches" -+ select SWCONFIG -+ ---help--- -+ Currently supports the ADM6996FC and ADM6996M switches. -+ Support for FC is very limited. -+ -+config AR8216_PHY -+ tristate "Driver for Atheros AR8216 switches" -+ select ETHERNET_PACKET_MANGLE -+ select SWCONFIG -+ -+config AR8216_PHY_LEDS -+ bool "Atheros AR8216 switch LED support" -+ depends on (AR8216_PHY && LEDS_CLASS) -+ -+source "drivers/net/phy/b53/Kconfig" -+ -+config IP17XX_PHY -+ tristate "Driver for IC+ IP17xx switches" -+ select SWCONFIG -+ -+config MVSWITCH_PHY -+ tristate "Driver for Marvell 88E6060 switches" -+ select ETHERNET_PACKET_MANGLE -+ -+config MVSW61XX_PHY -+ tristate "Driver for Marvell 88E6171/6172 switches" -+ select SWCONFIG -+ -+config PSB6970_PHY -+ tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch" -+ select SWCONFIG -+ select ETHERNET_PACKET_MANGLE -+ -+config RTL8306_PHY -+ tristate "Driver for Realtek RTL8306S switches" -+ select SWCONFIG -+ -+config RTL8366_SMI -+ tristate "Driver for the RTL8366 SMI interface" -+ depends on GPIOLIB -+ ---help--- -+ This module implements the SMI interface protocol which is used -+ by some RTL8366 ethernet switch devices via the generic GPIO API. -+ -+if RTL8366_SMI -+ -+config RTL8366_SMI_DEBUG_FS -+ bool "RTL8366 SMI interface debugfs support" -+ depends on DEBUG_FS -+ default n -+ -+config RTL8366S_PHY -+ tristate "Driver for the Realtek RTL8366S switch" -+ select SWCONFIG -+ -+config RTL8366RB_PHY -+ tristate "Driver for the Realtek RTL8366RB switch" -+ select SWCONFIG -+ -+config RTL8367_PHY -+ tristate "Driver for the Realtek RTL8367R/M switches" -+ select SWCONFIG -+ -+config RTL8367B_PHY -+ tristate "Driver fot the Realtek RTL8367R-VB switch" -+ select SWCONFIG -+ -+endif # RTL8366_SMI -+ - comment "MII PHY device drivers" - - config SFP ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -22,6 +22,21 @@ libphy-$(CONFIG_LED_TRIGGER_PHY) += phy_ - obj-$(CONFIG_PHYLINK) += phylink.o - obj-$(CONFIG_PHYLIB) += libphy.o - -+obj-$(CONFIG_SWCONFIG) += swconfig.o -+obj-$(CONFIG_ADM6996_PHY) += adm6996.o -+obj-$(CONFIG_AR8216_PHY) += ar8216.o ar8327.o -+obj-$(CONFIG_SWCONFIG_B53) += b53/ -+obj-$(CONFIG_IP17XX_PHY) += ip17xx.o -+obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o -+obj-$(CONFIG_MVSW61XX_PHY) += mvsw61xx.o -+obj-$(CONFIG_PSB6970_PHY) += psb6970.o -+obj-$(CONFIG_RTL8306_PHY) += rtl8306.o -+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o -+obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o -+obj-$(CONFIG_RTL8366RB_PHY) += rtl8366rb.o -+obj-$(CONFIG_RTL8367_PHY) += rtl8367.o -+obj-$(CONFIG_RTL8367B_PHY) += rtl8367b.o -+ - obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o - obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o - obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o ---- a/include/linux/platform_data/b53.h -+++ b/include/linux/platform_data/b53.h -@@ -29,6 +29,9 @@ struct b53_platform_data { - u32 chip_id; - u16 enabled_ports; - -+ /* allow to specify an ethX alias */ -+ const char *alias; -+ - /* only used by MMAP'd driver */ - unsigned big_endian:1; - void __iomem *regs; diff --git a/target/linux/generic/hack-4.19/702-phy_add_aneg_done_function.patch b/target/linux/generic/hack-4.19/702-phy_add_aneg_done_function.patch deleted file mode 100644 index 6d6b86ef64..0000000000 --- a/target/linux/generic/hack-4.19/702-phy_add_aneg_done_function.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -557,6 +557,12 @@ struct phy_driver { - /* Determines the negotiated speed and duplex */ - int (*read_status)(struct phy_device *phydev); - -+ /* -+ * Update the value in phydev->link to reflect the -+ * current link value -+ */ -+ int (*update_link)(struct phy_device *phydev); -+ - /* Clears any pending interrupts */ - int (*ack_interrupt)(struct phy_device *phydev); - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1583,6 +1583,9 @@ int genphy_update_link(struct phy_device - { - int status; - -+ if (phydev->drv && phydev->drv->update_link) -+ return phydev->drv->update_link(phydev); -+ - /* The link state is latched low so that momentary link - * drops can be detected. Do not double-read the status - * in polling mode to detect such short link drops. diff --git a/target/linux/generic/hack-4.19/721-phy_packets.patch b/target/linux/generic/hack-4.19/721-phy_packets.patch deleted file mode 100644 index 9463ed22c3..0000000000 --- a/target/linux/generic/hack-4.19/721-phy_packets.patch +++ /dev/null @@ -1,176 +0,0 @@ -From ffe387740bbe88dd88bbe04d6375902708003d6e Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Fri, 7 Jul 2017 17:25:00 +0200 -Subject: net: add packet mangeling patch - -Signed-off-by: Felix Fietkau ---- - include/linux/netdevice.h | 11 +++++++++++ - include/linux/skbuff.h | 14 ++++---------- - net/Kconfig | 6 ++++++ - net/core/dev.c | 18 ++++++++++++++---- - net/core/skbuff.c | 17 +++++++++++++++++ - net/ethernet/eth.c | 6 ++++++ - 6 files changed, 58 insertions(+), 14 deletions(-) - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -1517,6 +1517,7 @@ enum netdev_priv_flags { - IFF_FAILOVER_SLAVE = 1<<28, - IFF_L3MDEV_RX_HANDLER = 1<<29, - IFF_LIVE_RENAME_OK = 1<<30, -+ IFF_NO_IP_ALIGN = 1<<31, - }; - - #define IFF_802_1Q_VLAN IFF_802_1Q_VLAN -@@ -1549,6 +1550,7 @@ enum netdev_priv_flags { - #define IFF_FAILOVER_SLAVE IFF_FAILOVER_SLAVE - #define IFF_L3MDEV_RX_HANDLER IFF_L3MDEV_RX_HANDLER - #define IFF_LIVE_RENAME_OK IFF_LIVE_RENAME_OK -+#define IFF_NO_IP_ALIGN IFF_NO_IP_ALIGN - - /** - * struct net_device - The DEVICE structure. -@@ -1849,6 +1851,11 @@ struct net_device { - const struct tlsdev_ops *tlsdev_ops; - #endif - -+#ifdef CONFIG_ETHERNET_PACKET_MANGLE -+ void (*eth_mangle_rx)(struct net_device *dev, struct sk_buff *skb); -+ struct sk_buff *(*eth_mangle_tx)(struct net_device *dev, struct sk_buff *skb); -+#endif -+ - const struct header_ops *header_ops; - - unsigned int flags; -@@ -1931,6 +1938,10 @@ struct net_device { - struct mpls_dev __rcu *mpls_ptr; - #endif - -+#ifdef CONFIG_ETHERNET_PACKET_MANGLE -+ void *phy_ptr; /* PHY device specific data */ -+#endif -+ - /* - * Cache lines mostly used on receive path (including eth_type_trans()) - */ ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -2547,6 +2547,10 @@ static inline int pskb_trim(struct sk_bu - return (len < skb->len) ? __pskb_trim(skb, len) : 0; - } - -+extern struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev, -+ unsigned int length, gfp_t gfp); -+ -+ - /** - * pskb_trim_unique - remove end from a paged unique (not cloned) buffer - * @skb: buffer to alter -@@ -2678,16 +2682,6 @@ static inline struct sk_buff *dev_alloc_ - } - - --static inline struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev, -- unsigned int length, gfp_t gfp) --{ -- struct sk_buff *skb = __netdev_alloc_skb(dev, length + NET_IP_ALIGN, gfp); -- -- if (NET_IP_ALIGN && skb) -- skb_reserve(skb, NET_IP_ALIGN); -- return skb; --} -- - static inline struct sk_buff *netdev_alloc_skb_ip_align(struct net_device *dev, - unsigned int length) - { ---- a/net/Kconfig -+++ b/net/Kconfig -@@ -25,6 +25,12 @@ menuconfig NET - - if NET - -+config ETHERNET_PACKET_MANGLE -+ bool -+ help -+ This option can be selected by phy drivers that need to mangle -+ packets going in or out of an ethernet device. -+ - config WANT_COMPAT_NETLINK_MESSAGES - bool - help ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -3252,10 +3252,20 @@ static int xmit_one(struct sk_buff *skb, - if (!list_empty(&ptype_all) || !list_empty(&dev->ptype_all)) - dev_queue_xmit_nit(skb, dev); - -- len = skb->len; -- trace_net_dev_start_xmit(skb, dev); -- rc = netdev_start_xmit(skb, dev, txq, more); -- trace_net_dev_xmit(skb, rc, dev, len); -+#ifdef CONFIG_ETHERNET_PACKET_MANGLE -+ if (!dev->eth_mangle_tx || -+ (skb = dev->eth_mangle_tx(dev, skb)) != NULL) -+#else -+ if (1) -+#endif -+ { -+ len = skb->len; -+ trace_net_dev_start_xmit(skb, dev); -+ rc = netdev_start_xmit(skb, dev, txq, more); -+ trace_net_dev_xmit(skb, rc, dev, len); -+ } else { -+ rc = NETDEV_TX_OK; -+ } - - return rc; - } ---- a/net/core/skbuff.c -+++ b/net/core/skbuff.c -@@ -63,6 +63,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -503,6 +504,22 @@ skb_fail: - } - EXPORT_SYMBOL(__napi_alloc_skb); - -+struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev, -+ unsigned int length, gfp_t gfp) -+{ -+ struct sk_buff *skb = __netdev_alloc_skb(dev, length + NET_IP_ALIGN, gfp); -+ -+#ifdef CONFIG_ETHERNET_PACKET_MANGLE -+ if (dev && (dev->priv_flags & IFF_NO_IP_ALIGN)) -+ return skb; -+#endif -+ -+ if (NET_IP_ALIGN && skb) -+ skb_reserve(skb, NET_IP_ALIGN); -+ return skb; -+} -+EXPORT_SYMBOL(__netdev_alloc_skb_ip_align); -+ - void skb_add_rx_frag(struct sk_buff *skb, int i, struct page *page, int off, - int size, unsigned int truesize) - { ---- a/net/ethernet/eth.c -+++ b/net/ethernet/eth.c -@@ -172,6 +172,12 @@ __be16 eth_type_trans(struct sk_buff *sk - const struct ethhdr *eth; - - skb->dev = dev; -+ -+#ifdef CONFIG_ETHERNET_PACKET_MANGLE -+ if (dev->eth_mangle_rx) -+ dev->eth_mangle_rx(dev, skb); -+#endif -+ - skb_reset_mac_header(skb); - - eth = (struct ethhdr *)skb->data; diff --git a/target/linux/generic/hack-4.19/773-bgmac-add-srab-switch.patch b/target/linux/generic/hack-4.19/773-bgmac-add-srab-switch.patch deleted file mode 100644 index 3b4781657e..0000000000 --- a/target/linux/generic/hack-4.19/773-bgmac-add-srab-switch.patch +++ /dev/null @@ -1,98 +0,0 @@ -From 3cb240533ab787899dc7f17aa7d6c5b4810e2e58 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Fri, 7 Jul 2017 17:26:01 +0200 -Subject: bcm53xx: bgmac: use srab switch driver - -use the srab switch driver on these SoCs. - -Signed-off-by: Hauke Mehrtens ---- - drivers/net/ethernet/broadcom/bgmac-bcma.c | 1 + - drivers/net/ethernet/broadcom/bgmac.c | 24 ++++++++++++++++++++++++ - drivers/net/ethernet/broadcom/bgmac.h | 4 ++++ - 3 files changed, 29 insertions(+) - ---- a/drivers/net/ethernet/broadcom/bgmac-bcma.c -+++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -268,6 +268,7 @@ static int bgmac_probe(struct bcma_devic - bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST; - bgmac->feature_flags |= BGMAC_FEAT_NO_RESET; - bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500; -+ bgmac->feature_flags |= BGMAC_FEAT_SRAB; - break; - default: - bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST; ---- a/drivers/net/ethernet/broadcom/bgmac.c -+++ b/drivers/net/ethernet/broadcom/bgmac.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1409,6 +1410,17 @@ static const struct ethtool_ops bgmac_et - .set_link_ksettings = phy_ethtool_set_link_ksettings, - }; - -+static struct b53_platform_data bgmac_b53_pdata = { -+}; -+ -+static struct platform_device bgmac_b53_dev = { -+ .name = "b53-srab-switch", -+ .id = -1, -+ .dev = { -+ .platform_data = &bgmac_b53_pdata, -+ }, -+}; -+ - /************************************************** - * MII - **************************************************/ -@@ -1540,6 +1552,14 @@ int bgmac_enet_probe(struct bgmac *bgmac - net_dev->hw_features = net_dev->features; - net_dev->vlan_features = net_dev->features; - -+ if ((bgmac->feature_flags & BGMAC_FEAT_SRAB) && !bgmac_b53_pdata.regs) { -+ bgmac_b53_pdata.regs = ioremap_nocache(0x18007000, 0x1000); -+ -+ err = platform_device_register(&bgmac_b53_dev); -+ if (!err) -+ bgmac->b53_device = &bgmac_b53_dev; -+ } -+ - err = register_netdev(bgmac->net_dev); - if (err) { - dev_err(bgmac->dev, "Cannot register net device\n"); -@@ -1562,6 +1582,10 @@ EXPORT_SYMBOL_GPL(bgmac_enet_probe); - - void bgmac_enet_remove(struct bgmac *bgmac) - { -+ if (bgmac->b53_device) -+ platform_device_unregister(&bgmac_b53_dev); -+ bgmac->b53_device = NULL; -+ - unregister_netdev(bgmac->net_dev); - phy_disconnect(bgmac->net_dev->phydev); - netif_napi_del(&bgmac->napi); ---- a/drivers/net/ethernet/broadcom/bgmac.h -+++ b/drivers/net/ethernet/broadcom/bgmac.h -@@ -427,6 +427,7 @@ - #define BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII BIT(18) - #define BGMAC_FEAT_CC7_IF_TYPE_RGMII BIT(19) - #define BGMAC_FEAT_IDM_MASK BIT(20) -+#define BGMAC_FEAT_SRAB BIT(21) - - struct bgmac_slot_info { - union { -@@ -532,6 +533,9 @@ struct bgmac { - void (*cmn_maskset32)(struct bgmac *bgmac, u16 offset, u32 mask, - u32 set); - int (*phy_connect)(struct bgmac *bgmac); -+ -+ /* platform device for associated switch */ -+ struct platform_device *b53_device; - }; - - struct bgmac *bgmac_alloc(struct device *dev); diff --git a/target/linux/generic/hack-4.19/901-debloat_sock_diag.patch b/target/linux/generic/hack-4.19/901-debloat_sock_diag.patch deleted file mode 100644 index 25509ad9c0..0000000000 --- a/target/linux/generic/hack-4.19/901-debloat_sock_diag.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 3b6115d6b57a263bdc8c9b1df273bd4a7955eead Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 8 Jul 2017 08:16:31 +0200 -Subject: debloat: add some debloat patches, strip down procfs and make O_DIRECT support optional, saves ~15K after lzma on MIPS - -Signed-off-by: Felix Fietkau ---- - net/Kconfig | 3 +++ - net/core/Makefile | 3 ++- - net/core/sock.c | 2 ++ - net/ipv4/Kconfig | 1 + - net/netlink/Kconfig | 1 + - net/packet/Kconfig | 1 + - net/unix/Kconfig | 1 + - 7 files changed, 11 insertions(+), 1 deletion(-) - ---- a/net/Kconfig -+++ b/net/Kconfig -@@ -98,6 +98,9 @@ source "net/netlabel/Kconfig" - - endif # if INET - -+config SOCK_DIAG -+ bool -+ - config NETWORK_SECMARK - bool "Security Marking" - help ---- a/net/core/Makefile -+++ b/net/core/Makefile -@@ -10,9 +10,10 @@ obj-$(CONFIG_SYSCTL) += sysctl_net_core. - - obj-y += dev.o ethtool.o dev_addr_lists.o dst.o netevent.o \ - neighbour.o rtnetlink.o utils.o link_watch.o filter.o \ -- sock_diag.o dev_ioctl.o tso.o sock_reuseport.o \ -+ dev_ioctl.o tso.o sock_reuseport.o \ - fib_notifier.o xdp.o - -+obj-$(CONFIG_SOCK_DIAG) += sock_diag.o - obj-y += net-sysfs.o - obj-$(CONFIG_PAGE_POOL) += page_pool.o - obj-$(CONFIG_PROC_FS) += net-procfs.o ---- a/net/core/sock.c -+++ b/net/core/sock.c -@@ -490,6 +490,18 @@ discard_and_relse: - } - EXPORT_SYMBOL(__sk_receive_skb); - -+u64 sock_gen_cookie(struct sock *sk) -+{ -+ while (1) { -+ u64 res = atomic64_read(&sk->sk_cookie); -+ -+ if (res) -+ return res; -+ res = atomic64_inc_return(&sock_net(sk)->cookie_gen); -+ atomic64_cmpxchg(&sk->sk_cookie, 0, res); -+ } -+} -+ - struct dst_entry *__sk_dst_check(struct sock *sk, u32 cookie) - { - struct dst_entry *dst = __sk_dst_get(sk); -@@ -1604,9 +1616,11 @@ static void __sk_free(struct sock *sk) - if (likely(sk->sk_net_refcnt)) - sock_inuse_add(sock_net(sk), -1); - -+#ifdef CONFIG_SOCK_DIAG - if (unlikely(sk->sk_net_refcnt && sock_diag_has_destroy_listeners(sk))) - sock_diag_broadcast_destroy(sk); - else -+#endif - sk_destruct(sk); - } - ---- a/net/core/sock_diag.c -+++ b/net/core/sock_diag.c -@@ -20,18 +20,6 @@ static int (*inet_rcv_compat)(struct sk_ - static DEFINE_MUTEX(sock_diag_table_mutex); - static struct workqueue_struct *broadcast_wq; - --u64 sock_gen_cookie(struct sock *sk) --{ -- while (1) { -- u64 res = atomic64_read(&sk->sk_cookie); -- -- if (res) -- return res; -- res = atomic64_inc_return(&sock_net(sk)->cookie_gen); -- atomic64_cmpxchg(&sk->sk_cookie, 0, res); -- } --} -- - int sock_diag_check_cookie(struct sock *sk, const __u32 *cookie) - { - u64 res; ---- a/net/ipv4/Kconfig -+++ b/net/ipv4/Kconfig -@@ -426,6 +426,7 @@ config INET_XFRM_MODE_BEET - - config INET_DIAG - tristate "INET: socket monitoring interface" -+ select SOCK_DIAG - default y - ---help--- - Support for INET (TCP, DCCP, etc) socket monitoring interface used by ---- a/net/netlink/Kconfig -+++ b/net/netlink/Kconfig -@@ -4,6 +4,7 @@ - - config NETLINK_DIAG - tristate "NETLINK: socket monitoring interface" -+ select SOCK_DIAG - default n - ---help--- - Support for NETLINK socket monitoring interface used by the ss tool. ---- a/net/packet/Kconfig -+++ b/net/packet/Kconfig -@@ -18,6 +18,7 @@ config PACKET - config PACKET_DIAG - tristate "Packet: sockets monitoring interface" - depends on PACKET -+ select SOCK_DIAG - default n - ---help--- - Support for PF_PACKET sockets monitoring interface used by the ss tool. ---- a/net/unix/Kconfig -+++ b/net/unix/Kconfig -@@ -22,6 +22,7 @@ config UNIX - config UNIX_DIAG - tristate "UNIX: socket monitoring interface" - depends on UNIX -+ select SOCK_DIAG - default n - ---help--- - Support for UNIX socket monitoring interface used by the ss tool. diff --git a/target/linux/generic/hack-4.19/902-debloat_proc.patch b/target/linux/generic/hack-4.19/902-debloat_proc.patch deleted file mode 100644 index 33b954337f..0000000000 --- a/target/linux/generic/hack-4.19/902-debloat_proc.patch +++ /dev/null @@ -1,405 +0,0 @@ -From 9e3f1d0805b2d919904dd9a4ff0d956314cc3cba Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 8 Jul 2017 08:20:09 +0200 -Subject: debloat: procfs - -Signed-off-by: Felix Fietkau ---- - fs/locks.c | 2 ++ - fs/proc/Kconfig | 5 +++++ - fs/proc/consoles.c | 3 +++ - fs/proc/proc_tty.c | 11 ++++++++++- - include/net/snmp.h | 18 +++++++++++++++++- - ipc/msg.c | 3 +++ - ipc/sem.c | 2 ++ - ipc/shm.c | 2 ++ - ipc/util.c | 3 +++ - kernel/exec_domain.c | 2 ++ - kernel/irq/proc.c | 9 +++++++++ - kernel/time/timer_list.c | 2 ++ - mm/vmalloc.c | 2 ++ - mm/vmstat.c | 8 +++++--- - net/8021q/vlanproc.c | 6 ++++++ - net/core/net-procfs.c | 18 ++++++++++++------ - net/core/sock.c | 2 ++ - net/ipv4/fib_trie.c | 18 ++++++++++++------ - net/ipv4/proc.c | 3 +++ - net/ipv4/route.c | 3 +++ - 20 files changed, 105 insertions(+), 17 deletions(-) - ---- a/fs/locks.c -+++ b/fs/locks.c -@@ -2786,6 +2786,8 @@ static const struct seq_operations locks - - static int __init proc_locks_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - proc_create_seq_private("locks", 0, NULL, &locks_seq_operations, - sizeof(struct locks_iterator), NULL); - return 0; ---- a/fs/proc/Kconfig -+++ b/fs/proc/Kconfig -@@ -97,3 +97,8 @@ config PROC_CHILDREN - - Say Y if you are running any user-space software which takes benefit from - this interface. For example, rkt is such a piece of software. -+ -+config PROC_STRIPPED -+ default n -+ depends on EXPERT -+ bool "Strip non-essential /proc functionality to reduce code size" ---- a/fs/proc/consoles.c -+++ b/fs/proc/consoles.c -@@ -93,6 +93,9 @@ static const struct seq_operations conso - - static int __init proc_consoles_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - proc_create_seq("consoles", 0, NULL, &consoles_op); - return 0; - } ---- a/fs/proc/proc_tty.c -+++ b/fs/proc/proc_tty.c -@@ -133,7 +133,10 @@ static const struct seq_operations tty_d - void proc_tty_register_driver(struct tty_driver *driver) - { - struct proc_dir_entry *ent; -- -+ -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - if (!driver->driver_name || driver->proc_entry || - !driver->ops->proc_show) - return; -@@ -150,6 +153,9 @@ void proc_tty_unregister_driver(struct t - { - struct proc_dir_entry *ent; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - ent = driver->proc_entry; - if (!ent) - return; -@@ -164,6 +170,9 @@ void proc_tty_unregister_driver(struct t - */ - void __init proc_tty_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - if (!proc_mkdir("tty", NULL)) - return; - proc_mkdir("tty/ldisc", NULL); /* Preserved: it's userspace visible */ ---- a/include/net/snmp.h -+++ b/include/net/snmp.h -@@ -123,6 +123,21 @@ struct linux_xfrm_mib { - #define DECLARE_SNMP_STAT(type, name) \ - extern __typeof__(type) __percpu *name - -+#ifdef CONFIG_PROC_STRIPPED -+#define __SNMP_STATS_DUMMY(mib) \ -+ do { (void) mib->mibs[0]; } while(0) -+ -+#define __SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib) -+#define SNMP_INC_STATS_ATOMIC_LONG(mib, field) __SNMP_STATS_DUMMY(mib) -+#define SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib) -+#define SNMP_DEC_STATS(mib, field) __SNMP_STATS_DUMMY(mib) -+#define __SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib) -+#define SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib) -+#define SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib) -+#define __SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib) -+ -+#else -+ - #define __SNMP_INC_STATS(mib, field) \ - __this_cpu_inc(mib->mibs[field]) - -@@ -153,8 +168,9 @@ struct linux_xfrm_mib { - __this_cpu_add(ptr[basefield##OCTETS], addend); \ - } while (0) - -+#endif - --#if BITS_PER_LONG==32 -+#if (BITS_PER_LONG==32) && !defined(CONFIG_PROC_STRIPPED) - - #define __SNMP_ADD_STATS64(mib, field, addend) \ - do { \ ---- a/ipc/msg.c -+++ b/ipc/msg.c -@@ -1292,6 +1292,9 @@ void __init msg_init(void) - { - msg_init_ns(&init_ipc_ns); - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - ipc_init_proc_interface("sysvipc/msg", - " key msqid perms cbytes qnum lspid lrpid uid gid cuid cgid stime rtime ctime\n", - IPC_MSG_IDS, sysvipc_msg_proc_show); ---- a/ipc/sem.c -+++ b/ipc/sem.c -@@ -243,6 +243,8 @@ void sem_exit_ns(struct ipc_namespace *n - void __init sem_init(void) - { - sem_init_ns(&init_ipc_ns); -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; - ipc_init_proc_interface("sysvipc/sem", - " key semid perms nsems uid gid cuid cgid otime ctime\n", - IPC_SEM_IDS, sysvipc_sem_proc_show); ---- a/ipc/shm.c -+++ b/ipc/shm.c -@@ -144,6 +144,8 @@ pure_initcall(ipc_ns_init); - - void __init shm_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; - ipc_init_proc_interface("sysvipc/shm", - #if BITS_PER_LONG <= 32 - " key shmid perms size cpid lpid nattch uid gid cuid cgid atime dtime ctime rss swap\n", ---- a/ipc/util.c -+++ b/ipc/util.c -@@ -140,6 +140,9 @@ void __init ipc_init_proc_interface(cons - struct proc_dir_entry *pde; - struct ipc_proc_iface *iface; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - iface = kmalloc(sizeof(*iface), GFP_KERNEL); - if (!iface) - return; ---- a/kernel/exec_domain.c -+++ b/kernel/exec_domain.c -@@ -29,6 +29,8 @@ static int execdomains_proc_show(struct - - static int __init proc_execdomains_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - proc_create_single("execdomains", 0, NULL, execdomains_proc_show); - return 0; - } ---- a/kernel/irq/proc.c -+++ b/kernel/irq/proc.c -@@ -355,6 +355,9 @@ void register_irq_proc(unsigned int irq, - void __maybe_unused *irqp = (void *)(unsigned long) irq; - char name [MAX_NAMELEN]; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP)) -+ return; -+ - if (!root_irq_dir || (desc->irq_data.chip == &no_irq_chip)) - return; - -@@ -408,6 +411,9 @@ void unregister_irq_proc(unsigned int ir - { - char name [MAX_NAMELEN]; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP)) -+ return; -+ - if (!root_irq_dir || !desc->dir) - return; - #ifdef CONFIG_SMP -@@ -446,6 +452,9 @@ void init_irq_proc(void) - unsigned int irq; - struct irq_desc *desc; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP)) -+ return; -+ - /* create /proc/irq */ - root_irq_dir = proc_mkdir("irq", NULL); - if (!root_irq_dir) ---- a/kernel/time/timer_list.c -+++ b/kernel/time/timer_list.c -@@ -375,6 +375,8 @@ static int __init init_timer_list_procfs - { - struct proc_dir_entry *pe; - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - pe = proc_create_seq_private("timer_list", 0400, NULL, &timer_list_sops, - sizeof(struct timer_list_iter), NULL); - if (!pe) ---- a/mm/vmalloc.c -+++ b/mm/vmalloc.c -@@ -2764,6 +2764,8 @@ static const struct seq_operations vmall - - static int __init proc_vmalloc_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - if (IS_ENABLED(CONFIG_NUMA)) - proc_create_seq_private("vmallocinfo", 0400, NULL, - &vmalloc_op, ---- a/mm/vmstat.c -+++ b/mm/vmstat.c -@@ -1972,10 +1972,12 @@ void __init init_mm_internals(void) - start_shepherd_timer(); - #endif - #ifdef CONFIG_PROC_FS -- proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op); -- proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) { -+ proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op); -+ proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op); -+ proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op); -+ } - proc_create_seq("vmstat", 0444, NULL, &vmstat_op); -- proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op); - #endif - } - ---- a/net/8021q/vlanproc.c -+++ b/net/8021q/vlanproc.c -@@ -96,6 +96,9 @@ void vlan_proc_cleanup(struct net *net) - { - struct vlan_net *vn = net_generic(net, vlan_net_id); - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return; -+ - if (vn->proc_vlan_conf) - remove_proc_entry(name_conf, vn->proc_vlan_dir); - -@@ -115,6 +118,9 @@ int __net_init vlan_proc_init(struct net - { - struct vlan_net *vn = net_generic(net, vlan_net_id); - -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - vn->proc_vlan_dir = proc_net_mkdir(net, name_root, net->proc_net); - if (!vn->proc_vlan_dir) - goto err; ---- a/net/core/net-procfs.c -+++ b/net/core/net-procfs.c -@@ -279,10 +279,12 @@ static int __net_init dev_proc_net_init( - if (!proc_create_net("dev", 0444, net->proc_net, &dev_seq_ops, - sizeof(struct seq_net_private))) - goto out; -- if (!proc_create_seq("softnet_stat", 0444, net->proc_net, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_seq("softnet_stat", 0444, net->proc_net, - &softnet_seq_ops)) - goto out_dev; -- if (!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops, - sizeof(struct seq_net_private))) - goto out_softnet; - -@@ -292,9 +294,11 @@ static int __net_init dev_proc_net_init( - out: - return rc; - out_ptype: -- remove_proc_entry("ptype", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("ptype", net->proc_net); - out_softnet: -- remove_proc_entry("softnet_stat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("softnet_stat", net->proc_net); - out_dev: - remove_proc_entry("dev", net->proc_net); - goto out; -@@ -304,8 +308,10 @@ static void __net_exit dev_proc_net_exit - { - wext_proc_exit(net); - -- remove_proc_entry("ptype", net->proc_net); -- remove_proc_entry("softnet_stat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) { -+ remove_proc_entry("ptype", net->proc_net); -+ remove_proc_entry("softnet_stat", net->proc_net); -+ } - remove_proc_entry("dev", net->proc_net); - } - ---- a/net/core/sock.c -+++ b/net/core/sock.c -@@ -3491,6 +3491,8 @@ static __net_initdata struct pernet_oper - - static int __init proto_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; - return register_pernet_subsys(&proto_net_ops); - } - ---- a/net/ipv4/fib_trie.c -+++ b/net/ipv4/fib_trie.c -@@ -2720,11 +2720,13 @@ static const struct seq_operations fib_r - - int __net_init fib_proc_init(struct net *net) - { -- if (!proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops, - sizeof(struct fib_trie_iter))) - goto out1; - -- if (!proc_create_net_single("fib_triestat", 0444, net->proc_net, -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED) && -+ !proc_create_net_single("fib_triestat", 0444, net->proc_net, - fib_triestat_seq_show, NULL)) - goto out2; - -@@ -2735,17 +2737,21 @@ int __net_init fib_proc_init(struct net - return 0; - - out3: -- remove_proc_entry("fib_triestat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("fib_triestat", net->proc_net); - out2: -- remove_proc_entry("fib_trie", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ remove_proc_entry("fib_trie", net->proc_net); - out1: - return -ENOMEM; - } - - void __net_exit fib_proc_exit(struct net *net) - { -- remove_proc_entry("fib_trie", net->proc_net); -- remove_proc_entry("fib_triestat", net->proc_net); -+ if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) { -+ remove_proc_entry("fib_trie", net->proc_net); -+ remove_proc_entry("fib_triestat", net->proc_net); -+ } - remove_proc_entry("route", net->proc_net); - } - ---- a/net/ipv4/proc.c -+++ b/net/ipv4/proc.c -@@ -524,5 +524,8 @@ static __net_initdata struct pernet_oper - - int __init ip_misc_proc_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - return register_pernet_subsys(&ip_proc_ops); - } ---- a/net/ipv4/route.c -+++ b/net/ipv4/route.c -@@ -411,6 +411,9 @@ static struct pernet_operations ip_rt_pr - - static int __init ip_rt_proc_init(void) - { -+ if (IS_ENABLED(CONFIG_PROC_STRIPPED)) -+ return 0; -+ - return register_pernet_subsys(&ip_rt_proc_ops); - } - diff --git a/target/linux/generic/hack-4.19/904-debloat_dma_buf.patch b/target/linux/generic/hack-4.19/904-debloat_dma_buf.patch deleted file mode 100644 index 3cbafc701e..0000000000 --- a/target/linux/generic/hack-4.19/904-debloat_dma_buf.patch +++ /dev/null @@ -1,64 +0,0 @@ -From e3692cb2fcd5ba1244512a0f43b8118f65f1c375 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 8 Jul 2017 08:20:43 +0200 -Subject: debloat: dmabuf - -Signed-off-by: Felix Fietkau ---- - drivers/base/Kconfig | 2 +- - drivers/dma-buf/Makefile | 10 +++++++--- - drivers/dma-buf/dma-buf.c | 4 +++- - kernel/sched/core.c | 1 + - 4 files changed, 12 insertions(+), 5 deletions(-) - ---- a/drivers/base/Kconfig -+++ b/drivers/base/Kconfig -@@ -172,7 +172,7 @@ config SOC_BUS - source "drivers/base/regmap/Kconfig" - - config DMA_SHARED_BUFFER -- bool -+ tristate - default n - select ANON_INODES - select IRQ_WORK ---- a/drivers/dma-buf/Makefile -+++ b/drivers/dma-buf/Makefile -@@ -1,3 +1,7 @@ --obj-y := dma-buf.o dma-fence.o dma-fence-array.o reservation.o seqno-fence.o --obj-$(CONFIG_SYNC_FILE) += sync_file.o --obj-$(CONFIG_SW_SYNC) += sw_sync.o sync_debug.o -+obj-$(CONFIG_DMA_SHARED_BUFFER) := dma-shared-buffer.o -+ -+dma-buf-objs-y := dma-buf.o dma-fence.o dma-fence-array.o reservation.o seqno-fence.o -+dma-buf-objs-$(CONFIG_SYNC_FILE) += sync_file.o -+dma-buf-objs-$(CONFIG_SW_SYNC) += sw_sync.o sync_debug.o -+ -+dma-shared-buffer-objs := $(dma-buf-objs-y) ---- a/drivers/dma-buf/dma-buf.c -+++ b/drivers/dma-buf/dma-buf.c -@@ -34,6 +34,7 @@ - #include - #include - #include -+#include - - #include - -@@ -1159,4 +1160,5 @@ static void __exit dma_buf_deinit(void) - { - dma_buf_uninit_debugfs(); - } --__exitcall(dma_buf_deinit); -+module_exit(dma_buf_deinit); -+MODULE_LICENSE("GPL"); ---- a/kernel/sched/core.c -+++ b/kernel/sched/core.c -@@ -2129,6 +2129,7 @@ int wake_up_state(struct task_struct *p, - { - return try_to_wake_up(p, state, 0); - } -+EXPORT_SYMBOL_GPL(wake_up_state); - - /* - * Perform scheduler related setup for a newly forked process p. diff --git a/target/linux/generic/hack-4.19/910-kobject_uevent.patch b/target/linux/generic/hack-4.19/910-kobject_uevent.patch deleted file mode 100644 index c4c41ca400..0000000000 --- a/target/linux/generic/hack-4.19/910-kobject_uevent.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sun, 16 Jul 2017 16:56:10 +0200 -Subject: lib: add uevent_next_seqnum() - -Signed-off-by: Felix Fietkau ---- - include/linux/kobject.h | 5 +++++ - lib/kobject_uevent.c | 37 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 42 insertions(+) - ---- a/lib/kobject_uevent.c -+++ b/lib/kobject_uevent.c -@@ -179,6 +179,18 @@ out: - return r; - } - -+u64 uevent_next_seqnum(void) -+{ -+ u64 seq; -+ -+ mutex_lock(&uevent_sock_mutex); -+ seq = ++uevent_seqnum; -+ mutex_unlock(&uevent_sock_mutex); -+ -+ return seq; -+} -+EXPORT_SYMBOL_GPL(uevent_next_seqnum); -+ - /** - * kobject_synth_uevent - send synthetic uevent with arguments - * diff --git a/target/linux/generic/hack-4.19/911-kobject_add_broadcast_uevent.patch b/target/linux/generic/hack-4.19/911-kobject_add_broadcast_uevent.patch deleted file mode 100644 index 06b94117c1..0000000000 --- a/target/linux/generic/hack-4.19/911-kobject_add_broadcast_uevent.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sun, 16 Jul 2017 16:56:10 +0200 -Subject: lib: add uevent_next_seqnum() - -Signed-off-by: Felix Fietkau ---- - include/linux/kobject.h | 5 +++++ - lib/kobject_uevent.c | 37 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 42 insertions(+) - ---- a/include/linux/kobject.h -+++ b/include/linux/kobject.h -@@ -32,6 +32,8 @@ - #define UEVENT_NUM_ENVP 32 /* number of env pointers */ - #define UEVENT_BUFFER_SIZE 2048 /* buffer for the variables */ - -+struct sk_buff; -+ - #ifdef CONFIG_UEVENT_HELPER - /* path to the userspace helper executed on an event */ - extern char uevent_helper[]; -@@ -244,4 +246,7 @@ int kobject_synth_uevent(struct kobject - __printf(2, 3) - int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...); - -+int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group, -+ gfp_t allocation); -+ - #endif /* _KOBJECT_H_ */ ---- a/lib/kobject_uevent.c -+++ b/lib/kobject_uevent.c -@@ -688,6 +688,43 @@ int add_uevent_var(struct kobj_uevent_en - EXPORT_SYMBOL_GPL(add_uevent_var); - - #if defined(CONFIG_NET) -+int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group, -+ gfp_t allocation) -+{ -+ struct uevent_sock *ue_sk; -+ int err = 0; -+ -+ /* send netlink message */ -+ mutex_lock(&uevent_sock_mutex); -+ list_for_each_entry(ue_sk, &uevent_sock_list, list) { -+ struct sock *uevent_sock = ue_sk->sk; -+ struct sk_buff *skb2; -+ -+ skb2 = skb_clone(skb, allocation); -+ if (!skb2) -+ break; -+ -+ err = netlink_broadcast(uevent_sock, skb2, pid, group, -+ allocation); -+ if (err) -+ break; -+ } -+ mutex_unlock(&uevent_sock_mutex); -+ -+ kfree_skb(skb); -+ return err; -+} -+#else -+int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group, -+ gfp_t allocation) -+{ -+ kfree_skb(skb); -+ return 0; -+} -+#endif -+EXPORT_SYMBOL_GPL(broadcast_uevent); -+ -+#if defined(CONFIG_NET) - static int uevent_net_broadcast(struct sock *usk, struct sk_buff *skb, - struct netlink_ext_ack *extack) - { diff --git a/target/linux/generic/hack-4.19/921-always-create-console-node-in-initramfs.patch b/target/linux/generic/hack-4.19/921-always-create-console-node-in-initramfs.patch deleted file mode 100644 index e437579050..0000000000 --- a/target/linux/generic/hack-4.19/921-always-create-console-node-in-initramfs.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 5d301596fdc72f6cb672f72eb3c66e7cddefb103 Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 8 Jul 2017 08:26:02 +0200 -Subject: initramfs: always create console node - -Signed-off-by: Felix Fietkau ---- - usr/gen_initramfs_list.sh | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/usr/gen_initramfs_list.sh -+++ b/usr/gen_initramfs_list.sh -@@ -59,6 +59,18 @@ default_initramfs() { - EOF - } - -+list_openwrt_initramfs() { -+ : -+} -+ -+openwrt_initramfs() { -+ # make sure that /dev/console exists -+ cat <<-EOF >> ${output} -+ dir /dev 0755 0 0 -+ nod /dev/console 0600 0 0 c 5 1 -+ EOF -+} -+ - filetype() { - local argv1="$1" - -@@ -180,6 +192,8 @@ dir_filelist() { - if [ "$(echo "${dirlist}" | wc -l)" -gt 1 ]; then - ${dep_list}print_mtime "$1" - -+ ${dep_list}openwrt_initramfs -+ - echo "${dirlist}" | \ - while read x; do - ${dep_list}parse ${x} diff --git a/target/linux/generic/hack-4.19/930-crashlog.patch b/target/linux/generic/hack-4.19/930-crashlog.patch deleted file mode 100644 index bb16f22915..0000000000 --- a/target/linux/generic/hack-4.19/930-crashlog.patch +++ /dev/null @@ -1,338 +0,0 @@ -From 6b1ab74a9917012d0c559edc4ed299d9228ac89f Mon Sep 17 00:00:00 2001 -From: Felix Fietkau -Date: Sat, 8 Jul 2017 08:26:47 +0200 -Subject: kernel: add the new 'crashlog' feature - -this tries to store kernel oops/panic logs in a fixed location in RAM to -recover them available to user space using debugfs - -Signed-off-by: Felix Fietkau ---- - include/linux/crashlog.h | 17 ++++ - init/Kconfig | 4 + - kernel/Makefile | 1 + - kernel/crashlog.c | 213 +++++++++++++++++++++++++++++++++++++++++++++++ - kernel/module.c | 3 + - mm/bootmem.c | 2 + - mm/memblock.c | 5 ++ - 7 files changed, 245 insertions(+) - create mode 100644 include/linux/crashlog.h - create mode 100644 kernel/crashlog.c - ---- /dev/null -+++ b/include/linux/crashlog.h -@@ -0,0 +1,17 @@ -+#ifndef __CRASHLOG_H -+#define __CRASHLOG_H -+ -+#ifdef CONFIG_CRASHLOG -+void crashlog_init_bootmem(struct bootmem_data *bdata); -+void crashlog_init_memblock(phys_addr_t addr, phys_addr_t size); -+#else -+static inline void crashlog_init_bootmem(struct bootmem_data *bdata) -+{ -+} -+ -+static inline void crashlog_init_memblock(phys_addr_t addr, phys_addr_t size) -+{ -+} -+#endif -+ -+#endif ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1049,6 +1049,10 @@ config RELAY - - If unsure, say N. - -+config CRASHLOG -+ bool "Crash logging" -+ depends on (!NO_BOOTMEM || HAVE_MEMBLOCK) -+ - config BLK_DEV_INITRD - bool "Initial RAM filesystem and RAM disk (initramfs/initrd) support" - help ---- a/kernel/Makefile -+++ b/kernel/Makefile -@@ -114,6 +114,7 @@ obj-$(CONFIG_TORTURE_TEST) += torture.o - obj-$(CONFIG_HAS_IOMEM) += iomem.o - obj-$(CONFIG_ZONE_DEVICE) += memremap.o - obj-$(CONFIG_RSEQ) += rseq.o -+obj-$(CONFIG_CRASHLOG) += crashlog.o - - $(obj)/configs.o: $(obj)/config_data.h - ---- /dev/null -+++ b/kernel/crashlog.c -@@ -0,0 +1,213 @@ -+/* -+ * Crash information logger -+ * Copyright (C) 2010 Felix Fietkau -+ * -+ * Based on ramoops.c -+ * Copyright (C) 2010 Marco Stornelli -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA -+ * 02110-1301 USA -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define CRASHLOG_PAGES 4 -+#define CRASHLOG_SIZE (CRASHLOG_PAGES * PAGE_SIZE) -+#define CRASHLOG_MAGIC 0xa1eedead -+ -+/* -+ * Start the log at 1M before the end of RAM, as some boot loaders like -+ * to use the end of the RAM for stack usage and other things -+ * If this fails, fall back to using the last part. -+ */ -+#define CRASHLOG_OFFSET (1024 * 1024) -+ -+struct crashlog_data { -+ u32 magic; -+ u32 len; -+ u8 data[]; -+}; -+ -+static struct debugfs_blob_wrapper crashlog_blob; -+static unsigned long crashlog_addr = 0; -+static struct crashlog_data *crashlog_buf; -+static struct kmsg_dumper dump; -+static bool first = true; -+ -+extern struct list_head *crashlog_modules; -+ -+static bool crashlog_set_addr(phys_addr_t addr, phys_addr_t size) -+{ -+ /* Limit to lower 64 MB to avoid highmem */ -+ phys_addr_t limit = 64 * 1024 * 1024; -+ -+ if (crashlog_addr) -+ return false; -+ -+ if (addr > limit) -+ return false; -+ -+ if (addr + size > limit) -+ size = limit - addr; -+ -+ crashlog_addr = addr; -+ -+ if (addr + size > CRASHLOG_OFFSET) -+ crashlog_addr += size - CRASHLOG_OFFSET; -+ -+ return true; -+} -+ -+#ifndef CONFIG_NO_BOOTMEM -+void __init crashlog_init_bootmem(bootmem_data_t *bdata) -+{ -+ phys_addr_t start, end; -+ -+ start = PFN_PHYS(bdata->node_low_pfn); -+ end = PFN_PHYS(bdata->node_min_pfn); -+ if (!crashlog_set_addr(start, end - start)) -+ return; -+ -+ if (reserve_bootmem(crashlog_addr, CRASHLOG_SIZE, BOOTMEM_EXCLUSIVE) < 0) { -+ printk("Crashlog failed to allocate RAM at address 0x%lx\n", -+ crashlog_addr); -+ crashlog_addr = 0; -+ } -+} -+#endif -+ -+#ifdef CONFIG_HAVE_MEMBLOCK -+void __init_memblock crashlog_init_memblock(phys_addr_t addr, phys_addr_t size) -+{ -+ if (!crashlog_set_addr(addr, size)) -+ return; -+ -+ if (memblock_reserve(crashlog_addr, CRASHLOG_SIZE)) { -+ printk("Crashlog failed to allocate RAM at address 0x%lx\n", -+ crashlog_addr); -+ crashlog_addr = 0; -+ } -+} -+#endif -+ -+static void __init crashlog_copy(void) -+{ -+ if (crashlog_buf->magic != CRASHLOG_MAGIC) -+ return; -+ -+ if (!crashlog_buf->len || crashlog_buf->len > -+ CRASHLOG_SIZE - sizeof(*crashlog_buf)) -+ return; -+ -+ crashlog_blob.size = crashlog_buf->len; -+ crashlog_blob.data = kmemdup(crashlog_buf->data, -+ crashlog_buf->len, GFP_KERNEL); -+ -+ debugfs_create_blob("crashlog", 0700, NULL, &crashlog_blob); -+} -+ -+static int get_maxlen(void) -+{ -+ return CRASHLOG_SIZE - sizeof(*crashlog_buf) - crashlog_buf->len; -+} -+ -+static void crashlog_printf(const char *fmt, ...) -+{ -+ va_list args; -+ int len = get_maxlen(); -+ -+ if (!len) -+ return; -+ -+ va_start(args, fmt); -+ crashlog_buf->len += vscnprintf( -+ &crashlog_buf->data[crashlog_buf->len], -+ len, fmt, args); -+ va_end(args); -+} -+ -+static void crashlog_do_dump(struct kmsg_dumper *dumper, -+ enum kmsg_dump_reason reason) -+{ -+ struct timeval tv; -+ struct module *m; -+ char *buf; -+ size_t len; -+ -+ if (!first) -+ crashlog_printf("\n===================================\n"); -+ -+ do_gettimeofday(&tv); -+ crashlog_printf("Time: %lu.%lu\n", -+ (long)tv.tv_sec, (long)tv.tv_usec); -+ -+ if (first) { -+ crashlog_printf("Modules:"); -+ list_for_each_entry(m, crashlog_modules, list) { -+ crashlog_printf("\t%s@%p+%x", m->name, -+ m->core_layout.base, m->core_layout.size, -+ m->init_layout.base, m->init_layout.size); -+ } -+ crashlog_printf("\n"); -+ first = false; -+ } -+ -+ buf = (char *)&crashlog_buf->data[crashlog_buf->len]; -+ -+ kmsg_dump_get_buffer(dumper, true, buf, get_maxlen(), &len); -+ -+ crashlog_buf->len += len; -+} -+ -+ -+int __init crashlog_init_fs(void) -+{ -+ struct page *pages[CRASHLOG_PAGES]; -+ pgprot_t prot; -+ int i; -+ -+ if (!crashlog_addr) { -+ printk("No memory allocated for crashlog\n"); -+ return -ENOMEM; -+ } -+ -+ printk("Crashlog allocated RAM at address 0x%lx\n", (unsigned long) crashlog_addr); -+ for (i = 0; i < CRASHLOG_PAGES; i++) -+ pages[i] = pfn_to_page((crashlog_addr >> PAGE_SHIFT) + i); -+ -+ prot = pgprot_writecombine(PAGE_KERNEL); -+ crashlog_buf = vmap(pages, CRASHLOG_PAGES, VM_MAP, prot); -+ -+ crashlog_copy(); -+ -+ crashlog_buf->magic = CRASHLOG_MAGIC; -+ crashlog_buf->len = 0; -+ -+ dump.max_reason = KMSG_DUMP_OOPS; -+ dump.dump = crashlog_do_dump; -+ kmsg_dump_register(&dump); -+ -+ return 0; -+} -+module_init(crashlog_init_fs); ---- a/kernel/module.c -+++ b/kernel/module.c -@@ -251,6 +251,9 @@ static void mod_update_bounds(struct mod - #ifdef CONFIG_KGDB_KDB - struct list_head *kdb_modules = &modules; /* kdb needs the list of modules */ - #endif /* CONFIG_KGDB_KDB */ -+#ifdef CONFIG_CRASHLOG -+struct list_head *crashlog_modules = &modules; -+#endif - - static void module_assert_mutex(void) - { ---- a/mm/bootmem.c -+++ b/mm/bootmem.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -215,6 +216,7 @@ static unsigned long __init free_all_boo - if (!bdata->node_bootmem_map) - return 0; - -+ crashlog_init_bootmem(bdata); - map = bdata->node_bootmem_map; - start = bdata->node_min_pfn; - end = bdata->node_low_pfn; ---- a/mm/memblock.c -+++ b/mm/memblock.c -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -547,6 +548,8 @@ static void __init_memblock memblock_ins - memblock_set_region_node(rgn, nid); - type->cnt++; - type->total_size += size; -+ if (type == &memblock.memory) -+ crashlog_init_memblock(base, size); - } - - /** -@@ -586,6 +589,8 @@ int __init_memblock memblock_add_range(s - type->regions[0].flags = flags; - memblock_set_region_node(&type->regions[0], nid); - type->total_size = size; -+ if (type == &memblock.memory) -+ crashlog_init_memblock(base, size); - return 0; - } - repeat: diff --git a/target/linux/generic/pending-4.19/0931-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch b/target/linux/generic/pending-4.19/0931-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch deleted file mode 100644 index be9ceebc3a..0000000000 --- a/target/linux/generic/pending-4.19/0931-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch +++ /dev/null @@ -1,26 +0,0 @@ -From d9c8bc8c1408f3e8529db6e4e04017b4c579c342 Mon Sep 17 00:00:00 2001 -From: Pawel Dembicki -Date: Sun, 18 Feb 2018 17:08:04 +0100 -Subject: [PATCH] w1: gpio: fix problem with platfom data in w1-gpio - -In devices, where fdt is used, is impossible to apply platform data -without proper fdt node. - -This patch allow to use platform data in devices with fdt. - -Signed-off-by: Pawel Dembicki ---- - drivers/w1/masters/w1-gpio.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - ---- a/drivers/w1/masters/w1-gpio.c -+++ b/drivers/w1/masters/w1-gpio.c -@@ -79,7 +79,7 @@ static int w1_gpio_probe(struct platform - enum gpiod_flags gflags = GPIOD_OUT_LOW_OPEN_DRAIN; - int err; - -- if (of_have_populated_dt()) { -+ if (of_have_populated_dt() && !dev_get_platdata(&pdev->dev)) { - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) - return -ENOMEM; diff --git a/target/linux/generic/pending-4.19/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch b/target/linux/generic/pending-4.19/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch deleted file mode 100644 index 0b87f493ec..0000000000 --- a/target/linux/generic/pending-4.19/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch +++ /dev/null @@ -1,57 +0,0 @@ -From: Felix Fietkau -Date: Wed, 18 Apr 2018 10:50:05 +0200 -Subject: [PATCH] MIPS: only process negative stack offsets on stack traces - -Fixes endless back traces in cases where the compiler emits a stack -pointer increase in a branch delay slot (probably for some form of -function return). - -[ 3.475442] BUG: MAX_STACK_TRACE_ENTRIES too low! -[ 3.480070] turning off the locking correctness validator. -[ 3.485521] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.34 #0 -[ 3.491475] Stack : 00000000 00000000 00000000 00000000 80e0fce2 00000034 00000000 00000000 -[ 3.499764] 87c3838c 80696377 8061047c 00000000 00000001 00000001 87c2d850 6534689f -[ 3.508059] 00000000 00000000 80e10000 00000000 00000000 000000cf 0000000f 00000000 -[ 3.516353] 00000000 806a0000 00076891 00000000 00000000 00000000 ffffffff 00000000 -[ 3.524648] 806c0000 00000004 80e10000 806a0000 00000003 80690000 00000000 80700000 -[ 3.532942] ... -[ 3.535362] Call Trace: -[ 3.537818] [<80010a48>] show_stack+0x58/0x100 -[ 3.542207] [<804c2f78>] dump_stack+0xe8/0x170 -[ 3.546613] [<80079f90>] save_trace+0xf0/0x110 -[ 3.551010] [<8007b1ec>] mark_lock+0x33c/0x78c -[ 3.555413] [<8007bf48>] __lock_acquire+0x2ac/0x1a08 -[ 3.560337] [<8007de60>] lock_acquire+0x64/0x8c -[ 3.564846] [<804e1570>] _raw_spin_lock_irqsave+0x54/0x78 -[ 3.570186] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.574770] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.579257] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.583839] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.588329] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.592911] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.597401] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.601983] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.606473] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.611055] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.615545] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.620125] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.624619] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.629197] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.633691] [<801b618c>] kernfs_notify+0x94/0xac -[ 3.638269] [<801b7b10>] sysfs_notify+0x74/0xa0 -[ 3.642763] [<801b618c>] kernfs_notify+0x94/0xac - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/mips/kernel/process.c -+++ b/arch/mips/kernel/process.c -@@ -361,6 +361,8 @@ static inline int is_sp_move_ins(union m - - if (ip->i_format.opcode == addiu_op || - ip->i_format.opcode == daddiu_op) { -+ if (ip->i_format.simmediate > 0) -+ return 0; - *frame_size = -ip->i_format.simmediate; - return 1; - } diff --git a/target/linux/generic/pending-4.19/103-MIPS-perf-ath79-Fix-perfcount-IRQ-assignment.patch b/target/linux/generic/pending-4.19/103-MIPS-perf-ath79-Fix-perfcount-IRQ-assignment.patch deleted file mode 100644 index 6b74c7da1d..0000000000 --- a/target/linux/generic/pending-4.19/103-MIPS-perf-ath79-Fix-perfcount-IRQ-assignment.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 852a88f35f4b7e5ebb717fed3c3a3330d5ad4336 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Wed, 10 Apr 2019 16:43:27 +0200 -Subject: [PATCH v2] MIPS: perf: ath79: Fix perfcount IRQ assignment -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Currently it's not possible to use perf on ath79 due to genirq flags -mismatch happening on static virtual IRQ 13 which is used for -performance counters hardware IRQ 5. - -On TP-Link Archer C7v5: - - CPU0 - 2: 0 MIPS 2 ath9k - 4: 318 MIPS 4 19000000.eth - 7: 55034 MIPS 7 timer - 8: 1236 MISC 3 ttyS0 - 12: 0 INTC 1 ehci_hcd:usb1 - 13: 0 gpio-ath79 2 keys - 14: 0 gpio-ath79 5 keys - 15: 31 AR724X PCI 1 ath10k_pci - - $ perf top - genirq: Flags mismatch irq 13. 00014c83 (mips_perf_pmu) vs. 00002003 (keys) - -On TP-Link Archer C7v4: - - CPU0 - 4: 0 MIPS 4 19000000.eth - 5: 7135 MIPS 5 1a000000.eth - 7: 98379 MIPS 7 timer - 8: 30 MISC 3 ttyS0 - 12: 90028 INTC 0 ath9k - 13: 5520 INTC 1 ehci_hcd:usb1 - 14: 4623 INTC 2 ehci_hcd:usb2 - 15: 32844 AR724X PCI 1 ath10k_pci - 16: 0 gpio-ath79 16 keys - 23: 0 gpio-ath79 23 keys - - $ perf top - genirq: Flags mismatch irq 13. 00014c80 (mips_perf_pmu) vs. 00000080 (ehci_hcd:usb1) - -This problem is happening, because currently statically assigned virtual -IRQ 13 for performance counters is not claimed during the initialization -of MIPS PMU during the bootup, so the IRQ subsystem doesn't know, that -this interrupt isn't available for further use. - -So this patch fixes the issue by simply booking hardware IRQ 5 for MIPS PMU. - -Tested-by: Kevin 'ldir' Darbyshire-Bryant -Signed-off-by: Petr Štetiar ---- - -Changes since v1: - - I've incorporated two comments which I've received on IRC from blogic and - I've also reworded the commit message to match the changes in v2 of this - patch. - - * use actual hardware perfcount IRQ 5 instead of the virtual IRQ 13 - * dropped the CONFIG_PERF_EVENTS ifdef around irq_create_mapping - - arch/mips/ath79/setup.c | 6 ------ - drivers/irqchip/irq-ath79-misc.c | 11 +++++++++++ - 2 files changed, 11 insertions(+), 6 deletions(-) - ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -211,12 +211,6 @@ const char *get_system_type(void) - return ath79_sys_type; - } - --int get_c0_perfcount_int(void) --{ -- return ATH79_MISC_IRQ(5); --} --EXPORT_SYMBOL_GPL(get_c0_perfcount_int); -- - unsigned int get_c0_compare_int(void) - { - return CP0_LEGACY_COMPARE_IRQ; ---- a/drivers/irqchip/irq-ath79-misc.c -+++ b/drivers/irqchip/irq-ath79-misc.c -@@ -22,6 +22,15 @@ - #define AR71XX_RESET_REG_MISC_INT_ENABLE 4 - - #define ATH79_MISC_IRQ_COUNT 32 -+#define ATH79_MISC_PERF_IRQ 5 -+ -+static int ath79_perfcount_irq; -+ -+int get_c0_perfcount_int(void) -+{ -+ return ath79_perfcount_irq; -+} -+EXPORT_SYMBOL_GPL(get_c0_perfcount_int); - - static void ath79_misc_irq_handler(struct irq_desc *desc) - { -@@ -113,6 +122,8 @@ static void __init ath79_misc_intc_domai - { - void __iomem *base = domain->host_data; - -+ ath79_perfcount_irq = irq_create_mapping(domain, ATH79_MISC_PERF_IRQ); -+ - /* Disable and clear all interrupts */ - __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); - __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); diff --git a/target/linux/generic/pending-4.19/110-ehci_hcd_ignore_oc.patch b/target/linux/generic/pending-4.19/110-ehci_hcd_ignore_oc.patch deleted file mode 100644 index db7b7ff177..0000000000 --- a/target/linux/generic/pending-4.19/110-ehci_hcd_ignore_oc.patch +++ /dev/null @@ -1,79 +0,0 @@ -From: Florian Fainelli -Subject: USB: EHCI: add ignore_oc flag to disable overcurrent checking - -This patch adds an ignore_oc flag which can be set by EHCI controller -not supporting or wanting to disable overcurrent checking. The EHCI -platform data in include/linux/usb/ehci_pdriver.h is also augmented to -take advantage of this new flag. - -Signed-off-by: Florian Fainelli ---- - drivers/usb/host/ehci-hcd.c | 2 +- - drivers/usb/host/ehci-hub.c | 4 ++-- - drivers/usb/host/ehci-platform.c | 1 + - drivers/usb/host/ehci.h | 1 + - include/linux/usb/ehci_pdriver.h | 1 + - 5 files changed, 6 insertions(+), 3 deletions(-) - ---- a/drivers/usb/host/ehci-hcd.c -+++ b/drivers/usb/host/ehci-hcd.c -@@ -638,7 +638,7 @@ static int ehci_run (struct usb_hcd *hcd - "USB %x.%x started, EHCI %x.%02x%s\n", - ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), - temp >> 8, temp & 0xff, -- ignore_oc ? ", overcurrent ignored" : ""); -+ (ignore_oc || ehci->ignore_oc) ? ", overcurrent ignored" : ""); - - ehci_writel(ehci, INTR_MASK, - &ehci->regs->intr_enable); /* Turn On Interrupts */ ---- a/drivers/usb/host/ehci-hub.c -+++ b/drivers/usb/host/ehci-hub.c -@@ -641,7 +641,7 @@ ehci_hub_status_data (struct usb_hcd *hc - * always set, seem to clear PORT_OCC and PORT_CSC when writing to - * PORT_POWER; that's surprising, but maybe within-spec. - */ -- if (!ignore_oc) -+ if (!ignore_oc && !ehci->ignore_oc) - mask = PORT_CSC | PORT_PEC | PORT_OCC; - else - mask = PORT_CSC | PORT_PEC; -@@ -1011,7 +1011,7 @@ int ehci_hub_control( - if (temp & PORT_PEC) - status |= USB_PORT_STAT_C_ENABLE << 16; - -- if ((temp & PORT_OCC) && !ignore_oc){ -+ if ((temp & PORT_OCC) && (!ignore_oc && !ehci->ignore_oc)){ - status |= USB_PORT_STAT_C_OVERCURRENT << 16; - - /* ---- a/drivers/usb/host/ehci-platform.c -+++ b/drivers/usb/host/ehci-platform.c -@@ -321,6 +321,8 @@ static int ehci_platform_probe(struct pl - hcd->has_tt = 1; - if (pdata->reset_on_resume) - priv->reset_on_resume = true; -+ if (pdata->ignore_oc) -+ ehci->ignore_oc = 1; - - #ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO - if (ehci->big_endian_mmio) { ---- a/drivers/usb/host/ehci.h -+++ b/drivers/usb/host/ehci.h -@@ -218,6 +218,7 @@ struct ehci_hcd { /* one per controlle - unsigned frame_index_bug:1; /* MosChip (AKA NetMos) */ - unsigned need_oc_pp_cycle:1; /* MPC834X port power */ - unsigned imx28_write_fix:1; /* For Freescale i.MX28 */ -+ unsigned ignore_oc:1; - - /* required for usb32 quirk */ - #define OHCI_CTRL_HCFS (3 << 6) ---- a/include/linux/usb/ehci_pdriver.h -+++ b/include/linux/usb/ehci_pdriver.h -@@ -50,6 +50,7 @@ struct usb_ehci_pdata { - unsigned no_io_watchdog:1; - unsigned reset_on_resume:1; - unsigned dma_mask_64:1; -+ unsigned ignore_oc:1; - - /* Turn on all power and clocks */ - int (*power_on)(struct platform_device *pdev); diff --git a/target/linux/generic/pending-4.19/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-4.19/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch deleted file mode 100644 index 3467905e65..0000000000 --- a/target/linux/generic/pending-4.19/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch +++ /dev/null @@ -1,82 +0,0 @@ -From: Tobias Wolf -Subject: mm: Fix alloc_node_mem_map with ARCH_PFN_OFFSET calculation - -An rt288x (ralink) based router (Belkin F5D8235 v1) does not boot with any -kernel beyond version 4.3 resulting in: - -BUG: Bad page state in process swapper pfn:086ac - -bisect resulted in: - -a1c34a3bf00af2cede839879502e12dc68491ad5 is the first bad commit -commit a1c34a3bf00af2cede839879502e12dc68491ad5 -Author: Laura Abbott -Date: Thu Nov 5 18:48:46 2015 -0800 - - mm: Don't offset memmap for flatmem - - Srinivas Kandagatla reported bad page messages when trying to remove the - bottom 2MB on an ARM based IFC6410 board - - BUG: Bad page state in process swapper pfn:fffa8 - page:ef7fb500 count:0 mapcount:0 mapping: (null) index:0x0 - flags: 0x96640253(locked|error|dirty|active|arch_1|reclaim|mlocked) - page dumped because: PAGE_FLAGS_CHECK_AT_FREE flag(s) set - bad because of flags: - flags: 0x200041(locked|active|mlocked) - Modules linked in: - CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00007-g412f9ba-dirty -#816 - Hardware name: Qualcomm (Flattened Device Tree) - unwind_backtrace - show_stack - dump_stack - bad_page - free_pages_prepare - free_hot_cold_page - __free_pages - free_highmem_page - mem_init - start_kernel - Disabling lock debugging due to kernel taint - [...] -:040000 040000 2de013c372345fd471cd58f0553c9b38b0ef1cc4 -0a8156f848733dfa21e16c196dfb6c0a76290709 M mm - -This fix for ARM does not account ARCH_PFN_OFFSET for mem_map as later used by -page_to_pfn anymore. - -The following output was generated with two hacked in printk statements: - -printk("before %p vs. %p or %p\n", mem_map, mem_map - offset, mem_map - -(pgdat->node_start_pfn - ARCH_PFN_OFFSET)); - if (page_to_pfn(mem_map) != pgdat->node_start_pfn) - mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET); -printk("after %p\n", mem_map); - -Output: - -[ 0.000000] before 8861b280 vs. 8861b280 or 8851b280 -[ 0.000000] after 8851b280 - -As seen in the first line mem_map with subtraction of offset does not equal the -mem_map after subtraction of ARCH_PFN_OFFSET. - -After adding the offset of ARCH_PFN_OFFSET as well to mem_map as the -previously calculated offset is zero for the named platform it is able to boot -4.4 and 4.9-rc7 again. - -Signed-off-by: Tobias Wolf ---- - ---- a/mm/page_alloc.c -+++ b/mm/page_alloc.c -@@ -6396,7 +6396,7 @@ static void __ref alloc_node_mem_map(str - mem_map = NODE_DATA(0)->node_mem_map; - #if defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP) || defined(CONFIG_FLATMEM) - if (page_to_pfn(mem_map) != pgdat->node_start_pfn) -- mem_map -= offset; -+ mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET); - #endif /* CONFIG_HAVE_MEMBLOCK_NODE_MAP */ - } - #endif diff --git a/target/linux/generic/pending-4.19/130-add-linux-spidev-compatible-si3210.patch b/target/linux/generic/pending-4.19/130-add-linux-spidev-compatible-si3210.patch deleted file mode 100644 index 3a42182c97..0000000000 --- a/target/linux/generic/pending-4.19/130-add-linux-spidev-compatible-si3210.patch +++ /dev/null @@ -1,18 +0,0 @@ -From: Giuseppe Lippolis -Subject: Add the linux,spidev compatible in spidev Several device in ramips have this binding in the dts - -Signed-off-by: Giuseppe Lippolis ---- - drivers/spi/spidev.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/spi/spidev.c -+++ b/drivers/spi/spidev.c -@@ -672,6 +672,7 @@ static const struct of_device_id spidev_ - { .compatible = "lineartechnology,ltc2488" }, - { .compatible = "ge,achc" }, - { .compatible = "semtech,sx1301" }, -+ { .compatible = "siliconlabs,si3210" }, - {}, - }; - MODULE_DEVICE_TABLE(of, spidev_dt_ids); diff --git a/target/linux/generic/pending-4.19/131-spi-use-gpio_set_value_cansleep-for-setting-chipsele.patch b/target/linux/generic/pending-4.19/131-spi-use-gpio_set_value_cansleep-for-setting-chipsele.patch deleted file mode 100644 index bd5ed6f888..0000000000 --- a/target/linux/generic/pending-4.19/131-spi-use-gpio_set_value_cansleep-for-setting-chipsele.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Felix Fietkau -Subject: spi: use gpio_set_value_cansleep for setting chipselect GPIO - -Sleeping is safe inside spi_transfer_one_message, and some GPIO chips -need to sleep for setting values - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/spi/spi.c -+++ b/drivers/spi/spi.c -@@ -733,7 +733,7 @@ static void spi_set_cs(struct spi_device - enable = !enable; - - if (gpio_is_valid(spi->cs_gpio)) { -- gpio_set_value(spi->cs_gpio, !enable); -+ gpio_set_value_cansleep(spi->cs_gpio, !enable); - /* Some SPI masters need both GPIO CS & slave_select */ - if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && - spi->controller->set_cs) diff --git a/target/linux/generic/pending-4.19/132-spi-spi-gpio-fix-crash-when-num-chipselects-is-0.patch b/target/linux/generic/pending-4.19/132-spi-spi-gpio-fix-crash-when-num-chipselects-is-0.patch deleted file mode 100644 index ed94f937c9..0000000000 --- a/target/linux/generic/pending-4.19/132-spi-spi-gpio-fix-crash-when-num-chipselects-is-0.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 0f76408d8c1cb0979f4286dd23912e6e59784b35 Mon Sep 17 00:00:00 2001 -From: DENG Qingfang -Date: Thu, 19 Sep 2019 11:42:55 +0200 -Subject: [PATCH] spi: spi-gpio: fix crash when num-chipselects is 0 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -If an spi-gpio was specified with num-chipselects = <0> in dts, kernel will crash: - -Unable to handle kernel paging request at virtual address 32697073 -pgd = (ptrval) -[32697073] *pgd=00000000 -Internal error: Oops: 5 [# 1] SMP ARM -Modules linked in: -CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.19.72 #0 -Hardware name: Generic DT based system -PC is at validate_desc+0x28/0x80 -LR is at gpiod_direction_output+0x14/0x128 -... -[] (validate_desc) from [] (gpiod_direction_output+0x14/0x128) -[] (gpiod_direction_output) from [] (spi_gpio_setup+0x58/0x64) -[] (spi_gpio_setup) from [] (spi_setup+0x12c/0x148) -[] (spi_setup) from [] (spi_add_device+0xbc/0x12c) -[] (spi_add_device) from [] (spi_register_controller+0x838/0x924) -[] (spi_register_controller) from [] (spi_bitbang_start+0x108/0x120) -[] (spi_bitbang_start) from [] (spi_gpio_probe+0x314/0x338) -[] (spi_gpio_probe) from [] (platform_drv_probe+0x34/0x70) - -The cause is spi_gpio_setup() did not check if the spi-gpio has chipselect pins -before setting their direction and results in derefing an invalid pointer. - -The bug is spotted in kernel 4.19.72 on OpenWrt, and does not occur in 4.14. - -There is a similar fix upstream 249e2632dcd0509b8f8f296f5aabf4d48dfd6da8. - -Ref: https://patchwork.kernel.org/patch/11150619/ -Cc: Linus Walleij -Cc: stable@vger.kernel.org -Signed-off-by: DENG Qingfang -Signed-off-by: Petr Štetiar ---- - drivers/spi/spi-gpio.c | 10 ++++++---- - 1 file changed, 6 insertions(+), 4 deletions(-) - ---- a/drivers/spi/spi-gpio.c -+++ b/drivers/spi/spi-gpio.c -@@ -242,10 +242,12 @@ static int spi_gpio_setup(struct spi_dev - * The CS GPIOs have already been - * initialized from the descriptor lookup. - */ -- cs = spi_gpio->cs_gpios[spi->chip_select]; -- if (!spi->controller_state && cs) -- status = gpiod_direction_output(cs, -- !(spi->mode & SPI_CS_HIGH)); -+ if (spi_gpio->has_cs) { -+ cs = spi_gpio->cs_gpios[spi->chip_select]; -+ if (!spi->controller_state && cs) -+ status = gpiod_direction_output(cs, -+ !(spi->mode & SPI_CS_HIGH)); -+ } - - if (!status) - status = spi_bitbang_setup(spi); diff --git a/target/linux/generic/pending-4.19/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch b/target/linux/generic/pending-4.19/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch deleted file mode 100644 index c97e93250b..0000000000 --- a/target/linux/generic/pending-4.19/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Felix Fietkau -Subject: jffs2: use .rename2 and add RENAME_WHITEOUT support - -It is required for renames on overlayfs - -Signed-off-by: Felix Fietkau ---- - ---- a/fs/jffs2/dir.c -+++ b/fs/jffs2/dir.c -@@ -752,6 +752,24 @@ static int jffs2_mknod (struct inode *di - return ret; - } - -+static int jffs2_whiteout (struct inode *old_dir, struct dentry *old_dentry) -+{ -+ struct dentry *wh; -+ int err; -+ -+ wh = d_alloc(old_dentry->d_parent, &old_dentry->d_name); -+ if (!wh) -+ return -ENOMEM; -+ -+ err = jffs2_mknod(old_dir, wh, S_IFCHR | WHITEOUT_MODE, -+ WHITEOUT_DEV); -+ if (err) -+ return err; -+ -+ d_rehash(wh); -+ return 0; -+} -+ - static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry, - struct inode *new_dir_i, struct dentry *new_dentry, - unsigned int flags) -@@ -762,7 +780,7 @@ static int jffs2_rename (struct inode *o - uint8_t type; - uint32_t now; - -- if (flags & ~RENAME_NOREPLACE) -+ if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT)) - return -EINVAL; - - /* The VFS will check for us and prevent trying to rename a -@@ -828,9 +846,14 @@ static int jffs2_rename (struct inode *o - if (d_is_dir(old_dentry) && !victim_f) - inc_nlink(new_dir_i); - -- /* Unlink the original */ -- ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i), -- old_dentry->d_name.name, old_dentry->d_name.len, NULL, now); -+ if (flags & RENAME_WHITEOUT) -+ /* Replace with whiteout */ -+ ret = jffs2_whiteout(old_dir_i, old_dentry); -+ else -+ /* Unlink the original */ -+ ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i), -+ old_dentry->d_name.name, -+ old_dentry->d_name.len, NULL, now); - - /* We don't touch inode->i_nlink */ - diff --git a/target/linux/generic/pending-4.19/141-jffs2-add-RENAME_EXCHANGE-support.patch b/target/linux/generic/pending-4.19/141-jffs2-add-RENAME_EXCHANGE-support.patch deleted file mode 100644 index 093a73ab66..0000000000 --- a/target/linux/generic/pending-4.19/141-jffs2-add-RENAME_EXCHANGE-support.patch +++ /dev/null @@ -1,73 +0,0 @@ -From: Felix Fietkau -Subject: jffs2: add RENAME_EXCHANGE support - -Signed-off-by: Felix Fietkau ---- - ---- a/fs/jffs2/dir.c -+++ b/fs/jffs2/dir.c -@@ -777,18 +777,31 @@ static int jffs2_rename (struct inode *o - int ret; - struct jffs2_sb_info *c = JFFS2_SB_INFO(old_dir_i->i_sb); - struct jffs2_inode_info *victim_f = NULL; -+ struct inode *fst_inode = d_inode(old_dentry); -+ struct inode *snd_inode = d_inode(new_dentry); - uint8_t type; - uint32_t now; - -- if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT)) -+ if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT|RENAME_EXCHANGE)) - return -EINVAL; - -+ if ((flags & RENAME_EXCHANGE) && (old_dir_i != new_dir_i)) { -+ if (S_ISDIR(fst_inode->i_mode) && !S_ISDIR(snd_inode->i_mode)) { -+ inc_nlink(new_dir_i); -+ drop_nlink(old_dir_i); -+ } -+ else if (!S_ISDIR(fst_inode->i_mode) && S_ISDIR(snd_inode->i_mode)) { -+ drop_nlink(new_dir_i); -+ inc_nlink(old_dir_i); -+ } -+ } -+ - /* The VFS will check for us and prevent trying to rename a - * file over a directory and vice versa, but if it's a directory, - * the VFS can't check whether the victim is empty. The filesystem - * needs to do that for itself. - */ -- if (d_really_is_positive(new_dentry)) { -+ if (d_really_is_positive(new_dentry) && !(flags & RENAME_EXCHANGE)) { - victim_f = JFFS2_INODE_INFO(d_inode(new_dentry)); - if (d_is_dir(new_dentry)) { - struct jffs2_full_dirent *fd; -@@ -823,7 +836,7 @@ static int jffs2_rename (struct inode *o - if (ret) - return ret; - -- if (victim_f) { -+ if (victim_f && !(flags & RENAME_EXCHANGE)) { - /* There was a victim. Kill it off nicely */ - if (d_is_dir(new_dentry)) - clear_nlink(d_inode(new_dentry)); -@@ -849,6 +862,12 @@ static int jffs2_rename (struct inode *o - if (flags & RENAME_WHITEOUT) - /* Replace with whiteout */ - ret = jffs2_whiteout(old_dir_i, old_dentry); -+ else if (flags & RENAME_EXCHANGE) -+ /* Replace the original */ -+ ret = jffs2_do_link(c, JFFS2_INODE_INFO(old_dir_i), -+ d_inode(new_dentry)->i_ino, type, -+ old_dentry->d_name.name, old_dentry->d_name.len, -+ now); - else - /* Unlink the original */ - ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i), -@@ -880,7 +899,7 @@ static int jffs2_rename (struct inode *o - return ret; - } - -- if (d_is_dir(old_dentry)) -+ if (d_is_dir(old_dentry) && !(flags & RENAME_EXCHANGE)) - drop_nlink(old_dir_i); - - new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now); diff --git a/target/linux/generic/pending-4.19/150-bridge_allow_receiption_on_disabled_port.patch b/target/linux/generic/pending-4.19/150-bridge_allow_receiption_on_disabled_port.patch deleted file mode 100644 index 583c34a448..0000000000 --- a/target/linux/generic/pending-4.19/150-bridge_allow_receiption_on_disabled_port.patch +++ /dev/null @@ -1,45 +0,0 @@ -From: Stephen Hemminger -Subject: bridge: allow receiption on disabled port - -When an ethernet device is enslaved to a bridge, and the bridge STP -detects loss of carrier (or operational state down), then normally -packet receiption is blocked. - -This breaks control applications like WPA which maybe expecting to -receive packets to negotiate to bring link up. The bridge needs to -block forwarding packets from these disabled ports, but there is no -hard requirement to not allow local packet delivery. - -Signed-off-by: Stephen Hemminger -Signed-off-by: Felix Fietkau - ---- a/net/bridge/br_input.c -+++ b/net/bridge/br_input.c -@@ -193,6 +193,9 @@ static void __br_handle_local_finish(str - /* note: already called with rcu_read_lock */ - static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb) - { -+ struct net_bridge_port *p = br_port_get_rcu(skb->dev); -+ -+ if (p->state != BR_STATE_DISABLED) - __br_handle_local_finish(skb); - - /* return 1 to signal the okfn() was called so it's ok to use the skb */ -@@ -289,6 +292,17 @@ rx_handler_result_t br_handle_frame(stru - - forward: - switch (p->state) { -+ case BR_STATE_DISABLED: -+ if (ether_addr_equal(p->br->dev->dev_addr, dest)) -+ skb->pkt_type = PACKET_HOST; -+ -+ if (NF_HOOK(NFPROTO_BRIDGE, NF_BR_PRE_ROUTING, -+ dev_net(skb->dev), NULL, skb, skb->dev, NULL, -+ br_handle_local_finish) == 1) { -+ return RX_HANDLER_PASS; -+ } -+ break; -+ - case BR_STATE_FORWARDING: - rhook = rcu_dereference(br_should_route_hook); - if (rhook) { diff --git a/target/linux/generic/pending-4.19/180-net-phy-at803x-add-support-for-AT8032.patch b/target/linux/generic/pending-4.19/180-net-phy-at803x-add-support-for-AT8032.patch deleted file mode 100644 index e496301e4e..0000000000 --- a/target/linux/generic/pending-4.19/180-net-phy-at803x-add-support-for-AT8032.patch +++ /dev/null @@ -1,63 +0,0 @@ -From: Felix Fietkau -Subject: net: phy: at803x: add support for AT8032 - -Like AT8030, this PHY needs the GPIO reset workaround - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -62,8 +62,10 @@ - - #define ATH8030_PHY_ID 0x004dd076 - #define ATH8031_PHY_ID 0x004dd074 -+#define ATH8032_PHY_ID 0x004dd023 - #define ATH8035_PHY_ID 0x004dd072 - #define AT803X_PHY_ID_MASK 0xffffffef -+#define AT8032_PHY_ID_MASK 0xffffffff - - MODULE_DESCRIPTION("Atheros 803x PHY driver"); - MODULE_AUTHOR("Matus Ujhelyi"); -@@ -308,7 +310,7 @@ static void at803x_link_change_notify(st - struct at803x_priv *priv = phydev->priv; - - /* -- * Conduct a hardware reset for AT8030 every time a link loss is -+ * Conduct a hardware reset for AT8030/2 every time a link loss is - * signalled. This is necessary to circumvent a hardware bug that - * occurs when the cable is unplugged while TX packets are pending - * in the FIFO. In such cases, the FIFO enters an error mode it -@@ -414,6 +416,24 @@ static struct phy_driver at803x_driver[] - .aneg_done = at803x_aneg_done, - .ack_interrupt = &at803x_ack_interrupt, - .config_intr = &at803x_config_intr, -+}, { -+ /* ATHEROS 8032 */ -+ .phy_id = ATH8032_PHY_ID, -+ .name = "Atheros 8032 ethernet", -+ .phy_id_mask = AT8032_PHY_ID_MASK, -+ .probe = at803x_probe, -+ .config_init = at803x_config_init, -+ .link_change_notify = at803x_link_change_notify, -+ .set_wol = at803x_set_wol, -+ .get_wol = at803x_get_wol, -+ .suspend = at803x_suspend, -+ .resume = at803x_resume, -+ .features = PHY_BASIC_FEATURES, -+ .flags = PHY_HAS_INTERRUPT, -+ .config_aneg = genphy_config_aneg, -+ .read_status = genphy_read_status, -+ .ack_interrupt = at803x_ack_interrupt, -+ .config_intr = at803x_config_intr, - } }; - - module_phy_driver(at803x_driver); -@@ -421,6 +441,7 @@ module_phy_driver(at803x_driver); - static struct mdio_device_id __maybe_unused atheros_tbl[] = { - { ATH8030_PHY_ID, AT803X_PHY_ID_MASK }, - { ATH8031_PHY_ID, AT803X_PHY_ID_MASK }, -+ { ATH8032_PHY_ID, AT8032_PHY_ID_MASK }, - { ATH8035_PHY_ID, AT803X_PHY_ID_MASK }, - { } - }; diff --git a/target/linux/generic/pending-4.19/201-extra_optimization.patch b/target/linux/generic/pending-4.19/201-extra_optimization.patch deleted file mode 100644 index e056598047..0000000000 --- a/target/linux/generic/pending-4.19/201-extra_optimization.patch +++ /dev/null @@ -1,28 +0,0 @@ -From: Felix Fietkau -Subject: Upgrade to Linux 2.6.19 - -- Includes large parts of the patch from #1021 by dpalffy -- Includes RB532 NAND driver changes by n0-1 - -[john@phrozen.org: feix will add this to his upstream queue] - -lede-commit: bff468813f78f81e36ebb2a3f4354de7365e640f -Signed-off-by: Felix Fietkau ---- - Makefile | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/Makefile -+++ b/Makefile -@@ -653,9 +653,9 @@ KBUILD_CFLAGS += $(call cc-disable-warni - KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member) - - ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE --KBUILD_CFLAGS += -Os -+KBUILD_CFLAGS += -Os $(EXTRA_OPTIMIZATION) - else --KBUILD_CFLAGS += -O2 -+KBUILD_CFLAGS += -O2 -fno-reorder-blocks -fno-tree-ch $(EXTRA_OPTIMIZATION) - endif - - # Tell gcc to never replace conditional load with a non-conditional one diff --git a/target/linux/generic/pending-4.19/203-kallsyms_uncompressed.patch b/target/linux/generic/pending-4.19/203-kallsyms_uncompressed.patch deleted file mode 100644 index 9230279fca..0000000000 --- a/target/linux/generic/pending-4.19/203-kallsyms_uncompressed.patch +++ /dev/null @@ -1,119 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add a config option for keeping the kallsyms table uncompressed, saving ~9kb kernel size after lzma on ar71xx - -[john@phrozen.org: added to my upstream queue 30.12.2016] -lede-commit: e0e3509b5ce2ccf93d4d67ea907613f5f7ec2eed -Signed-off-by: Felix Fietkau ---- - init/Kconfig | 11 +++++++++++ - kernel/kallsyms.c | 8 ++++++++ - scripts/kallsyms.c | 12 ++++++++++++ - scripts/link-vmlinux.sh | 4 ++++ - 4 files changed, 35 insertions(+) - ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1149,6 +1149,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW - the unaligned access emulation. - see arch/parisc/kernel/unaligned.c for reference - -+config KALLSYMS_UNCOMPRESSED -+ bool "Keep kallsyms uncompressed" -+ depends on KALLSYMS -+ help -+ Normally kallsyms contains compressed symbols (using a token table), -+ reducing the uncompressed kernel image size. Keeping the symbol table -+ uncompressed significantly improves the size of this part in compressed -+ kernel images. -+ -+ Say N unless you need compressed kernel images to be small. -+ - config HAVE_PCSPKR_PLATFORM - bool - ---- a/kernel/kallsyms.c -+++ b/kernel/kallsyms.c -@@ -74,6 +74,11 @@ static unsigned int kallsyms_expand_symb - * For every byte on the compressed symbol data, copy the table - * entry for that byte. - */ -+#ifdef CONFIG_KALLSYMS_UNCOMPRESSED -+ memcpy(result, data + 1, len - 1); -+ result += len - 1; -+ len = 0; -+#endif - while (len) { - tptr = &kallsyms_token_table[kallsyms_token_index[*data]]; - data++; -@@ -106,6 +111,9 @@ tail: - */ - static char kallsyms_get_symbol_type(unsigned int off) - { -+#ifdef CONFIG_KALLSYMS_UNCOMPRESSED -+ return kallsyms_names[off + 1]; -+#endif - /* - * Get just the first code, look it up in the token table, - * and return the first char from this token. ---- a/scripts/kallsyms.c -+++ b/scripts/kallsyms.c -@@ -61,6 +61,7 @@ static struct addr_range percpu_range = - static struct sym_entry *table; - static unsigned int table_size, table_cnt; - static int all_symbols = 0; -+static int uncompressed = 0; - static int absolute_percpu = 0; - static int base_relative = 0; - -@@ -442,6 +443,9 @@ static void write_src(void) - - free(markers); - -+ if (uncompressed) -+ return; -+ - output_label("kallsyms_token_table"); - off = 0; - for (i = 0; i < 256; i++) { -@@ -502,6 +506,9 @@ static void *find_token(unsigned char *s - { - int i; - -+ if (uncompressed) -+ return NULL; -+ - for (i = 0; i < len - 1; i++) { - if (str[i] == token[0] && str[i+1] == token[1]) - return &str[i]; -@@ -574,6 +581,9 @@ static void optimize_result(void) - { - int i, best; - -+ if (uncompressed) -+ return; -+ - /* using the '\0' symbol last allows compress_symbols to use standard - * fast string functions */ - for (i = 255; i >= 0; i--) { -@@ -756,6 +766,8 @@ int main(int argc, char **argv) - absolute_percpu = 1; - else if (strcmp(argv[i], "--base-relative") == 0) - base_relative = 1; -+ else if (strcmp(argv[i], "--uncompressed") == 0) -+ uncompressed = 1; - else - usage(); - } ---- a/scripts/link-vmlinux.sh -+++ b/scripts/link-vmlinux.sh -@@ -133,6 +133,10 @@ kallsyms() - kallsymopt="${kallsymopt} --base-relative" - fi - -+ if [ -n "${CONFIG_KALLSYMS_UNCOMPRESSED}" ]; then -+ kallsymopt="${kallsymopt} --uncompressed" -+ fi -+ - local aflags="${KBUILD_AFLAGS} ${KBUILD_AFLAGS_KERNEL} \ - ${NOSTDINC_FLAGS} ${LINUXINCLUDE} ${KBUILD_CPPFLAGS}" - diff --git a/target/linux/generic/pending-4.19/205-backtrace_module_info.patch b/target/linux/generic/pending-4.19/205-backtrace_module_info.patch deleted file mode 100644 index 5671173d45..0000000000 --- a/target/linux/generic/pending-4.19/205-backtrace_module_info.patch +++ /dev/null @@ -1,45 +0,0 @@ -From: Felix Fietkau -Subject: kernel: when KALLSYMS is disabled, print module address + size for matching backtrace entries - -[john@phrozen.org: felix will add this to his upstream queue] - -lede-commit 53827cdc824556cda910b23ce5030c363b8f1461 -Signed-off-by: Felix Fietkau ---- - lib/vsprintf.c | 15 +++++++++++---- - 1 file changed, 11 insertions(+), 4 deletions(-) - ---- a/lib/vsprintf.c -+++ b/lib/vsprintf.c -@@ -681,8 +681,10 @@ char *symbol_string(char *buf, char *end - struct printf_spec spec, const char *fmt) - { - unsigned long value; --#ifdef CONFIG_KALLSYMS - char sym[KSYM_SYMBOL_LEN]; -+#ifndef CONFIG_KALLSYMS -+ struct module *mod; -+ int len; - #endif - - if (fmt[1] == 'R') -@@ -696,11 +698,16 @@ char *symbol_string(char *buf, char *end - sprint_symbol(sym, value); - else - sprint_symbol_no_offset(sym, value); -- -- return string(buf, end, sym, spec); - #else -- return special_hex_number(buf, end, value, sizeof(void *)); -+ len = snprintf(sym, sizeof(sym), "0x%lx", value); -+ -+ mod = __module_address(value); -+ if (mod) -+ snprintf(sym + len, sizeof(sym) - len, " [%s@%p+0x%x]", -+ mod->name, mod->core_layout.base, -+ mod->core_layout.size); - #endif -+ return string(buf, end, sym, spec); - } - - static const struct printf_spec default_str_spec = { diff --git a/target/linux/generic/pending-4.19/220-optimize_inlining.patch b/target/linux/generic/pending-4.19/220-optimize_inlining.patch deleted file mode 100644 index ae032709d2..0000000000 --- a/target/linux/generic/pending-4.19/220-optimize_inlining.patch +++ /dev/null @@ -1,225 +0,0 @@ ---- a/arch/arm/kernel/atags.h -+++ b/arch/arm/kernel/atags.h -@@ -5,7 +5,7 @@ void convert_to_tag_list(struct tag *tag - const struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer, - unsigned int machine_nr); - #else --static inline const struct machine_desc * -+static inline const struct machine_desc * __init __noreturn - setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr) - { - early_print("no ATAGS support: can't continue\n"); ---- a/arch/arm64/include/asm/cpufeature.h -+++ b/arch/arm64/include/asm/cpufeature.h -@@ -366,7 +366,7 @@ static inline bool cpu_have_feature(unsi - } - - /* System capability check for constant caps */ --static inline bool __cpus_have_const_cap(int num) -+static __always_inline bool __cpus_have_const_cap(int num) - { - if (num >= ARM64_NCAPS) - return false; -@@ -380,7 +380,7 @@ static inline bool cpus_have_cap(unsigne - return test_bit(num, cpu_hwcaps); - } - --static inline bool cpus_have_const_cap(int num) -+static __always_inline bool cpus_have_const_cap(int num) - { - if (static_branch_likely(&arm64_const_caps_ready)) - return __cpus_have_const_cap(num); ---- a/arch/mips/include/asm/bitops.h -+++ b/arch/mips/include/asm/bitops.h -@@ -463,7 +463,7 @@ static inline void __clear_bit_unlock(un - * Return the bit position (0..63) of the most significant 1 bit in a word - * Returns -1 if no 1 bit exists - */ --static inline unsigned long __fls(unsigned long word) -+static __always_inline unsigned long __fls(unsigned long word) - { - int num; - -@@ -529,7 +529,7 @@ static inline unsigned long __fls(unsign - * Returns 0..SZLONG-1 - * Undefined if no bit exists, so code should check against 0 first. - */ --static inline unsigned long __ffs(unsigned long word) -+static __always_inline unsigned long __ffs(unsigned long word) - { - return __fls(word & -word); - } ---- a/arch/mips/kernel/cpu-bugs64.c -+++ b/arch/mips/kernel/cpu-bugs64.c -@@ -42,8 +42,8 @@ static inline void align_mod(const int a - : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod)); - } - --static inline void mult_sh_align_mod(long *v1, long *v2, long *w, -- const int align, const int mod) -+static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w, -+ const int align, const int mod) - { - unsigned long flags; - int m1, m2; ---- a/arch/powerpc/kernel/prom_init.c -+++ b/arch/powerpc/kernel/prom_init.c -@@ -498,14 +498,14 @@ static int __init prom_next_node(phandle - } - } - --static inline int prom_getprop(phandle node, const char *pname, -- void *value, size_t valuelen) -+static inline int __init prom_getprop(phandle node, const char *pname, -+ void *value, size_t valuelen) - { - return call_prom("getprop", 4, 1, node, ADDR(pname), - (u32)(unsigned long) value, (u32) valuelen); - } - --static inline int prom_getproplen(phandle node, const char *pname) -+static inline int __init prom_getproplen(phandle node, const char *pname) - { - return call_prom("getproplen", 2, 1, node, ADDR(pname)); - } ---- a/arch/powerpc/mm/tlb-radix.c -+++ b/arch/powerpc/mm/tlb-radix.c -@@ -90,8 +90,8 @@ void radix__tlbiel_all(unsigned int acti - asm volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory"); - } - --static inline void __tlbiel_pid(unsigned long pid, int set, -- unsigned long ric) -+static __always_inline void __tlbiel_pid(unsigned long pid, int set, -+ unsigned long ric) - { - unsigned long rb,rs,prs,r; - -@@ -106,7 +106,7 @@ static inline void __tlbiel_pid(unsigned - trace_tlbie(0, 1, rb, rs, ric, prs, r); - } - --static inline void __tlbie_pid(unsigned long pid, unsigned long ric) -+static __always_inline void __tlbie_pid(unsigned long pid, unsigned long ric) - { - unsigned long rb,rs,prs,r; - -@@ -136,7 +136,7 @@ static inline void __tlbiel_lpid(unsigne - trace_tlbie(lpid, 1, rb, rs, ric, prs, r); - } - --static inline void __tlbie_lpid(unsigned long lpid, unsigned long ric) -+static __always_inline void __tlbie_lpid(unsigned long lpid, unsigned long ric) - { - unsigned long rb,rs,prs,r; - -@@ -300,7 +300,7 @@ static inline void fixup_tlbie_lpid(unsi - /* - * We use 128 set in radix mode and 256 set in hpt mode. - */ --static inline void _tlbiel_pid(unsigned long pid, unsigned long ric) -+static __always_inline void _tlbiel_pid(unsigned long pid, unsigned long ric) - { - int set; - -@@ -983,7 +983,7 @@ void radix__tlb_flush(struct mmu_gather - tlb->need_flush_all = 0; - } - --static inline void __radix__flush_tlb_range_psize(struct mm_struct *mm, -+static __always_inline void __radix__flush_tlb_range_psize(struct mm_struct *mm, - unsigned long start, unsigned long end, - int psize, bool also_pwc) - { ---- a/arch/s390/include/asm/cpacf.h -+++ b/arch/s390/include/asm/cpacf.h -@@ -202,7 +202,7 @@ static inline int __cpacf_check_opcode(u - } - } - --static inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask) -+static __always_inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask) - { - if (__cpacf_check_opcode(opcode)) { - __cpacf_query(opcode, mask); ---- a/arch/x86/Kconfig.debug -+++ b/arch/x86/Kconfig.debug -@@ -276,20 +276,6 @@ config CPA_DEBUG - ---help--- - Do change_page_attr() self-tests every 30 seconds. - --config OPTIMIZE_INLINING -- bool "Allow gcc to uninline functions marked 'inline'" -- ---help--- -- This option determines if the kernel forces gcc to inline the functions -- developers have marked 'inline'. Doing so takes away freedom from gcc to -- do what it thinks is best, which is desirable for the gcc 3.x series of -- compilers. The gcc 4.x series have a rewritten inlining algorithm and -- enabling this option will generate a smaller kernel there. Hopefully -- this algorithm is so good that allowing gcc 4.x and above to make the -- decision will become the default in the future. Until then this option -- is there to test gcc for this. -- -- If unsure, say N. -- - config DEBUG_ENTRY - bool "Debug low-level entry code" - depends on DEBUG_KERNEL ---- a/drivers/mtd/nand/raw/vf610_nfc.c -+++ b/drivers/mtd/nand/raw/vf610_nfc.c -@@ -373,7 +373,7 @@ static int vf610_nfc_cmd(struct nand_chi - { - const struct nand_op_instr *instr; - struct vf610_nfc *nfc = chip_to_nfc(chip); -- int op_id = -1, trfr_sz = 0, offset; -+ int op_id = -1, trfr_sz = 0, offset = 0; - u32 col = 0, row = 0, cmd1 = 0, cmd2 = 0, code = 0; - bool force8bit = false; - ---- a/lib/Kconfig.debug -+++ b/lib/Kconfig.debug -@@ -309,6 +309,20 @@ config HEADERS_CHECK - exported to $(INSTALL_HDR_PATH) (usually 'usr/include' in - your build tree), to make sure they're suitable. - -+config OPTIMIZE_INLINING -+ bool "Allow compiler to uninline functions marked 'inline'" -+ help -+ This option determines if the kernel forces gcc to inline the functions -+ developers have marked 'inline'. Doing so takes away freedom from gcc to -+ do what it thinks is best, which is desirable for the gcc 3.x series of -+ compilers. The gcc 4.x series have a rewritten inlining algorithm and -+ enabling this option will generate a smaller kernel there. Hopefully -+ this algorithm is so good that allowing gcc 4.x and above to make the -+ decision will become the default in the future. Until then this option -+ is there to test gcc for this. -+ -+ If unsure, say N. -+ - config DEBUG_SECTION_MISMATCH - bool "Enable full Section mismatch analysis" - help ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -306,9 +306,6 @@ config ZONE_DMA32 - config AUDIT_ARCH - def_bool y if X86_64 - --config ARCH_SUPPORTS_OPTIMIZED_INLINING -- def_bool y -- - config ARCH_SUPPORTS_DEBUG_PAGEALLOC - def_bool y - ---- a/include/linux/compiler_types.h -+++ b/include/linux/compiler_types.h -@@ -268,8 +268,7 @@ struct ftrace_likely_data { - * of extern inline functions at link time. - * A lot of inline functions can cause havoc with function tracing. - */ --#if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \ -- !defined(CONFIG_OPTIMIZE_INLINING) -+#if !defined(CONFIG_OPTIMIZE_INLINING) - #define inline \ - inline __attribute__((always_inline, unused)) notrace __gnu_inline - #else diff --git a/target/linux/generic/pending-4.19/240-remove-unsane-filenames-from-deps_initramfs-list.patch b/target/linux/generic/pending-4.19/240-remove-unsane-filenames-from-deps_initramfs-list.patch deleted file mode 100644 index c0dfe49c9b..0000000000 --- a/target/linux/generic/pending-4.19/240-remove-unsane-filenames-from-deps_initramfs-list.patch +++ /dev/null @@ -1,46 +0,0 @@ -From: Gabor Juhos -Subject: usr: sanitize deps_initramfs list - -If any filename in the intramfs dependency -list contains a colon, that causes a kernel -build error like this: - -/devel/openwrt/build_dir/linux-ar71xx_generic/linux-3.6.6/usr/Makefile:58: *** multiple target patterns. Stop. -make[5]: *** [usr] Error 2 - -Fix it by removing such filenames from the -deps_initramfs list. - -Signed-off-by: Gabor Juhos ---- - usr/Makefile | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - ---- a/usr/Makefile -+++ b/usr/Makefile -@@ -42,20 +42,22 @@ ifneq ($(wildcard $(obj)/$(datafile_d_y) - include $(obj)/$(datafile_d_y) - endif - -+deps_initramfs_sane := $(foreach v,$(deps_initramfs),$(if $(findstring :,$(v)),,$(v))) -+ - quiet_cmd_initfs = GEN $@ - cmd_initfs = $(initramfs) -o $@ $(ramfs-args) $(ramfs-input) - - targets := $(datafile_y) - - # do not try to update files included in initramfs --$(deps_initramfs): ; -+$(deps_initramfs_sane): ; - --$(deps_initramfs): klibcdirs -+$(deps_initramfs_sane): klibcdirs - # We rebuild initramfs_data.cpio if: - # 1) Any included file is newer then initramfs_data.cpio - # 2) There are changes in which files are included (added or deleted) - # 3) If gen_init_cpio are newer than initramfs_data.cpio - # 4) arguments to gen_initramfs.sh changes --$(obj)/$(datafile_y): $(obj)/gen_init_cpio $(deps_initramfs) klibcdirs -+$(obj)/$(datafile_y): $(obj)/gen_init_cpio $(deps_initramfs_sane) klibcdirs - $(Q)$(initramfs) -l $(ramfs-input) > $(obj)/$(datafile_d_y) - $(call if_changed,initfs) diff --git a/target/linux/generic/pending-4.19/261-enable_wilink_platform_without_drivers.patch b/target/linux/generic/pending-4.19/261-enable_wilink_platform_without_drivers.patch deleted file mode 100644 index 9955ab3c0b..0000000000 --- a/target/linux/generic/pending-4.19/261-enable_wilink_platform_without_drivers.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Imre Kaloz -Subject: [PATCH] hack: net: wireless: make the wl12xx glue code available with - compat-wireless, too - -Signed-off-by: Imre Kaloz ---- - drivers/net/wireless/ti/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/ti/Kconfig -+++ b/drivers/net/wireless/ti/Kconfig -@@ -19,7 +19,7 @@ source "drivers/net/wireless/ti/wlcore/K - - config WILINK_PLATFORM_DATA - bool "TI WiLink platform data" -- depends on WLCORE_SDIO || WL1251_SDIO -+ depends on WLCORE_SDIO || WL1251_SDIO || ARCH_OMAP2PLUS - default y - ---help--- - Small platform data bit needed to pass data to the sdio modules. diff --git a/target/linux/generic/pending-4.19/270-platform-mikrotik-build-bits.patch b/target/linux/generic/pending-4.19/270-platform-mikrotik-build-bits.patch deleted file mode 100644 index c8c19f38a6..0000000000 --- a/target/linux/generic/pending-4.19/270-platform-mikrotik-build-bits.patch +++ /dev/null @@ -1,31 +0,0 @@ -From c2deb5ef01a0ef09088832744cbace9e239a6ee0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= -Date: Sat, 28 Mar 2020 12:11:50 +0100 -Subject: [PATCH] generic: platform/mikrotik build bits (4.19) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch adds platform/mikrotik kernel build bits - -Signed-off-by: Thibaut VARÈNE ---- - drivers/platform/Kconfig | 2 ++ - drivers/platform/Makefile | 1 + - 2 files changed, 3 insertions(+) - ---- a/drivers/platform/Kconfig -+++ b/drivers/platform/Kconfig -@@ -10,3 +10,5 @@ source "drivers/platform/goldfish/Kconfi - source "drivers/platform/chrome/Kconfig" - - source "drivers/platform/mellanox/Kconfig" -+ -+source "drivers/platform/mikrotik/Kconfig" ---- a/drivers/platform/Makefile -+++ b/drivers/platform/Makefile -@@ -9,3 +9,4 @@ obj-$(CONFIG_MIPS) += mips/ - obj-$(CONFIG_OLPC) += olpc/ - obj-$(CONFIG_GOLDFISH) += goldfish/ - obj-$(CONFIG_CHROME_PLATFORMS) += chrome/ -+obj-$(CONFIG_MIKROTIK) += mikrotik/ diff --git a/target/linux/generic/pending-4.19/300-mips_expose_boot_raw.patch b/target/linux/generic/pending-4.19/300-mips_expose_boot_raw.patch deleted file mode 100644 index e19cec1400..0000000000 --- a/target/linux/generic/pending-4.19/300-mips_expose_boot_raw.patch +++ /dev/null @@ -1,40 +0,0 @@ -From: Mark Miller -Subject: mips: expose CONFIG_BOOT_RAW - -This exposes the CONFIG_BOOT_RAW symbol in Kconfig. This is needed on -certain Broadcom chipsets running CFE in order to load the kernel. - -Signed-off-by: Mark Miller -Acked-by: Rob Landley ---- ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -1063,9 +1063,6 @@ config FW_ARC - config ARCH_MAY_HAVE_PC_FDC - bool - --config BOOT_RAW -- bool -- - config CEVT_BCM1480 - bool - -@@ -2969,6 +2966,18 @@ choice - bool "Extend builtin kernel arguments with bootloader arguments" - endchoice - -+config BOOT_RAW -+ bool "Enable the kernel to be executed from the load address" -+ default n -+ help -+ Allow the kernel to be executed from the load address for -+ bootloaders which cannot read the ELF format. This places -+ a jump to start_kernel at the load address. -+ -+ If unsure, say N. -+ -+ -+ - endmenu - - config LOCKDEP_SUPPORT diff --git a/target/linux/generic/pending-4.19/302-mips_no_branch_likely.patch b/target/linux/generic/pending-4.19/302-mips_no_branch_likely.patch deleted file mode 100644 index 6192c417d3..0000000000 --- a/target/linux/generic/pending-4.19/302-mips_no_branch_likely.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: mips: use -mno-branch-likely for kernel and userspace - -saves ~11k kernel size after lzma and ~12k squashfs size in the - -lede-commit: 41a039f46450ffae9483d6216422098669da2900 -Signed-off-by: Felix Fietkau ---- - arch/mips/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -91,7 +91,7 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin - # machines may also. Since BFD is incredibly buggy with respect to - # crossformat linking we rely on the elf2ecoff tool for format conversion. - # --cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -+cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely - cflags-y += -msoft-float - LDFLAGS_vmlinux += -G 0 -static -n -nostdlib - KBUILD_AFLAGS_MODULE += -mlong-calls diff --git a/target/linux/generic/pending-4.19/304-mips_disable_fpu.patch b/target/linux/generic/pending-4.19/304-mips_disable_fpu.patch deleted file mode 100644 index 26bc5e80cd..0000000000 --- a/target/linux/generic/pending-4.19/304-mips_disable_fpu.patch +++ /dev/null @@ -1,137 +0,0 @@ -From: Manuel Lauss -Subject: [RFC PATCH v4 2/2] MIPS: make FPU emulator optional - -This small patch makes the MIPS FPU emulator optional. The kernel -kills float-users on systems without a hardware FPU by sending a SIGILL. - -Disabling the emulator shrinks vmlinux by about 54kBytes (32bit, -optimizing for size). - -Signed-off-by: Manuel Lauss ---- -v4: rediffed because of patch 1/2, should now work with micromips as well -v3: updated patch description with size savings. -v2: incorporated changes suggested by Jonas Gorski - force the fpu emulator on for micromips: relocating the parts - of the mmips code in the emulator to other areas would be a - much larger change; I went the cheap route instead with this. - - arch/mips/Kbuild | 2 +- - arch/mips/Kconfig | 14 ++++++++++++++ - arch/mips/include/asm/fpu.h | 5 +++-- - arch/mips/include/asm/fpu_emulator.h | 15 +++++++++++++++ - 4 files changed, 33 insertions(+), 3 deletions(-) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -2893,6 +2893,20 @@ config MIPS_O32_FP64_SUPPORT - - If unsure, say N. - -+config MIPS_FPU_EMULATOR -+ bool "MIPS FPU Emulator" -+ default y -+ help -+ This option lets you disable the built-in MIPS FPU (Coprocessor 1) -+ emulator, which handles floating-point instructions on processors -+ without a hardware FPU. It is generally a good idea to keep the -+ emulator built-in, unless you are perfectly sure you have a -+ complete soft-float environment. With the emulator disabled, all -+ users of float operations will be killed with an illegal instr- -+ uction exception. -+ -+ Say Y, please. -+ - config USE_OF - bool - select OF ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -334,7 +334,7 @@ OBJCOPYFLAGS += --remove-section=.regin - head-y := arch/mips/kernel/head.o - - libs-y += arch/mips/lib/ --libs-y += arch/mips/math-emu/ -+libs-$(CONFIG_MIPS_FPU_EMULATOR) += arch/mips/math-emu/ - - # See arch/mips/Kbuild for content of core part of the kernel - core-y += arch/mips/ ---- a/arch/mips/include/asm/fpu.h -+++ b/arch/mips/include/asm/fpu.h -@@ -230,8 +230,10 @@ static inline int init_fpu(void) - /* Restore FRE */ - write_c0_config5(config5); - enable_fpu_hazard(); -- } else -+ } else if (IS_ENABLED(CONFIG_MIPS_FPU_EMULATOR)) - fpu_emulator_init_fpu(); -+ else -+ ret = SIGILL; - - return ret; - } ---- a/arch/mips/include/asm/fpu_emulator.h -+++ b/arch/mips/include/asm/fpu_emulator.h -@@ -30,6 +30,7 @@ - #include - #include - -+#ifdef CONFIG_MIPS_FPU_EMULATOR - #ifdef CONFIG_DEBUG_FS - - struct mips_fpu_emulator_stats { -@@ -179,6 +180,16 @@ do { \ - extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, - struct mips_fpu_struct *ctx, int has_fpu, - void __user **fault_addr); -+#else /* no CONFIG_MIPS_FPU_EMULATOR */ -+static inline int fpu_emulator_cop1Handler(struct pt_regs *xcp, -+ struct mips_fpu_struct *ctx, int has_fpu, -+ void __user **fault_addr) -+{ -+ *fault_addr = NULL; -+ return SIGILL; /* we don't speak MIPS FPU */ -+} -+#endif /* CONFIG_MIPS_FPU_EMULATOR */ -+ - void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr, - struct task_struct *tsk); - int process_fpemu_return(int sig, void __user *fault_addr, ---- a/arch/mips/include/asm/dsemul.h -+++ b/arch/mips/include/asm/dsemul.h -@@ -41,6 +41,7 @@ struct task_struct; - extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, - unsigned long branch_pc, unsigned long cont_pc); - -+#ifdef CONFIG_MIPS_FPU_EMULATOR - /** - * do_dsemulret() - Return from a delay slot 'emulation' frame - * @xcp: User thread register context. -@@ -88,5 +89,27 @@ extern bool dsemul_thread_rollback(struc - * before @mm is freed in order to avoid memory leaks. - */ - extern void dsemul_mm_cleanup(struct mm_struct *mm); -+#else -+static inline bool do_dsemulret(struct pt_regs *xcp) -+{ -+ return false; -+} -+ -+static inline bool dsemul_thread_cleanup(struct task_struct *tsk) -+{ -+ return false; -+} -+ -+static inline bool dsemul_thread_rollback(struct pt_regs *regs) -+{ -+ return false; -+} -+ -+static inline void dsemul_mm_cleanup(struct mm_struct *mm) -+{ -+ -+} -+ -+#endif - - #endif /* __MIPS_ASM_DSEMUL_H__ */ diff --git a/target/linux/generic/pending-4.19/305-mips_module_reloc.patch b/target/linux/generic/pending-4.19/305-mips_module_reloc.patch deleted file mode 100644 index a8e4e78c91..0000000000 --- a/target/linux/generic/pending-4.19/305-mips_module_reloc.patch +++ /dev/null @@ -1,371 +0,0 @@ -From: Felix Fietkau -Subject: mips: replace -mlong-calls with -mno-long-calls to make function calls faster in kernel modules to achieve this, try to - -lede-commit: 3b3d64743ba2a874df9d70cd19e242205b0a788c -Signed-off-by: Felix Fietkau ---- - arch/mips/Makefile | 5 + - arch/mips/include/asm/module.h | 5 + - arch/mips/kernel/module.c | 279 ++++++++++++++++++++++++++++++++++++++++- - 3 files changed, 284 insertions(+), 5 deletions(-) - ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -94,8 +94,18 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin - cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely - cflags-y += -msoft-float - LDFLAGS_vmlinux += -G 0 -static -n -nostdlib -+ifdef CONFIG_64BIT - KBUILD_AFLAGS_MODULE += -mlong-calls - KBUILD_CFLAGS_MODULE += -mlong-calls -+else -+ ifdef CONFIG_DYNAMIC_FTRACE -+ KBUILD_AFLAGS_MODULE += -mlong-calls -+ KBUILD_CFLAGS_MODULE += -mlong-calls -+ else -+ KBUILD_AFLAGS_MODULE += -mno-long-calls -+ KBUILD_CFLAGS_MODULE += -mno-long-calls -+ endif -+endif - - ifeq ($(CONFIG_RELOCATABLE),y) - LDFLAGS_vmlinux += --emit-relocs ---- a/arch/mips/include/asm/module.h -+++ b/arch/mips/include/asm/module.h -@@ -12,6 +12,11 @@ struct mod_arch_specific { - const struct exception_table_entry *dbe_start; - const struct exception_table_entry *dbe_end; - struct mips_hi16 *r_mips_hi16_list; -+ -+ void *phys_plt_tbl; -+ void *virt_plt_tbl; -+ unsigned int phys_plt_offset; -+ unsigned int virt_plt_offset; - }; - - typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ ---- a/arch/mips/kernel/module.c -+++ b/arch/mips/kernel/module.c -@@ -44,14 +44,221 @@ struct mips_hi16 { - static LIST_HEAD(dbe_list); - static DEFINE_SPINLOCK(dbe_lock); - --#ifdef MODULE_START -+/* -+ * Get the potential max trampolines size required of the init and -+ * non-init sections. Only used if we cannot find enough contiguous -+ * physically mapped memory to put the module into. -+ */ -+static unsigned int -+get_plt_size(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, -+ const char *secstrings, unsigned int symindex, bool is_init) -+{ -+ unsigned long ret = 0; -+ unsigned int i, j; -+ Elf_Sym *syms; -+ -+ /* Everything marked ALLOC (this includes the exported symbols) */ -+ for (i = 1; i < hdr->e_shnum; ++i) { -+ unsigned int info = sechdrs[i].sh_info; -+ -+ if (sechdrs[i].sh_type != SHT_REL -+ && sechdrs[i].sh_type != SHT_RELA) -+ continue; -+ -+ /* Not a valid relocation section? */ -+ if (info >= hdr->e_shnum) -+ continue; -+ -+ /* Don't bother with non-allocated sections */ -+ if (!(sechdrs[info].sh_flags & SHF_ALLOC)) -+ continue; -+ -+ /* If it's called *.init*, and we're not init, we're -+ not interested */ -+ if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0) -+ != is_init) -+ continue; -+ -+ syms = (Elf_Sym *) sechdrs[symindex].sh_addr; -+ if (sechdrs[i].sh_type == SHT_REL) { -+ Elf_Mips_Rel *rel = (void *) sechdrs[i].sh_addr; -+ unsigned int size = sechdrs[i].sh_size / sizeof(*rel); -+ -+ for (j = 0; j < size; ++j) { -+ Elf_Sym *sym; -+ -+ if (ELF_MIPS_R_TYPE(rel[j]) != R_MIPS_26) -+ continue; -+ -+ sym = syms + ELF_MIPS_R_SYM(rel[j]); -+ if (!is_init && sym->st_shndx != SHN_UNDEF) -+ continue; -+ -+ ret += 4 * sizeof(int); -+ } -+ } else { -+ Elf_Mips_Rela *rela = (void *) sechdrs[i].sh_addr; -+ unsigned int size = sechdrs[i].sh_size / sizeof(*rela); -+ -+ for (j = 0; j < size; ++j) { -+ Elf_Sym *sym; -+ -+ if (ELF_MIPS_R_TYPE(rela[j]) != R_MIPS_26) -+ continue; -+ -+ sym = syms + ELF_MIPS_R_SYM(rela[j]); -+ if (!is_init && sym->st_shndx != SHN_UNDEF) -+ continue; -+ -+ ret += 4 * sizeof(int); -+ } -+ } -+ } -+ -+ return ret; -+} -+ -+#ifndef MODULE_START -+static void *alloc_phys(unsigned long size) -+{ -+ unsigned order; -+ struct page *page; -+ struct page *p; -+ -+ size = PAGE_ALIGN(size); -+ order = get_order(size); -+ -+ page = alloc_pages(GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN | -+ __GFP_THISNODE, order); -+ if (!page) -+ return NULL; -+ -+ split_page(page, order); -+ -+ /* mark all pages except for the last one */ -+ for (p = page; p + 1 < page + (size >> PAGE_SHIFT); ++p) -+ set_bit(PG_owner_priv_1, &p->flags); -+ -+ for (p = page + (size >> PAGE_SHIFT); p < page + (1 << order); ++p) -+ __free_page(p); -+ -+ return page_address(page); -+} -+#endif -+ -+static void free_phys(void *ptr) -+{ -+ struct page *page; -+ bool free; -+ -+ page = virt_to_page(ptr); -+ do { -+ free = test_and_clear_bit(PG_owner_priv_1, &page->flags); -+ __free_page(page); -+ page++; -+ } while (free); -+} -+ -+ - void *module_alloc(unsigned long size) - { -+#ifdef MODULE_START - return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END, - GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE, - __builtin_return_address(0)); -+#else -+ void *ptr; -+ -+ if (size == 0) -+ return NULL; -+ -+ ptr = alloc_phys(size); -+ -+ /* If we failed to allocate physically contiguous memory, -+ * fall back to regular vmalloc. The module loader code will -+ * create jump tables to handle long jumps */ -+ if (!ptr) -+ return vmalloc(size); -+ -+ return ptr; -+#endif - } -+ -+static inline bool is_phys_addr(void *ptr) -+{ -+#ifdef CONFIG_64BIT -+ return (KSEGX((unsigned long)ptr) == CKSEG0); -+#else -+ return (KSEGX(ptr) == KSEG0); - #endif -+} -+ -+/* Free memory returned from module_alloc */ -+void module_memfree(void *module_region) -+{ -+ if (is_phys_addr(module_region)) -+ free_phys(module_region); -+ else -+ vfree(module_region); -+} -+ -+static void *__module_alloc(int size, bool phys) -+{ -+ void *ptr; -+ -+ if (phys) -+ ptr = kmalloc(size, GFP_KERNEL); -+ else -+ ptr = vmalloc(size); -+ return ptr; -+} -+ -+static void __module_free(void *ptr) -+{ -+ if (is_phys_addr(ptr)) -+ kfree(ptr); -+ else -+ vfree(ptr); -+} -+ -+int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, -+ char *secstrings, struct module *mod) -+{ -+ unsigned int symindex = 0; -+ unsigned int core_size, init_size; -+ int i; -+ -+ mod->arch.phys_plt_offset = 0; -+ mod->arch.virt_plt_offset = 0; -+ mod->arch.phys_plt_tbl = NULL; -+ mod->arch.virt_plt_tbl = NULL; -+ -+ if (IS_ENABLED(CONFIG_64BIT)) -+ return 0; -+ -+ for (i = 1; i < hdr->e_shnum; i++) -+ if (sechdrs[i].sh_type == SHT_SYMTAB) -+ symindex = i; -+ -+ core_size = get_plt_size(hdr, sechdrs, secstrings, symindex, false); -+ init_size = get_plt_size(hdr, sechdrs, secstrings, symindex, true); -+ -+ if ((core_size + init_size) == 0) -+ return 0; -+ -+ mod->arch.phys_plt_tbl = __module_alloc(core_size + init_size, 1); -+ if (!mod->arch.phys_plt_tbl) -+ return -ENOMEM; -+ -+ mod->arch.virt_plt_tbl = __module_alloc(core_size + init_size, 0); -+ if (!mod->arch.virt_plt_tbl) { -+ __module_free(mod->arch.phys_plt_tbl); -+ mod->arch.phys_plt_tbl = NULL; -+ return -ENOMEM; -+ } -+ -+ return 0; -+} - - static int apply_r_mips_none(struct module *me, u32 *location, - u32 base, Elf_Addr v, bool rela) -@@ -67,9 +274,40 @@ static int apply_r_mips_32(struct module - return 0; - } - -+static Elf_Addr add_plt_entry_to(unsigned *plt_offset, -+ void *start, Elf_Addr v) -+{ -+ unsigned *tramp = start + *plt_offset; -+ *plt_offset += 4 * sizeof(int); -+ -+ /* adjust carry for addiu */ -+ if (v & 0x00008000) -+ v += 0x10000; -+ -+ tramp[0] = 0x3c190000 | (v >> 16); /* lui t9, hi16 */ -+ tramp[1] = 0x27390000 | (v & 0xffff); /* addiu t9, t9, lo16 */ -+ tramp[2] = 0x03200008; /* jr t9 */ -+ tramp[3] = 0x00000000; /* nop */ -+ -+ return (Elf_Addr) tramp; -+} -+ -+static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v) -+{ -+ if (is_phys_addr(location)) -+ return add_plt_entry_to(&me->arch.phys_plt_offset, -+ me->arch.phys_plt_tbl, v); -+ else -+ return add_plt_entry_to(&me->arch.virt_plt_offset, -+ me->arch.virt_plt_tbl, v); -+ -+} -+ - static int apply_r_mips_26(struct module *me, u32 *location, - u32 base, Elf_Addr v, bool rela) - { -+ u32 ofs = base & 0x03ffffff; -+ - if (v % 4) { - pr_err("module %s: dangerous R_MIPS_26 relocation\n", - me->name); -@@ -77,13 +315,17 @@ static int apply_r_mips_26(struct module - } - - if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { -- pr_err("module %s: relocation overflow\n", -- me->name); -- return -ENOEXEC; -+ v = add_plt_entry(me, location, v + (ofs << 2)); -+ if (!v) { -+ pr_err("module %s: relocation overflow\n", -+ me->name); -+ return -ENOEXEC; -+ } -+ ofs = 0; - } - - *location = (*location & ~0x03ffffff) | -- ((base + (v >> 2)) & 0x03ffffff); -+ ((ofs + (v >> 2)) & 0x03ffffff); - - return 0; - } -@@ -459,9 +701,36 @@ int module_finalize(const Elf_Ehdr *hdr, - list_add(&me->arch.dbe_list, &dbe_list); - spin_unlock_irq(&dbe_lock); - } -+ -+ /* Get rid of the fixup trampoline if we're running the module -+ * from physically mapped address space */ -+ if (me->arch.phys_plt_offset == 0) { -+ __module_free(me->arch.phys_plt_tbl); -+ me->arch.phys_plt_tbl = NULL; -+ } -+ if (me->arch.virt_plt_offset == 0) { -+ __module_free(me->arch.virt_plt_tbl); -+ me->arch.virt_plt_tbl = NULL; -+ } -+ - return 0; - } - -+void module_arch_freeing_init(struct module *mod) -+{ -+ if (mod->state == MODULE_STATE_LIVE) -+ return; -+ -+ if (mod->arch.phys_plt_tbl) { -+ __module_free(mod->arch.phys_plt_tbl); -+ mod->arch.phys_plt_tbl = NULL; -+ } -+ if (mod->arch.virt_plt_tbl) { -+ __module_free(mod->arch.virt_plt_tbl); -+ mod->arch.virt_plt_tbl = NULL; -+ } -+} -+ - void module_arch_cleanup(struct module *mod) - { - spin_lock_irq(&dbe_lock); diff --git a/target/linux/generic/pending-4.19/306-mips_mem_functions_performance.patch b/target/linux/generic/pending-4.19/306-mips_mem_functions_performance.patch deleted file mode 100644 index e73cfd61b3..0000000000 --- a/target/linux/generic/pending-4.19/306-mips_mem_functions_performance.patch +++ /dev/null @@ -1,106 +0,0 @@ -From: Felix Fietkau -Subject: [PATCH] mips: allow the compiler to optimize memset, memcmp, memcpy for better performance and (in some instances) smaller code - -lede-commit: 07e59c7bc7f375f792ec9734be42fe4fa391a8bb -Signed-off-by: Felix Fietkau ---- - arch/mips/boot/compressed/Makefile | 3 ++- - arch/mips/include/asm/string.h | 38 ++++++++++++++++++++++++++++++++++++++ - arch/mips/lib/Makefile | 2 +- - arch/mips/lib/memcmp.c | 22 ++++++++++++++++++++++ - 4 files changed, 63 insertions(+), 2 deletions(-) - create mode 100644 arch/mips/lib/memcmp.c - ---- a/arch/mips/boot/compressed/Makefile -+++ b/arch/mips/boot/compressed/Makefile -@@ -23,7 +23,8 @@ KBUILD_CFLAGS := $(filter-out -pg, $(KBU - KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS)) - - KBUILD_CFLAGS := $(KBUILD_CFLAGS) -D__KERNEL__ \ -- -DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull" -+ -DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull" \ -+ -D__ZBOOT__ - - KBUILD_AFLAGS := $(KBUILD_AFLAGS) -D__ASSEMBLY__ \ - -DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) \ ---- a/arch/mips/include/asm/string.h -+++ b/arch/mips/include/asm/string.h -@@ -140,4 +140,42 @@ extern void *memcpy(void *__to, __const_ - #define __HAVE_ARCH_MEMMOVE - extern void *memmove(void *__dest, __const__ void *__src, size_t __n); - -+#ifndef __ZBOOT__ -+#define memset(__s, __c, len) \ -+({ \ -+ size_t __len = (len); \ -+ void *__ret; \ -+ if (__builtin_constant_p(len) && __len >= 64) \ -+ __ret = memset((__s), (__c), __len); \ -+ else \ -+ __ret = __builtin_memset((__s), (__c), __len); \ -+ __ret; \ -+}) -+ -+#define memcpy(dst, src, len) \ -+({ \ -+ size_t __len = (len); \ -+ void *__ret; \ -+ if (__builtin_constant_p(len) && __len >= 64) \ -+ __ret = memcpy((dst), (src), __len); \ -+ else \ -+ __ret = __builtin_memcpy((dst), (src), __len); \ -+ __ret; \ -+}) -+ -+#define memmove(dst, src, len) \ -+({ \ -+ size_t __len = (len); \ -+ void *__ret; \ -+ if (__builtin_constant_p(len) && __len >= 64) \ -+ __ret = memmove((dst), (src), __len); \ -+ else \ -+ __ret = __builtin_memmove((dst), (src), __len); \ -+ __ret; \ -+}) -+ -+#define __HAVE_ARCH_MEMCMP -+#define memcmp(src1, src2, len) __builtin_memcmp((src1), (src2), (len)) -+#endif -+ - #endif /* _ASM_STRING_H */ ---- a/arch/mips/lib/Makefile -+++ b/arch/mips/lib/Makefile -@@ -5,7 +5,7 @@ - - lib-y += bitops.o csum_partial.o delay.o memcpy.o memset.o \ - mips-atomic.o strncpy_user.o \ -- strnlen_user.o uncached.o -+ strnlen_user.o uncached.o memcmp.o - - obj-y += iomap.o iomap_copy.o - obj-$(CONFIG_PCI) += iomap-pci.o ---- /dev/null -+++ b/arch/mips/lib/memcmp.c -@@ -0,0 +1,22 @@ -+/* -+ * copied from linux/lib/string.c -+ * -+ * Copyright (C) 1991, 1992 Linus Torvalds -+ */ -+ -+#include -+#include -+ -+#undef memcmp -+int memcmp(const void *cs, const void *ct, size_t count) -+{ -+ const unsigned char *su1, *su2; -+ int res = 0; -+ -+ for (su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--) -+ if ((res = *su1 - *su2) != 0) -+ break; -+ return res; -+} -+EXPORT_SYMBOL(memcmp); -+ diff --git a/target/linux/generic/pending-4.19/307-mips_highmem_offset.patch b/target/linux/generic/pending-4.19/307-mips_highmem_offset.patch deleted file mode 100644 index 9dd2fa9863..0000000000 --- a/target/linux/generic/pending-4.19/307-mips_highmem_offset.patch +++ /dev/null @@ -1,19 +0,0 @@ -From: Felix Fietkau -Subject: kernel: adjust mips highmem offset to avoid the need for -mlong-calls on systems with >256M RAM - -Signed-off-by: Felix Fietkau ---- - arch/mips/include/asm/mach-generic/spaces.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/include/asm/mach-generic/spaces.h -+++ b/arch/mips/include/asm/mach-generic/spaces.h -@@ -50,7 +50,7 @@ - * Memory above this physical address will be considered highmem. - */ - #ifndef HIGHMEM_START --#define HIGHMEM_START _AC(0x20000000, UL) -+#define HIGHMEM_START _AC(0x10000000, UL) - #endif - - #endif /* CONFIG_32BIT */ diff --git a/target/linux/generic/pending-4.19/308-mips32r2_tune.patch b/target/linux/generic/pending-4.19/308-mips32r2_tune.patch deleted file mode 100644 index 8636511464..0000000000 --- a/target/linux/generic/pending-4.19/308-mips32r2_tune.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add -mtune=34kc to MIPS CFLAGS when building for mips32r2 - -This provides a good tradeoff across at least 24Kc-74Kc, while also -producing smaller code. - -Signed-off-by: Felix Fietkau ---- - arch/mips/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -177,7 +177,7 @@ cflags-$(CONFIG_CPU_VR41XX) += -march=r4 - cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap - cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap - cflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,--trap --cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -Wa,--trap -+cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -mtune=34kc -Wa,--trap - cflags-$(CONFIG_CPU_MIPS32_R6) += -march=mips32r6 -Wa,--trap -modd-spreg - cflags-$(CONFIG_CPU_MIPS64_R1) += -march=mips64 -Wa,--trap - cflags-$(CONFIG_CPU_MIPS64_R2) += -march=mips64r2 -Wa,--trap diff --git a/target/linux/generic/pending-4.19/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch b/target/linux/generic/pending-4.19/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch deleted file mode 100644 index e4075a24bd..0000000000 --- a/target/linux/generic/pending-4.19/309-MIPS-Add-CPU-option-reporting-to-proc-cpuinfo.patch +++ /dev/null @@ -1,142 +0,0 @@ -From 87ec87c2ad615c1a177cd08ef5fa29fc739f6e50 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Sun, 23 Dec 2018 18:06:53 +0100 -Subject: [PATCH] MIPS: Add CPU option reporting to /proc/cpuinfo - -Many MIPS CPUs have optional CPU features which are not activates for -all CPU cores. Print the CPU options which are implemented in the core -in /proc/cpuinfo. This makes it possible to see what features are -supported and which are not supported. This should cover all standard -MIPS extensions, before it only printed information about the main MIPS -ASEs. - -Signed-off-by: Hauke Mehrtens ---- - arch/mips/kernel/proc.c | 116 ++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 116 insertions(+) - ---- a/arch/mips/kernel/proc.c -+++ b/arch/mips/kernel/proc.c -@@ -134,6 +134,122 @@ static int show_cpuinfo(struct seq_file - seq_printf(m, "micromips kernel\t: %s\n", - (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no"); - } -+ -+ seq_printf(m, "Options implemented\t:"); -+ if (cpu_has_tlb) -+ seq_printf(m, "%s", " tlb"); -+ if (cpu_has_ftlb) -+ seq_printf(m, "%s", " ftlb"); -+ if (cpu_has_tlbinv) -+ seq_printf(m, "%s", " tlbinv"); -+ if (cpu_has_segments) -+ seq_printf(m, "%s", " segments"); -+ if (cpu_has_rixiex) -+ seq_printf(m, "%s", " rixiex"); -+ if (cpu_has_ldpte) -+ seq_printf(m, "%s", " ldpte"); -+ if (cpu_has_maar) -+ seq_printf(m, "%s", " maar"); -+ if (cpu_has_rw_llb) -+ seq_printf(m, "%s", " rw_llb"); -+ if (cpu_has_4kex) -+ seq_printf(m, "%s", " 4kex"); -+ if (cpu_has_3k_cache) -+ seq_printf(m, "%s", " 3k_cache"); -+ if (cpu_has_4k_cache) -+ seq_printf(m, "%s", " 4k_cache"); -+ if (cpu_has_6k_cache) -+ seq_printf(m, "%s", " 6k_cache"); -+ if (cpu_has_8k_cache) -+ seq_printf(m, "%s", " 8k_cache"); -+ if (cpu_has_tx39_cache) -+ seq_printf(m, "%s", " tx39_cache"); -+ if (cpu_has_octeon_cache) -+ seq_printf(m, "%s", " octeon_cache"); -+ if (cpu_has_fpu) -+ seq_printf(m, "%s", " fpu"); -+ if (cpu_has_32fpr) -+ seq_printf(m, "%s", " 32fpr"); -+ if (cpu_has_cache_cdex_p) -+ seq_printf(m, "%s", " cache_cdex_p"); -+ if (cpu_has_cache_cdex_s) -+ seq_printf(m, "%s", " cache_cdex_s"); -+ if (cpu_has_prefetch) -+ seq_printf(m, "%s", " prefetch"); -+ if (cpu_has_mcheck) -+ seq_printf(m, "%s", " mcheck"); -+ if (cpu_has_ejtag) -+ seq_printf(m, "%s", " ejtag"); -+ if (cpu_has_llsc) -+ seq_printf(m, "%s", " llsc"); -+ if (cpu_has_bp_ghist) -+ seq_printf(m, "%s", " bp_ghist"); -+ if (cpu_has_guestctl0ext) -+ seq_printf(m, "%s", " guestctl0ext"); -+ if (cpu_has_guestctl1) -+ seq_printf(m, "%s", " guestctl1"); -+ if (cpu_has_guestctl2) -+ seq_printf(m, "%s", " guestctl2"); -+ if (cpu_has_guestid) -+ seq_printf(m, "%s", " guestid"); -+ if (cpu_has_drg) -+ seq_printf(m, "%s", " drg"); -+ if (cpu_has_rixi) -+ seq_printf(m, "%s", " rixi"); -+ if (cpu_has_lpa) -+ seq_printf(m, "%s", " lpa"); -+ if (cpu_has_mvh) -+ seq_printf(m, "%s", " mvh"); -+ if (cpu_has_vtag_icache) -+ seq_printf(m, "%s", " vtag_icache"); -+ if (cpu_has_dc_aliases) -+ seq_printf(m, "%s", " dc_aliases"); -+ if (cpu_has_ic_fills_f_dc) -+ seq_printf(m, "%s", " ic_fills_f_dc"); -+ if (cpu_has_pindexed_dcache) -+ seq_printf(m, "%s", " pindexed_dcache"); -+ if (cpu_has_userlocal) -+ seq_printf(m, "%s", " userlocal"); -+ if (cpu_has_nofpuex) -+ seq_printf(m, "%s", " nofpuex"); -+ if (cpu_has_vint) -+ seq_printf(m, "%s", " vint"); -+ if (cpu_has_veic) -+ seq_printf(m, "%s", " veic"); -+ if (cpu_has_inclusive_pcaches) -+ seq_printf(m, "%s", " inclusive_pcaches"); -+ if (cpu_has_perf_cntr_intr_bit) -+ seq_printf(m, "%s", " perf_cntr_intr_bit"); -+ if (cpu_has_ufr) -+ seq_printf(m, "%s", " ufr"); -+ if (cpu_has_fre) -+ seq_printf(m, "%s", " fre"); -+ if (cpu_has_cdmm) -+ seq_printf(m, "%s", " cdmm"); -+ if (cpu_has_small_pages) -+ seq_printf(m, "%s", " small_pages"); -+ if (cpu_has_nan_legacy) -+ seq_printf(m, "%s", " nan_legacy"); -+ if (cpu_has_nan_2008) -+ seq_printf(m, "%s", " nan_2008"); -+ if (cpu_has_ebase_wg) -+ seq_printf(m, "%s", " ebase_wg"); -+ if (cpu_has_badinstr) -+ seq_printf(m, "%s", " badinstr"); -+ if (cpu_has_badinstrp) -+ seq_printf(m, "%s", " badinstrp"); -+ if (cpu_has_contextconfig) -+ seq_printf(m, "%s", " contextconfig"); -+ if (cpu_has_perf) -+ seq_printf(m, "%s", " perf"); -+ if (cpu_has_shared_ftlb_ram) -+ seq_printf(m, "%s", " shared_ftlb_ram"); -+ if (cpu_has_shared_ftlb_entries) -+ seq_printf(m, "%s", " shared_ftlb_entries"); -+ if (cpu_has_mipsmt_pertccounters) -+ seq_printf(m, "%s", " mipsmt_pertccounters"); -+ seq_printf(m, "\n"); -+ - seq_printf(m, "shadow register sets\t: %d\n", - cpu_data[n].srsets); - seq_printf(m, "kscratch registers\t: %d\n", diff --git a/target/linux/generic/pending-4.19/310-arm_module_unresolved_weak_sym.patch b/target/linux/generic/pending-4.19/310-arm_module_unresolved_weak_sym.patch deleted file mode 100644 index bc9f0a4c4d..0000000000 --- a/target/linux/generic/pending-4.19/310-arm_module_unresolved_weak_sym.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: fix errors in unresolved weak symbols on arm - -lede-commit: 570699d4838a907c3ef9f2819bf19eb72997b32f -Signed-off-by: Felix Fietkau ---- - arch/arm/kernel/module.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm/kernel/module.c -+++ b/arch/arm/kernel/module.c -@@ -95,6 +95,10 @@ apply_relocate(Elf32_Shdr *sechdrs, cons - return -ENOEXEC; - } - -+ if ((IS_ERR_VALUE(sym->st_value) || !sym->st_value) && -+ ELF_ST_BIND(sym->st_info) == STB_WEAK) -+ continue; -+ - loc = dstsec->sh_addr + rel->r_offset; - - switch (ELF32_R_TYPE(rel->r_info)) { diff --git a/target/linux/generic/pending-4.19/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch b/target/linux/generic/pending-4.19/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch deleted file mode 100644 index 44d85b5b86..0000000000 --- a/target/linux/generic/pending-4.19/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch +++ /dev/null @@ -1,274 +0,0 @@ -From: Yousong Zhou -Subject: MIPS: kexec: Accept command line parameters from userspace. - -Signed-off-by: Yousong Zhou ---- - arch/mips/kernel/machine_kexec.c | 153 +++++++++++++++++++++++++++++++----- - arch/mips/kernel/machine_kexec.h | 20 +++++ - arch/mips/kernel/relocate_kernel.S | 21 +++-- - 3 files changed, 167 insertions(+), 27 deletions(-) - create mode 100644 arch/mips/kernel/machine_kexec.h - ---- a/arch/mips/kernel/machine_kexec.c -+++ b/arch/mips/kernel/machine_kexec.c -@@ -10,14 +10,11 @@ - #include - #include - -+#include - #include - #include -- --extern const unsigned char relocate_new_kernel[]; --extern const size_t relocate_new_kernel_size; -- --extern unsigned long kexec_start_address; --extern unsigned long kexec_indirection_page; -+#include -+#include "machine_kexec.h" - - int (*_machine_kexec_prepare)(struct kimage *) = NULL; - void (*_machine_kexec_shutdown)(void) = NULL; -@@ -28,6 +25,101 @@ atomic_t kexec_ready_to_reboot = ATOMIC_ - void (*_crash_smp_send_stop)(void) = NULL; - #endif - -+static void machine_kexec_print_args(void) -+{ -+ unsigned long argc = (int)kexec_args[0]; -+ int i; -+ -+ pr_info("kexec_args[0] (argc): %lu\n", argc); -+ pr_info("kexec_args[1] (argv): %p\n", (void *)kexec_args[1]); -+ pr_info("kexec_args[2] (env ): %p\n", (void *)kexec_args[2]); -+ pr_info("kexec_args[3] (desc): %p\n", (void *)kexec_args[3]); -+ -+ for (i = 0; i < argc; i++) { -+ pr_info("kexec_argv[%d] = %p, %s\n", -+ i, kexec_argv[i], kexec_argv[i]); -+ } -+} -+ -+static void machine_kexec_init_argv(struct kimage *image) -+{ -+ void __user *buf = NULL; -+ size_t bufsz; -+ size_t size; -+ int i; -+ -+ bufsz = 0; -+ for (i = 0; i < image->nr_segments; i++) { -+ struct kexec_segment *seg; -+ -+ seg = &image->segment[i]; -+ if (seg->bufsz < 6) -+ continue; -+ -+ if (strncmp((char *) seg->buf, "kexec ", 6)) -+ continue; -+ -+ buf = seg->buf; -+ bufsz = seg->bufsz; -+ break; -+ } -+ -+ if (!buf) -+ return; -+ -+ size = KEXEC_COMMAND_LINE_SIZE; -+ size = min(size, bufsz); -+ if (size < bufsz) -+ pr_warn("kexec command line truncated to %zd bytes\n", size); -+ -+ /* Copy to kernel space */ -+ if (copy_from_user(kexec_argv_buf, buf, size)) -+ pr_warn("kexec command line copy to kernel space failed\n"); -+ -+ kexec_argv_buf[size - 1] = 0; -+} -+ -+static void machine_kexec_parse_argv(struct kimage *image) -+{ -+ char *reboot_code_buffer; -+ int reloc_delta; -+ char *ptr; -+ int argc; -+ int i; -+ -+ ptr = kexec_argv_buf; -+ argc = 0; -+ -+ /* -+ * convert command line string to array of parameters -+ * (as bootloader does). -+ */ -+ while (ptr && *ptr && (KEXEC_MAX_ARGC > argc)) { -+ if (*ptr == ' ') { -+ *ptr++ = '\0'; -+ continue; -+ } -+ -+ kexec_argv[argc++] = ptr; -+ ptr = strchr(ptr, ' '); -+ } -+ -+ if (!argc) -+ return; -+ -+ kexec_args[0] = argc; -+ kexec_args[1] = (unsigned long)kexec_argv; -+ kexec_args[2] = 0; -+ kexec_args[3] = 0; -+ -+ reboot_code_buffer = page_address(image->control_code_page); -+ reloc_delta = reboot_code_buffer - (char *)kexec_relocate_new_kernel; -+ -+ kexec_args[1] += reloc_delta; -+ for (i = 0; i < argc; i++) -+ kexec_argv[i] += reloc_delta; -+} -+ - static void kexec_image_info(const struct kimage *kimage) - { - unsigned long i; -@@ -52,6 +144,18 @@ int - machine_kexec_prepare(struct kimage *kimage) - { - kexec_image_info(kimage); -+ /* -+ * Whenever arguments passed from kexec-tools, Init the arguments as -+ * the original ones to try avoiding booting failure. -+ */ -+ -+ kexec_args[0] = fw_arg0; -+ kexec_args[1] = fw_arg1; -+ kexec_args[2] = fw_arg2; -+ kexec_args[3] = fw_arg3; -+ -+ machine_kexec_init_argv(kimage); -+ machine_kexec_parse_argv(kimage); - - if (_machine_kexec_prepare) - return _machine_kexec_prepare(kimage); -@@ -89,10 +193,12 @@ machine_kexec(struct kimage *image) - unsigned long *ptr; - - reboot_code_buffer = -- (unsigned long)page_address(image->control_code_page); -+ (unsigned long)page_address(image->control_code_page); -+ pr_info("reboot_code_buffer = %p\n", (void *)reboot_code_buffer); - - kexec_start_address = - (unsigned long) phys_to_virt(image->start); -+ pr_info("kexec_start_address = %p\n", (void *)kexec_start_address); - - if (image->type == KEXEC_TYPE_DEFAULT) { - kexec_indirection_page = -@@ -100,9 +206,19 @@ machine_kexec(struct kimage *image) - } else { - kexec_indirection_page = (unsigned long)&image->head; - } -+ pr_info("kexec_indirection_page = %p\n", (void *)kexec_indirection_page); - -- memcpy((void*)reboot_code_buffer, relocate_new_kernel, -- relocate_new_kernel_size); -+ pr_info("Where is memcpy: %p\n", memcpy); -+ pr_info("kexec_relocate_new_kernel = %p, kexec_relocate_new_kernel_end = %p\n", -+ (void *)kexec_relocate_new_kernel, &kexec_relocate_new_kernel_end); -+ pr_info("Copy %lu bytes from %p to %p\n", KEXEC_RELOCATE_NEW_KERNEL_SIZE, -+ (void *)kexec_relocate_new_kernel, (void *)reboot_code_buffer); -+ memcpy((void*)reboot_code_buffer, kexec_relocate_new_kernel, -+ KEXEC_RELOCATE_NEW_KERNEL_SIZE); -+ -+ pr_info("Before _print_args().\n"); -+ machine_kexec_print_args(); -+ pr_info("Before eval loop.\n"); - - /* - * The generic kexec code builds a page list with physical -@@ -124,15 +240,16 @@ machine_kexec(struct kimage *image) - /* - * we do not want to be bothered. - */ -+ pr_info("Before irq_disable.\n"); - local_irq_disable(); - -- printk("Will call new kernel at %08lx\n", image->start); -- printk("Bye ...\n"); -+ pr_info("Will call new kernel at %08lx\n", image->start); -+ pr_info("Bye ...\n"); - __flush_cache_all(); - #ifdef CONFIG_SMP - /* All secondary cpus now may jump to kexec_wait cycle */ - relocated_kexec_smp_wait = reboot_code_buffer + -- (void *)(kexec_smp_wait - relocate_new_kernel); -+ (void *)(kexec_smp_wait - kexec_relocate_new_kernel); - smp_wmb(); - atomic_set(&kexec_ready_to_reboot, 1); - #endif ---- /dev/null -+++ b/arch/mips/kernel/machine_kexec.h -@@ -0,0 +1,20 @@ -+#ifndef _MACHINE_KEXEC_H -+#define _MACHINE_KEXEC_H -+ -+#ifndef __ASSEMBLY__ -+extern const unsigned char kexec_relocate_new_kernel[]; -+extern unsigned long kexec_relocate_new_kernel_end; -+extern unsigned long kexec_start_address; -+extern unsigned long kexec_indirection_page; -+ -+extern char kexec_argv_buf[]; -+extern char *kexec_argv[]; -+ -+#define KEXEC_RELOCATE_NEW_KERNEL_SIZE ((unsigned long)&kexec_relocate_new_kernel_end - (unsigned long)kexec_relocate_new_kernel) -+#endif /* !__ASSEMBLY__ */ -+ -+#define KEXEC_COMMAND_LINE_SIZE 256 -+#define KEXEC_ARGV_SIZE (KEXEC_COMMAND_LINE_SIZE / 16) -+#define KEXEC_MAX_ARGC (KEXEC_ARGV_SIZE / sizeof(long)) -+ -+#endif ---- a/arch/mips/kernel/relocate_kernel.S -+++ b/arch/mips/kernel/relocate_kernel.S -@@ -12,8 +12,9 @@ - #include - #include - #include -+#include "machine_kexec.h" - --LEAF(relocate_new_kernel) -+LEAF(kexec_relocate_new_kernel) - PTR_L a0, arg0 - PTR_L a1, arg1 - PTR_L a2, arg2 -@@ -98,7 +99,7 @@ done: - #endif - /* jump to kexec_start_address */ - j s1 -- END(relocate_new_kernel) -+ END(kexec_relocate_new_kernel) - - #ifdef CONFIG_SMP - /* -@@ -184,9 +185,15 @@ kexec_indirection_page: - PTR 0 - .size kexec_indirection_page, PTRSIZE - --relocate_new_kernel_end: -+kexec_argv_buf: -+ EXPORT(kexec_argv_buf) -+ .skip KEXEC_COMMAND_LINE_SIZE -+ .size kexec_argv_buf, KEXEC_COMMAND_LINE_SIZE -+ -+kexec_argv: -+ EXPORT(kexec_argv) -+ .skip KEXEC_ARGV_SIZE -+ .size kexec_argv, KEXEC_ARGV_SIZE - --relocate_new_kernel_size: -- EXPORT(relocate_new_kernel_size) -- PTR relocate_new_kernel_end - relocate_new_kernel -- .size relocate_new_kernel_size, PTRSIZE -+kexec_relocate_new_kernel_end: -+ EXPORT(kexec_relocate_new_kernel_end) diff --git a/target/linux/generic/pending-4.19/332-arc-add-OWRTDTB-section.patch b/target/linux/generic/pending-4.19/332-arc-add-OWRTDTB-section.patch deleted file mode 100644 index 2f7c7b4588..0000000000 --- a/target/linux/generic/pending-4.19/332-arc-add-OWRTDTB-section.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 34ef04f3845ed2b47d57dd9d3b795b16e1f8185a Mon Sep 17 00:00:00 2001 -From: Evgeniy Didin -Date: Fri, 15 Mar 2019 18:53:38 +0300 -Subject: [PATCH] arc add OWRTDTB section - -This change allows OpenWRT to patch resulting kernel binary with -external .dtb. - -That allows us to re-use exactky the same vmlinux on different boards -given its ARC core configurations match (at least cache line sizes etc). - -""patch-dtb" searches for ASCII "OWRTDTB:" strign and copies external -.dtb right after it, keeping the string in place. - -Signed-off-by: Eugeniy Paltsev -Signed-off-by: Alexey Brodkin -Signed-off-by: Evgeniy Didin ---- - arch/arc/kernel/head.S | 10 ++++++++++ - arch/arc/kernel/setup.c | 4 +++- - arch/arc/kernel/vmlinux.lds.S | 13 +++++++++++++ - 3 files changed, 26 insertions(+), 1 deletion(-) - ---- a/arch/arc/kernel/head.S -+++ b/arch/arc/kernel/head.S -@@ -59,6 +59,16 @@ - #endif - .endm - -+ ; Here "patch-dtb" will embed external .dtb -+ ; Note "patch-dtb" searches for ASCII "OWRTDTB:" string -+ ; and pastes .dtb right after it, hense the string precedes -+ ; __image_dtb symbol. -+ .section .owrt, "aw",@progbits -+ .ascii "OWRTDTB:" -+ENTRY(__image_dtb) -+ .fill 0x4000 -+END(__image_dtb) -+ - .section .init.text, "ax",@progbits - - ;---------------------------------------------------------------- ---- a/arch/arc/kernel/setup.c -+++ b/arch/arc/kernel/setup.c -@@ -527,7 +527,7 @@ void __init handle_uboot_args(void) - ignore_uboot_args: - - if (use_embedded_dtb) { -- machine_desc = setup_machine_fdt(__dtb_start); -+ machine_desc = setup_machine_fdt(&__image_dtb); - if (!machine_desc) - panic("Embedded DT invalid\n"); - } -@@ -543,6 +543,8 @@ ignore_uboot_args: - } - } - -+extern struct boot_param_header __image_dtb; -+ - void __init setup_arch(char **cmdline_p) - { - handle_uboot_args(); ---- a/arch/arc/kernel/vmlinux.lds.S -+++ b/arch/arc/kernel/vmlinux.lds.S -@@ -30,6 +30,19 @@ SECTIONS - - . = CONFIG_LINUX_LINK_BASE; - -+ /* -+ * In OpenWRT we want to patch built binary embedding .dtb of choice. -+ * This is implemented with "patch-dtb" utility which searches for -+ * "OWRTDTB:" string in first 16k of image and if it is found -+ * copies .dtb right after mentioned string. -+ * -+ * Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it. -+ */ -+ .owrt : { -+ *(.owrt) -+ . = ALIGN(PAGE_SIZE); -+ } -+ - _int_vec_base_lds = .; - .vector : { - *(.vector) diff --git a/target/linux/generic/pending-4.19/333-arc-enable-unaligned-access-in-kernel-mode.patch b/target/linux/generic/pending-4.19/333-arc-enable-unaligned-access-in-kernel-mode.patch deleted file mode 100644 index 4e0265aef5..0000000000 --- a/target/linux/generic/pending-4.19/333-arc-enable-unaligned-access-in-kernel-mode.patch +++ /dev/null @@ -1,24 +0,0 @@ -From: Alexey Brodkin -Subject: arc: enable unaligned access in kernel mode - -This enables misaligned access handling even in kernel mode. -Some wireless drivers (ath9k-htc and mt7601u) use misaligned accesses -here and there and to cope with that without fixing stuff in the drivers -we're just gracefully handling it on ARC. - -Signed-off-by: Alexey Brodkin ---- - arch/arc/kernel/unaligned.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arc/kernel/unaligned.c -+++ b/arch/arc/kernel/unaligned.c -@@ -206,7 +206,7 @@ int misaligned_fixup(unsigned long addre - char buf[TASK_COMM_LEN]; - - /* handle user mode only and only if enabled by sysadmin */ -- if (!user_mode(regs) || !unaligned_enabled) -+ if (!unaligned_enabled) - return 1; - - if (no_unaligned_warning) { diff --git a/target/linux/generic/pending-4.19/341-MIPS-mm-remove-no-op-dma_map_ops-where-possible.patch b/target/linux/generic/pending-4.19/341-MIPS-mm-remove-no-op-dma_map_ops-where-possible.patch deleted file mode 100644 index 07a6da453f..0000000000 --- a/target/linux/generic/pending-4.19/341-MIPS-mm-remove-no-op-dma_map_ops-where-possible.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 203f17906ff45705fbdaa0430dbbc71142c2640f Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Sat, 8 Dec 2018 21:45:53 +0100 -Subject: [PATCH 1/3] MIPS: Compile post DMA flush only when needed - -dma_sync_phys() is only called for some CPUs when a mapping is removed. -Add ARCH_HAS_SYNC_DMA_FOR_CPU only for the CPUs listed in -cpu_needs_post_dma_flush() which need this extra call and do not compile -this code in for other CPUs. We need this for R10000, R12000, BMIPS5000 -CPUs and CPUs supporting MAAR which was introduced in MIPS32r5. - -This will hopefully improve the performance of the not affected devices. - -Signed-off-by: Hauke Mehrtens ---- - arch/mips/Kconfig | 6 +++++- - arch/mips/mm/dma-noncoherent.c | 2 ++ - 2 files changed, 7 insertions(+), 1 deletion(-) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -1117,7 +1117,6 @@ config DMA_PERDEV_COHERENT - config DMA_NONCOHERENT - bool - select ARCH_HAS_SYNC_DMA_FOR_DEVICE -- select ARCH_HAS_SYNC_DMA_FOR_CPU - select NEED_DMA_MAP_STATE - select DMA_NONCOHERENT_MMAP - select DMA_NONCOHERENT_CACHE_SYNC -@@ -1898,9 +1897,11 @@ config SYS_HAS_CPU_MIPS32_R3_5 - - config SYS_HAS_CPU_MIPS32_R5 - bool -+ select ARCH_HAS_SYNC_DMA_FOR_CPU - - config SYS_HAS_CPU_MIPS32_R6 - bool -+ select ARCH_HAS_SYNC_DMA_FOR_CPU - - config SYS_HAS_CPU_MIPS64_R1 - bool -@@ -1910,6 +1911,7 @@ config SYS_HAS_CPU_MIPS64_R2 - - config SYS_HAS_CPU_MIPS64_R6 - bool -+ select ARCH_HAS_SYNC_DMA_FOR_CPU - - config SYS_HAS_CPU_R3000 - bool -@@ -1946,6 +1948,7 @@ config SYS_HAS_CPU_R8000 - - config SYS_HAS_CPU_R10000 - bool -+ select ARCH_HAS_SYNC_DMA_FOR_CPU - - config SYS_HAS_CPU_RM7000 - bool -@@ -1974,6 +1977,7 @@ config SYS_HAS_CPU_BMIPS4380 - config SYS_HAS_CPU_BMIPS5000 - bool - select SYS_HAS_CPU_BMIPS -+ select ARCH_HAS_SYNC_DMA_FOR_CPU - - config SYS_HAS_CPU_XLR - bool ---- a/arch/mips/mm/dma-noncoherent.c -+++ b/arch/mips/mm/dma-noncoherent.c -@@ -191,12 +191,14 @@ void arch_sync_dma_for_device(struct dev - dma_sync_phys(paddr, size, dir); - } - -+#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU - void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, - size_t size, enum dma_data_direction dir) - { - if (cpu_needs_post_dma_flush(dev)) - dma_sync_phys(paddr, size, dir); - } -+#endif - - void arch_dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction direction) diff --git a/target/linux/generic/pending-4.19/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch b/target/linux/generic/pending-4.19/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch deleted file mode 100644 index 035a84b1e4..0000000000 --- a/target/linux/generic/pending-4.19/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 66770a004afe10df11d3902e16eaa0c2c39436bb Mon Sep 17 00:00:00 2001 -From: Pawel Dembicki -Date: Fri, 24 May 2019 17:56:19 +0200 -Subject: [PATCH] powerpc: Enable kernel XZ compression option on PPC_85xx - -Enable kernel XZ compression option on PPC_85xx. Tested with -simpleImage on TP-Link TL-WDR4900 (Freescale P1014 processor). - -Suggested-by: Christian Lamparter -Signed-off-by: Pawel Dembicki ---- - arch/powerpc/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/powerpc/Kconfig -+++ b/arch/powerpc/Kconfig -@@ -197,7 +197,7 @@ config PPC - select HAVE_IOREMAP_PROT - select HAVE_IRQ_EXIT_ON_IRQ_STACK - select HAVE_KERNEL_GZIP -- select HAVE_KERNEL_XZ if PPC_BOOK3S -+ select HAVE_KERNEL_XZ if PPC_BOOK3S || PPC_85xx - select HAVE_KPROBES - select HAVE_KPROBES_ON_FTRACE - select HAVE_KRETPROBES diff --git a/target/linux/generic/pending-4.19/400-mtd-add-rootfs-split-support.patch b/target/linux/generic/pending-4.19/400-mtd-add-rootfs-split-support.patch deleted file mode 100644 index bc783deb40..0000000000 --- a/target/linux/generic/pending-4.19/400-mtd-add-rootfs-split-support.patch +++ /dev/null @@ -1,107 +0,0 @@ -From: Felix Fietkau -Subject: make rootfs split/detection more generic - patch can be moved to generic-2.6 after testing on other platforms - -lede-commit: 328e660b31f0937d52c5ae3d6e7029409918a9df -Signed-off-by: Felix Fietkau ---- - drivers/mtd/Kconfig | 17 +++++++++++++++++ - drivers/mtd/mtdpart.c | 35 +++++++++++++++++++++++++++++++++++ - include/linux/mtd/partitions.h | 2 ++ - 3 files changed, 54 insertions(+) - ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -11,6 +11,23 @@ menuconfig MTD - - if MTD - -+menu "OpenWrt specific MTD options" -+ -+config MTD_ROOTFS_ROOT_DEV -+ bool "Automatically set 'rootfs' partition to be root filesystem" -+ default y -+ -+config MTD_SPLIT_FIRMWARE -+ bool "Automatically split firmware partition for kernel+rootfs" -+ default y -+ -+config MTD_SPLIT_FIRMWARE_NAME -+ string "Firmware partition name" -+ depends on MTD_SPLIT_FIRMWARE -+ default "firmware" -+ -+endmenu -+ - config MTD_TESTS - tristate "MTD tests support (DANGEROUS)" - depends on m ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -29,10 +29,12 @@ - #include - #include - #include -+#include - #include - #include - - #include "mtdcore.h" -+#include "mtdsplit/mtdsplit.h" - - /* Our partition linked list */ - static LIST_HEAD(mtd_partitions); -@@ -52,6 +54,8 @@ struct mtd_part { - struct list_head list; - }; - -+static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part); -+ - /* - * Given a pointer to the MTD object in the mtd_part structure, we can retrieve - * the pointer to that structure. -@@ -626,6 +630,7 @@ int mtd_add_partition(struct mtd_info *p - if (ret) - goto err_remove_part; - -+ mtd_partition_split(parent, new); - mtd_add_partition_attrs(new); - - return 0; -@@ -712,6 +717,29 @@ int mtd_del_partition(struct mtd_info *m - } - EXPORT_SYMBOL_GPL(mtd_del_partition); - -+#ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME -+#define SPLIT_FIRMWARE_NAME CONFIG_MTD_SPLIT_FIRMWARE_NAME -+#else -+#define SPLIT_FIRMWARE_NAME "unused" -+#endif -+ -+static void split_firmware(struct mtd_info *master, struct mtd_part *part) -+{ -+} -+ -+static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part) -+{ -+ static int rootfs_found = 0; -+ -+ if (rootfs_found) -+ return; -+ -+ if (IS_ENABLED(CONFIG_MTD_SPLIT_FIRMWARE) && -+ !strcmp(part->mtd.name, SPLIT_FIRMWARE_NAME) && -+ !of_find_property(mtd_get_of_node(&part->mtd), "compatible", NULL)) -+ split_firmware(master, part); -+} -+ - /* - * This function, given a master MTD object and a partition table, creates - * and registers slave MTD objects which are bound to the master according to -@@ -752,6 +780,7 @@ int add_mtd_partitions(struct mtd_info * - goto err_del_partitions; - } - -+ mtd_partition_split(master, slave); - mtd_add_partition_attrs(slave); - /* Look for subpartitions */ - parse_mtd_partitions(&slave->mtd, parts[i].types, NULL); diff --git a/target/linux/generic/pending-4.19/401-mtd-add-support-for-different-partition-parser-types.patch b/target/linux/generic/pending-4.19/401-mtd-add-support-for-different-partition-parser-types.patch deleted file mode 100644 index a59659cda6..0000000000 --- a/target/linux/generic/pending-4.19/401-mtd-add-support-for-different-partition-parser-types.patch +++ /dev/null @@ -1,142 +0,0 @@ -From: Gabor Juhos -Subject: mtd: add support for different partition parser types - -Signed-off-by: Gabor Juhos ---- - drivers/mtd/mtdpart.c | 56 ++++++++++++++++++++++++++++++++++++++++ - include/linux/mtd/partitions.h | 11 ++++++++ - 2 files changed, 67 insertions(+) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -55,6 +55,10 @@ struct mtd_part { - }; - - static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part); -+static int parse_mtd_partitions_by_type(struct mtd_info *master, -+ enum mtd_parser_type type, -+ const struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data); - - /* - * Given a pointer to the MTD object in the mtd_part structure, we can retrieve -@@ -717,6 +721,36 @@ int mtd_del_partition(struct mtd_info *m - } - EXPORT_SYMBOL_GPL(mtd_del_partition); - -+static int -+run_parsers_by_type(struct mtd_part *slave, enum mtd_parser_type type) -+{ -+ struct mtd_partition *parts; -+ int nr_parts; -+ int i; -+ -+ nr_parts = parse_mtd_partitions_by_type(&slave->mtd, type, (const struct mtd_partition **)&parts, -+ NULL); -+ if (nr_parts <= 0) -+ return nr_parts; -+ -+ if (WARN_ON(!parts)) -+ return 0; -+ -+ for (i = 0; i < nr_parts; i++) { -+ /* adjust partition offsets */ -+ parts[i].offset += slave->offset; -+ -+ mtd_add_partition(slave->parent, -+ parts[i].name, -+ parts[i].offset, -+ parts[i].size); -+ } -+ -+ kfree(parts); -+ -+ return nr_parts; -+} -+ - #ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME - #define SPLIT_FIRMWARE_NAME CONFIG_MTD_SPLIT_FIRMWARE_NAME - #else -@@ -1066,6 +1100,61 @@ void mtd_part_parser_cleanup(struct mtd_ - } - } - -+static struct mtd_part_parser * -+get_partition_parser_by_type(enum mtd_parser_type type, -+ struct mtd_part_parser *start) -+{ -+ struct mtd_part_parser *p, *ret = NULL; -+ -+ spin_lock(&part_parser_lock); -+ -+ p = list_prepare_entry(start, &part_parsers, list); -+ if (start) -+ mtd_part_parser_put(start); -+ -+ list_for_each_entry_continue(p, &part_parsers, list) { -+ if (p->type == type && try_module_get(p->owner)) { -+ ret = p; -+ break; -+ } -+ } -+ -+ spin_unlock(&part_parser_lock); -+ -+ return ret; -+} -+ -+static int parse_mtd_partitions_by_type(struct mtd_info *master, -+ enum mtd_parser_type type, -+ const struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ struct mtd_part_parser *prev = NULL; -+ int ret = 0; -+ -+ while (1) { -+ struct mtd_part_parser *parser; -+ -+ parser = get_partition_parser_by_type(type, prev); -+ if (!parser) -+ break; -+ -+ ret = (*parser->parse_fn)(master, pparts, data); -+ -+ if (ret > 0) { -+ mtd_part_parser_put(parser); -+ printk(KERN_NOTICE -+ "%d %s partitions found on MTD device %s\n", -+ ret, parser->name, master->name); -+ break; -+ } -+ -+ prev = parser; -+ } -+ -+ return ret; -+} -+ - int mtd_is_partition(const struct mtd_info *mtd) - { - struct mtd_part *part; ---- a/include/linux/mtd/partitions.h -+++ b/include/linux/mtd/partitions.h -@@ -73,6 +73,10 @@ struct mtd_part_parser_data { - * Functions dealing with the various ways of partitioning the space - */ - -+enum mtd_parser_type { -+ MTD_PARSER_TYPE_DEVICE = 0, -+}; -+ - struct mtd_part_parser { - struct list_head list; - struct module *owner; -@@ -81,6 +85,7 @@ struct mtd_part_parser { - int (*parse_fn)(struct mtd_info *, const struct mtd_partition **, - struct mtd_part_parser_data *); - void (*cleanup)(const struct mtd_partition *pparts, int nr_parts); -+ enum mtd_parser_type type; - }; - - /* Container for passing around a set of parsed partitions */ diff --git a/target/linux/generic/pending-4.19/402-mtd-use-typed-mtd-parsers-for-rootfs-and-firmware-split.patch b/target/linux/generic/pending-4.19/402-mtd-use-typed-mtd-parsers-for-rootfs-and-firmware-split.patch deleted file mode 100644 index 58d2e44574..0000000000 --- a/target/linux/generic/pending-4.19/402-mtd-use-typed-mtd-parsers-for-rootfs-and-firmware-split.patch +++ /dev/null @@ -1,44 +0,0 @@ -From: Gabor Juhos -Subject: kernel/3.10: allow to use partition parsers for rootfs and firmware split - -lede-commit: 3b71cd94bc9517bc25267dccb393b07d4b54564e -Signed-off-by: Gabor Juhos ---- - drivers/mtd/mtdpart.c | 37 +++++++++++++++++++++++++++++++++++++ - include/linux/mtd/partitions.h | 2 ++ - 2 files changed, 39 insertions(+) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -759,6 +759,7 @@ run_parsers_by_type(struct mtd_part *sla - - static void split_firmware(struct mtd_info *master, struct mtd_part *part) - { -+ run_parsers_by_type(part, MTD_PARSER_TYPE_FIRMWARE); - } - - static void mtd_partition_split(struct mtd_info *master, struct mtd_part *part) -@@ -768,6 +769,12 @@ static void mtd_partition_split(struct m - if (rootfs_found) - return; - -+ if (!strcmp(part->mtd.name, "rootfs")) { -+ run_parsers_by_type(part, MTD_PARSER_TYPE_ROOTFS); -+ -+ rootfs_found = 1; -+ } -+ - if (IS_ENABLED(CONFIG_MTD_SPLIT_FIRMWARE) && - !strcmp(part->mtd.name, SPLIT_FIRMWARE_NAME) && - !of_find_property(mtd_get_of_node(&part->mtd), "compatible", NULL)) ---- a/include/linux/mtd/partitions.h -+++ b/include/linux/mtd/partitions.h -@@ -75,6 +75,8 @@ struct mtd_part_parser_data { - - enum mtd_parser_type { - MTD_PARSER_TYPE_DEVICE = 0, -+ MTD_PARSER_TYPE_ROOTFS, -+ MTD_PARSER_TYPE_FIRMWARE, - }; - - struct mtd_part_parser { diff --git a/target/linux/generic/pending-4.19/403-mtd-hook-mtdsplit-to-Kbuild.patch b/target/linux/generic/pending-4.19/403-mtd-hook-mtdsplit-to-Kbuild.patch deleted file mode 100644 index 60cf043e9b..0000000000 --- a/target/linux/generic/pending-4.19/403-mtd-hook-mtdsplit-to-Kbuild.patch +++ /dev/null @@ -1,32 +0,0 @@ -From: Gabor Juhos -Subject: [PATCH] kernel/3.10: move squashfs check from rootfs split code into a separate file - -lede-commit: d89bea92b31b4e157a0fa438e75370f089f73427 -Signed-off-by: Gabor Juhos ---- - drivers/mtd/Kconfig | 2 ++ - drivers/mtd/Makefile | 2 ++ - 2 files changed, 4 insertions(+) - ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -26,6 +26,8 @@ config MTD_SPLIT_FIRMWARE_NAME - depends on MTD_SPLIT_FIRMWARE - default "firmware" - -+source "drivers/mtd/mtdsplit/Kconfig" -+ - endmenu - - config MTD_TESTS ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -7,6 +7,8 @@ - obj-$(CONFIG_MTD) += mtd.o - mtd-y := mtdcore.o mtdsuper.o mtdconcat.o mtdpart.o mtdchar.o - -+obj-$(CONFIG_MTD_SPLIT) += mtdsplit/ -+ - obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o - obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o - obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o diff --git a/target/linux/generic/pending-4.19/404-mtd-add-more-helper-functions.patch b/target/linux/generic/pending-4.19/404-mtd-add-more-helper-functions.patch deleted file mode 100644 index e404ec1fb2..0000000000 --- a/target/linux/generic/pending-4.19/404-mtd-add-more-helper-functions.patch +++ /dev/null @@ -1,76 +0,0 @@ -From: Gabor Juhos -Subject: kernel/3.10: add separate rootfs partition parser - -lede-commit: daec7ad7688415156e2730e401503d09bd3acf91 -Signed-off-by: Gabor Juhos ---- - drivers/mtd/mtdpart.c | 29 +++++++++++++++++++++++++++++ - include/linux/mtd/mtd.h | 18 ++++++++++++++++++ - include/linux/mtd/partitions.h | 2 ++ - 3 files changed, 49 insertions(+) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -1179,6 +1179,24 @@ int mtd_is_partition(const struct mtd_in - } - EXPORT_SYMBOL_GPL(mtd_is_partition); - -+struct mtd_info *mtdpart_get_master(const struct mtd_info *mtd) -+{ -+ if (!mtd_is_partition(mtd)) -+ return (struct mtd_info *)mtd; -+ -+ return mtd_to_part(mtd)->parent; -+} -+EXPORT_SYMBOL_GPL(mtdpart_get_master); -+ -+uint64_t mtdpart_get_offset(const struct mtd_info *mtd) -+{ -+ if (!mtd_is_partition(mtd)) -+ return 0; -+ -+ return mtd_to_part(mtd)->offset; -+} -+EXPORT_SYMBOL_GPL(mtdpart_get_offset); -+ - /* Returns the size of the entire flash chip */ - uint64_t mtd_get_device_size(const struct mtd_info *mtd) - { ---- a/include/linux/mtd/mtd.h -+++ b/include/linux/mtd/mtd.h -@@ -507,6 +507,24 @@ static inline void mtd_align_erase_req(s - req->len += mtd->erasesize - mod; - } - -+static inline uint64_t mtd_roundup_to_eb(uint64_t sz, struct mtd_info *mtd) -+{ -+ if (mtd_mod_by_eb(sz, mtd) == 0) -+ return sz; -+ -+ /* Round up to next erase block */ -+ return (mtd_div_by_eb(sz, mtd) + 1) * mtd->erasesize; -+} -+ -+static inline uint64_t mtd_rounddown_to_eb(uint64_t sz, struct mtd_info *mtd) -+{ -+ if (mtd_mod_by_eb(sz, mtd) == 0) -+ return sz; -+ -+ /* Round down to the start of the current erase block */ -+ return (mtd_div_by_eb(sz, mtd)) * mtd->erasesize; -+} -+ - static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd) - { - if (mtd->writesize_shift) ---- a/include/linux/mtd/partitions.h -+++ b/include/linux/mtd/partitions.h -@@ -116,6 +116,8 @@ int mtd_is_partition(const struct mtd_in - int mtd_add_partition(struct mtd_info *master, const char *name, - long long offset, long long length); - int mtd_del_partition(struct mtd_info *master, int partno); -+struct mtd_info *mtdpart_get_master(const struct mtd_info *mtd); -+uint64_t mtdpart_get_offset(const struct mtd_info *mtd); - uint64_t mtd_get_device_size(const struct mtd_info *mtd); - - #endif diff --git a/target/linux/generic/pending-4.19/411-mtd-partial_eraseblock_write.patch b/target/linux/generic/pending-4.19/411-mtd-partial_eraseblock_write.patch deleted file mode 100644 index f945122149..0000000000 --- a/target/linux/generic/pending-4.19/411-mtd-partial_eraseblock_write.patch +++ /dev/null @@ -1,130 +0,0 @@ -From: Felix Fietkau -Subject: mtd: implement write support for partitions covering only a part of an eraseblock (buffer data that would otherwise be erased) - -lede-commit: 87a8e8ac1067f58ba831c4aae443f3655c31cd80 -Signed-off-by: Felix Fietkau ---- - drivers/mtd/mtdpart.c | 90 ++++++++++++++++++++++++++++++++++++++++++++----- - include/linux/mtd/mtd.h | 4 +++ - 2 files changed, 85 insertions(+), 9 deletions(-) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -36,6 +36,8 @@ - #include "mtdcore.h" - #include "mtdsplit/mtdsplit.h" - -+#define MTD_ERASE_PARTIAL 0x8000 /* partition only covers parts of an erase block */ -+ - /* Our partition linked list */ - static LIST_HEAD(mtd_partitions); - static DEFINE_MUTEX(mtd_partitions_mutex); -@@ -220,11 +222,77 @@ static int part_erase(struct mtd_info *m - { - struct mtd_part *part = mtd_to_part(mtd); - int ret; -+ size_t wrlen = 0; -+ u8 *erase_buf = NULL; -+ u32 erase_buf_ofs = 0; -+ bool partial_start = false; -+ -+ if (mtd->flags & MTD_ERASE_PARTIAL) { -+ size_t readlen = 0; -+ u64 mtd_ofs; -+ -+ erase_buf = kmalloc(part->parent->erasesize, GFP_ATOMIC); -+ if (!erase_buf) -+ return -ENOMEM; -+ -+ mtd_ofs = part->offset + instr->addr; -+ erase_buf_ofs = do_div(mtd_ofs, part->parent->erasesize); -+ -+ if (erase_buf_ofs > 0) { -+ instr->addr -= erase_buf_ofs; -+ ret = mtd_read(part->parent, -+ instr->addr + part->offset, -+ part->parent->erasesize, -+ &readlen, erase_buf); -+ -+ instr->len += erase_buf_ofs; -+ partial_start = true; -+ } else { -+ mtd_ofs = part->offset + part->mtd.size; -+ erase_buf_ofs = part->parent->erasesize - -+ do_div(mtd_ofs, part->parent->erasesize); -+ -+ if (erase_buf_ofs > 0) { -+ instr->len += erase_buf_ofs; -+ ret = mtd_read(part->parent, -+ part->offset + instr->addr + -+ instr->len - part->parent->erasesize, -+ part->parent->erasesize, &readlen, -+ erase_buf); -+ } else { -+ ret = 0; -+ } -+ } -+ if (ret < 0) { -+ kfree(erase_buf); -+ return ret; -+ } -+ -+ } - - instr->addr += part->offset; - ret = part->parent->_erase(part->parent, instr); - if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN) - instr->fail_addr -= part->offset; -+ -+ if (mtd->flags & MTD_ERASE_PARTIAL) { -+ if (partial_start) { -+ part->parent->_write(part->parent, -+ instr->addr, erase_buf_ofs, -+ &wrlen, erase_buf); -+ instr->addr += erase_buf_ofs; -+ } else { -+ instr->len -= erase_buf_ofs; -+ part->parent->_write(part->parent, -+ instr->addr + instr->len, -+ erase_buf_ofs, &wrlen, -+ erase_buf + -+ part->parent->erasesize - -+ erase_buf_ofs); -+ } -+ kfree(erase_buf); -+ } -+ - instr->addr -= part->offset; - - return ret; -@@ -539,19 +607,22 @@ static struct mtd_part *allocate_partiti - remainder = do_div(tmp, wr_alignment); - if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) { - /* Doesn't start on a boundary of major erase size */ -- /* FIXME: Let it be writable if it is on a boundary of -- * _minor_ erase size though */ -- slave->mtd.flags &= ~MTD_WRITEABLE; -- printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase/write block boundary -- force read-only\n", -- part->name); -+ slave->mtd.flags |= MTD_ERASE_PARTIAL; -+ if (((u32)slave->mtd.size) > parent->erasesize) -+ slave->mtd.flags &= ~MTD_WRITEABLE; -+ else -+ slave->mtd.erasesize = slave->mtd.size; - } - - tmp = part_absolute_offset(parent) + slave->offset + slave->mtd.size; - remainder = do_div(tmp, wr_alignment); - if ((slave->mtd.flags & MTD_WRITEABLE) && remainder) { -- slave->mtd.flags &= ~MTD_WRITEABLE; -- printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase/write block -- force read-only\n", -- part->name); -+ slave->mtd.flags |= MTD_ERASE_PARTIAL; -+ -+ if ((u32)slave->mtd.size > parent->erasesize) -+ slave->mtd.flags &= ~MTD_WRITEABLE; -+ else -+ slave->mtd.erasesize = slave->mtd.size; - } - - mtd_set_ooblayout(&slave->mtd, &part_ooblayout_ops); diff --git a/target/linux/generic/pending-4.19/412-mtd-partial_eraseblock_unlock.patch b/target/linux/generic/pending-4.19/412-mtd-partial_eraseblock_unlock.patch deleted file mode 100644 index e038c4e60c..0000000000 --- a/target/linux/generic/pending-4.19/412-mtd-partial_eraseblock_unlock.patch +++ /dev/null @@ -1,40 +0,0 @@ -From: Tim Harvey -Subject: mtd: allow partial block unlock - -This allows sysupgrade for devices such as the Gateworks Avila/Cambria -product families based on the ixp4xx using the redboot bootloader with -combined FIS directory and RedBoot config partitions on larger FLASH -devices with larger eraseblocks. - -This second iteration of this patch addresses previous issues: -- whitespace breakage fixed -- unlock in all scenarios -- simplification and fix logic bug - -[john@phrozen.org: this should be moved to the ixp4xx folder] - -Signed-off-by: Tim Harvey ---- - drivers/mtd/mtdpart.c | 11 ++++++++++- - 1 file changed, 10 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -307,7 +307,16 @@ static int part_lock(struct mtd_info *mt - static int part_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) - { - struct mtd_part *part = mtd_to_part(mtd); -- return part->parent->_unlock(part->parent, ofs + part->offset, len); -+ -+ ofs += part->offset; -+ -+ if (mtd->flags & MTD_ERASE_PARTIAL) { -+ /* round up len to next erasesize and round down offset to prev block */ -+ len = (mtd_div_by_eb(len, part->parent) + 1) * part->parent->erasesize; -+ ofs &= ~(part->parent->erasesize - 1); -+ } -+ -+ return part->parent->_unlock(part->parent, ofs, len); - } - - static int part_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) diff --git a/target/linux/generic/pending-4.19/419-mtd-redboot-add-of_match_table-with-DT-binding.patch b/target/linux/generic/pending-4.19/419-mtd-redboot-add-of_match_table-with-DT-binding.patch deleted file mode 100644 index fbf9a0553c..0000000000 --- a/target/linux/generic/pending-4.19/419-mtd-redboot-add-of_match_table-with-DT-binding.patch +++ /dev/null @@ -1,31 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] mtd: redboot: add of_match_table with DT binding -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This allows parsing RedBoot compatible partitions for properly described -flash device in DT. - -Signed-off-by: Rafał Miłecki ---- - ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -289,9 +289,16 @@ static int parse_redboot_partitions(stru - return ret; - } - -+static const struct of_device_id redboot_parser_of_match_table[] = { -+ { .compatible = "ecoscentric,redboot-fis-partitions" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, redboot_parser_of_match_table); -+ - static struct mtd_part_parser redboot_parser = { - .parse_fn = parse_redboot_partitions, - .name = "RedBoot", -+ .of_match_table = redboot_parser_of_match_table, - }; - module_mtd_part_parser(redboot_parser); - diff --git a/target/linux/generic/pending-4.19/420-mtd-redboot_space.patch b/target/linux/generic/pending-4.19/420-mtd-redboot_space.patch deleted file mode 100644 index 85fbe0512d..0000000000 --- a/target/linux/generic/pending-4.19/420-mtd-redboot_space.patch +++ /dev/null @@ -1,41 +0,0 @@ -From: Felix Fietkau -Subject: add patch for including unpartitioned space in the rootfs partition for redboot devices (if applicable) - -[john@phrozen.org: used by ixp and others] - -lede-commit: 394918851f84e4d00fa16eb900e7700e95091f00 -Signed-off-by: Felix Fietkau ---- - drivers/mtd/redboot.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -265,14 +265,21 @@ static int parse_redboot_partitions(stru - #endif - names += strlen(names)+1; - --#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED - if(fl->next && fl->img->flash_base + fl->img->size + master->erasesize <= fl->next->img->flash_base) { -- i++; -- parts[i].offset = parts[i-1].size + parts[i-1].offset; -- parts[i].size = fl->next->img->flash_base - parts[i].offset; -- parts[i].name = nullname; -- } -+ if (!strcmp(parts[i].name, "rootfs")) { -+ parts[i].size = fl->next->img->flash_base; -+ parts[i].size &= ~(master->erasesize - 1); -+ parts[i].size -= parts[i].offset; -+#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED -+ nrparts--; -+ } else { -+ i++; -+ parts[i].offset = parts[i-1].size + parts[i-1].offset; -+ parts[i].size = fl->next->img->flash_base - parts[i].offset; -+ parts[i].name = nullname; - #endif -+ } -+ } - tmp_fl = fl; - fl = fl->next; - kfree(tmp_fl); diff --git a/target/linux/generic/pending-4.19/430-mtd-add-myloader-partition-parser.patch b/target/linux/generic/pending-4.19/430-mtd-add-myloader-partition-parser.patch deleted file mode 100644 index 149caf3c6c..0000000000 --- a/target/linux/generic/pending-4.19/430-mtd-add-myloader-partition-parser.patch +++ /dev/null @@ -1,229 +0,0 @@ -From: Florian Fainelli -Subject: Add myloader partition table parser - -[john@phozen.org: shoud be upstreamable] - -lede-commit: d8bf22859b51faa09d22c056fe221a45d2f7a3b8 -Signed-off-by: Florian Fainelli -[add myloader.c to patch] -Signed-off-by: Adrian Schmutzler - ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -177,6 +177,22 @@ menu "Partition parsers" - source "drivers/mtd/parsers/Kconfig" - endmenu - -+config MTD_MYLOADER_PARTS -+ tristate "MyLoader partition parsing" -+ depends on ADM5120 || ATH25 || ATH79 -+ ---help--- -+ MyLoader is a bootloader which allows the user to define partitions -+ in flash devices, by putting a table in the second erase block -+ on the device, similar to a partition table. This table gives the -+ offsets and lengths of the user defined partitions. -+ -+ If you need code which can detect and parse these tables, and -+ register MTD 'partitions' corresponding to each image detected, -+ enable this option. -+ -+ You will still need the parsing functions to be called by the driver -+ for your particular device. It won't happen automatically. -+ - comment "User Modules And Translation Layers" - - # ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o - obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o - obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o -+obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o - obj-y += parsers/ - - # 'Users' - code which presents functionality to userspace. ---- /dev/null -+++ b/drivers/mtd/myloader.c -@@ -0,0 +1,181 @@ -+/* -+ * Parse MyLoader-style flash partition tables and produce a Linux partition -+ * array to match. -+ * -+ * Copyright (C) 2007-2009 Gabor Juhos -+ * -+ * This file was based on drivers/mtd/redboot.c -+ * Author: Red Hat, Inc. - David Woodhouse -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define BLOCK_LEN_MIN 0x10000 -+#define PART_NAME_LEN 32 -+ -+struct part_data { -+ struct mylo_partition_table tab; -+ char names[MYLO_MAX_PARTITIONS][PART_NAME_LEN]; -+}; -+ -+static int myloader_parse_partitions(struct mtd_info *master, -+ const struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ struct part_data *buf; -+ struct mylo_partition_table *tab; -+ struct mylo_partition *part; -+ struct mtd_partition *mtd_parts; -+ struct mtd_partition *mtd_part; -+ int num_parts; -+ int ret, i; -+ size_t retlen; -+ char *names; -+ unsigned long offset; -+ unsigned long blocklen; -+ -+ buf = vmalloc(sizeof(*buf)); -+ if (!buf) { -+ return -ENOMEM; -+ goto out; -+ } -+ tab = &buf->tab; -+ -+ blocklen = master->erasesize; -+ if (blocklen < BLOCK_LEN_MIN) -+ blocklen = BLOCK_LEN_MIN; -+ -+ offset = blocklen; -+ -+ /* Find the partition table */ -+ for (i = 0; i < 4; i++, offset += blocklen) { -+ printk(KERN_DEBUG "%s: searching for MyLoader partition table" -+ " at offset 0x%lx\n", master->name, offset); -+ -+ ret = mtd_read(master, offset, sizeof(*buf), &retlen, -+ (void *)buf); -+ if (ret) -+ goto out_free_buf; -+ -+ if (retlen != sizeof(*buf)) { -+ ret = -EIO; -+ goto out_free_buf; -+ } -+ -+ /* Check for Partition Table magic number */ -+ if (tab->magic == le32_to_cpu(MYLO_MAGIC_PARTITIONS)) -+ break; -+ -+ } -+ -+ if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) { -+ printk(KERN_DEBUG "%s: no MyLoader partition table found\n", -+ master->name); -+ ret = 0; -+ goto out_free_buf; -+ } -+ -+ /* The MyLoader and the Partition Table is always present */ -+ num_parts = 2; -+ -+ /* Detect number of used partitions */ -+ for (i = 0; i < MYLO_MAX_PARTITIONS; i++) { -+ part = &tab->partitions[i]; -+ -+ if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE) -+ continue; -+ -+ num_parts++; -+ } -+ -+ mtd_parts = kzalloc((num_parts * sizeof(*mtd_part) + -+ num_parts * PART_NAME_LEN), GFP_KERNEL); -+ -+ if (!mtd_parts) { -+ ret = -ENOMEM; -+ goto out_free_buf; -+ } -+ -+ mtd_part = mtd_parts; -+ names = (char *)&mtd_parts[num_parts]; -+ -+ strncpy(names, "myloader", PART_NAME_LEN); -+ mtd_part->name = names; -+ mtd_part->offset = 0; -+ mtd_part->size = offset; -+ mtd_part->mask_flags = MTD_WRITEABLE; -+ mtd_part++; -+ names += PART_NAME_LEN; -+ -+ strncpy(names, "partition_table", PART_NAME_LEN); -+ mtd_part->name = names; -+ mtd_part->offset = offset; -+ mtd_part->size = blocklen; -+ mtd_part->mask_flags = MTD_WRITEABLE; -+ mtd_part++; -+ names += PART_NAME_LEN; -+ -+ for (i = 0; i < MYLO_MAX_PARTITIONS; i++) { -+ part = &tab->partitions[i]; -+ -+ if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE) -+ continue; -+ -+ if ((buf->names[i][0]) && (buf->names[i][0] != '\xff')) -+ strncpy(names, buf->names[i], PART_NAME_LEN); -+ else -+ snprintf(names, PART_NAME_LEN, "partition%d", i); -+ -+ mtd_part->offset = le32_to_cpu(part->addr); -+ mtd_part->size = le32_to_cpu(part->size); -+ mtd_part->name = names; -+ mtd_part++; -+ names += PART_NAME_LEN; -+ } -+ -+ *pparts = mtd_parts; -+ ret = num_parts; -+ -+ out_free_buf: -+ vfree(buf); -+ out: -+ return ret; -+} -+ -+static struct mtd_part_parser myloader_mtd_parser = { -+ .owner = THIS_MODULE, -+ .parse_fn = myloader_parse_partitions, -+ .name = "MyLoader", -+}; -+ -+static int __init myloader_mtd_parser_init(void) -+{ -+ register_mtd_parser(&myloader_mtd_parser); -+ -+ return 0; -+} -+ -+static void __exit myloader_mtd_parser_exit(void) -+{ -+ deregister_mtd_parser(&myloader_mtd_parser); -+} -+ -+module_init(myloader_mtd_parser_init); -+module_exit(myloader_mtd_parser_exit); -+ -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_DESCRIPTION("Parsing code for MyLoader partition tables"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/generic/pending-4.19/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch b/target/linux/generic/pending-4.19/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch deleted file mode 100644 index d54c284c34..0000000000 --- a/target/linux/generic/pending-4.19/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch +++ /dev/null @@ -1,68 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] mtd: bcm47xxpart: check for bad blocks when calculating offsets - -Signed-off-by: Rafał Miłecki ---- - ---- a/drivers/mtd/parsers/parser_trx.c -+++ b/drivers/mtd/parsers/parser_trx.c -@@ -29,6 +29,33 @@ struct trx_header { - uint32_t offset[3]; - } __packed; - -+/* -+ * Calculate real end offset (address) for a given amount of data. It checks -+ * all blocks skipping bad ones. -+ */ -+static size_t parser_trx_real_offset(struct mtd_info *mtd, size_t bytes) -+{ -+ size_t real_offset = 0; -+ -+ if (mtd_block_isbad(mtd, real_offset)) -+ pr_warn("Base offset shouldn't be at bad block"); -+ -+ while (bytes >= mtd->erasesize) { -+ bytes -= mtd->erasesize; -+ real_offset += mtd->erasesize; -+ while (mtd_block_isbad(mtd, real_offset)) { -+ real_offset += mtd->erasesize; -+ -+ if (real_offset >= mtd->size) -+ return real_offset - mtd->erasesize; -+ } -+ } -+ -+ real_offset += bytes; -+ -+ return real_offset; -+} -+ - static const char *parser_trx_data_part_name(struct mtd_info *master, - size_t offset) - { -@@ -83,21 +110,21 @@ static int parser_trx_parse(struct mtd_i - if (trx.offset[2]) { - part = &parts[curr_part++]; - part->name = "loader"; -- part->offset = trx.offset[i]; -+ part->offset = parser_trx_real_offset(mtd, trx.offset[i]); - i++; - } - - if (trx.offset[i]) { - part = &parts[curr_part++]; - part->name = "linux"; -- part->offset = trx.offset[i]; -+ part->offset = parser_trx_real_offset(mtd, trx.offset[i]); - i++; - } - - if (trx.offset[i]) { - part = &parts[curr_part++]; -- part->name = parser_trx_data_part_name(mtd, trx.offset[i]); -- part->offset = trx.offset[i]; -+ part->offset = parser_trx_real_offset(mtd, trx.offset[i]); -+ part->name = parser_trx_data_part_name(mtd, part->offset); - i++; - } - diff --git a/target/linux/generic/pending-4.19/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch b/target/linux/generic/pending-4.19/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch deleted file mode 100644 index a6d0828b99..0000000000 --- a/target/linux/generic/pending-4.19/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch +++ /dev/null @@ -1,37 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: mtd: bcm47xxpart: detect T_Meter partition - -It can be found on many Netgear devices. It consists of many 0x30 blocks -starting with 4D 54. - -Signed-off-by: Rafał Miłecki ---- - drivers/mtd/bcm47xxpart.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/mtd/bcm47xxpart.c -+++ b/drivers/mtd/bcm47xxpart.c -@@ -39,6 +39,7 @@ - #define NVRAM_HEADER 0x48534C46 /* FLSH */ - #define POT_MAGIC1 0x54544f50 /* POTT */ - #define POT_MAGIC2 0x504f /* OP */ -+#define T_METER_MAGIC 0x4D540000 /* MT */ - #define ML_MAGIC1 0x39685a42 - #define ML_MAGIC2 0x26594131 - #define TRX_MAGIC 0x30524448 -@@ -182,6 +183,15 @@ static int bcm47xxpart_parse(struct mtd_ - MTD_WRITEABLE); - continue; - } -+ -+ /* T_Meter */ -+ if ((le32_to_cpu(buf[0x000 / 4]) & 0xFFFF0000) == T_METER_MAGIC && -+ (le32_to_cpu(buf[0x030 / 4]) & 0xFFFF0000) == T_METER_MAGIC && -+ (le32_to_cpu(buf[0x060 / 4]) & 0xFFFF0000) == T_METER_MAGIC) { -+ bcm47xxpart_add_part(&parts[curr_part++], "T_Meter", offset, -+ MTD_WRITEABLE); -+ continue; -+ } - - /* TRX */ - if (buf[0x000 / 4] == TRX_MAGIC) { diff --git a/target/linux/generic/pending-4.19/435-mtd-add-routerbootpart-parser-config.patch b/target/linux/generic/pending-4.19/435-mtd-add-routerbootpart-parser-config.patch deleted file mode 100644 index 5637cd54af..0000000000 --- a/target/linux/generic/pending-4.19/435-mtd-add-routerbootpart-parser-config.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 4437e01fb6bca63fccdba5d6c44888b0935885c2 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= -Date: Tue, 24 Mar 2020 11:45:07 +0100 -Subject: [PATCH] generic: routerboot partition build bits (4.19) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch adds routerbootpart kernel build bits - -Signed-off-by: Thibaut VARÈNE ---- - drivers/mtd/parsers/Kconfig | 9 +++++++++ - drivers/mtd/parsers/Makefile | 1 + - 2 files changed, 10 insertions(+) - ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -14,3 +14,12 @@ config MTD_SHARPSL_PARTS - This provides the read-only FTL logic necessary to read the partition - table from the NAND flash of Sharp SL Series (Zaurus) and the MTD - partition parser using this code. -+ -+config MTD_ROUTERBOOT_PARTS -+ tristate "RouterBoot flash partition parser" -+ depends on MTD && OF -+ help -+ MikroTik RouterBoot is implemented as a multi segment system on the -+ flash, some of which are fixed and some of which are located at -+ variable offsets. This parser handles both cases via properly -+ formatted DTS. ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -1,2 +1,3 @@ - obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o - obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o -+obj-$(CONFIG_MTD_ROUTERBOOT_PARTS) += routerbootpart.o diff --git a/target/linux/generic/pending-4.19/450-mtd-spi-nor-allow-NOR-driver-to-write-fewer-bytes-th.patch b/target/linux/generic/pending-4.19/450-mtd-spi-nor-allow-NOR-driver-to-write-fewer-bytes-th.patch deleted file mode 100644 index 4d64fca90b..0000000000 --- a/target/linux/generic/pending-4.19/450-mtd-spi-nor-allow-NOR-driver-to-write-fewer-bytes-th.patch +++ /dev/null @@ -1,36 +0,0 @@ -From: Felix Fietkau -Date: Thu, 22 Feb 2018 11:11:57 +0100 -Subject: [PATCH] mtd: spi-nor: allow NOR driver to write fewer bytes than - requested - -The write size can be constrained by the maximum message/transfer size -of the SPI controller. Only check for ret = 0 to avoid an infinite loop. - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1459,7 +1459,7 @@ static int spi_nor_write(struct mtd_info - - write_enable(nor); - ret = nor->write(nor, addr, page_remain, buf + i); -- if (ret < 0) -+ if (ret <= 0) - goto write_err; - written = ret; - -@@ -1468,13 +1468,6 @@ static int spi_nor_write(struct mtd_info - goto write_err; - *retlen += written; - i += written; -- if (written != page_remain) { -- dev_err(nor->dev, -- "While writing %zu bytes written %zd bytes\n", -- page_remain, written); -- ret = -EIO; -- goto write_err; -- } - } - - write_err: diff --git a/target/linux/generic/pending-4.19/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch b/target/linux/generic/pending-4.19/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch deleted file mode 100644 index 88d386302a..0000000000 --- a/target/linux/generic/pending-4.19/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch +++ /dev/null @@ -1,25 +0,0 @@ -From: Felix Fietkau -Subject: kernel: disable cfi cmdset 0002 erase suspend - -on some platforms, erase suspend leads to data corruption and lockups when write -ops collide with erase ops. this has been observed on the buffalo wzr-hp-g300nh. -rather than play whack-a-mole with a hard to reproduce issue on a variety of devices, -simply disable erase suspend, as it will usually not produce any useful gain on -the small filesystems used on embedded hardware. - -Signed-off-by: Felix Fietkau ---- - drivers/mtd/chips/cfi_cmdset_0002.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -812,7 +812,7 @@ static int get_chip(struct map_info *map - return 0; - - case FL_ERASING: -- if (!cfip || !(cfip->EraseSuspend & (0x1|0x2)) || -+ if (1 /* no suspend */ || !cfip || !(cfip->EraseSuspend & (0x1|0x2)) || - !(mode == FL_READY || mode == FL_POINT || - (mode == FL_WRITING && (cfip->EraseSuspend & 0x2)))) - goto sleep; diff --git a/target/linux/generic/pending-4.19/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch b/target/linux/generic/pending-4.19/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch deleted file mode 100644 index 1b07791eca..0000000000 --- a/target/linux/generic/pending-4.19/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch +++ /dev/null @@ -1,17 +0,0 @@ -From: George Kashperko -Subject: Issue map read after Write Buffer Load command to ensure chip is ready to receive data. - -Signed-off-by: George Kashperko ---- - drivers/mtd/chips/cfi_cmdset_0002.c | 1 + - 1 file changed, 1 insertion(+) ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -1838,6 +1838,7 @@ static int __xipram do_write_buffer(stru - - /* Write Buffer Load */ - map_write(map, CMD(0x25), cmd_adr); -+ (void) map_read(map, cmd_adr); - - chip->state = FL_WRITING_TO_BUFFER; - diff --git a/target/linux/generic/pending-4.19/465-m25p80-mx-disable-software-protection.patch b/target/linux/generic/pending-4.19/465-m25p80-mx-disable-software-protection.patch deleted file mode 100644 index 3172c223f2..0000000000 --- a/target/linux/generic/pending-4.19/465-m25p80-mx-disable-software-protection.patch +++ /dev/null @@ -1,18 +0,0 @@ -From: Felix Fietkau -Subject: Disable software protection bits for Macronix flashes. - -Signed-off-by: Felix Fietkau ---- - drivers/mtd/spi-nor/spi-nor.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -2737,6 +2737,7 @@ static int spi_nor_init(struct spi_nor * - */ - if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL || - JEDEC_MFR(nor->info) == SNOR_MFR_INTEL || -+ JEDEC_MFR(nor->info) == SNOR_MFR_MACRONIX || - JEDEC_MFR(nor->info) == SNOR_MFR_SST || - nor->info->flags & SPI_NOR_HAS_LOCK) { - write_enable(nor); diff --git a/target/linux/generic/pending-4.19/466-Revert-mtd-spi-nor-fix-Spansion-regressions-aliased-.patch b/target/linux/generic/pending-4.19/466-Revert-mtd-spi-nor-fix-Spansion-regressions-aliased-.patch deleted file mode 100644 index f6a98af6ac..0000000000 --- a/target/linux/generic/pending-4.19/466-Revert-mtd-spi-nor-fix-Spansion-regressions-aliased-.patch +++ /dev/null @@ -1,37 +0,0 @@ -From: Matthias Schiffer -Date: Tue, 9 Jan 2018 20:41:48 +0100 -Subject: [PATCH] Revert "mtd: spi-nor: fix Spansion regressions (aliased with - Winbond)" - -This reverts commit 67b9bcd36906e12a15ffec19463afbbd6a41660e. - -The underlying issue breaking Spansion flash has been fixed with "mtd: spi-nor: -wait until lock/unlock operations are ready" and "mtd: spi-nor: wait for SR_WIP -to clear on initial unlock", so we can support unlocking for Winbond flash -again. - -Signed-off-by: Matthias Schiffer ---- - drivers/mtd/spi-nor/spi-nor.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -2739,6 +2739,7 @@ static int spi_nor_init(struct spi_nor * - JEDEC_MFR(nor->info) == SNOR_MFR_INTEL || - JEDEC_MFR(nor->info) == SNOR_MFR_MACRONIX || - JEDEC_MFR(nor->info) == SNOR_MFR_SST || -+ JEDEC_MFR(nor->info) == SNOR_MFR_WINBOND || - nor->info->flags & SPI_NOR_HAS_LOCK) { - write_enable(nor); - write_sr(nor, 0); -@@ -2875,7 +2876,8 @@ int spi_nor_scan(struct spi_nor *nor, co - - /* NOR protection support for STmicro/Micron chips and similar */ - if (JEDEC_MFR(info) == SNOR_MFR_MICRON || -- info->flags & SPI_NOR_HAS_LOCK) { -+ JEDEC_MFR(info) == SNOR_MFR_WINBOND || -+ info->flags & SPI_NOR_HAS_LOCK) { - nor->flash_lock = stm_lock; - nor->flash_unlock = stm_unlock; - nor->flash_is_locked = stm_is_locked; diff --git a/target/linux/generic/pending-4.19/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch b/target/linux/generic/pending-4.19/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch deleted file mode 100644 index 695c38cf0f..0000000000 --- a/target/linux/generic/pending-4.19/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch +++ /dev/null @@ -1,56 +0,0 @@ -From: Felix Fietkau -Date: Sat, 4 Nov 2017 07:40:23 +0100 -Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on - flash size - -Some devices need 4K sectors to be able to deal with small flash chips. -For instance, w25x05 is 64 KiB in size, and without 4K sectors, the -entire chip is just one erase block. -On bigger flash chip sizes, using 4K sectors can significantly slow down -many operations, including using a writable filesystem. There are several -platforms where it makes sense to use a single kernel on both kinds of -devices. - -To support this properly, allow configuring an upper flash chip size -limit for 4K sectors support. - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/mtd/spi-nor/Kconfig -+++ b/drivers/mtd/spi-nor/Kconfig -@@ -39,6 +39,17 @@ config SPI_ASPEED_SMC - and support for the SPI flash memory controller (SPI) for - the host firmware. The implementation only supports SPI NOR. - -+config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT -+ int "Maximum flash chip size to use 4K sectors on (in KiB)" -+ depends on MTD_SPI_NOR_USE_4K_SECTORS -+ default "4096" -+ help -+ There are many flash chips that support 4K sectors, but are so large -+ that using them significantly slows down writing large amounts of -+ data or using a writable filesystem. -+ Any flash chip larger than the size specified in this option will -+ not use 4K sectors. -+ - config SPI_ATMEL_QUADSPI - tristate "Atmel Quad SPI Controller" - depends on ARCH_AT91 || (ARM && COMPILE_TEST && !ARCH_EBSA110) ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -2651,10 +2651,12 @@ static int spi_nor_select_erase(struct s - - #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS - /* prefer "small sector" erase if possible */ -- if (info->flags & SECT_4K) { -+ if ((info->flags & SECT_4K) && (mtd->size <= -+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) { - nor->erase_opcode = SPINOR_OP_BE_4K; - mtd->erasesize = 4096; -- } else if (info->flags & SECT_4K_PMC) { -+ } else if ((info->flags & SECT_4K_PMC) && (mtd->size <= -+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) { - nor->erase_opcode = SPINOR_OP_BE_4K_PMC; - mtd->erasesize = 4096; - } else diff --git a/target/linux/generic/pending-4.19/475-mtd-spi-nor-Add-Winbond-w25q128jv-support.patch b/target/linux/generic/pending-4.19/475-mtd-spi-nor-Add-Winbond-w25q128jv-support.patch deleted file mode 100644 index 72c4470332..0000000000 --- a/target/linux/generic/pending-4.19/475-mtd-spi-nor-Add-Winbond-w25q128jv-support.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: Robert Marko -To: linux-mtd@lists.infradead.org -Subject: mtd: spi-nor: Add Winbond w25q128jv support -Date: Mon, 25 Jun 2018 13:17:48 +0200 - -Datasheet: -http://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf - -Testing done on Mikrotik Routerboard wAP R board. -It does not support Dual or Quad modes. - -Signed-off-by: Robert Marko ---- - -Changes in v2: - - Correct the title ---- - drivers/mtd/spi-nor/spi-nor.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1241,6 +1241,11 @@ static const struct flash_info spi_nor_i - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - }, -+ { -+ "w25q128jv", INFO(0xef7018, 0, 64 * 1024, 256, -+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | -+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) -+ }, - { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, - { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, - { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, diff --git a/target/linux/generic/pending-4.19/476-mtd-spi-nor-add-eon-en25q128.patch b/target/linux/generic/pending-4.19/476-mtd-spi-nor-add-eon-en25q128.patch deleted file mode 100644 index 69ac17ce4c..0000000000 --- a/target/linux/generic/pending-4.19/476-mtd-spi-nor-add-eon-en25q128.patch +++ /dev/null @@ -1,18 +0,0 @@ -From: Piotr Dymacz -Subject: kernel/mtd: add support for EON EN25Q128 - -Signed-off-by: Piotr Dymacz ---- - drivers/mtd/spi-nor/spi-nor.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -994,6 +994,7 @@ static const struct flash_info spi_nor_i - { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) }, - { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, - { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, -+ { "en25q128", INFO(0x1c3018, 0, 64 * 1024, 256, SECT_4K) }, - { "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64, 0) }, - { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, 0) }, - { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) }, diff --git a/target/linux/generic/pending-4.19/477-mtd-add-spi-nor-add-mx25u3235f.patch b/target/linux/generic/pending-4.19/477-mtd-add-spi-nor-add-mx25u3235f.patch deleted file mode 100644 index 0648b12e12..0000000000 --- a/target/linux/generic/pending-4.19/477-mtd-add-spi-nor-add-mx25u3235f.patch +++ /dev/null @@ -1,18 +0,0 @@ -From: André Valentin -Subject: linux/mtd: add id for mx25u3235f needed by ZyXEL NBG6817 - -Signed-off-by: André Valentin ---- - drivers/mtd/spi-nor/spi-nor.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1083,6 +1083,7 @@ static const struct flash_info spi_nor_i - { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, - { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, -+ { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, 0) }, - { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, - { "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) }, - { "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) }, diff --git a/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-eon-en25qh64.patch b/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-eon-en25qh64.patch deleted file mode 100644 index 6bb7754733..0000000000 --- a/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-eon-en25qh64.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -996,6 +996,7 @@ static const struct flash_info spi_nor_i - { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, - { "en25q128", INFO(0x1c3018, 0, 64 * 1024, 256, SECT_4K) }, - { "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64, 0) }, -+ { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128, 0) }, - { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, 0) }, - { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) }, - { "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128, SECT_4K) }, diff --git a/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-xtx-xt25f128b.patch b/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-xtx-xt25f128b.patch deleted file mode 100644 index da60939bb3..0000000000 --- a/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-xtx-xt25f128b.patch +++ /dev/null @@ -1,42 +0,0 @@ -From patchwork Thu Feb 6 17:19:41 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Daniel Golle -X-Patchwork-Id: 1234465 -Date: Thu, 6 Feb 2020 19:19:41 +0200 -From: Daniel Golle -To: linux-mtd@lists.infradead.org -Subject: [PATCH v2] mtd: spi-nor: Add support for xt25f128b chip -Message-ID: <20200206171941.GA2398@makrotopia.org> -MIME-Version: 1.0 -Content-Disposition: inline -List-Subscribe: , - -Cc: Eitan Cohen , Piotr Dymacz , - Tudor Ambarus -Sender: "linux-mtd" -Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org - -Add XT25F128B made by XTX Technology (Shenzhen) Limited. -This chip supports dual and quad read and uniform 4K-byte erase. -Verified on Teltonika RUT955 which comes with XT25F128B in recent -versions of the device. - -Signed-off-by: Daniel Golle ---- - drivers/mtd/spi-nor/spi-nor.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1275,6 +1275,9 @@ static const struct flash_info spi_nor_i - /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ - { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, -+ -+ /* XTX Technology (Shenzhen) Limited */ -+ { "xt25f128b", INFO(0x0B4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { }, - }; - diff --git a/target/linux/generic/pending-4.19/480-mtd-set-rootfs-to-be-root-dev.patch b/target/linux/generic/pending-4.19/480-mtd-set-rootfs-to-be-root-dev.patch deleted file mode 100644 index dce0432fac..0000000000 --- a/target/linux/generic/pending-4.19/480-mtd-set-rootfs-to-be-root-dev.patch +++ /dev/null @@ -1,38 +0,0 @@ -From: Gabor Juhos -Subject: kernel/3.1[02]: move MTD root device setup code to mtdcore - -The current code only allows to automatically set -root device on MTD partitions. Move the code to MTD -core to allow to use it with all MTD devices. - -Signed-off-by: Gabor Juhos ---- - drivers/mtd/mtdcore.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/mtd/mtdcore.c -+++ b/drivers/mtd/mtdcore.c -@@ -41,6 +41,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -593,6 +594,15 @@ int add_mtd_device(struct mtd_info *mtd) - of this try_ nonsense, and no bitching about it - either. :) */ - __module_get(THIS_MODULE); -+ -+ if (!strcmp(mtd->name, "rootfs") && -+ IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) && -+ ROOT_DEV == 0) { -+ pr_notice("mtd: device %d (%s) set to be root filesystem\n", -+ mtd->index, mtd->name); -+ ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, mtd->index); -+ } -+ - return 0; - - fail_added: diff --git a/target/linux/generic/pending-4.19/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch b/target/linux/generic/pending-4.19/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch deleted file mode 100644 index 69c0e66d99..0000000000 --- a/target/linux/generic/pending-4.19/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch +++ /dev/null @@ -1,24 +0,0 @@ -From d68b4aa22e8c625685bfad642dd7337948dc0ad1 Mon Sep 17 00:00:00 2001 -From: Koen Vandeputte -Date: Mon, 6 Jan 2020 13:07:56 +0100 -Subject: [PATCH] mtd: spi-nor: add support for Gigadevice GD25D05 - -Signed-off-by: Koen Vandeputte ---- - drivers/mtd/spi-nor/spi-nor.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1017,6 +1017,11 @@ static const struct flash_info spi_nor_i - - /* GigaDevice */ - { -+ "gd25d05", INFO(0xc84010, 0, 64 * 1024, 1, -+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | -+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) -+ }, -+ { - "gd25q16", INFO(0xc84015, 0, 64 * 1024, 32, - SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | - SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) diff --git a/target/linux/generic/pending-4.19/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch b/target/linux/generic/pending-4.19/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch deleted file mode 100644 index 79d18d036f..0000000000 --- a/target/linux/generic/pending-4.19/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch +++ /dev/null @@ -1,97 +0,0 @@ -From: Daniel Golle -Subject: ubi: auto-attach mtd device named "ubi" or "data" on boot - -Signed-off-by: Daniel Golle ---- - drivers/mtd/ubi/build.c | 36 ++++++++++++++++++++++++++++++++++++ - 1 file changed, 36 insertions(+) - ---- a/drivers/mtd/ubi/build.c -+++ b/drivers/mtd/ubi/build.c -@@ -1181,6 +1181,73 @@ static struct mtd_info * __init open_mtd - return mtd; - } - -+/* -+ * This function tries attaching mtd partitions named either "ubi" or "data" -+ * during boot. -+ */ -+static void __init ubi_auto_attach(void) -+{ -+ int err; -+ struct mtd_info *mtd; -+ loff_t offset = 0; -+ size_t len; -+ char magic[4]; -+ -+ /* try attaching mtd device named "ubi" or "data" */ -+ mtd = open_mtd_device("ubi"); -+ if (IS_ERR(mtd)) -+ mtd = open_mtd_device("data"); -+ -+ if (IS_ERR(mtd)) -+ return; -+ -+ /* get the first not bad block */ -+ if (mtd_can_have_bb(mtd)) -+ while (mtd_block_isbad(mtd, offset)) { -+ offset += mtd->erasesize; -+ -+ if (offset > mtd->size) { -+ pr_err("UBI error: Failed to find a non-bad " -+ "block on mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ } -+ -+ /* check if the read from flash was successful */ -+ err = mtd_read(mtd, offset, 4, &len, (void *) magic); -+ if ((err && !mtd_is_bitflip(err)) || len != 4) { -+ pr_err("UBI error: unable to read from mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ -+ /* check for a valid ubi magic */ -+ if (strncmp(magic, "UBI#", 4)) { -+ pr_err("UBI error: no valid UBI magic found inside mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ -+ /* don't auto-add media types where UBI doesn't makes sense */ -+ if (mtd->type != MTD_NANDFLASH && -+ mtd->type != MTD_NORFLASH && -+ mtd->type != MTD_DATAFLASH && -+ mtd->type != MTD_MLCNANDFLASH) -+ goto cleanup; -+ -+ mutex_lock(&ubi_devices_mutex); -+ pr_notice("UBI: auto-attach mtd%d\n", mtd->index); -+ err = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 0); -+ mutex_unlock(&ubi_devices_mutex); -+ if (err < 0) { -+ pr_err("UBI error: cannot attach mtd%d\n", mtd->index); -+ goto cleanup; -+ } -+ -+ return; -+ -+cleanup: -+ put_mtd_device(mtd); -+} -+ - static int __init ubi_init(void) - { - int err, i, k; -@@ -1264,6 +1331,12 @@ static int __init ubi_init(void) - } - } - -+ /* auto-attach mtd devices only if built-in to the kernel and no ubi.mtd -+ * parameter was given */ -+ if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) && -+ !ubi_is_module() && !mtd_devs) -+ ubi_auto_attach(); -+ - err = ubiblock_init(); - if (err) { - pr_err("UBI error: block: cannot initialize, error %d\n", err); diff --git a/target/linux/generic/pending-4.19/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-4.19/491-ubi-auto-create-ubiblock-device-for-rootfs.patch deleted file mode 100644 index cb2d525610..0000000000 --- a/target/linux/generic/pending-4.19/491-ubi-auto-create-ubiblock-device-for-rootfs.patch +++ /dev/null @@ -1,66 +0,0 @@ -From: Daniel Golle -Subject: ubi: auto-create ubiblock device for rootfs - -Signed-off-by: Daniel Golle ---- - drivers/mtd/ubi/block.c | 42 ++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 42 insertions(+) - ---- a/drivers/mtd/ubi/block.c -+++ b/drivers/mtd/ubi/block.c -@@ -633,6 +633,44 @@ static void __init ubiblock_create_from_ - } - } - -+#define UBIFS_NODE_MAGIC 0x06101831 -+static inline int ubi_vol_is_ubifs(struct ubi_volume_desc *desc) -+{ -+ int ret; -+ uint32_t magic_of, magic; -+ ret = ubi_read(desc, 0, (char *)&magic_of, 0, 4); -+ if (ret) -+ return 0; -+ magic = le32_to_cpu(magic_of); -+ return magic == UBIFS_NODE_MAGIC; -+} -+ -+static void __init ubiblock_create_auto_rootfs(void) -+{ -+ int ubi_num, ret, is_ubifs; -+ struct ubi_volume_desc *desc; -+ struct ubi_volume_info vi; -+ -+ for (ubi_num = 0; ubi_num < UBI_MAX_DEVICES; ubi_num++) { -+ desc = ubi_open_volume_nm(ubi_num, "rootfs", UBI_READONLY); -+ if (IS_ERR(desc)) -+ continue; -+ -+ ubi_get_volume_info(desc, &vi); -+ is_ubifs = ubi_vol_is_ubifs(desc); -+ ubi_close_volume(desc); -+ if (is_ubifs) -+ break; -+ -+ ret = ubiblock_create(&vi); -+ if (ret) -+ pr_err("UBI error: block: can't add '%s' volume, err=%d\n", -+ vi.name, ret); -+ /* always break if we get here */ -+ break; -+ } -+} -+ - static void ubiblock_remove_all(void) - { - struct ubiblock *next; -@@ -665,6 +703,10 @@ int __init ubiblock_init(void) - */ - ubiblock_create_from_param(); - -+ /* auto-attach "rootfs" volume if existing and non-ubifs */ -+ if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV)) -+ ubiblock_create_auto_rootfs(); -+ - /* - * Block devices are only created upon user requests, so we ignore - * existing volumes. diff --git a/target/linux/generic/pending-4.19/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch b/target/linux/generic/pending-4.19/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch deleted file mode 100644 index b76e83e4a3..0000000000 --- a/target/linux/generic/pending-4.19/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch +++ /dev/null @@ -1,51 +0,0 @@ -From: Daniel Golle -Subject: try auto-mounting ubi0:rootfs in init/do_mounts.c - -Signed-off-by: Daniel Golle ---- - init/do_mounts.c | 26 +++++++++++++++++++++++++- - 1 file changed, 25 insertions(+), 1 deletion(-) - ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -427,7 +427,28 @@ retry: - out: - put_page(page); - } -- -+ -+static int __init mount_ubi_rootfs(void) -+{ -+ int flags = MS_SILENT; -+ int err, tried = 0; -+ -+ while (tried < 2) { -+ err = do_mount_root("ubi0:rootfs", "ubifs", flags, \ -+ root_mount_data); -+ switch (err) { -+ case -EACCES: -+ flags |= MS_RDONLY; -+ tried++; -+ break; -+ default: -+ return err; -+ } -+ } -+ -+ return -EINVAL; -+} -+ - #ifdef CONFIG_ROOT_NFS - - #define NFSROOT_TIMEOUT_MIN 5 -@@ -521,6 +542,10 @@ void __init mount_root(void) - change_floppy("root floppy"); - } - #endif -+#ifdef CONFIG_MTD_ROOTFS_ROOT_DEV -+ if (!mount_ubi_rootfs()) -+ return; -+#endif - #ifdef CONFIG_BLOCK - { - int err = create_dev("/dev/root", ROOT_DEV); diff --git a/target/linux/generic/pending-4.19/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch b/target/linux/generic/pending-4.19/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch deleted file mode 100644 index 1bb53ada7f..0000000000 --- a/target/linux/generic/pending-4.19/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: Daniel Golle -Subject: ubi: set ROOT_DEV to ubiblock "rootfs" if unset - -Signed-off-by: Daniel Golle ---- - drivers/mtd/ubi/block.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/mtd/ubi/block.c -+++ b/drivers/mtd/ubi/block.c -@@ -50,6 +50,7 @@ - #include - #include - #include -+#include - - #include "ubi-media.h" - #include "ubi.h" -@@ -445,6 +446,15 @@ int ubiblock_create(struct ubi_volume_in - dev_info(disk_to_dev(dev->gd), "created from ubi%d:%d(%s)", - dev->ubi_num, dev->vol_id, vi->name); - mutex_unlock(&devices_mutex); -+ -+ if (!strcmp(vi->name, "rootfs") && -+ IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) && -+ ROOT_DEV == 0) { -+ pr_notice("ubiblock: device ubiblock%d_%d (%s) set to be root filesystem\n", -+ dev->ubi_num, dev->vol_id, vi->name); -+ ROOT_DEV = MKDEV(gd->major, gd->first_minor); -+ } -+ - return 0; - - out_free_queue: diff --git a/target/linux/generic/pending-4.19/494-mtd-ubi-add-EOF-marker-support.patch b/target/linux/generic/pending-4.19/494-mtd-ubi-add-EOF-marker-support.patch deleted file mode 100644 index e38f11e592..0000000000 --- a/target/linux/generic/pending-4.19/494-mtd-ubi-add-EOF-marker-support.patch +++ /dev/null @@ -1,60 +0,0 @@ -From: Gabor Juhos -Subject: mtd: add EOF marker support to the UBI layer - -Signed-off-by: Gabor Juhos ---- - drivers/mtd/ubi/attach.c | 25 ++++++++++++++++++++++--- - drivers/mtd/ubi/ubi.h | 1 + - 2 files changed, 23 insertions(+), 3 deletions(-) - ---- a/drivers/mtd/ubi/attach.c -+++ b/drivers/mtd/ubi/attach.c -@@ -939,6 +939,13 @@ static bool vol_ignored(int vol_id) - #endif - } - -+static bool ec_hdr_has_eof(struct ubi_ec_hdr *ech) -+{ -+ return ech->padding1[0] == 'E' && -+ ech->padding1[1] == 'O' && -+ ech->padding1[2] == 'F'; -+} -+ - /** - * scan_peb - scan and process UBI headers of a PEB. - * @ubi: UBI device description object -@@ -971,9 +978,21 @@ static int scan_peb(struct ubi_device *u - return 0; - } - -- err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0); -- if (err < 0) -- return err; -+ if (!ai->eof_found) { -+ err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0); -+ if (err < 0) -+ return err; -+ -+ if (ec_hdr_has_eof(ech)) { -+ pr_notice("UBI: EOF marker found, PEBs from %d will be erased\n", -+ pnum); -+ ai->eof_found = true; -+ } -+ } -+ -+ if (ai->eof_found) -+ err = UBI_IO_FF_BITFLIPS; -+ - switch (err) { - case 0: - break; ---- a/drivers/mtd/ubi/ubi.h -+++ b/drivers/mtd/ubi/ubi.h -@@ -789,6 +789,7 @@ struct ubi_attach_info { - int mean_ec; - uint64_t ec_sum; - int ec_count; -+ bool eof_found; - struct kmem_cache *aeb_slab_cache; - struct ubi_ec_hdr *ech; - struct ubi_vid_io_buf *vidb; diff --git a/target/linux/generic/pending-4.19/495-mtd-core-add-get_mtd_device_by_node.patch b/target/linux/generic/pending-4.19/495-mtd-core-add-get_mtd_device_by_node.patch deleted file mode 100644 index 1446ca2abc..0000000000 --- a/target/linux/generic/pending-4.19/495-mtd-core-add-get_mtd_device_by_node.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 1bd1b740f208d1cf4071932cc51860d37266c402 Mon Sep 17 00:00:00 2001 -From: Bernhard Frauendienst -Date: Sat, 1 Sep 2018 00:30:11 +0200 -Subject: [PATCH 495/497] mtd: core: add get_mtd_device_by_node - -Add function to retrieve a mtd device by its OF node. Since drivers can -assign arbitrary names to mtd devices in the absence of a label -property, there is no other reliable way to retrieve a mtd device for a -given OF node. - -Signed-off-by: Bernhard Frauendienst -Reviewed-by: Miquel Raynal ---- - drivers/mtd/mtdcore.c | 38 ++++++++++++++++++++++++++++++++++++++ - include/linux/mtd/mtd.h | 2 ++ - 2 files changed, 40 insertions(+) - ---- a/drivers/mtd/mtdcore.c -+++ b/drivers/mtd/mtdcore.c -@@ -938,6 +938,44 @@ out_unlock: - } - EXPORT_SYMBOL_GPL(get_mtd_device_nm); - -+/** -+ * get_mtd_device_by_node - obtain a validated handle for an MTD device -+ * by of_node -+ * @of_node: OF node of MTD device to open -+ * -+ * This function returns MTD device description structure in case of -+ * success and an error code in case of failure. -+ */ -+struct mtd_info *get_mtd_device_by_node(const struct device_node *of_node) -+{ -+ int err = -ENODEV; -+ struct mtd_info *mtd = NULL, *other; -+ -+ mutex_lock(&mtd_table_mutex); -+ -+ mtd_for_each_device(other) { -+ if (of_node == other->dev.of_node) { -+ mtd = other; -+ break; -+ } -+ } -+ -+ if (!mtd) -+ goto out_unlock; -+ -+ err = __get_mtd_device(mtd); -+ if (err) -+ goto out_unlock; -+ -+ mutex_unlock(&mtd_table_mutex); -+ return mtd; -+ -+out_unlock: -+ mutex_unlock(&mtd_table_mutex); -+ return ERR_PTR(err); -+} -+EXPORT_SYMBOL_GPL(get_mtd_device_by_node); -+ - void put_mtd_device(struct mtd_info *mtd) - { - mutex_lock(&mtd_table_mutex); ---- a/include/linux/mtd/mtd.h -+++ b/include/linux/mtd/mtd.h -@@ -589,6 +589,8 @@ extern struct mtd_info *get_mtd_device(s - extern int __get_mtd_device(struct mtd_info *mtd); - extern void __put_mtd_device(struct mtd_info *mtd); - extern struct mtd_info *get_mtd_device_nm(const char *name); -+extern struct mtd_info *get_mtd_device_by_node( -+ const struct device_node *of_node); - extern void put_mtd_device(struct mtd_info *mtd); - - diff --git a/target/linux/generic/pending-4.19/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch b/target/linux/generic/pending-4.19/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch deleted file mode 100644 index 01f3b9ec2d..0000000000 --- a/target/linux/generic/pending-4.19/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 5734c6669fba7ddb5ef491ccff7159d15dba0b59 Mon Sep 17 00:00:00 2001 -From: Bernhard Frauendienst -Date: Wed, 5 Sep 2018 01:32:51 +0200 -Subject: [PATCH 496/497] dt-bindings: add bindings for mtd-concat devices - -Document virtual mtd-concat device bindings. - -Signed-off-by: Bernhard Frauendienst ---- - .../devicetree/bindings/mtd/mtd-concat.txt | 36 +++++++++++++++++++ - 1 file changed, 36 insertions(+) - create mode 100644 Documentation/devicetree/bindings/mtd/mtd-concat.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/mtd/mtd-concat.txt -@@ -0,0 +1,36 @@ -+Virtual MTD concat device -+ -+Requires properties: -+- devices: list of phandles to mtd nodes that should be concatenated -+ -+Example: -+ -+&spi { -+ flash0: flash@0 { -+ ... -+ }; -+ flash1: flash@1 { -+ ... -+ }; -+}; -+ -+flash { -+ compatible = "mtd-concat"; -+ -+ devices = <&flash0 &flash1>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ -+ partition@0 { -+ label = "boot"; -+ reg = <0x0000000 0x0040000>; -+ read-only; -+ }; -+ -+ partition@40000 { -+ label = "firmware"; -+ reg = <0x0040000 0x1fc0000>; -+ }; -+ } -+} diff --git a/target/linux/generic/pending-4.19/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch b/target/linux/generic/pending-4.19/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch deleted file mode 100644 index 6584e22882..0000000000 --- a/target/linux/generic/pending-4.19/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch +++ /dev/null @@ -1,216 +0,0 @@ -From e53f712d8eac71f54399b61038ccf87d2cee99d7 Mon Sep 17 00:00:00 2001 -From: Bernhard Frauendienst -Date: Sat, 25 Aug 2018 12:35:22 +0200 -Subject: [PATCH 497/497] mtd: mtdconcat: add dt driver for concat devices - -Some mtd drivers like physmap variants have support for concatenating -multiple mtd devices, but there is no generic way to define such a -concat device from within the device tree. - -This is useful for some SoC boards that use multiple flash chips as -memory banks of a single mtd device, with partitions spanning chip -borders. - -This commit adds a driver for creating virtual mtd-concat devices. They -must have a compatible = "mtd-concat" line, and define a list of devices -to concat in the 'devices' property, for example: - -flash { - compatible = "mtd-concat"; - - devices = <&flash0 &flash1>; - - partitions { - ... - }; -}; - -The driver is added to the very end of the mtd Makefile to increase the -likelyhood of all child devices already being loaded at the time of -probing, preventing unnecessary deferred probes. - -Signed-off-by: Bernhard Frauendienst ---- - drivers/mtd/Kconfig | 2 + - drivers/mtd/Makefile | 3 + - drivers/mtd/composite/Kconfig | 12 +++ - drivers/mtd/composite/Makefile | 6 ++ - drivers/mtd/composite/virt_concat.c | 128 ++++++++++++++++++++++++++++ - 5 files changed, 151 insertions(+) - create mode 100644 drivers/mtd/composite/Kconfig - create mode 100644 drivers/mtd/composite/Makefile - create mode 100644 drivers/mtd/composite/virt_concat.c - ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -374,4 +374,6 @@ source "drivers/mtd/spi-nor/Kconfig" - - source "drivers/mtd/ubi/Kconfig" - -+source "drivers/mtd/composite/Kconfig" -+ - endif # MTD ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -39,3 +39,6 @@ obj-y += chips/ lpddr/ maps/ devices/ n - - obj-$(CONFIG_MTD_SPI_NOR) += spi-nor/ - obj-$(CONFIG_MTD_UBI) += ubi/ -+ -+# Composite drivers must be loaded last -+obj-y += composite/ ---- /dev/null -+++ b/drivers/mtd/composite/Kconfig -@@ -0,0 +1,12 @@ -+menu "Composite MTD device drivers" -+ depends on MTD!=n -+ -+config MTD_VIRT_CONCAT -+ tristate "Virtual concat MTD device" -+ help -+ This driver allows creation of a virtual MTD concat device, which -+ concatenates multiple underlying MTD devices to a single device. -+ This is required by some SoC boards where multiple memory banks are -+ used as one device with partitions spanning across device boundaries. -+ -+endmenu ---- /dev/null -+++ b/drivers/mtd/composite/Makefile -@@ -0,0 +1,6 @@ -+# SPDX-License-Identifier: GPL-2.0 -+# -+# linux/drivers/mtd/composite/Makefile -+# -+ -+obj-$(CONFIG_MTD_VIRT_CONCAT) += virt_concat.o ---- /dev/null -+++ b/drivers/mtd/composite/virt_concat.c -@@ -0,0 +1,128 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Virtual concat MTD device driver -+ * -+ * Copyright (C) 2018 Bernhard Frauendienst -+ * Author: Bernhard Frauendienst, kernel@nospam.obeliks.de -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * struct of_virt_concat - platform device driver data. -+ * @cmtd the final mtd_concat device -+ * @num_devices the number of devices in @devices -+ * @devices points to an array of devices already loaded -+ */ -+struct of_virt_concat { -+ struct mtd_info *cmtd; -+ int num_devices; -+ struct mtd_info **devices; -+}; -+ -+static int virt_concat_remove(struct platform_device *pdev) -+{ -+ struct of_virt_concat *info; -+ int i; -+ -+ info = platform_get_drvdata(pdev); -+ if (!info) -+ return 0; -+ -+ // unset data for when this is called after a probe error -+ platform_set_drvdata(pdev, NULL); -+ -+ if (info->cmtd) { -+ mtd_device_unregister(info->cmtd); -+ mtd_concat_destroy(info->cmtd); -+ } -+ -+ if (info->devices) { -+ for (i = 0; i < info->num_devices; i++) -+ put_mtd_device(info->devices[i]); -+ } -+ -+ return 0; -+} -+ -+static int virt_concat_probe(struct platform_device *pdev) -+{ -+ struct device_node *node = pdev->dev.of_node; -+ struct of_phandle_iterator it; -+ struct of_virt_concat *info; -+ struct mtd_info *mtd; -+ int err = 0, count; -+ -+ count = of_count_phandle_with_args(node, "devices", NULL); -+ if (count <= 0) -+ return -EINVAL; -+ -+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); -+ if (!info) -+ return -ENOMEM; -+ info->devices = devm_kcalloc(&pdev->dev, count, -+ sizeof(*(info->devices)), GFP_KERNEL); -+ if (!info->devices) { -+ err = -ENOMEM; -+ goto err_remove; -+ } -+ -+ platform_set_drvdata(pdev, info); -+ -+ of_for_each_phandle(&it, err, node, "devices", NULL, 0) { -+ mtd = get_mtd_device_by_node(it.node); -+ if (IS_ERR(mtd)) { -+ of_node_put(it.node); -+ err = -EPROBE_DEFER; -+ goto err_remove; -+ } -+ -+ info->devices[info->num_devices++] = mtd; -+ } -+ -+ info->cmtd = mtd_concat_create(info->devices, info->num_devices, -+ dev_name(&pdev->dev)); -+ if (!info->cmtd) { -+ err = -ENXIO; -+ goto err_remove; -+ } -+ -+ info->cmtd->dev.parent = &pdev->dev; -+ mtd_set_of_node(info->cmtd, node); -+ mtd_device_register(info->cmtd, NULL, 0); -+ -+ return 0; -+ -+err_remove: -+ virt_concat_remove(pdev); -+ -+ return err; -+} -+ -+static const struct of_device_id virt_concat_of_match[] = { -+ { .compatible = "mtd-concat", }, -+ { /* sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, virt_concat_of_match); -+ -+static struct platform_driver virt_concat_driver = { -+ .probe = virt_concat_probe, -+ .remove = virt_concat_remove, -+ .driver = { -+ .name = "virt-mtdconcat", -+ .of_match_table = virt_concat_of_match, -+ }, -+}; -+ -+module_platform_driver(virt_concat_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Bernhard Frauendienst "); -+MODULE_DESCRIPTION("Virtual concat MTD device driver"); diff --git a/target/linux/generic/pending-4.19/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-4.19/530-jffs2_make_lzma_available.patch deleted file mode 100644 index f28186a40c..0000000000 --- a/target/linux/generic/pending-4.19/530-jffs2_make_lzma_available.patch +++ /dev/null @@ -1,5180 +0,0 @@ -From: Alexandros C. Couloumbis -Subject: fs: add jffs2/lzma support (not activated by default yet) - -lede-commit: c2c88d315fa0e881f8b19da07b62859b915b11b2 -Signed-off-by: Alexandros C. Couloumbis ---- - fs/jffs2/Kconfig | 9 + - fs/jffs2/Makefile | 3 + - fs/jffs2/compr.c | 6 + - fs/jffs2/compr.h | 10 +- - fs/jffs2/compr_lzma.c | 128 +++ - fs/jffs2/super.c | 33 +- - include/linux/lzma.h | 62 ++ - include/linux/lzma/LzFind.h | 115 +++ - include/linux/lzma/LzHash.h | 54 + - include/linux/lzma/LzmaDec.h | 231 +++++ - include/linux/lzma/LzmaEnc.h | 80 ++ - include/linux/lzma/Types.h | 226 +++++ - include/uapi/linux/jffs2.h | 1 + - lib/Kconfig | 6 + - lib/Makefile | 12 + - lib/lzma/LzFind.c | 761 ++++++++++++++ - lib/lzma/LzmaDec.c | 999 +++++++++++++++++++ - lib/lzma/LzmaEnc.c | 2271 ++++++++++++++++++++++++++++++++++++++++++ - lib/lzma/Makefile | 7 + - 19 files changed, 5008 insertions(+), 6 deletions(-) - create mode 100644 fs/jffs2/compr_lzma.c - create mode 100644 include/linux/lzma.h - create mode 100644 include/linux/lzma/LzFind.h - create mode 100644 include/linux/lzma/LzHash.h - create mode 100644 include/linux/lzma/LzmaDec.h - create mode 100644 include/linux/lzma/LzmaEnc.h - create mode 100644 include/linux/lzma/Types.h - create mode 100644 lib/lzma/LzFind.c - create mode 100644 lib/lzma/LzmaDec.c - create mode 100644 lib/lzma/LzmaEnc.c - create mode 100644 lib/lzma/Makefile - ---- a/fs/jffs2/Kconfig -+++ b/fs/jffs2/Kconfig -@@ -135,6 +135,15 @@ config JFFS2_LZO - This feature was added in July, 2007. Say 'N' if you need - compatibility with older bootloaders or kernels. - -+config JFFS2_LZMA -+ bool "JFFS2 LZMA compression support" if JFFS2_COMPRESSION_OPTIONS -+ select LZMA_COMPRESS -+ select LZMA_DECOMPRESS -+ depends on JFFS2_FS -+ default n -+ help -+ JFFS2 wrapper to the LZMA C SDK -+ - config JFFS2_RTIME - bool "JFFS2 RTIME compression support" if JFFS2_COMPRESSION_OPTIONS - depends on JFFS2_FS ---- a/fs/jffs2/Makefile -+++ b/fs/jffs2/Makefile -@@ -19,4 +19,7 @@ jffs2-$(CONFIG_JFFS2_RUBIN) += compr_rub - jffs2-$(CONFIG_JFFS2_RTIME) += compr_rtime.o - jffs2-$(CONFIG_JFFS2_ZLIB) += compr_zlib.o - jffs2-$(CONFIG_JFFS2_LZO) += compr_lzo.o -+jffs2-$(CONFIG_JFFS2_LZMA) += compr_lzma.o - jffs2-$(CONFIG_JFFS2_SUMMARY) += summary.o -+ -+CFLAGS_compr_lzma.o += -Iinclude/linux -Ilib/lzma ---- a/fs/jffs2/compr.c -+++ b/fs/jffs2/compr.c -@@ -378,6 +378,9 @@ int __init jffs2_compressors_init(void) - #ifdef CONFIG_JFFS2_LZO - jffs2_lzo_init(); - #endif -+#ifdef CONFIG_JFFS2_LZMA -+ jffs2_lzma_init(); -+#endif - /* Setting default compression mode */ - #ifdef CONFIG_JFFS2_CMODE_NONE - jffs2_compression_mode = JFFS2_COMPR_MODE_NONE; -@@ -401,6 +404,9 @@ int __init jffs2_compressors_init(void) - int jffs2_compressors_exit(void) - { - /* Unregistering compressors */ -+#ifdef CONFIG_JFFS2_LZMA -+ jffs2_lzma_exit(); -+#endif - #ifdef CONFIG_JFFS2_LZO - jffs2_lzo_exit(); - #endif ---- a/fs/jffs2/compr.h -+++ b/fs/jffs2/compr.h -@@ -29,9 +29,9 @@ - #define JFFS2_DYNRUBIN_PRIORITY 20 - #define JFFS2_LZARI_PRIORITY 30 - #define JFFS2_RTIME_PRIORITY 50 --#define JFFS2_ZLIB_PRIORITY 60 --#define JFFS2_LZO_PRIORITY 80 -- -+#define JFFS2_LZMA_PRIORITY 70 -+#define JFFS2_ZLIB_PRIORITY 80 -+#define JFFS2_LZO_PRIORITY 90 - - #define JFFS2_RUBINMIPS_DISABLED /* RUBINs will be used only */ - #define JFFS2_DYNRUBIN_DISABLED /* for decompression */ -@@ -101,5 +101,9 @@ void jffs2_zlib_exit(void); - int jffs2_lzo_init(void); - void jffs2_lzo_exit(void); - #endif -+#ifdef CONFIG_JFFS2_LZMA -+int jffs2_lzma_init(void); -+void jffs2_lzma_exit(void); -+#endif - - #endif /* __JFFS2_COMPR_H__ */ ---- /dev/null -+++ b/fs/jffs2/compr_lzma.c -@@ -0,0 +1,128 @@ -+/* -+ * JFFS2 -- Journalling Flash File System, Version 2. -+ * -+ * For licensing information, see the file 'LICENCE' in this directory. -+ * -+ * JFFS2 wrapper to the LZMA C SDK -+ * -+ */ -+ -+#include -+#include "compr.h" -+ -+#ifdef __KERNEL__ -+ static DEFINE_MUTEX(deflate_mutex); -+#endif -+ -+CLzmaEncHandle *p; -+Byte propsEncoded[LZMA_PROPS_SIZE]; -+SizeT propsSize = sizeof(propsEncoded); -+ -+STATIC void lzma_free_workspace(void) -+{ -+ LzmaEnc_Destroy(p, &lzma_alloc, &lzma_alloc); -+} -+ -+STATIC int INIT lzma_alloc_workspace(CLzmaEncProps *props) -+{ -+ if ((p = (CLzmaEncHandle *)LzmaEnc_Create(&lzma_alloc)) == NULL) -+ { -+ PRINT_ERROR("Failed to allocate lzma deflate workspace\n"); -+ return -ENOMEM; -+ } -+ -+ if (LzmaEnc_SetProps(p, props) != SZ_OK) -+ { -+ lzma_free_workspace(); -+ return -1; -+ } -+ -+ if (LzmaEnc_WriteProperties(p, propsEncoded, &propsSize) != SZ_OK) -+ { -+ lzma_free_workspace(); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+STATIC int jffs2_lzma_compress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t *sourcelen, uint32_t *dstlen) -+{ -+ SizeT compress_size = (SizeT)(*dstlen); -+ int ret; -+ -+ #ifdef __KERNEL__ -+ mutex_lock(&deflate_mutex); -+ #endif -+ -+ ret = LzmaEnc_MemEncode(p, cpage_out, &compress_size, data_in, *sourcelen, -+ 0, NULL, &lzma_alloc, &lzma_alloc); -+ -+ #ifdef __KERNEL__ -+ mutex_unlock(&deflate_mutex); -+ #endif -+ -+ if (ret != SZ_OK) -+ return -1; -+ -+ *dstlen = (uint32_t)compress_size; -+ -+ return 0; -+} -+ -+STATIC int jffs2_lzma_decompress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t srclen, uint32_t destlen) -+{ -+ int ret; -+ SizeT dl = (SizeT)destlen; -+ SizeT sl = (SizeT)srclen; -+ ELzmaStatus status; -+ -+ ret = LzmaDecode(cpage_out, &dl, data_in, &sl, propsEncoded, -+ propsSize, LZMA_FINISH_ANY, &status, &lzma_alloc); -+ -+ if (ret != SZ_OK || status == LZMA_STATUS_NOT_FINISHED || dl != (SizeT)destlen) -+ return -1; -+ -+ return 0; -+} -+ -+static struct jffs2_compressor jffs2_lzma_comp = { -+ .priority = JFFS2_LZMA_PRIORITY, -+ .name = "lzma", -+ .compr = JFFS2_COMPR_LZMA, -+ .compress = &jffs2_lzma_compress, -+ .decompress = &jffs2_lzma_decompress, -+ .disabled = 0, -+}; -+ -+int INIT jffs2_lzma_init(void) -+{ -+ int ret; -+ CLzmaEncProps props; -+ LzmaEncProps_Init(&props); -+ -+ props.dictSize = LZMA_BEST_DICT(0x2000); -+ props.level = LZMA_BEST_LEVEL; -+ props.lc = LZMA_BEST_LC; -+ props.lp = LZMA_BEST_LP; -+ props.pb = LZMA_BEST_PB; -+ props.fb = LZMA_BEST_FB; -+ -+ ret = lzma_alloc_workspace(&props); -+ if (ret < 0) -+ return ret; -+ -+ ret = jffs2_register_compressor(&jffs2_lzma_comp); -+ if (ret) -+ lzma_free_workspace(); -+ -+ return ret; -+} -+ -+void jffs2_lzma_exit(void) -+{ -+ jffs2_unregister_compressor(&jffs2_lzma_comp); -+ lzma_free_workspace(); -+} ---- a/fs/jffs2/super.c -+++ b/fs/jffs2/super.c -@@ -374,14 +374,41 @@ static int __init init_jffs2_fs(void) - BUILD_BUG_ON(sizeof(struct jffs2_raw_inode) != 68); - BUILD_BUG_ON(sizeof(struct jffs2_raw_summary) != 32); - -- pr_info("version 2.2." -+ pr_info("version 2.2" - #ifdef CONFIG_JFFS2_FS_WRITEBUFFER - " (NAND)" - #endif - #ifdef CONFIG_JFFS2_SUMMARY -- " (SUMMARY) " -+ " (SUMMARY)" - #endif -- " © 2001-2006 Red Hat, Inc.\n"); -+#ifdef CONFIG_JFFS2_ZLIB -+ " (ZLIB)" -+#endif -+#ifdef CONFIG_JFFS2_LZO -+ " (LZO)" -+#endif -+#ifdef CONFIG_JFFS2_LZMA -+ " (LZMA)" -+#endif -+#ifdef CONFIG_JFFS2_RTIME -+ " (RTIME)" -+#endif -+#ifdef CONFIG_JFFS2_RUBIN -+ " (RUBIN)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_NONE -+ " (CMODE_NONE)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_PRIORITY -+ " (CMODE_PRIORITY)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_SIZE -+ " (CMODE_SIZE)" -+#endif -+#ifdef CONFIG_JFFS2_CMODE_FAVOURLZO -+ " (CMODE_FAVOURLZO)" -+#endif -+ " (c) 2001-2006 Red Hat, Inc.\n"); - - jffs2_inode_cachep = kmem_cache_create("jffs2_i", - sizeof(struct jffs2_inode_info), ---- /dev/null -+++ b/include/linux/lzma.h -@@ -0,0 +1,62 @@ -+#ifndef __LZMA_H__ -+#define __LZMA_H__ -+ -+#ifdef __KERNEL__ -+ #include -+ #include -+ #include -+ #include -+ #include -+ #define LZMA_MALLOC vmalloc -+ #define LZMA_FREE vfree -+ #define PRINT_ERROR(msg) printk(KERN_WARNING #msg) -+ #define INIT __init -+ #define STATIC static -+#else -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #include -+ #ifndef PAGE_SIZE -+ extern int page_size; -+ #define PAGE_SIZE page_size -+ #endif -+ #define LZMA_MALLOC malloc -+ #define LZMA_FREE free -+ #define PRINT_ERROR(msg) fprintf(stderr, msg) -+ #define INIT -+ #define STATIC -+#endif -+ -+#include "lzma/LzmaDec.h" -+#include "lzma/LzmaEnc.h" -+ -+#define LZMA_BEST_LEVEL (9) -+#define LZMA_BEST_LC (0) -+#define LZMA_BEST_LP (0) -+#define LZMA_BEST_PB (0) -+#define LZMA_BEST_FB (273) -+ -+#define LZMA_BEST_DICT(n) (((int)((n) / 2)) * 2) -+ -+static void *p_lzma_malloc(void *p, size_t size) -+{ -+ if (size == 0) -+ return NULL; -+ -+ return LZMA_MALLOC(size); -+} -+ -+static void p_lzma_free(void *p, void *address) -+{ -+ if (address != NULL) -+ LZMA_FREE(address); -+} -+ -+static ISzAlloc lzma_alloc = {p_lzma_malloc, p_lzma_free}; -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzFind.h -@@ -0,0 +1,115 @@ -+/* LzFind.h -- Match finder for LZ algorithms -+2009-04-22 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZ_FIND_H -+#define __LZ_FIND_H -+ -+#include "Types.h" -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+typedef UInt32 CLzRef; -+ -+typedef struct _CMatchFinder -+{ -+ Byte *buffer; -+ UInt32 pos; -+ UInt32 posLimit; -+ UInt32 streamPos; -+ UInt32 lenLimit; -+ -+ UInt32 cyclicBufferPos; -+ UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */ -+ -+ UInt32 matchMaxLen; -+ CLzRef *hash; -+ CLzRef *son; -+ UInt32 hashMask; -+ UInt32 cutValue; -+ -+ Byte *bufferBase; -+ ISeqInStream *stream; -+ int streamEndWasReached; -+ -+ UInt32 blockSize; -+ UInt32 keepSizeBefore; -+ UInt32 keepSizeAfter; -+ -+ UInt32 numHashBytes; -+ int directInput; -+ size_t directInputRem; -+ int btMode; -+ int bigHash; -+ UInt32 historySize; -+ UInt32 fixedHashSize; -+ UInt32 hashSizeSum; -+ UInt32 numSons; -+ SRes result; -+ UInt32 crc[256]; -+} CMatchFinder; -+ -+#define Inline_MatchFinder_GetPointerToCurrentPos(p) ((p)->buffer) -+#define Inline_MatchFinder_GetIndexByte(p, index) ((p)->buffer[(Int32)(index)]) -+ -+#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos) -+ -+int MatchFinder_NeedMove(CMatchFinder *p); -+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p); -+void MatchFinder_MoveBlock(CMatchFinder *p); -+void MatchFinder_ReadIfRequired(CMatchFinder *p); -+ -+void MatchFinder_Construct(CMatchFinder *p); -+ -+/* Conditions: -+ historySize <= 3 GB -+ keepAddBufferBefore + matchMaxLen + keepAddBufferAfter < 511MB -+*/ -+int MatchFinder_Create(CMatchFinder *p, UInt32 historySize, -+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, -+ ISzAlloc *alloc); -+void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc); -+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems); -+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue); -+ -+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue, -+ UInt32 *distances, UInt32 maxLen); -+ -+/* -+Conditions: -+ Mf_GetNumAvailableBytes_Func must be called before each Mf_GetMatchLen_Func. -+ Mf_GetPointerToCurrentPos_Func's result must be used only before any other function -+*/ -+ -+typedef void (*Mf_Init_Func)(void *object); -+typedef Byte (*Mf_GetIndexByte_Func)(void *object, Int32 index); -+typedef UInt32 (*Mf_GetNumAvailableBytes_Func)(void *object); -+typedef const Byte * (*Mf_GetPointerToCurrentPos_Func)(void *object); -+typedef UInt32 (*Mf_GetMatches_Func)(void *object, UInt32 *distances); -+typedef void (*Mf_Skip_Func)(void *object, UInt32); -+ -+typedef struct _IMatchFinder -+{ -+ Mf_Init_Func Init; -+ Mf_GetIndexByte_Func GetIndexByte; -+ Mf_GetNumAvailableBytes_Func GetNumAvailableBytes; -+ Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos; -+ Mf_GetMatches_Func GetMatches; -+ Mf_Skip_Func Skip; -+} IMatchFinder; -+ -+void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable); -+ -+void MatchFinder_Init(CMatchFinder *p); -+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); -+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances); -+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num); -+ -+#ifdef __cplusplus -+} -+#endif -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzHash.h -@@ -0,0 +1,54 @@ -+/* LzHash.h -- HASH functions for LZ algorithms -+2009-02-07 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZ_HASH_H -+#define __LZ_HASH_H -+ -+#define kHash2Size (1 << 10) -+#define kHash3Size (1 << 16) -+#define kHash4Size (1 << 20) -+ -+#define kFix3HashSize (kHash2Size) -+#define kFix4HashSize (kHash2Size + kHash3Size) -+#define kFix5HashSize (kHash2Size + kHash3Size + kHash4Size) -+ -+#define HASH2_CALC hashValue = cur[0] | ((UInt32)cur[1] << 8); -+ -+#define HASH3_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; } -+ -+#define HASH4_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; } -+ -+#define HASH5_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \ -+ hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \ -+ hash4Value &= (kHash4Size - 1); } -+ -+/* #define HASH_ZIP_CALC hashValue = ((cur[0] | ((UInt32)cur[1] << 8)) ^ p->crc[cur[2]]) & 0xFFFF; */ -+#define HASH_ZIP_CALC hashValue = ((cur[2] | ((UInt32)cur[0] << 8)) ^ p->crc[cur[1]]) & 0xFFFF; -+ -+ -+#define MT_HASH2_CALC \ -+ hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1); -+ -+#define MT_HASH3_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); } -+ -+#define MT_HASH4_CALC { \ -+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \ -+ hash2Value = temp & (kHash2Size - 1); \ -+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \ -+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); } -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzmaDec.h -@@ -0,0 +1,231 @@ -+/* LzmaDec.h -- LZMA Decoder -+2009-02-07 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZMA_DEC_H -+#define __LZMA_DEC_H -+ -+#include "Types.h" -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+/* #define _LZMA_PROB32 */ -+/* _LZMA_PROB32 can increase the speed on some CPUs, -+ but memory usage for CLzmaDec::probs will be doubled in that case */ -+ -+#ifdef _LZMA_PROB32 -+#define CLzmaProb UInt32 -+#else -+#define CLzmaProb UInt16 -+#endif -+ -+ -+/* ---------- LZMA Properties ---------- */ -+ -+#define LZMA_PROPS_SIZE 5 -+ -+typedef struct _CLzmaProps -+{ -+ unsigned lc, lp, pb; -+ UInt32 dicSize; -+} CLzmaProps; -+ -+/* LzmaProps_Decode - decodes properties -+Returns: -+ SZ_OK -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+*/ -+ -+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size); -+ -+ -+/* ---------- LZMA Decoder state ---------- */ -+ -+/* LZMA_REQUIRED_INPUT_MAX = number of required input bytes for worst case. -+ Num bits = log2((2^11 / 31) ^ 22) + 26 < 134 + 26 = 160; */ -+ -+#define LZMA_REQUIRED_INPUT_MAX 20 -+ -+typedef struct -+{ -+ CLzmaProps prop; -+ CLzmaProb *probs; -+ Byte *dic; -+ const Byte *buf; -+ UInt32 range, code; -+ SizeT dicPos; -+ SizeT dicBufSize; -+ UInt32 processedPos; -+ UInt32 checkDicSize; -+ unsigned state; -+ UInt32 reps[4]; -+ unsigned remainLen; -+ int needFlush; -+ int needInitState; -+ UInt32 numProbs; -+ unsigned tempBufSize; -+ Byte tempBuf[LZMA_REQUIRED_INPUT_MAX]; -+} CLzmaDec; -+ -+#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; } -+ -+void LzmaDec_Init(CLzmaDec *p); -+ -+/* There are two types of LZMA streams: -+ 0) Stream with end mark. That end mark adds about 6 bytes to compressed size. -+ 1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */ -+ -+typedef enum -+{ -+ LZMA_FINISH_ANY, /* finish at any point */ -+ LZMA_FINISH_END /* block must be finished at the end */ -+} ELzmaFinishMode; -+ -+/* ELzmaFinishMode has meaning only if the decoding reaches output limit !!! -+ -+ You must use LZMA_FINISH_END, when you know that current output buffer -+ covers last bytes of block. In other cases you must use LZMA_FINISH_ANY. -+ -+ If LZMA decoder sees end marker before reaching output limit, it returns SZ_OK, -+ and output value of destLen will be less than output buffer size limit. -+ You can check status result also. -+ -+ You can use multiple checks to test data integrity after full decompression: -+ 1) Check Result and "status" variable. -+ 2) Check that output(destLen) = uncompressedSize, if you know real uncompressedSize. -+ 3) Check that output(srcLen) = compressedSize, if you know real compressedSize. -+ You must use correct finish mode in that case. */ -+ -+typedef enum -+{ -+ LZMA_STATUS_NOT_SPECIFIED, /* use main error code instead */ -+ LZMA_STATUS_FINISHED_WITH_MARK, /* stream was finished with end mark. */ -+ LZMA_STATUS_NOT_FINISHED, /* stream was not finished */ -+ LZMA_STATUS_NEEDS_MORE_INPUT, /* you must provide more input bytes */ -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK /* there is probability that stream was finished without end mark */ -+} ELzmaStatus; -+ -+/* ELzmaStatus is used only as output value for function call */ -+ -+ -+/* ---------- Interfaces ---------- */ -+ -+/* There are 3 levels of interfaces: -+ 1) Dictionary Interface -+ 2) Buffer Interface -+ 3) One Call Interface -+ You can select any of these interfaces, but don't mix functions from different -+ groups for same object. */ -+ -+ -+/* There are two variants to allocate state for Dictionary Interface: -+ 1) LzmaDec_Allocate / LzmaDec_Free -+ 2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs -+ You can use variant 2, if you set dictionary buffer manually. -+ For Buffer Interface you must always use variant 1. -+ -+LzmaDec_Allocate* can return: -+ SZ_OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+*/ -+ -+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc); -+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc); -+ -+SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc); -+void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc); -+ -+/* ---------- Dictionary Interface ---------- */ -+ -+/* You can use it, if you want to eliminate the overhead for data copying from -+ dictionary to some other external buffer. -+ You must work with CLzmaDec variables directly in this interface. -+ -+ STEPS: -+ LzmaDec_Constr() -+ LzmaDec_Allocate() -+ for (each new stream) -+ { -+ LzmaDec_Init() -+ while (it needs more decompression) -+ { -+ LzmaDec_DecodeToDic() -+ use data from CLzmaDec::dic and update CLzmaDec::dicPos -+ } -+ } -+ LzmaDec_Free() -+*/ -+ -+/* LzmaDec_DecodeToDic -+ -+ The decoding to internal dictionary buffer (CLzmaDec::dic). -+ You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!! -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (dicLimit). -+ LZMA_FINISH_ANY - Decode just dicLimit bytes. -+ LZMA_FINISH_END - Stream must be finished after dicLimit. -+ -+Returns: -+ SZ_OK -+ status: -+ LZMA_STATUS_FINISHED_WITH_MARK -+ LZMA_STATUS_NOT_FINISHED -+ LZMA_STATUS_NEEDS_MORE_INPUT -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -+ SZ_ERROR_DATA - Data error -+*/ -+ -+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, -+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -+ -+ -+/* ---------- Buffer Interface ---------- */ -+ -+/* It's zlib-like interface. -+ See LzmaDec_DecodeToDic description for information about STEPS and return results, -+ but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need -+ to work with CLzmaDec variables manually. -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (*destLen). -+ LZMA_FINISH_ANY - Decode just destLen bytes. -+ LZMA_FINISH_END - Stream must be finished after (*destLen). -+*/ -+ -+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, -+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status); -+ -+ -+/* ---------- One Call Interface ---------- */ -+ -+/* LzmaDecode -+ -+finishMode: -+ It has meaning only if the decoding reaches output limit (*destLen). -+ LZMA_FINISH_ANY - Decode just destLen bytes. -+ LZMA_FINISH_END - Stream must be finished after (*destLen). -+ -+Returns: -+ SZ_OK -+ status: -+ LZMA_STATUS_FINISHED_WITH_MARK -+ LZMA_STATUS_NOT_FINISHED -+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK -+ SZ_ERROR_DATA - Data error -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_UNSUPPORTED - Unsupported properties -+ SZ_ERROR_INPUT_EOF - It needs more bytes in input buffer (src). -+*/ -+ -+SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, -+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, -+ ELzmaStatus *status, ISzAlloc *alloc); -+ -+#ifdef __cplusplus -+} -+#endif -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/LzmaEnc.h -@@ -0,0 +1,80 @@ -+/* LzmaEnc.h -- LZMA Encoder -+2009-02-07 : Igor Pavlov : Public domain */ -+ -+#ifndef __LZMA_ENC_H -+#define __LZMA_ENC_H -+ -+#include "Types.h" -+ -+#ifdef __cplusplus -+extern "C" { -+#endif -+ -+#define LZMA_PROPS_SIZE 5 -+ -+typedef struct _CLzmaEncProps -+{ -+ int level; /* 0 <= level <= 9 */ -+ UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version -+ (1 << 12) <= dictSize <= (1 << 30) for 64-bit version -+ default = (1 << 24) */ -+ int lc; /* 0 <= lc <= 8, default = 3 */ -+ int lp; /* 0 <= lp <= 4, default = 0 */ -+ int pb; /* 0 <= pb <= 4, default = 2 */ -+ int algo; /* 0 - fast, 1 - normal, default = 1 */ -+ int fb; /* 5 <= fb <= 273, default = 32 */ -+ int btMode; /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */ -+ int numHashBytes; /* 2, 3 or 4, default = 4 */ -+ UInt32 mc; /* 1 <= mc <= (1 << 30), default = 32 */ -+ unsigned writeEndMark; /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */ -+ int numThreads; /* 1 or 2, default = 2 */ -+} CLzmaEncProps; -+ -+void LzmaEncProps_Init(CLzmaEncProps *p); -+void LzmaEncProps_Normalize(CLzmaEncProps *p); -+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2); -+ -+ -+/* ---------- CLzmaEncHandle Interface ---------- */ -+ -+/* LzmaEnc_* functions can return the following exit codes: -+Returns: -+ SZ_OK - OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_PARAM - Incorrect paramater in props -+ SZ_ERROR_WRITE - Write callback error. -+ SZ_ERROR_PROGRESS - some break from progress callback -+ SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) -+*/ -+ -+typedef void * CLzmaEncHandle; -+ -+CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc); -+void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig); -+SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props); -+SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size); -+SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+ -+/* ---------- One Call Interface ---------- */ -+ -+/* LzmaEncode -+Return code: -+ SZ_OK - OK -+ SZ_ERROR_MEM - Memory allocation error -+ SZ_ERROR_PARAM - Incorrect paramater -+ SZ_ERROR_OUTPUT_EOF - output buffer overflow -+ SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) -+*/ -+ -+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig); -+ -+#ifdef __cplusplus -+} -+#endif -+ -+#endif ---- /dev/null -+++ b/include/linux/lzma/Types.h -@@ -0,0 +1,226 @@ -+/* Types.h -- Basic types -+2009-11-23 : Igor Pavlov : Public domain */ -+ -+#ifndef __7Z_TYPES_H -+#define __7Z_TYPES_H -+ -+#include -+ -+#ifdef _WIN32 -+#include -+#endif -+ -+#ifndef EXTERN_C_BEGIN -+#ifdef __cplusplus -+#define EXTERN_C_BEGIN extern "C" { -+#define EXTERN_C_END } -+#else -+#define EXTERN_C_BEGIN -+#define EXTERN_C_END -+#endif -+#endif -+ -+EXTERN_C_BEGIN -+ -+#define SZ_OK 0 -+ -+#define SZ_ERROR_DATA 1 -+#define SZ_ERROR_MEM 2 -+#define SZ_ERROR_CRC 3 -+#define SZ_ERROR_UNSUPPORTED 4 -+#define SZ_ERROR_PARAM 5 -+#define SZ_ERROR_INPUT_EOF 6 -+#define SZ_ERROR_OUTPUT_EOF 7 -+#define SZ_ERROR_READ 8 -+#define SZ_ERROR_WRITE 9 -+#define SZ_ERROR_PROGRESS 10 -+#define SZ_ERROR_FAIL 11 -+#define SZ_ERROR_THREAD 12 -+ -+#define SZ_ERROR_ARCHIVE 16 -+#define SZ_ERROR_NO_ARCHIVE 17 -+ -+typedef int SRes; -+ -+#ifdef _WIN32 -+typedef DWORD WRes; -+#else -+typedef int WRes; -+#endif -+ -+#ifndef RINOK -+#define RINOK(x) { int __result__ = (x); if (__result__ != 0) return __result__; } -+#endif -+ -+typedef unsigned char Byte; -+typedef short Int16; -+typedef unsigned short UInt16; -+ -+#ifdef _LZMA_UINT32_IS_ULONG -+typedef long Int32; -+typedef unsigned long UInt32; -+#else -+typedef int Int32; -+typedef unsigned int UInt32; -+#endif -+ -+#ifdef _SZ_NO_INT_64 -+ -+/* define _SZ_NO_INT_64, if your compiler doesn't support 64-bit integers. -+ NOTES: Some code will work incorrectly in that case! */ -+ -+typedef long Int64; -+typedef unsigned long UInt64; -+ -+#else -+ -+#if defined(_MSC_VER) || defined(__BORLANDC__) -+typedef __int64 Int64; -+typedef unsigned __int64 UInt64; -+#else -+typedef long long int Int64; -+typedef unsigned long long int UInt64; -+#endif -+ -+#endif -+ -+#ifdef _LZMA_NO_SYSTEM_SIZE_T -+typedef UInt32 SizeT; -+#else -+typedef size_t SizeT; -+#endif -+ -+typedef int Bool; -+#define True 1 -+#define False 0 -+ -+ -+#ifdef _WIN32 -+#define MY_STD_CALL __stdcall -+#else -+#define MY_STD_CALL -+#endif -+ -+#ifdef _MSC_VER -+ -+#if _MSC_VER >= 1300 -+#define MY_NO_INLINE __declspec(noinline) -+#else -+#define MY_NO_INLINE -+#endif -+ -+#define MY_CDECL __cdecl -+#define MY_FAST_CALL __fastcall -+ -+#else -+ -+#define MY_CDECL -+#define MY_FAST_CALL -+ -+#endif -+ -+ -+/* The following interfaces use first parameter as pointer to structure */ -+ -+typedef struct -+{ -+ SRes (*Read)(void *p, void *buf, size_t *size); -+ /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream. -+ (output(*size) < input(*size)) is allowed */ -+} ISeqInStream; -+ -+/* it can return SZ_ERROR_INPUT_EOF */ -+SRes SeqInStream_Read(ISeqInStream *stream, void *buf, size_t size); -+SRes SeqInStream_Read2(ISeqInStream *stream, void *buf, size_t size, SRes errorType); -+SRes SeqInStream_ReadByte(ISeqInStream *stream, Byte *buf); -+ -+typedef struct -+{ -+ size_t (*Write)(void *p, const void *buf, size_t size); -+ /* Returns: result - the number of actually written bytes. -+ (result < size) means error */ -+} ISeqOutStream; -+ -+typedef enum -+{ -+ SZ_SEEK_SET = 0, -+ SZ_SEEK_CUR = 1, -+ SZ_SEEK_END = 2 -+} ESzSeek; -+ -+typedef struct -+{ -+ SRes (*Read)(void *p, void *buf, size_t *size); /* same as ISeqInStream::Read */ -+ SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin); -+} ISeekInStream; -+ -+typedef struct -+{ -+ SRes (*Look)(void *p, void **buf, size_t *size); -+ /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream. -+ (output(*size) > input(*size)) is not allowed -+ (output(*size) < input(*size)) is allowed */ -+ SRes (*Skip)(void *p, size_t offset); -+ /* offset must be <= output(*size) of Look */ -+ -+ SRes (*Read)(void *p, void *buf, size_t *size); -+ /* reads directly (without buffer). It's same as ISeqInStream::Read */ -+ SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin); -+} ILookInStream; -+ -+SRes LookInStream_LookRead(ILookInStream *stream, void *buf, size_t *size); -+SRes LookInStream_SeekTo(ILookInStream *stream, UInt64 offset); -+ -+/* reads via ILookInStream::Read */ -+SRes LookInStream_Read2(ILookInStream *stream, void *buf, size_t size, SRes errorType); -+SRes LookInStream_Read(ILookInStream *stream, void *buf, size_t size); -+ -+#define LookToRead_BUF_SIZE (1 << 14) -+ -+typedef struct -+{ -+ ILookInStream s; -+ ISeekInStream *realStream; -+ size_t pos; -+ size_t size; -+ Byte buf[LookToRead_BUF_SIZE]; -+} CLookToRead; -+ -+void LookToRead_CreateVTable(CLookToRead *p, int lookahead); -+void LookToRead_Init(CLookToRead *p); -+ -+typedef struct -+{ -+ ISeqInStream s; -+ ILookInStream *realStream; -+} CSecToLook; -+ -+void SecToLook_CreateVTable(CSecToLook *p); -+ -+typedef struct -+{ -+ ISeqInStream s; -+ ILookInStream *realStream; -+} CSecToRead; -+ -+void SecToRead_CreateVTable(CSecToRead *p); -+ -+typedef struct -+{ -+ SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize); -+ /* Returns: result. (result != SZ_OK) means break. -+ Value (UInt64)(Int64)-1 for size means unknown value. */ -+} ICompressProgress; -+ -+typedef struct -+{ -+ void *(*Alloc)(void *p, size_t size); -+ void (*Free)(void *p, void *address); /* address can be 0 */ -+} ISzAlloc; -+ -+#define IAlloc_Alloc(p, size) (p)->Alloc((p), size) -+#define IAlloc_Free(p, a) (p)->Free((p), a) -+ -+EXTERN_C_END -+ -+#endif ---- a/include/uapi/linux/jffs2.h -+++ b/include/uapi/linux/jffs2.h -@@ -46,6 +46,7 @@ - #define JFFS2_COMPR_DYNRUBIN 0x05 - #define JFFS2_COMPR_ZLIB 0x06 - #define JFFS2_COMPR_LZO 0x07 -+#define JFFS2_COMPR_LZMA 0x08 - /* Compatibility flags. */ - #define JFFS2_COMPAT_MASK 0xc000 /* What do to if an unknown nodetype is found */ - #define JFFS2_NODE_ACCURATE 0x2000 ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -278,6 +278,12 @@ config ZSTD_DECOMPRESS - - source "lib/xz/Kconfig" - -+config LZMA_COMPRESS -+ tristate -+ -+config LZMA_DECOMPRESS -+ tristate -+ - # - # These all provide a common interface (hence the apparent duplication with - # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) ---- a/lib/Makefile -+++ b/lib/Makefile -@@ -3,6 +3,16 @@ - # Makefile for some libs needed in the kernel. - # - -+ifdef CONFIG_JFFS2_ZLIB -+ CONFIG_ZLIB_INFLATE:=y -+ CONFIG_ZLIB_DEFLATE:=y -+endif -+ -+ifdef CONFIG_JFFS2_LZMA -+ CONFIG_LZMA_DECOMPRESS:=y -+ CONFIG_LZMA_COMPRESS:=y -+endif -+ - ifdef CONFIG_FUNCTION_TRACER - ORIG_CFLAGS := $(KBUILD_CFLAGS) - KBUILD_CFLAGS = $(subst $(CC_FLAGS_FTRACE),,$(ORIG_CFLAGS)) -@@ -139,6 +149,8 @@ obj-$(CONFIG_ZSTD_COMPRESS) += zstd/ - obj-$(CONFIG_ZSTD_DECOMPRESS) += zstd/ - obj-$(CONFIG_XZ_DEC) += xz/ - obj-$(CONFIG_RAID6_PQ) += raid6/ -+obj-$(CONFIG_LZMA_COMPRESS) += lzma/ -+obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/ - - lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o - lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o ---- /dev/null -+++ b/lib/lzma/LzFind.c -@@ -0,0 +1,761 @@ -+/* LzFind.c -- Match finder for LZ algorithms -+2009-04-22 : Igor Pavlov : Public domain */ -+ -+#include -+ -+#include "LzFind.h" -+#include "LzHash.h" -+ -+#define kEmptyHashValue 0 -+#define kMaxValForNormalize ((UInt32)0xFFFFFFFF) -+#define kNormalizeStepMin (1 << 10) /* it must be power of 2 */ -+#define kNormalizeMask (~(kNormalizeStepMin - 1)) -+#define kMaxHistorySize ((UInt32)3 << 30) -+ -+#define kStartMaxLen 3 -+ -+static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ if (!p->directInput) -+ { -+ alloc->Free(alloc, p->bufferBase); -+ p->bufferBase = 0; -+ } -+} -+ -+/* keepSizeBefore + keepSizeAfter + keepSizeReserv must be < 4G) */ -+ -+static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc) -+{ -+ UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv; -+ if (p->directInput) -+ { -+ p->blockSize = blockSize; -+ return 1; -+ } -+ if (p->bufferBase == 0 || p->blockSize != blockSize) -+ { -+ LzInWindow_Free(p, alloc); -+ p->blockSize = blockSize; -+ p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize); -+ } -+ return (p->bufferBase != 0); -+} -+ -+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } -+Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } -+ -+UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } -+ -+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) -+{ -+ p->posLimit -= subValue; -+ p->pos -= subValue; -+ p->streamPos -= subValue; -+} -+ -+static void MatchFinder_ReadBlock(CMatchFinder *p) -+{ -+ if (p->streamEndWasReached || p->result != SZ_OK) -+ return; -+ if (p->directInput) -+ { -+ UInt32 curSize = 0xFFFFFFFF - p->streamPos; -+ if (curSize > p->directInputRem) -+ curSize = (UInt32)p->directInputRem; -+ p->directInputRem -= curSize; -+ p->streamPos += curSize; -+ if (p->directInputRem == 0) -+ p->streamEndWasReached = 1; -+ return; -+ } -+ for (;;) -+ { -+ Byte *dest = p->buffer + (p->streamPos - p->pos); -+ size_t size = (p->bufferBase + p->blockSize - dest); -+ if (size == 0) -+ return; -+ p->result = p->stream->Read(p->stream, dest, &size); -+ if (p->result != SZ_OK) -+ return; -+ if (size == 0) -+ { -+ p->streamEndWasReached = 1; -+ return; -+ } -+ p->streamPos += (UInt32)size; -+ if (p->streamPos - p->pos > p->keepSizeAfter) -+ return; -+ } -+} -+ -+void MatchFinder_MoveBlock(CMatchFinder *p) -+{ -+ memmove(p->bufferBase, -+ p->buffer - p->keepSizeBefore, -+ (size_t)(p->streamPos - p->pos + p->keepSizeBefore)); -+ p->buffer = p->bufferBase + p->keepSizeBefore; -+} -+ -+int MatchFinder_NeedMove(CMatchFinder *p) -+{ -+ if (p->directInput) -+ return 0; -+ /* if (p->streamEndWasReached) return 0; */ -+ return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter); -+} -+ -+void MatchFinder_ReadIfRequired(CMatchFinder *p) -+{ -+ if (p->streamEndWasReached) -+ return; -+ if (p->keepSizeAfter >= p->streamPos - p->pos) -+ MatchFinder_ReadBlock(p); -+} -+ -+static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p) -+{ -+ if (MatchFinder_NeedMove(p)) -+ MatchFinder_MoveBlock(p); -+ MatchFinder_ReadBlock(p); -+} -+ -+static void MatchFinder_SetDefaultSettings(CMatchFinder *p) -+{ -+ p->cutValue = 32; -+ p->btMode = 1; -+ p->numHashBytes = 4; -+ p->bigHash = 0; -+} -+ -+#define kCrcPoly 0xEDB88320 -+ -+void MatchFinder_Construct(CMatchFinder *p) -+{ -+ UInt32 i; -+ p->bufferBase = 0; -+ p->directInput = 0; -+ p->hash = 0; -+ MatchFinder_SetDefaultSettings(p); -+ -+ for (i = 0; i < 256; i++) -+ { -+ UInt32 r = i; -+ int j; -+ for (j = 0; j < 8; j++) -+ r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1)); -+ p->crc[i] = r; -+ } -+} -+ -+static void MatchFinder_FreeThisClassMemory(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->hash); -+ p->hash = 0; -+} -+ -+void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc) -+{ -+ MatchFinder_FreeThisClassMemory(p, alloc); -+ LzInWindow_Free(p, alloc); -+} -+ -+static CLzRef* AllocRefs(UInt32 num, ISzAlloc *alloc) -+{ -+ size_t sizeInBytes = (size_t)num * sizeof(CLzRef); -+ if (sizeInBytes / sizeof(CLzRef) != num) -+ return 0; -+ return (CLzRef *)alloc->Alloc(alloc, sizeInBytes); -+} -+ -+int MatchFinder_Create(CMatchFinder *p, UInt32 historySize, -+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter, -+ ISzAlloc *alloc) -+{ -+ UInt32 sizeReserv; -+ if (historySize > kMaxHistorySize) -+ { -+ MatchFinder_Free(p, alloc); -+ return 0; -+ } -+ sizeReserv = historySize >> 1; -+ if (historySize > ((UInt32)2 << 30)) -+ sizeReserv = historySize >> 2; -+ sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19); -+ -+ p->keepSizeBefore = historySize + keepAddBufferBefore + 1; -+ p->keepSizeAfter = matchMaxLen + keepAddBufferAfter; -+ /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */ -+ if (LzInWindow_Create(p, sizeReserv, alloc)) -+ { -+ UInt32 newCyclicBufferSize = historySize + 1; -+ UInt32 hs; -+ p->matchMaxLen = matchMaxLen; -+ { -+ p->fixedHashSize = 0; -+ if (p->numHashBytes == 2) -+ hs = (1 << 16) - 1; -+ else -+ { -+ hs = historySize - 1; -+ hs |= (hs >> 1); -+ hs |= (hs >> 2); -+ hs |= (hs >> 4); -+ hs |= (hs >> 8); -+ hs >>= 1; -+ hs |= 0xFFFF; /* don't change it! It's required for Deflate */ -+ if (hs > (1 << 24)) -+ { -+ if (p->numHashBytes == 3) -+ hs = (1 << 24) - 1; -+ else -+ hs >>= 1; -+ } -+ } -+ p->hashMask = hs; -+ hs++; -+ if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size; -+ if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size; -+ if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size; -+ hs += p->fixedHashSize; -+ } -+ -+ { -+ UInt32 prevSize = p->hashSizeSum + p->numSons; -+ UInt32 newSize; -+ p->historySize = historySize; -+ p->hashSizeSum = hs; -+ p->cyclicBufferSize = newCyclicBufferSize; -+ p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize); -+ newSize = p->hashSizeSum + p->numSons; -+ if (p->hash != 0 && prevSize == newSize) -+ return 1; -+ MatchFinder_FreeThisClassMemory(p, alloc); -+ p->hash = AllocRefs(newSize, alloc); -+ if (p->hash != 0) -+ { -+ p->son = p->hash + p->hashSizeSum; -+ return 1; -+ } -+ } -+ } -+ MatchFinder_Free(p, alloc); -+ return 0; -+} -+ -+static void MatchFinder_SetLimits(CMatchFinder *p) -+{ -+ UInt32 limit = kMaxValForNormalize - p->pos; -+ UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos; -+ if (limit2 < limit) -+ limit = limit2; -+ limit2 = p->streamPos - p->pos; -+ if (limit2 <= p->keepSizeAfter) -+ { -+ if (limit2 > 0) -+ limit2 = 1; -+ } -+ else -+ limit2 -= p->keepSizeAfter; -+ if (limit2 < limit) -+ limit = limit2; -+ { -+ UInt32 lenLimit = p->streamPos - p->pos; -+ if (lenLimit > p->matchMaxLen) -+ lenLimit = p->matchMaxLen; -+ p->lenLimit = lenLimit; -+ } -+ p->posLimit = p->pos + limit; -+} -+ -+void MatchFinder_Init(CMatchFinder *p) -+{ -+ UInt32 i; -+ for (i = 0; i < p->hashSizeSum; i++) -+ p->hash[i] = kEmptyHashValue; -+ p->cyclicBufferPos = 0; -+ p->buffer = p->bufferBase; -+ p->pos = p->streamPos = p->cyclicBufferSize; -+ p->result = SZ_OK; -+ p->streamEndWasReached = 0; -+ MatchFinder_ReadBlock(p); -+ MatchFinder_SetLimits(p); -+} -+ -+static UInt32 MatchFinder_GetSubValue(CMatchFinder *p) -+{ -+ return (p->pos - p->historySize - 1) & kNormalizeMask; -+} -+ -+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems) -+{ -+ UInt32 i; -+ for (i = 0; i < numItems; i++) -+ { -+ UInt32 value = items[i]; -+ if (value <= subValue) -+ value = kEmptyHashValue; -+ else -+ value -= subValue; -+ items[i] = value; -+ } -+} -+ -+static void MatchFinder_Normalize(CMatchFinder *p) -+{ -+ UInt32 subValue = MatchFinder_GetSubValue(p); -+ MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons); -+ MatchFinder_ReduceOffsets(p, subValue); -+} -+ -+static void MatchFinder_CheckLimits(CMatchFinder *p) -+{ -+ if (p->pos == kMaxValForNormalize) -+ MatchFinder_Normalize(p); -+ if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos) -+ MatchFinder_CheckAndMoveAndRead(p); -+ if (p->cyclicBufferPos == p->cyclicBufferSize) -+ p->cyclicBufferPos = 0; -+ MatchFinder_SetLimits(p); -+} -+ -+static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -+ UInt32 *distances, UInt32 maxLen) -+{ -+ son[_cyclicBufferPos] = curMatch; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ return distances; -+ { -+ const Byte *pb = cur - delta; -+ curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)]; -+ if (pb[maxLen] == cur[maxLen] && *pb == *cur) -+ { -+ UInt32 len = 0; -+ while (++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ if (maxLen < len) -+ { -+ *distances++ = maxLen = len; -+ *distances++ = delta - 1; -+ if (len == lenLimit) -+ return distances; -+ } -+ } -+ } -+ } -+} -+ -+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue, -+ UInt32 *distances, UInt32 maxLen) -+{ -+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1; -+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1); -+ UInt32 len0 = 0, len1 = 0; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ { -+ *ptr0 = *ptr1 = kEmptyHashValue; -+ return distances; -+ } -+ { -+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1); -+ const Byte *pb = cur - delta; -+ UInt32 len = (len0 < len1 ? len0 : len1); -+ if (pb[len] == cur[len]) -+ { -+ if (++len != lenLimit && pb[len] == cur[len]) -+ while (++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ if (maxLen < len) -+ { -+ *distances++ = maxLen = len; -+ *distances++ = delta - 1; -+ if (len == lenLimit) -+ { -+ *ptr1 = pair[0]; -+ *ptr0 = pair[1]; -+ return distances; -+ } -+ } -+ } -+ if (pb[len] < cur[len]) -+ { -+ *ptr1 = curMatch; -+ ptr1 = pair + 1; -+ curMatch = *ptr1; -+ len1 = len; -+ } -+ else -+ { -+ *ptr0 = curMatch; -+ ptr0 = pair; -+ curMatch = *ptr0; -+ len0 = len; -+ } -+ } -+ } -+} -+ -+static void SkipMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son, -+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue) -+{ -+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1; -+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1); -+ UInt32 len0 = 0, len1 = 0; -+ for (;;) -+ { -+ UInt32 delta = pos - curMatch; -+ if (cutValue-- == 0 || delta >= _cyclicBufferSize) -+ { -+ *ptr0 = *ptr1 = kEmptyHashValue; -+ return; -+ } -+ { -+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1); -+ const Byte *pb = cur - delta; -+ UInt32 len = (len0 < len1 ? len0 : len1); -+ if (pb[len] == cur[len]) -+ { -+ while (++len != lenLimit) -+ if (pb[len] != cur[len]) -+ break; -+ { -+ if (len == lenLimit) -+ { -+ *ptr1 = pair[0]; -+ *ptr0 = pair[1]; -+ return; -+ } -+ } -+ } -+ if (pb[len] < cur[len]) -+ { -+ *ptr1 = curMatch; -+ ptr1 = pair + 1; -+ curMatch = *ptr1; -+ len1 = len; -+ } -+ else -+ { -+ *ptr0 = curMatch; -+ ptr0 = pair; -+ curMatch = *ptr0; -+ len0 = len; -+ } -+ } -+ } -+} -+ -+#define MOVE_POS \ -+ ++p->cyclicBufferPos; \ -+ p->buffer++; \ -+ if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p); -+ -+#define MOVE_POS_RET MOVE_POS return offset; -+ -+static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; } -+ -+#define GET_MATCHES_HEADER2(minLen, ret_op) \ -+ UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \ -+ lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \ -+ cur = p->buffer; -+ -+#define GET_MATCHES_HEADER(minLen) GET_MATCHES_HEADER2(minLen, return 0) -+#define SKIP_HEADER(minLen) GET_MATCHES_HEADER2(minLen, continue) -+ -+#define MF_PARAMS(p) p->pos, p->buffer, p->son, p->cyclicBufferPos, p->cyclicBufferSize, p->cutValue -+ -+#define GET_MATCHES_FOOTER(offset, maxLen) \ -+ offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \ -+ distances + offset, maxLen) - distances); MOVE_POS_RET; -+ -+#define SKIP_FOOTER \ -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS; -+ -+static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(2) -+ HASH2_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = 0; -+ GET_MATCHES_FOOTER(offset, 1) -+} -+ -+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = 0; -+ GET_MATCHES_FOOTER(offset, 2) -+} -+ -+static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, delta2, maxLen, offset; -+ GET_MATCHES_HEADER(3) -+ -+ HASH3_CALC; -+ -+ delta2 = p->pos - p->hash[hash2Value]; -+ curMatch = p->hash[kFix3HashSize + hashValue]; -+ -+ p->hash[hash2Value] = -+ p->hash[kFix3HashSize + hashValue] = p->pos; -+ -+ -+ maxLen = 2; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[0] = maxLen; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ if (maxLen == lenLimit) -+ { -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -+ MOVE_POS_RET; -+ } -+ } -+ GET_MATCHES_FOOTER(offset, maxLen) -+} -+ -+static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -+ GET_MATCHES_HEADER(4) -+ -+ HASH4_CALC; -+ -+ delta2 = p->pos - p->hash[ hash2Value]; -+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ -+ maxLen = 1; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ distances[0] = maxLen = 2; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ } -+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -+ { -+ maxLen = 3; -+ distances[offset + 1] = delta3 - 1; -+ offset += 2; -+ delta2 = delta3; -+ } -+ if (offset != 0) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[offset - 2] = maxLen; -+ if (maxLen == lenLimit) -+ { -+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); -+ MOVE_POS_RET; -+ } -+ } -+ if (maxLen < 3) -+ maxLen = 3; -+ GET_MATCHES_FOOTER(offset, maxLen) -+} -+ -+static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset; -+ GET_MATCHES_HEADER(4) -+ -+ HASH4_CALC; -+ -+ delta2 = p->pos - p->hash[ hash2Value]; -+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ -+ maxLen = 1; -+ offset = 0; -+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur) -+ { -+ distances[0] = maxLen = 2; -+ distances[1] = delta2 - 1; -+ offset = 2; -+ } -+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur) -+ { -+ maxLen = 3; -+ distances[offset + 1] = delta3 - 1; -+ offset += 2; -+ delta2 = delta3; -+ } -+ if (offset != 0) -+ { -+ for (; maxLen != lenLimit; maxLen++) -+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen]) -+ break; -+ distances[offset - 2] = maxLen; -+ if (maxLen == lenLimit) -+ { -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS_RET; -+ } -+ } -+ if (maxLen < 3) -+ maxLen = 3; -+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -+ distances + offset, maxLen) - (distances)); -+ MOVE_POS_RET -+} -+ -+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) -+{ -+ UInt32 offset; -+ GET_MATCHES_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p), -+ distances, 2) - (distances)); -+ MOVE_POS_RET -+} -+ -+static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(2) -+ HASH2_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value; -+ SKIP_HEADER(3) -+ HASH3_CALC; -+ curMatch = p->hash[kFix3HashSize + hashValue]; -+ p->hash[hash2Value] = -+ p->hash[kFix3HashSize + hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value, hash3Value; -+ SKIP_HEADER(4) -+ HASH4_CALC; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = p->pos; -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ SKIP_FOOTER -+ } -+ while (--num != 0); -+} -+ -+static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ UInt32 hash2Value, hash3Value; -+ SKIP_HEADER(4) -+ HASH4_CALC; -+ curMatch = p->hash[kFix4HashSize + hashValue]; -+ p->hash[ hash2Value] = -+ p->hash[kFix3HashSize + hash3Value] = -+ p->hash[kFix4HashSize + hashValue] = p->pos; -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS -+ } -+ while (--num != 0); -+} -+ -+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num) -+{ -+ do -+ { -+ SKIP_HEADER(3) -+ HASH_ZIP_CALC; -+ curMatch = p->hash[hashValue]; -+ p->hash[hashValue] = p->pos; -+ p->son[p->cyclicBufferPos] = curMatch; -+ MOVE_POS -+ } -+ while (--num != 0); -+} -+ -+void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable) -+{ -+ vTable->Init = (Mf_Init_Func)MatchFinder_Init; -+ vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte; -+ vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes; -+ vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos; -+ if (!p->btMode) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip; -+ } -+ else if (p->numHashBytes == 2) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip; -+ } -+ else if (p->numHashBytes == 3) -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip; -+ } -+ else -+ { -+ vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches; -+ vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip; -+ } -+} ---- /dev/null -+++ b/lib/lzma/LzmaDec.c -@@ -0,0 +1,999 @@ -+/* LzmaDec.c -- LZMA Decoder -+2009-09-20 : Igor Pavlov : Public domain */ -+ -+#include "LzmaDec.h" -+ -+#include -+ -+#define kNumTopBits 24 -+#define kTopValue ((UInt32)1 << kNumTopBits) -+ -+#define kNumBitModelTotalBits 11 -+#define kBitModelTotal (1 << kNumBitModelTotalBits) -+#define kNumMoveBits 5 -+ -+#define RC_INIT_SIZE 5 -+ -+#define NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | (*buf++); } -+ -+#define IF_BIT_0(p) ttt = *(p); NORMALIZE; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound) -+#define UPDATE_0(p) range = bound; *(p) = (CLzmaProb)(ttt + ((kBitModelTotal - ttt) >> kNumMoveBits)); -+#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CLzmaProb)(ttt - (ttt >> kNumMoveBits)); -+#define GET_BIT2(p, i, A0, A1) IF_BIT_0(p) \ -+ { UPDATE_0(p); i = (i + i); A0; } else \ -+ { UPDATE_1(p); i = (i + i) + 1; A1; } -+#define GET_BIT(p, i) GET_BIT2(p, i, ; , ;) -+ -+#define TREE_GET_BIT(probs, i) { GET_BIT((probs + i), i); } -+#define TREE_DECODE(probs, limit, i) \ -+ { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; } -+ -+/* #define _LZMA_SIZE_OPT */ -+ -+#ifdef _LZMA_SIZE_OPT -+#define TREE_6_DECODE(probs, i) TREE_DECODE(probs, (1 << 6), i) -+#else -+#define TREE_6_DECODE(probs, i) \ -+ { i = 1; \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ TREE_GET_BIT(probs, i); \ -+ i -= 0x40; } -+#endif -+ -+#define NORMALIZE_CHECK if (range < kTopValue) { if (buf >= bufLimit) return DUMMY_ERROR; range <<= 8; code = (code << 8) | (*buf++); } -+ -+#define IF_BIT_0_CHECK(p) ttt = *(p); NORMALIZE_CHECK; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound) -+#define UPDATE_0_CHECK range = bound; -+#define UPDATE_1_CHECK range -= bound; code -= bound; -+#define GET_BIT2_CHECK(p, i, A0, A1) IF_BIT_0_CHECK(p) \ -+ { UPDATE_0_CHECK; i = (i + i); A0; } else \ -+ { UPDATE_1_CHECK; i = (i + i) + 1; A1; } -+#define GET_BIT_CHECK(p, i) GET_BIT2_CHECK(p, i, ; , ;) -+#define TREE_DECODE_CHECK(probs, limit, i) \ -+ { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; } -+ -+ -+#define kNumPosBitsMax 4 -+#define kNumPosStatesMax (1 << kNumPosBitsMax) -+ -+#define kLenNumLowBits 3 -+#define kLenNumLowSymbols (1 << kLenNumLowBits) -+#define kLenNumMidBits 3 -+#define kLenNumMidSymbols (1 << kLenNumMidBits) -+#define kLenNumHighBits 8 -+#define kLenNumHighSymbols (1 << kLenNumHighBits) -+ -+#define LenChoice 0 -+#define LenChoice2 (LenChoice + 1) -+#define LenLow (LenChoice2 + 1) -+#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits)) -+#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits)) -+#define kNumLenProbs (LenHigh + kLenNumHighSymbols) -+ -+ -+#define kNumStates 12 -+#define kNumLitStates 7 -+ -+#define kStartPosModelIndex 4 -+#define kEndPosModelIndex 14 -+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1)) -+ -+#define kNumPosSlotBits 6 -+#define kNumLenToPosStates 4 -+ -+#define kNumAlignBits 4 -+#define kAlignTableSize (1 << kNumAlignBits) -+ -+#define kMatchMinLen 2 -+#define kMatchSpecLenStart (kMatchMinLen + kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols) -+ -+#define IsMatch 0 -+#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax)) -+#define IsRepG0 (IsRep + kNumStates) -+#define IsRepG1 (IsRepG0 + kNumStates) -+#define IsRepG2 (IsRepG1 + kNumStates) -+#define IsRep0Long (IsRepG2 + kNumStates) -+#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax)) -+#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits)) -+#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex) -+#define LenCoder (Align + kAlignTableSize) -+#define RepLenCoder (LenCoder + kNumLenProbs) -+#define Literal (RepLenCoder + kNumLenProbs) -+ -+#define LZMA_BASE_SIZE 1846 -+#define LZMA_LIT_SIZE 768 -+ -+#define LzmaProps_GetNumProbs(p) ((UInt32)LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((p)->lc + (p)->lp))) -+ -+#if Literal != LZMA_BASE_SIZE -+StopCompilingDueBUG -+#endif -+ -+#define LZMA_DIC_MIN (1 << 12) -+ -+/* First LZMA-symbol is always decoded. -+And it decodes new LZMA-symbols while (buf < bufLimit), but "buf" is without last normalization -+Out: -+ Result: -+ SZ_OK - OK -+ SZ_ERROR_DATA - Error -+ p->remainLen: -+ < kMatchSpecLenStart : normal remain -+ = kMatchSpecLenStart : finished -+ = kMatchSpecLenStart + 1 : Flush marker -+ = kMatchSpecLenStart + 2 : State Init Marker -+*/ -+ -+static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit) -+{ -+ CLzmaProb *probs = p->probs; -+ -+ unsigned state = p->state; -+ UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3]; -+ unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1; -+ unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1; -+ unsigned lc = p->prop.lc; -+ -+ Byte *dic = p->dic; -+ SizeT dicBufSize = p->dicBufSize; -+ SizeT dicPos = p->dicPos; -+ -+ UInt32 processedPos = p->processedPos; -+ UInt32 checkDicSize = p->checkDicSize; -+ unsigned len = 0; -+ -+ const Byte *buf = p->buf; -+ UInt32 range = p->range; -+ UInt32 code = p->code; -+ -+ do -+ { -+ CLzmaProb *prob; -+ UInt32 bound; -+ unsigned ttt; -+ unsigned posState = processedPos & pbMask; -+ -+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0(prob) -+ { -+ unsigned symbol; -+ UPDATE_0(prob); -+ prob = probs + Literal; -+ if (checkDicSize != 0 || processedPos != 0) -+ prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) + -+ (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc)))); -+ -+ if (state < kNumLitStates) -+ { -+ state -= (state < 4) ? state : 3; -+ symbol = 1; -+ do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100); -+ } -+ else -+ { -+ unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ unsigned offs = 0x100; -+ state -= (state < 10) ? 3 : 6; -+ symbol = 1; -+ do -+ { -+ unsigned bit; -+ CLzmaProb *probLit; -+ matchByte <<= 1; -+ bit = (matchByte & offs); -+ probLit = prob + offs + bit + symbol; -+ GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit) -+ } -+ while (symbol < 0x100); -+ } -+ dic[dicPos++] = (Byte)symbol; -+ processedPos++; -+ continue; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ prob = probs + IsRep + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ state += kNumStates; -+ prob = probs + LenCoder; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ if (checkDicSize == 0 && processedPos == 0) -+ return SZ_ERROR_DATA; -+ prob = probs + IsRepG0 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ dicPos++; -+ processedPos++; -+ state = state < kNumLitStates ? 9 : 11; -+ continue; -+ } -+ UPDATE_1(prob); -+ } -+ else -+ { -+ UInt32 distance; -+ UPDATE_1(prob); -+ prob = probs + IsRepG1 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ distance = rep1; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ prob = probs + IsRepG2 + state; -+ IF_BIT_0(prob) -+ { -+ UPDATE_0(prob); -+ distance = rep2; -+ } -+ else -+ { -+ UPDATE_1(prob); -+ distance = rep3; -+ rep3 = rep2; -+ } -+ rep2 = rep1; -+ } -+ rep1 = rep0; -+ rep0 = distance; -+ } -+ state = state < kNumLitStates ? 8 : 11; -+ prob = probs + RepLenCoder; -+ } -+ { -+ unsigned limit, offset; -+ CLzmaProb *probLen = prob + LenChoice; -+ IF_BIT_0(probLen) -+ { -+ UPDATE_0(probLen); -+ probLen = prob + LenLow + (posState << kLenNumLowBits); -+ offset = 0; -+ limit = (1 << kLenNumLowBits); -+ } -+ else -+ { -+ UPDATE_1(probLen); -+ probLen = prob + LenChoice2; -+ IF_BIT_0(probLen) -+ { -+ UPDATE_0(probLen); -+ probLen = prob + LenMid + (posState << kLenNumMidBits); -+ offset = kLenNumLowSymbols; -+ limit = (1 << kLenNumMidBits); -+ } -+ else -+ { -+ UPDATE_1(probLen); -+ probLen = prob + LenHigh; -+ offset = kLenNumLowSymbols + kLenNumMidSymbols; -+ limit = (1 << kLenNumHighBits); -+ } -+ } -+ TREE_DECODE(probLen, limit, len); -+ len += offset; -+ } -+ -+ if (state >= kNumStates) -+ { -+ UInt32 distance; -+ prob = probs + PosSlot + -+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits); -+ TREE_6_DECODE(prob, distance); -+ if (distance >= kStartPosModelIndex) -+ { -+ unsigned posSlot = (unsigned)distance; -+ int numDirectBits = (int)(((distance >> 1) - 1)); -+ distance = (2 | (distance & 1)); -+ if (posSlot < kEndPosModelIndex) -+ { -+ distance <<= numDirectBits; -+ prob = probs + SpecPos + distance - posSlot - 1; -+ { -+ UInt32 mask = 1; -+ unsigned i = 1; -+ do -+ { -+ GET_BIT2(prob + i, i, ; , distance |= mask); -+ mask <<= 1; -+ } -+ while (--numDirectBits != 0); -+ } -+ } -+ else -+ { -+ numDirectBits -= kNumAlignBits; -+ do -+ { -+ NORMALIZE -+ range >>= 1; -+ -+ { -+ UInt32 t; -+ code -= range; -+ t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */ -+ distance = (distance << 1) + (t + 1); -+ code += range & t; -+ } -+ /* -+ distance <<= 1; -+ if (code >= range) -+ { -+ code -= range; -+ distance |= 1; -+ } -+ */ -+ } -+ while (--numDirectBits != 0); -+ prob = probs + Align; -+ distance <<= kNumAlignBits; -+ { -+ unsigned i = 1; -+ GET_BIT2(prob + i, i, ; , distance |= 1); -+ GET_BIT2(prob + i, i, ; , distance |= 2); -+ GET_BIT2(prob + i, i, ; , distance |= 4); -+ GET_BIT2(prob + i, i, ; , distance |= 8); -+ } -+ if (distance == (UInt32)0xFFFFFFFF) -+ { -+ len += kMatchSpecLenStart; -+ state -= kNumStates; -+ break; -+ } -+ } -+ } -+ rep3 = rep2; -+ rep2 = rep1; -+ rep1 = rep0; -+ rep0 = distance + 1; -+ if (checkDicSize == 0) -+ { -+ if (distance >= processedPos) -+ return SZ_ERROR_DATA; -+ } -+ else if (distance >= checkDicSize) -+ return SZ_ERROR_DATA; -+ state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3; -+ } -+ -+ len += kMatchMinLen; -+ -+ if (limit == dicPos) -+ return SZ_ERROR_DATA; -+ { -+ SizeT rem = limit - dicPos; -+ unsigned curLen = ((rem < len) ? (unsigned)rem : len); -+ SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0); -+ -+ processedPos += curLen; -+ -+ len -= curLen; -+ if (pos + curLen <= dicBufSize) -+ { -+ Byte *dest = dic + dicPos; -+ ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos; -+ const Byte *lim = dest + curLen; -+ dicPos += curLen; -+ do -+ *(dest) = (Byte)*(dest + src); -+ while (++dest != lim); -+ } -+ else -+ { -+ do -+ { -+ dic[dicPos++] = dic[pos]; -+ if (++pos == dicBufSize) -+ pos = 0; -+ } -+ while (--curLen != 0); -+ } -+ } -+ } -+ } -+ while (dicPos < limit && buf < bufLimit); -+ NORMALIZE; -+ p->buf = buf; -+ p->range = range; -+ p->code = code; -+ p->remainLen = len; -+ p->dicPos = dicPos; -+ p->processedPos = processedPos; -+ p->reps[0] = rep0; -+ p->reps[1] = rep1; -+ p->reps[2] = rep2; -+ p->reps[3] = rep3; -+ p->state = state; -+ -+ return SZ_OK; -+} -+ -+static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit) -+{ -+ if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart) -+ { -+ Byte *dic = p->dic; -+ SizeT dicPos = p->dicPos; -+ SizeT dicBufSize = p->dicBufSize; -+ unsigned len = p->remainLen; -+ UInt32 rep0 = p->reps[0]; -+ if (limit - dicPos < len) -+ len = (unsigned)(limit - dicPos); -+ -+ if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len) -+ p->checkDicSize = p->prop.dicSize; -+ -+ p->processedPos += len; -+ p->remainLen -= len; -+ while (len-- != 0) -+ { -+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)]; -+ dicPos++; -+ } -+ p->dicPos = dicPos; -+ } -+} -+ -+static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit) -+{ -+ do -+ { -+ SizeT limit2 = limit; -+ if (p->checkDicSize == 0) -+ { -+ UInt32 rem = p->prop.dicSize - p->processedPos; -+ if (limit - p->dicPos > rem) -+ limit2 = p->dicPos + rem; -+ } -+ RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit)); -+ if (p->processedPos >= p->prop.dicSize) -+ p->checkDicSize = p->prop.dicSize; -+ LzmaDec_WriteRem(p, limit); -+ } -+ while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart); -+ -+ if (p->remainLen > kMatchSpecLenStart) -+ { -+ p->remainLen = kMatchSpecLenStart; -+ } -+ return 0; -+} -+ -+typedef enum -+{ -+ DUMMY_ERROR, /* unexpected end of input stream */ -+ DUMMY_LIT, -+ DUMMY_MATCH, -+ DUMMY_REP -+} ELzmaDummy; -+ -+static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize) -+{ -+ UInt32 range = p->range; -+ UInt32 code = p->code; -+ const Byte *bufLimit = buf + inSize; -+ CLzmaProb *probs = p->probs; -+ unsigned state = p->state; -+ ELzmaDummy res; -+ -+ { -+ CLzmaProb *prob; -+ UInt32 bound; -+ unsigned ttt; -+ unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1); -+ -+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK -+ -+ /* if (bufLimit - buf >= 7) return DUMMY_LIT; */ -+ -+ prob = probs + Literal; -+ if (p->checkDicSize != 0 || p->processedPos != 0) -+ prob += (LZMA_LIT_SIZE * -+ ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) + -+ (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc)))); -+ -+ if (state < kNumLitStates) -+ { -+ unsigned symbol = 1; -+ do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100); -+ } -+ else -+ { -+ unsigned matchByte = p->dic[p->dicPos - p->reps[0] + -+ ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)]; -+ unsigned offs = 0x100; -+ unsigned symbol = 1; -+ do -+ { -+ unsigned bit; -+ CLzmaProb *probLit; -+ matchByte <<= 1; -+ bit = (matchByte & offs); -+ probLit = prob + offs + bit + symbol; -+ GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit) -+ } -+ while (symbol < 0x100); -+ } -+ res = DUMMY_LIT; -+ } -+ else -+ { -+ unsigned len; -+ UPDATE_1_CHECK; -+ -+ prob = probs + IsRep + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ state = 0; -+ prob = probs + LenCoder; -+ res = DUMMY_MATCH; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ res = DUMMY_REP; -+ prob = probs + IsRepG0 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ NORMALIZE_CHECK; -+ return DUMMY_REP; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ } -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ prob = probs + IsRepG1 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ prob = probs + IsRepG2 + state; -+ IF_BIT_0_CHECK(prob) -+ { -+ UPDATE_0_CHECK; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ } -+ } -+ } -+ state = kNumStates; -+ prob = probs + RepLenCoder; -+ } -+ { -+ unsigned limit, offset; -+ CLzmaProb *probLen = prob + LenChoice; -+ IF_BIT_0_CHECK(probLen) -+ { -+ UPDATE_0_CHECK; -+ probLen = prob + LenLow + (posState << kLenNumLowBits); -+ offset = 0; -+ limit = 1 << kLenNumLowBits; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ probLen = prob + LenChoice2; -+ IF_BIT_0_CHECK(probLen) -+ { -+ UPDATE_0_CHECK; -+ probLen = prob + LenMid + (posState << kLenNumMidBits); -+ offset = kLenNumLowSymbols; -+ limit = 1 << kLenNumMidBits; -+ } -+ else -+ { -+ UPDATE_1_CHECK; -+ probLen = prob + LenHigh; -+ offset = kLenNumLowSymbols + kLenNumMidSymbols; -+ limit = 1 << kLenNumHighBits; -+ } -+ } -+ TREE_DECODE_CHECK(probLen, limit, len); -+ len += offset; -+ } -+ -+ if (state < 4) -+ { -+ unsigned posSlot; -+ prob = probs + PosSlot + -+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << -+ kNumPosSlotBits); -+ TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot); -+ if (posSlot >= kStartPosModelIndex) -+ { -+ int numDirectBits = ((posSlot >> 1) - 1); -+ -+ /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */ -+ -+ if (posSlot < kEndPosModelIndex) -+ { -+ prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1; -+ } -+ else -+ { -+ numDirectBits -= kNumAlignBits; -+ do -+ { -+ NORMALIZE_CHECK -+ range >>= 1; -+ code -= range & (((code - range) >> 31) - 1); -+ /* if (code >= range) code -= range; */ -+ } -+ while (--numDirectBits != 0); -+ prob = probs + Align; -+ numDirectBits = kNumAlignBits; -+ } -+ { -+ unsigned i = 1; -+ do -+ { -+ GET_BIT_CHECK(prob + i, i); -+ } -+ while (--numDirectBits != 0); -+ } -+ } -+ } -+ } -+ } -+ NORMALIZE_CHECK; -+ return res; -+} -+ -+ -+static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data) -+{ -+ p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]); -+ p->range = 0xFFFFFFFF; -+ p->needFlush = 0; -+} -+ -+void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) -+{ -+ p->needFlush = 1; -+ p->remainLen = 0; -+ p->tempBufSize = 0; -+ -+ if (initDic) -+ { -+ p->processedPos = 0; -+ p->checkDicSize = 0; -+ p->needInitState = 1; -+ } -+ if (initState) -+ p->needInitState = 1; -+} -+ -+void LzmaDec_Init(CLzmaDec *p) -+{ -+ p->dicPos = 0; -+ LzmaDec_InitDicAndState(p, True, True); -+} -+ -+static void LzmaDec_InitStateReal(CLzmaDec *p) -+{ -+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp)); -+ UInt32 i; -+ CLzmaProb *probs = p->probs; -+ for (i = 0; i < numProbs; i++) -+ probs[i] = kBitModelTotal >> 1; -+ p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1; -+ p->state = 0; -+ p->needInitState = 0; -+} -+ -+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen, -+ ELzmaFinishMode finishMode, ELzmaStatus *status) -+{ -+ SizeT inSize = *srcLen; -+ (*srcLen) = 0; -+ LzmaDec_WriteRem(p, dicLimit); -+ -+ *status = LZMA_STATUS_NOT_SPECIFIED; -+ -+ while (p->remainLen != kMatchSpecLenStart) -+ { -+ int checkEndMarkNow; -+ -+ if (p->needFlush != 0) -+ { -+ for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--) -+ p->tempBuf[p->tempBufSize++] = *src++; -+ if (p->tempBufSize < RC_INIT_SIZE) -+ { -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (p->tempBuf[0] != 0) -+ return SZ_ERROR_DATA; -+ -+ LzmaDec_InitRc(p, p->tempBuf); -+ p->tempBufSize = 0; -+ } -+ -+ checkEndMarkNow = 0; -+ if (p->dicPos >= dicLimit) -+ { -+ if (p->remainLen == 0 && p->code == 0) -+ { -+ *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK; -+ return SZ_OK; -+ } -+ if (finishMode == LZMA_FINISH_ANY) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_OK; -+ } -+ if (p->remainLen != 0) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ checkEndMarkNow = 1; -+ } -+ -+ if (p->needInitState) -+ LzmaDec_InitStateReal(p); -+ -+ if (p->tempBufSize == 0) -+ { -+ SizeT processed; -+ const Byte *bufLimit; -+ if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow) -+ { -+ int dummyRes = LzmaDec_TryDummy(p, src, inSize); -+ if (dummyRes == DUMMY_ERROR) -+ { -+ memcpy(p->tempBuf, src, inSize); -+ p->tempBufSize = (unsigned)inSize; -+ (*srcLen) += inSize; -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ bufLimit = src; -+ } -+ else -+ bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX; -+ p->buf = src; -+ if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0) -+ return SZ_ERROR_DATA; -+ processed = (SizeT)(p->buf - src); -+ (*srcLen) += processed; -+ src += processed; -+ inSize -= processed; -+ } -+ else -+ { -+ unsigned rem = p->tempBufSize, lookAhead = 0; -+ while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize) -+ p->tempBuf[rem++] = src[lookAhead++]; -+ p->tempBufSize = rem; -+ if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow) -+ { -+ int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem); -+ if (dummyRes == DUMMY_ERROR) -+ { -+ (*srcLen) += lookAhead; -+ *status = LZMA_STATUS_NEEDS_MORE_INPUT; -+ return SZ_OK; -+ } -+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH) -+ { -+ *status = LZMA_STATUS_NOT_FINISHED; -+ return SZ_ERROR_DATA; -+ } -+ } -+ p->buf = p->tempBuf; -+ if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0) -+ return SZ_ERROR_DATA; -+ lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf)); -+ (*srcLen) += lookAhead; -+ src += lookAhead; -+ inSize -= lookAhead; -+ p->tempBufSize = 0; -+ } -+ } -+ if (p->code == 0) -+ *status = LZMA_STATUS_FINISHED_WITH_MARK; -+ return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA; -+} -+ -+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status) -+{ -+ SizeT outSize = *destLen; -+ SizeT inSize = *srcLen; -+ *srcLen = *destLen = 0; -+ for (;;) -+ { -+ SizeT inSizeCur = inSize, outSizeCur, dicPos; -+ ELzmaFinishMode curFinishMode; -+ SRes res; -+ if (p->dicPos == p->dicBufSize) -+ p->dicPos = 0; -+ dicPos = p->dicPos; -+ if (outSize > p->dicBufSize - dicPos) -+ { -+ outSizeCur = p->dicBufSize; -+ curFinishMode = LZMA_FINISH_ANY; -+ } -+ else -+ { -+ outSizeCur = dicPos + outSize; -+ curFinishMode = finishMode; -+ } -+ -+ res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status); -+ src += inSizeCur; -+ inSize -= inSizeCur; -+ *srcLen += inSizeCur; -+ outSizeCur = p->dicPos - dicPos; -+ memcpy(dest, p->dic + dicPos, outSizeCur); -+ dest += outSizeCur; -+ outSize -= outSizeCur; -+ *destLen += outSizeCur; -+ if (res != 0) -+ return res; -+ if (outSizeCur == 0 || outSize == 0) -+ return SZ_OK; -+ } -+} -+ -+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->probs); -+ p->probs = 0; -+} -+ -+static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->dic); -+ p->dic = 0; -+} -+ -+void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc) -+{ -+ LzmaDec_FreeProbs(p, alloc); -+ LzmaDec_FreeDict(p, alloc); -+} -+ -+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) -+{ -+ UInt32 dicSize; -+ Byte d; -+ -+ if (size < LZMA_PROPS_SIZE) -+ return SZ_ERROR_UNSUPPORTED; -+ else -+ dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24); -+ -+ if (dicSize < LZMA_DIC_MIN) -+ dicSize = LZMA_DIC_MIN; -+ p->dicSize = dicSize; -+ -+ d = data[0]; -+ if (d >= (9 * 5 * 5)) -+ return SZ_ERROR_UNSUPPORTED; -+ -+ p->lc = d % 9; -+ d /= 9; -+ p->pb = d / 5; -+ p->lp = d % 5; -+ -+ return SZ_OK; -+} -+ -+static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc) -+{ -+ UInt32 numProbs = LzmaProps_GetNumProbs(propNew); -+ if (p->probs == 0 || numProbs != p->numProbs) -+ { -+ LzmaDec_FreeProbs(p, alloc); -+ p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb)); -+ p->numProbs = numProbs; -+ if (p->probs == 0) -+ return SZ_ERROR_MEM; -+ } -+ return SZ_OK; -+} -+ -+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+{ -+ CLzmaProps propNew; -+ RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -+ p->prop = propNew; -+ return SZ_OK; -+} -+ -+SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc) -+{ -+ CLzmaProps propNew; -+ SizeT dicBufSize; -+ RINOK(LzmaProps_Decode(&propNew, props, propsSize)); -+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc)); -+ dicBufSize = propNew.dicSize; -+ if (p->dic == 0 || dicBufSize != p->dicBufSize) -+ { -+ LzmaDec_FreeDict(p, alloc); -+ p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize); -+ if (p->dic == 0) -+ { -+ LzmaDec_FreeProbs(p, alloc); -+ return SZ_ERROR_MEM; -+ } -+ } -+ p->dicBufSize = dicBufSize; -+ p->prop = propNew; -+ return SZ_OK; -+} -+ -+SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, -+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode, -+ ELzmaStatus *status, ISzAlloc *alloc) -+{ -+ CLzmaDec p; -+ SRes res; -+ SizeT inSize = *srcLen; -+ SizeT outSize = *destLen; -+ *srcLen = *destLen = 0; -+ if (inSize < RC_INIT_SIZE) -+ return SZ_ERROR_INPUT_EOF; -+ -+ LzmaDec_Construct(&p); -+ res = LzmaDec_AllocateProbs(&p, propData, propSize, alloc); -+ if (res != 0) -+ return res; -+ p.dic = dest; -+ p.dicBufSize = outSize; -+ -+ LzmaDec_Init(&p); -+ -+ *srcLen = inSize; -+ res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status); -+ -+ if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT) -+ res = SZ_ERROR_INPUT_EOF; -+ -+ (*destLen) = p.dicPos; -+ LzmaDec_FreeProbs(&p, alloc); -+ return res; -+} ---- /dev/null -+++ b/lib/lzma/LzmaEnc.c -@@ -0,0 +1,2271 @@ -+/* LzmaEnc.c -- LZMA Encoder -+2009-11-24 : Igor Pavlov : Public domain */ -+ -+#include -+ -+/* #define SHOW_STAT */ -+/* #define SHOW_STAT2 */ -+ -+#if defined(SHOW_STAT) || defined(SHOW_STAT2) -+#include -+#endif -+ -+#include "LzmaEnc.h" -+ -+/* disable MT */ -+#define _7ZIP_ST -+ -+#include "LzFind.h" -+#ifndef _7ZIP_ST -+#include "LzFindMt.h" -+#endif -+ -+#ifdef SHOW_STAT -+static int ttt = 0; -+#endif -+ -+#define kBlockSizeMax ((1 << LZMA_NUM_BLOCK_SIZE_BITS) - 1) -+ -+#define kBlockSize (9 << 10) -+#define kUnpackBlockSize (1 << 18) -+#define kMatchArraySize (1 << 21) -+#define kMatchRecordMaxSize ((LZMA_MATCH_LEN_MAX * 2 + 3) * LZMA_MATCH_LEN_MAX) -+ -+#define kNumMaxDirectBits (31) -+ -+#define kNumTopBits 24 -+#define kTopValue ((UInt32)1 << kNumTopBits) -+ -+#define kNumBitModelTotalBits 11 -+#define kBitModelTotal (1 << kNumBitModelTotalBits) -+#define kNumMoveBits 5 -+#define kProbInitValue (kBitModelTotal >> 1) -+ -+#define kNumMoveReducingBits 4 -+#define kNumBitPriceShiftBits 4 -+#define kBitPrice (1 << kNumBitPriceShiftBits) -+ -+void LzmaEncProps_Init(CLzmaEncProps *p) -+{ -+ p->level = 5; -+ p->dictSize = p->mc = 0; -+ p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1; -+ p->writeEndMark = 0; -+} -+ -+void LzmaEncProps_Normalize(CLzmaEncProps *p) -+{ -+ int level = p->level; -+ if (level < 0) level = 5; -+ p->level = level; -+ if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26))); -+ if (p->lc < 0) p->lc = 3; -+ if (p->lp < 0) p->lp = 0; -+ if (p->pb < 0) p->pb = 2; -+ if (p->algo < 0) p->algo = (level < 5 ? 0 : 1); -+ if (p->fb < 0) p->fb = (level < 7 ? 32 : 64); -+ if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1); -+ if (p->numHashBytes < 0) p->numHashBytes = 4; -+ if (p->mc == 0) p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1); -+ if (p->numThreads < 0) -+ p->numThreads = -+ #ifndef _7ZIP_ST -+ ((p->btMode && p->algo) ? 2 : 1); -+ #else -+ 1; -+ #endif -+} -+ -+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2) -+{ -+ CLzmaEncProps props = *props2; -+ LzmaEncProps_Normalize(&props); -+ return props.dictSize; -+} -+ -+/* #define LZMA_LOG_BSR */ -+/* Define it for Intel's CPU */ -+ -+ -+#ifdef LZMA_LOG_BSR -+ -+#define kDicLogSizeMaxCompress 30 -+ -+#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); } -+ -+UInt32 GetPosSlot1(UInt32 pos) -+{ -+ UInt32 res; -+ BSR2_RET(pos, res); -+ return res; -+} -+#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } -+#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); } -+ -+#else -+ -+#define kNumLogBits (9 + (int)sizeof(size_t) / 2) -+#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7) -+ -+void LzmaEnc_FastPosInit(Byte *g_FastPos) -+{ -+ int c = 2, slotFast; -+ g_FastPos[0] = 0; -+ g_FastPos[1] = 1; -+ -+ for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++) -+ { -+ UInt32 k = (1 << ((slotFast >> 1) - 1)); -+ UInt32 j; -+ for (j = 0; j < k; j++, c++) -+ g_FastPos[c] = (Byte)slotFast; -+ } -+} -+ -+#define BSR2_RET(pos, res) { UInt32 i = 6 + ((kNumLogBits - 1) & \ -+ (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \ -+ res = p->g_FastPos[pos >> i] + (i * 2); } -+/* -+#define BSR2_RET(pos, res) { res = (pos < (1 << (kNumLogBits + 6))) ? \ -+ p->g_FastPos[pos >> 6] + 12 : \ -+ p->g_FastPos[pos >> (6 + kNumLogBits - 1)] + (6 + (kNumLogBits - 1)) * 2; } -+*/ -+ -+#define GetPosSlot1(pos) p->g_FastPos[pos] -+#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } -+#define GetPosSlot(pos, res) { if (pos < kNumFullDistances) res = p->g_FastPos[pos]; else BSR2_RET(pos, res); } -+ -+#endif -+ -+ -+#define LZMA_NUM_REPS 4 -+ -+typedef unsigned CState; -+ -+typedef struct -+{ -+ UInt32 price; -+ -+ CState state; -+ int prev1IsChar; -+ int prev2; -+ -+ UInt32 posPrev2; -+ UInt32 backPrev2; -+ -+ UInt32 posPrev; -+ UInt32 backPrev; -+ UInt32 backs[LZMA_NUM_REPS]; -+} COptimal; -+ -+#define kNumOpts (1 << 12) -+ -+#define kNumLenToPosStates 4 -+#define kNumPosSlotBits 6 -+#define kDicLogSizeMin 0 -+#define kDicLogSizeMax 32 -+#define kDistTableSizeMax (kDicLogSizeMax * 2) -+ -+ -+#define kNumAlignBits 4 -+#define kAlignTableSize (1 << kNumAlignBits) -+#define kAlignMask (kAlignTableSize - 1) -+ -+#define kStartPosModelIndex 4 -+#define kEndPosModelIndex 14 -+#define kNumPosModels (kEndPosModelIndex - kStartPosModelIndex) -+ -+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1)) -+ -+#ifdef _LZMA_PROB32 -+#define CLzmaProb UInt32 -+#else -+#define CLzmaProb UInt16 -+#endif -+ -+#define LZMA_PB_MAX 4 -+#define LZMA_LC_MAX 8 -+#define LZMA_LP_MAX 4 -+ -+#define LZMA_NUM_PB_STATES_MAX (1 << LZMA_PB_MAX) -+ -+ -+#define kLenNumLowBits 3 -+#define kLenNumLowSymbols (1 << kLenNumLowBits) -+#define kLenNumMidBits 3 -+#define kLenNumMidSymbols (1 << kLenNumMidBits) -+#define kLenNumHighBits 8 -+#define kLenNumHighSymbols (1 << kLenNumHighBits) -+ -+#define kLenNumSymbolsTotal (kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols) -+ -+#define LZMA_MATCH_LEN_MIN 2 -+#define LZMA_MATCH_LEN_MAX (LZMA_MATCH_LEN_MIN + kLenNumSymbolsTotal - 1) -+ -+#define kNumStates 12 -+ -+typedef struct -+{ -+ CLzmaProb choice; -+ CLzmaProb choice2; -+ CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits]; -+ CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits]; -+ CLzmaProb high[kLenNumHighSymbols]; -+} CLenEnc; -+ -+typedef struct -+{ -+ CLenEnc p; -+ UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal]; -+ UInt32 tableSize; -+ UInt32 counters[LZMA_NUM_PB_STATES_MAX]; -+} CLenPriceEnc; -+ -+typedef struct -+{ -+ UInt32 range; -+ Byte cache; -+ UInt64 low; -+ UInt64 cacheSize; -+ Byte *buf; -+ Byte *bufLim; -+ Byte *bufBase; -+ ISeqOutStream *outStream; -+ UInt64 processed; -+ SRes res; -+} CRangeEnc; -+ -+typedef struct -+{ -+ CLzmaProb *litProbs; -+ -+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ CLzmaProb isRep[kNumStates]; -+ CLzmaProb isRepG0[kNumStates]; -+ CLzmaProb isRepG1[kNumStates]; -+ CLzmaProb isRepG2[kNumStates]; -+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ -+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; -+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; -+ CLzmaProb posAlignEncoder[1 << kNumAlignBits]; -+ -+ CLenPriceEnc lenEnc; -+ CLenPriceEnc repLenEnc; -+ -+ UInt32 reps[LZMA_NUM_REPS]; -+ UInt32 state; -+} CSaveState; -+ -+typedef struct -+{ -+ IMatchFinder matchFinder; -+ void *matchFinderObj; -+ -+ #ifndef _7ZIP_ST -+ Bool mtMode; -+ CMatchFinderMt matchFinderMt; -+ #endif -+ -+ CMatchFinder matchFinderBase; -+ -+ #ifndef _7ZIP_ST -+ Byte pad[128]; -+ #endif -+ -+ UInt32 optimumEndIndex; -+ UInt32 optimumCurrentIndex; -+ -+ UInt32 longestMatchLength; -+ UInt32 numPairs; -+ UInt32 numAvail; -+ COptimal opt[kNumOpts]; -+ -+ #ifndef LZMA_LOG_BSR -+ Byte g_FastPos[1 << kNumLogBits]; -+ #endif -+ -+ UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits]; -+ UInt32 matches[LZMA_MATCH_LEN_MAX * 2 + 2 + 1]; -+ UInt32 numFastBytes; -+ UInt32 additionalOffset; -+ UInt32 reps[LZMA_NUM_REPS]; -+ UInt32 state; -+ -+ UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax]; -+ UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances]; -+ UInt32 alignPrices[kAlignTableSize]; -+ UInt32 alignPriceCount; -+ -+ UInt32 distTableSize; -+ -+ unsigned lc, lp, pb; -+ unsigned lpMask, pbMask; -+ -+ CLzmaProb *litProbs; -+ -+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ CLzmaProb isRep[kNumStates]; -+ CLzmaProb isRepG0[kNumStates]; -+ CLzmaProb isRepG1[kNumStates]; -+ CLzmaProb isRepG2[kNumStates]; -+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX]; -+ -+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; -+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; -+ CLzmaProb posAlignEncoder[1 << kNumAlignBits]; -+ -+ CLenPriceEnc lenEnc; -+ CLenPriceEnc repLenEnc; -+ -+ unsigned lclp; -+ -+ Bool fastMode; -+ -+ CRangeEnc rc; -+ -+ Bool writeEndMark; -+ UInt64 nowPos64; -+ UInt32 matchPriceCount; -+ Bool finished; -+ Bool multiThread; -+ -+ SRes result; -+ UInt32 dictSize; -+ UInt32 matchFinderCycles; -+ -+ int needInit; -+ -+ CSaveState saveState; -+} CLzmaEnc; -+ -+void LzmaEnc_SaveState(CLzmaEncHandle pp) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ CSaveState *dest = &p->saveState; -+ int i; -+ dest->lenEnc = p->lenEnc; -+ dest->repLenEnc = p->repLenEnc; -+ dest->state = p->state; -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -+ } -+ for (i = 0; i < kNumLenToPosStates; i++) -+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -+ memcpy(dest->reps, p->reps, sizeof(p->reps)); -+ memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb)); -+} -+ -+void LzmaEnc_RestoreState(CLzmaEncHandle pp) -+{ -+ CLzmaEnc *dest = (CLzmaEnc *)pp; -+ const CSaveState *p = &dest->saveState; -+ int i; -+ dest->lenEnc = p->lenEnc; -+ dest->repLenEnc = p->repLenEnc; -+ dest->state = p->state; -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i])); -+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i])); -+ } -+ for (i = 0; i < kNumLenToPosStates; i++) -+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i])); -+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep)); -+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0)); -+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1)); -+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2)); -+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders)); -+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder)); -+ memcpy(dest->reps, p->reps, sizeof(p->reps)); -+ memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb)); -+} -+ -+SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ CLzmaEncProps props = *props2; -+ LzmaEncProps_Normalize(&props); -+ -+ if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX || -+ props.dictSize > (1 << kDicLogSizeMaxCompress) || props.dictSize > (1 << 30)) -+ return SZ_ERROR_PARAM; -+ p->dictSize = props.dictSize; -+ p->matchFinderCycles = props.mc; -+ { -+ unsigned fb = props.fb; -+ if (fb < 5) -+ fb = 5; -+ if (fb > LZMA_MATCH_LEN_MAX) -+ fb = LZMA_MATCH_LEN_MAX; -+ p->numFastBytes = fb; -+ } -+ p->lc = props.lc; -+ p->lp = props.lp; -+ p->pb = props.pb; -+ p->fastMode = (props.algo == 0); -+ p->matchFinderBase.btMode = props.btMode; -+ { -+ UInt32 numHashBytes = 4; -+ if (props.btMode) -+ { -+ if (props.numHashBytes < 2) -+ numHashBytes = 2; -+ else if (props.numHashBytes < 4) -+ numHashBytes = props.numHashBytes; -+ } -+ p->matchFinderBase.numHashBytes = numHashBytes; -+ } -+ -+ p->matchFinderBase.cutValue = props.mc; -+ -+ p->writeEndMark = props.writeEndMark; -+ -+ #ifndef _7ZIP_ST -+ /* -+ if (newMultiThread != _multiThread) -+ { -+ ReleaseMatchFinder(); -+ _multiThread = newMultiThread; -+ } -+ */ -+ p->multiThread = (props.numThreads > 1); -+ #endif -+ -+ return SZ_OK; -+} -+ -+static const int kLiteralNextStates[kNumStates] = {0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 4, 5}; -+static const int kMatchNextStates[kNumStates] = {7, 7, 7, 7, 7, 7, 7, 10, 10, 10, 10, 10}; -+static const int kRepNextStates[kNumStates] = {8, 8, 8, 8, 8, 8, 8, 11, 11, 11, 11, 11}; -+static const int kShortRepNextStates[kNumStates]= {9, 9, 9, 9, 9, 9, 9, 11, 11, 11, 11, 11}; -+ -+#define IsCharState(s) ((s) < 7) -+ -+#define GetLenToPosState(len) (((len) < kNumLenToPosStates + 1) ? (len) - 2 : kNumLenToPosStates - 1) -+ -+#define kInfinityPrice (1 << 30) -+ -+static void RangeEnc_Construct(CRangeEnc *p) -+{ -+ p->outStream = 0; -+ p->bufBase = 0; -+} -+ -+#define RangeEnc_GetProcessed(p) ((p)->processed + ((p)->buf - (p)->bufBase) + (p)->cacheSize) -+ -+#define RC_BUF_SIZE (1 << 16) -+static int RangeEnc_Alloc(CRangeEnc *p, ISzAlloc *alloc) -+{ -+ if (p->bufBase == 0) -+ { -+ p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE); -+ if (p->bufBase == 0) -+ return 0; -+ p->bufLim = p->bufBase + RC_BUF_SIZE; -+ } -+ return 1; -+} -+ -+static void RangeEnc_Free(CRangeEnc *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->bufBase); -+ p->bufBase = 0; -+} -+ -+static void RangeEnc_Init(CRangeEnc *p) -+{ -+ /* Stream.Init(); */ -+ p->low = 0; -+ p->range = 0xFFFFFFFF; -+ p->cacheSize = 1; -+ p->cache = 0; -+ -+ p->buf = p->bufBase; -+ -+ p->processed = 0; -+ p->res = SZ_OK; -+} -+ -+static void RangeEnc_FlushStream(CRangeEnc *p) -+{ -+ size_t num; -+ if (p->res != SZ_OK) -+ return; -+ num = p->buf - p->bufBase; -+ if (num != p->outStream->Write(p->outStream, p->bufBase, num)) -+ p->res = SZ_ERROR_WRITE; -+ p->processed += num; -+ p->buf = p->bufBase; -+} -+ -+static void MY_FAST_CALL RangeEnc_ShiftLow(CRangeEnc *p) -+{ -+ if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0) -+ { -+ Byte temp = p->cache; -+ do -+ { -+ Byte *buf = p->buf; -+ *buf++ = (Byte)(temp + (Byte)(p->low >> 32)); -+ p->buf = buf; -+ if (buf == p->bufLim) -+ RangeEnc_FlushStream(p); -+ temp = 0xFF; -+ } -+ while (--p->cacheSize != 0); -+ p->cache = (Byte)((UInt32)p->low >> 24); -+ } -+ p->cacheSize++; -+ p->low = (UInt32)p->low << 8; -+} -+ -+static void RangeEnc_FlushData(CRangeEnc *p) -+{ -+ int i; -+ for (i = 0; i < 5; i++) -+ RangeEnc_ShiftLow(p); -+} -+ -+static void RangeEnc_EncodeDirectBits(CRangeEnc *p, UInt32 value, int numBits) -+{ -+ do -+ { -+ p->range >>= 1; -+ p->low += p->range & (0 - ((value >> --numBits) & 1)); -+ if (p->range < kTopValue) -+ { -+ p->range <<= 8; -+ RangeEnc_ShiftLow(p); -+ } -+ } -+ while (numBits != 0); -+} -+ -+static void RangeEnc_EncodeBit(CRangeEnc *p, CLzmaProb *prob, UInt32 symbol) -+{ -+ UInt32 ttt = *prob; -+ UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt; -+ if (symbol == 0) -+ { -+ p->range = newBound; -+ ttt += (kBitModelTotal - ttt) >> kNumMoveBits; -+ } -+ else -+ { -+ p->low += newBound; -+ p->range -= newBound; -+ ttt -= ttt >> kNumMoveBits; -+ } -+ *prob = (CLzmaProb)ttt; -+ if (p->range < kTopValue) -+ { -+ p->range <<= 8; -+ RangeEnc_ShiftLow(p); -+ } -+} -+ -+static void LitEnc_Encode(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol) -+{ -+ symbol |= 0x100; -+ do -+ { -+ RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1); -+ symbol <<= 1; -+ } -+ while (symbol < 0x10000); -+} -+ -+static void LitEnc_EncodeMatched(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol, UInt32 matchByte) -+{ -+ UInt32 offs = 0x100; -+ symbol |= 0x100; -+ do -+ { -+ matchByte <<= 1; -+ RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1); -+ symbol <<= 1; -+ offs &= ~(matchByte ^ symbol); -+ } -+ while (symbol < 0x10000); -+} -+ -+void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) -+{ -+ UInt32 i; -+ for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits)) -+ { -+ const int kCyclesBits = kNumBitPriceShiftBits; -+ UInt32 w = i; -+ UInt32 bitCount = 0; -+ int j; -+ for (j = 0; j < kCyclesBits; j++) -+ { -+ w = w * w; -+ bitCount <<= 1; -+ while (w >= ((UInt32)1 << 16)) -+ { -+ w >>= 1; -+ bitCount++; -+ } -+ } -+ ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount); -+ } -+} -+ -+ -+#define GET_PRICE(prob, symbol) \ -+ p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits]; -+ -+#define GET_PRICEa(prob, symbol) \ -+ ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits]; -+ -+#define GET_PRICE_0(prob) p->ProbPrices[(prob) >> kNumMoveReducingBits] -+#define GET_PRICE_1(prob) p->ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits] -+ -+#define GET_PRICE_0a(prob) ProbPrices[(prob) >> kNumMoveReducingBits] -+#define GET_PRICE_1a(prob) ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits] -+ -+static UInt32 LitEnc_GetPrice(const CLzmaProb *probs, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ symbol |= 0x100; -+ do -+ { -+ price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1); -+ symbol <<= 1; -+ } -+ while (symbol < 0x10000); -+ return price; -+} -+ -+static UInt32 LitEnc_GetPriceMatched(const CLzmaProb *probs, UInt32 symbol, UInt32 matchByte, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ UInt32 offs = 0x100; -+ symbol |= 0x100; -+ do -+ { -+ matchByte <<= 1; -+ price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1); -+ symbol <<= 1; -+ offs &= ~(matchByte ^ symbol); -+ } -+ while (symbol < 0x10000); -+ return price; -+} -+ -+ -+static void RcTree_Encode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol) -+{ -+ UInt32 m = 1; -+ int i; -+ for (i = numBitLevels; i != 0;) -+ { -+ UInt32 bit; -+ i--; -+ bit = (symbol >> i) & 1; -+ RangeEnc_EncodeBit(rc, probs + m, bit); -+ m = (m << 1) | bit; -+ } -+} -+ -+static void RcTree_ReverseEncode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol) -+{ -+ UInt32 m = 1; -+ int i; -+ for (i = 0; i < numBitLevels; i++) -+ { -+ UInt32 bit = symbol & 1; -+ RangeEnc_EncodeBit(rc, probs + m, bit); -+ m = (m << 1) | bit; -+ symbol >>= 1; -+ } -+} -+ -+static UInt32 RcTree_GetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ symbol |= (1 << numBitLevels); -+ while (symbol != 1) -+ { -+ price += GET_PRICEa(probs[symbol >> 1], symbol & 1); -+ symbol >>= 1; -+ } -+ return price; -+} -+ -+static UInt32 RcTree_ReverseGetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices) -+{ -+ UInt32 price = 0; -+ UInt32 m = 1; -+ int i; -+ for (i = numBitLevels; i != 0; i--) -+ { -+ UInt32 bit = symbol & 1; -+ symbol >>= 1; -+ price += GET_PRICEa(probs[m], bit); -+ m = (m << 1) | bit; -+ } -+ return price; -+} -+ -+ -+static void LenEnc_Init(CLenEnc *p) -+{ -+ unsigned i; -+ p->choice = p->choice2 = kProbInitValue; -+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++) -+ p->low[i] = kProbInitValue; -+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++) -+ p->mid[i] = kProbInitValue; -+ for (i = 0; i < kLenNumHighSymbols; i++) -+ p->high[i] = kProbInitValue; -+} -+ -+static void LenEnc_Encode(CLenEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState) -+{ -+ if (symbol < kLenNumLowSymbols) -+ { -+ RangeEnc_EncodeBit(rc, &p->choice, 0); -+ RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol); -+ } -+ else -+ { -+ RangeEnc_EncodeBit(rc, &p->choice, 1); -+ if (symbol < kLenNumLowSymbols + kLenNumMidSymbols) -+ { -+ RangeEnc_EncodeBit(rc, &p->choice2, 0); -+ RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols); -+ } -+ else -+ { -+ RangeEnc_EncodeBit(rc, &p->choice2, 1); -+ RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols); -+ } -+ } -+} -+ -+static void LenEnc_SetPrices(CLenEnc *p, UInt32 posState, UInt32 numSymbols, UInt32 *prices, UInt32 *ProbPrices) -+{ -+ UInt32 a0 = GET_PRICE_0a(p->choice); -+ UInt32 a1 = GET_PRICE_1a(p->choice); -+ UInt32 b0 = a1 + GET_PRICE_0a(p->choice2); -+ UInt32 b1 = a1 + GET_PRICE_1a(p->choice2); -+ UInt32 i = 0; -+ for (i = 0; i < kLenNumLowSymbols; i++) -+ { -+ if (i >= numSymbols) -+ return; -+ prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices); -+ } -+ for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++) -+ { -+ if (i >= numSymbols) -+ return; -+ prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices); -+ } -+ for (; i < numSymbols; i++) -+ prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices); -+} -+ -+static void MY_FAST_CALL LenPriceEnc_UpdateTable(CLenPriceEnc *p, UInt32 posState, UInt32 *ProbPrices) -+{ -+ LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices); -+ p->counters[posState] = p->tableSize; -+} -+ -+static void LenPriceEnc_UpdateTables(CLenPriceEnc *p, UInt32 numPosStates, UInt32 *ProbPrices) -+{ -+ UInt32 posState; -+ for (posState = 0; posState < numPosStates; posState++) -+ LenPriceEnc_UpdateTable(p, posState, ProbPrices); -+} -+ -+static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState, Bool updatePrice, UInt32 *ProbPrices) -+{ -+ LenEnc_Encode(&p->p, rc, symbol, posState); -+ if (updatePrice) -+ if (--p->counters[posState] == 0) -+ LenPriceEnc_UpdateTable(p, posState, ProbPrices); -+} -+ -+ -+ -+ -+static void MovePos(CLzmaEnc *p, UInt32 num) -+{ -+ #ifdef SHOW_STAT -+ ttt += num; -+ printf("\n MovePos %d", num); -+ #endif -+ if (num != 0) -+ { -+ p->additionalOffset += num; -+ p->matchFinder.Skip(p->matchFinderObj, num); -+ } -+} -+ -+static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes) -+{ -+ UInt32 lenRes = 0, numPairs; -+ p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+ numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches); -+ #ifdef SHOW_STAT -+ printf("\n i = %d numPairs = %d ", ttt, numPairs / 2); -+ ttt++; -+ { -+ UInt32 i; -+ for (i = 0; i < numPairs; i += 2) -+ printf("%2d %6d | ", p->matches[i], p->matches[i + 1]); -+ } -+ #endif -+ if (numPairs > 0) -+ { -+ lenRes = p->matches[numPairs - 2]; -+ if (lenRes == p->numFastBytes) -+ { -+ const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ UInt32 distance = p->matches[numPairs - 1] + 1; -+ UInt32 numAvail = p->numAvail; -+ if (numAvail > LZMA_MATCH_LEN_MAX) -+ numAvail = LZMA_MATCH_LEN_MAX; -+ { -+ const Byte *pby2 = pby - distance; -+ for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++); -+ } -+ } -+ } -+ p->additionalOffset++; -+ *numDistancePairsRes = numPairs; -+ return lenRes; -+} -+ -+ -+#define MakeAsChar(p) (p)->backPrev = (UInt32)(-1); (p)->prev1IsChar = False; -+#define MakeAsShortRep(p) (p)->backPrev = 0; (p)->prev1IsChar = False; -+#define IsShortRep(p) ((p)->backPrev == 0) -+ -+static UInt32 GetRepLen1Price(CLzmaEnc *p, UInt32 state, UInt32 posState) -+{ -+ return -+ GET_PRICE_0(p->isRepG0[state]) + -+ GET_PRICE_0(p->isRep0Long[state][posState]); -+} -+ -+static UInt32 GetPureRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 state, UInt32 posState) -+{ -+ UInt32 price; -+ if (repIndex == 0) -+ { -+ price = GET_PRICE_0(p->isRepG0[state]); -+ price += GET_PRICE_1(p->isRep0Long[state][posState]); -+ } -+ else -+ { -+ price = GET_PRICE_1(p->isRepG0[state]); -+ if (repIndex == 1) -+ price += GET_PRICE_0(p->isRepG1[state]); -+ else -+ { -+ price += GET_PRICE_1(p->isRepG1[state]); -+ price += GET_PRICE(p->isRepG2[state], repIndex - 2); -+ } -+ } -+ return price; -+} -+ -+static UInt32 GetRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 len, UInt32 state, UInt32 posState) -+{ -+ return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] + -+ GetPureRepPrice(p, repIndex, state, posState); -+} -+ -+static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur) -+{ -+ UInt32 posMem = p->opt[cur].posPrev; -+ UInt32 backMem = p->opt[cur].backPrev; -+ p->optimumEndIndex = cur; -+ do -+ { -+ if (p->opt[cur].prev1IsChar) -+ { -+ MakeAsChar(&p->opt[posMem]) -+ p->opt[posMem].posPrev = posMem - 1; -+ if (p->opt[cur].prev2) -+ { -+ p->opt[posMem - 1].prev1IsChar = False; -+ p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2; -+ p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2; -+ } -+ } -+ { -+ UInt32 posPrev = posMem; -+ UInt32 backCur = backMem; -+ -+ backMem = p->opt[posPrev].backPrev; -+ posMem = p->opt[posPrev].posPrev; -+ -+ p->opt[posPrev].backPrev = backCur; -+ p->opt[posPrev].posPrev = cur; -+ cur = posPrev; -+ } -+ } -+ while (cur != 0); -+ *backRes = p->opt[0].backPrev; -+ p->optimumCurrentIndex = p->opt[0].posPrev; -+ return p->optimumCurrentIndex; -+} -+ -+#define LIT_PROBS(pos, prevByte) (p->litProbs + ((((pos) & p->lpMask) << p->lc) + ((prevByte) >> (8 - p->lc))) * 0x300) -+ -+static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) -+{ -+ UInt32 numAvail, mainLen, numPairs, repMaxIndex, i, posState, lenEnd, len, cur; -+ UInt32 matchPrice, repMatchPrice, normalMatchPrice; -+ UInt32 reps[LZMA_NUM_REPS], repLens[LZMA_NUM_REPS]; -+ UInt32 *matches; -+ const Byte *data; -+ Byte curByte, matchByte; -+ if (p->optimumEndIndex != p->optimumCurrentIndex) -+ { -+ const COptimal *opt = &p->opt[p->optimumCurrentIndex]; -+ UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex; -+ *backRes = opt->backPrev; -+ p->optimumCurrentIndex = opt->posPrev; -+ return lenRes; -+ } -+ p->optimumCurrentIndex = p->optimumEndIndex = 0; -+ -+ if (p->additionalOffset == 0) -+ mainLen = ReadMatchDistances(p, &numPairs); -+ else -+ { -+ mainLen = p->longestMatchLength; -+ numPairs = p->numPairs; -+ } -+ -+ numAvail = p->numAvail; -+ if (numAvail < 2) -+ { -+ *backRes = (UInt32)(-1); -+ return 1; -+ } -+ if (numAvail > LZMA_MATCH_LEN_MAX) -+ numAvail = LZMA_MATCH_LEN_MAX; -+ -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ repMaxIndex = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 lenTest; -+ const Byte *data2; -+ reps[i] = p->reps[i]; -+ data2 = data - (reps[i] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ { -+ repLens[i] = 0; -+ continue; -+ } -+ for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++); -+ repLens[i] = lenTest; -+ if (lenTest > repLens[repMaxIndex]) -+ repMaxIndex = i; -+ } -+ if (repLens[repMaxIndex] >= p->numFastBytes) -+ { -+ UInt32 lenRes; -+ *backRes = repMaxIndex; -+ lenRes = repLens[repMaxIndex]; -+ MovePos(p, lenRes - 1); -+ return lenRes; -+ } -+ -+ matches = p->matches; -+ if (mainLen >= p->numFastBytes) -+ { -+ *backRes = matches[numPairs - 1] + LZMA_NUM_REPS; -+ MovePos(p, mainLen - 1); -+ return mainLen; -+ } -+ curByte = *data; -+ matchByte = *(data - (reps[0] + 1)); -+ -+ if (mainLen < 2 && curByte != matchByte && repLens[repMaxIndex] < 2) -+ { -+ *backRes = (UInt32)-1; -+ return 1; -+ } -+ -+ p->opt[0].state = (CState)p->state; -+ -+ posState = (position & p->pbMask); -+ -+ { -+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1)); -+ p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) + -+ (!IsCharState(p->state) ? -+ LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) : -+ LitEnc_GetPrice(probs, curByte, p->ProbPrices)); -+ } -+ -+ MakeAsChar(&p->opt[1]); -+ -+ matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]); -+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]); -+ -+ if (matchByte == curByte) -+ { -+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState); -+ if (shortRepPrice < p->opt[1].price) -+ { -+ p->opt[1].price = shortRepPrice; -+ MakeAsShortRep(&p->opt[1]); -+ } -+ } -+ lenEnd = ((mainLen >= repLens[repMaxIndex]) ? mainLen : repLens[repMaxIndex]); -+ -+ if (lenEnd < 2) -+ { -+ *backRes = p->opt[1].backPrev; -+ return 1; -+ } -+ -+ p->opt[1].posPrev = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ p->opt[0].backs[i] = reps[i]; -+ -+ len = lenEnd; -+ do -+ p->opt[len--].price = kInfinityPrice; -+ while (len >= 2); -+ -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 repLen = repLens[i]; -+ UInt32 price; -+ if (repLen < 2) -+ continue; -+ price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState); -+ do -+ { -+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2]; -+ COptimal *opt = &p->opt[repLen]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = 0; -+ opt->backPrev = i; -+ opt->prev1IsChar = False; -+ } -+ } -+ while (--repLen >= 2); -+ } -+ -+ normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]); -+ -+ len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2); -+ if (len <= mainLen) -+ { -+ UInt32 offs = 0; -+ while (len > matches[offs]) -+ offs += 2; -+ for (; ; len++) -+ { -+ COptimal *opt; -+ UInt32 distance = matches[offs + 1]; -+ -+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN]; -+ UInt32 lenToPosState = GetLenToPosState(len); -+ if (distance < kNumFullDistances) -+ curAndLenPrice += p->distancesPrices[lenToPosState][distance]; -+ else -+ { -+ UInt32 slot; -+ GetPosSlot2(distance, slot); -+ curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot]; -+ } -+ opt = &p->opt[len]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = 0; -+ opt->backPrev = distance + LZMA_NUM_REPS; -+ opt->prev1IsChar = False; -+ } -+ if (len == matches[offs]) -+ { -+ offs += 2; -+ if (offs == numPairs) -+ break; -+ } -+ } -+ } -+ -+ cur = 0; -+ -+ #ifdef SHOW_STAT2 -+ if (position >= 0) -+ { -+ unsigned i; -+ printf("\n pos = %4X", position); -+ for (i = cur; i <= lenEnd; i++) -+ printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price); -+ } -+ #endif -+ -+ for (;;) -+ { -+ UInt32 numAvailFull, newLen, numPairs, posPrev, state, posState, startLen; -+ UInt32 curPrice, curAnd1Price, matchPrice, repMatchPrice; -+ Bool nextIsChar; -+ Byte curByte, matchByte; -+ const Byte *data; -+ COptimal *curOpt; -+ COptimal *nextOpt; -+ -+ cur++; -+ if (cur == lenEnd) -+ return Backward(p, backRes, cur); -+ -+ newLen = ReadMatchDistances(p, &numPairs); -+ if (newLen >= p->numFastBytes) -+ { -+ p->numPairs = numPairs; -+ p->longestMatchLength = newLen; -+ return Backward(p, backRes, cur); -+ } -+ position++; -+ curOpt = &p->opt[cur]; -+ posPrev = curOpt->posPrev; -+ if (curOpt->prev1IsChar) -+ { -+ posPrev--; -+ if (curOpt->prev2) -+ { -+ state = p->opt[curOpt->posPrev2].state; -+ if (curOpt->backPrev2 < LZMA_NUM_REPS) -+ state = kRepNextStates[state]; -+ else -+ state = kMatchNextStates[state]; -+ } -+ else -+ state = p->opt[posPrev].state; -+ state = kLiteralNextStates[state]; -+ } -+ else -+ state = p->opt[posPrev].state; -+ if (posPrev == cur - 1) -+ { -+ if (IsShortRep(curOpt)) -+ state = kShortRepNextStates[state]; -+ else -+ state = kLiteralNextStates[state]; -+ } -+ else -+ { -+ UInt32 pos; -+ const COptimal *prevOpt; -+ if (curOpt->prev1IsChar && curOpt->prev2) -+ { -+ posPrev = curOpt->posPrev2; -+ pos = curOpt->backPrev2; -+ state = kRepNextStates[state]; -+ } -+ else -+ { -+ pos = curOpt->backPrev; -+ if (pos < LZMA_NUM_REPS) -+ state = kRepNextStates[state]; -+ else -+ state = kMatchNextStates[state]; -+ } -+ prevOpt = &p->opt[posPrev]; -+ if (pos < LZMA_NUM_REPS) -+ { -+ UInt32 i; -+ reps[0] = prevOpt->backs[pos]; -+ for (i = 1; i <= pos; i++) -+ reps[i] = prevOpt->backs[i - 1]; -+ for (; i < LZMA_NUM_REPS; i++) -+ reps[i] = prevOpt->backs[i]; -+ } -+ else -+ { -+ UInt32 i; -+ reps[0] = (pos - LZMA_NUM_REPS); -+ for (i = 1; i < LZMA_NUM_REPS; i++) -+ reps[i] = prevOpt->backs[i - 1]; -+ } -+ } -+ curOpt->state = (CState)state; -+ -+ curOpt->backs[0] = reps[0]; -+ curOpt->backs[1] = reps[1]; -+ curOpt->backs[2] = reps[2]; -+ curOpt->backs[3] = reps[3]; -+ -+ curPrice = curOpt->price; -+ nextIsChar = False; -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ curByte = *data; -+ matchByte = *(data - (reps[0] + 1)); -+ -+ posState = (position & p->pbMask); -+ -+ curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]); -+ { -+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1)); -+ curAnd1Price += -+ (!IsCharState(state) ? -+ LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) : -+ LitEnc_GetPrice(probs, curByte, p->ProbPrices)); -+ } -+ -+ nextOpt = &p->opt[cur + 1]; -+ -+ if (curAnd1Price < nextOpt->price) -+ { -+ nextOpt->price = curAnd1Price; -+ nextOpt->posPrev = cur; -+ MakeAsChar(nextOpt); -+ nextIsChar = True; -+ } -+ -+ matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]); -+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]); -+ -+ if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0)) -+ { -+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState); -+ if (shortRepPrice <= nextOpt->price) -+ { -+ nextOpt->price = shortRepPrice; -+ nextOpt->posPrev = cur; -+ MakeAsShortRep(nextOpt); -+ nextIsChar = True; -+ } -+ } -+ numAvailFull = p->numAvail; -+ { -+ UInt32 temp = kNumOpts - 1 - cur; -+ if (temp < numAvailFull) -+ numAvailFull = temp; -+ } -+ -+ if (numAvailFull < 2) -+ continue; -+ numAvail = (numAvailFull <= p->numFastBytes ? numAvailFull : p->numFastBytes); -+ -+ if (!nextIsChar && matchByte != curByte) /* speed optimization */ -+ { -+ /* try Literal + rep0 */ -+ UInt32 temp; -+ UInt32 lenTest2; -+ const Byte *data2 = data - (reps[0] + 1); -+ UInt32 limit = p->numFastBytes + 1; -+ if (limit > numAvailFull) -+ limit = numAvailFull; -+ -+ for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++); -+ lenTest2 = temp - 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kLiteralNextStates[state]; -+ UInt32 posStateNext = (position + 1) & p->pbMask; -+ UInt32 nextRepMatchPrice = curAnd1Price + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ UInt32 offset = cur + 1 + lenTest2; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = False; -+ } -+ } -+ } -+ } -+ -+ startLen = 2; /* speed optimization */ -+ { -+ UInt32 repIndex; -+ for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++) -+ { -+ UInt32 lenTest; -+ UInt32 lenTestTemp; -+ UInt32 price; -+ const Byte *data2 = data - (reps[repIndex] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ continue; -+ for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++); -+ while (lenEnd < cur + lenTest) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ lenTestTemp = lenTest; -+ price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState); -+ do -+ { -+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2]; -+ COptimal *opt = &p->opt[cur + lenTest]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur; -+ opt->backPrev = repIndex; -+ opt->prev1IsChar = False; -+ } -+ } -+ while (--lenTest >= 2); -+ lenTest = lenTestTemp; -+ -+ if (repIndex == 0) -+ startLen = lenTest + 1; -+ -+ /* if (_maxMode) */ -+ { -+ UInt32 lenTest2 = lenTest + 1; -+ UInt32 limit = lenTest2 + p->numFastBytes; -+ UInt32 nextRepMatchPrice; -+ if (limit > numAvailFull) -+ limit = numAvailFull; -+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++); -+ lenTest2 -= lenTest + 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kRepNextStates[state]; -+ UInt32 posStateNext = (position + lenTest) & p->pbMask; -+ UInt32 curAndLenCharPrice = -+ price + p->repLenEnc.prices[posState][lenTest - 2] + -+ GET_PRICE_0(p->isMatch[state2][posStateNext]) + -+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]), -+ data[lenTest], data2[lenTest], p->ProbPrices); -+ state2 = kLiteralNextStates[state2]; -+ posStateNext = (position + lenTest + 1) & p->pbMask; -+ nextRepMatchPrice = curAndLenCharPrice + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ UInt32 offset = cur + lenTest + 1 + lenTest2; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + lenTest + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = True; -+ opt->posPrev2 = cur; -+ opt->backPrev2 = repIndex; -+ } -+ } -+ } -+ } -+ } -+ } -+ /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */ -+ if (newLen > numAvail) -+ { -+ newLen = numAvail; -+ for (numPairs = 0; newLen > matches[numPairs]; numPairs += 2); -+ matches[numPairs] = newLen; -+ numPairs += 2; -+ } -+ if (newLen >= startLen) -+ { -+ UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]); -+ UInt32 offs, curBack, posSlot; -+ UInt32 lenTest; -+ while (lenEnd < cur + newLen) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ -+ offs = 0; -+ while (startLen > matches[offs]) -+ offs += 2; -+ curBack = matches[offs + 1]; -+ GetPosSlot2(curBack, posSlot); -+ for (lenTest = /*2*/ startLen; ; lenTest++) -+ { -+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN]; -+ UInt32 lenToPosState = GetLenToPosState(lenTest); -+ COptimal *opt; -+ if (curBack < kNumFullDistances) -+ curAndLenPrice += p->distancesPrices[lenToPosState][curBack]; -+ else -+ curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask]; -+ -+ opt = &p->opt[cur + lenTest]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur; -+ opt->backPrev = curBack + LZMA_NUM_REPS; -+ opt->prev1IsChar = False; -+ } -+ -+ if (/*_maxMode && */lenTest == matches[offs]) -+ { -+ /* Try Match + Literal + Rep0 */ -+ const Byte *data2 = data - (curBack + 1); -+ UInt32 lenTest2 = lenTest + 1; -+ UInt32 limit = lenTest2 + p->numFastBytes; -+ UInt32 nextRepMatchPrice; -+ if (limit > numAvailFull) -+ limit = numAvailFull; -+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++); -+ lenTest2 -= lenTest + 1; -+ if (lenTest2 >= 2) -+ { -+ UInt32 state2 = kMatchNextStates[state]; -+ UInt32 posStateNext = (position + lenTest) & p->pbMask; -+ UInt32 curAndLenCharPrice = curAndLenPrice + -+ GET_PRICE_0(p->isMatch[state2][posStateNext]) + -+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]), -+ data[lenTest], data2[lenTest], p->ProbPrices); -+ state2 = kLiteralNextStates[state2]; -+ posStateNext = (posStateNext + 1) & p->pbMask; -+ nextRepMatchPrice = curAndLenCharPrice + -+ GET_PRICE_1(p->isMatch[state2][posStateNext]) + -+ GET_PRICE_1(p->isRep[state2]); -+ -+ /* for (; lenTest2 >= 2; lenTest2--) */ -+ { -+ UInt32 offset = cur + lenTest + 1 + lenTest2; -+ UInt32 curAndLenPrice; -+ COptimal *opt; -+ while (lenEnd < offset) -+ p->opt[++lenEnd].price = kInfinityPrice; -+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext); -+ opt = &p->opt[offset]; -+ if (curAndLenPrice < opt->price) -+ { -+ opt->price = curAndLenPrice; -+ opt->posPrev = cur + lenTest + 1; -+ opt->backPrev = 0; -+ opt->prev1IsChar = True; -+ opt->prev2 = True; -+ opt->posPrev2 = cur; -+ opt->backPrev2 = curBack + LZMA_NUM_REPS; -+ } -+ } -+ } -+ offs += 2; -+ if (offs == numPairs) -+ break; -+ curBack = matches[offs + 1]; -+ if (curBack >= kNumFullDistances) -+ GetPosSlot2(curBack, posSlot); -+ } -+ } -+ } -+ } -+} -+ -+#define ChangePair(smallDist, bigDist) (((bigDist) >> 7) > (smallDist)) -+ -+static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes) -+{ -+ UInt32 numAvail, mainLen, mainDist, numPairs, repIndex, repLen, i; -+ const Byte *data; -+ const UInt32 *matches; -+ -+ if (p->additionalOffset == 0) -+ mainLen = ReadMatchDistances(p, &numPairs); -+ else -+ { -+ mainLen = p->longestMatchLength; -+ numPairs = p->numPairs; -+ } -+ -+ numAvail = p->numAvail; -+ *backRes = (UInt32)-1; -+ if (numAvail < 2) -+ return 1; -+ if (numAvail > LZMA_MATCH_LEN_MAX) -+ numAvail = LZMA_MATCH_LEN_MAX; -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ -+ repLen = repIndex = 0; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 len; -+ const Byte *data2 = data - (p->reps[i] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ continue; -+ for (len = 2; len < numAvail && data[len] == data2[len]; len++); -+ if (len >= p->numFastBytes) -+ { -+ *backRes = i; -+ MovePos(p, len - 1); -+ return len; -+ } -+ if (len > repLen) -+ { -+ repIndex = i; -+ repLen = len; -+ } -+ } -+ -+ matches = p->matches; -+ if (mainLen >= p->numFastBytes) -+ { -+ *backRes = matches[numPairs - 1] + LZMA_NUM_REPS; -+ MovePos(p, mainLen - 1); -+ return mainLen; -+ } -+ -+ mainDist = 0; /* for GCC */ -+ if (mainLen >= 2) -+ { -+ mainDist = matches[numPairs - 1]; -+ while (numPairs > 2 && mainLen == matches[numPairs - 4] + 1) -+ { -+ if (!ChangePair(matches[numPairs - 3], mainDist)) -+ break; -+ numPairs -= 2; -+ mainLen = matches[numPairs - 2]; -+ mainDist = matches[numPairs - 1]; -+ } -+ if (mainLen == 2 && mainDist >= 0x80) -+ mainLen = 1; -+ } -+ -+ if (repLen >= 2 && ( -+ (repLen + 1 >= mainLen) || -+ (repLen + 2 >= mainLen && mainDist >= (1 << 9)) || -+ (repLen + 3 >= mainLen && mainDist >= (1 << 15)))) -+ { -+ *backRes = repIndex; -+ MovePos(p, repLen - 1); -+ return repLen; -+ } -+ -+ if (mainLen < 2 || numAvail <= 2) -+ return 1; -+ -+ p->longestMatchLength = ReadMatchDistances(p, &p->numPairs); -+ if (p->longestMatchLength >= 2) -+ { -+ UInt32 newDistance = matches[p->numPairs - 1]; -+ if ((p->longestMatchLength >= mainLen && newDistance < mainDist) || -+ (p->longestMatchLength == mainLen + 1 && !ChangePair(mainDist, newDistance)) || -+ (p->longestMatchLength > mainLen + 1) || -+ (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist))) -+ return 1; -+ } -+ -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; -+ for (i = 0; i < LZMA_NUM_REPS; i++) -+ { -+ UInt32 len, limit; -+ const Byte *data2 = data - (p->reps[i] + 1); -+ if (data[0] != data2[0] || data[1] != data2[1]) -+ continue; -+ limit = mainLen - 1; -+ for (len = 2; len < limit && data[len] == data2[len]; len++); -+ if (len >= limit) -+ return 1; -+ } -+ *backRes = mainDist + LZMA_NUM_REPS; -+ MovePos(p, mainLen - 2); -+ return mainLen; -+} -+ -+static void WriteEndMarker(CLzmaEnc *p, UInt32 posState) -+{ -+ UInt32 len; -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1); -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0); -+ p->state = kMatchNextStates[p->state]; -+ len = LZMA_MATCH_LEN_MIN; -+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1); -+ RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits); -+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask); -+} -+ -+static SRes CheckErrors(CLzmaEnc *p) -+{ -+ if (p->result != SZ_OK) -+ return p->result; -+ if (p->rc.res != SZ_OK) -+ p->result = SZ_ERROR_WRITE; -+ if (p->matchFinderBase.result != SZ_OK) -+ p->result = SZ_ERROR_READ; -+ if (p->result != SZ_OK) -+ p->finished = True; -+ return p->result; -+} -+ -+static SRes Flush(CLzmaEnc *p, UInt32 nowPos) -+{ -+ /* ReleaseMFStream(); */ -+ p->finished = True; -+ if (p->writeEndMark) -+ WriteEndMarker(p, nowPos & p->pbMask); -+ RangeEnc_FlushData(&p->rc); -+ RangeEnc_FlushStream(&p->rc); -+ return CheckErrors(p); -+} -+ -+static void FillAlignPrices(CLzmaEnc *p) -+{ -+ UInt32 i; -+ for (i = 0; i < kAlignTableSize; i++) -+ p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices); -+ p->alignPriceCount = 0; -+} -+ -+static void FillDistancesPrices(CLzmaEnc *p) -+{ -+ UInt32 tempPrices[kNumFullDistances]; -+ UInt32 i, lenToPosState; -+ for (i = kStartPosModelIndex; i < kNumFullDistances; i++) -+ { -+ UInt32 posSlot = GetPosSlot1(i); -+ UInt32 footerBits = ((posSlot >> 1) - 1); -+ UInt32 base = ((2 | (posSlot & 1)) << footerBits); -+ tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices); -+ } -+ -+ for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++) -+ { -+ UInt32 posSlot; -+ const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState]; -+ UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState]; -+ for (posSlot = 0; posSlot < p->distTableSize; posSlot++) -+ posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices); -+ for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++) -+ posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits); -+ -+ { -+ UInt32 *distancesPrices = p->distancesPrices[lenToPosState]; -+ UInt32 i; -+ for (i = 0; i < kStartPosModelIndex; i++) -+ distancesPrices[i] = posSlotPrices[i]; -+ for (; i < kNumFullDistances; i++) -+ distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i]; -+ } -+ } -+ p->matchPriceCount = 0; -+} -+ -+void LzmaEnc_Construct(CLzmaEnc *p) -+{ -+ RangeEnc_Construct(&p->rc); -+ MatchFinder_Construct(&p->matchFinderBase); -+ #ifndef _7ZIP_ST -+ MatchFinderMt_Construct(&p->matchFinderMt); -+ p->matchFinderMt.MatchFinder = &p->matchFinderBase; -+ #endif -+ -+ { -+ CLzmaEncProps props; -+ LzmaEncProps_Init(&props); -+ LzmaEnc_SetProps(p, &props); -+ } -+ -+ #ifndef LZMA_LOG_BSR -+ LzmaEnc_FastPosInit(p->g_FastPos); -+ #endif -+ -+ LzmaEnc_InitPriceTables(p->ProbPrices); -+ p->litProbs = 0; -+ p->saveState.litProbs = 0; -+} -+ -+CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc) -+{ -+ void *p; -+ p = alloc->Alloc(alloc, sizeof(CLzmaEnc)); -+ if (p != 0) -+ LzmaEnc_Construct((CLzmaEnc *)p); -+ return p; -+} -+ -+void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) -+{ -+ alloc->Free(alloc, p->litProbs); -+ alloc->Free(alloc, p->saveState.litProbs); -+ p->litProbs = 0; -+ p->saveState.litProbs = 0; -+} -+ -+void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ #ifndef _7ZIP_ST -+ MatchFinderMt_Destruct(&p->matchFinderMt, allocBig); -+ #endif -+ MatchFinder_Free(&p->matchFinderBase, allocBig); -+ LzmaEnc_FreeLits(p, alloc); -+ RangeEnc_Free(&p->rc, alloc); -+} -+ -+void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig); -+ alloc->Free(alloc, p); -+} -+ -+static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize, UInt32 maxUnpackSize) -+{ -+ UInt32 nowPos32, startPos32; -+ if (p->needInit) -+ { -+ p->matchFinder.Init(p->matchFinderObj); -+ p->needInit = 0; -+ } -+ -+ if (p->finished) -+ return p->result; -+ RINOK(CheckErrors(p)); -+ -+ nowPos32 = (UInt32)p->nowPos64; -+ startPos32 = nowPos32; -+ -+ if (p->nowPos64 == 0) -+ { -+ UInt32 numPairs; -+ Byte curByte; -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0) -+ return Flush(p, nowPos32); -+ ReadMatchDistances(p, &numPairs); -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0); -+ p->state = kLiteralNextStates[p->state]; -+ curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset); -+ LitEnc_Encode(&p->rc, p->litProbs, curByte); -+ p->additionalOffset--; -+ nowPos32++; -+ } -+ -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0) -+ for (;;) -+ { -+ UInt32 pos, len, posState; -+ -+ if (p->fastMode) -+ len = GetOptimumFast(p, &pos); -+ else -+ len = GetOptimum(p, nowPos32, &pos); -+ -+ #ifdef SHOW_STAT2 -+ printf("\n pos = %4X, len = %d pos = %d", nowPos32, len, pos); -+ #endif -+ -+ posState = nowPos32 & p->pbMask; -+ if (len == 1 && pos == (UInt32)-1) -+ { -+ Byte curByte; -+ CLzmaProb *probs; -+ const Byte *data; -+ -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0); -+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; -+ curByte = *data; -+ probs = LIT_PROBS(nowPos32, *(data - 1)); -+ if (IsCharState(p->state)) -+ LitEnc_Encode(&p->rc, probs, curByte); -+ else -+ LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1)); -+ p->state = kLiteralNextStates[p->state]; -+ } -+ else -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1); -+ if (pos < LZMA_NUM_REPS) -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1); -+ if (pos == 0) -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0); -+ RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1)); -+ } -+ else -+ { -+ UInt32 distance = p->reps[pos]; -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1); -+ if (pos == 1) -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0); -+ else -+ { -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1); -+ RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2); -+ if (pos == 3) -+ p->reps[3] = p->reps[2]; -+ p->reps[2] = p->reps[1]; -+ } -+ p->reps[1] = p->reps[0]; -+ p->reps[0] = distance; -+ } -+ if (len == 1) -+ p->state = kShortRepNextStates[p->state]; -+ else -+ { -+ LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ p->state = kRepNextStates[p->state]; -+ } -+ } -+ else -+ { -+ UInt32 posSlot; -+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0); -+ p->state = kMatchNextStates[p->state]; -+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices); -+ pos -= LZMA_NUM_REPS; -+ GetPosSlot(pos, posSlot); -+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot); -+ -+ if (posSlot >= kStartPosModelIndex) -+ { -+ UInt32 footerBits = ((posSlot >> 1) - 1); -+ UInt32 base = ((2 | (posSlot & 1)) << footerBits); -+ UInt32 posReduced = pos - base; -+ -+ if (posSlot < kEndPosModelIndex) -+ RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced); -+ else -+ { -+ RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits); -+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask); -+ p->alignPriceCount++; -+ } -+ } -+ p->reps[3] = p->reps[2]; -+ p->reps[2] = p->reps[1]; -+ p->reps[1] = p->reps[0]; -+ p->reps[0] = pos; -+ p->matchPriceCount++; -+ } -+ } -+ p->additionalOffset -= len; -+ nowPos32 += len; -+ if (p->additionalOffset == 0) -+ { -+ UInt32 processed; -+ if (!p->fastMode) -+ { -+ if (p->matchPriceCount >= (1 << 7)) -+ FillDistancesPrices(p); -+ if (p->alignPriceCount >= kAlignTableSize) -+ FillAlignPrices(p); -+ } -+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0) -+ break; -+ processed = nowPos32 - startPos32; -+ if (useLimits) -+ { -+ if (processed + kNumOpts + 300 >= maxUnpackSize || -+ RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize) -+ break; -+ } -+ else if (processed >= (1 << 15)) -+ { -+ p->nowPos64 += nowPos32 - startPos32; -+ return CheckErrors(p); -+ } -+ } -+ } -+ p->nowPos64 += nowPos32 - startPos32; -+ return Flush(p, nowPos32); -+} -+ -+#define kBigHashDicLimit ((UInt32)1 << 24) -+ -+static SRes LzmaEnc_Alloc(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ UInt32 beforeSize = kNumOpts; -+ Bool btMode; -+ if (!RangeEnc_Alloc(&p->rc, alloc)) -+ return SZ_ERROR_MEM; -+ btMode = (p->matchFinderBase.btMode != 0); -+ #ifndef _7ZIP_ST -+ p->mtMode = (p->multiThread && !p->fastMode && btMode); -+ #endif -+ -+ { -+ unsigned lclp = p->lc + p->lp; -+ if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp) -+ { -+ LzmaEnc_FreeLits(p, alloc); -+ p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb)); -+ p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb)); -+ if (p->litProbs == 0 || p->saveState.litProbs == 0) -+ { -+ LzmaEnc_FreeLits(p, alloc); -+ return SZ_ERROR_MEM; -+ } -+ p->lclp = lclp; -+ } -+ } -+ -+ p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit); -+ -+ if (beforeSize + p->dictSize < keepWindowSize) -+ beforeSize = keepWindowSize - p->dictSize; -+ -+ #ifndef _7ZIP_ST -+ if (p->mtMode) -+ { -+ RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig)); -+ p->matchFinderObj = &p->matchFinderMt; -+ MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder); -+ } -+ else -+ #endif -+ { -+ if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig)) -+ return SZ_ERROR_MEM; -+ p->matchFinderObj = &p->matchFinderBase; -+ MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder); -+ } -+ return SZ_OK; -+} -+ -+void LzmaEnc_Init(CLzmaEnc *p) -+{ -+ UInt32 i; -+ p->state = 0; -+ for (i = 0 ; i < LZMA_NUM_REPS; i++) -+ p->reps[i] = 0; -+ -+ RangeEnc_Init(&p->rc); -+ -+ -+ for (i = 0; i < kNumStates; i++) -+ { -+ UInt32 j; -+ for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++) -+ { -+ p->isMatch[i][j] = kProbInitValue; -+ p->isRep0Long[i][j] = kProbInitValue; -+ } -+ p->isRep[i] = kProbInitValue; -+ p->isRepG0[i] = kProbInitValue; -+ p->isRepG1[i] = kProbInitValue; -+ p->isRepG2[i] = kProbInitValue; -+ } -+ -+ { -+ UInt32 num = 0x300 << (p->lp + p->lc); -+ for (i = 0; i < num; i++) -+ p->litProbs[i] = kProbInitValue; -+ } -+ -+ { -+ for (i = 0; i < kNumLenToPosStates; i++) -+ { -+ CLzmaProb *probs = p->posSlotEncoder[i]; -+ UInt32 j; -+ for (j = 0; j < (1 << kNumPosSlotBits); j++) -+ probs[j] = kProbInitValue; -+ } -+ } -+ { -+ for (i = 0; i < kNumFullDistances - kEndPosModelIndex; i++) -+ p->posEncoders[i] = kProbInitValue; -+ } -+ -+ LenEnc_Init(&p->lenEnc.p); -+ LenEnc_Init(&p->repLenEnc.p); -+ -+ for (i = 0; i < (1 << kNumAlignBits); i++) -+ p->posAlignEncoder[i] = kProbInitValue; -+ -+ p->optimumEndIndex = 0; -+ p->optimumCurrentIndex = 0; -+ p->additionalOffset = 0; -+ -+ p->pbMask = (1 << p->pb) - 1; -+ p->lpMask = (1 << p->lp) - 1; -+} -+ -+void LzmaEnc_InitPrices(CLzmaEnc *p) -+{ -+ if (!p->fastMode) -+ { -+ FillDistancesPrices(p); -+ FillAlignPrices(p); -+ } -+ -+ p->lenEnc.tableSize = -+ p->repLenEnc.tableSize = -+ p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN; -+ LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices); -+ LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices); -+} -+ -+static SRes LzmaEnc_AllocAndInit(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ UInt32 i; -+ for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++) -+ if (p->dictSize <= ((UInt32)1 << i)) -+ break; -+ p->distTableSize = i * 2; -+ -+ p->finished = False; -+ p->result = SZ_OK; -+ RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig)); -+ LzmaEnc_Init(p); -+ LzmaEnc_InitPrices(p); -+ p->nowPos64 = 0; -+ return SZ_OK; -+} -+ -+static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ p->matchFinderBase.stream = inStream; -+ p->needInit = 1; -+ p->rc.outStream = outStream; -+ return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig); -+} -+ -+SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, -+ ISeqInStream *inStream, UInt32 keepWindowSize, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ p->matchFinderBase.stream = inStream; -+ p->needInit = 1; -+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); -+} -+ -+static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen) -+{ -+ p->matchFinderBase.directInput = 1; -+ p->matchFinderBase.bufferBase = (Byte *)src; -+ p->matchFinderBase.directInputRem = srcLen; -+} -+ -+SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, -+ UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ LzmaEnc_SetInputBuf(p, src, srcLen); -+ p->needInit = 1; -+ -+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); -+} -+ -+void LzmaEnc_Finish(CLzmaEncHandle pp) -+{ -+ #ifndef _7ZIP_ST -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ if (p->mtMode) -+ MatchFinderMt_ReleaseStream(&p->matchFinderMt); -+ #else -+ pp = pp; -+ #endif -+} -+ -+typedef struct -+{ -+ ISeqOutStream funcTable; -+ Byte *data; -+ SizeT rem; -+ Bool overflow; -+} CSeqOutStreamBuf; -+ -+static size_t MyWrite(void *pp, const void *data, size_t size) -+{ -+ CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp; -+ if (p->rem < size) -+ { -+ size = p->rem; -+ p->overflow = True; -+ } -+ memcpy(p->data, data, size); -+ p->rem -= size; -+ p->data += size; -+ return size; -+} -+ -+ -+UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp) -+{ -+ const CLzmaEnc *p = (CLzmaEnc *)pp; -+ return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); -+} -+ -+const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp) -+{ -+ const CLzmaEnc *p = (CLzmaEnc *)pp; -+ return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; -+} -+ -+SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit, -+ Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ UInt64 nowPos64; -+ SRes res; -+ CSeqOutStreamBuf outStream; -+ -+ outStream.funcTable.Write = MyWrite; -+ outStream.data = dest; -+ outStream.rem = *destLen; -+ outStream.overflow = False; -+ -+ p->writeEndMark = False; -+ p->finished = False; -+ p->result = SZ_OK; -+ -+ if (reInit) -+ LzmaEnc_Init(p); -+ LzmaEnc_InitPrices(p); -+ nowPos64 = p->nowPos64; -+ RangeEnc_Init(&p->rc); -+ p->rc.outStream = &outStream.funcTable; -+ -+ res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize); -+ -+ *unpackSize = (UInt32)(p->nowPos64 - nowPos64); -+ *destLen -= outStream.rem; -+ if (outStream.overflow) -+ return SZ_ERROR_OUTPUT_EOF; -+ -+ return res; -+} -+ -+static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress) -+{ -+ SRes res = SZ_OK; -+ -+ #ifndef _7ZIP_ST -+ Byte allocaDummy[0x300]; -+ int i = 0; -+ for (i = 0; i < 16; i++) -+ allocaDummy[i] = (Byte)i; -+ #endif -+ -+ for (;;) -+ { -+ res = LzmaEnc_CodeOneBlock(p, False, 0, 0); -+ if (res != SZ_OK || p->finished != 0) -+ break; -+ if (progress != 0) -+ { -+ res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc)); -+ if (res != SZ_OK) -+ { -+ res = SZ_ERROR_PROGRESS; -+ break; -+ } -+ } -+ } -+ LzmaEnc_Finish(p); -+ return res; -+} -+ -+SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress, -+ ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig)); -+ return LzmaEnc_Encode2((CLzmaEnc *)pp, progress); -+} -+ -+SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ int i; -+ UInt32 dictSize = p->dictSize; -+ if (*size < LZMA_PROPS_SIZE) -+ return SZ_ERROR_PARAM; -+ *size = LZMA_PROPS_SIZE; -+ props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc); -+ -+ for (i = 11; i <= 30; i++) -+ { -+ if (dictSize <= ((UInt32)2 << i)) -+ { -+ dictSize = (2 << i); -+ break; -+ } -+ if (dictSize <= ((UInt32)3 << i)) -+ { -+ dictSize = (3 << i); -+ break; -+ } -+ } -+ -+ for (i = 0; i < 4; i++) -+ props[1 + i] = (Byte)(dictSize >> (8 * i)); -+ return SZ_OK; -+} -+ -+SRes LzmaEnc_MemEncode(CLzmaEncHandle pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ SRes res; -+ CLzmaEnc *p = (CLzmaEnc *)pp; -+ -+ CSeqOutStreamBuf outStream; -+ -+ LzmaEnc_SetInputBuf(p, src, srcLen); -+ -+ outStream.funcTable.Write = MyWrite; -+ outStream.data = dest; -+ outStream.rem = *destLen; -+ outStream.overflow = False; -+ -+ p->writeEndMark = writeEndMark; -+ -+ p->rc.outStream = &outStream.funcTable; -+ res = LzmaEnc_MemPrepare(pp, src, srcLen, 0, alloc, allocBig); -+ if (res == SZ_OK) -+ res = LzmaEnc_Encode2(p, progress); -+ -+ *destLen -= outStream.rem; -+ if (outStream.overflow) -+ return SZ_ERROR_OUTPUT_EOF; -+ return res; -+} -+ -+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen, -+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark, -+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig) -+{ -+ CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc); -+ SRes res; -+ if (p == 0) -+ return SZ_ERROR_MEM; -+ -+ res = LzmaEnc_SetProps(p, props); -+ if (res == SZ_OK) -+ { -+ res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize); -+ if (res == SZ_OK) -+ res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen, -+ writeEndMark, progress, alloc, allocBig); -+ } -+ -+ LzmaEnc_Destroy(p, alloc, allocBig); -+ return res; -+} ---- /dev/null -+++ b/lib/lzma/Makefile -@@ -0,0 +1,7 @@ -+lzma_compress-objs := LzFind.o LzmaEnc.o -+lzma_decompress-objs := LzmaDec.o -+ -+obj-$(CONFIG_LZMA_COMPRESS) += lzma_compress.o -+obj-$(CONFIG_LZMA_DECOMPRESS) += lzma_decompress.o -+ -+EXTRA_CFLAGS += -Iinclude/linux -Iinclude/linux/lzma -include types.h diff --git a/target/linux/generic/pending-4.19/532-jffs2_eofdetect.patch b/target/linux/generic/pending-4.19/532-jffs2_eofdetect.patch deleted file mode 100644 index e9952c6d84..0000000000 --- a/target/linux/generic/pending-4.19/532-jffs2_eofdetect.patch +++ /dev/null @@ -1,65 +0,0 @@ -From: Felix Fietkau -Subject: fs: jffs2: EOF marker - -Signed-off-by: Felix Fietkau ---- - fs/jffs2/build.c | 10 ++++++++++ - fs/jffs2/scan.c | 21 +++++++++++++++++++-- - 2 files changed, 29 insertions(+), 2 deletions(-) - ---- a/fs/jffs2/build.c -+++ b/fs/jffs2/build.c -@@ -117,6 +117,16 @@ static int jffs2_build_filesystem(struct - dbg_fsbuild("scanned flash completely\n"); - jffs2_dbg_dump_block_lists_nolock(c); - -+ if (c->flags & (1 << 7)) { -+ printk("%s(): unlocking the mtd device... ", __func__); -+ mtd_unlock(c->mtd, 0, c->mtd->size); -+ printk("done.\n"); -+ -+ printk("%s(): erasing all blocks after the end marker... ", __func__); -+ jffs2_erase_pending_blocks(c, -1); -+ printk("done.\n"); -+ } -+ - dbg_fsbuild("pass 1 starting\n"); - c->flags |= JFFS2_SB_FLAG_BUILDING; - /* Now scan the directory tree, increasing nlink according to every dirent found. */ ---- a/fs/jffs2/scan.c -+++ b/fs/jffs2/scan.c -@@ -148,8 +148,14 @@ int jffs2_scan_medium(struct jffs2_sb_in - /* reset summary info for next eraseblock scan */ - jffs2_sum_reset_collected(s); - -- ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset), -- buf_size, s); -+ if (c->flags & (1 << 7)) { -+ if (mtd_block_isbad(c->mtd, jeb->offset)) -+ ret = BLK_STATE_BADBLOCK; -+ else -+ ret = BLK_STATE_ALLFF; -+ } else -+ ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset), -+ buf_size, s); - - if (ret < 0) - goto out; -@@ -561,6 +567,17 @@ full_scan: - return err; - } - -+ if ((buf[0] == 0xde) && -+ (buf[1] == 0xad) && -+ (buf[2] == 0xc0) && -+ (buf[3] == 0xde)) { -+ /* end of filesystem. erase everything after this point */ -+ printk("%s(): End of filesystem marker found at 0x%x\n", __func__, jeb->offset); -+ c->flags |= (1 << 7); -+ -+ return BLK_STATE_ALLFF; -+ } -+ - /* We temporarily use 'ofs' as a pointer into the buffer/jeb */ - ofs = 0; - max_ofs = EMPTY_SCAN_SIZE(c->sector_size); diff --git a/target/linux/generic/pending-4.19/600-netfilter_conntrack_flush.patch b/target/linux/generic/pending-4.19/600-netfilter_conntrack_flush.patch deleted file mode 100644 index fa32f88e17..0000000000 --- a/target/linux/generic/pending-4.19/600-netfilter_conntrack_flush.patch +++ /dev/null @@ -1,88 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: add support for flushing conntrack via /proc - -lede-commit 8193bbe59a74d34d6a26d4a8cb857b1952905314 -Signed-off-by: Felix Fietkau ---- - net/netfilter/nf_conntrack_standalone.c | 59 ++++++++++++++++++++++++++++++++- - 1 file changed, 58 insertions(+), 1 deletion(-) - ---- a/net/netfilter/nf_conntrack_standalone.c -+++ b/net/netfilter/nf_conntrack_standalone.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #ifdef CONFIG_SYSCTL - #include -@@ -433,6 +434,56 @@ static int ct_cpu_seq_show(struct seq_fi - return 0; - } - -+struct kill_request { -+ u16 family; -+ union nf_inet_addr addr; -+}; -+ -+static int kill_matching(struct nf_conn *i, void *data) -+{ -+ struct kill_request *kr = data; -+ struct nf_conntrack_tuple *t1 = &i->tuplehash[IP_CT_DIR_ORIGINAL].tuple; -+ struct nf_conntrack_tuple *t2 = &i->tuplehash[IP_CT_DIR_REPLY].tuple; -+ -+ if (!kr->family) -+ return 1; -+ -+ if (t1->src.l3num != kr->family) -+ return 0; -+ -+ return (nf_inet_addr_cmp(&kr->addr, &t1->src.u3) || -+ nf_inet_addr_cmp(&kr->addr, &t1->dst.u3) || -+ nf_inet_addr_cmp(&kr->addr, &t2->src.u3) || -+ nf_inet_addr_cmp(&kr->addr, &t2->dst.u3)); -+} -+ -+static int ct_file_write(struct file *file, char *buf, size_t count) -+{ -+ struct seq_file *seq = file->private_data; -+ struct net *net = seq_file_net(seq); -+ struct kill_request kr = { }; -+ -+ if (count == 0) -+ return 0; -+ -+ if (count >= INET6_ADDRSTRLEN) -+ count = INET6_ADDRSTRLEN - 1; -+ -+ if (strnchr(buf, count, ':')) { -+ kr.family = AF_INET6; -+ if (!in6_pton(buf, count, (void *)&kr.addr, '\n', NULL)) -+ return -EINVAL; -+ } else if (strnchr(buf, count, '.')) { -+ kr.family = AF_INET; -+ if (!in4_pton(buf, count, (void *)&kr.addr, '\n', NULL)) -+ return -EINVAL; -+ } -+ -+ nf_ct_iterate_cleanup_net(net, kill_matching, &kr, 0, 0); -+ -+ return 0; -+} -+ - static const struct seq_operations ct_cpu_seq_ops = { - .start = ct_cpu_seq_start, - .next = ct_cpu_seq_next, -@@ -446,8 +497,9 @@ static int nf_conntrack_standalone_init_ - kuid_t root_uid; - kgid_t root_gid; - -- pde = proc_create_net("nf_conntrack", 0440, net->proc_net, &ct_seq_ops, -- sizeof(struct ct_iter_state)); -+ pde = proc_create_net_data_write("nf_conntrack", 0440, net->proc_net, -+ &ct_seq_ops, &ct_file_write, -+ sizeof(struct ct_iter_state), NULL); - if (!pde) - goto out_nf_conntrack; - diff --git a/target/linux/generic/pending-4.19/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-4.19/610-netfilter_match_bypass_default_checks.patch deleted file mode 100644 index 1691146825..0000000000 --- a/target/linux/generic/pending-4.19/610-netfilter_match_bypass_default_checks.patch +++ /dev/null @@ -1,110 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add a new version of my netfilter speedup patches for linux 2.6.39 and 3.0 - -Signed-off-by: Felix Fietkau ---- - include/uapi/linux/netfilter_ipv4/ip_tables.h | 1 + - net/ipv4/netfilter/ip_tables.c | 37 +++++++++++++++++++++++++++ - 2 files changed, 38 insertions(+) - ---- a/include/uapi/linux/netfilter_ipv4/ip_tables.h -+++ b/include/uapi/linux/netfilter_ipv4/ip_tables.h -@@ -89,6 +89,7 @@ struct ipt_ip { - #define IPT_F_FRAG 0x01 /* Set if rule is a fragment rule */ - #define IPT_F_GOTO 0x02 /* Set if jump is a goto */ - #define IPT_F_MASK 0x03 /* All possible flag bits mask. */ -+#define IPT_F_NO_DEF_MATCH 0x80 /* Internal: no default match rules present */ - - /* Values for "inv" field in struct ipt_ip. */ - #define IPT_INV_VIA_IN 0x01 /* Invert the sense of IN IFACE. */ ---- a/net/ipv4/netfilter/ip_tables.c -+++ b/net/ipv4/netfilter/ip_tables.c -@@ -53,6 +53,9 @@ ip_packet_match(const struct iphdr *ip, - { - unsigned long ret; - -+ if (ipinfo->flags & IPT_F_NO_DEF_MATCH) -+ return true; -+ - if (NF_INVF(ipinfo, IPT_INV_SRCIP, - (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) || - NF_INVF(ipinfo, IPT_INV_DSTIP, -@@ -83,6 +86,29 @@ ip_packet_match(const struct iphdr *ip, - return true; - } - -+static void -+ip_checkdefault(struct ipt_ip *ip) -+{ -+ static const char iface_mask[IFNAMSIZ] = {}; -+ -+ if (ip->invflags || ip->flags & IPT_F_FRAG) -+ return; -+ -+ if (memcmp(ip->iniface_mask, iface_mask, IFNAMSIZ) != 0) -+ return; -+ -+ if (memcmp(ip->outiface_mask, iface_mask, IFNAMSIZ) != 0) -+ return; -+ -+ if (ip->smsk.s_addr || ip->dmsk.s_addr) -+ return; -+ -+ if (ip->proto) -+ return; -+ -+ ip->flags |= IPT_F_NO_DEF_MATCH; -+} -+ - static bool - ip_checkentry(const struct ipt_ip *ip) - { -@@ -527,6 +553,8 @@ find_check_entry(struct ipt_entry *e, st - struct xt_mtchk_param mtpar; - struct xt_entry_match *ematch; - -+ ip_checkdefault(&e->ip); -+ - if (!xt_percpu_counter_alloc(alloc_state, &e->counters)) - return -ENOMEM; - -@@ -821,6 +849,7 @@ copy_entries_to_user(unsigned int total_ - const struct xt_table_info *private = table->private; - int ret = 0; - const void *loc_cpu_entry; -+ u8 flags; - - counters = alloc_counters(table); - if (IS_ERR(counters)) -@@ -848,6 +877,14 @@ copy_entries_to_user(unsigned int total_ - goto free_counters; - } - -+ flags = e->ip.flags & IPT_F_MASK; -+ if (copy_to_user(userptr + off -+ + offsetof(struct ipt_entry, ip.flags), -+ &flags, sizeof(flags)) != 0) { -+ ret = -EFAULT; -+ goto free_counters; -+ } -+ - for (i = sizeof(struct ipt_entry); - i < e->target_offset; - i += m->u.match_size) { -@@ -1228,12 +1265,15 @@ compat_copy_entry_to_user(struct ipt_ent - compat_uint_t origsize; - const struct xt_entry_match *ematch; - int ret = 0; -+ u8 flags = e->ip.flags & IPT_F_MASK; - - origsize = *size; - ce = *dstptr; - if (copy_to_user(ce, e, sizeof(struct ipt_entry)) != 0 || - copy_to_user(&ce->counters, &counters[i], -- sizeof(counters[i])) != 0) -+ sizeof(counters[i])) != 0 || -+ copy_to_user(&ce->ip.flags, &flags, -+ sizeof(flags)) != 0) - return -EFAULT; - - *dstptr += sizeof(struct compat_ipt_entry); diff --git a/target/linux/generic/pending-4.19/611-netfilter_match_bypass_default_table.patch b/target/linux/generic/pending-4.19/611-netfilter_match_bypass_default_table.patch deleted file mode 100644 index ba976b0751..0000000000 --- a/target/linux/generic/pending-4.19/611-netfilter_match_bypass_default_table.patch +++ /dev/null @@ -1,106 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: match bypass default table - -Signed-off-by: Felix Fietkau ---- - net/ipv4/netfilter/ip_tables.c | 79 +++++++++++++++++++++++++++++++----------- - 1 file changed, 58 insertions(+), 21 deletions(-) - ---- a/net/ipv4/netfilter/ip_tables.c -+++ b/net/ipv4/netfilter/ip_tables.c -@@ -249,6 +249,33 @@ struct ipt_entry *ipt_next_entry(const s - return (void *)entry + entry->next_offset; - } - -+static bool -+ipt_handle_default_rule(struct ipt_entry *e, unsigned int *verdict) -+{ -+ struct xt_entry_target *t; -+ struct xt_standard_target *st; -+ -+ if (e->target_offset != sizeof(struct ipt_entry)) -+ return false; -+ -+ if (!(e->ip.flags & IPT_F_NO_DEF_MATCH)) -+ return false; -+ -+ t = ipt_get_target(e); -+ if (t->u.kernel.target->target) -+ return false; -+ -+ st = (struct xt_standard_target *) t; -+ if (st->verdict == XT_RETURN) -+ return false; -+ -+ if (st->verdict >= 0) -+ return false; -+ -+ *verdict = (unsigned)(-st->verdict) - 1; -+ return true; -+} -+ - /* Returns one of the generic firewall policies, like NF_ACCEPT. */ - unsigned int - ipt_do_table(struct sk_buff *skb, -@@ -269,27 +296,28 @@ ipt_do_table(struct sk_buff *skb, - unsigned int addend; - - /* Initialization */ -+ WARN_ON(!(table->valid_hooks & (1 << hook))); -+ local_bh_disable(); -+ private = READ_ONCE(table->private); /* Address dependency. */ -+ cpu = smp_processor_id(); -+ table_base = private->entries; -+ -+ e = get_entry(table_base, private->hook_entry[hook]); -+ if (ipt_handle_default_rule(e, &verdict)) { -+ struct xt_counters *counter; -+ -+ counter = xt_get_this_cpu_counter(&e->counters); -+ ADD_COUNTER(*counter, skb->len, 1); -+ local_bh_enable(); -+ return verdict; -+ } -+ - stackidx = 0; - ip = ip_hdr(skb); - indev = state->in ? state->in->name : nulldevname; - outdev = state->out ? state->out->name : nulldevname; -- /* We handle fragments by dealing with the first fragment as -- * if it was a normal packet. All other fragments are treated -- * normally, except that they will NEVER match rules that ask -- * things we don't know, ie. tcp syn flag or ports). If the -- * rule is also a fragment-specific rule, non-fragments won't -- * match it. */ -- acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET; -- acpar.thoff = ip_hdrlen(skb); -- acpar.hotdrop = false; -- acpar.state = state; - -- WARN_ON(!(table->valid_hooks & (1 << hook))); -- local_bh_disable(); - addend = xt_write_recseq_begin(); -- private = READ_ONCE(table->private); /* Address dependency. */ -- cpu = smp_processor_id(); -- table_base = private->entries; - jumpstack = (struct ipt_entry **)private->jumpstack[cpu]; - - /* Switch to alternate jumpstack if we're being invoked via TEE. -@@ -302,7 +330,16 @@ ipt_do_table(struct sk_buff *skb, - if (static_key_false(&xt_tee_enabled)) - jumpstack += private->stacksize * __this_cpu_read(nf_skb_duplicated); - -- e = get_entry(table_base, private->hook_entry[hook]); -+ /* We handle fragments by dealing with the first fragment as -+ * if it was a normal packet. All other fragments are treated -+ * normally, except that they will NEVER match rules that ask -+ * things we don't know, ie. tcp syn flag or ports). If the -+ * rule is also a fragment-specific rule, non-fragments won't -+ * match it. */ -+ acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET; -+ acpar.thoff = ip_hdrlen(skb); -+ acpar.hotdrop = false; -+ acpar.state = state; - - do { - const struct xt_entry_target *t; diff --git a/target/linux/generic/pending-4.19/612-netfilter_match_reduce_memory_access.patch b/target/linux/generic/pending-4.19/612-netfilter_match_reduce_memory_access.patch deleted file mode 100644 index cd6fcf8e74..0000000000 --- a/target/linux/generic/pending-4.19/612-netfilter_match_reduce_memory_access.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: reduce match memory access - -Signed-off-by: Felix Fietkau ---- - net/ipv4/netfilter/ip_tables.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/net/ipv4/netfilter/ip_tables.c -+++ b/net/ipv4/netfilter/ip_tables.c -@@ -56,9 +56,9 @@ ip_packet_match(const struct iphdr *ip, - if (ipinfo->flags & IPT_F_NO_DEF_MATCH) - return true; - -- if (NF_INVF(ipinfo, IPT_INV_SRCIP, -+ if (NF_INVF(ipinfo, IPT_INV_SRCIP, ipinfo->smsk.s_addr && - (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) || -- NF_INVF(ipinfo, IPT_INV_DSTIP, -+ NF_INVF(ipinfo, IPT_INV_DSTIP, ipinfo->dmsk.s_addr && - (ip->daddr & ipinfo->dmsk.s_addr) != ipinfo->dst.s_addr)) - return false; - diff --git a/target/linux/generic/pending-4.19/613-netfilter_optional_tcp_window_check.patch b/target/linux/generic/pending-4.19/613-netfilter_optional_tcp_window_check.patch deleted file mode 100644 index 634218dfc3..0000000000 --- a/target/linux/generic/pending-4.19/613-netfilter_optional_tcp_window_check.patch +++ /dev/null @@ -1,53 +0,0 @@ -From: Felix Fietkau -Subject: netfilter: optional tcp window check - -Signed-off-by: Felix Fietkau ---- - net/netfilter/nf_conntrack_proto_tcp.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/net/netfilter/nf_conntrack_proto_tcp.c -+++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -34,6 +34,9 @@ - #include - #include - -+/* Do not check the TCP window for incoming packets */ -+static int nf_ct_tcp_no_window_check __read_mostly = 1; -+ - /* "Be conservative in what you do, - be liberal in what you accept from others." - If it's non-zero, we mark only out of window RST segments as INVALID. */ -@@ -484,6 +487,9 @@ static bool tcp_in_window(const struct n - s32 receiver_offset; - bool res, in_recv_win; - -+ if (nf_ct_tcp_no_window_check) -+ return true; -+ - /* - * Get the required data from the packet. - */ -@@ -1059,7 +1065,7 @@ static int tcp_packet(struct nf_conn *ct - IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED && - timeouts[new_state] > timeouts[TCP_CONNTRACK_UNACK]) - timeout = timeouts[TCP_CONNTRACK_UNACK]; -- else if (ct->proto.tcp.last_win == 0 && -+ else if (!nf_ct_tcp_no_window_check && ct->proto.tcp.last_win == 0 && - timeouts[new_state] > timeouts[TCP_CONNTRACK_RETRANS]) - timeout = timeouts[TCP_CONNTRACK_RETRANS]; - else -@@ -1508,6 +1514,13 @@ static struct ctl_table tcp_sysctl_table - .mode = 0644, - .proc_handler = proc_dointvec, - }, -+ { -+ .procname = "nf_conntrack_tcp_no_window_check", -+ .data = &nf_ct_tcp_no_window_check, -+ .maxlen = sizeof(unsigned int), -+ .mode = 0644, -+ .proc_handler = proc_dointvec, -+ }, - { } - }; - #endif /* CONFIG_SYSCTL */ diff --git a/target/linux/generic/pending-4.19/620-net_sched-codel-do-not-defer-queue-length-update.patch b/target/linux/generic/pending-4.19/620-net_sched-codel-do-not-defer-queue-length-update.patch deleted file mode 100644 index 457c812841..0000000000 --- a/target/linux/generic/pending-4.19/620-net_sched-codel-do-not-defer-queue-length-update.patch +++ /dev/null @@ -1,86 +0,0 @@ -From: Konstantin Khlebnikov -Date: Mon, 21 Aug 2017 11:14:14 +0300 -Subject: [PATCH] net_sched/codel: do not defer queue length update - -When codel wants to drop last packet in ->dequeue() it cannot call -qdisc_tree_reduce_backlog() right away - it will notify parent qdisc -about zero qlen and HTB/HFSC will deactivate class. The same class will -be deactivated second time by caller of ->dequeue(). Currently codel and -fq_codel defer update. This triggers warning in HFSC when it's qlen != 0 -but there is no active classes. - -This patch update parent queue length immediately: just temporary increase -qlen around qdisc_tree_reduce_backlog() to prevent first class deactivation -if we have skb to return. - -This might open another problem in HFSC - now operation peek could fail and -deactivate parent class. - -Signed-off-by: Konstantin Khlebnikov -Link: https://bugzilla.kernel.org/show_bug.cgi?id=109581 ---- - ---- a/net/sched/sch_codel.c -+++ b/net/sched/sch_codel.c -@@ -95,11 +95,17 @@ static struct sk_buff *codel_qdisc_deque - &q->stats, qdisc_pkt_len, codel_get_enqueue_time, - drop_func, dequeue_func); - -- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, -- * or HTB crashes. Defer it for next round. -+ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate -+ * parent class, dequeue in parent qdisc will do the same if we -+ * return skb. Temporary increment qlen if we have skb. - */ -- if (q->stats.drop_count && sch->q.qlen) { -- qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len); -+ if (q->stats.drop_count) { -+ if (skb) -+ sch->q.qlen++; -+ qdisc_tree_reduce_backlog(sch, q->stats.drop_count, -+ q->stats.drop_len); -+ if (skb) -+ sch->q.qlen--; - q->stats.drop_count = 0; - q->stats.drop_len = 0; - } ---- a/net/sched/sch_fq_codel.c -+++ b/net/sched/sch_fq_codel.c -@@ -317,6 +317,21 @@ begin: - flow->dropped += q->cstats.drop_count - prev_drop_count; - flow->dropped += q->cstats.ecn_mark - prev_ecn_mark; - -+ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate -+ * parent class, dequeue in parent qdisc will do the same if we -+ * return skb. Temporary increment qlen if we have skb. -+ */ -+ if (q->cstats.drop_count) { -+ if (skb) -+ sch->q.qlen++; -+ qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, -+ q->cstats.drop_len); -+ if (skb) -+ sch->q.qlen--; -+ q->cstats.drop_count = 0; -+ q->cstats.drop_len = 0; -+ } -+ - if (!skb) { - /* force a pass through old_flows to prevent starvation */ - if ((head == &q->new_flows) && !list_empty(&q->old_flows)) -@@ -327,15 +342,6 @@ begin: - } - qdisc_bstats_update(sch, skb); - flow->deficit -= qdisc_pkt_len(skb); -- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, -- * or HTB crashes. Defer it for next round. -- */ -- if (q->cstats.drop_count && sch->q.qlen) { -- qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, -- q->cstats.drop_len); -- q->cstats.drop_count = 0; -- q->cstats.drop_len = 0; -- } - return skb; - } - diff --git a/target/linux/generic/pending-4.19/630-packet_socket_type.patch b/target/linux/generic/pending-4.19/630-packet_socket_type.patch deleted file mode 100644 index 8323240ae4..0000000000 --- a/target/linux/generic/pending-4.19/630-packet_socket_type.patch +++ /dev/null @@ -1,138 +0,0 @@ -From: Felix Fietkau -Subject: net: add an optimization for dealing with raw sockets - -lede-commit: 4898039703d7315f0f3431c860123338ec3be0f6 -Signed-off-by: Felix Fietkau ---- - include/uapi/linux/if_packet.h | 3 +++ - net/packet/af_packet.c | 34 +++++++++++++++++++++++++++------- - net/packet/internal.h | 1 + - 3 files changed, 31 insertions(+), 7 deletions(-) - ---- a/include/uapi/linux/if_packet.h -+++ b/include/uapi/linux/if_packet.h -@@ -32,6 +32,8 @@ struct sockaddr_ll { - #define PACKET_KERNEL 7 /* To kernel space */ - /* Unused, PACKET_FASTROUTE and PACKET_LOOPBACK are invisible to user space */ - #define PACKET_FASTROUTE 6 /* Fastrouted frame */ -+#define PACKET_MASK_ANY 0xffffffff /* mask for packet type bits */ -+ - - /* Packet socket options */ - -@@ -57,6 +59,7 @@ struct sockaddr_ll { - #define PACKET_QDISC_BYPASS 20 - #define PACKET_ROLLOVER_STATS 21 - #define PACKET_FANOUT_DATA 22 -+#define PACKET_RECV_TYPE 23 - - #define PACKET_FANOUT_HASH 0 - #define PACKET_FANOUT_LB 1 ---- a/net/packet/af_packet.c -+++ b/net/packet/af_packet.c -@@ -1796,6 +1796,7 @@ static int packet_rcv_spkt(struct sk_buf - { - struct sock *sk; - struct sockaddr_pkt *spkt; -+ struct packet_sock *po; - - /* - * When we registered the protocol we saved the socket in the data -@@ -1803,6 +1804,7 @@ static int packet_rcv_spkt(struct sk_buf - */ - - sk = pt->af_packet_priv; -+ po = pkt_sk(sk); - - /* - * Yank back the headers [hope the device set this -@@ -1815,7 +1817,7 @@ static int packet_rcv_spkt(struct sk_buf - * so that this procedure is noop. - */ - -- if (skb->pkt_type == PACKET_LOOPBACK) -+ if (!(po->pkt_type & (1 << skb->pkt_type))) - goto out; - - if (!net_eq(dev_net(dev), sock_net(sk))) -@@ -2043,12 +2045,12 @@ static int packet_rcv(struct sk_buff *sk - unsigned int snaplen, res; - bool is_drop_n_account = false; - -- if (skb->pkt_type == PACKET_LOOPBACK) -- goto drop; -- - sk = pt->af_packet_priv; - po = pkt_sk(sk); - -+ if (!(po->pkt_type & (1 << skb->pkt_type))) -+ goto drop; -+ - if (!net_eq(dev_net(dev), sock_net(sk))) - goto drop; - -@@ -2175,12 +2177,12 @@ static int tpacket_rcv(struct sk_buff *s - BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32); - BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48); - -- if (skb->pkt_type == PACKET_LOOPBACK) -- goto drop; -- - sk = pt->af_packet_priv; - po = pkt_sk(sk); - -+ if (!(po->pkt_type & (1 << skb->pkt_type))) -+ goto drop; -+ - if (!net_eq(dev_net(dev), sock_net(sk))) - goto drop; - -@@ -3277,6 +3279,7 @@ static int packet_create(struct net *net - mutex_init(&po->pg_vec_lock); - po->rollover = NULL; - po->prot_hook.func = packet_rcv; -+ po->pkt_type = PACKET_MASK_ANY & ~(1 << PACKET_LOOPBACK); - - if (sock->type == SOCK_PACKET) - po->prot_hook.func = packet_rcv_spkt; -@@ -3897,6 +3900,16 @@ packet_setsockopt(struct socket *sock, i - po->xmit = val ? packet_direct_xmit : dev_queue_xmit; - return 0; - } -+ case PACKET_RECV_TYPE: -+ { -+ unsigned int val; -+ if (optlen != sizeof(val)) -+ return -EINVAL; -+ if (copy_from_user(&val, optval, sizeof(val))) -+ return -EFAULT; -+ po->pkt_type = val & ~BIT(PACKET_LOOPBACK); -+ return 0; -+ } - default: - return -ENOPROTOOPT; - } -@@ -3949,6 +3962,13 @@ static int packet_getsockopt(struct sock - case PACKET_VNET_HDR: - val = po->has_vnet_hdr; - break; -+ case PACKET_RECV_TYPE: -+ if (len > sizeof(unsigned int)) -+ len = sizeof(unsigned int); -+ val = po->pkt_type; -+ -+ data = &val; -+ break; - case PACKET_VERSION: - val = po->tp_version; - break; ---- a/net/packet/internal.h -+++ b/net/packet/internal.h -@@ -135,6 +135,7 @@ struct packet_sock { - struct net_device __rcu *cached_dev; - int (*xmit)(struct sk_buff *skb); - struct packet_type prot_hook ____cacheline_aligned_in_smp; -+ unsigned int pkt_type; - }; - - static struct packet_sock *pkt_sk(struct sock *sk) diff --git a/target/linux/generic/pending-4.19/640-netfilter-nf_flow_table-add-hardware-offload-support.patch b/target/linux/generic/pending-4.19/640-netfilter-nf_flow_table-add-hardware-offload-support.patch deleted file mode 100644 index f0946e8dd2..0000000000 --- a/target/linux/generic/pending-4.19/640-netfilter-nf_flow_table-add-hardware-offload-support.patch +++ /dev/null @@ -1,564 +0,0 @@ -From: Pablo Neira Ayuso -Date: Thu, 11 Jan 2018 16:32:00 +0100 -Subject: [PATCH] netfilter: nf_flow_table: add hardware offload support - -This patch adds the infrastructure to offload flows to hardware, in case -the nic/switch comes with built-in flow tables capabilities. - -If the hardware comes with no hardware flow tables or they have -limitations in terms of features, the existing infrastructure falls back -to the software flow table implementation. - -The software flow table garbage collector skips entries that resides in -the hardware, so the hardware will be responsible for releasing this -flow table entry too via flow_offload_dead(). - -Hardware configuration, either to add or to delete entries, is done from -the hardware offload workqueue, to ensure this is done from user context -given that we may sleep when grabbing the mdio mutex. - -Signed-off-by: Pablo Neira Ayuso ---- - create mode 100644 net/netfilter/nf_flow_table_hw.c - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -918,6 +918,13 @@ struct dev_ifalias { - char ifalias[]; - }; - -+struct flow_offload; -+ -+enum flow_offload_type { -+ FLOW_OFFLOAD_ADD = 0, -+ FLOW_OFFLOAD_DEL, -+}; -+ - /* - * This structure defines the management hooks for network devices. - * The following hooks can be defined; unless noted otherwise, they are -@@ -1150,6 +1157,10 @@ struct dev_ifalias { - * int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh, - * u16 flags); - * -+ * int (*ndo_flow_offload)(enum flow_offload_type type, -+ * struct flow_offload *flow); -+ * Adds/deletes flow entry to/from net device flowtable. -+ * - * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier); - * Called to change device carrier. Soft-devices (like dummy, team, etc) - * which do not represent real hardware may define this to allow their -@@ -1377,6 +1388,8 @@ struct net_device_ops { - int (*ndo_bridge_dellink)(struct net_device *dev, - struct nlmsghdr *nlh, - u16 flags); -+ int (*ndo_flow_offload)(enum flow_offload_type type, -+ struct flow_offload *flow); - int (*ndo_change_carrier)(struct net_device *dev, - bool new_carrier); - int (*ndo_get_phys_port_id)(struct net_device *dev, ---- a/include/net/netfilter/nf_flow_table.h -+++ b/include/net/netfilter/nf_flow_table.h -@@ -20,11 +20,17 @@ struct nf_flowtable_type { - struct module *owner; - }; - -+enum nf_flowtable_flags { -+ NF_FLOWTABLE_F_HW = 0x1, -+}; -+ - struct nf_flowtable { - struct list_head list; - struct rhashtable rhashtable; - const struct nf_flowtable_type *type; -+ u32 flags; - struct delayed_work gc_work; -+ possible_net_t ft_net; - }; - - enum flow_offload_tuple_dir { -@@ -69,6 +75,7 @@ struct flow_offload_tuple_rhash { - #define FLOW_OFFLOAD_DNAT 0x2 - #define FLOW_OFFLOAD_DYING 0x4 - #define FLOW_OFFLOAD_TEARDOWN 0x8 -+#define FLOW_OFFLOAD_HW 0x10 - - struct flow_offload { - struct flow_offload_tuple_rhash tuplehash[FLOW_OFFLOAD_DIR_MAX]; -@@ -125,6 +132,22 @@ unsigned int nf_flow_offload_ip_hook(voi - unsigned int nf_flow_offload_ipv6_hook(void *priv, struct sk_buff *skb, - const struct nf_hook_state *state); - -+void nf_flow_offload_hw_add(struct net *net, struct flow_offload *flow, -+ struct nf_conn *ct); -+void nf_flow_offload_hw_del(struct net *net, struct flow_offload *flow); -+ -+struct nf_flow_table_hw { -+ struct module *owner; -+ void (*add)(struct net *net, struct flow_offload *flow, -+ struct nf_conn *ct); -+ void (*del)(struct net *net, struct flow_offload *flow); -+}; -+ -+int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload); -+void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload); -+ -+extern struct work_struct nf_flow_offload_hw_work; -+ - #define MODULE_ALIAS_NF_FLOWTABLE(family) \ - MODULE_ALIAS("nf-flowtable-" __stringify(family)) - ---- a/include/uapi/linux/netfilter/nf_tables.h -+++ b/include/uapi/linux/netfilter/nf_tables.h -@@ -1464,6 +1464,7 @@ enum nft_object_attributes { - * @NFTA_FLOWTABLE_HOOK: netfilter hook configuration(NLA_U32) - * @NFTA_FLOWTABLE_USE: number of references to this flow table (NLA_U32) - * @NFTA_FLOWTABLE_HANDLE: object handle (NLA_U64) -+ * @NFTA_FLOWTABLE_FLAGS: flags (NLA_U32) - */ - enum nft_flowtable_attributes { - NFTA_FLOWTABLE_UNSPEC, -@@ -1473,6 +1474,7 @@ enum nft_flowtable_attributes { - NFTA_FLOWTABLE_USE, - NFTA_FLOWTABLE_HANDLE, - NFTA_FLOWTABLE_PAD, -+ NFTA_FLOWTABLE_FLAGS, - __NFTA_FLOWTABLE_MAX - }; - #define NFTA_FLOWTABLE_MAX (__NFTA_FLOWTABLE_MAX - 1) ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -714,6 +714,15 @@ config NF_FLOW_TABLE - - To compile it as a module, choose M here. - -+config NF_FLOW_TABLE_HW -+ tristate "Netfilter flow table hardware offload module" -+ depends on NF_FLOW_TABLE -+ help -+ This option adds hardware offload support for the flow table core -+ infrastructure. -+ -+ To compile it as a module, choose M here. -+ - config NETFILTER_XTABLES - tristate "Netfilter Xtables support (required for ip_tables)" - default m if NETFILTER_ADVANCED=n ---- a/net/netfilter/Makefile -+++ b/net/netfilter/Makefile -@@ -126,6 +126,7 @@ obj-$(CONFIG_NF_FLOW_TABLE) += nf_flow_t - nf_flow_table-objs := nf_flow_table_core.o nf_flow_table_ip.o - - obj-$(CONFIG_NF_FLOW_TABLE_INET) += nf_flow_table_inet.o -+obj-$(CONFIG_NF_FLOW_TABLE_HW) += nf_flow_table_hw.o - - # generic X tables - obj-$(CONFIG_NETFILTER_XTABLES) += x_tables.o xt_tcpudp.o ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -228,10 +228,16 @@ int flow_offload_add(struct nf_flowtable - } - EXPORT_SYMBOL_GPL(flow_offload_add); - -+static inline bool nf_flow_in_hw(const struct flow_offload *flow) -+{ -+ return flow->flags & FLOW_OFFLOAD_HW; -+} -+ - static void flow_offload_del(struct nf_flowtable *flow_table, - struct flow_offload *flow) - { - struct flow_offload_entry *e; -+ struct net *net = read_pnet(&flow_table->ft_net); - - rhashtable_remove_fast(&flow_table->rhashtable, - &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].node, -@@ -246,6 +252,9 @@ static void flow_offload_del(struct nf_f - if (!(flow->flags & FLOW_OFFLOAD_TEARDOWN)) - flow_offload_fixup_ct_state(e->ct); - -+ if (nf_flow_in_hw(flow)) -+ nf_flow_offload_hw_del(net, flow); -+ - flow_offload_free(flow); - } - -@@ -359,6 +368,9 @@ static int nf_flow_offload_gc_step(struc - if (!teardown) - nf_ct_offload_timeout(flow); - -+ if (nf_flow_in_hw(flow) && !teardown) -+ continue; -+ - if (nf_flow_has_expired(flow) || teardown) - flow_offload_del(flow_table, flow); - } -@@ -494,10 +506,43 @@ int nf_flow_dnat_port(const struct flow_ - } - EXPORT_SYMBOL_GPL(nf_flow_dnat_port); - -+static const struct nf_flow_table_hw __rcu *nf_flow_table_hw_hook __read_mostly; -+ -+static int nf_flow_offload_hw_init(struct nf_flowtable *flow_table) -+{ -+ const struct nf_flow_table_hw *offload; -+ -+ if (!rcu_access_pointer(nf_flow_table_hw_hook)) -+ request_module("nf-flow-table-hw"); -+ -+ rcu_read_lock(); -+ offload = rcu_dereference(nf_flow_table_hw_hook); -+ if (!offload) -+ goto err_no_hw_offload; -+ -+ if (!try_module_get(offload->owner)) -+ goto err_no_hw_offload; -+ -+ rcu_read_unlock(); -+ -+ return 0; -+ -+err_no_hw_offload: -+ rcu_read_unlock(); -+ -+ return -EOPNOTSUPP; -+} -+ - int nf_flow_table_init(struct nf_flowtable *flowtable) - { - int err; - -+ if (flowtable->flags & NF_FLOWTABLE_F_HW) { -+ err = nf_flow_offload_hw_init(flowtable); -+ if (err) -+ return err; -+ } -+ - INIT_DEFERRABLE_WORK(&flowtable->gc_work, nf_flow_offload_work_gc); - - err = rhashtable_init(&flowtable->rhashtable, -@@ -538,6 +583,8 @@ static void nf_flow_table_iterate_cleanu - { - nf_flow_table_iterate(flowtable, nf_flow_table_do_cleanup, dev); - flush_delayed_work(&flowtable->gc_work); -+ if (flowtable->flags & NF_FLOWTABLE_F_HW) -+ flush_work(&nf_flow_offload_hw_work); - } - - void nf_flow_table_cleanup(struct net *net, struct net_device *dev) -@@ -551,6 +598,26 @@ void nf_flow_table_cleanup(struct net *n - } - EXPORT_SYMBOL_GPL(nf_flow_table_cleanup); - -+struct work_struct nf_flow_offload_hw_work; -+EXPORT_SYMBOL_GPL(nf_flow_offload_hw_work); -+ -+/* Give the hardware workqueue the chance to remove entries from hardware.*/ -+static void nf_flow_offload_hw_free(struct nf_flowtable *flowtable) -+{ -+ const struct nf_flow_table_hw *offload; -+ -+ flush_work(&nf_flow_offload_hw_work); -+ -+ rcu_read_lock(); -+ offload = rcu_dereference(nf_flow_table_hw_hook); -+ if (!offload) { -+ rcu_read_unlock(); -+ return; -+ } -+ module_put(offload->owner); -+ rcu_read_unlock(); -+} -+ - void nf_flow_table_free(struct nf_flowtable *flow_table) - { - mutex_lock(&flowtable_lock); -@@ -560,9 +627,58 @@ void nf_flow_table_free(struct nf_flowta - nf_flow_table_iterate(flow_table, nf_flow_table_do_cleanup, NULL); - WARN_ON(!nf_flow_offload_gc_step(flow_table)); - rhashtable_destroy(&flow_table->rhashtable); -+ if (flow_table->flags & NF_FLOWTABLE_F_HW) -+ nf_flow_offload_hw_free(flow_table); - } - EXPORT_SYMBOL_GPL(nf_flow_table_free); - -+/* Must be called from user context. */ -+void nf_flow_offload_hw_add(struct net *net, struct flow_offload *flow, -+ struct nf_conn *ct) -+{ -+ const struct nf_flow_table_hw *offload; -+ -+ rcu_read_lock(); -+ offload = rcu_dereference(nf_flow_table_hw_hook); -+ if (offload) -+ offload->add(net, flow, ct); -+ rcu_read_unlock(); -+} -+EXPORT_SYMBOL_GPL(nf_flow_offload_hw_add); -+ -+/* Must be called from user context. */ -+void nf_flow_offload_hw_del(struct net *net, struct flow_offload *flow) -+{ -+ const struct nf_flow_table_hw *offload; -+ -+ rcu_read_lock(); -+ offload = rcu_dereference(nf_flow_table_hw_hook); -+ if (offload) -+ offload->del(net, flow); -+ rcu_read_unlock(); -+} -+EXPORT_SYMBOL_GPL(nf_flow_offload_hw_del); -+ -+int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload) -+{ -+ if (rcu_access_pointer(nf_flow_table_hw_hook)) -+ return -EBUSY; -+ -+ rcu_assign_pointer(nf_flow_table_hw_hook, offload); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(nf_flow_table_hw_register); -+ -+void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload) -+{ -+ WARN_ON(rcu_access_pointer(nf_flow_table_hw_hook) != offload); -+ rcu_assign_pointer(nf_flow_table_hw_hook, NULL); -+ -+ synchronize_rcu(); -+} -+EXPORT_SYMBOL_GPL(nf_flow_table_hw_unregister); -+ - static int nf_flow_table_netdev_event(struct notifier_block *this, - unsigned long event, void *ptr) - { ---- /dev/null -+++ b/net/netfilter/nf_flow_table_hw.c -@@ -0,0 +1,169 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static DEFINE_SPINLOCK(flow_offload_hw_pending_list_lock); -+static LIST_HEAD(flow_offload_hw_pending_list); -+ -+static DEFINE_MUTEX(nf_flow_offload_hw_mutex); -+ -+struct flow_offload_hw { -+ struct list_head list; -+ enum flow_offload_type type; -+ struct flow_offload *flow; -+ struct nf_conn *ct; -+ possible_net_t flow_hw_net; -+}; -+ -+static int do_flow_offload_hw(struct net *net, struct flow_offload *flow, -+ int type) -+{ -+ struct net_device *indev; -+ int ret, ifindex; -+ -+ ifindex = flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple.iifidx; -+ indev = dev_get_by_index(net, ifindex); -+ if (WARN_ON(!indev)) -+ return 0; -+ -+ mutex_lock(&nf_flow_offload_hw_mutex); -+ ret = indev->netdev_ops->ndo_flow_offload(type, flow); -+ mutex_unlock(&nf_flow_offload_hw_mutex); -+ -+ dev_put(indev); -+ -+ return ret; -+} -+ -+static void flow_offload_hw_work_add(struct flow_offload_hw *offload) -+{ -+ struct net *net; -+ int ret; -+ -+ if (nf_ct_is_dying(offload->ct)) -+ return; -+ -+ net = read_pnet(&offload->flow_hw_net); -+ ret = do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_ADD); -+ if (ret >= 0) -+ offload->flow->flags |= FLOW_OFFLOAD_HW; -+} -+ -+static void flow_offload_hw_work_del(struct flow_offload_hw *offload) -+{ -+ struct net *net = read_pnet(&offload->flow_hw_net); -+ -+ do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_DEL); -+} -+ -+static void flow_offload_hw_work(struct work_struct *work) -+{ -+ struct flow_offload_hw *offload, *next; -+ LIST_HEAD(hw_offload_pending); -+ -+ spin_lock_bh(&flow_offload_hw_pending_list_lock); -+ list_replace_init(&flow_offload_hw_pending_list, &hw_offload_pending); -+ spin_unlock_bh(&flow_offload_hw_pending_list_lock); -+ -+ list_for_each_entry_safe(offload, next, &hw_offload_pending, list) { -+ switch (offload->type) { -+ case FLOW_OFFLOAD_ADD: -+ flow_offload_hw_work_add(offload); -+ break; -+ case FLOW_OFFLOAD_DEL: -+ flow_offload_hw_work_del(offload); -+ break; -+ } -+ if (offload->ct) -+ nf_conntrack_put(&offload->ct->ct_general); -+ list_del(&offload->list); -+ kfree(offload); -+ } -+} -+ -+static void flow_offload_queue_work(struct flow_offload_hw *offload) -+{ -+ spin_lock_bh(&flow_offload_hw_pending_list_lock); -+ list_add_tail(&offload->list, &flow_offload_hw_pending_list); -+ spin_unlock_bh(&flow_offload_hw_pending_list_lock); -+ -+ schedule_work(&nf_flow_offload_hw_work); -+} -+ -+static void flow_offload_hw_add(struct net *net, struct flow_offload *flow, -+ struct nf_conn *ct) -+{ -+ struct flow_offload_hw *offload; -+ -+ offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC); -+ if (!offload) -+ return; -+ -+ nf_conntrack_get(&ct->ct_general); -+ offload->type = FLOW_OFFLOAD_ADD; -+ offload->ct = ct; -+ offload->flow = flow; -+ write_pnet(&offload->flow_hw_net, net); -+ -+ flow_offload_queue_work(offload); -+} -+ -+static void flow_offload_hw_del(struct net *net, struct flow_offload *flow) -+{ -+ struct flow_offload_hw *offload; -+ -+ offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC); -+ if (!offload) -+ return; -+ -+ offload->type = FLOW_OFFLOAD_DEL; -+ offload->ct = NULL; -+ offload->flow = flow; -+ write_pnet(&offload->flow_hw_net, net); -+ -+ flow_offload_queue_work(offload); -+} -+ -+static const struct nf_flow_table_hw flow_offload_hw = { -+ .add = flow_offload_hw_add, -+ .del = flow_offload_hw_del, -+ .owner = THIS_MODULE, -+}; -+ -+static int __init nf_flow_table_hw_module_init(void) -+{ -+ INIT_WORK(&nf_flow_offload_hw_work, flow_offload_hw_work); -+ nf_flow_table_hw_register(&flow_offload_hw); -+ -+ return 0; -+} -+ -+static void __exit nf_flow_table_hw_module_exit(void) -+{ -+ struct flow_offload_hw *offload, *next; -+ LIST_HEAD(hw_offload_pending); -+ -+ nf_flow_table_hw_unregister(&flow_offload_hw); -+ cancel_work_sync(&nf_flow_offload_hw_work); -+ -+ list_for_each_entry_safe(offload, next, &hw_offload_pending, list) { -+ if (offload->ct) -+ nf_conntrack_put(&offload->ct->ct_general); -+ list_del(&offload->list); -+ kfree(offload); -+ } -+} -+ -+module_init(nf_flow_table_hw_module_init); -+module_exit(nf_flow_table_hw_module_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Pablo Neira Ayuso "); -+MODULE_ALIAS("nf-flow-table-hw"); ---- a/net/netfilter/nf_tables_api.c -+++ b/net/netfilter/nf_tables_api.c -@@ -5503,6 +5503,13 @@ static int nf_tables_flowtable_parse_hoo - if (err < 0) - return err; - -+ for (i = 0; i < n; i++) { -+ if (flowtable->data.flags & NF_FLOWTABLE_F_HW && -+ !dev_array[i]->netdev_ops->ndo_flow_offload) { -+ return -EOPNOTSUPP; -+ } -+ } -+ - ops = kcalloc(n, sizeof(struct nf_hook_ops), GFP_KERNEL); - if (!ops) - return -ENOMEM; -@@ -5634,10 +5641,19 @@ static int nf_tables_newflowtable(struct - } - - flowtable->data.type = type; -+ write_pnet(&flowtable->data.ft_net, net); -+ - err = type->init(&flowtable->data); - if (err < 0) - goto err3; - -+ if (nla[NFTA_FLOWTABLE_FLAGS]) { -+ flowtable->data.flags = -+ ntohl(nla_get_be32(nla[NFTA_FLOWTABLE_FLAGS])); -+ if (flowtable->data.flags & ~NF_FLOWTABLE_F_HW) -+ goto err4; -+ } -+ - err = nf_tables_flowtable_parse_hook(&ctx, nla[NFTA_FLOWTABLE_HOOK], - flowtable); - if (err < 0) -@@ -5763,7 +5779,8 @@ static int nf_tables_fill_flowtable_info - nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) || - nla_put_be32(skb, NFTA_FLOWTABLE_USE, htonl(flowtable->use)) || - nla_put_be64(skb, NFTA_FLOWTABLE_HANDLE, cpu_to_be64(flowtable->handle), -- NFTA_FLOWTABLE_PAD)) -+ NFTA_FLOWTABLE_PAD) || -+ nla_put_be32(skb, NFTA_FLOWTABLE_FLAGS, htonl(flowtable->data.flags))) - goto nla_put_failure; - - nest = nla_nest_start(skb, NFTA_FLOWTABLE_HOOK); ---- a/net/netfilter/nft_flow_offload.c -+++ b/net/netfilter/nft_flow_offload.c -@@ -126,6 +126,9 @@ static void nft_flow_offload_eval(const - if (ret < 0) - goto err_flow_add; - -+ if (flowtable->flags & NF_FLOWTABLE_F_HW) -+ nf_flow_offload_hw_add(nft_net(pkt), flow, ct); -+ - dst_release(route.tuple[!dir].dst); - return; - diff --git a/target/linux/generic/pending-4.19/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch b/target/linux/generic/pending-4.19/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch deleted file mode 100644 index 30819d47af..0000000000 --- a/target/linux/generic/pending-4.19/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch +++ /dev/null @@ -1,306 +0,0 @@ -From: Felix Fietkau -Date: Thu, 15 Mar 2018 20:46:31 +0100 -Subject: [PATCH] netfilter: nf_flow_table: support hw offload through - virtual interfaces - -There are hardware offload devices that support offloading VLANs and -PPPoE devices. Additionally, it is useful to be able to offload packets -routed through bridge interfaces as well. -Add support for finding the path to the offload device through these -virtual interfaces, while collecting useful parameters for the offload -device, like VLAN ID/protocol, PPPoE session and Ethernet MAC address. - -Signed-off-by: Felix Fietkau ---- - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -919,6 +919,7 @@ struct dev_ifalias { - }; - - struct flow_offload; -+struct flow_offload_hw_path; - - enum flow_offload_type { - FLOW_OFFLOAD_ADD = 0, -@@ -1157,8 +1158,15 @@ enum flow_offload_type { - * int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh, - * u16 flags); - * -+ * int (*ndo_flow_offload_check)(struct flow_offload_hw_path *path); -+ * For virtual devices like bridges, vlan, and pppoe, fill in the -+ * underlying network device that can be used for offloading connections. -+ * Return an error if offloading is not supported. -+ * - * int (*ndo_flow_offload)(enum flow_offload_type type, -- * struct flow_offload *flow); -+ * struct flow_offload *flow, -+ * struct flow_offload_hw_path *src, -+ * struct flow_offload_hw_path *dest); - * Adds/deletes flow entry to/from net device flowtable. - * - * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier); -@@ -1388,8 +1396,11 @@ struct net_device_ops { - int (*ndo_bridge_dellink)(struct net_device *dev, - struct nlmsghdr *nlh, - u16 flags); -+ int (*ndo_flow_offload_check)(struct flow_offload_hw_path *path); - int (*ndo_flow_offload)(enum flow_offload_type type, -- struct flow_offload *flow); -+ struct flow_offload *flow, -+ struct flow_offload_hw_path *src, -+ struct flow_offload_hw_path *dest); - int (*ndo_change_carrier)(struct net_device *dev, - bool new_carrier); - int (*ndo_get_phys_port_id)(struct net_device *dev, ---- a/include/net/netfilter/nf_flow_table.h -+++ b/include/net/netfilter/nf_flow_table.h -@@ -86,6 +86,21 @@ struct flow_offload { - }; - }; - -+#define FLOW_OFFLOAD_PATH_ETHERNET BIT(0) -+#define FLOW_OFFLOAD_PATH_VLAN BIT(1) -+#define FLOW_OFFLOAD_PATH_PPPOE BIT(2) -+ -+struct flow_offload_hw_path { -+ struct net_device *dev; -+ u32 flags; -+ -+ u8 eth_src[ETH_ALEN]; -+ u8 eth_dest[ETH_ALEN]; -+ u16 vlan_proto; -+ u16 vlan_id; -+ u16 pppoe_sid; -+}; -+ - #define NF_FLOW_TIMEOUT (30 * HZ) - - struct nf_flow_route { ---- a/net/netfilter/nf_flow_table_hw.c -+++ b/net/netfilter/nf_flow_table_hw.c -@@ -19,48 +19,77 @@ struct flow_offload_hw { - enum flow_offload_type type; - struct flow_offload *flow; - struct nf_conn *ct; -- possible_net_t flow_hw_net; -+ -+ struct flow_offload_hw_path src; -+ struct flow_offload_hw_path dest; - }; - --static int do_flow_offload_hw(struct net *net, struct flow_offload *flow, -- int type) -+static void flow_offload_check_ethernet(struct flow_offload_tuple *tuple, -+ struct dst_entry *dst, -+ struct flow_offload_hw_path *path) - { -- struct net_device *indev; -- int ret, ifindex; -+ struct net_device *dev = path->dev; -+ struct neighbour *n; - -- ifindex = flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple.iifidx; -- indev = dev_get_by_index(net, ifindex); -- if (WARN_ON(!indev)) -- return 0; -- -- mutex_lock(&nf_flow_offload_hw_mutex); -- ret = indev->netdev_ops->ndo_flow_offload(type, flow); -- mutex_unlock(&nf_flow_offload_hw_mutex); -+ if (dev->type != ARPHRD_ETHER) -+ return; - -- dev_put(indev); -+ memcpy(path->eth_src, path->dev->dev_addr, ETH_ALEN); -+ n = dst_neigh_lookup(dst, &tuple->src_v4); -+ if (!n) -+ return; - -- return ret; -+ memcpy(path->eth_dest, n->ha, ETH_ALEN); -+ path->flags |= FLOW_OFFLOAD_PATH_ETHERNET; -+ neigh_release(n); - } - --static void flow_offload_hw_work_add(struct flow_offload_hw *offload) -+static int flow_offload_check_path(struct net *net, -+ struct flow_offload_tuple *tuple, -+ struct dst_entry *dst, -+ struct flow_offload_hw_path *path) - { -- struct net *net; -- int ret; -+ struct net_device *dev; - -- if (nf_ct_is_dying(offload->ct)) -- return; -+ dev = dev_get_by_index_rcu(net, tuple->iifidx); -+ if (!dev) -+ return -ENOENT; -+ -+ path->dev = dev; -+ flow_offload_check_ethernet(tuple, dst, path); - -- net = read_pnet(&offload->flow_hw_net); -- ret = do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_ADD); -- if (ret >= 0) -- offload->flow->flags |= FLOW_OFFLOAD_HW; -+ if (dev->netdev_ops->ndo_flow_offload_check) -+ return dev->netdev_ops->ndo_flow_offload_check(path); -+ -+ return 0; - } - --static void flow_offload_hw_work_del(struct flow_offload_hw *offload) -+static int do_flow_offload_hw(struct flow_offload_hw *offload) - { -- struct net *net = read_pnet(&offload->flow_hw_net); -+ struct net_device *src_dev = offload->src.dev; -+ struct net_device *dest_dev = offload->dest.dev; -+ int ret; -+ -+ ret = src_dev->netdev_ops->ndo_flow_offload(offload->type, -+ offload->flow, -+ &offload->src, -+ &offload->dest); -+ -+ /* restore devices in case the driver mangled them */ -+ offload->src.dev = src_dev; -+ offload->dest.dev = dest_dev; - -- do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_DEL); -+ return ret; -+} -+ -+static void flow_offload_hw_free(struct flow_offload_hw *offload) -+{ -+ dev_put(offload->src.dev); -+ dev_put(offload->dest.dev); -+ if (offload->ct) -+ nf_conntrack_put(&offload->ct->ct_general); -+ list_del(&offload->list); -+ kfree(offload); - } - - static void flow_offload_hw_work(struct work_struct *work) -@@ -73,18 +102,22 @@ static void flow_offload_hw_work(struct - spin_unlock_bh(&flow_offload_hw_pending_list_lock); - - list_for_each_entry_safe(offload, next, &hw_offload_pending, list) { -+ mutex_lock(&nf_flow_offload_hw_mutex); - switch (offload->type) { - case FLOW_OFFLOAD_ADD: -- flow_offload_hw_work_add(offload); -+ if (nf_ct_is_dying(offload->ct)) -+ break; -+ -+ if (do_flow_offload_hw(offload) >= 0) -+ offload->flow->flags |= FLOW_OFFLOAD_HW; - break; - case FLOW_OFFLOAD_DEL: -- flow_offload_hw_work_del(offload); -+ do_flow_offload_hw(offload); - break; - } -- if (offload->ct) -- nf_conntrack_put(&offload->ct->ct_general); -- list_del(&offload->list); -- kfree(offload); -+ mutex_unlock(&nf_flow_offload_hw_mutex); -+ -+ flow_offload_hw_free(offload); - } - } - -@@ -97,20 +130,56 @@ static void flow_offload_queue_work(stru - schedule_work(&nf_flow_offload_hw_work); - } - -+static struct flow_offload_hw * -+flow_offload_hw_prepare(struct net *net, struct flow_offload *flow) -+{ -+ struct flow_offload_hw_path src = {}; -+ struct flow_offload_hw_path dest = {}; -+ struct flow_offload_tuple *tuple_s, *tuple_d; -+ struct flow_offload_hw *offload = NULL; -+ -+ rcu_read_lock_bh(); -+ -+ tuple_s = &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].tuple; -+ tuple_d = &flow->tuplehash[FLOW_OFFLOAD_DIR_REPLY].tuple; -+ -+ if (flow_offload_check_path(net, tuple_s, tuple_d->dst_cache, &src)) -+ goto out; -+ -+ if (flow_offload_check_path(net, tuple_d, tuple_s->dst_cache, &dest)) -+ goto out; -+ -+ if (!src.dev->netdev_ops->ndo_flow_offload) -+ goto out; -+ -+ offload = kzalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC); -+ if (!offload) -+ goto out; -+ -+ dev_hold(src.dev); -+ dev_hold(dest.dev); -+ offload->src = src; -+ offload->dest = dest; -+ offload->flow = flow; -+ -+out: -+ rcu_read_unlock_bh(); -+ -+ return offload; -+} -+ - static void flow_offload_hw_add(struct net *net, struct flow_offload *flow, - struct nf_conn *ct) - { - struct flow_offload_hw *offload; - -- offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC); -+ offload = flow_offload_hw_prepare(net, flow); - if (!offload) - return; - - nf_conntrack_get(&ct->ct_general); - offload->type = FLOW_OFFLOAD_ADD; - offload->ct = ct; -- offload->flow = flow; -- write_pnet(&offload->flow_hw_net, net); - - flow_offload_queue_work(offload); - } -@@ -119,14 +188,11 @@ static void flow_offload_hw_del(struct n - { - struct flow_offload_hw *offload; - -- offload = kmalloc(sizeof(struct flow_offload_hw), GFP_ATOMIC); -+ offload = flow_offload_hw_prepare(net, flow); - if (!offload) - return; - - offload->type = FLOW_OFFLOAD_DEL; -- offload->ct = NULL; -- offload->flow = flow; -- write_pnet(&offload->flow_hw_net, net); - - flow_offload_queue_work(offload); - } -@@ -153,12 +219,8 @@ static void __exit nf_flow_table_hw_modu - nf_flow_table_hw_unregister(&flow_offload_hw); - cancel_work_sync(&nf_flow_offload_hw_work); - -- list_for_each_entry_safe(offload, next, &hw_offload_pending, list) { -- if (offload->ct) -- nf_conntrack_put(&offload->ct->ct_general); -- list_del(&offload->list); -- kfree(offload); -- } -+ list_for_each_entry_safe(offload, next, &hw_offload_pending, list) -+ flow_offload_hw_free(offload); - } - - module_init(nf_flow_table_hw_module_init); diff --git a/target/linux/generic/pending-4.19/642-net-8021q-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-4.19/642-net-8021q-support-hardware-flow-table-offload.patch deleted file mode 100644 index 7547c14bed..0000000000 --- a/target/linux/generic/pending-4.19/642-net-8021q-support-hardware-flow-table-offload.patch +++ /dev/null @@ -1,60 +0,0 @@ -From: Felix Fietkau -Date: Thu, 15 Mar 2018 20:49:58 +0100 -Subject: [PATCH] net: 8021q: support hardware flow table offload - -Add the VLAN ID and protocol information - -Signed-off-by: Felix Fietkau ---- - ---- a/net/8021q/vlan_dev.c -+++ b/net/8021q/vlan_dev.c -@@ -32,6 +32,10 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+#include -+#include -+#endif - - #include "vlan.h" - #include "vlanproc.h" -@@ -771,6 +775,27 @@ static int vlan_dev_get_iflink(const str - return real_dev->ifindex; - } - -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+static int vlan_dev_flow_offload_check(struct flow_offload_hw_path *path) -+{ -+ struct net_device *dev = path->dev; -+ struct vlan_dev_priv *vlan = vlan_dev_priv(dev); -+ -+ if (path->flags & FLOW_OFFLOAD_PATH_VLAN) -+ return -EEXIST; -+ -+ path->flags |= FLOW_OFFLOAD_PATH_VLAN; -+ path->vlan_proto = vlan->vlan_proto; -+ path->vlan_id = vlan->vlan_id; -+ path->dev = vlan->real_dev; -+ -+ if (vlan->real_dev->netdev_ops->ndo_flow_offload_check) -+ return vlan->real_dev->netdev_ops->ndo_flow_offload_check(path); -+ -+ return 0; -+} -+#endif /* CONFIG_NF_FLOW_TABLE */ -+ - static const struct ethtool_ops vlan_ethtool_ops = { - .get_link_ksettings = vlan_ethtool_get_link_ksettings, - .get_drvinfo = vlan_ethtool_get_drvinfo, -@@ -808,6 +833,9 @@ static const struct net_device_ops vlan_ - .ndo_fix_features = vlan_dev_fix_features, - .ndo_get_lock_subclass = vlan_dev_get_lock_subclass, - .ndo_get_iflink = vlan_dev_get_iflink, -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+ .ndo_flow_offload_check = vlan_dev_flow_offload_check, -+#endif - }; - - static void vlan_dev_free(struct net_device *dev) diff --git a/target/linux/generic/pending-4.19/643-net-bridge-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-4.19/643-net-bridge-support-hardware-flow-table-offload.patch deleted file mode 100644 index 8b09fabf12..0000000000 --- a/target/linux/generic/pending-4.19/643-net-bridge-support-hardware-flow-table-offload.patch +++ /dev/null @@ -1,61 +0,0 @@ -From: Felix Fietkau -Date: Thu, 15 Mar 2018 20:50:37 +0100 -Subject: [PATCH] net: bridge: support hardware flow table offload - -Look up the real device and pass it on - -Signed-off-by: Felix Fietkau ---- - ---- a/net/bridge/br_device.c -+++ b/net/bridge/br_device.c -@@ -18,6 +18,10 @@ - #include - #include - #include -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+#include -+#include -+#endif - - #include - #include "br_private.h" -@@ -376,6 +380,28 @@ static const struct ethtool_ops br_ethto - .get_link = ethtool_op_get_link, - }; - -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+static int br_flow_offload_check(struct flow_offload_hw_path *path) -+{ -+ struct net_device *dev = path->dev; -+ struct net_bridge *br = netdev_priv(dev); -+ struct net_bridge_fdb_entry *dst; -+ -+ if (!(path->flags & FLOW_OFFLOAD_PATH_ETHERNET)) -+ return -EINVAL; -+ -+ dst = br_fdb_find_rcu(br, path->eth_dest, path->vlan_id); -+ if (!dst || !dst->dst) -+ return -ENOENT; -+ -+ path->dev = dst->dst->dev; -+ if (path->dev->netdev_ops->ndo_flow_offload_check) -+ return path->dev->netdev_ops->ndo_flow_offload_check(path); -+ -+ return 0; -+} -+#endif /* CONFIG_NF_FLOW_TABLE */ -+ - static const struct net_device_ops br_netdev_ops = { - .ndo_open = br_dev_open, - .ndo_stop = br_dev_stop, -@@ -403,6 +429,9 @@ static const struct net_device_ops br_ne - .ndo_bridge_setlink = br_setlink, - .ndo_bridge_dellink = br_dellink, - .ndo_features_check = passthru_features_check, -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+ .ndo_flow_offload_check = br_flow_offload_check, -+#endif - }; - - static struct device_type br_type = { diff --git a/target/linux/generic/pending-4.19/644-net-pppoe-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-4.19/644-net-pppoe-support-hardware-flow-table-offload.patch deleted file mode 100644 index 89fa863aab..0000000000 --- a/target/linux/generic/pending-4.19/644-net-pppoe-support-hardware-flow-table-offload.patch +++ /dev/null @@ -1,125 +0,0 @@ -From: Felix Fietkau -Date: Thu, 15 Mar 2018 21:15:00 +0100 -Subject: [PATCH] net: pppoe: support hardware flow table offload - -Pass on the PPPoE session ID and the remote MAC address - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ppp/ppp_generic.c -+++ b/drivers/net/ppp/ppp_generic.c -@@ -57,6 +57,11 @@ - #include - #include - -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+#include -+#include -+#endif -+ - #define PPP_VERSION "2.4.2" - - /* -@@ -1368,12 +1373,37 @@ static void ppp_dev_priv_destructor(stru - ppp_destroy_interface(ppp); - } - -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+static int ppp_flow_offload_check(struct flow_offload_hw_path *path) -+{ -+ struct ppp *ppp = netdev_priv(path->dev); -+ struct ppp_channel *chan; -+ struct channel *pch; -+ -+ if (ppp->flags & SC_MULTILINK) -+ return -EOPNOTSUPP; -+ -+ if (list_empty(&ppp->channels)) -+ return -ENODEV; -+ -+ pch = list_first_entry(&ppp->channels, struct channel, clist); -+ chan = pch->chan; -+ if (!chan->ops->flow_offload_check) -+ return -EOPNOTSUPP; -+ -+ return chan->ops->flow_offload_check(chan, path); -+} -+#endif /* CONFIG_NF_FLOW_TABLE */ -+ - static const struct net_device_ops ppp_netdev_ops = { - .ndo_init = ppp_dev_init, - .ndo_uninit = ppp_dev_uninit, - .ndo_start_xmit = ppp_start_xmit, - .ndo_do_ioctl = ppp_net_ioctl, - .ndo_get_stats64 = ppp_get_stats64, -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+ .ndo_flow_offload_check = ppp_flow_offload_check, -+#endif - }; - - static struct device_type ppp_type = { ---- a/drivers/net/ppp/pppoe.c -+++ b/drivers/net/ppp/pppoe.c -@@ -78,6 +78,11 @@ - #include - #include - -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+#include -+#include -+#endif -+ - #include - #include - #include -@@ -979,8 +984,36 @@ static int pppoe_xmit(struct ppp_channel - return __pppoe_xmit(sk, skb); - } - -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+static int pppoe_flow_offload_check(struct ppp_channel *chan, -+ struct flow_offload_hw_path *path) -+{ -+ struct sock *sk = (struct sock *)chan->private; -+ struct pppox_sock *po = pppox_sk(sk); -+ struct net_device *dev = po->pppoe_dev; -+ -+ if (sock_flag(sk, SOCK_DEAD) || -+ !(sk->sk_state & PPPOX_CONNECTED) || !dev) -+ return -ENODEV; -+ -+ path->dev = po->pppoe_dev; -+ path->flags |= FLOW_OFFLOAD_PATH_PPPOE; -+ memcpy(path->eth_src, po->pppoe_dev->dev_addr, ETH_ALEN); -+ memcpy(path->eth_dest, po->pppoe_pa.remote, ETH_ALEN); -+ path->pppoe_sid = be16_to_cpu(po->num); -+ -+ if (path->dev->netdev_ops->ndo_flow_offload_check) -+ return path->dev->netdev_ops->ndo_flow_offload_check(path); -+ -+ return 0; -+} -+#endif /* CONFIG_NF_FLOW_TABLE */ -+ - static const struct ppp_channel_ops pppoe_chan_ops = { - .start_xmit = pppoe_xmit, -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+ .flow_offload_check = pppoe_flow_offload_check, -+#endif - }; - - static int pppoe_recvmsg(struct socket *sock, struct msghdr *m, ---- a/include/linux/ppp_channel.h -+++ b/include/linux/ppp_channel.h -@@ -32,6 +32,10 @@ struct ppp_channel_ops { - int (*start_xmit)(struct ppp_channel *, struct sk_buff *); - /* Handle an ioctl call that has come in via /dev/ppp. */ - int (*ioctl)(struct ppp_channel *, unsigned int, unsigned long); -+ -+#if IS_ENABLED(CONFIG_NF_FLOW_TABLE) -+ int (*flow_offload_check)(struct ppp_channel *, struct flow_offload_hw_path *); -+#endif - }; - - struct ppp_channel { diff --git a/target/linux/generic/pending-4.19/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch b/target/linux/generic/pending-4.19/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch deleted file mode 100644 index bfb7a9c190..0000000000 --- a/target/linux/generic/pending-4.19/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch +++ /dev/null @@ -1,37 +0,0 @@ -From: Felix Fietkau -Date: Sun, 25 Mar 2018 21:10:55 +0200 -Subject: [PATCH] netfilter: nf_flow_table: rework hardware offload timeout - handling - -Some offload implementations send keepalive packets + explicit -notifications of TCP FIN/RST packets. In this case it is more convenient -to simply let the driver update flow->timeout handling and use the -regular flow offload gc step. - -For drivers that manage their own lifetime, a separate flag can be set -to avoid gc timeouts. - -Signed-off-by: Felix Fietkau ---- - ---- a/include/net/netfilter/nf_flow_table.h -+++ b/include/net/netfilter/nf_flow_table.h -@@ -76,6 +76,7 @@ struct flow_offload_tuple_rhash { - #define FLOW_OFFLOAD_DYING 0x4 - #define FLOW_OFFLOAD_TEARDOWN 0x8 - #define FLOW_OFFLOAD_HW 0x10 -+#define FLOW_OFFLOAD_KEEP 0x20 - - struct flow_offload { - struct flow_offload_tuple_rhash tuplehash[FLOW_OFFLOAD_DIR_MAX]; ---- a/net/netfilter/nf_flow_table_core.c -+++ b/net/netfilter/nf_flow_table_core.c -@@ -368,7 +368,7 @@ static int nf_flow_offload_gc_step(struc - if (!teardown) - nf_ct_offload_timeout(flow); - -- if (nf_flow_in_hw(flow) && !teardown) -+ if ((flow->flags & FLOW_OFFLOAD_KEEP) && !teardown) - continue; - - if (nf_flow_has_expired(flow) || teardown) diff --git a/target/linux/generic/pending-4.19/646-netfilter-nf_flow_table-rework-private-driver-data.patch b/target/linux/generic/pending-4.19/646-netfilter-nf_flow_table-rework-private-driver-data.patch deleted file mode 100644 index f94d7ad301..0000000000 --- a/target/linux/generic/pending-4.19/646-netfilter-nf_flow_table-rework-private-driver-data.patch +++ /dev/null @@ -1,25 +0,0 @@ -From: Felix Fietkau -Date: Fri, 27 Apr 2018 14:42:14 +0200 -Subject: [PATCH] netfilter: nf_flow_table: rework private driver data - -Move the timeout out of the union, since it can be shared between the -driver and the stack. Add a private pointer that the driver can use to -point to its own data structures - -Signed-off-by: Felix Fietkau ---- - ---- a/include/net/netfilter/nf_flow_table.h -+++ b/include/net/netfilter/nf_flow_table.h -@@ -81,9 +81,10 @@ struct flow_offload_tuple_rhash { - struct flow_offload { - struct flow_offload_tuple_rhash tuplehash[FLOW_OFFLOAD_DIR_MAX]; - u32 flags; -+ u32 timeout; - union { - /* Your private driver data here. */ -- u32 timeout; -+ void *priv; - }; - }; - diff --git a/target/linux/generic/pending-4.19/655-increase_skb_pad.patch b/target/linux/generic/pending-4.19/655-increase_skb_pad.patch deleted file mode 100644 index 94e325b0cc..0000000000 --- a/target/linux/generic/pending-4.19/655-increase_skb_pad.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Felix Fietkau -Subject: kernel: add a few patches for avoiding unnecessary skb reallocations - significantly improves ethernet<->wireless performance - -lede-commit: 6f89cffc9add6939d44a6b54cf9a5e77849aa7fd -Signed-off-by: Felix Fietkau ---- - include/linux/skbuff.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -2511,7 +2511,7 @@ static inline int pskb_network_may_pull( - * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) - */ - #ifndef NET_SKB_PAD --#define NET_SKB_PAD max(32, L1_CACHE_BYTES) -+#define NET_SKB_PAD max(64, L1_CACHE_BYTES) - #endif - - int ___pskb_trim(struct sk_buff *skb, unsigned int len); diff --git a/target/linux/generic/pending-4.19/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-4.19/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch deleted file mode 100644 index 8b7594e9cf..0000000000 --- a/target/linux/generic/pending-4.19/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch +++ /dev/null @@ -1,500 +0,0 @@ -From: Steven Barth -Subject: Add support for MAP-E FMRs (mesh mode) - -MAP-E FMRs (draft-ietf-softwire-map-10) are rules for IPv4-communication -between MAP CEs (mesh mode) without the need to forward such data to a -border relay. This is similar to how 6rd works but for IPv4 over IPv6. - -Signed-off-by: Steven Barth ---- - include/net/ip6_tunnel.h | 13 ++ - include/uapi/linux/if_tunnel.h | 13 ++ - net/ipv6/ip6_tunnel.c | 276 +++++++++++++++++++++++++++++++++++++++-- - 3 files changed, 291 insertions(+), 11 deletions(-) - ---- a/include/net/ip6_tunnel.h -+++ b/include/net/ip6_tunnel.h -@@ -18,6 +18,18 @@ - /* determine capability on a per-packet basis */ - #define IP6_TNL_F_CAP_PER_PACKET 0x40000 - -+/* IPv6 tunnel FMR */ -+struct __ip6_tnl_fmr { -+ struct __ip6_tnl_fmr *next; /* next fmr in list */ -+ struct in6_addr ip6_prefix; -+ struct in_addr ip4_prefix; -+ -+ __u8 ip6_prefix_len; -+ __u8 ip4_prefix_len; -+ __u8 ea_len; -+ __u8 offset; -+}; -+ - struct __ip6_tnl_parm { - char name[IFNAMSIZ]; /* name of tunnel device */ - int link; /* ifindex of underlying L2 interface */ -@@ -29,6 +41,7 @@ struct __ip6_tnl_parm { - __u32 flags; /* tunnel flags */ - struct in6_addr laddr; /* local tunnel end-point address */ - struct in6_addr raddr; /* remote tunnel end-point address */ -+ struct __ip6_tnl_fmr *fmrs; /* FMRs */ - - __be16 i_flags; - __be16 o_flags; ---- a/include/uapi/linux/if_tunnel.h -+++ b/include/uapi/linux/if_tunnel.h -@@ -77,10 +77,23 @@ enum { - IFLA_IPTUN_ENCAP_DPORT, - IFLA_IPTUN_COLLECT_METADATA, - IFLA_IPTUN_FWMARK, -+ IFLA_IPTUN_FMRS, - __IFLA_IPTUN_MAX, - }; - #define IFLA_IPTUN_MAX (__IFLA_IPTUN_MAX - 1) - -+enum { -+ IFLA_IPTUN_FMR_UNSPEC, -+ IFLA_IPTUN_FMR_IP6_PREFIX, -+ IFLA_IPTUN_FMR_IP4_PREFIX, -+ IFLA_IPTUN_FMR_IP6_PREFIX_LEN, -+ IFLA_IPTUN_FMR_IP4_PREFIX_LEN, -+ IFLA_IPTUN_FMR_EA_LEN, -+ IFLA_IPTUN_FMR_OFFSET, -+ __IFLA_IPTUN_FMR_MAX, -+}; -+#define IFLA_IPTUN_FMR_MAX (__IFLA_IPTUN_FMR_MAX - 1) -+ - enum tunnel_encap_types { - TUNNEL_ENCAP_NONE, - TUNNEL_ENCAP_FOU, ---- a/net/ipv6/ip6_tunnel.c -+++ b/net/ipv6/ip6_tunnel.c -@@ -16,6 +16,8 @@ - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * -+ * Changes: -+ * Steven Barth : MAP-E FMR support - */ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -@@ -72,9 +74,9 @@ static bool log_ecn_error = true; - module_param(log_ecn_error, bool, 0644); - MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN"); - --static u32 HASH(const struct in6_addr *addr1, const struct in6_addr *addr2) -+static u32 HASH(const struct in6_addr *addr) - { -- u32 hash = ipv6_addr_hash(addr1) ^ ipv6_addr_hash(addr2); -+ u32 hash = ipv6_addr_hash(addr); - - return hash_32(hash, IP6_TUNNEL_HASH_SIZE_SHIFT); - } -@@ -141,20 +143,29 @@ static struct net_device_stats *ip6_get_ - static struct ip6_tnl * - ip6_tnl_lookup(struct net *net, const struct in6_addr *remote, const struct in6_addr *local) - { -- unsigned int hash = HASH(remote, local); -+ unsigned int hash = HASH(local); - struct ip6_tnl *t; - struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); - struct in6_addr any; -+ struct __ip6_tnl_fmr *fmr; - - for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { -- if (ipv6_addr_equal(local, &t->parms.laddr) && -- ipv6_addr_equal(remote, &t->parms.raddr) && -- (t->dev->flags & IFF_UP)) -+ if (!ipv6_addr_equal(local, &t->parms.laddr) || -+ !(t->dev->flags & IFF_UP)) -+ continue; -+ -+ if (ipv6_addr_equal(remote, &t->parms.raddr)) - return t; -+ -+ for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) { -+ if (ipv6_prefix_equal(remote, &fmr->ip6_prefix, -+ fmr->ip6_prefix_len)) -+ return t; -+ } - } - - memset(&any, 0, sizeof(any)); -- hash = HASH(&any, local); -+ hash = HASH(local); - for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { - if (ipv6_addr_equal(local, &t->parms.laddr) && - ipv6_addr_any(&t->parms.raddr) && -@@ -162,7 +173,7 @@ ip6_tnl_lookup(struct net *net, const st - return t; - } - -- hash = HASH(remote, &any); -+ hash = HASH(&any); - for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { - if (ipv6_addr_equal(remote, &t->parms.raddr) && - ipv6_addr_any(&t->parms.laddr) && -@@ -202,7 +213,7 @@ ip6_tnl_bucket(struct ip6_tnl_net *ip6n, - - if (!ipv6_addr_any(remote) || !ipv6_addr_any(local)) { - prio = 1; -- h = HASH(remote, local); -+ h = HASH(local); - } - return &ip6n->tnls[prio][h]; - } -@@ -383,6 +394,12 @@ ip6_tnl_dev_uninit(struct net_device *de - struct net *net = t->net; - struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); - -+ while (t->parms.fmrs) { -+ struct __ip6_tnl_fmr *next = t->parms.fmrs->next; -+ kfree(t->parms.fmrs); -+ t->parms.fmrs = next; -+ } -+ - if (dev == ip6n->fb_tnl_dev) - RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL); - else -@@ -772,6 +789,107 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t, - } - EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl); - -+/** -+ * ip4ip6_fmr_calc - calculate target / source IPv6-address based on FMR -+ * @dest: destination IPv6 address buffer -+ * @skb: received socket buffer -+ * @fmr: MAP FMR -+ * @xmit: Calculate for xmit or rcv -+ **/ -+static void ip4ip6_fmr_calc(struct in6_addr *dest, -+ const struct iphdr *iph, const uint8_t *end, -+ const struct __ip6_tnl_fmr *fmr, bool xmit) -+{ -+ int psidlen = fmr->ea_len - (32 - fmr->ip4_prefix_len); -+ u8 *portp = NULL; -+ bool use_dest_addr; -+ const struct iphdr *dsth = iph; -+ -+ if ((u8*)dsth >= end) -+ return; -+ -+ /* find significant IP header */ -+ if (iph->protocol == IPPROTO_ICMP) { -+ struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4); -+ if (ih && ((u8*)&ih[1]) <= end && ( -+ ih->type == ICMP_DEST_UNREACH || -+ ih->type == ICMP_SOURCE_QUENCH || -+ ih->type == ICMP_TIME_EXCEEDED || -+ ih->type == ICMP_PARAMETERPROB || -+ ih->type == ICMP_REDIRECT)) -+ dsth = (const struct iphdr*)&ih[1]; -+ } -+ -+ /* in xmit-path use dest port by default and source port only if -+ this is an ICMP reply to something else; vice versa in rcv-path */ -+ use_dest_addr = (xmit && dsth == iph) || (!xmit && dsth != iph); -+ -+ /* get dst port */ -+ if (((u8*)&dsth[1]) <= end && ( -+ dsth->protocol == IPPROTO_UDP || -+ dsth->protocol == IPPROTO_TCP || -+ dsth->protocol == IPPROTO_SCTP || -+ dsth->protocol == IPPROTO_DCCP)) { -+ /* for UDP, TCP, SCTP and DCCP source and dest port -+ follow IPv4 header directly */ -+ portp = ((u8*)dsth) + dsth->ihl * 4; -+ -+ if (use_dest_addr) -+ portp += sizeof(u16); -+ } else if (iph->protocol == IPPROTO_ICMP) { -+ struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4); -+ -+ /* use icmp identifier as port */ -+ if (((u8*)&ih) <= end && ( -+ (use_dest_addr && ( -+ ih->type == ICMP_ECHOREPLY || -+ ih->type == ICMP_TIMESTAMPREPLY || -+ ih->type == ICMP_INFO_REPLY || -+ ih->type == ICMP_ADDRESSREPLY)) || -+ (!use_dest_addr && ( -+ ih->type == ICMP_ECHO || -+ ih->type == ICMP_TIMESTAMP || -+ ih->type == ICMP_INFO_REQUEST || -+ ih->type == ICMP_ADDRESS) -+ ))) -+ portp = (u8*)&ih->un.echo.id; -+ } -+ -+ if ((portp && &portp[2] <= end) || psidlen == 0) { -+ int frombyte = fmr->ip6_prefix_len / 8; -+ int fromrem = fmr->ip6_prefix_len % 8; -+ int bytes = sizeof(struct in6_addr) - frombyte; -+ const u32 *addr = (use_dest_addr) ? &iph->daddr : &iph->saddr; -+ u64 eabits = ((u64)ntohl(*addr)) << (32 + fmr->ip4_prefix_len); -+ u64 t = 0; -+ -+ /* extract PSID from port and add it to eabits */ -+ u16 psidbits = 0; -+ if (psidlen > 0) { -+ psidbits = ((u16)portp[0]) << 8 | ((u16)portp[1]); -+ psidbits >>= 16 - psidlen - fmr->offset; -+ psidbits = (u16)(psidbits << (16 - psidlen)); -+ eabits |= ((u64)psidbits) << (48 - (fmr->ea_len - psidlen)); -+ } -+ -+ /* rewrite destination address */ -+ *dest = fmr->ip6_prefix; -+ memcpy(&dest->s6_addr[10], addr, sizeof(*addr)); -+ dest->s6_addr16[7] = htons(psidbits >> (16 - psidlen)); -+ -+ if (bytes > sizeof(u64)) -+ bytes = sizeof(u64); -+ -+ /* insert eabits */ -+ memcpy(&t, &dest->s6_addr[frombyte], bytes); -+ t = be64_to_cpu(t) & ~(((((u64)1) << fmr->ea_len) - 1) -+ << (64 - fmr->ea_len - fromrem)); -+ t = cpu_to_be64(t | (eabits >> fromrem)); -+ memcpy(&dest->s6_addr[frombyte], &t, bytes); -+ } -+} -+ -+ - static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb, - const struct tnl_ptk_info *tpi, - struct metadata_dst *tun_dst, -@@ -824,6 +942,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl - skb_reset_network_header(skb); - memset(skb->cb, 0, sizeof(struct inet6_skb_parm)); - -+ if (tpi->proto == htons(ETH_P_IP) && tunnel->parms.fmrs && -+ !ipv6_addr_equal(&ipv6h->saddr, &tunnel->parms.raddr)) { -+ /* Packet didn't come from BR, so lookup FMR */ -+ struct __ip6_tnl_fmr *fmr; -+ struct in6_addr expected = tunnel->parms.raddr; -+ for (fmr = tunnel->parms.fmrs; fmr; fmr = fmr->next) -+ if (ipv6_prefix_equal(&ipv6h->saddr, -+ &fmr->ip6_prefix, fmr->ip6_prefix_len)) -+ break; -+ -+ /* Check that IPv6 matches IPv4 source to prevent spoofing */ -+ if (fmr) -+ ip4ip6_fmr_calc(&expected, ip_hdr(skb), -+ skb_tail_pointer(skb), fmr, false); -+ -+ if (!ipv6_addr_equal(&ipv6h->saddr, &expected)) { -+ rcu_read_unlock(); -+ goto drop; -+ } -+ } -+ - __skb_tunnel_rx(skb, tunnel->dev, tunnel->net); - - err = dscp_ecn_decapsulate(tunnel, ipv6h, skb); -@@ -956,6 +1095,7 @@ static void init_tel_txopt(struct ipv6_t - opt->ops.opt_nflen = 8; - } - -+ - /** - * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own - * @t: the outgoing tunnel device -@@ -1308,6 +1448,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str - { - struct ip6_tnl *t = netdev_priv(dev); - struct ipv6hdr *ipv6h; -+ struct __ip6_tnl_fmr *fmr; - int encap_limit = -1; - __u16 offset; - struct flowi6 fl6; -@@ -1373,6 +1514,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str - fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL); - dsfield = INET_ECN_encapsulate(dsfield, ipv6_get_dsfield(ipv6h)); - -+ /* try to find matching FMR */ -+ for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) { -+ unsigned mshift = 32 - fmr->ip4_prefix_len; -+ if (ntohl(fmr->ip4_prefix.s_addr) >> mshift == -+ ntohl(ip_hdr(skb)->daddr) >> mshift) -+ break; -+ } -+ -+ /* change dstaddr according to FMR */ -+ if (fmr) -+ ip4ip6_fmr_calc(&fl6.daddr, ip_hdr(skb), skb_tail_pointer(skb), fmr, true); -+ - if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6)) - return -1; - -@@ -1502,6 +1655,14 @@ ip6_tnl_change(struct ip6_tnl *t, const - t->parms.link = p->link; - t->parms.proto = p->proto; - t->parms.fwmark = p->fwmark; -+ -+ while (t->parms.fmrs) { -+ struct __ip6_tnl_fmr *next = t->parms.fmrs->next; -+ kfree(t->parms.fmrs); -+ t->parms.fmrs = next; -+ } -+ t->parms.fmrs = p->fmrs; -+ - dst_cache_reset(&t->dst_cache); - ip6_tnl_link_config(t); - return 0; -@@ -1540,6 +1701,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ - p->flowinfo = u->flowinfo; - p->link = u->link; - p->proto = u->proto; -+ p->fmrs = NULL; - memcpy(p->name, u->name, sizeof(u->name)); - } - -@@ -1924,6 +2086,15 @@ static int ip6_tnl_validate(struct nlatt - return 0; - } - -+static const struct nla_policy ip6_tnl_fmr_policy[IFLA_IPTUN_FMR_MAX + 1] = { -+ [IFLA_IPTUN_FMR_IP6_PREFIX] = { .len = sizeof(struct in6_addr) }, -+ [IFLA_IPTUN_FMR_IP4_PREFIX] = { .len = sizeof(struct in_addr) }, -+ [IFLA_IPTUN_FMR_IP6_PREFIX_LEN] = { .type = NLA_U8 }, -+ [IFLA_IPTUN_FMR_IP4_PREFIX_LEN] = { .type = NLA_U8 }, -+ [IFLA_IPTUN_FMR_EA_LEN] = { .type = NLA_U8 }, -+ [IFLA_IPTUN_FMR_OFFSET] = { .type = NLA_U8 } -+}; -+ - static void ip6_tnl_netlink_parms(struct nlattr *data[], - struct __ip6_tnl_parm *parms) - { -@@ -1961,6 +2132,46 @@ static void ip6_tnl_netlink_parms(struct - - if (data[IFLA_IPTUN_FWMARK]) - parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]); -+ -+ if (data[IFLA_IPTUN_FMRS]) { -+ unsigned rem; -+ struct nlattr *fmr; -+ nla_for_each_nested(fmr, data[IFLA_IPTUN_FMRS], rem) { -+ struct nlattr *fmrd[IFLA_IPTUN_FMR_MAX + 1], *c; -+ struct __ip6_tnl_fmr *nfmr; -+ -+ nla_parse_nested(fmrd, IFLA_IPTUN_FMR_MAX, -+ fmr, ip6_tnl_fmr_policy, NULL); -+ -+ if (!(nfmr = kzalloc(sizeof(*nfmr), GFP_KERNEL))) -+ continue; -+ -+ nfmr->offset = 6; -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX])) -+ nla_memcpy(&nfmr->ip6_prefix, fmrd[IFLA_IPTUN_FMR_IP6_PREFIX], -+ sizeof(nfmr->ip6_prefix)); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX])) -+ nla_memcpy(&nfmr->ip4_prefix, fmrd[IFLA_IPTUN_FMR_IP4_PREFIX], -+ sizeof(nfmr->ip4_prefix)); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX_LEN])) -+ nfmr->ip6_prefix_len = nla_get_u8(c); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX_LEN])) -+ nfmr->ip4_prefix_len = nla_get_u8(c); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_EA_LEN])) -+ nfmr->ea_len = nla_get_u8(c); -+ -+ if ((c = fmrd[IFLA_IPTUN_FMR_OFFSET])) -+ nfmr->offset = nla_get_u8(c); -+ -+ nfmr->next = parms->fmrs; -+ parms->fmrs = nfmr; -+ } -+ } - } - - static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[], -@@ -2076,6 +2287,12 @@ static void ip6_tnl_dellink(struct net_d - - static size_t ip6_tnl_get_size(const struct net_device *dev) - { -+ const struct ip6_tnl *t = netdev_priv(dev); -+ struct __ip6_tnl_fmr *c; -+ int fmrs = 0; -+ for (c = t->parms.fmrs; c; c = c->next) -+ ++fmrs; -+ - return - /* IFLA_IPTUN_LINK */ - nla_total_size(4) + -@@ -2105,6 +2322,24 @@ static size_t ip6_tnl_get_size(const str - nla_total_size(0) + - /* IFLA_IPTUN_FWMARK */ - nla_total_size(4) + -+ /* IFLA_IPTUN_FMRS */ -+ nla_total_size(0) + -+ ( -+ /* nest */ -+ nla_total_size(0) + -+ /* IFLA_IPTUN_FMR_IP6_PREFIX */ -+ nla_total_size(sizeof(struct in6_addr)) + -+ /* IFLA_IPTUN_FMR_IP4_PREFIX */ -+ nla_total_size(sizeof(struct in_addr)) + -+ /* IFLA_IPTUN_FMR_EA_LEN */ -+ nla_total_size(1) + -+ /* IFLA_IPTUN_FMR_IP6_PREFIX_LEN */ -+ nla_total_size(1) + -+ /* IFLA_IPTUN_FMR_IP4_PREFIX_LEN */ -+ nla_total_size(1) + -+ /* IFLA_IPTUN_FMR_OFFSET */ -+ nla_total_size(1) -+ ) * fmrs + - 0; - } - -@@ -2112,6 +2347,9 @@ static int ip6_tnl_fill_info(struct sk_b - { - struct ip6_tnl *tunnel = netdev_priv(dev); - struct __ip6_tnl_parm *parm = &tunnel->parms; -+ struct __ip6_tnl_fmr *c; -+ int fmrcnt = 0; -+ struct nlattr *fmrs; - - if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) || - nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) || -@@ -2121,9 +2359,27 @@ static int ip6_tnl_fill_info(struct sk_b - nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) || - nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) || - nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) || -- nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark)) -+ nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark) || -+ !(fmrs = nla_nest_start(skb, IFLA_IPTUN_FMRS))) - goto nla_put_failure; - -+ for (c = parm->fmrs; c; c = c->next) { -+ struct nlattr *fmr = nla_nest_start(skb, ++fmrcnt); -+ if (!fmr || -+ nla_put(skb, IFLA_IPTUN_FMR_IP6_PREFIX, -+ sizeof(c->ip6_prefix), &c->ip6_prefix) || -+ nla_put(skb, IFLA_IPTUN_FMR_IP4_PREFIX, -+ sizeof(c->ip4_prefix), &c->ip4_prefix) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_IP6_PREFIX_LEN, c->ip6_prefix_len) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_IP4_PREFIX_LEN, c->ip4_prefix_len) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_EA_LEN, c->ea_len) || -+ nla_put_u8(skb, IFLA_IPTUN_FMR_OFFSET, c->offset)) -+ goto nla_put_failure; -+ -+ nla_nest_end(skb, fmr); -+ } -+ nla_nest_end(skb, fmrs); -+ - if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) || - nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) || - nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) || -@@ -2163,6 +2419,7 @@ static const struct nla_policy ip6_tnl_p - [IFLA_IPTUN_ENCAP_DPORT] = { .type = NLA_U16 }, - [IFLA_IPTUN_COLLECT_METADATA] = { .type = NLA_FLAG }, - [IFLA_IPTUN_FWMARK] = { .type = NLA_U32 }, -+ [IFLA_IPTUN_FMRS] = { .type = NLA_NESTED }, - }; - - static struct rtnl_link_ops ip6_link_ops __read_mostly = { diff --git a/target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch deleted file mode 100644 index d8c439b993..0000000000 --- a/target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ /dev/null @@ -1,247 +0,0 @@ -From: Jonas Gorski -Subject: ipv6: allow rejecting with "source address failed policy" - -RFC6204 L-14 requires rejecting traffic from invalid addresses with -ICMPv6 Destination Unreachable, Code 5 (Source address failed ingress/ -egress policy) on the LAN side, so add an appropriate rule for that. - -Signed-off-by: Jonas Gorski ---- - include/net/netns/ipv6.h | 1 + - include/uapi/linux/fib_rules.h | 4 +++ - include/uapi/linux/rtnetlink.h | 1 + - net/ipv4/fib_semantics.c | 4 +++ - net/ipv4/fib_trie.c | 1 + - net/ipv4/ipmr.c | 1 + - net/ipv6/fib6_rules.c | 4 +++ - net/ipv6/ip6mr.c | 2 ++ - net/ipv6/route.c | 58 +++++++++++++++++++++++++++++++++++++++++- - 9 files changed, 75 insertions(+), 1 deletion(-) - ---- a/include/net/netns/ipv6.h -+++ b/include/net/netns/ipv6.h -@@ -78,6 +78,7 @@ struct netns_ipv6 { - unsigned int fib6_rules_require_fldissect; - bool fib6_has_custom_rules; - struct rt6_info *ip6_prohibit_entry; -+ struct rt6_info *ip6_policy_failed_entry; - struct rt6_info *ip6_blk_hole_entry; - struct fib6_table *fib6_local_tbl; - struct fib_rules_ops *fib6_rules_ops; ---- a/include/uapi/linux/fib_rules.h -+++ b/include/uapi/linux/fib_rules.h -@@ -82,6 +82,10 @@ enum { - FR_ACT_BLACKHOLE, /* Drop without notification */ - FR_ACT_UNREACHABLE, /* Drop with ENETUNREACH */ - FR_ACT_PROHIBIT, /* Drop with EACCES */ -+ FR_ACT_RES9, -+ FR_ACT_RES10, -+ FR_ACT_RES11, -+ FR_ACT_POLICY_FAILED, /* Drop with EACCES */ - __FR_ACT_MAX, - }; - ---- a/include/uapi/linux/rtnetlink.h -+++ b/include/uapi/linux/rtnetlink.h -@@ -228,6 +228,7 @@ enum { - RTN_THROW, /* Not in this table */ - RTN_NAT, /* Translate this address */ - RTN_XRESOLVE, /* Use external resolver */ -+ RTN_POLICY_FAILED, /* Failed ingress/egress policy */ - __RTN_MAX - }; - ---- a/net/ipv4/fib_semantics.c -+++ b/net/ipv4/fib_semantics.c -@@ -139,6 +139,10 @@ const struct fib_prop fib_props[RTN_MAX - .error = -EINVAL, - .scope = RT_SCOPE_NOWHERE, - }, -+ [RTN_POLICY_FAILED] = { -+ .error = -EACCES, -+ .scope = RT_SCOPE_UNIVERSE, -+ }, - }; - - static void rt_fibinfo_free(struct rtable __rcu **rtp) ---- a/net/ipv4/fib_trie.c -+++ b/net/ipv4/fib_trie.c -@@ -2477,6 +2477,7 @@ static const char *const rtn_type_names[ - [RTN_THROW] = "THROW", - [RTN_NAT] = "NAT", - [RTN_XRESOLVE] = "XRESOLVE", -+ [RTN_POLICY_FAILED] = "POLICY_FAILED", - }; - - static inline const char *rtn_type(char *buf, size_t len, unsigned int t) ---- a/net/ipv4/ipmr.c -+++ b/net/ipv4/ipmr.c -@@ -179,6 +179,7 @@ static int ipmr_rule_action(struct fib_r - case FR_ACT_UNREACHABLE: - return -ENETUNREACH; - case FR_ACT_PROHIBIT: -+ case FR_ACT_POLICY_FAILED: - return -EACCES; - case FR_ACT_BLACKHOLE: - default: ---- a/net/ipv6/fib6_rules.c -+++ b/net/ipv6/fib6_rules.c -@@ -221,6 +221,10 @@ static int __fib6_rule_action(struct fib - err = -EACCES; - rt = net->ipv6.ip6_prohibit_entry; - goto discard_pkt; -+ case FR_ACT_POLICY_FAILED: -+ err = -EACCES; -+ rt = net->ipv6.ip6_policy_failed_entry; -+ goto discard_pkt; - } - - tb_id = fib_rule_get_table(rule, arg); ---- a/net/ipv6/ip6mr.c -+++ b/net/ipv6/ip6mr.c -@@ -162,6 +162,8 @@ static int ip6mr_rule_action(struct fib_ - return -ENETUNREACH; - case FR_ACT_PROHIBIT: - return -EACCES; -+ case FR_ACT_POLICY_FAILED: -+ return -EACCES; - case FR_ACT_BLACKHOLE: - default: - return -EINVAL; ---- a/net/ipv6/route.c -+++ b/net/ipv6/route.c -@@ -97,6 +97,8 @@ static int ip6_pkt_discard(struct sk_bu - static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb); - static int ip6_pkt_prohibit(struct sk_buff *skb); - static int ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb); -+static int ip6_pkt_policy_failed(struct sk_buff *skb); -+static int ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb); - static void ip6_link_failure(struct sk_buff *skb); - static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk, - struct sk_buff *skb, u32 mtu, -@@ -328,6 +330,18 @@ static const struct rt6_info ip6_prohibi - .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), - }; - -+static const struct rt6_info ip6_policy_failed_entry_template = { -+ .dst = { -+ .__refcnt = ATOMIC_INIT(1), -+ .__use = 1, -+ .obsolete = DST_OBSOLETE_FORCE_CHK, -+ .error = -EACCES, -+ .input = ip6_pkt_policy_failed, -+ .output = ip6_pkt_policy_failed_out, -+ }, -+ .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), -+}; -+ - static const struct rt6_info ip6_blk_hole_entry_template = { - .dst = { - .__refcnt = ATOMIC_INIT(1), -@@ -906,6 +920,7 @@ static const int fib6_prop[RTN_MAX + 1] - [RTN_BLACKHOLE] = -EINVAL, - [RTN_UNREACHABLE] = -EHOSTUNREACH, - [RTN_PROHIBIT] = -EACCES, -+ [RTN_POLICY_FAILED] = -EACCES, - [RTN_THROW] = -EAGAIN, - [RTN_NAT] = -EINVAL, - [RTN_XRESOLVE] = -EINVAL, -@@ -943,6 +958,10 @@ static void ip6_rt_init_dst_reject(struc - rt->dst.output = ip6_pkt_prohibit_out; - rt->dst.input = ip6_pkt_prohibit; - break; -+ case RTN_POLICY_FAILED: -+ rt->dst.output = ip6_pkt_policy_failed_out; -+ rt->dst.input = ip6_pkt_policy_failed; -+ break; - case RTN_THROW: - case RTN_UNREACHABLE: - default: -@@ -3791,6 +3810,17 @@ static int ip6_pkt_prohibit_out(struct n - return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); - } - -+static int ip6_pkt_policy_failed(struct sk_buff *skb) -+{ -+ return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_INNOROUTES); -+} -+ -+static int ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb) -+{ -+ skb->dev = skb_dst(skb)->dev; -+ return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_OUTNOROUTES); -+} -+ - /* - * Allocate a dst for local (unicast / anycast) address. - */ -@@ -4238,7 +4268,8 @@ static int rtm_to_fib6_config(struct sk_ - if (rtm->rtm_type == RTN_UNREACHABLE || - rtm->rtm_type == RTN_BLACKHOLE || - rtm->rtm_type == RTN_PROHIBIT || -- rtm->rtm_type == RTN_THROW) -+ rtm->rtm_type == RTN_THROW || -+ rtm->rtm_type == RTN_POLICY_FAILED) - cfg->fc_flags |= RTF_REJECT; - - if (rtm->rtm_type == RTN_LOCAL) -@@ -5087,6 +5118,8 @@ static int ip6_route_dev_notify(struct n - #ifdef CONFIG_IPV6_MULTIPLE_TABLES - net->ipv6.ip6_prohibit_entry->dst.dev = dev; - net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); -+ net->ipv6.ip6_policy_failed_entry->dst.dev = dev; -+ net->ipv6.ip6_policy_failed_entry->rt6i_idev = in6_dev_get(dev); - net->ipv6.ip6_blk_hole_entry->dst.dev = dev; - net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); - #endif -@@ -5098,6 +5131,7 @@ static int ip6_route_dev_notify(struct n - in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); - #ifdef CONFIG_IPV6_MULTIPLE_TABLES - in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); -+ in6_dev_put_clear(&net->ipv6.ip6_policy_failed_entry->rt6i_idev); - in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); - #endif - } -@@ -5292,6 +5326,15 @@ static int __net_init ip6_route_net_init - net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; - dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, - ip6_template_metrics, true); -+ -+ net->ipv6.ip6_policy_failed_entry = -+ kmemdup(&ip6_policy_failed_entry_template, -+ sizeof(*net->ipv6.ip6_policy_failed_entry), GFP_KERNEL); -+ if (!net->ipv6.ip6_policy_failed_entry) -+ goto out_ip6_blk_hole_entry; -+ net->ipv6.ip6_policy_failed_entry->dst.ops = &net->ipv6.ip6_dst_ops; -+ dst_init_metrics(&net->ipv6.ip6_policy_failed_entry->dst, -+ ip6_template_metrics, true); - #endif - - net->ipv6.sysctl.flush_delay = 0; -@@ -5310,6 +5353,8 @@ out: - return ret; - - #ifdef CONFIG_IPV6_MULTIPLE_TABLES -+out_ip6_blk_hole_entry: -+ kfree(net->ipv6.ip6_blk_hole_entry); - out_ip6_prohibit_entry: - kfree(net->ipv6.ip6_prohibit_entry); - out_ip6_null_entry: -@@ -5330,6 +5375,7 @@ static void __net_exit ip6_route_net_exi - #ifdef CONFIG_IPV6_MULTIPLE_TABLES - kfree(net->ipv6.ip6_prohibit_entry); - kfree(net->ipv6.ip6_blk_hole_entry); -+ kfree(net->ipv6.ip6_policy_failed_entry); - #endif - dst_entries_destroy(&net->ipv6.ip6_dst_ops); - } -@@ -5406,6 +5452,9 @@ void __init ip6_route_init_special_entri - init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); - init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; - init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); -+ init_net.ipv6.ip6_policy_failed_entry->dst.dev = init_net.loopback_dev; -+ init_net.ipv6.ip6_policy_failed_entry->rt6i_idev = -+ in6_dev_get(init_net.loopback_dev); - #endif - } - diff --git a/target/linux/generic/pending-4.19/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch b/target/linux/generic/pending-4.19/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch deleted file mode 100644 index 85adfedc94..0000000000 --- a/target/linux/generic/pending-4.19/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch +++ /dev/null @@ -1,50 +0,0 @@ -From: Jonas Gorski -Subject: net: provide defines for _POLICY_FAILED until all code is updated - -Upstream introduced ICMPV6_POLICY_FAIL for code 5 of destination -unreachable, conflicting with our name. - -Add appropriate defines to allow our code to build with the new -name until we have updated our local patches for older kernels -and userspace packages. - -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/fib_rules.h | 2 ++ - include/uapi/linux/icmpv6.h | 2 ++ - include/uapi/linux/rtnetlink.h | 2 ++ - 3 files changed, 6 insertions(+) - ---- a/include/uapi/linux/fib_rules.h -+++ b/include/uapi/linux/fib_rules.h -@@ -89,6 +89,8 @@ enum { - __FR_ACT_MAX, - }; - -+#define FR_ACT_FAILED_POLICY FR_ACT_POLICY_FAILED -+ - #define FR_ACT_MAX (__FR_ACT_MAX - 1) - - #endif ---- a/include/uapi/linux/icmpv6.h -+++ b/include/uapi/linux/icmpv6.h -@@ -119,6 +119,8 @@ struct icmp6hdr { - #define ICMPV6_POLICY_FAIL 5 - #define ICMPV6_REJECT_ROUTE 6 - -+#define ICMPV6_FAILED_POLICY ICMPV6_POLICY_FAIL -+ - /* - * Codes for Time Exceeded - */ ---- a/include/uapi/linux/rtnetlink.h -+++ b/include/uapi/linux/rtnetlink.h -@@ -232,6 +232,8 @@ enum { - __RTN_MAX - }; - -+#define RTN_FAILED_POLICY RTN_POLICY_FAILED -+ - #define RTN_MAX (__RTN_MAX - 1) - - diff --git a/target/linux/generic/pending-4.19/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-4.19/680-NET-skip-GRO-for-foreign-MAC-addresses.patch deleted file mode 100644 index c01a090b73..0000000000 --- a/target/linux/generic/pending-4.19/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ /dev/null @@ -1,152 +0,0 @@ -From: Felix Fietkau -Subject: net: replace GRO optimization patch with a new one that supports VLANs/bridges with different MAC addresses - -Signed-off-by: Felix Fietkau ---- - include/linux/netdevice.h | 2 ++ - include/linux/skbuff.h | 3 ++- - net/core/dev.c | 48 +++++++++++++++++++++++++++++++++++++++++++++++ - net/ethernet/eth.c | 18 +++++++++++++++++- - 4 files changed, 69 insertions(+), 2 deletions(-) - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -1891,6 +1891,8 @@ struct net_device { - struct netdev_hw_addr_list mc; - struct netdev_hw_addr_list dev_addrs; - -+ unsigned char local_addr_mask[MAX_ADDR_LEN]; -+ - #ifdef CONFIG_SYSFS - struct kset *queues_kset; - #endif ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -799,6 +799,7 @@ struct sk_buff { - #ifdef CONFIG_TLS_DEVICE - __u8 decrypted:1; - #endif -+ __u8 gro_skip:1; - - #ifdef CONFIG_NET_SCHED - __u16 tc_index; /* traffic control index */ ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -5461,6 +5461,9 @@ static enum gro_result dev_gro_receive(s - int same_flow; - int grow; - -+ if (skb->gro_skip) -+ goto normal; -+ - if (netif_elide_gro(skb->dev)) - goto normal; - -@@ -7119,6 +7122,48 @@ static void __netdev_adjacent_dev_unlink - &upper_dev->adj_list.lower); - } - -+static void __netdev_addr_mask(unsigned char *mask, const unsigned char *addr, -+ struct net_device *dev) -+{ -+ int i; -+ -+ for (i = 0; i < dev->addr_len; i++) -+ mask[i] |= addr[i] ^ dev->dev_addr[i]; -+} -+ -+static void __netdev_upper_mask(unsigned char *mask, struct net_device *dev, -+ struct net_device *lower) -+{ -+ struct net_device *cur; -+ struct list_head *iter; -+ -+ netdev_for_each_upper_dev_rcu(dev, cur, iter) { -+ __netdev_addr_mask(mask, cur->dev_addr, lower); -+ __netdev_upper_mask(mask, cur, lower); -+ } -+} -+ -+static void __netdev_update_addr_mask(struct net_device *dev) -+{ -+ unsigned char mask[MAX_ADDR_LEN]; -+ struct net_device *cur; -+ struct list_head *iter; -+ -+ memset(mask, 0, sizeof(mask)); -+ __netdev_upper_mask(mask, dev, dev); -+ memcpy(dev->local_addr_mask, mask, dev->addr_len); -+ -+ netdev_for_each_lower_dev(dev, cur, iter) -+ __netdev_update_addr_mask(cur); -+} -+ -+static void netdev_update_addr_mask(struct net_device *dev) -+{ -+ rcu_read_lock(); -+ __netdev_update_addr_mask(dev); -+ rcu_read_unlock(); -+} -+ - static int __netdev_upper_dev_link(struct net_device *dev, - struct net_device *upper_dev, bool master, - void *upper_priv, void *upper_info, -@@ -7169,6 +7214,7 @@ static int __netdev_upper_dev_link(struc - if (ret) - return ret; - -+ netdev_update_addr_mask(dev); - ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, - &changeupper_info.info); - ret = notifier_to_errno(ret); -@@ -7261,6 +7307,7 @@ void netdev_upper_dev_unlink(struct net_ - - __netdev_adjacent_dev_unlink_neighbour(dev, upper_dev); - -+ netdev_update_addr_mask(dev); - call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, - &changeupper_info.info); - -@@ -7900,6 +7947,7 @@ int dev_set_mac_address(struct net_devic - if (err) - return err; - dev->addr_assign_type = NET_ADDR_SET; -+ netdev_update_addr_mask(dev); - call_netdevice_notifiers(NETDEV_CHANGEADDR, dev); - add_device_randomness(dev->dev_addr, dev->addr_len); - return 0; ---- a/net/ethernet/eth.c -+++ b/net/ethernet/eth.c -@@ -144,6 +144,18 @@ u32 eth_get_headlen(void *data, unsigned - } - EXPORT_SYMBOL(eth_get_headlen); - -+static inline bool -+eth_check_local_mask(const void *addr1, const void *addr2, const void *mask) -+{ -+ const u16 *a1 = addr1; -+ const u16 *a2 = addr2; -+ const u16 *m = mask; -+ -+ return (((a1[0] ^ a2[0]) & ~m[0]) | -+ ((a1[1] ^ a2[1]) & ~m[1]) | -+ ((a1[2] ^ a2[2]) & ~m[2])); -+} -+ - /** - * eth_type_trans - determine the packet's protocol ID. - * @skb: received socket data -@@ -172,8 +184,12 @@ __be16 eth_type_trans(struct sk_buff *sk - skb->pkt_type = PACKET_MULTICAST; - } - else if (unlikely(!ether_addr_equal_64bits(eth->h_dest, -- dev->dev_addr))) -+ dev->dev_addr))) { - skb->pkt_type = PACKET_OTHERHOST; -+ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, -+ dev->local_addr_mask)) -+ skb->gro_skip = 1; -+ } - - /* - * Some variants of DSA tagging don't have an ethertype field diff --git a/target/linux/generic/pending-4.19/681-NET-add-of_get_mac_address_mtd.patch b/target/linux/generic/pending-4.19/681-NET-add-of_get_mac_address_mtd.patch deleted file mode 100644 index 13f5640590..0000000000 --- a/target/linux/generic/pending-4.19/681-NET-add-of_get_mac_address_mtd.patch +++ /dev/null @@ -1,133 +0,0 @@ -From: John Crispin -Subject: NET: add mtd-mac-address support to of_get_mac_address() - -Many embedded devices have information such as mac addresses stored inside mtd -devices. This patch allows us to add a property inside a node describing a -network interface. The new property points at a mtd partition with an offset -where the mac address can be found. - -Signed-off-by: John Crispin -Signed-off-by: Felix Fietkau ---- - drivers/of/of_net.c | 37 +++++++++++++++++++++++++++++++++++++ - include/linux/of_net.h | 1 + - 2 files changed, 38 insertions(+) - ---- a/drivers/of/of_net.c -+++ b/drivers/of/of_net.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - - /** - * of_get_phy_mode - Get phy mode for given device_node -@@ -39,7 +40,7 @@ int of_get_phy_mode(struct device_node * - } - EXPORT_SYMBOL_GPL(of_get_phy_mode); - --static const void *of_get_mac_addr(struct device_node *np, const char *name) -+static void *of_get_mac_addr(struct device_node *np, const char *name) - { - struct property *pp = of_find_property(np, name, NULL); - -@@ -48,6 +49,79 @@ static const void *of_get_mac_addr(struc - return NULL; - } - -+static const void *of_get_mac_address_mtd(struct device_node *np) -+{ -+#ifdef CONFIG_MTD -+ struct device_node *mtd_np = NULL; -+ struct property *prop; -+ size_t retlen; -+ int size, ret; -+ struct mtd_info *mtd; -+ const char *part; -+ const __be32 *list; -+ phandle phandle; -+ u32 mac_inc = 0; -+ u8 mac[ETH_ALEN]; -+ void *addr; -+ u32 inc_idx; -+ -+ list = of_get_property(np, "mtd-mac-address", &size); -+ if (!list || (size != (2 * sizeof(*list)))) -+ return NULL; -+ -+ phandle = be32_to_cpup(list++); -+ if (phandle) -+ mtd_np = of_find_node_by_phandle(phandle); -+ -+ if (!mtd_np) -+ return NULL; -+ -+ part = of_get_property(mtd_np, "label", NULL); -+ if (!part) -+ part = mtd_np->name; -+ -+ mtd = get_mtd_device_nm(part); -+ if (IS_ERR(mtd)) -+ return NULL; -+ -+ ret = mtd_read(mtd, be32_to_cpup(list), 6, &retlen, mac); -+ put_mtd_device(mtd); -+ -+ if (of_property_read_u32(np, "mtd-mac-address-increment-byte", &inc_idx)) -+ inc_idx = 5; -+ if (inc_idx > 5) -+ return NULL; -+ -+ if (!of_property_read_u32(np, "mtd-mac-address-increment", &mac_inc)) -+ mac[inc_idx] += mac_inc; -+ -+ if (!is_valid_ether_addr(mac)) -+ return NULL; -+ -+ addr = of_get_mac_addr(np, "mac-address"); -+ if (addr) { -+ memcpy(addr, mac, ETH_ALEN); -+ return addr; -+ } -+ -+ prop = kzalloc(sizeof(*prop), GFP_KERNEL); -+ if (!prop) -+ return NULL; -+ -+ prop->name = "mac-address"; -+ prop->length = ETH_ALEN; -+ prop->value = kmemdup(mac, ETH_ALEN, GFP_KERNEL); -+ if (!prop->value || of_add_property(np, prop)) -+ goto free; -+ -+ return prop->value; -+free: -+ kfree(prop->value); -+ kfree(prop); -+#endif -+ return NULL; -+} -+ - /** - * Search the device tree for the best MAC address to use. 'mac-address' is - * checked first, because that is supposed to contain to "most recent" MAC -@@ -65,11 +139,18 @@ static const void *of_get_mac_addr(struc - * addresses. Some older U-Boots only initialized 'local-mac-address'. In - * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists - * but is all zeros. -+ * -+ * If a mtd-mac-address property exists, try to fetch the MAC address from the -+ * specified mtd device, and store it as a 'mac-address' property - */ - const void *of_get_mac_address(struct device_node *np) - { - const void *addr; - -+ addr = of_get_mac_address_mtd(np); -+ if (addr) -+ return addr; -+ - addr = of_get_mac_addr(np, "mac-address"); - if (addr) - return addr; diff --git a/target/linux/generic/pending-4.19/690-net-add-support-for-threaded-NAPI-polling.patch b/target/linux/generic/pending-4.19/690-net-add-support-for-threaded-NAPI-polling.patch deleted file mode 100644 index b5c701c80b..0000000000 --- a/target/linux/generic/pending-4.19/690-net-add-support-for-threaded-NAPI-polling.patch +++ /dev/null @@ -1,339 +0,0 @@ -From: Felix Fietkau -Date: Sun, 26 Jul 2020 14:03:21 +0200 -Subject: [PATCH] net: add support for threaded NAPI polling - -For some drivers (especially 802.11 drivers), doing a lot of work in the NAPI -poll function does not perform well. Since NAPI poll is bound to the CPU it -was scheduled from, we can easily end up with a few very busy CPUs spending -most of their time in softirq/ksoftirqd and some idle ones. - -Introduce threaded NAPI for such drivers based on a workqueue. The API is the -same except for using netif_threaded_napi_add instead of netif_napi_add. - -In my tests with mt76 on MT7621 using threaded NAPI + a thread for tx scheduling -improves LAN->WLAN bridging throughput by 10-50%. Throughput without threaded -NAPI is wildly inconsistent, depending on the CPU that runs the tx scheduling -thread. - -With threaded NAPI it seems stable and consistent (and higher than the best -results I got without it). - -Based on a patch by Hillf Danton - -Cc: Hillf Danton -Signed-off-by: Felix Fietkau ---- - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -339,6 +339,7 @@ struct napi_struct { - struct list_head dev_list; - struct hlist_node napi_hash_node; - unsigned int napi_id; -+ struct work_struct work; - }; - - enum { -@@ -349,6 +350,7 @@ enum { - NAPI_STATE_HASHED, /* In NAPI hash (busy polling possible) */ - NAPI_STATE_NO_BUSY_POLL,/* Do not add in napi_hash, no busy polling */ - NAPI_STATE_IN_BUSY_POLL,/* sk_busy_loop() owns this NAPI */ -+ NAPI_STATE_THREADED, /* Use threaded NAPI */ - }; - - enum { -@@ -359,6 +361,7 @@ enum { - NAPIF_STATE_HASHED = BIT(NAPI_STATE_HASHED), - NAPIF_STATE_NO_BUSY_POLL = BIT(NAPI_STATE_NO_BUSY_POLL), - NAPIF_STATE_IN_BUSY_POLL = BIT(NAPI_STATE_IN_BUSY_POLL), -+ NAPIF_STATE_THREADED = BIT(NAPI_STATE_THREADED), - }; - - enum gro_result { -@@ -2230,6 +2233,26 @@ void netif_napi_add(struct net_device *d - int (*poll)(struct napi_struct *, int), int weight); - - /** -+ * netif_threaded_napi_add - initialize a NAPI context -+ * @dev: network device -+ * @napi: NAPI context -+ * @poll: polling function -+ * @weight: default weight -+ * -+ * This variant of netif_napi_add() should be used from drivers using NAPI -+ * with CPU intensive poll functions. -+ * This will schedule polling from a high priority workqueue -+ */ -+static inline void netif_threaded_napi_add(struct net_device *dev, -+ struct napi_struct *napi, -+ int (*poll)(struct napi_struct *, int), -+ int weight) -+{ -+ set_bit(NAPI_STATE_THREADED, &napi->state); -+ netif_napi_add(dev, napi, poll, weight); -+} -+ -+/** - * netif_tx_napi_add - initialize a NAPI context - * @dev: network device - * @napi: NAPI context ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -160,6 +160,7 @@ static DEFINE_SPINLOCK(offload_lock); - struct list_head ptype_base[PTYPE_HASH_SIZE] __read_mostly; - struct list_head ptype_all __read_mostly; /* Taps */ - static struct list_head offload_base __read_mostly; -+static struct workqueue_struct *napi_workq __read_mostly; - - static int netif_rx_internal(struct sk_buff *skb); - static int call_netdevice_notifiers_info(unsigned long val, -@@ -5891,6 +5892,11 @@ void __napi_schedule(struct napi_struct - { - unsigned long flags; - -+ if (test_bit(NAPI_STATE_THREADED, &n->state)) { -+ queue_work(napi_workq, &n->work); -+ return; -+ } -+ - local_irq_save(flags); - ____napi_schedule(this_cpu_ptr(&softnet_data), n); - local_irq_restore(flags); -@@ -5938,6 +5944,11 @@ EXPORT_SYMBOL(napi_schedule_prep); - */ - void __napi_schedule_irqoff(struct napi_struct *n) - { -+ if (test_bit(NAPI_STATE_THREADED, &n->state)) { -+ queue_work(napi_workq, &n->work); -+ return; -+ } -+ - ____napi_schedule(this_cpu_ptr(&softnet_data), n); - } - EXPORT_SYMBOL(__napi_schedule_irqoff); -@@ -6186,6 +6197,82 @@ static void init_gro_hash(struct napi_st - napi->gro_bitmask = 0; - } - -+static int __napi_poll(struct napi_struct *n, bool *repoll) -+{ -+ int work, weight; -+ -+ weight = n->weight; -+ -+ /* This NAPI_STATE_SCHED test is for avoiding a race -+ * with netpoll's poll_napi(). Only the entity which -+ * obtains the lock and sees NAPI_STATE_SCHED set will -+ * actually make the ->poll() call. Therefore we avoid -+ * accidentally calling ->poll() when NAPI is not scheduled. -+ */ -+ work = 0; -+ if (test_bit(NAPI_STATE_SCHED, &n->state)) { -+ work = n->poll(n, weight); -+ trace_napi_poll(n, work, weight); -+ } -+ -+ WARN_ON_ONCE(work > weight); -+ -+ if (likely(work < weight)) -+ return work; -+ -+ /* Drivers must not modify the NAPI state if they -+ * consume the entire weight. In such cases this code -+ * still "owns" the NAPI instance and therefore can -+ * move the instance around on the list at-will. -+ */ -+ if (unlikely(napi_disable_pending(n))) { -+ napi_complete(n); -+ return work; -+ } -+ -+ if (n->gro_bitmask) { -+ /* flush too old packets -+ * If HZ < 1000, flush all packets. -+ */ -+ napi_gro_flush(n, HZ >= 1000); -+ } -+ -+ *repoll = true; -+ -+ return work; -+} -+ -+static void napi_workfn(struct work_struct *work) -+{ -+ struct napi_struct *n = container_of(work, struct napi_struct, work); -+ void *have; -+ -+ for (;;) { -+ bool repoll = false; -+ -+ local_bh_disable(); -+ -+ have = netpoll_poll_lock(n); -+ __napi_poll(n, &repoll); -+ netpoll_poll_unlock(have); -+ -+ local_bh_enable(); -+ -+ if (!repoll) -+ return; -+ -+ if (!need_resched()) -+ continue; -+ -+ /* -+ * have to pay for the latency of task switch even if -+ * napi is scheduled -+ */ -+ queue_work(napi_workq, work); -+ return; -+ } -+} -+ - void netif_napi_add(struct net_device *dev, struct napi_struct *napi, - int (*poll)(struct napi_struct *, int), int weight) - { -@@ -6204,6 +6291,7 @@ void netif_napi_add(struct net_device *d - #ifdef CONFIG_NETPOLL - napi->poll_owner = -1; - #endif -+ INIT_WORK(&napi->work, napi_workfn); - set_bit(NAPI_STATE_SCHED, &napi->state); - napi_hash_add(napi); - } -@@ -6242,6 +6330,7 @@ static void flush_gro_hash(struct napi_s - void netif_napi_del(struct napi_struct *napi) - { - might_sleep(); -+ cancel_work_sync(&napi->work); - if (napi_hash_del(napi)) - synchronize_net(); - list_del_init(&napi->dev_list); -@@ -6254,48 +6343,18 @@ EXPORT_SYMBOL(netif_napi_del); - - static int napi_poll(struct napi_struct *n, struct list_head *repoll) - { -+ bool do_repoll = false; - void *have; -- int work, weight; -+ int work; - - list_del_init(&n->poll_list); - - have = netpoll_poll_lock(n); - -- weight = n->weight; -- -- /* This NAPI_STATE_SCHED test is for avoiding a race -- * with netpoll's poll_napi(). Only the entity which -- * obtains the lock and sees NAPI_STATE_SCHED set will -- * actually make the ->poll() call. Therefore we avoid -- * accidentally calling ->poll() when NAPI is not scheduled. -- */ -- work = 0; -- if (test_bit(NAPI_STATE_SCHED, &n->state)) { -- work = n->poll(n, weight); -- trace_napi_poll(n, work, weight); -- } -- -- WARN_ON_ONCE(work > weight); -- -- if (likely(work < weight)) -- goto out_unlock; -+ work = __napi_poll(n, &do_repoll); - -- /* Drivers must not modify the NAPI state if they -- * consume the entire weight. In such cases this code -- * still "owns" the NAPI instance and therefore can -- * move the instance around on the list at-will. -- */ -- if (unlikely(napi_disable_pending(n))) { -- napi_complete(n); -+ if (!do_repoll) - goto out_unlock; -- } -- -- if (n->gro_bitmask) { -- /* flush too old packets -- * If HZ < 1000, flush all packets. -- */ -- napi_gro_flush(n, HZ >= 1000); -- } - - /* Some drivers may have called napi_schedule - * prior to exhausting their budget. -@@ -9895,6 +9954,10 @@ static int __init net_dev_init(void) - sd->backlog.weight = weight_p; - } - -+ napi_workq = alloc_workqueue("napi_workq", WQ_UNBOUND | WQ_HIGHPRI, -+ WQ_UNBOUND_MAX_ACTIVE | WQ_SYSFS); -+ BUG_ON(!napi_workq); -+ - dev_boot_phase = 0; - - /* The loopback device is special if any other network devices ---- a/net/core/net-sysfs.c -+++ b/net/core/net-sysfs.c -@@ -447,6 +447,52 @@ static ssize_t proto_down_store(struct d - } - NETDEVICE_SHOW_RW(proto_down, fmt_dec); - -+static int change_napi_threaded(struct net_device *dev, unsigned long val) -+{ -+ struct napi_struct *napi; -+ -+ if (list_empty(&dev->napi_list)) -+ return -EOPNOTSUPP; -+ -+ list_for_each_entry(napi, &dev->napi_list, dev_list) { -+ if (val) -+ set_bit(NAPI_STATE_THREADED, &napi->state); -+ else -+ clear_bit(NAPI_STATE_THREADED, &napi->state); -+ } -+ -+ return 0; -+} -+ -+static ssize_t napi_threaded_store(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ return netdev_store(dev, attr, buf, len, change_napi_threaded); -+} -+ -+static ssize_t napi_threaded_show(struct device *dev, -+ struct device_attribute *attr, -+ char *buf) -+{ -+ struct net_device *netdev = to_net_dev(dev); -+ struct napi_struct *napi; -+ bool enabled = false; -+ -+ if (!rtnl_trylock()) -+ return restart_syscall(); -+ -+ list_for_each_entry(napi, &netdev->napi_list, dev_list) { -+ if (test_bit(NAPI_STATE_THREADED, &napi->state)) -+ enabled = true; -+ } -+ -+ rtnl_unlock(); -+ -+ return sprintf(buf, fmt_dec, enabled); -+} -+static DEVICE_ATTR_RW(napi_threaded); -+ - static ssize_t phys_port_id_show(struct device *dev, - struct device_attribute *attr, char *buf) - { -@@ -542,6 +588,7 @@ static struct attribute *net_class_attrs - &dev_attr_flags.attr, - &dev_attr_tx_queue_len.attr, - &dev_attr_gro_flush_timeout.attr, -+ &dev_attr_napi_threaded.attr, - &dev_attr_phys_port_id.attr, - &dev_attr_phys_port_name.attr, - &dev_attr_phys_switch_id.attr, diff --git a/target/linux/generic/pending-4.19/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-4.19/703-phy-add-detach-callback-to-struct-phy_driver.patch deleted file mode 100644 index d655d2fc75..0000000000 --- a/target/linux/generic/pending-4.19/703-phy-add-detach-callback-to-struct-phy_driver.patch +++ /dev/null @@ -1,38 +0,0 @@ -From: Gabor Juhos -Subject: generic: add detach callback to struct phy_driver - -lede-commit: fe61fc2d7d0b3fb348b502f68f98243b3ddf5867 - -Signed-off-by: Gabor Juhos ---- - drivers/net/phy/phy_device.c | 3 +++ - include/linux/phy.h | 6 ++++++ - 2 files changed, 9 insertions(+) - ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1207,6 +1207,9 @@ void phy_detach(struct phy_device *phyde - struct module *ndev_owner = dev->dev.parent->driver->owner; - struct mii_bus *bus; - -+ if (phydev->drv && phydev->drv->detach) -+ phydev->drv->detach(phydev); -+ - if (phydev->sysfs_links) { - sysfs_remove_link(&dev->dev.kobj, "phydev"); - sysfs_remove_link(&phydev->mdio.dev.kobj, "attached_dev"); ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -569,6 +569,12 @@ struct phy_driver { - */ - int (*did_interrupt)(struct phy_device *phydev); - -+ /* -+ * Called before an ethernet device is detached -+ * from the PHY. -+ */ -+ void (*detach)(struct phy_device *phydev); -+ - /* Clears up any memory if needed */ - void (*remove)(struct phy_device *phydev); - diff --git a/target/linux/generic/pending-4.19/735-net-phy-at803x-fix-at8033-sgmii-mode.patch b/target/linux/generic/pending-4.19/735-net-phy-at803x-fix-at8033-sgmii-mode.patch deleted file mode 100644 index 5c00b8781f..0000000000 --- a/target/linux/generic/pending-4.19/735-net-phy-at803x-fix-at8033-sgmii-mode.patch +++ /dev/null @@ -1,51 +0,0 @@ -From: Roman Yeryomin -Subject: kernel: add at803x fix for sgmii mode - -Some (possibly broken) bootloaders incorreclty initialize at8033 -phy. This patch enables sgmii autonegotiation mode. - -[john@phrozen.org: felix added this to his upstream queue] - -Signed-off-by: Roman Yeryomin ---- - drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -44,6 +44,7 @@ - #define AT803X_FUNC_DATA 0x4003 - #define AT803X_REG_CHIP_CONFIG 0x1f - #define AT803X_BT_BX_REG_SEL 0x8000 -+#define AT803X_SGMII_ANEG_EN 0x1000 - - #define AT803X_DEBUG_ADDR 0x1D - #define AT803X_DEBUG_DATA 0x1E -@@ -252,6 +253,27 @@ static int at803x_probe(struct phy_devic - static int at803x_config_init(struct phy_device *phydev) - { - int ret; -+ u32 v; -+ -+ if (phydev->drv->phy_id == ATH8031_PHY_ID && -+ phydev->interface == PHY_INTERFACE_MODE_SGMII) -+ { -+ v = phy_read(phydev, AT803X_REG_CHIP_CONFIG); -+ /* select SGMII/fiber page */ -+ ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG, -+ v & ~AT803X_BT_BX_REG_SEL); -+ if (ret) -+ return ret; -+ /* enable SGMII autonegotiation */ -+ ret = phy_write(phydev, MII_BMCR, AT803X_SGMII_ANEG_EN); -+ if (ret) -+ return ret; -+ /* select copper page */ -+ ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG, -+ v | AT803X_BT_BX_REG_SEL); -+ if (ret) -+ return ret; -+ } - - ret = genphy_config_init(phydev); - if (ret < 0) diff --git a/target/linux/generic/pending-4.19/739-net-avoid-tx-fault-with-Nokia-GPON-module.patch b/target/linux/generic/pending-4.19/739-net-avoid-tx-fault-with-Nokia-GPON-module.patch deleted file mode 100644 index b540e1dbc1..0000000000 --- a/target/linux/generic/pending-4.19/739-net-avoid-tx-fault-with-Nokia-GPON-module.patch +++ /dev/null @@ -1,108 +0,0 @@ -From 283b211aa01bdae94dffb3121655dbb20bf237f4 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 3 Dec 2019 15:22:05 +0000 -Subject: net: sfp: avoid tx-fault with Nokia GPON module - -The Nokia GPON module can hold tx-fault active while it is initialising -which can take up to 60s. Avoid this causing the module to be declared -faulty after the SFP MSA defined non-cooled module timeout. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 42 ++++++++++++++++++++++++++++++------------ - 1 file changed, 30 insertions(+), 12 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -153,10 +153,20 @@ static const enum gpiod_flags gpio_flags - GPIOD_ASIS, - }; - --#define T_WAIT msecs_to_jiffies(50) --#define T_INIT_JIFFIES msecs_to_jiffies(300) --#define T_RESET_US 10 --#define T_FAULT_RECOVER msecs_to_jiffies(1000) -+/* t_start_up (SFF-8431) or t_init (SFF-8472) is the time required for a -+ * non-cooled module to initialise its laser safety circuitry. We wait -+ * an initial T_WAIT period before we check the tx fault to give any PHY -+ * on board (for a copper SFP) time to initialise. -+ */ -+#define T_WAIT msecs_to_jiffies(50) -+#define T_START_UP msecs_to_jiffies(300) -+#define T_START_UP_BAD_GPON msecs_to_jiffies(60000) -+ -+/* t_reset is the time required to assert the TX_DISABLE signal to reset -+ * an indicated TX_FAULT. -+ */ -+#define T_RESET_US 10 -+#define T_FAULT_RECOVER msecs_to_jiffies(1000) - - /* SFP module presence detection is poor: the three MOD DEF signals are - * the same length on the PCB, which means it's possible for MOD DEF 0 to -@@ -216,6 +226,7 @@ struct sfp { - - struct sfp_eeprom_id id; - unsigned int module_power_mW; -+ unsigned int module_t_start_up; - - #if IS_ENABLED(CONFIG_HWMON) - struct sfp_diag diag; -@@ -1590,6 +1601,12 @@ static int sfp_sm_mod_probe(struct sfp * - if (ret < 0) - return ret; - -+ if (!memcmp(id.base.vendor_name, "ALCATELLUCENT ", 16) && -+ !memcmp(id.base.vendor_pn, "3FE46541AA ", 16)) -+ sfp->module_t_start_up = T_START_UP_BAD_GPON; -+ else -+ sfp->module_t_start_up = T_START_UP; -+ - return 0; - } - -@@ -1795,11 +1812,12 @@ static void sfp_sm_main(struct sfp *sfp, - break; - - if (sfp->state & SFP_F_TX_FAULT) { -- /* Wait t_init before indicating that the link is up, -- * provided the current state indicates no TX_FAULT. If -- * TX_FAULT clears before this time, that's fine too. -+ /* Wait up to t_init (SFF-8472) or t_start_up (SFF-8431) -+ * from the TX_DISABLE deassertion for the module to -+ * initialise, which is indicated by TX_FAULT -+ * deasserting. - */ -- timeout = T_INIT_JIFFIES; -+ timeout = sfp->module_t_start_up; - if (timeout > T_WAIT) - timeout -= T_WAIT; - else -@@ -1816,8 +1834,8 @@ static void sfp_sm_main(struct sfp *sfp, - - case SFP_S_INIT: - if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) { -- /* TX_FAULT is still asserted after t_init, so assume -- * there is a fault. -+ /* TX_FAULT is still asserted after t_init or -+ * or t_start_up, so assume there is a fault. - */ - sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT, - sfp->sm_retries == 5); -@@ -1836,7 +1854,7 @@ static void sfp_sm_main(struct sfp *sfp, - case SFP_S_INIT_TX_FAULT: - if (event == SFP_E_TIMEOUT) { - sfp_module_tx_fault_reset(sfp); -- sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -+ sfp_sm_next(sfp, SFP_S_INIT, sfp->module_t_start_up); - } - break; - -@@ -1860,7 +1878,7 @@ static void sfp_sm_main(struct sfp *sfp, - case SFP_S_TX_FAULT: - if (event == SFP_E_TIMEOUT) { - sfp_module_tx_fault_reset(sfp); -- sfp_sm_next(sfp, SFP_S_REINIT, T_INIT_JIFFIES); -+ sfp_sm_next(sfp, SFP_S_REINIT, sfp->module_t_start_up); - } - break; - diff --git a/target/linux/generic/pending-4.19/740-net-sfp-remove-incomplete-100BASE-FX-and-100BASE-LX-.patch b/target/linux/generic/pending-4.19/740-net-sfp-remove-incomplete-100BASE-FX-and-100BASE-LX-.patch deleted file mode 100644 index 304d9b40bd..0000000000 --- a/target/linux/generic/pending-4.19/740-net-sfp-remove-incomplete-100BASE-FX-and-100BASE-LX-.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 29cd215aaf6c2050c43e4de03aee436c16f90b96 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 21 Nov 2019 17:27:14 +0000 -Subject: [PATCH 643/660] net: sfp: remove incomplete 100BASE-FX and 100BASE-LX - support - -The 100BASE-FX and 100BASE-LX support assumes a PHY is present; this -is probably an incorrect assumption. In any case, sfp_parse_support() -will fail such a module. Let's stop pretending we support these -modules. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp-bus.c | 4 +--- - drivers/net/phy/sfp.c | 13 +------------ - 2 files changed, 2 insertions(+), 15 deletions(-) - ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -341,9 +341,7 @@ phy_interface_t sfp_select_interface(str - if (phylink_test(link_modes, 2500baseX_Full)) - return PHY_INTERFACE_MODE_2500BASEX; - -- if (id->base.e1000_base_t || -- id->base.e100_base_lx || -- id->base.e100_base_fx) -+ if (id->base.e1000_base_t) - return PHY_INTERFACE_MODE_SGMII; - - if (phylink_test(link_modes, 1000baseX_Full)) ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1424,18 +1424,7 @@ static void sfp_sm_fault(struct sfp *sfp - - static void sfp_sm_probe_for_phy(struct sfp *sfp) - { -- /* Setting the serdes link mode is guesswork: there's no -- * field in the EEPROM which indicates what mode should -- * be used. -- * -- * If it's a gigabit-only fiber module, it probably does -- * not have a PHY, so switch to 802.3z negotiation mode. -- * Otherwise, switch to SGMII mode (which is required to -- * support non-gigabit speeds) and probe for a PHY. -- */ -- if (sfp->id.base.e1000_base_t || -- sfp->id.base.e100_base_lx || -- sfp->id.base.e100_base_fx) -+ if (sfp->id.base.e1000_base_t) - sfp_sm_probe_phy(sfp); - } - diff --git a/target/linux/generic/pending-4.19/741-net-sfp-derive-interface-mode-from-ethtool-link-mode.patch b/target/linux/generic/pending-4.19/741-net-sfp-derive-interface-mode-from-ethtool-link-mode.patch deleted file mode 100644 index f20b66eae7..0000000000 --- a/target/linux/generic/pending-4.19/741-net-sfp-derive-interface-mode-from-ethtool-link-mode.patch +++ /dev/null @@ -1,89 +0,0 @@ -From dc45d9e04572b5cd6d32f51cdf9f62b18022e6dd Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 21 Nov 2019 17:32:59 +0000 -Subject: [PATCH 644/660] net: sfp: derive interface mode from ethtool link - modes - -We don't need the EEPROM ID to derive the phy interface mode as we can -derive it merely from the ethtool link modes. Remove the EEPROM ID -argument to sfp_select_interface(). - -Signed-off-by: Russell King ---- - drivers/net/phy/marvell10g.c | 2 +- - drivers/net/phy/phylink.c | 2 +- - drivers/net/phy/sfp-bus.c | 11 ++++------- - include/linux/sfp.h | 2 -- - 4 files changed, 6 insertions(+), 11 deletions(-) - ---- a/drivers/net/phy/marvell10g.c -+++ b/drivers/net/phy/marvell10g.c -@@ -227,7 +227,7 @@ static int mv3310_sfp_insert(void *upstr - phy_interface_t iface; - - sfp_parse_support(phydev->sfp_bus, id, support); -- iface = sfp_select_interface(phydev->sfp_bus, id, support); -+ iface = sfp_select_interface(phydev->sfp_bus, support); - - if (iface != PHY_INTERFACE_MODE_10GKR) { - dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n"); ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1663,7 +1663,7 @@ static int phylink_sfp_module_insert(voi - - linkmode_copy(support1, support); - -- iface = sfp_select_interface(pl->sfp_bus, id, config.advertising); -+ iface = sfp_select_interface(pl->sfp_bus, config.advertising); - if (iface == PHY_INTERFACE_MODE_NA) { - netdev_err(pl->netdev, - "selection of interface failed, advertisement %*pb\n", ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -319,16 +319,12 @@ EXPORT_SYMBOL_GPL(sfp_parse_support); - /** - * sfp_select_interface() - Select appropriate phy_interface_t mode - * @bus: a pointer to the &struct sfp_bus structure for the sfp module -- * @id: a pointer to the module's &struct sfp_eeprom_id - * @link_modes: ethtool link modes mask - * -- * Derive the phy_interface_t mode for the information found in the -- * module's identifying EEPROM and the link modes mask. There is no -- * standard or defined way to derive this information, so we decide -- * based upon the link mode mask. -+ * Derive the phy_interface_t mode for the SFP module from the link -+ * modes mask. - */ - phy_interface_t sfp_select_interface(struct sfp_bus *bus, -- const struct sfp_eeprom_id *id, - unsigned long *link_modes) - { - if (phylink_test(link_modes, 10000baseCR_Full) || -@@ -341,7 +337,8 @@ phy_interface_t sfp_select_interface(str - if (phylink_test(link_modes, 2500baseX_Full)) - return PHY_INTERFACE_MODE_2500BASEX; - -- if (id->base.e1000_base_t) -+ if (phylink_test(link_modes, 1000baseT_Half) || -+ phylink_test(link_modes, 1000baseT_Full)) - return PHY_INTERFACE_MODE_SGMII; - - if (phylink_test(link_modes, 1000baseX_Full)) ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -504,7 +504,6 @@ int sfp_parse_port(struct sfp_bus *bus, - void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id, - unsigned long *support); - phy_interface_t sfp_select_interface(struct sfp_bus *bus, -- const struct sfp_eeprom_id *id, - unsigned long *link_modes); - - int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo); -@@ -532,7 +531,6 @@ static inline void sfp_parse_support(str - } - - static inline phy_interface_t sfp_select_interface(struct sfp_bus *bus, -- const struct sfp_eeprom_id *id, - unsigned long *link_modes) - { - return PHY_INTERFACE_MODE_NA; diff --git a/target/linux/generic/pending-4.19/742-net-sfp-add-more-extended-compliance-codes.patch b/target/linux/generic/pending-4.19/742-net-sfp-add-more-extended-compliance-codes.patch deleted file mode 100644 index 4ca0ded55d..0000000000 --- a/target/linux/generic/pending-4.19/742-net-sfp-add-more-extended-compliance-codes.patch +++ /dev/null @@ -1,251 +0,0 @@ -From c66a4e76c8554c84e64b9315314576ac403c6641 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 26 Sep 2019 15:14:18 +0100 -Subject: [PATCH 645/660] net: sfp: add more extended compliance codes - -SFF-8024 is used to define various constants re-used in several SFF -SFP-related specifications. Split these constants from the enum, and -rename them to indicate that they're defined by SFF-8024. - -Add and use updated SFF-8024 extended compliance code definitions for -10GBASE-T, 5GBASE-T and 2.5GBASE-T modules. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp-bus.c | 60 ++++++++++++++++------------ - drivers/net/phy/sfp.c | 4 +- - include/linux/sfp.h | 82 ++++++++++++++++++++++++++------------- - 3 files changed, 93 insertions(+), 53 deletions(-) - ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -123,35 +123,35 @@ int sfp_parse_port(struct sfp_bus *bus, - - /* port is the physical connector, set this from the connector field. */ - switch (id->base.connector) { -- case SFP_CONNECTOR_SC: -- case SFP_CONNECTOR_FIBERJACK: -- case SFP_CONNECTOR_LC: -- case SFP_CONNECTOR_MT_RJ: -- case SFP_CONNECTOR_MU: -- case SFP_CONNECTOR_OPTICAL_PIGTAIL: -+ case SFF8024_CONNECTOR_SC: -+ case SFF8024_CONNECTOR_FIBERJACK: -+ case SFF8024_CONNECTOR_LC: -+ case SFF8024_CONNECTOR_MT_RJ: -+ case SFF8024_CONNECTOR_MU: -+ case SFF8024_CONNECTOR_OPTICAL_PIGTAIL: -+ case SFF8024_CONNECTOR_MPO_1X12: -+ case SFF8024_CONNECTOR_MPO_2X16: - port = PORT_FIBRE; - break; - -- case SFP_CONNECTOR_RJ45: -+ case SFF8024_CONNECTOR_RJ45: - port = PORT_TP; - break; - -- case SFP_CONNECTOR_COPPER_PIGTAIL: -+ case SFF8024_CONNECTOR_COPPER_PIGTAIL: - port = PORT_DA; - break; - -- case SFP_CONNECTOR_UNSPEC: -+ case SFF8024_CONNECTOR_UNSPEC: - if (id->base.e1000_base_t) { - port = PORT_TP; - break; - } - /* fallthrough */ -- case SFP_CONNECTOR_SG: /* guess */ -- case SFP_CONNECTOR_MPO_1X12: -- case SFP_CONNECTOR_MPO_2X16: -- case SFP_CONNECTOR_HSSDC_II: -- case SFP_CONNECTOR_NOSEPARATE: -- case SFP_CONNECTOR_MXC_2X16: -+ case SFF8024_CONNECTOR_SG: /* guess */ -+ case SFF8024_CONNECTOR_HSSDC_II: -+ case SFF8024_CONNECTOR_NOSEPARATE: -+ case SFF8024_CONNECTOR_MXC_2X16: - port = PORT_OTHER; - break; - default: -@@ -260,22 +260,33 @@ void sfp_parse_support(struct sfp_bus *b - } - - switch (id->base.extended_cc) { -- case 0x00: /* Unspecified */ -+ case SFF8024_ECC_UNSPEC: - break; -- case 0x02: /* 100Gbase-SR4 or 25Gbase-SR */ -+ case SFF8024_ECC_100GBASE_SR4_25GBASE_SR: - phylink_set(modes, 100000baseSR4_Full); - phylink_set(modes, 25000baseSR_Full); - break; -- case 0x03: /* 100Gbase-LR4 or 25Gbase-LR */ -- case 0x04: /* 100Gbase-ER4 or 25Gbase-ER */ -+ case SFF8024_ECC_100GBASE_LR4_25GBASE_LR: -+ case SFF8024_ECC_100GBASE_ER4_25GBASE_ER: - phylink_set(modes, 100000baseLR4_ER4_Full); - break; -- case 0x0b: /* 100Gbase-CR4 or 25Gbase-CR CA-L */ -- case 0x0c: /* 25Gbase-CR CA-S */ -- case 0x0d: /* 25Gbase-CR CA-N */ -+ case SFF8024_ECC_100GBASE_CR4: - phylink_set(modes, 100000baseCR4_Full); -+ /* fallthrough */ -+ case SFF8024_ECC_25GBASE_CR_S: -+ case SFF8024_ECC_25GBASE_CR_N: - phylink_set(modes, 25000baseCR_Full); - break; -+ case SFF8024_ECC_10GBASE_T_SFI: -+ case SFF8024_ECC_10GBASE_T_SR: -+ phylink_set(modes, 10000baseT_Full); -+ break; -+ case SFF8024_ECC_5GBASE_T: -+ phylink_set(modes, 5000baseT_Full); -+ break; -+ case SFF8024_ECC_2_5GBASE_T: -+ phylink_set(modes, 2500baseT_Full); -+ break; - default: - dev_warn(bus->sfp_dev, - "Unknown/unsupported extended compliance code: 0x%02x\n", -@@ -300,7 +311,7 @@ void sfp_parse_support(struct sfp_bus *b - */ - if (bitmap_empty(modes, __ETHTOOL_LINK_MODE_MASK_NBITS)) { - /* If the encoding and bit rate allows 1000baseX */ -- if (id->base.encoding == SFP_ENCODING_8B10B && br_nom && -+ if (id->base.encoding == SFF8024_ENCODING_8B10B && br_nom && - br_min <= 1300 && br_max >= 1200) - phylink_set(modes, 1000baseX_Full); - } -@@ -331,7 +342,8 @@ phy_interface_t sfp_select_interface(str - phylink_test(link_modes, 10000baseSR_Full) || - phylink_test(link_modes, 10000baseLR_Full) || - phylink_test(link_modes, 10000baseLRM_Full) || -- phylink_test(link_modes, 10000baseER_Full)) -+ phylink_test(link_modes, 10000baseER_Full) || -+ phylink_test(link_modes, 10000baseT_Full)) - return PHY_INTERFACE_MODE_10GKR; - - if (phylink_test(link_modes, 2500baseX_Full)) ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -240,7 +240,7 @@ struct sfp { - - static bool sff_module_supported(const struct sfp_eeprom_id *id) - { -- return id->base.phys_id == SFP_PHYS_ID_SFF && -+ return id->base.phys_id == SFF8024_ID_SFF_8472 && - id->base.phys_ext_id == SFP_PHYS_EXT_ID_SFP; - } - -@@ -251,7 +251,7 @@ static const struct sff_data sff_data = - - static bool sfp_module_supported(const struct sfp_eeprom_id *id) - { -- return id->base.phys_id == SFP_PHYS_ID_SFP && -+ return id->base.phys_id == SFF8024_ID_SFP && - id->base.phys_ext_id == SFP_PHYS_EXT_ID_SFP; - } - ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -275,6 +275,61 @@ struct sfp_diag { - __be16 cal_v_offset; - } __packed; - -+/* SFF8024 defined constants */ -+enum { -+ SFF8024_ID_UNK = 0x00, -+ SFF8024_ID_SFF_8472 = 0x02, -+ SFF8024_ID_SFP = 0x03, -+ SFF8024_ID_DWDM_SFP = 0x0b, -+ SFF8024_ID_QSFP_8438 = 0x0c, -+ SFF8024_ID_QSFP_8436_8636 = 0x0d, -+ SFF8024_ID_QSFP28_8636 = 0x11, -+ -+ SFF8024_ENCODING_UNSPEC = 0x00, -+ SFF8024_ENCODING_8B10B = 0x01, -+ SFF8024_ENCODING_4B5B = 0x02, -+ SFF8024_ENCODING_NRZ = 0x03, -+ SFF8024_ENCODING_8472_MANCHESTER= 0x04, -+ SFF8024_ENCODING_8472_SONET = 0x05, -+ SFF8024_ENCODING_8472_64B66B = 0x06, -+ SFF8024_ENCODING_8436_MANCHESTER= 0x06, -+ SFF8024_ENCODING_8436_SONET = 0x04, -+ SFF8024_ENCODING_8436_64B66B = 0x05, -+ SFF8024_ENCODING_256B257B = 0x07, -+ SFF8024_ENCODING_PAM4 = 0x08, -+ -+ SFF8024_CONNECTOR_UNSPEC = 0x00, -+ /* codes 01-05 not supportable on SFP, but some modules have single SC */ -+ SFF8024_CONNECTOR_SC = 0x01, -+ SFF8024_CONNECTOR_FIBERJACK = 0x06, -+ SFF8024_CONNECTOR_LC = 0x07, -+ SFF8024_CONNECTOR_MT_RJ = 0x08, -+ SFF8024_CONNECTOR_MU = 0x09, -+ SFF8024_CONNECTOR_SG = 0x0a, -+ SFF8024_CONNECTOR_OPTICAL_PIGTAIL= 0x0b, -+ SFF8024_CONNECTOR_MPO_1X12 = 0x0c, -+ SFF8024_CONNECTOR_MPO_2X16 = 0x0d, -+ SFF8024_CONNECTOR_HSSDC_II = 0x20, -+ SFF8024_CONNECTOR_COPPER_PIGTAIL= 0x21, -+ SFF8024_CONNECTOR_RJ45 = 0x22, -+ SFF8024_CONNECTOR_NOSEPARATE = 0x23, -+ SFF8024_CONNECTOR_MXC_2X16 = 0x24, -+ -+ SFF8024_ECC_UNSPEC = 0x00, -+ SFF8024_ECC_100G_25GAUI_C2M_AOC = 0x01, -+ SFF8024_ECC_100GBASE_SR4_25GBASE_SR = 0x02, -+ SFF8024_ECC_100GBASE_LR4_25GBASE_LR = 0x03, -+ SFF8024_ECC_100GBASE_ER4_25GBASE_ER = 0x04, -+ SFF8024_ECC_100GBASE_SR10 = 0x05, -+ SFF8024_ECC_100GBASE_CR4 = 0x0b, -+ SFF8024_ECC_25GBASE_CR_S = 0x0c, -+ SFF8024_ECC_25GBASE_CR_N = 0x0d, -+ SFF8024_ECC_10GBASE_T_SFI = 0x16, -+ SFF8024_ECC_10GBASE_T_SR = 0x1c, -+ SFF8024_ECC_5GBASE_T = 0x1d, -+ SFF8024_ECC_2_5GBASE_T = 0x1e, -+}; -+ - /* SFP EEPROM registers */ - enum { - SFP_PHYS_ID = 0x00, -@@ -309,34 +364,7 @@ enum { - SFP_SFF8472_COMPLIANCE = 0x5e, - SFP_CC_EXT = 0x5f, - -- SFP_PHYS_ID_SFF = 0x02, -- SFP_PHYS_ID_SFP = 0x03, - SFP_PHYS_EXT_ID_SFP = 0x04, -- SFP_CONNECTOR_UNSPEC = 0x00, -- /* codes 01-05 not supportable on SFP, but some modules have single SC */ -- SFP_CONNECTOR_SC = 0x01, -- SFP_CONNECTOR_FIBERJACK = 0x06, -- SFP_CONNECTOR_LC = 0x07, -- SFP_CONNECTOR_MT_RJ = 0x08, -- SFP_CONNECTOR_MU = 0x09, -- SFP_CONNECTOR_SG = 0x0a, -- SFP_CONNECTOR_OPTICAL_PIGTAIL = 0x0b, -- SFP_CONNECTOR_MPO_1X12 = 0x0c, -- SFP_CONNECTOR_MPO_2X16 = 0x0d, -- SFP_CONNECTOR_HSSDC_II = 0x20, -- SFP_CONNECTOR_COPPER_PIGTAIL = 0x21, -- SFP_CONNECTOR_RJ45 = 0x22, -- SFP_CONNECTOR_NOSEPARATE = 0x23, -- SFP_CONNECTOR_MXC_2X16 = 0x24, -- SFP_ENCODING_UNSPEC = 0x00, -- SFP_ENCODING_8B10B = 0x01, -- SFP_ENCODING_4B5B = 0x02, -- SFP_ENCODING_NRZ = 0x03, -- SFP_ENCODING_8472_MANCHESTER = 0x04, -- SFP_ENCODING_8472_SONET = 0x05, -- SFP_ENCODING_8472_64B66B = 0x06, -- SFP_ENCODING_256B257B = 0x07, -- SFP_ENCODING_PAM4 = 0x08, - SFP_OPTIONS_HIGH_POWER_LEVEL = BIT(13), - SFP_OPTIONS_PAGING_A2 = BIT(12), - SFP_OPTIONS_RETIMER = BIT(11), diff --git a/target/linux/generic/pending-4.19/743-net-sfp-add-module-start-stop-upstream-notifications.patch b/target/linux/generic/pending-4.19/743-net-sfp-add-module-start-stop-upstream-notifications.patch deleted file mode 100644 index c0c3e9e57e..0000000000 --- a/target/linux/generic/pending-4.19/743-net-sfp-add-module-start-stop-upstream-notifications.patch +++ /dev/null @@ -1,131 +0,0 @@ -From f9a5a54b59cb904b37bf7409a43635ab195d0214 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 19 Nov 2019 10:13:25 +0000 -Subject: [PATCH 646/660] net: sfp: add module start/stop upstream - notifications - -When dealing with some copper modules, we can't positively know the -module capabilities are until we have probed the PHY. Without the full -capabilities, we may end up failing a module that we could otherwise -drive with a restricted set of capabilities. - -An example of this would be a module with a NBASE-T PHY plugged into -a host that supports phy interface modes 2500BASE-X and SGMII. The -PHY supports 10GBASE-R, 5000BASE-X, 2500BASE-X, SGMII interface modes, -which means a subset of the capabilities are compatible with the host. - -However, reading the module EEPROM leads us to believe that the module -only supports ethtool link mode 10GBASE-T, which is incompatible with -the host - and thus results in the module being rejected. - -This patch adds an extra notification which are triggered after the -SFP module's PHY probe, and a corresponding notification just before -the PHY is removed. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp-bus.c | 21 +++++++++++++++++++++ - drivers/net/phy/sfp.c | 8 ++++++++ - drivers/net/phy/sfp.h | 2 ++ - include/linux/sfp.h | 4 ++++ - 4 files changed, 35 insertions(+) - ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -711,6 +711,27 @@ void sfp_module_remove(struct sfp_bus *b - } - EXPORT_SYMBOL_GPL(sfp_module_remove); - -+int sfp_module_start(struct sfp_bus *bus) -+{ -+ const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus); -+ int ret = 0; -+ -+ if (ops && ops->module_start) -+ ret = ops->module_start(bus->upstream); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(sfp_module_start); -+ -+void sfp_module_stop(struct sfp_bus *bus) -+{ -+ const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus); -+ -+ if (ops && ops->module_stop) -+ ops->module_stop(bus->upstream); -+} -+EXPORT_SYMBOL_GPL(sfp_module_stop); -+ - static void sfp_socket_clear(struct sfp_bus *bus) - { - bus->sfp_dev = NULL; ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -57,6 +57,7 @@ enum { - SFP_DEV_UP, - - SFP_S_DOWN = 0, -+ SFP_S_FAIL, - SFP_S_WAIT, - SFP_S_INIT, - SFP_S_INIT_TX_FAULT, -@@ -120,6 +121,7 @@ static const char *event_to_str(unsigned - - static const char * const sm_state_strings[] = { - [SFP_S_DOWN] = "down", -+ [SFP_S_FAIL] = "fail", - [SFP_S_WAIT] = "wait", - [SFP_S_INIT] = "init", - [SFP_S_INIT_TX_FAULT] = "init_tx_fault", -@@ -1766,6 +1768,8 @@ static void sfp_sm_main(struct sfp *sfp, - if (sfp->sm_state == SFP_S_LINK_UP && - sfp->sm_dev_state == SFP_DEV_UP) - sfp_sm_link_down(sfp); -+ if (sfp->sm_state > SFP_S_INIT) -+ sfp_module_stop(sfp->sfp_bus); - if (sfp->mod_phy) - sfp_sm_phy_detach(sfp); - sfp_module_tx_disable(sfp); -@@ -1833,6 +1837,10 @@ static void sfp_sm_main(struct sfp *sfp, - * clear. Probe for the PHY and check the LOS state. - */ - sfp_sm_probe_for_phy(sfp); -+ if (sfp_module_start(sfp->sfp_bus)) { -+ sfp_sm_next(sfp, SFP_S_FAIL, 0); -+ break; -+ } - sfp_sm_link_check_los(sfp); - - /* Reset the fault retry count */ ---- a/drivers/net/phy/sfp.h -+++ b/drivers/net/phy/sfp.h -@@ -22,6 +22,8 @@ void sfp_link_up(struct sfp_bus *bus); - void sfp_link_down(struct sfp_bus *bus); - int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id); - void sfp_module_remove(struct sfp_bus *bus); -+int sfp_module_start(struct sfp_bus *bus); -+void sfp_module_stop(struct sfp_bus *bus); - int sfp_link_configure(struct sfp_bus *bus, const struct sfp_eeprom_id *id); - struct sfp_bus *sfp_register_socket(struct device *dev, struct sfp *sfp, - const struct sfp_socket_ops *ops); ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -507,6 +507,8 @@ struct sfp_bus; - * @module_insert: called after a module has been detected to determine - * whether the module is supported for the upstream device. - * @module_remove: called after the module has been removed. -+ * @module_start: called after the PHY probe step -+ * @module_stop: called before the PHY is removed - * @link_down: called when the link is non-operational for whatever - * reason. - * @link_up: called when the link is operational. -@@ -520,6 +522,8 @@ struct sfp_upstream_ops { - void (*detach)(void *priv, struct sfp_bus *bus); - int (*module_insert)(void *priv, const struct sfp_eeprom_id *id); - void (*module_remove)(void *priv); -+ int (*module_start)(void *priv); -+ void (*module_stop)(void *priv); - void (*link_down)(void *priv); - void (*link_up)(void *priv); - int (*connect_phy)(void *priv, struct phy_device *); diff --git a/target/linux/generic/pending-4.19/744-net-sfp-move-phy_start-phy_stop-to-phylink.patch b/target/linux/generic/pending-4.19/744-net-sfp-move-phy_start-phy_stop-to-phylink.patch deleted file mode 100644 index a646fcd409..0000000000 --- a/target/linux/generic/pending-4.19/744-net-sfp-move-phy_start-phy_stop-to-phylink.patch +++ /dev/null @@ -1,72 +0,0 @@ -From e2dc261b872a92a055eb2e86ac136baf9b20f2f2 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 21 Nov 2019 17:21:33 +0000 -Subject: [PATCH 647/660] net: sfp: move phy_start()/phy_stop() to phylink - -Move phy_start() and phy_stop() into the module_start and module_stop -notifications in phylink, rather than having them in the SFP code. -This gives phylink responsibility for controlling the PHY, rather -than having SFP start and stop the PHY state machine. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 22 ++++++++++++++++++++++ - drivers/net/phy/sfp.c | 2 -- - 2 files changed, 22 insertions(+), 2 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1717,6 +1717,26 @@ static int phylink_sfp_module_insert(voi - return ret; - } - -+static int phylink_sfp_module_start(void *upstream) -+{ -+ struct phylink *pl = upstream; -+ -+ /* If this SFP module has a PHY, start the PHY now. */ -+ if (pl->phydev) -+ phy_start(pl->phydev); -+ -+ return 0; -+} -+ -+static void phylink_sfp_module_stop(void *upstream) -+{ -+ struct phylink *pl = upstream; -+ -+ /* If this SFP module has a PHY, stop it. */ -+ if (pl->phydev) -+ phy_stop(pl->phydev); -+} -+ - static void phylink_sfp_link_down(void *upstream) - { - struct phylink *pl = upstream; -@@ -1752,6 +1772,8 @@ static const struct sfp_upstream_ops sfp - .attach = phylink_sfp_attach, - .detach = phylink_sfp_detach, - .module_insert = phylink_sfp_module_insert, -+ .module_start = phylink_sfp_module_start, -+ .module_stop = phylink_sfp_module_stop, - .link_up = phylink_sfp_link_up, - .link_down = phylink_sfp_link_down, - .connect_phy = phylink_sfp_connect_phy, ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1331,7 +1331,6 @@ static void sfp_sm_mod_next(struct sfp * - - static void sfp_sm_phy_detach(struct sfp *sfp) - { -- phy_stop(sfp->mod_phy); - sfp_remove_phy(sfp->sfp_bus); - phy_device_remove(sfp->mod_phy); - phy_device_free(sfp->mod_phy); -@@ -1362,7 +1361,6 @@ static void sfp_sm_probe_phy(struct sfp - } - - sfp->mod_phy = phy; -- phy_start(phy); - } - - static void sfp_sm_link_up(struct sfp *sfp) diff --git a/target/linux/generic/pending-4.19/745-net-mdio-i2c-add-support-for-Clause-45-accesses.patch b/target/linux/generic/pending-4.19/745-net-mdio-i2c-add-support-for-Clause-45-accesses.patch deleted file mode 100644 index 9a4bb5bb78..0000000000 --- a/target/linux/generic/pending-4.19/745-net-mdio-i2c-add-support-for-Clause-45-accesses.patch +++ /dev/null @@ -1,74 +0,0 @@ -From c9de73988a35c6c85810a992954ac568cca503e5 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Wed, 2 Oct 2019 10:31:10 +0100 -Subject: [PATCH 648/660] net: mdio-i2c: add support for Clause 45 accesses - -Some SFP+ modules have PHYs on them just like SFP modules do, except -they are Clause 45 PHYs. The I2C protocol used to access them is -modified slightly in order to send the device address and 16-bit -register index. - -Signed-off-by: Russell King ---- - drivers/net/phy/mdio-i2c.c | 28 ++++++++++++++++++++-------- - 1 file changed, 20 insertions(+), 8 deletions(-) - ---- a/drivers/net/phy/mdio-i2c.c -+++ b/drivers/net/phy/mdio-i2c.c -@@ -36,17 +36,24 @@ static int i2c_mii_read(struct mii_bus * - { - struct i2c_adapter *i2c = bus->priv; - struct i2c_msg msgs[2]; -- u8 data[2], dev_addr = reg; -+ u8 addr[3], data[2], *p; - int bus_addr, ret; - - if (!i2c_mii_valid_phy_id(phy_id)) - return 0xffff; - -+ p = addr; -+ if (reg & MII_ADDR_C45) { -+ *p++ = 0x20 | ((reg >> 16) & 31); -+ *p++ = reg >> 8; -+ } -+ *p++ = reg; -+ - bus_addr = i2c_mii_phy_addr(phy_id); - msgs[0].addr = bus_addr; - msgs[0].flags = 0; -- msgs[0].len = 1; -- msgs[0].buf = &dev_addr; -+ msgs[0].len = p - addr; -+ msgs[0].buf = addr; - msgs[1].addr = bus_addr; - msgs[1].flags = I2C_M_RD; - msgs[1].len = sizeof(data); -@@ -64,18 +71,23 @@ static int i2c_mii_write(struct mii_bus - struct i2c_adapter *i2c = bus->priv; - struct i2c_msg msg; - int ret; -- u8 data[3]; -+ u8 data[5], *p; - - if (!i2c_mii_valid_phy_id(phy_id)) - return 0; - -- data[0] = reg; -- data[1] = val >> 8; -- data[2] = val; -+ p = data; -+ if (reg & MII_ADDR_C45) { -+ *p++ = (reg >> 16) & 31; -+ *p++ = reg >> 8; -+ } -+ *p++ = reg; -+ *p++ = val >> 8; -+ *p++ = val; - - msg.addr = i2c_mii_phy_addr(phy_id); - msg.flags = 0; -- msg.len = 3; -+ msg.len = p - data; - msg.buf = data; - - ret = i2c_transfer(i2c, &msg, 1); diff --git a/target/linux/generic/pending-4.19/746-net-phylink-re-split-__phylink_connect_phy.patch b/target/linux/generic/pending-4.19/746-net-phylink-re-split-__phylink_connect_phy.patch deleted file mode 100644 index c74a56c575..0000000000 --- a/target/linux/generic/pending-4.19/746-net-phylink-re-split-__phylink_connect_phy.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 0db7fba746b5608c30d4e2ba1c99a2a309e2d288 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 8 Nov 2019 15:22:48 +0000 -Subject: [PATCH 649/660] net: phylink: re-split __phylink_connect_phy() - -In order to support Clause 45 PHYs on SFP+ modules, which have an -indeterminant phy interface mode, we need to be able to call -phylink_bringup_phy() with a different interface mode to that used when -binding the PHY. Reduce __phylink_connect_phy() to an attach operation, -and move the call to phylink_bringup_phy() to its call sites. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 39 ++++++++++++++++++++++++--------------- - 1 file changed, 24 insertions(+), 15 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -728,11 +728,9 @@ static int phylink_bringup_phy(struct ph - return 0; - } - --static int __phylink_connect_phy(struct phylink *pl, struct phy_device *phy, -- phy_interface_t interface) -+static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, -+ phy_interface_t interface) - { -- int ret; -- - if (WARN_ON(pl->link_an_mode == MLO_AN_FIXED || - (pl->link_an_mode == MLO_AN_INBAND && - phy_interface_mode_is_8023z(interface)))) -@@ -741,15 +739,7 @@ static int __phylink_connect_phy(struct - if (pl->phydev) - return -EBUSY; - -- ret = phy_attach_direct(pl->netdev, phy, 0, interface); -- if (ret) -- return ret; -- -- ret = phylink_bringup_phy(pl, phy); -- if (ret) -- phy_detach(phy); -- -- return ret; -+ return phy_attach_direct(pl->netdev, phy, 0, interface); - } - - /** -@@ -769,13 +759,23 @@ static int __phylink_connect_phy(struct - */ - int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) - { -+ int ret; -+ - /* Use PHY device/driver interface */ - if (pl->link_interface == PHY_INTERFACE_MODE_NA) { - pl->link_interface = phy->interface; - pl->link_config.interface = pl->link_interface; - } - -- return __phylink_connect_phy(pl, phy, pl->link_interface); -+ ret = phylink_attach_phy(pl, phy, pl->link_interface); -+ if (ret < 0) -+ return ret; -+ -+ ret = phylink_bringup_phy(pl, phy); -+ if (ret) -+ phy_detach(phy); -+ -+ return ret; - } - EXPORT_SYMBOL_GPL(phylink_connect_phy); - -@@ -1759,8 +1759,17 @@ static void phylink_sfp_link_up(void *up - static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) - { - struct phylink *pl = upstream; -+ int ret; - -- return __phylink_connect_phy(upstream, phy, pl->link_config.interface); -+ ret = phylink_attach_phy(pl, phy, pl->link_config.interface); -+ if (ret < 0) -+ return ret; -+ -+ ret = phylink_bringup_phy(pl, phy); -+ if (ret) -+ phy_detach(phy); -+ -+ return ret; - } - - static void phylink_sfp_disconnect_phy(void *upstream) diff --git a/target/linux/generic/pending-4.19/747-net-phylink-support-Clause-45-PHYs-on-SFP-modules.patch b/target/linux/generic/pending-4.19/747-net-phylink-support-Clause-45-PHYs-on-SFP-modules.patch deleted file mode 100644 index 2cea118c82..0000000000 --- a/target/linux/generic/pending-4.19/747-net-phylink-support-Clause-45-PHYs-on-SFP-modules.patch +++ /dev/null @@ -1,89 +0,0 @@ -From caf32f96f13df7d3ae6cb8bf8001c88ae22025ca Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 8 Nov 2019 15:28:22 +0000 -Subject: [PATCH 650/660] net: phylink: support Clause 45 PHYs on SFP+ modules - -Some SFP+ modules have Clause 45 PHYs embedded on them, which need a -little more handling in order to ensure that they are correctly setup, -as they switch the PHY link mode according to the negotiated speed. - -With Clause 22 PHYs, we assumed that they would operate in SGMII mode, -but this assumption is now false. Adapt phylink to support Clause 45 -PHYs on SFP+ modules. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 21 ++++++++++++++++----- - 1 file changed, 16 insertions(+), 5 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -671,7 +671,8 @@ static void phylink_phy_change(struct ph - phy_duplex_to_str(phydev->duplex)); - } - --static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy) -+static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, -+ phy_interface_t interface) - { - struct phylink_link_state config; - __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); -@@ -691,7 +692,7 @@ static int phylink_bringup_phy(struct ph - ethtool_convert_legacy_u32_to_link_mode(supported, phy->supported); - ethtool_convert_legacy_u32_to_link_mode(config.advertising, - phy->advertising); -- config.interface = pl->link_config.interface; -+ config.interface = interface; - - ret = phylink_validate(pl, supported, &config); - if (ret) -@@ -707,6 +708,7 @@ static int phylink_bringup_phy(struct ph - mutex_lock(&phy->lock); - mutex_lock(&pl->state_mutex); - pl->phydev = phy; -+ pl->phy_state.interface = interface; - linkmode_copy(pl->supported, supported); - linkmode_copy(pl->link_config.advertising, config.advertising); - -@@ -771,7 +773,7 @@ int phylink_connect_phy(struct phylink * - if (ret < 0) - return ret; - -- ret = phylink_bringup_phy(pl, phy); -+ ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); - if (ret) - phy_detach(phy); - -@@ -824,7 +826,7 @@ int phylink_of_phy_connect(struct phylin - if (!phy_dev) - return -ENODEV; - -- ret = phylink_bringup_phy(pl, phy_dev); -+ ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); - if (ret) - phy_detach(phy_dev); - -@@ -1759,13 +1761,22 @@ static void phylink_sfp_link_up(void *up - static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) - { - struct phylink *pl = upstream; -+ phy_interface_t interface = pl->link_config.interface; - int ret; - - ret = phylink_attach_phy(pl, phy, pl->link_config.interface); - if (ret < 0) - return ret; - -- ret = phylink_bringup_phy(pl, phy); -+ /* Clause 45 PHYs switch their Serdes lane between several different -+ * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G -+ * speeds. We really need to know which interface modes the PHY and -+ * MAC supports to properly work out which linkmodes can be supported. -+ */ -+ if (phy->is_c45) -+ interface = PHY_INTERFACE_MODE_NA; -+ -+ ret = phylink_bringup_phy(pl, phy, interface); - if (ret) - phy_detach(phy); - diff --git a/target/linux/generic/pending-4.19/748-net-phylink-split-link_an_mode-configured-and-curren.patch b/target/linux/generic/pending-4.19/748-net-phylink-split-link_an_mode-configured-and-curren.patch deleted file mode 100644 index f30d37f0c6..0000000000 --- a/target/linux/generic/pending-4.19/748-net-phylink-split-link_an_mode-configured-and-curren.patch +++ /dev/null @@ -1,254 +0,0 @@ -From d1339d6956f0255b6ce2412328a98945be8cc3ca Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 16 Nov 2019 11:30:18 +0000 -Subject: [PATCH 651/660] net: phylink: split link_an_mode configured and - current settings - -Split link_an_mode between the configured setting and the current -operating setting. This is an important distinction to make when we -need to configure PHY mode for a plugged SFP+ module that does not -use in-band signalling. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 59 ++++++++++++++++++++------------------- - 1 file changed, 31 insertions(+), 28 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -48,7 +48,8 @@ struct phylink { - unsigned long phylink_disable_state; /* bitmask of disables */ - struct phy_device *phydev; - phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ -- u8 link_an_mode; /* MLO_AN_xxx */ -+ u8 cfg_link_an_mode; /* MLO_AN_xxx */ -+ u8 cur_link_an_mode; - u8 link_port; /* The current non-phy ethtool port */ - __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); - -@@ -253,12 +254,12 @@ static int phylink_parse_mode(struct phy - - dn = fwnode_get_named_child_node(fwnode, "fixed-link"); - if (dn || fwnode_property_present(fwnode, "fixed-link")) -- pl->link_an_mode = MLO_AN_FIXED; -+ pl->cfg_link_an_mode = MLO_AN_FIXED; - fwnode_handle_put(dn); - - if (fwnode_property_read_string(fwnode, "managed", &managed) == 0 && - strcmp(managed, "in-band-status") == 0) { -- if (pl->link_an_mode == MLO_AN_FIXED) { -+ if (pl->cfg_link_an_mode == MLO_AN_FIXED) { - netdev_err(pl->netdev, - "can't use both fixed-link and in-band-status\n"); - return -EINVAL; -@@ -270,7 +271,7 @@ static int phylink_parse_mode(struct phy - phylink_set(pl->supported, Asym_Pause); - phylink_set(pl->supported, Pause); - pl->link_config.an_enabled = true; -- pl->link_an_mode = MLO_AN_INBAND; -+ pl->cfg_link_an_mode = MLO_AN_INBAND; - - switch (pl->link_config.interface) { - case PHY_INTERFACE_MODE_SGMII: -@@ -330,14 +331,14 @@ static void phylink_mac_config(struct ph - { - netdev_dbg(pl->netdev, - "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", -- __func__, phylink_an_mode_str(pl->link_an_mode), -+ __func__, phylink_an_mode_str(pl->cur_link_an_mode), - phy_modes(state->interface), - phy_speed_to_str(state->speed), - phy_duplex_to_str(state->duplex), - __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, - state->pause, state->link, state->an_enabled); - -- pl->ops->mac_config(pl->netdev, pl->link_an_mode, state); -+ pl->ops->mac_config(pl->netdev, pl->cur_link_an_mode, state); - } - - static void phylink_mac_config_up(struct phylink *pl, -@@ -446,7 +447,7 @@ static void phylink_resolve(struct work_ - } else if (pl->mac_link_dropped) { - link_state.link = false; - } else { -- switch (pl->link_an_mode) { -+ switch (pl->cur_link_an_mode) { - case MLO_AN_PHY: - link_state = pl->phy_state; - phylink_resolve_flow(pl, &link_state); -@@ -483,12 +484,12 @@ static void phylink_resolve(struct work_ - if (link_state.link != netif_carrier_ok(ndev)) { - if (!link_state.link) { - netif_carrier_off(ndev); -- pl->ops->mac_link_down(ndev, pl->link_an_mode, -+ pl->ops->mac_link_down(ndev, pl->cur_link_an_mode, - pl->cur_interface); - netdev_info(ndev, "Link is Down\n"); - } else { - pl->cur_interface = link_state.interface; -- pl->ops->mac_link_up(ndev, pl->link_an_mode, -+ pl->ops->mac_link_up(ndev, pl->cur_link_an_mode, - pl->cur_interface, pl->phydev); - - netif_carrier_on(ndev); -@@ -610,7 +611,7 @@ struct phylink *phylink_create(struct ne - return ERR_PTR(ret); - } - -- if (pl->link_an_mode == MLO_AN_FIXED) { -+ if (pl->cfg_link_an_mode == MLO_AN_FIXED) { - ret = phylink_parse_fixedlink(pl, fwnode); - if (ret < 0) { - kfree(pl); -@@ -618,6 +619,8 @@ struct phylink *phylink_create(struct ne - } - } - -+ pl->cur_link_an_mode = pl->cfg_link_an_mode; -+ - ret = phylink_register_sfp(pl, fwnode); - if (ret < 0) { - kfree(pl); -@@ -733,8 +736,8 @@ static int phylink_bringup_phy(struct ph - static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, - phy_interface_t interface) - { -- if (WARN_ON(pl->link_an_mode == MLO_AN_FIXED || -- (pl->link_an_mode == MLO_AN_INBAND && -+ if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || -+ (pl->cfg_link_an_mode == MLO_AN_INBAND && - phy_interface_mode_is_8023z(interface)))) - return -EINVAL; - -@@ -801,8 +804,8 @@ int phylink_of_phy_connect(struct phylin - int ret; - - /* Fixed links and 802.3z are handled without needing a PHY */ -- if (pl->link_an_mode == MLO_AN_FIXED || -- (pl->link_an_mode == MLO_AN_INBAND && -+ if (pl->cfg_link_an_mode == MLO_AN_FIXED || -+ (pl->cfg_link_an_mode == MLO_AN_INBAND && - phy_interface_mode_is_8023z(pl->link_interface))) - return 0; - -@@ -813,7 +816,7 @@ int phylink_of_phy_connect(struct phylin - phy_node = of_parse_phandle(dn, "phy-device", 0); - - if (!phy_node) { -- if (pl->link_an_mode == MLO_AN_PHY) -+ if (pl->cfg_link_an_mode == MLO_AN_PHY) - return -ENODEV; - return 0; - } -@@ -876,7 +879,7 @@ int phylink_fixed_state_cb(struct phylin - /* It does not make sense to let the link be overriden unless we use - * MLO_AN_FIXED - */ -- if (pl->link_an_mode != MLO_AN_FIXED) -+ if (pl->cfg_link_an_mode != MLO_AN_FIXED) - return -EINVAL; - - mutex_lock(&pl->state_mutex); -@@ -926,7 +929,7 @@ void phylink_start(struct phylink *pl) - ASSERT_RTNL(); - - netdev_info(pl->netdev, "configuring for %s/%s link mode\n", -- phylink_an_mode_str(pl->link_an_mode), -+ phylink_an_mode_str(pl->cur_link_an_mode), - phy_modes(pl->link_config.interface)); - - /* Always set the carrier off */ -@@ -948,7 +951,7 @@ void phylink_start(struct phylink *pl) - clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); - phylink_run_resolve(pl); - -- if (pl->link_an_mode == MLO_AN_FIXED && pl->link_gpio) { -+ if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { - int irq = gpiod_to_irq(pl->link_gpio); - - if (irq > 0) { -@@ -963,7 +966,7 @@ void phylink_start(struct phylink *pl) - if (irq <= 0) - mod_timer(&pl->link_poll, jiffies + HZ); - } -- if (pl->link_an_mode == MLO_AN_FIXED && pl->get_fixed_state) -+ if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->get_fixed_state) - mod_timer(&pl->link_poll, jiffies + HZ); - if (pl->phydev) - phy_start(pl->phydev); -@@ -1090,7 +1093,7 @@ int phylink_ethtool_ksettings_get(struct - - linkmode_copy(kset->link_modes.supported, pl->supported); - -- switch (pl->link_an_mode) { -+ switch (pl->cur_link_an_mode) { - case MLO_AN_FIXED: - /* We are using fixed settings. Report these as the - * current link settings - and note that these also -@@ -1163,7 +1166,7 @@ int phylink_ethtool_ksettings_set(struct - /* If we have a fixed link (as specified by firmware), refuse - * to change link parameters. - */ -- if (pl->link_an_mode == MLO_AN_FIXED && -+ if (pl->cur_link_an_mode == MLO_AN_FIXED && - (s->speed != pl->link_config.speed || - s->duplex != pl->link_config.duplex)) - return -EINVAL; -@@ -1175,7 +1178,7 @@ int phylink_ethtool_ksettings_set(struct - __clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising); - } else { - /* If we have a fixed link, refuse to enable autonegotiation */ -- if (pl->link_an_mode == MLO_AN_FIXED) -+ if (pl->cur_link_an_mode == MLO_AN_FIXED) - return -EINVAL; - - config.speed = SPEED_UNKNOWN; -@@ -1217,7 +1220,7 @@ int phylink_ethtool_ksettings_set(struct - * configuration. For a fixed link, this isn't able to change any - * parameters, which just leaves inband mode. - */ -- if (pl->link_an_mode == MLO_AN_INBAND && -+ if (pl->cur_link_an_mode == MLO_AN_INBAND && - !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { - phylink_mac_config(pl, &pl->link_config); - phylink_mac_an_restart(pl); -@@ -1307,7 +1310,7 @@ int phylink_ethtool_set_pauseparam(struc - pause->tx_pause); - } else if (!test_bit(PHYLINK_DISABLE_STOPPED, - &pl->phylink_disable_state)) { -- switch (pl->link_an_mode) { -+ switch (pl->cur_link_an_mode) { - case MLO_AN_FIXED: - /* Should we allow fixed links to change against the config? */ - phylink_resolve_flow(pl, config); -@@ -1496,7 +1499,7 @@ static int phylink_mii_read(struct phyli - struct phylink_link_state state; - int val = 0xffff; - -- switch (pl->link_an_mode) { -+ switch (pl->cur_link_an_mode) { - case MLO_AN_FIXED: - if (phy_id == 0) { - phylink_get_fixed_state(pl, &state); -@@ -1524,7 +1527,7 @@ static int phylink_mii_read(struct phyli - static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, - unsigned int reg, unsigned int val) - { -- switch (pl->link_an_mode) { -+ switch (pl->cur_link_an_mode) { - case MLO_AN_FIXED: - break; - -@@ -1698,10 +1701,10 @@ static int phylink_sfp_module_insert(voi - linkmode_copy(pl->link_config.advertising, config.advertising); - } - -- if (pl->link_an_mode != MLO_AN_INBAND || -+ if (pl->cur_link_an_mode != MLO_AN_INBAND || - pl->link_config.interface != config.interface) { - pl->link_config.interface = config.interface; -- pl->link_an_mode = MLO_AN_INBAND; -+ pl->cur_link_an_mode = MLO_AN_INBAND; - - changed = true; - diff --git a/target/linux/generic/pending-4.19/749-net-phylink-split-phylink_sfp_module_insert.patch b/target/linux/generic/pending-4.19/749-net-phylink-split-phylink_sfp_module_insert.patch deleted file mode 100644 index 87d70d1434..0000000000 --- a/target/linux/generic/pending-4.19/749-net-phylink-split-phylink_sfp_module_insert.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 36569971241ae6b81376da4937d2c8760122d10b Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 21 Nov 2019 17:58:58 +0000 -Subject: [PATCH 652/660] net: phylink: split phylink_sfp_module_insert() - -Split out the configuration step from phylink_sfp_module_insert() so -we can re-use this later. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 47 +++++++++++++++++++++++---------------- - 1 file changed, 28 insertions(+), 19 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1633,25 +1633,21 @@ static void phylink_sfp_detach(void *ups - pl->netdev->sfp_bus = NULL; - } - --static int phylink_sfp_module_insert(void *upstream, -- const struct sfp_eeprom_id *id) -+static int phylink_sfp_config(struct phylink *pl, u8 mode, u8 port, -+ const unsigned long *supported, -+ const unsigned long *advertising) - { -- struct phylink *pl = upstream; -- __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, }; - __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(support); - struct phylink_link_state config; - phy_interface_t iface; -- int ret = 0; - bool changed; -- u8 port; -+ int ret; - -- ASSERT_RTNL(); -- -- sfp_parse_support(pl->sfp_bus, id, support); -- port = sfp_parse_port(pl->sfp_bus, id, support); -+ linkmode_copy(support, supported); - - memset(&config, 0, sizeof(config)); -- linkmode_copy(config.advertising, support); -+ linkmode_copy(config.advertising, advertising); - config.interface = PHY_INTERFACE_MODE_NA; - config.speed = SPEED_UNKNOWN; - config.duplex = DUPLEX_UNKNOWN; -@@ -1666,8 +1662,6 @@ static int phylink_sfp_module_insert(voi - return ret; - } - -- linkmode_copy(support1, support); -- - iface = sfp_select_interface(pl->sfp_bus, config.advertising); - if (iface == PHY_INTERFACE_MODE_NA) { - netdev_err(pl->netdev, -@@ -1677,18 +1671,18 @@ static int phylink_sfp_module_insert(voi - } - - config.interface = iface; -+ linkmode_copy(support1, support); - ret = phylink_validate(pl, support1, &config); - if (ret) { - netdev_err(pl->netdev, "validation of %s/%s with support %*pb failed: %d\n", -- phylink_an_mode_str(MLO_AN_INBAND), -+ phylink_an_mode_str(mode), - phy_modes(config.interface), - __ETHTOOL_LINK_MODE_MASK_NBITS, support, ret); - return ret; - } - - netdev_dbg(pl->netdev, "requesting link mode %s/%s with support %*pb\n", -- phylink_an_mode_str(MLO_AN_INBAND), -- phy_modes(config.interface), -+ phylink_an_mode_str(mode), phy_modes(config.interface), - __ETHTOOL_LINK_MODE_MASK_NBITS, support); - - if (phy_interface_mode_is_8023z(iface) && pl->phydev) -@@ -1701,15 +1695,15 @@ static int phylink_sfp_module_insert(voi - linkmode_copy(pl->link_config.advertising, config.advertising); - } - -- if (pl->cur_link_an_mode != MLO_AN_INBAND || -+ if (pl->cur_link_an_mode != mode || - pl->link_config.interface != config.interface) { - pl->link_config.interface = config.interface; -- pl->cur_link_an_mode = MLO_AN_INBAND; -+ pl->cur_link_an_mode = mode; - - changed = true; - - netdev_info(pl->netdev, "switched to %s/%s link mode\n", -- phylink_an_mode_str(MLO_AN_INBAND), -+ phylink_an_mode_str(mode), - phy_modes(config.interface)); - } - -@@ -1722,6 +1716,21 @@ static int phylink_sfp_module_insert(voi - return ret; - } - -+static int phylink_sfp_module_insert(void *upstream, -+ const struct sfp_eeprom_id *id) -+{ -+ struct phylink *pl = upstream; -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, }; -+ u8 port; -+ -+ ASSERT_RTNL(); -+ -+ sfp_parse_support(pl->sfp_bus, id, support); -+ port = sfp_parse_port(pl->sfp_bus, id, support); -+ -+ return phylink_sfp_config(pl, MLO_AN_INBAND, port, support, support); -+} -+ - static int phylink_sfp_module_start(void *upstream) - { - struct phylink *pl = upstream; diff --git a/target/linux/generic/pending-4.19/750-net-phylink-delay-MAC-configuration-for-copper-SFP-m.patch b/target/linux/generic/pending-4.19/750-net-phylink-delay-MAC-configuration-for-copper-SFP-m.patch deleted file mode 100644 index 358b9a1082..0000000000 --- a/target/linux/generic/pending-4.19/750-net-phylink-delay-MAC-configuration-for-copper-SFP-m.patch +++ /dev/null @@ -1,204 +0,0 @@ -From eb514428f75bc67d12ff019c44a8f8ca9f33c54c Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 21 Nov 2019 17:42:49 +0000 -Subject: [PATCH 653/660] net: phylink: delay MAC configuration for copper SFP - modules - -Knowing whether we need to delay the MAC configuration because a module -may have a PHY is useful to phylink to allow NBASE-T modules to work on -systems supporting no more than 2.5G speeds. - -This commit allows us to delay such configuration until after the PHY -has been probed by recording the parsed capabilities, and if the module -may have a PHY, doing no more until the module_start() notification is -called. At that point, we either have a PHY, or we don't. - -We move the PHY-based setup a little later, and use the PHYs support -capabilities rather than the EEPROM parsed capabilities to determine -whether we can support the PHY. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 59 +++++++++++++++++++++++++++++++-------- - drivers/net/phy/sfp-bus.c | 28 +++++++++++++++++++ - include/linux/sfp.h | 7 +++++ - 3 files changed, 83 insertions(+), 11 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -72,6 +72,9 @@ struct phylink { - bool mac_link_dropped; - - struct sfp_bus *sfp_bus; -+ bool sfp_may_have_phy; -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); -+ u8 sfp_port; - }; - - static inline void linkmode_zero(unsigned long *dst) -@@ -1633,7 +1636,7 @@ static void phylink_sfp_detach(void *ups - pl->netdev->sfp_bus = NULL; - } - --static int phylink_sfp_config(struct phylink *pl, u8 mode, u8 port, -+static int phylink_sfp_config(struct phylink *pl, u8 mode, - const unsigned long *supported, - const unsigned long *advertising) - { -@@ -1707,7 +1710,7 @@ static int phylink_sfp_config(struct phy - phy_modes(config.interface)); - } - -- pl->link_port = port; -+ pl->link_port = pl->sfp_port; - - if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, - &pl->phylink_disable_state)) -@@ -1720,15 +1723,20 @@ static int phylink_sfp_module_insert(voi - const struct sfp_eeprom_id *id) - { - struct phylink *pl = upstream; -- __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, }; -- u8 port; -+ unsigned long *support = pl->sfp_support; - - ASSERT_RTNL(); - -+ linkmode_zero(support); - sfp_parse_support(pl->sfp_bus, id, support); -- port = sfp_parse_port(pl->sfp_bus, id, support); -+ pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support); - -- return phylink_sfp_config(pl, MLO_AN_INBAND, port, support, support); -+ /* If this module may have a PHY connecting later, defer until later */ -+ pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); -+ if (pl->sfp_may_have_phy) -+ return 0; -+ -+ return phylink_sfp_config(pl, MLO_AN_INBAND, support, support); - } - - static int phylink_sfp_module_start(void *upstream) -@@ -1736,10 +1744,19 @@ static int phylink_sfp_module_start(void - struct phylink *pl = upstream; - - /* If this SFP module has a PHY, start the PHY now. */ -- if (pl->phydev) -+ if (pl->phydev) { - phy_start(pl->phydev); -- -- return 0; -+ return 0; -+ } -+ -+ /* If the module may have a PHY but we didn't detect one we -+ * need to configure the MAC here. -+ */ -+ if (!pl->sfp_may_have_phy) -+ return 0; -+ -+ return phylink_sfp_config(pl, MLO_AN_INBAND, -+ pl->sfp_support, pl->sfp_support); - } - - static void phylink_sfp_module_stop(void *upstream) -@@ -1773,10 +1790,30 @@ static void phylink_sfp_link_up(void *up - static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) - { - struct phylink *pl = upstream; -- phy_interface_t interface = pl->link_config.interface; -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); -+ phy_interface_t interface; - int ret; - -- ret = phylink_attach_phy(pl, phy, pl->link_config.interface); -+ /* -+ * This is the new way of dealing with flow control for PHYs, -+ * as described by Timur Tabi in commit 529ed1275263 ("net: phy: -+ * phy drivers should not set SUPPORTED_[Asym_]Pause") except -+ * using our validate call to the MAC, we rely upon the MAC -+ * clearing the bits from both supported and advertising fields. -+ */ -+ phy_support_asym_pause(phy); -+ -+ ethtool_convert_legacy_u32_to_link_mode(supported, phy->supported); -+ ethtool_convert_legacy_u32_to_link_mode(advertising, phy->advertising); -+ -+ /* Do the initial configuration */ -+ ret = phylink_sfp_config(pl, ML_AN_INBAND, supported, advertising); -+ if (ret < 0) -+ return ret; -+ -+ interface = pl->link_config.interface; -+ ret = phylink_attach_phy(pl, phy, interface); - if (ret < 0) - return ret; - ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -102,6 +102,7 @@ static const struct sfp_quirk *sfp_looku - - return NULL; - } -+ - /** - * sfp_parse_port() - Parse the EEPROM base ID, setting the port type - * @bus: a pointer to the &struct sfp_bus structure for the sfp module -@@ -178,6 +179,33 @@ int sfp_parse_port(struct sfp_bus *bus, - EXPORT_SYMBOL_GPL(sfp_parse_port); - - /** -+ * sfp_may_have_phy() - indicate whether the module may have a PHY -+ * @bus: a pointer to the &struct sfp_bus structure for the sfp module -+ * @id: a pointer to the module's &struct sfp_eeprom_id -+ * -+ * Parse the EEPROM identification given in @id, and return whether -+ * this module may have a PHY. -+ */ -+bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id) -+{ -+ if (id->base.e1000_base_t) -+ return true; -+ -+ if (id->base.phys_id != SFF8024_ID_DWDM_SFP) { -+ switch (id->base.extended_cc) { -+ case SFF8024_ECC_10GBASE_T_SFI: -+ case SFF8024_ECC_10GBASE_T_SR: -+ case SFF8024_ECC_5GBASE_T: -+ case SFF8024_ECC_2_5GBASE_T: -+ return true; -+ } -+ } -+ -+ return false; -+} -+EXPORT_SYMBOL_GPL(sfp_may_have_phy); -+ -+/** - * sfp_parse_support() - Parse the eeprom id for supported link modes - * @bus: a pointer to the &struct sfp_bus structure for the sfp module - * @id: a pointer to the module's &struct sfp_eeprom_id ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -533,6 +533,7 @@ struct sfp_upstream_ops { - #if IS_ENABLED(CONFIG_SFP) - int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id, - unsigned long *support); -+bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id); - void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id, - unsigned long *support); - phy_interface_t sfp_select_interface(struct sfp_bus *bus, -@@ -556,6 +557,12 @@ static inline int sfp_parse_port(struct - return PORT_OTHER; - } - -+static inline bool sfp_may_have_phy(struct sfp_bus *bus, -+ const struct sfp_eeprom_id *id) -+{ -+ return false; -+} -+ - static inline void sfp_parse_support(struct sfp_bus *bus, - const struct sfp_eeprom_id *id, - unsigned long *support) diff --git a/target/linux/generic/pending-4.19/751-net-phylink-make-Broadcom-BCM84881-based-SFPs-work.patch b/target/linux/generic/pending-4.19/751-net-phylink-make-Broadcom-BCM84881-based-SFPs-work.patch deleted file mode 100644 index 1724d445b7..0000000000 --- a/target/linux/generic/pending-4.19/751-net-phylink-make-Broadcom-BCM84881-based-SFPs-work.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 3d8592a23dd67fb78ad85ddf711a059d3880fcb4 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 8 Nov 2019 17:19:16 +0000 -Subject: [PATCH 654/660] net: phylink: make Broadcom BCM84881 based SFPs work - -The Broadcom BCM84881 does not appear to send the SGMII control word -when operating in SGMII mode, which causes network adapters to fail -to link with the PHY, or decide to operate at fixed 1G speed, even if -the PHY negotiated 100M. - -Work around this by detecting the Broadcom BCM84881 and switch to phy -mode rather than inband mode. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -1787,12 +1787,22 @@ static void phylink_sfp_link_up(void *up - phylink_run_resolve(pl); - } - -+/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII -+ * or 802.3z control word, so inband will not work. -+ */ -+static bool phylink_phy_no_inband(struct phy_device *phy) -+{ -+ return phy->is_c45 && -+ (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; -+} -+ - static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) - { - struct phylink *pl = upstream; - __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); - __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); - phy_interface_t interface; -+ u8 mode; - int ret; - - /* -@@ -1807,8 +1817,13 @@ static int phylink_sfp_connect_phy(void - ethtool_convert_legacy_u32_to_link_mode(supported, phy->supported); - ethtool_convert_legacy_u32_to_link_mode(advertising, phy->advertising); - -+ if (phylink_phy_no_inband(phy)) -+ mode = MLO_AN_PHY; -+ else -+ mode = MLO_AN_INBAND; -+ - /* Do the initial configuration */ -- ret = phylink_sfp_config(pl, ML_AN_INBAND, supported, advertising); -+ ret = phylink_sfp_config(pl, mode, supported, advertising); - if (ret < 0) - return ret; - diff --git a/target/linux/generic/pending-4.19/752-net-phy-add-Broadcom-BCM84881-PHY-driver.patch b/target/linux/generic/pending-4.19/752-net-phy-add-Broadcom-BCM84881-PHY-driver.patch deleted file mode 100644 index a69cf397aa..0000000000 --- a/target/linux/generic/pending-4.19/752-net-phy-add-Broadcom-BCM84881-PHY-driver.patch +++ /dev/null @@ -1,333 +0,0 @@ -From 0f669e10ede7f06bb998373de6a9d169f47fcc66 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 5 Nov 2019 11:54:30 +0000 -Subject: [PATCH 655/660] net: phy: add Broadcom BCM84881 PHY driver - -Add a rudimentary Clause 45 driver for the BCM84881 PHY, found on -Methode DM7052 SFPs. - -Signed-off-by: Russell King ---- - drivers/net/phy/Kconfig | 5 + - drivers/net/phy/Makefile | 1 + - drivers/net/phy/bcm84881.c | 290 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 296 insertions(+) - create mode 100644 drivers/net/phy/bcm84881.c - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -280,6 +280,11 @@ config BROADCOM_PHY - Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464, - BCM5481, BCM54810 and BCM5482 PHYs. - -+config BCM84881_PHY -+ tristate "Broadcom BCM84881 PHY" -+ ---help--- -+ Support the Broadcom BCM84881 PHY. -+ - config CICADA_PHY - tristate "Cicada PHYs" - ---help--- ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -54,6 +54,7 @@ obj-$(CONFIG_BCM87XX_PHY) += bcm87xx.o - obj-$(CONFIG_BCM_CYGNUS_PHY) += bcm-cygnus.o - obj-$(CONFIG_BCM_NET_PHYLIB) += bcm-phy-lib.o - obj-$(CONFIG_BROADCOM_PHY) += broadcom.o -+obj-$(CONFIG_BCM84881_PHY) += bcm84881.o - obj-$(CONFIG_CICADA_PHY) += cicada.o - obj-$(CONFIG_CORTINA_PHY) += cortina.o - obj-$(CONFIG_DAVICOM_PHY) += davicom.o ---- /dev/null -+++ b/drivers/net/phy/bcm84881.c -@@ -0,0 +1,290 @@ -+// SPDX-License-Identifier: GPL-2.0 -+// Broadcom BCM84881 NBASE-T PHY driver, as found on a SFP+ module. -+// Copyright (C) 2019 Russell King, Deep Blue Solutions Ltd. -+// -+// Like the Marvell 88x3310, the Broadcom 84881 changes its host-side -+// interface according to the operating speed between 10GBASE-R, -+// 2500BASE-X and SGMII (but unlike the 88x3310, without the control -+// word). -+// -+// This driver only supports those aspects of the PHY that I'm able to -+// observe and test with the SFP+ module, which is an incomplete subset -+// of what this PHY is able to support. For example, I only assume it -+// supports a single lane Serdes connection, but it may be that the PHY -+// is able to support more than that. -+#include -+#include -+#include -+ -+enum { -+ MDIO_AN_C22 = 0xffe0, -+}; -+ -+static int bcm84881_wait_init(struct phy_device *phydev) -+{ -+ unsigned int tries = 20; -+ int ret, val; -+ -+ do { -+ val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); -+ if (val < 0) { -+ ret = val; -+ break; -+ } -+ if (!(val & MDIO_CTRL1_RESET)) { -+ ret = 0; -+ break; -+ } -+ if (!--tries) { -+ ret = -ETIMEDOUT; -+ break; -+ } -+ msleep(100); -+ } while (1); -+ -+ if (ret) -+ phydev_err(phydev, "%s failed: %d\n", __func__, ret); -+ -+ return ret; -+} -+ -+static int bcm84881_config_init(struct phy_device *phydev) -+{ -+ switch (phydev->interface) { -+ case PHY_INTERFACE_MODE_SGMII: -+ case PHY_INTERFACE_MODE_2500BASEX: -+ case PHY_INTERFACE_MODE_10GKR: -+ break; -+ default: -+ return -ENODEV; -+ } -+ return 0; -+} -+ -+static int bcm84881_probe(struct phy_device *phydev) -+{ -+ /* This driver requires PMAPMD and AN blocks */ -+ const u32 mmd_mask = MDIO_DEVS_PMAPMD | MDIO_DEVS_AN; -+ -+ if (!phydev->is_c45 || -+ (phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask) -+ return -ENODEV; -+ -+ return 0; -+} -+ -+static int genphy_c45_an_config_aneg(struct phy_device *phydev) -+{ -+ bool changed = false; -+ u32 advertising; -+ int ret; -+ -+ phydev->advertising &= phydev->supported; -+ advertising = phydev->advertising; -+ -+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, -+ ADVERTISE_ALL | ADVERTISE_100BASE4 | -+ ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM, -+ ethtool_adv_to_mii_adv_t(advertising)); -+ if (ret < 0) -+ return ret; -+ if (ret > 0) -+ changed = true; -+ -+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, -+ MDIO_AN_10GBT_CTRL_ADV10G, -+ advertising & ADVERTISED_10000baseT_Full ? -+ MDIO_AN_10GBT_CTRL_ADV10G : 0); -+ if (ret < 0) -+ return ret; -+ if (ret > 0) -+ changed = true; -+ -+ return genphy_c45_check_and_restart_aneg(phydev, changed); -+} -+ -+static int bcm84881_config_aneg(struct phy_device *phydev) -+{ -+ bool changed = false; -+ u32 adv; -+ int ret; -+ -+ /* Wait for the PHY to finish initialising, otherwise our -+ * advertisement may be overwritten. -+ */ -+ ret = bcm84881_wait_init(phydev); -+ if (ret) -+ return ret; -+ -+ /* We don't support manual MDI control */ -+ phydev->mdix_ctrl = ETH_TP_MDI_AUTO; -+ -+ /* disabled autoneg doesn't seem to work with this PHY */ -+ if (phydev->autoneg == AUTONEG_DISABLE) -+ return -EINVAL; -+ -+ ret = genphy_c45_an_config_aneg(phydev); -+ if (ret < 0) -+ return ret; -+ if (ret > 0) -+ changed = true; -+ -+ adv = ethtool_adv_to_mii_ctrl1000_t(phydev->advertising); -+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, -+ MDIO_AN_C22 + MII_CTRL1000, -+ ADVERTISE_1000FULL | ADVERTISE_1000HALF, -+ adv); -+ if (ret < 0) -+ return ret; -+ if (ret > 0) -+ changed = true; -+ -+ return genphy_c45_check_and_restart_aneg(phydev, changed); -+} -+ -+static int bcm84881_aneg_done(struct phy_device *phydev) -+{ -+ int bmsr, val; -+ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); -+ if (val < 0) -+ return val; -+ -+ bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); -+ if (bmsr < 0) -+ return val; -+ -+ return !!(val & MDIO_AN_STAT1_COMPLETE) && -+ !!(bmsr & BMSR_ANEGCOMPLETE); -+} -+ -+static int bcm84881_read_status(struct phy_device *phydev) -+{ -+ bool autoneg_complete; -+ unsigned int mode; -+ int bmsr, val; -+ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); -+ if (val < 0) -+ return val; -+ -+ if (val & MDIO_AN_CTRL1_RESTART) { -+ phydev->link = 0; -+ return 0; -+ } -+ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); -+ if (val < 0) -+ return val; -+ -+ bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); -+ if (bmsr < 0) -+ return val; -+ -+ autoneg_complete = !!(val & MDIO_AN_STAT1_COMPLETE) && -+ !!(bmsr & BMSR_ANEGCOMPLETE); -+ phydev->link = !!(val & MDIO_STAT1_LSTATUS) && -+ !!(bmsr & BMSR_LSTATUS); -+ if (phydev->autoneg == AUTONEG_ENABLE && !autoneg_complete) -+ phydev->link = false; -+ -+ if (!phydev->link) -+ return 0; -+ -+ phydev->lp_advertising = 0; -+ phydev->speed = SPEED_UNKNOWN; -+ phydev->duplex = DUPLEX_UNKNOWN; -+ phydev->pause = 0; -+ phydev->asym_pause = 0; -+ phydev->mdix = 0; -+ -+ if (autoneg_complete) { -+ val = genphy_c45_read_lpa(phydev); -+ if (val < 0) -+ return val; -+ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, -+ MDIO_AN_C22 + MII_STAT1000); -+ if (val < 0) -+ return val; -+ -+ phydev->lp_advertising |= mii_stat1000_to_ethtool_lpa_t(val); -+ -+ if (phydev->autoneg == AUTONEG_ENABLE) -+ phy_resolve_aneg_linkmode(phydev); -+ } -+ -+ if (phydev->autoneg == AUTONEG_DISABLE) { -+ /* disabled autoneg doesn't seem to work, so force the link -+ * down. -+ */ -+ phydev->link = 0; -+ return 0; -+ } -+ -+ /* Set the host link mode - we set the phy interface mode and -+ * the speed according to this register so that downshift works. -+ * We leave the duplex setting as per the resolution from the -+ * above. -+ */ -+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); -+ mode = (val & 0x1e) >> 1; -+ if (mode == 1 || mode == 2) -+ phydev->interface = PHY_INTERFACE_MODE_SGMII; -+ else if (mode == 3) -+ phydev->interface = PHY_INTERFACE_MODE_10GKR; -+ else if (mode == 4) -+ phydev->interface = PHY_INTERFACE_MODE_2500BASEX; -+ switch (mode & 7) { -+ case 1: -+ phydev->speed = SPEED_100; -+ break; -+ case 2: -+ phydev->speed = SPEED_1000; -+ break; -+ case 3: -+ phydev->speed = SPEED_10000; -+ break; -+ case 4: -+ phydev->speed = SPEED_2500; -+ break; -+ case 5: -+ phydev->speed = SPEED_5000; -+ break; -+ } -+ -+ return genphy_c45_read_mdix(phydev); -+} -+ -+static struct phy_driver bcm84881_drivers[] = { -+ { -+ .phy_id = 0xae025150, -+ .phy_id_mask = 0xfffffff0, -+ .name = "Broadcom BCM84881", -+ .features = SUPPORTED_100baseT_Full | -+ SUPPORTED_100baseT_Half | -+ SUPPORTED_1000baseT_Full | -+ SUPPORTED_Autoneg | -+ SUPPORTED_TP | -+ SUPPORTED_FIBRE | -+ SUPPORTED_10000baseT_Full | -+ SUPPORTED_Backplane, -+ .config_init = bcm84881_config_init, -+ .probe = bcm84881_probe, -+ .config_aneg = bcm84881_config_aneg, -+ .aneg_done = bcm84881_aneg_done, -+ .read_status = bcm84881_read_status, -+ }, -+}; -+ -+module_phy_driver(bcm84881_drivers); -+ -+/* FIXME: module auto-loading for Clause 45 PHYs seems non-functional */ -+static struct mdio_device_id __maybe_unused bcm84881_tbl[] = { -+ { 0xae025150, 0xfffffff0 }, -+ { }, -+}; -+MODULE_AUTHOR("Russell King"); -+MODULE_DESCRIPTION("Broadcom BCM84881 PHY driver"); -+MODULE_DEVICE_TABLE(mdio, bcm84881_tbl); -+MODULE_LICENSE("GPL"); diff --git a/target/linux/generic/pending-4.19/753-net-sfp-add-support-for-Clause-45-PHYs.patch b/target/linux/generic/pending-4.19/753-net-sfp-add-support-for-Clause-45-PHYs.patch deleted file mode 100644 index ea26770841..0000000000 --- a/target/linux/generic/pending-4.19/753-net-sfp-add-support-for-Clause-45-PHYs.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 6df6709dc3d00e0bc948d45dfa8d8f18ba379c48 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 5 Nov 2019 11:56:18 +0000 -Subject: [PATCH 656/660] net: sfp: add support for Clause 45 PHYs - -Some SFP+ modules have a Clause 45 PHY onboard, which is accessible via -the normal I2C address. Detect 10G BASE-T PHYs which may have an -accessible PHY and probe for it. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 44 +++++++++++++++++++++++++++++++++++++++---- - 1 file changed, 40 insertions(+), 4 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1337,12 +1337,12 @@ static void sfp_sm_phy_detach(struct sfp - sfp->mod_phy = NULL; - } - --static void sfp_sm_probe_phy(struct sfp *sfp) -+static void sfp_sm_probe_phy(struct sfp *sfp, bool is_c45) - { - struct phy_device *phy; - int err; - -- phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR); -+ phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45); - if (phy == ERR_PTR(-ENODEV)) { - dev_info(sfp->dev, "no PHY detected\n"); - return; -@@ -1352,6 +1352,13 @@ static void sfp_sm_probe_phy(struct sfp - return; - } - -+ err = phy_device_register(phy); -+ if (err) { -+ phy_device_free(phy); -+ dev_err(sfp->dev, "phy_device_register failed: %d\n", err); -+ return; -+ } -+ - err = sfp_add_phy(sfp->sfp_bus, phy); - if (err) { - phy_device_remove(phy); -@@ -1422,10 +1429,32 @@ static void sfp_sm_fault(struct sfp *sfp - } - } - -+/* Probe a SFP for a PHY device if the module supports copper - the PHY -+ * normally sits at I2C bus address 0x56, and may either be a clause 22 -+ * or clause 45 PHY. -+ * -+ * Clause 22 copper SFP modules normally operate in Cisco SGMII mode with -+ * negotiation enabled, but some may be in 1000base-X - which is for the -+ * PHY driver to determine. -+ * -+ * Clause 45 copper SFP+ modules (10G) appear to switch their interface -+ * mode according to the negotiated line speed. -+ */ - static void sfp_sm_probe_for_phy(struct sfp *sfp) - { -- if (sfp->id.base.e1000_base_t) -- sfp_sm_probe_phy(sfp); -+ switch (sfp->id.base.extended_cc) { -+ case SFF8024_ECC_10GBASE_T_SFI: -+ case SFF8024_ECC_10GBASE_T_SR: -+ case SFF8024_ECC_5GBASE_T: -+ case SFF8024_ECC_2_5GBASE_T: -+ sfp_sm_probe_phy(sfp, true); -+ break; -+ -+ default: -+ if (sfp->id.base.e1000_base_t) -+ sfp_sm_probe_phy(sfp, false); -+ break; -+ } - } - - static int sfp_module_parse_power(struct sfp *sfp) -@@ -1485,6 +1514,13 @@ static int sfp_sm_mod_hpower(struct sfp - return -EAGAIN; - } - -+ /* DM7052 reports as a high power module, responds to reads (with -+ * all bytes 0xff) at 0x51 but does not accept writes. In any case, -+ * if the bit is already set, we're already in high power mode. -+ */ -+ if (!!(val & BIT(0)) == enable) -+ return 0; -+ - if (enable) - val |= BIT(0); - else diff --git a/target/linux/generic/pending-4.19/754-net-sfp-fix-unbind.patch b/target/linux/generic/pending-4.19/754-net-sfp-fix-unbind.patch deleted file mode 100644 index 55fabafa81..0000000000 --- a/target/linux/generic/pending-4.19/754-net-sfp-fix-unbind.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 729fd05aac22cdf1e502fbf1bf80e5ebba0d9fbc Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 3 Dec 2019 17:48:28 +0000 -Subject: [PATCH] net: sfp: fix unbind - -When unbinding, we don't correctly tear down the module state, leaving -(for example) the hwmon registration behind. Ensure everything is -properly removed by sending a remove event at unbind. - -Fixes: 6b0da5c9c1a3 ("net: sfp: track upstream's attachment state in state machine") -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -2260,6 +2260,10 @@ static int sfp_remove(struct platform_de - - sfp_unregister_socket(sfp->sfp_bus); - -+ rtnl_lock(); -+ sfp_sm_event(sfp, SFP_E_REMOVE); -+ rtnl_unlock(); -+ - return 0; - } - diff --git a/target/linux/generic/pending-4.19/755-net-sfp-fix-hwmon.patch b/target/linux/generic/pending-4.19/755-net-sfp-fix-hwmon.patch deleted file mode 100644 index d003df4e13..0000000000 --- a/target/linux/generic/pending-4.19/755-net-sfp-fix-hwmon.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 5eb0df5023c6ae8a71a7848fd5e1f788d86e51ae Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 3 Dec 2019 18:46:04 +0000 -Subject: [PATCH] net: sfp: fix hwmon - -The referenced commit below allowed more than one hwmon device to be -created per SFP, which is definitely not what we want. Avoid this by -only creating the hwmon device just as we transition to WAITDEV state. - -Fixes: 139d3a212a1f ("net: sfp: allow modules with slow diagnostics to probe") -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 13 ++++--------- - 1 file changed, 4 insertions(+), 9 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1731,6 +1731,10 @@ static void sfp_sm_module(struct sfp *sf - break; - } - -+ err = sfp_hwmon_insert(sfp); -+ if (err) -+ dev_warn(sfp->dev, "hwmon probe failed: %d\n", err); -+ - sfp_sm_mod_next(sfp, SFP_MOD_WAITDEV, 0); - /* fall through */ - case SFP_MOD_WAITDEV: -@@ -1780,15 +1784,6 @@ static void sfp_sm_module(struct sfp *sf - case SFP_MOD_ERROR: - break; - } -- --#if IS_ENABLED(CONFIG_HWMON) -- if (sfp->sm_mod_state >= SFP_MOD_WAITDEV && -- IS_ERR_OR_NULL(sfp->hwmon_dev)) { -- err = sfp_hwmon_insert(sfp); -- if (err) -- dev_warn(sfp->dev, "hwmon probe failed: %d\n", err); -- } --#endif - } - - static void sfp_sm_main(struct sfp *sfp, unsigned int event) diff --git a/target/linux/generic/pending-4.19/756-net-sfp-use-a-definition-for-the-fault-recovery-atte.patch b/target/linux/generic/pending-4.19/756-net-sfp-use-a-definition-for-the-fault-recovery-atte.patch deleted file mode 100644 index 8362f73f46..0000000000 --- a/target/linux/generic/pending-4.19/756-net-sfp-use-a-definition-for-the-fault-recovery-atte.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 4d6bfb6fbb00af38402db4d1ce464e22def9fd9e Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 28 Nov 2019 14:24:40 +0000 -Subject: [PATCH 1/4] net: sfp: use a definition for the fault recovery - attempts - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 14 +++++++++++--- - 1 file changed, 11 insertions(+), 3 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -170,6 +170,14 @@ static const enum gpiod_flags gpio_flags - #define T_RESET_US 10 - #define T_FAULT_RECOVER msecs_to_jiffies(1000) - -+/* N_FAULT_INIT is the number of recovery attempts at module initialisation -+ * time. If the TX_FAULT signal is not deasserted after this number of -+ * attempts at clearing it, we decide that the module is faulty. -+ * N_FAULT is the same but after the module has initialised. -+ */ -+#define N_FAULT_INIT 5 -+#define N_FAULT 5 -+ - /* SFP module presence detection is poor: the three MOD DEF signals are - * the same length on the PCB, which means it's possible for MOD DEF 0 to - * connect before the I2C bus on MOD DEF 1/2. -@@ -1820,7 +1828,7 @@ static void sfp_sm_main(struct sfp *sfp, - sfp_module_tx_enable(sfp); - - /* Initialise the fault clearance retries */ -- sfp->sm_retries = 5; -+ sfp->sm_retries = N_FAULT_INIT; - - /* We need to check the TX_FAULT state, which is not defined - * while TX_DISABLE is asserted. The earliest we want to do -@@ -1860,7 +1868,7 @@ static void sfp_sm_main(struct sfp *sfp, - * or t_start_up, so assume there is a fault. - */ - sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT, -- sfp->sm_retries == 5); -+ sfp->sm_retries == N_FAULT_INIT); - } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { - init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT - * clear. Probe for the PHY and check the LOS state. -@@ -1873,7 +1881,7 @@ static void sfp_sm_main(struct sfp *sfp, - sfp_sm_link_check_los(sfp); - - /* Reset the fault retry count */ -- sfp->sm_retries = 5; -+ sfp->sm_retries = N_FAULT; - } - break; - diff --git a/target/linux/generic/pending-4.19/757-net-sfp-rename-sm_retries.patch b/target/linux/generic/pending-4.19/757-net-sfp-rename-sm_retries.patch deleted file mode 100644 index c6f43729da..0000000000 --- a/target/linux/generic/pending-4.19/757-net-sfp-rename-sm_retries.patch +++ /dev/null @@ -1,60 +0,0 @@ -From bfa3cbb01c7ea34d7369c9bd2ec1b2dc67082b04 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Mon, 2 Dec 2019 18:06:44 +0000 -Subject: [PATCH 2/4] net: sfp: rename sm_retries - -Rename sm_retries as sm_fault_retries, as this is what this member is -tracking. - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -232,7 +232,7 @@ struct sfp { - unsigned char sm_mod_tries; - unsigned char sm_dev_state; - unsigned short sm_state; -- unsigned int sm_retries; -+ unsigned char sm_fault_retries; - - struct sfp_eeprom_id id; - unsigned int module_power_mW; -@@ -1425,7 +1425,7 @@ static bool sfp_los_event_inactive(struc - - static void sfp_sm_fault(struct sfp *sfp, unsigned int next_state, bool warn) - { -- if (sfp->sm_retries && !--sfp->sm_retries) { -+ if (sfp->sm_fault_retries && !--sfp->sm_fault_retries) { - dev_err(sfp->dev, - "module persistently indicates fault, disabling\n"); - sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0); -@@ -1828,7 +1828,7 @@ static void sfp_sm_main(struct sfp *sfp, - sfp_module_tx_enable(sfp); - - /* Initialise the fault clearance retries */ -- sfp->sm_retries = N_FAULT_INIT; -+ sfp->sm_fault_retries = N_FAULT_INIT; - - /* We need to check the TX_FAULT state, which is not defined - * while TX_DISABLE is asserted. The earliest we want to do -@@ -1868,7 +1868,7 @@ static void sfp_sm_main(struct sfp *sfp, - * or t_start_up, so assume there is a fault. - */ - sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT, -- sfp->sm_retries == N_FAULT_INIT); -+ sfp->sm_fault_retries == N_FAULT_INIT); - } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { - init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT - * clear. Probe for the PHY and check the LOS state. -@@ -1881,7 +1881,7 @@ static void sfp_sm_main(struct sfp *sfp, - sfp_sm_link_check_los(sfp); - - /* Reset the fault retry count */ -- sfp->sm_retries = N_FAULT; -+ sfp->sm_fault_retries = N_FAULT; - } - break; - diff --git a/target/linux/generic/pending-4.19/758-net-sfp-error-handling-for-phy-probe.patch b/target/linux/generic/pending-4.19/758-net-sfp-error-handling-for-phy-probe.patch deleted file mode 100644 index 8191e622a1..0000000000 --- a/target/linux/generic/pending-4.19/758-net-sfp-error-handling-for-phy-probe.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 1fba543dc8edf4a43bff3276306648bb27c1e207 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 29 Nov 2019 00:30:08 +0000 -Subject: [PATCH 3/4] net: sfp: error handling for phy probe - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 26 +++++++++++++++++--------- - 1 file changed, 17 insertions(+), 9 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -1345,7 +1345,7 @@ static void sfp_sm_phy_detach(struct sfp - sfp->mod_phy = NULL; - } - --static void sfp_sm_probe_phy(struct sfp *sfp, bool is_c45) -+static int sfp_sm_probe_phy(struct sfp *sfp, bool is_c45) - { - struct phy_device *phy; - int err; -@@ -1353,18 +1353,18 @@ static void sfp_sm_probe_phy(struct sfp - phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45); - if (phy == ERR_PTR(-ENODEV)) { - dev_info(sfp->dev, "no PHY detected\n"); -- return; -+ return 0; - } - if (IS_ERR(phy)) { - dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy)); -- return; -+ return PTR_ERR(phy); - } - - err = phy_device_register(phy); - if (err) { - phy_device_free(phy); - dev_err(sfp->dev, "phy_device_register failed: %d\n", err); -- return; -+ return err; - } - - err = sfp_add_phy(sfp->sfp_bus, phy); -@@ -1372,10 +1372,12 @@ static void sfp_sm_probe_phy(struct sfp - phy_device_remove(phy); - phy_device_free(phy); - dev_err(sfp->dev, "sfp_add_phy failed: %d\n", err); -- return; -+ return err; - } - - sfp->mod_phy = phy; -+ -+ return 0; - } - - static void sfp_sm_link_up(struct sfp *sfp) -@@ -1448,21 +1450,24 @@ static void sfp_sm_fault(struct sfp *sfp - * Clause 45 copper SFP+ modules (10G) appear to switch their interface - * mode according to the negotiated line speed. - */ --static void sfp_sm_probe_for_phy(struct sfp *sfp) -+static int sfp_sm_probe_for_phy(struct sfp *sfp) - { -+ int err = 0; -+ - switch (sfp->id.base.extended_cc) { - case SFF8024_ECC_10GBASE_T_SFI: - case SFF8024_ECC_10GBASE_T_SR: - case SFF8024_ECC_5GBASE_T: - case SFF8024_ECC_2_5GBASE_T: -- sfp_sm_probe_phy(sfp, true); -+ err = sfp_sm_probe_phy(sfp, true); - break; - - default: - if (sfp->id.base.e1000_base_t) -- sfp_sm_probe_phy(sfp, false); -+ err = sfp_sm_probe_phy(sfp, false); - break; - } -+ return err; - } - - static int sfp_module_parse_power(struct sfp *sfp) -@@ -1873,7 +1878,10 @@ static void sfp_sm_main(struct sfp *sfp, - init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT - * clear. Probe for the PHY and check the LOS state. - */ -- sfp_sm_probe_for_phy(sfp); -+ if (sfp_sm_probe_for_phy(sfp)) { -+ sfp_sm_next(sfp, SFP_S_FAIL, 0); -+ break; -+ } - if (sfp_module_start(sfp->sfp_bus)) { - sfp_sm_next(sfp, SFP_S_FAIL, 0); - break; diff --git a/target/linux/generic/pending-4.19/759-net-sfp-re-attempt-probing-for-phy.patch b/target/linux/generic/pending-4.19/759-net-sfp-re-attempt-probing-for-phy.patch deleted file mode 100644 index 46d987344f..0000000000 --- a/target/linux/generic/pending-4.19/759-net-sfp-re-attempt-probing-for-phy.patch +++ /dev/null @@ -1,132 +0,0 @@ -From 6c4efe83a0acf6f06c89ae17b885fa5739eb5be7 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Mon, 2 Dec 2019 18:20:22 +0000 -Subject: [PATCH 4/4] net: sfp: re-attempt probing for phy - -Some 1000BASE-T PHY modules take a while for the PHY to wake up. -Retry the probe a number of times before deciding that the module has -no PHY. - -Tested with: - Sourcephotonics SPGBTXCNFC - PHY takes less than 50ms to respond. - Champion One 1000SFPT - PHY takes about 200ms to respond. - Mikrotik S-RJ01 - no PHY - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 59 ++++++++++++++++++++++++++++++++++++--------------- - 1 file changed, 42 insertions(+), 17 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -60,6 +60,7 @@ enum { - SFP_S_FAIL, - SFP_S_WAIT, - SFP_S_INIT, -+ SFP_S_INIT_PHY, - SFP_S_INIT_TX_FAULT, - SFP_S_WAIT_LOS, - SFP_S_LINK_UP, -@@ -124,6 +125,7 @@ static const char * const sm_state_strin - [SFP_S_FAIL] = "fail", - [SFP_S_WAIT] = "wait", - [SFP_S_INIT] = "init", -+ [SFP_S_INIT_PHY] = "init_phy", - [SFP_S_INIT_TX_FAULT] = "init_tx_fault", - [SFP_S_WAIT_LOS] = "wait_los", - [SFP_S_LINK_UP] = "link_up", -@@ -178,6 +180,12 @@ static const enum gpiod_flags gpio_flags - #define N_FAULT_INIT 5 - #define N_FAULT 5 - -+/* T_PHY_RETRY is the time interval between attempts to probe the PHY. -+ * R_PHY_RETRY is the number of attempts. -+ */ -+#define T_PHY_RETRY msecs_to_jiffies(50) -+#define R_PHY_RETRY 12 -+ - /* SFP module presence detection is poor: the three MOD DEF signals are - * the same length on the PCB, which means it's possible for MOD DEF 0 to - * connect before the I2C bus on MOD DEF 1/2. -@@ -233,6 +241,7 @@ struct sfp { - unsigned char sm_dev_state; - unsigned short sm_state; - unsigned char sm_fault_retries; -+ unsigned char sm_phy_retries; - - struct sfp_eeprom_id id; - unsigned int module_power_mW; -@@ -1351,10 +1360,8 @@ static int sfp_sm_probe_phy(struct sfp * - int err; - - phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45); -- if (phy == ERR_PTR(-ENODEV)) { -- dev_info(sfp->dev, "no PHY detected\n"); -- return 0; -- } -+ if (phy == ERR_PTR(-ENODEV)) -+ return PTR_ERR(phy); - if (IS_ERR(phy)) { - dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy)); - return PTR_ERR(phy); -@@ -1802,6 +1809,7 @@ static void sfp_sm_module(struct sfp *sf - static void sfp_sm_main(struct sfp *sfp, unsigned int event) - { - unsigned long timeout; -+ int ret; - - /* Some events are global */ - if (sfp->sm_state != SFP_S_DOWN && -@@ -1875,22 +1883,39 @@ static void sfp_sm_main(struct sfp *sfp, - sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT, - sfp->sm_fault_retries == N_FAULT_INIT); - } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { -- init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT -- * clear. Probe for the PHY and check the LOS state. -- */ -- if (sfp_sm_probe_for_phy(sfp)) { -- sfp_sm_next(sfp, SFP_S_FAIL, 0); -- break; -- } -- if (sfp_module_start(sfp->sfp_bus)) { -- sfp_sm_next(sfp, SFP_S_FAIL, 0); -+ init_done: -+ sfp->sm_phy_retries = R_PHY_RETRY; -+ goto phy_probe; -+ } -+ break; -+ -+ case SFP_S_INIT_PHY: -+ if (event != SFP_E_TIMEOUT) -+ break; -+ phy_probe: -+ /* TX_FAULT deasserted or we timed out with TX_FAULT -+ * clear. Probe for the PHY and check the LOS state. -+ */ -+ ret = sfp_sm_probe_for_phy(sfp); -+ if (ret == -ENODEV) { -+ if (--sfp->sm_phy_retries) { -+ sfp_sm_next(sfp, SFP_S_INIT_PHY, T_PHY_RETRY); - break; -+ } else { -+ dev_info(sfp->dev, "no PHY detected\n"); - } -- sfp_sm_link_check_los(sfp); -- -- /* Reset the fault retry count */ -- sfp->sm_fault_retries = N_FAULT; -+ } else if (ret) { -+ sfp_sm_next(sfp, SFP_S_FAIL, 0); -+ break; - } -+ if (sfp_module_start(sfp->sfp_bus)) { -+ sfp_sm_next(sfp, SFP_S_FAIL, 0); -+ break; -+ } -+ sfp_sm_link_check_los(sfp); -+ -+ /* Reset the fault retry count */ -+ sfp->sm_fault_retries = N_FAULT; - break; - - case SFP_S_INIT_TX_FAULT: diff --git a/target/linux/generic/pending-4.19/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch b/target/linux/generic/pending-4.19/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch deleted file mode 100644 index cb02c71829..0000000000 --- a/target/linux/generic/pending-4.19/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch +++ /dev/null @@ -1,70 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Subject: [PATCH] bcma: get SoC device struct & copy its DMA params to the - subdevices -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -For bus devices to be fully usable it's required to set their DMA -parameters. - -For years it has been missing and remained unnoticed because of -mips_dma_alloc_coherent() silently handling the empty coherent_dma_mask. -Kernel 4.19 came with a lot of DMA changes and caused a regression on -the bcm47xx. Starting with the commit f8c55dc6e828 ("MIPS: use generic -dma noncoherent ops for simple noncoherent platforms") DMA coherent -allocations just fail. Example: -[ 1.114914] bgmac_bcma bcma0:2: Allocation of TX ring 0x200 failed -[ 1.121215] bgmac_bcma bcma0:2: Unable to alloc memory for DMA -[ 1.127626] bgmac_bcma: probe of bcma0:2 failed with error -12 -[ 1.133838] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded - -This change fixes above regression in addition to the MIPS bcm47xx -commit 321c46b91550 ("MIPS: BCM47XX: Setup struct device for the SoC"). - -It also fixes another *old* GPIO regression caused by a parent pointing -to the NULL: -[ 0.157054] missing gpiochip .dev parent pointer -[ 0.157287] bcma: bus0: Error registering GPIO driver: -22 -introduced by the commit 74f4e0cc6108 ("bcma: switch GPIO portions to -use GPIOLIB_IRQCHIP"). - -Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple noncoherent platforms") -Fixes: 74f4e0cc6108 ("bcma: switch GPIO portions to use GPIOLIB_IRQCHIP") -Cc: linux-mips@linux-mips.org -Cc: Christoph Hellwig -Cc: Linus Walleij -Signed-off-by: Rafał Miłecki ---- - ---- a/drivers/bcma/host_soc.c -+++ b/drivers/bcma/host_soc.c -@@ -191,6 +191,8 @@ int __init bcma_host_soc_init(struct bcm - struct bcma_bus *bus = &soc->bus; - int err; - -+ bus->dev = soc->dev; -+ - /* Scan bus and initialize it */ - err = bcma_bus_early_register(bus); - if (err) ---- a/drivers/bcma/main.c -+++ b/drivers/bcma/main.c -@@ -236,12 +236,16 @@ EXPORT_SYMBOL(bcma_core_irq); - - void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core) - { -+ struct device *dev = &core->dev; -+ - core->dev.release = bcma_release_core_dev; - core->dev.bus = &bcma_bus_type; - dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index); - core->dev.parent = bus->dev; -- if (bus->dev) -+ if (bus->dev) { - bcma_of_fill_device(bus->dev, core); -+ dma_coerce_mask_and_coherent(dev, bus->dev->coherent_dma_mask); -+ } - - switch (bus->hosttype) { - case BCMA_HOSTTYPE_PCI: diff --git a/target/linux/generic/pending-4.19/810-pci_disable_common_quirks.patch b/target/linux/generic/pending-4.19/810-pci_disable_common_quirks.patch deleted file mode 100644 index c757aeeaad..0000000000 --- a/target/linux/generic/pending-4.19/810-pci_disable_common_quirks.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Gabor Juhos -Subject: debloat: add kernel config option to disabling common PCI quirks - -Signed-off-by: Gabor Juhos ---- - drivers/pci/Kconfig | 6 ++++++ - drivers/pci/quirks.c | 6 ++++++ - 2 files changed, 12 insertions(+) - ---- a/drivers/pci/Kconfig -+++ b/drivers/pci/Kconfig -@@ -89,6 +89,13 @@ config XEN_PCIDEV_FRONTEND - The PCI device frontend driver allows the kernel to import arbitrary - PCI devices from a PCI backend to support PCI driver domains. - -+config PCI_DISABLE_COMMON_QUIRKS -+ bool "PCI disable common quirks" -+ depends on PCI -+ help -+ If you don't know what to do here, say N. -+ -+ - config PCI_ATS - bool - ---- a/drivers/pci/quirks.c -+++ b/drivers/pci/quirks.c -@@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct - DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, - PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS - /* - * The Mellanox Tavor device gives false positive parity errors. Mark this - * device with a broken_parity_status to allow PCI scanning code to "skip" -@@ -3226,6 +3227,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); - -+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ -+ - /* - * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. - * To work around this, query the size it should be configured to by the -@@ -3251,6 +3254,8 @@ static void quirk_intel_ntb(struct pci_d - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS -+ - /* - * Some BIOS implementations leave the Intel GPU interrupts enabled, even - * though no one is handling them (e.g., if the i915 driver is never -@@ -3289,6 +3294,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN - DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); - DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); - -+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ -+ - /* - * PCI devices which are on Intel chips can skip the 10ms delay - * before entering D3 mode. diff --git a/target/linux/generic/pending-4.19/811-pci_disable_usb_common_quirks.patch b/target/linux/generic/pending-4.19/811-pci_disable_usb_common_quirks.patch deleted file mode 100644 index 848aecaa87..0000000000 --- a/target/linux/generic/pending-4.19/811-pci_disable_usb_common_quirks.patch +++ /dev/null @@ -1,115 +0,0 @@ -From: Felix Fietkau -Subject: debloat: disable common USB quirks - -Signed-off-by: Felix Fietkau ---- - drivers/usb/host/pci-quirks.c | 16 ++++++++++++++++ - drivers/usb/host/pci-quirks.h | 18 +++++++++++++++++- - include/linux/usb/hcd.h | 7 +++++++ - 3 files changed, 40 insertions(+), 1 deletion(-) - ---- a/drivers/usb/host/pci-quirks.c -+++ b/drivers/usb/host/pci-quirks.c -@@ -125,6 +125,8 @@ struct amd_chipset_type { - u8 rev; - }; - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS -+ - static struct amd_chipset_info { - struct pci_dev *nb_dev; - struct pci_dev *smbus_dev; -@@ -628,6 +630,10 @@ bool usb_amd_pt_check_port(struct device - } - EXPORT_SYMBOL_GPL(usb_amd_pt_check_port); - -+#endif /* CONFIG_PCI_DISABLE_COMMON_QUIRKS */ -+ -+#if IS_ENABLED(CONFIG_USB_UHCI_HCD) -+ - /* - * Make sure the controller is completely inactive, unable to - * generate interrupts or do DMA. -@@ -707,8 +713,17 @@ reset_needed: - uhci_reset_hc(pdev, base); - return 1; - } -+#else -+int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base) -+{ -+ return 0; -+} -+ -+#endif - EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS -+ - static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask) - { - u16 cmd; -@@ -1275,3 +1290,4 @@ static void quirk_usb_early_handoff(stru - } - DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID, - PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff); -+#endif ---- a/drivers/usb/host/pci-quirks.h -+++ b/drivers/usb/host/pci-quirks.h -@@ -5,6 +5,9 @@ - #ifdef CONFIG_USB_PCI - void uhci_reset_hc(struct pci_dev *pdev, unsigned long base); - int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base); -+#endif /* CONFIG_USB_PCI */ -+ -+#if defined(CONFIG_USB_PCI) && !defined(CONFIG_PCI_DISABLE_COMMON_QUIRKS) - int usb_amd_find_chipset_info(void); - int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev); - bool usb_amd_hang_symptom_quirk(void); -@@ -19,6 +22,18 @@ void sb800_prefetch(struct device *dev, - bool usb_amd_pt_check_port(struct device *device, int port); - #else - struct pci_dev; -+static inline int usb_amd_find_chipset_info(void) -+{ -+ return 0; -+} -+static inline bool usb_amd_hang_symptom_quirk(void) -+{ -+ return false; -+} -+static inline bool usb_amd_prefetch_quirk(void) -+{ -+ return false; -+} - static inline void usb_amd_quirk_pll_disable(void) {} - static inline void usb_amd_quirk_pll_enable(void) {} - static inline void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) {} -@@ -29,6 +44,11 @@ static inline bool usb_amd_pt_check_port - { - return false; - } -+static inline void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev) {} -+static inline bool usb_xhci_needs_pci_reset(struct pci_dev *pdev) -+{ -+ return false; -+} - #endif /* CONFIG_USB_PCI */ - - #endif /* __LINUX_USB_PCI_QUIRKS_H */ ---- a/include/linux/usb/hcd.h -+++ b/include/linux/usb/hcd.h -@@ -473,7 +473,14 @@ extern int usb_hcd_pci_probe(struct pci_ - extern void usb_hcd_pci_remove(struct pci_dev *dev); - extern void usb_hcd_pci_shutdown(struct pci_dev *dev); - -+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS - extern int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev); -+#else -+static inline int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev) -+{ -+ return 0; -+} -+#endif - - #ifdef CONFIG_PM - extern const struct dev_pm_ops usb_hcd_pci_pm_ops; diff --git a/target/linux/generic/pending-4.19/834-ledtrig-libata.patch b/target/linux/generic/pending-4.19/834-ledtrig-libata.patch deleted file mode 100644 index 560bbe8364..0000000000 --- a/target/linux/generic/pending-4.19/834-ledtrig-libata.patch +++ /dev/null @@ -1,149 +0,0 @@ -From: Daniel Golle -Subject: libata: add ledtrig support - -This adds a LED trigger for each ATA port indicating disk activity. - -As this is needed only on specific platforms (NAS SoCs and such), -these platforms should define ARCH_WANTS_LIBATA_LEDS if there -are boards with LED(s) intended to indicate ATA disk activity and -need the OS to take care of that. -In that way, if not selected, LED trigger support not will be -included in libata-core and both, codepaths and structures remain -untouched. - -Signed-off-by: Daniel Golle ---- - drivers/ata/Kconfig | 16 ++++++++++++++++ - drivers/ata/libata-core.c | 41 +++++++++++++++++++++++++++++++++++++++++ - include/linux/libata.h | 9 +++++++++ - 3 files changed, 66 insertions(+) - ---- a/drivers/ata/Kconfig -+++ b/drivers/ata/Kconfig -@@ -46,6 +46,22 @@ config ATA_VERBOSE_ERROR - - If unsure, say Y. - -+config ARCH_WANT_LIBATA_LEDS -+ bool -+ -+config ATA_LEDS -+ bool "support ATA port LED triggers" -+ depends on ARCH_WANT_LIBATA_LEDS -+ select NEW_LEDS -+ select LEDS_CLASS -+ select LEDS_TRIGGERS -+ default y -+ help -+ This option adds a LED trigger for each registered ATA port. -+ It is used to drive disk activity leds connected via GPIO. -+ -+ If unsure, say N. -+ - config ATA_ACPI - bool "ATA ACPI Support" - depends on ACPI ---- a/drivers/ata/libata-core.c -+++ b/drivers/ata/libata-core.c -@@ -730,6 +730,19 @@ u64 ata_tf_read_block(const struct ata_t - return block; - } - -+#ifdef CONFIG_ATA_LEDS -+#define LIBATA_BLINK_DELAY 20 /* ms */ -+static inline void ata_led_act(struct ata_port *ap) -+{ -+ unsigned long led_delay = LIBATA_BLINK_DELAY; -+ -+ if (unlikely(!ap->ledtrig)) -+ return; -+ -+ led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0); -+} -+#endif -+ - /** - * ata_build_rw_tf - Build ATA taskfile for given read/write request - * @tf: Target ATA taskfile -@@ -5133,6 +5146,9 @@ struct ata_queued_cmd *ata_qc_new_init(s - if (tag < 0) - return NULL; - } -+#ifdef CONFIG_ATA_LEDS -+ ata_led_act(ap); -+#endif - - qc = __ata_qc_from_tag(ap, tag); - qc->tag = qc->hw_tag = tag; -@@ -6067,6 +6083,9 @@ struct ata_port *ata_port_alloc(struct a - ap->stats.unhandled_irq = 1; - ap->stats.idle_irq = 1; - #endif -+#ifdef CONFIG_ATA_LEDS -+ ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL); -+#endif - ata_sff_port_init(ap); - - return ap; -@@ -6102,6 +6121,12 @@ static void ata_host_release(struct kref - - kfree(ap->pmp_link); - kfree(ap->slave_link); -+#ifdef CONFIG_ATA_LEDS -+ if (ap->ledtrig) { -+ led_trigger_unregister(ap->ledtrig); -+ kfree(ap->ledtrig); -+ }; -+#endif - kfree(ap); - host->ports[i] = NULL; - } -@@ -6565,7 +6590,23 @@ int ata_host_register(struct ata_host *h - host->ports[i]->print_id = atomic_inc_return(&ata_print_id); - host->ports[i]->local_port_no = i + 1; - } -+#ifdef CONFIG_ATA_LEDS -+ for (i = 0; i < host->n_ports; i++) { -+ if (unlikely(!host->ports[i]->ledtrig)) -+ continue; - -+ snprintf(host->ports[i]->ledtrig_name, -+ sizeof(host->ports[i]->ledtrig_name), "ata%u", -+ host->ports[i]->print_id); -+ -+ host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name; -+ -+ if (led_trigger_register(host->ports[i]->ledtrig)) { -+ kfree(host->ports[i]->ledtrig); -+ host->ports[i]->ledtrig = NULL; -+ } -+ } -+#endif - /* Create associated sysfs transport objects */ - for (i = 0; i < host->n_ports; i++) { - rc = ata_tport_add(host->dev,host->ports[i]); ---- a/include/linux/libata.h -+++ b/include/linux/libata.h -@@ -39,6 +39,9 @@ - #include - #include - #include -+#ifdef CONFIG_ATA_LEDS -+#include -+#endif - - /* - * Define if arch has non-standard setup. This is a _PCI_ standard -@@ -896,6 +899,12 @@ struct ata_port { - #ifdef CONFIG_ATA_ACPI - struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ - #endif -+ -+#ifdef CONFIG_ATA_LEDS -+ struct led_trigger *ledtrig; -+ char ledtrig_name[8]; -+#endif -+ - /* owned by EH */ - u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned; - }; diff --git a/target/linux/generic/pending-4.19/920-mangle_bootargs.patch b/target/linux/generic/pending-4.19/920-mangle_bootargs.patch deleted file mode 100644 index 0750ab77c2..0000000000 --- a/target/linux/generic/pending-4.19/920-mangle_bootargs.patch +++ /dev/null @@ -1,71 +0,0 @@ -From: Imre Kaloz -Subject: init: add CONFIG_MANGLE_BOOTARGS and disable it by default - -Enabling this option renames the bootloader supplied root= -and rootfstype= variables, which might have to be know but -would break the automatisms OpenWrt uses. - -Signed-off-by: Imre Kaloz ---- - init/Kconfig | 9 +++++++++ - init/main.c | 24 ++++++++++++++++++++++++ - 2 files changed, 33 insertions(+) - ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1531,6 +1531,15 @@ config EMBEDDED - an embedded system so certain expert options are available - for configuration. - -+config MANGLE_BOOTARGS -+ bool "Rename offending bootargs" -+ depends on EXPERT -+ help -+ Sometimes the bootloader passed bogus root= and rootfstype= -+ parameters to the kernel, and while you want to ignore them, -+ you need to know the values f.e. to support dual firmware -+ layouts on the flash. -+ - config HAVE_PERF_EVENTS - bool - help ---- a/init/main.c -+++ b/init/main.c -@@ -365,6 +365,29 @@ static inline void setup_nr_cpu_ids(void - static inline void smp_prepare_cpus(unsigned int maxcpus) { } - #endif - -+#ifdef CONFIG_MANGLE_BOOTARGS -+static void __init mangle_bootargs(char *command_line) -+{ -+ char *rootdev; -+ char *rootfs; -+ -+ rootdev = strstr(command_line, "root=/dev/mtdblock"); -+ -+ if (rootdev) -+ strncpy(rootdev, "mangled_rootblock=", 18); -+ -+ rootfs = strstr(command_line, "rootfstype"); -+ -+ if (rootfs) -+ strncpy(rootfs, "mangled_fs", 10); -+ -+} -+#else -+static void __init mangle_bootargs(char *command_line) -+{ -+} -+#endif -+ - /* - * We need to store the untouched command line for future reference. - * We also need to store the touched command line since the parameter -@@ -557,6 +580,7 @@ asmlinkage __visible void __init start_k - add_device_randomness(command_line, strlen(command_line)); - boot_init_stack_canary(); - mm_init_cpumask(&init_mm); -+ mangle_bootargs(command_line); - setup_command_line(command_line); - setup_nr_cpu_ids(); - setup_per_cpu_areas(); diff --git a/target/linux/imx6/config-4.19 b/target/linux/imx6/config-4.19 deleted file mode 100644 index 8435ece397..0000000000 --- a/target/linux/imx6/config-4.19 +++ /dev/null @@ -1,534 +0,0 @@ -CONFIG_AHCI_IMX=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MXC=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_IMX6Q_CPUFREQ=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASN1=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_IMX_GPT=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_CMDLINE="pci=nomsi" -CONFIG_CMDLINE_EXTEND=y -CONFIG_COMMON_CLK=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -# CONFIG_CRASHLOG is not set -CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -# CONFIG_CRYPTO_AES_ARM_CE is not set -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CHACHA20=y -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32_ARM_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_FSL_CAAM=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y -# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set -CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y -CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 -CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GF128MUL=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_RSA=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -# CONFIG_CRYPTO_SHA1_ARM_CE is not set -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM=y -# CONFIG_CRYPTO_SHA2_ARM_CE is not set -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_XTS=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_IMX_UART_PORT=1 -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_USER is not set -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DTC=y -CONFIG_E1000E=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENCRYPTED_KEYS=y -CONFIG_EXT4_ENCRYPTION=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_ENCRYPTION=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_EXTCON=y -CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin" -CONFIG_EXTRA_FIRMWARE_DIR="firmware" -CONFIG_F2FS_FS=y -CONFIG_FEC=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_FSL_GUTS=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -# CONFIG_GIANFAR is not set -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MXC=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IMX_ANATOP=y -CONFIG_HAVE_IMX_GPC=y -CONFIG_HAVE_IMX_MMDC=y -CONFIG_HAVE_IMX_SRC=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IMX_RNGC=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IMX=y -# CONFIG_I2C_IMX_LPI2C is not set -CONFIG_IMX2_WDT=y -CONFIG_IMX_DMA=y -CONFIG_IMX_SDMA=y -CONFIG_IMX_THERMAL=y -# CONFIG_IMX_WEIM is not set -# CONFIG_INITRAMFS_FORCE is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -# CONFIG_JFFS2_FS is not set -CONFIG_KEYS=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MICREL_PHY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -# CONFIG_MMC_MXC is not set -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MPILIB=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -# CONFIG_MX3_IPU is not set -CONFIG_MXS_DMA=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y -# CONFIG_NET_DSA_MV88E6XXX_PTP is not set -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_EDSA=y -# CONFIG_NET_DSA_VITESSE_VSC73XX is not set -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -# CONFIG_NVMEM_IMX_IIM is not set -CONFIG_NVMEM_IMX_OCOTP=y -# CONFIG_NVMEM_SNVS_LPGPR is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -CONFIG_PCIE_DW_PLAT=y -CONFIG_PCIE_DW_PLAT_HOST=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_IMX6=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX=y -CONFIG_PINCTRL_IMX6Q=y -CONFIG_PINCTRL_IMX6SL=y -CONFIG_PINCTRL_IMX6SX=y -CONFIG_PINCTRL_IMX6UL=y -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -CONFIG_PL310_ERRATA_769419=y -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -CONFIG_PPS=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PWM=y -CONFIG_PWM_IMX=y -CONFIG_PWM_SYSFS=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RD_LZO=y -CONFIG_RD_XZ=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_LTC3676=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_DS1672=y -# CONFIG_RTC_DRV_IMXDI is not set -# CONFIG_RTC_DRV_MXC is not set -# CONFIG_RTC_DRV_MXC_V2 is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SCSI=y -CONFIG_SENSORS_AD7418=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -# CONFIG_SOC_IMX50 is not set -# CONFIG_SOC_IMX51 is not set -# CONFIG_SOC_IMX53 is not set -CONFIG_SOC_IMX6=y -CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y -# CONFIG_SOC_IMX6SLL is not set -CONFIG_SOC_IMX6SX=y -CONFIG_SOC_IMX6UL=y -# CONFIG_SOC_IMX7D is not set -# CONFIG_SOC_LS1021A is not set -# CONFIG_SOC_VF610 is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_FSL_LPSPI is not set -CONFIG_SPI_IMX=y -CONFIG_SPI_MASTER=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_STMP_DEVICE=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_OF=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_EHCI_MXC is not set -CONFIG_USB_GADGET=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_OTG=y -CONFIG_USB_PHY=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_3G is not set -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/imx6/patches-4.19/001-ARM-dts-imx-Add-GW5907-board-support.patch b/target/linux/imx6/patches-4.19/001-ARM-dts-imx-Add-GW5907-board-support.patch deleted file mode 100644 index 99d11692fa..0000000000 --- a/target/linux/imx6/patches-4.19/001-ARM-dts-imx-Add-GW5907-board-support.patch +++ /dev/null @@ -1,482 +0,0 @@ -From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:21 -0800 -Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support - -The Gateworks GW5907 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE Phy - - bi-color front-panel LED - - 256MB NAND boot device - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - Digital IO expander (pca9555) - - Joystick 12bit adc (ads1015) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5907.dts | 14 ++ - arch/arm/boot/dts/imx6q-gw5907.dts | 14 ++ - arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++ - 4 files changed, 429 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -404,6 +404,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw560x.dtb \ - imx6dl-gw5903.dtb \ - imx6dl-gw5904.dtb \ -+ imx6dl-gw5907.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -471,6 +472,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw560x.dtb \ - imx6q-gw5903.dtb \ - imx6q-gw5904.dtb \ -+ imx6q-gw5907.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5907.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5907.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907"; -+ compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5907.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5907.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5907"; -+ compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi -@@ -0,0 +1,399 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator-usb-otg-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c3>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ gpio@20 { -+ compatible = "nxp,pca9555"; -+ reg = <0x20>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ adc@48 { -+ compatible = "ti,ads1015"; -+ reg = <0x48>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ channel@4 { -+ reg = <4>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ -+ channel@5 { -+ reg = <5>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ -+ channel@6 { -+ reg = <6>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 -+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-4.19/002-ARM-dts-imx-Add-GW5910-board-support.patch b/target/linux/imx6/patches-4.19/002-ARM-dts-imx-Add-GW5910-board-support.patch deleted file mode 100644 index ec982e96ad..0000000000 --- a/target/linux/imx6/patches-4.19/002-ARM-dts-imx-Add-GW5910-board-support.patch +++ /dev/null @@ -1,583 +0,0 @@ -From a1fb69366bb16753f0fba6a891fbef5cdd97cfbe Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Wed, 8 Jan 2020 07:44:22 -0800 -Subject: [PATCH 2/4] ARM: dts: imx: Add GW5910 board support - -The Gateworks GW5910 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE RJ45 front-panel - - 1x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM - - 5V to 60V DC input barrel jack - - 3axis accelerometer (lis2de12) - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - microSD socket (with UHS-I support) - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6) - - WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6) - - RS232 transceiver (1x UART with flow-control or 2x UART (build option) - - off-board SPI connector (1x chip-select) - -Signed-off-by: Tim Harvey -Signed-off-by: Robert Jones -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5910.dts | 14 + - arch/arm/boot/dts/imx6q-gw5910.dts | 14 + - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 491 ++++++++++++++++++++++++++++++++++ - 4 files changed, 521 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5910.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5910.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5910.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -405,6 +405,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5903.dtb \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ -+ imx6dl-gw5910.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -473,6 +474,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5903.dtb \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ -+ imx6q-gw5910.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5910.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5910.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5910"; -+ compatible = "gw,imx6dl-gw5910", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5910.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5910.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5910"; -+ compatible = "gw,imx6q-gw5910", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -0,0 +1,491 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ -+ default-state = "off"; -+ }; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_wl: regulator-wl { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_reg_wl>; -+ compatible = "regulator-fixed"; -+ regulator-name = "wl"; -+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_bt: regulator-bt { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_reg_bt>; -+ compatible = "regulator-fixed"; -+ regulator-name = "bt"; -+ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+}; -+ -+ -+&ecspi3 { -+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi3>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accel@19 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_accel>; -+ compatible = "st,lis2de12"; -+ reg = <0x19>; -+ st,drdy-int-pin = <1>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 0>; -+ interrupt-names = "INT1"; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+/* off-board RS232 */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+/* serial console */ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+/* Sterling-LWB Bluetooth */ -+&uart4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ uart-has-rtscts; -+ status = "okay"; -+}; -+ -+/* GPS */ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_5p0v>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+/* Sterling-LWB SDIO WiFi */ -+&usdhc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc2>; -+ vmmc-supply = <®_3p3v>; -+ non-removable; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_accel: accelmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_ecspi3: escpi3grp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 -+ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 -+ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 -+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_reg_bt: regbtgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_reg_wl: regwlgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 -+ >; -+ }; -+ -+ pinctrl_usdhc2: usdhc2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 -+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 -+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 -+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 -+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 -+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-4.19/003-ARM-dts-imx-Add-GW5913-board-support.patch b/target/linux/imx6/patches-4.19/003-ARM-dts-imx-Add-GW5913-board-support.patch deleted file mode 100644 index 9c46401201..0000000000 --- a/target/linux/imx6/patches-4.19/003-ARM-dts-imx-Add-GW5913-board-support.patch +++ /dev/null @@ -1,435 +0,0 @@ -From 169e12f99cf9d5fce752564f32fd8df96461de43 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:23 -0800 -Subject: [PATCH 3/4] ARM: dts: imx: Add GW5913 board support - -The Gateworks GW5913 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE RJ45 front-panel - - 1x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM - - 6V to 60V DC input connector - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - nanoSIM socket - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5913.dts | 14 ++ - arch/arm/boot/dts/imx6q-gw5913.dts | 14 ++ - arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 348 ++++++++++++++++++++++++++++++++++ - 4 files changed, 378 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5913.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5913.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5913.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -406,6 +406,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ - imx6dl-gw5910.dtb \ -+ imx6dl-gw5913.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -475,6 +476,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ - imx6q-gw5910.dtb \ -+ imx6q-gw5913.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5913.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5913.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913"; -+ compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5913.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5913.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5913"; -+ compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi -@@ -0,0 +1,348 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-4.19/004-ARM-dts-imx-Add-GW5912-board-support.patch b/target/linux/imx6/patches-4.19/004-ARM-dts-imx-Add-GW5912-board-support.patch deleted file mode 100644 index cd03a95d8e..0000000000 --- a/target/linux/imx6/patches-4.19/004-ARM-dts-imx-Add-GW5912-board-support.patch +++ /dev/null @@ -1,551 +0,0 @@ -From 9a820b55817011f53771e6bfebae5fe059f0a534 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:24 -0800 -Subject: [PATCH 4/4] ARM: dts: imx: Add GW5912 board support - -The Gateworks GW5912 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - GbE RJ45 front-panel - - 4x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, mSATA - - 1x miniPCIe socket with PCI Gen2, USB2, mezzanine - - 10V to 60V DC input barrel jack - - 3axis accelerometer (lis2de12) - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - nanoSIM/microSD socket (with UHS-I support) - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - CAN Bus transceiver (mcp2562) - - RS232 transceiver (1x UART with flow-control or 2x UART (build option) - - off-board SPI connector (1x chip-select) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5912.dts | 13 + - arch/arm/boot/dts/imx6q-gw5912.dts | 13 + - arch/arm/boot/dts/imx6qdl-gw5912.dtsi | 461 ++++++++++++++++++++++++++++++++++ - 4 files changed, 489 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5912.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5912.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5912.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -406,6 +406,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ - imx6dl-gw5910.dtb \ -+ imx6dl-gw5912.dtb \ - imx6dl-gw5913.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ -@@ -476,6 +477,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ - imx6q-gw5910.dtb \ -+ imx6q-gw5912.dtb \ - imx6q-gw5913.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5912.dts -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5912.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5912"; -+ compatible = "gw,imx6dl-gw5912", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5912.dts -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5912.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5912"; -+ compatible = "gw,imx6q-gw5912", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi -@@ -0,0 +1,461 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x40000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_vbus: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+}; -+ -+&can1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_flexcan1>; -+ status = "okay"; -+}; -+ -+&ecspi2 { -+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi2>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accel@19 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_accel>; -+ compatible = "st,lis2de12"; -+ reg = <0x19>; -+ st,drdy-int-pin = <1>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 0>; -+ interrupt-names = "INT1"; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */ -+ status = "disabled"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ vbus-supply = <®_usb_vbus>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_3p3v>; -+ no-1-8-v; /* firmware will remove if board revision supports */ -+ status = "okay"; -+}; -+ -+&wdog1 { -+ status = "disabled"; -+}; -+ -+&wdog2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+ status = "okay"; -+}; -+ -+&iomuxc { -+ pinctrl_accel: accelmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_ecspi2: escpi2grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 -+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 -+ >; -+ }; -+ -+ pinctrl_flexcan1: flexcan1grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 -+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm1: pwm1grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-4.19/100-bootargs.patch b/target/linux/imx6/patches-4.19/100-bootargs.patch deleted file mode 100644 index caf2d2a372..0000000000 --- a/target/linux/imx6/patches-4.19/100-bootargs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/imx6dl-wandboard.dts -+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts -@@ -15,4 +15,8 @@ - memory@10000000 { - reg = <0x10000000 0x40000000>; - }; -+ -+ chosen { -+ bootargs = "console=ttymxc0,115200"; -+ }; - }; diff --git a/target/linux/imx6/patches-4.19/301-apalis-ixora-dts-leds.patch b/target/linux/imx6/patches-4.19/301-apalis-ixora-dts-leds.patch deleted file mode 100644 index bae9df1734..0000000000 --- a/target/linux/imx6/patches-4.19/301-apalis-ixora-dts-leds.patch +++ /dev/null @@ -1,86 +0,0 @@ -arm: dts: apalis-ixora: Add status LEDs aliases - -Signed-off-by: Petr Štetiar - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -60,6 +60,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -127,22 +131,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; - gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -61,6 +61,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -128,22 +132,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; -- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; -- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; diff --git a/target/linux/imx6/patches-4.19/302-apalis-ixora-dts-reset-button.patch b/target/linux/imx6/patches-4.19/302-apalis-ixora-dts-reset-button.patch deleted file mode 100644 index da9de296a2..0000000000 --- a/target/linux/imx6/patches-4.19/302-apalis-ixora-dts-reset-button.patch +++ /dev/null @@ -1,76 +0,0 @@ -arm: dts: apalis-ixora: Add switch3 as reset button - -Signed-off-by: Petr Štetiar - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -74,7 +74,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -83,6 +83,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -296,4 +303,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -73,7 +73,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -82,6 +82,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -297,4 +304,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; diff --git a/target/linux/malta/config-4.19 b/target/linux/malta/config-4.19 deleted file mode 100644 index 862f869704..0000000000 --- a/target/linux/malta/config-4.19 +++ /dev/null @@ -1,329 +0,0 @@ -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ATA=y -CONFIG_ATA_PIIX=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -# CONFIG_BLK_DEV_DM is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_MD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BOARD_SCACHE=y -CONFIG_BOOT_ELF32=y -CONFIG_BOUNCE=y -CONFIG_BUILTIN_DTB=y -CONFIG_CEVT_R4K=y -CONFIG_CLKBLD_I8253=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKEVT_I8253=y -CONFIG_CLKSRC_I8253=y -CONFIG_CLKSRC_MIPS_GIC=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_BOSTON is not set -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -# CONFIG_CPU_HAS_SMARTMIPS is not set -CONFIG_CPU_HAS_SYNC=y -# CONFIG_CPU_MICROMIPS is not set -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS32_3_5_FEATURES is not set -# CONFIG_CPU_MIPS32_R1 is not set -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS32_R5_FEATURES is not set -# CONFIG_CPU_MIPS32_R6 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_MIPS64_R6 is not set -CONFIG_CPU_MIPSR2=y -CONFIG_CPU_MIPSR2_IRQ_EI=y -CONFIG_CPU_MIPSR2_IRQ_VI=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -# CONFIG_CPU_NEVADA is not set -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_R4K_FPU=y -# CONFIG_CPU_RM7000 is not set -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CPU_SUPPORTS_MSA=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DMA_MAYBE_COHERENT=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y -CONFIG_DMA_NONCOHERENT_MMAP=y -CONFIG_DMA_NONCOHERENT_OPS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_EXT4_FS=y -CONFIG_F2FS_FS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_IPI=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GLOB=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PCSPKR_PLATFORM=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_HAS_PCI=y -CONFIG_I8253=y -CONFIG_I8253_LOCK=y -CONFIG_I8259=y -CONFIG_INPUT=y -# CONFIG_INPUT_MISC is not set -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -CONFIG_ISA_DMA_API=y -CONFIG_JBD2=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_KALLSYMS=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_XZ is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_MD=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_BONITO64=y -CONFIG_MIPS_CLOCK_VSYSCALL=y -CONFIG_MIPS_CM=y -# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set -CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_MIPS_CMDLINE_FROM_DTB is not set -# CONFIG_MIPS_CMP is not set -CONFIG_MIPS_CPC=y -# CONFIG_MIPS_CPS is not set -CONFIG_MIPS_CPU_SCACHE=y -# CONFIG_MIPS_ELF_APPENDED_DTB is not set -CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_GIC=y -CONFIG_MIPS_L1_CACHE_SHIFT=6 -CONFIG_MIPS_L1_CACHE_SHIFT_6=y -CONFIG_MIPS_MALTA=y -CONFIG_MIPS_MSC=y -CONFIG_MIPS_MT=y -CONFIG_MIPS_MT_FPAFF=y -CONFIG_MIPS_MT_SMP=y -CONFIG_MIPS_NO_APPENDED_DTB=y -CONFIG_MIPS_NR_CPU_NR_MAP=2 -CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y -# CONFIG_MIPS_RAW_APPENDED_DTB is not set -CONFIG_MIPS_SPRAM=y -# CONFIG_MIPS_VPE_LOADER is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MTD_CFI_STAA=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_NET=y -CONFIG_PADATA=y -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PATA_LEGACY=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PCI_GT64XXX_PCI0=y -CONFIG_PCSPKR_PLATFORM=y -CONFIG_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_PIIX4_POWEROFF=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_QUOTA=y -CONFIG_QUOTACTL=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_QUOTA_TREE=y -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RELAY=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_SCSI=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_UP=y -CONFIG_SRCU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SYNC_R4K=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_HAS_CPU_MIPS32_R2=y -CONFIG_SYS_HAS_CPU_MIPS32_R3_5=y -CONFIG_SYS_HAS_CPU_MIPS32_R5=y -CONFIG_SYS_HAS_CPU_MIPS32_R6=y -CONFIG_SYS_HAS_CPU_MIPS64_R1=y -CONFIG_SYS_HAS_CPU_MIPS64_R2=y -CONFIG_SYS_HAS_CPU_MIPS64_R6=y -CONFIG_SYS_HAS_CPU_NEVADA=y -CONFIG_SYS_HAS_CPU_RM7000=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HIGHMEM=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_SYS_SUPPORTS_MICROMIPS=y -CONFIG_SYS_SUPPORTS_MIPS16=y -CONFIG_SYS_SUPPORTS_MIPS_CMP=y -CONFIG_SYS_SUPPORTS_MIPS_CPS=y -CONFIG_SYS_SUPPORTS_MULTITHREADING=y -CONFIG_SYS_SUPPORTS_RELOCATABLE=y -CONFIG_SYS_SUPPORTS_SCHED_SMT=y -CONFIG_SYS_SUPPORTS_SMARTMIPS=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_SYS_SUPPORTS_VPE_LOADER=y -CONFIG_SYS_SUPPORTS_ZBOOT=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_USB_SUPPORT=y -# CONFIG_USERIO is not set -CONFIG_USE_OF=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_VXFS_FS=y -CONFIG_XPS=y diff --git a/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629-lynx-rfb.dts b/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629-lynx-rfb.dts deleted file mode 100644 index 15b667d837..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629-lynx-rfb.dts +++ /dev/null @@ -1,317 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2019 MediaTek Inc. - * Author: Ryder Lee - */ - -/dts-v1/; -#include -#include "mt7629.dtsi" - -/ { - model = "MediaTek MT7629 reference board"; - compatible = "mediatek,mt7629-lynx-rfb", "mediatek,mt7629"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "factory"; - linux,code = ; - gpios = <&pio 60 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 58 GPIO_ACTIVE_LOW>; - }; - }; - - gsw: gsw@0 { - compatible = "mediatek,mt753x"; - mediatek,ethsys = <ðsys>; - #address-cells = <1>; - #size-cells = <0>; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x10000000>; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "fixed-5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -ð { - pinctrl-names = "default"; - pinctrl-0 = <&ephy_leds_pins>; - status = "okay"; - - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - mtd-mac-address = <&factory 0x2a>; - phy-mode = "sgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - mtd-mac-address = <&factory 0x24>; - phy-handle = <&phy0>; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - phy0: ethernet-phy@0 { - reg = <0>; - phy-mode = "gmii"; - }; - }; -}; - -&gsw { - mediatek,mdio = <&mdio>; - mediatek,portmap = "llllw"; - mediatek,mdio_master_pinmux = <0>; - reset-gpios = <&pio 28 0>; - interrupt-parent = <&pio>; - interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; - status = "okay"; - - port6: port@6 { - compatible = "mediatek,mt753x-port"; - reg = <6>; - phy-mode = "sgmii"; - fixed-link { - speed = <2500>; - full-duplex; - }; - }; -}; - -&i2c { - pinctrl-names = "default"; - pinctrl-0 = <&i2c_pins>; - status = "okay"; -}; - -&qspi { - pinctrl-names = "default"; - pinctrl-0 = <&qspi_pins>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000 0x60000>; - read-only; - }; - - partition@60000 { - label = "u-boot-env"; - reg = <0x60000 0x10000>; - read-only; - }; - - factory: partition@70000 { - label = "factory"; - reg = <0x70000 0x40000>; - read-only; - }; - - partition@b0000 { - label = "firmware"; - reg = <0xb0000 0xb50000>; - }; - }; - }; -}; - -&pio { - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio"; - }; - }; - - ephy_leds_pins: ephy-leds-pins { - mux { - function = "led"; - groups = "gphy_leds_0", "ephy_leds"; - }; - }; - - i2c_pins: i2c-pins { - mux { - function = "i2c"; - groups = "i2c_0"; - }; - - conf { - pins = "I2C_SDA", "I2C_SCL"; - drive-strength = <4>; - bias-disable; - }; - }; - - pcie_pins: pcie-pins { - mux { - function = "pcie"; - groups = "pcie_clkreq", - "pcie_pereset", - "pcie_wake"; - }; - }; - - pwm_pins: pwm-pins { - mux { - function = "pwm"; - groups = "pwm_0"; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spi_pins: spi-pins { - mux { - function = "spi"; - groups = "spi_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - qspi_pins: qspi-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_txd_rxd" ; - }; - }; - - uart1_pins: uart1-pins { - mux { - function = "uart"; - groups = "uart1_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_0_txd_rxd" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; - - wmac0_pins: wmac0-pins { - mux { - function = "wifi"; - groups = "wf0_5g"; - drive-strength = <4>; - }; - }; - - wmac1_pins: wmac0-pins { - mux { - function = "wifi"; - groups = "wf0_2g"; - drive-strength = <4>; - }; - }; -}; - -&spi { - pinctrl-names = "default"; - pinctrl-0 = <&spi_pins>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_5v>; - status = "okay"; -}; - -&u3phy1 { - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; - -&wmac { - pinctrl-names = "default"; - pinctrl-0 = <&wmac0_pins>; - pinctrl-1 = <&wmac1_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629-rfb.dts b/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629-rfb.dts deleted file mode 100644 index 15b667d837..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629-rfb.dts +++ /dev/null @@ -1,317 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2019 MediaTek Inc. - * Author: Ryder Lee - */ - -/dts-v1/; -#include -#include "mt7629.dtsi" - -/ { - model = "MediaTek MT7629 reference board"; - compatible = "mediatek,mt7629-lynx-rfb", "mediatek,mt7629"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "factory"; - linux,code = ; - gpios = <&pio 60 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 58 GPIO_ACTIVE_LOW>; - }; - }; - - gsw: gsw@0 { - compatible = "mediatek,mt753x"; - mediatek,ethsys = <ðsys>; - #address-cells = <1>; - #size-cells = <0>; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x10000000>; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "fixed-5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -ð { - pinctrl-names = "default"; - pinctrl-0 = <&ephy_leds_pins>; - status = "okay"; - - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - mtd-mac-address = <&factory 0x2a>; - phy-mode = "sgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - mtd-mac-address = <&factory 0x24>; - phy-handle = <&phy0>; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - phy0: ethernet-phy@0 { - reg = <0>; - phy-mode = "gmii"; - }; - }; -}; - -&gsw { - mediatek,mdio = <&mdio>; - mediatek,portmap = "llllw"; - mediatek,mdio_master_pinmux = <0>; - reset-gpios = <&pio 28 0>; - interrupt-parent = <&pio>; - interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; - status = "okay"; - - port6: port@6 { - compatible = "mediatek,mt753x-port"; - reg = <6>; - phy-mode = "sgmii"; - fixed-link { - speed = <2500>; - full-duplex; - }; - }; -}; - -&i2c { - pinctrl-names = "default"; - pinctrl-0 = <&i2c_pins>; - status = "okay"; -}; - -&qspi { - pinctrl-names = "default"; - pinctrl-0 = <&qspi_pins>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000 0x60000>; - read-only; - }; - - partition@60000 { - label = "u-boot-env"; - reg = <0x60000 0x10000>; - read-only; - }; - - factory: partition@70000 { - label = "factory"; - reg = <0x70000 0x40000>; - read-only; - }; - - partition@b0000 { - label = "firmware"; - reg = <0xb0000 0xb50000>; - }; - }; - }; -}; - -&pio { - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio"; - }; - }; - - ephy_leds_pins: ephy-leds-pins { - mux { - function = "led"; - groups = "gphy_leds_0", "ephy_leds"; - }; - }; - - i2c_pins: i2c-pins { - mux { - function = "i2c"; - groups = "i2c_0"; - }; - - conf { - pins = "I2C_SDA", "I2C_SCL"; - drive-strength = <4>; - bias-disable; - }; - }; - - pcie_pins: pcie-pins { - mux { - function = "pcie"; - groups = "pcie_clkreq", - "pcie_pereset", - "pcie_wake"; - }; - }; - - pwm_pins: pwm-pins { - mux { - function = "pwm"; - groups = "pwm_0"; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spi_pins: spi-pins { - mux { - function = "spi"; - groups = "spi_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - qspi_pins: qspi-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_txd_rxd" ; - }; - }; - - uart1_pins: uart1-pins { - mux { - function = "uart"; - groups = "uart1_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_0_txd_rxd" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; - - wmac0_pins: wmac0-pins { - mux { - function = "wifi"; - groups = "wf0_5g"; - drive-strength = <4>; - }; - }; - - wmac1_pins: wmac0-pins { - mux { - function = "wifi"; - groups = "wf0_2g"; - drive-strength = <4>; - }; - }; -}; - -&spi { - pinctrl-names = "default"; - pinctrl-0 = <&spi_pins>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_5v>; - status = "okay"; -}; - -&u3phy1 { - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; - -&wmac { - pinctrl-names = "default"; - pinctrl-0 = <&wmac0_pins>; - pinctrl-1 = <&wmac1_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629.dtsi b/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629.dtsi deleted file mode 100644 index 68af4897b6..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm/boot/dts/mt7629.dtsi +++ /dev/null @@ -1,423 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2019 MediaTek Inc. - * - * Author: Ryder Lee - */ - -#include -#include -#include -#include -#include -#include -#include - -/ { - compatible = "mediatek,mt7629"; - interrupt-parent = <&sysirq>; - #address-cells = <2>; - #size-cells = <2>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "mediatek,mt6589-smp"; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x0>; - clock-frequency = <1250000000>; - cci-control-port = <&cci_control2>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x1>; - clock-frequency = <1250000000>; - cci-control-port = <&cci_control2>; - }; - }; - - pmu { - compatible = "arm,cortex-a7-pmu"; - interrupts = , - ; - interrupt-affinity = <&cpu0>, <&cpu1>; - }; - - clk20m: oscillator-0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <20000000>; - clock-output-names = "clk20m"; - }; - - clk40m: oscillator-1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <40000000>; - clock-output-names = "clkxtal"; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupt-parent = <&gic>; - interrupts = , - , - , - ; - clock-frequency = <20000000>; - arm,cpu-registers-not-fw-configured; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - infracfg: syscon@10000000 { - compatible = "mediatek,mt7629-infracfg", "syscon"; - reg = <0x10000000 0x1000>; - #clock-cells = <1>; - }; - - pericfg: syscon@10002000 { - compatible = "mediatek,mt7629-pericfg", "syscon"; - reg = <0x10002000 0x1000>; - #clock-cells = <1>; - }; - - scpsys: scpsys@10006000 { - compatible = "mediatek,mt7629-scpsys", - "mediatek,mt7622-scpsys"; - #power-domain-cells = <1>; - reg = <0x10006000 0x1000>; - clocks = <&topckgen CLK_TOP_HIF_SEL>; - clock-names = "hif_sel"; - assigned-clocks = <&topckgen CLK_TOP_HIF_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; - infracfg = <&infracfg>; - }; - - timer: timer@10009000 { - compatible = "mediatek,mt7629-timer", - "mediatek,mt6765-timer"; - reg = <0x10009000 0x60>; - interrupts = , - ; - clocks = <&clk20m>; - clock-names = "clk20m"; - }; - - sysirq: interrupt-controller@10200a80 { - compatible = "mediatek,mt7629-sysirq", - "mediatek,mt6577-sysirq"; - reg = <0x10200a80 0x20>; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - }; - - apmixedsys: syscon@10209000 { - compatible = "mediatek,mt7629-apmixedsys", "syscon"; - reg = <0x10209000 0x1000>; - #clock-cells = <1>; - }; - - rng: rng@1020f000 { - compatible = "mediatek,mt7629-rng", - "mediatek,mt7623-rng"; - reg = <0x1020f000 0x100>; - clocks = <&infracfg CLK_INFRA_TRNG_PD>; - clock-names = "rng"; - }; - - topckgen: syscon@10210000 { - compatible = "mediatek,mt7629-topckgen", "syscon"; - reg = <0x10210000 0x1000>; - #clock-cells = <1>; - }; - - watchdog: watchdog@10212000 { - compatible = "mediatek,mt7629-wdt", - "mediatek,mt6589-wdt"; - reg = <0x10212000 0x100>; - }; - - pio: pinctrl@10217000 { - compatible = "mediatek,mt7629-pinctrl"; - reg = <0x10217000 0x8000>, - <0x10005000 0x1000>; - reg-names = "base", "eint"; - gpio-controller; - gpio-ranges = <&pio 0 0 79>; - #gpio-cells = <2>; - #interrupt-cells = <2>; - interrupt-controller; - interrupts = ; - interrupt-parent = <&gic>; - }; - - gic: interrupt-controller@10300000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0x10310000 0x1000>, - <0x10320000 0x1000>, - <0x10340000 0x2000>, - <0x10360000 0x2000>; - }; - - cci: cci@10390000 { - compatible = "arm,cci-400"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x10390000 0x1000>; - ranges = <0 0x10390000 0x10000>; - - cci_control0: slave-if@1000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace-lite"; - reg = <0x1000 0x1000>; - }; - - cci_control1: slave-if@4000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x4000 0x1000>; - }; - - cci_control2: slave-if@5000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; - - pmu@9000 { - compatible = "arm,cci-400-pmu,r1"; - reg = <0x9000 0x5000>; - interrupts = , - , - , - , - ; - }; - }; - - uart0: serial@11002000 { - compatible = "mediatek,mt7629-uart", - "mediatek,mt6577-uart"; - reg = <0x11002000 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART0_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart1: serial@11003000 { - compatible = "mediatek,mt7629-uart", - "mediatek,mt6577-uart"; - reg = <0x11003000 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART1_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart2: serial@11004000 { - compatible = "mediatek,mt7629-uart", - "mediatek,mt6577-uart"; - reg = <0x11004000 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART2_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - i2c: i2c@11007000 { - compatible = "mediatek,mt7629-i2c", - "mediatek,mt2712-i2c"; - reg = <0x11007000 0x90>, - <0x11000100 0x80>; - interrupts = ; - clock-div = <4>; - clocks = <&pericfg CLK_PERI_I2C0_PD>, - <&pericfg CLK_PERI_AP_DMA_PD>; - clock-names = "main", "dma"; - assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi: spi@1100a000 { - compatible = "mediatek,mt7629-spi", - "mediatek,mt7622-spi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x1100a000 0x100>; - interrupts = ; - clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, - <&topckgen CLK_TOP_SPI0_SEL>, - <&pericfg CLK_PERI_SPI0_PD>; - clock-names = "parent-clk", "sel-clk", "spi-clk"; - status = "disabled"; - }; - - qspi: spi@11014000 { - compatible = "mediatek,mt7629-nor", - "mediatek,mt8173-nor"; - reg = <0x11014000 0xe0>; - clocks = <&pericfg CLK_PERI_FLASH_PD>, - <&topckgen CLK_TOP_FLASH_SEL>; - clock-names = "spi", "sf"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - wmac: wmac@18000000 { - compatible = "mediatek,mt7629-wmac"; - reg = <0x18000000 0x100000>; - interrupts = , - ; - mediatek,mtd-eeprom = <&factory 0x0000>; - status = "disabled"; - }; - - ssusbsys: syscon@1a000000 { - compatible = "mediatek,mt7629-ssusbsys", "syscon"; - reg = <0x1a000000 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - ssusb: usb@1a0c0000 { - compatible = "mediatek,mt7629-xhci", - "mediatek,mtk-xhci"; - reg = <0x1a0c0000 0x01000>, - <0x1a0c3e00 0x0100>; - reg-names = "mac", "ippc"; - interrupts = ; - clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, - <&ssusbsys CLK_SSUSB_REF_EN>, - <&ssusbsys CLK_SSUSB_MCU_EN>, - <&ssusbsys CLK_SSUSB_DMA_EN>; - clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; - assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>, - <&topckgen CLK_TOP_SATA_SEL>, - <&topckgen CLK_TOP_HIF_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>, - <&topckgen CLK_TOP_UNIVPLL2_D4>, - <&topckgen CLK_TOP_UNIVPLL1_D2>; - power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF1>; - phys = <&u2port0 PHY_TYPE_USB2>, - <&u3port0 PHY_TYPE_USB3>; - status = "disabled"; - }; - - u3phy1: usb-phy@1a0c4000 { - compatible = "mediatek,generic-tphy-v2"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - status = "disabled"; - - u2port0: usb-phy@1a0c4000 { - reg = <0x1a0c4000 0x700>; - clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>; - clock-names = "ref"; - #phy-cells = <1>; - status = "okay"; - }; - - u3port0: usb-phy@1a1c4700 { - reg = <0x1a1c4700 0x700>; - clocks = <&clk20m>; - clock-names = "ref"; - #phy-cells = <1>; - status = "okay"; - }; - }; - - pciesys: syscon@1a100800 { - compatible = "mediatek,mt7629-pciesys", "syscon"; - reg = <0x1a100800 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - ethsys: syscon@1b000000 { - compatible = "mediatek,mt7629-ethsys", "syscon"; - reg = <0x1b000000 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - eth: ethernet@1b100000 { - compatible = "mediatek,mt7629-eth", - "syscon"; - reg = <0x1b100000 0x20000>; - interrupts = , - , - ; - clocks = <&topckgen CLK_TOP_ETH_SEL>, - <&topckgen CLK_TOP_F10M_REF_SEL>, - <ðsys CLK_ETH_ESW_EN>, - <ðsys CLK_ETH_GP0_EN>, - <ðsys CLK_ETH_GP1_EN>, - <ðsys CLK_ETH_GP2_EN>, - <ðsys CLK_ETH_FE_EN>, - <&sgmiisys0 CLK_SGMII_TX_EN>, - <&sgmiisys0 CLK_SGMII_RX_EN>, - <&sgmiisys0 CLK_SGMII_CDR_REF>, - <&sgmiisys0 CLK_SGMII_CDR_FB>, - <&sgmiisys1 CLK_SGMII_TX_EN>, - <&sgmiisys1 CLK_SGMII_RX_EN>, - <&sgmiisys1 CLK_SGMII_CDR_REF>, - <&sgmiisys1 CLK_SGMII_CDR_FB>, - <&apmixedsys CLK_APMIXED_SGMIPLL>, - <&apmixedsys CLK_APMIXED_ETH2PLL>; - clock-names = "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", - "fe", "sgmii_tx250m", "sgmii_rx250m", - "sgmii_cdr_ref", "sgmii_cdr_fb", - "sgmii2_tx250m", "sgmii2_rx250m", - "sgmii2_cdr_ref", "sgmii2_cdr_fb", - "sgmii_ck", "eth2pll"; - assigned-clocks = <&topckgen CLK_TOP_ETH_SEL>, - <&topckgen CLK_TOP_F10M_REF_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>, - <&topckgen CLK_TOP_SGMIIPLL_D2>; - power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys0>,<&sgmiisys1>; - mediatek,infracfg = <&infracfg>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sgmiisys0: syscon@1b128000 { - compatible = "mediatek,mt7629-sgmiisys", "syscon"; - reg = <0x1b128000 0x3000>; - #clock-cells = <1>; - mediatek,physpeed = "2500"; - }; - - sgmiisys1: syscon@1b130000 { - compatible = "mediatek,mt7629-sgmiisys", "syscon"; - reg = <0x1b130000 0x3000>; - #clock-cells = <1>; - mediatek,physpeed = "2500"; - }; - }; -}; diff --git a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts deleted file mode 100644 index f1cbd94b40..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +++ /dev/null @@ -1,573 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR MIT) -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Ryder Lee - */ - -/dts-v1/; -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "Bananapi BPI-R64"; - compatible = "bananapi,bpi-r64", "mediatek,mt7622"; - - chosen { - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 0 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 102 GPIO_ACTIVE_HIGH>; - }; - }; - - gsw: gsw@0 { - compatible = "mediatek,mt753x"; - mediatek,ethsys = <ðsys>; - #address-cells = <1>; - #size-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - - green { - label = "bpi-r64:pio:green"; - gpios = <&pio 89 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - red { - label = "bpi-r64:pio:red"; - gpios = <&pio 88 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; - - memory { - reg = <0 0x40000000 0 0x40000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "fixed-5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; - -}; - -&bch { - status = "disabled"; -}; - -&btif { - status = "okay"; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&irrx_pins>; - status = "okay"; -}; - -ð { - status = "okay"; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "sgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&gsw { - mediatek,mdio = <&mdio>; - mediatek,portmap = "wllll"; - mediatek,mdio_master_pinmux = <0>; - reset-gpios = <&pio 54 0>; - interrupt-parent = <&pio>; - interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; - status = "okay"; - - port5: port@5 { - compatible = "mediatek,mt753x-port"; - reg = <5>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port6: port@6 { - compatible = "mediatek,mt753x-port"; - reg = <6>; - phy-mode = "sgmii"; - fixed-link { - speed = <2500>; - full-duplex; - }; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&emmc_pins_default>; - pinctrl-1 = <&emmc_pins_uhs>; - status = "okay"; - bus-width = <8>; - max-frequency = <50000000>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; - non-removable; -}; - -&mmc1 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&sd0_pins_default>; - pinctrl-1 = <&sd0_pins_uhs>; - status = "okay"; - bus-width = <4>; - max-frequency = <50000000>; - cap-sd-highspeed; - r_smpl = <1>; - cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_3p3v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; -}; - -&nandc { - pinctrl-names = "default"; - pinctrl-0 = <¶llel_nand_pins>; - status = "disabled"; -}; - -&nor_flash { - pinctrl-names = "default"; - pinctrl-0 = <&spi_nor_pins>; - status = "disabled"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - }; -}; - -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>; - status = "okay"; - - pcie@0,0 { - status = "okay"; - }; - - pcie@1,0 { - status = "okay"; - }; -}; - -&pio { - /* Attention: GPIO 90 is used to switch between PCIe@1,0 and - * SATA functions. i.e. output-high: PCIe, output-low: SATA - */ - asm_sel { - gpio-hog; - gpios = <90 GPIO_ACTIVE_HIGH>; - output-high; - }; - - /* eMMC is shared pin with parallel NAND */ - emmc_pins_default: emmc-pins-default { - mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; - - /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", - * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, - * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively - */ - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - bias-pull-down; - }; - }; - - emmc_pins_uhs: emmc-pins-uhs { - mux { - function = "emmc"; - groups = "emmc"; - }; - - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - drive-strength = <4>; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - drive-strength = <4>; - bias-pull-down; - }; - }; - - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - i2c1_pins: i2c1-pins { - mux { - function = "i2c"; - groups = "i2c1_0"; - }; - }; - - i2c2_pins: i2c2-pins { - mux { - function = "i2c"; - groups = "i2c2_0"; - }; - }; - - i2s1_pins: i2s1-pins { - mux { - function = "i2s"; - groups = "i2s_out_mclk_bclk_ws", - "i2s1_in_data", - "i2s1_out_data"; - }; - - conf { - pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", - "I2S_WS", "I2S_MCLK"; - drive-strength = <12>; - bias-pull-down; - }; - }; - - irrx_pins: irrx-pins { - mux { - function = "ir"; - groups = "ir_1_rx"; - }; - }; - - irtx_pins: irtx-pins { - mux { - function = "ir"; - groups = "ir_1_tx"; - }; - }; - - /* Parallel nand is shared pin with eMMC */ - parallel_nand_pins: parallel-nand-pins { - mux { - function = "flash"; - groups = "par_nand"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - pwm7_pins: pwm1-2-pins { - mux { - function = "pwm"; - groups = "pwm_ch7_2"; - }; - }; - - wled_pins: wled-pins { - mux { - function = "led"; - groups = "wled"; - }; - }; - - sd0_pins_default: sd0-pins-default { - mux { - function = "sd"; - groups = "sd_0"; - }; - - /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", - * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, - * DAT2, DAT3, CMD, CLK for SD respectively. - */ - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - drive-strength = <8>; - bias-pull-up; - }; - conf-clk { - pins = "I2S3_OUT"; - drive-strength = <12>; - bias-pull-down; - }; - conf-cd { - pins = "TXD3"; - bias-pull-up; - }; - }; - - sd0_pins_uhs: sd0-pins-uhs { - mux { - function = "sd"; - groups = "sd_0"; - }; - - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "I2S3_OUT"; - bias-pull-down; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spic0_pins: spic0-pins { - mux { - function = "spi"; - groups = "spic0_0"; - }; - }; - - spic1_pins: spic1-pins { - mux { - function = "spi"; - groups = "spic1_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - /* serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_1_tx_rx" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; - status = "okay"; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&sata { - status = "disable"; -}; - -&sata_phy { - status = "disable"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spic0_pins>; - status = "okay"; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spic1_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_5v>; - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts b/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts deleted file mode 100644 index 6e94e49bc1..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts +++ /dev/null @@ -1,612 +0,0 @@ -/* - * Copyright (c) 2017 MediaTek Inc. - * Author: Ming Huang - * Sean Wang - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) - */ - -/dts-v1/; -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "Elecom WRC-2533"; - compatible = "elecom,wrc-2533gent", "mediatek,mt7622"; - - aliases { - led-boot = &led_power; - led-failsafe = &led_power; - led-running = &led_power; - led-upgrade = &led_power; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - poll-interval = <100>; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 0 GPIO_ACTIVE_HIGH>; - }; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 102 GPIO_ACTIVE_LOW>; - }; - - switch0 { - label = "switch0"; - gpios = <&pio 1 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - - switch1 { - label = "switch1"; - gpios = <&pio 16 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - - switch2 { - label = "switch2"; - gpios = <&pio 17 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - - switch3 { - label = "switch3"; - gpios = <&pio 18 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - }; - - leds { - compatible = "gpio-leds"; - - led_power: power_g { - label = "wrc-2533:green:power"; - gpios = <&pio 2 GPIO_ACTIVE_HIGH>; - }; - - power_b { - label = "wrc-2533:blue:power"; - gpios = <&pio 19 GPIO_ACTIVE_HIGH>; - }; - - power_r { - label = "wrc-2533:red:power"; - gpios = <&pio 73 GPIO_ACTIVE_HIGH>; - }; - - usb { - label = "wrc-2533:blue:usb"; - gpios = <&pio 74 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "wrc-2533:red:wps"; - gpios = <&pio 76 GPIO_ACTIVE_LOW>; - }; - - wifi2 { - label = "wrc-2533:blue:wifi2g"; - gpios = <&pio 85 GPIO_ACTIVE_LOW>; - }; - - wifi5 { - label = "wrc-2533:blue:wifi5g"; - gpios = <&pio 91 GPIO_ACTIVE_LOW>; - }; - }; - - reg_usb_vbus: regulator { - compatible = "regulator-fixed"; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&pio 22 GPIO_ACTIVE_LOW>; - enable-active-high; - }; - - memory { - reg = <0 0x40000000 0 0x3F000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - rtkgsw: rtkgsw@0 { - compatible = "mediatek,rtk-gsw"; - mediatek,ethsys = <ðsys>; - mediatek,mdio = <&mdio>; - mediatek,reset-pin = <&pio 54 0>; - status = "okay"; - }; -}; - -&pcie { - pinctrl-names = "default", "pcie1_pins"; - pinctrl-0 = <&pcie0_pins>; - pinctrl-1 = <&pcie1_pins>; - status = "okay"; - - pcie@0,0 { - status = "okay"; - mt7615@0,0 { - reg = <0x0000 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x05000>; - }; - }; - - pcie@1,0 { - status = "okay"; - }; -}; - -&pio { - /* eMMC is shared pin with parallel NAND */ - emmc_pins_default: emmc-pins-default { - mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; - - /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", - * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, - * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively - */ - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - bias-pull-down; - }; - }; - - emmc_pins_uhs: emmc-pins-uhs { - mux { - function = "emmc"; - groups = "emmc"; - }; - - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - drive-strength = <4>; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - drive-strength = <4>; - bias-pull-down; - }; - }; - - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - i2c1_pins: i2c1-pins { - mux { - function = "i2c"; - groups = "i2c1_0"; - }; - }; - - i2c2_pins: i2c2-pins { - mux { - function = "i2c"; - groups = "i2c2_0"; - }; - }; - - i2s1_pins: i2s1-pins { - mux { - function = "i2s"; - groups = "i2s_out_mclk_bclk_ws", - "i2s1_in_data", - "i2s1_out_data"; - }; - - conf { - pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", - "I2S_WS", "I2S_MCLK"; - drive-strength = <12>; - bias-pull-down; - }; - }; - - irrx_pins: irrx-pins { - mux { - function = "ir"; - groups = "ir_1_rx"; - }; - }; - - irtx_pins: irtx-pins { - mux { - function = "ir"; - groups = "ir_1_tx"; - }; - }; - - /* Parallel nand is shared pin with eMMC */ - parallel_nand_pins: parallel-nand-pins { - mux { - function = "flash"; - groups = "par_nand"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - pwm7_pins: pwm1-2-pins { - mux { - function = "pwm"; - groups = "pwm_ch7_2"; - }; - }; - - wled_pins: wled-pins { - mux { - function = "led"; - groups = "wled"; - }; - }; - - sd0_pins_default: sd0-pins-default { - mux { - function = "sd"; - groups = "sd_0"; - }; - - /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", - * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, - * DAT2, DAT3, CMD, CLK for SD respectively. - */ - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - drive-strength = <8>; - bias-pull-up; - }; - conf-clk { - pins = "I2S3_OUT"; - drive-strength = <12>; - bias-pull-down; - }; - conf-cd { - pins = "TXD3"; - bias-pull-up; - }; - }; - - sd0_pins_uhs: sd0-pins-uhs { - mux { - function = "sd"; - groups = "sd_0"; - }; - - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "I2S3_OUT"; - bias-pull-down; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spic0_pins: spic0-pins { - mux { - function = "spi"; - groups = "spic0_0"; - }; - }; - - spic1_pins: spic1-pins { - mux { - function = "spi"; - groups = "spic1_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - /* serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_1_tx_rx" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&bch { - status = "okay"; -}; - -&btif { - status = "okay"; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&irrx_pins>; - status = "okay"; -}; - -ð { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <ð_pins>; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "sgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; - status = "okay"; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&snfi { - pinctrl-names = "default"; - pinctrl-0 = <&serial_nand_pins>; - status = "okay"; - - spi_nand@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - spi-max-frequency = <104000000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "preloader"; - reg = <0x00000 0x0080000>; - read-only; - }; - - partition@80000 { - label = "ATF"; - reg = <0x80000 0x0040000>; - read-only; - }; - - partition@c0000 { - label = "uboot"; - reg = <0xc0000 0x0080000>; - read-only; - }; - - partition@140000 { - label = "uboot-env"; - reg = <0x140000 0x0080000>; - read-only; - }; - - factory: partition@1c0000 { - label = "factory"; - reg = <0x1c0000 0x0040000>; - read-only; - }; - - partition@200000 { - label = "firmware"; - reg = <0x200000 0x2000000>; - }; - - partition@2200000 { - label = "reserved"; - reg = <0x2200000 0x4000000>; - }; - }; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spic0_pins>; - status = "okay"; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spic1_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_usb_vbus>; - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; - -&wmac { - mediatek,mtd-eeprom = <&factory 0x0000>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-lynx-rfb1.dts b/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-lynx-rfb1.dts deleted file mode 100644 index 52db118231..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-lynx-rfb1.dts +++ /dev/null @@ -1,609 +0,0 @@ -/* - * Copyright (c) 2017 MediaTek Inc. - * Author: Ming Huang - * Sean Wang - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) - */ - -/dts-v1/; -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "MediaTek MT7622 RFB1 board"; - compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - poll-interval = <100>; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 0 0>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 102 0>; - }; - }; - - gsw: gsw@0 { - compatible = "mediatek,mt753x"; - mediatek,ethsys = <ðsys>; - #address-cells = <1>; - #size-cells = <0>; - }; - - memory { - reg = <0 0x40000000 0 0x3F000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "fixed-5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&pcie { - pinctrl-names = "default", "pcie1_pins"; - pinctrl-0 = <&pcie0_pins>; - pinctrl-1 = <&pcie1_pins>; - status = "okay"; - - pcie@0,0 { - status = "okay"; - }; - - pcie@1,0 { - status = "okay"; - }; - -}; - -&pio { - /* eMMC is shared pin with parallel NAND */ - emmc_pins_default: emmc-pins-default { - mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; - - /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", - * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, - * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively - */ - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - bias-pull-down; - }; - }; - - emmc_pins_uhs: emmc-pins-uhs { - mux { - function = "emmc"; - groups = "emmc"; - }; - - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - drive-strength = <4>; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - drive-strength = <4>; - bias-pull-down; - }; - }; - - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - i2c1_pins: i2c1-pins { - mux { - function = "i2c"; - groups = "i2c1_0"; - }; - }; - - i2c2_pins: i2c2-pins { - mux { - function = "i2c"; - groups = "i2c2_0"; - }; - }; - - i2s1_pins: i2s1-pins { - mux { - function = "i2s"; - groups = "i2s_out_mclk_bclk_ws", - "i2s1_in_data", - "i2s1_out_data"; - }; - - conf { - pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", - "I2S_WS", "I2S_MCLK"; - drive-strength = <12>; - bias-pull-down; - }; - }; - - irrx_pins: irrx-pins { - mux { - function = "ir"; - groups = "ir_1_rx"; - }; - }; - - irtx_pins: irtx-pins { - mux { - function = "ir"; - groups = "ir_1_tx"; - }; - }; - - /* Parallel nand is shared pin with eMMC */ - parallel_nand_pins: parallel-nand-pins { - mux { - function = "flash"; - groups = "par_nand"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - pwm7_pins: pwm1-2-pins { - mux { - function = "pwm"; - groups = "pwm_ch7_2"; - }; - }; - - wled_pins: wled-pins { - mux { - function = "led"; - groups = "wled"; - }; - }; - - sd0_pins_default: sd0-pins-default { - mux { - function = "sd"; - groups = "sd_0"; - }; - - /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", - * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, - * DAT2, DAT3, CMD, CLK for SD respectively. - */ - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - drive-strength = <8>; - bias-pull-up; - }; - conf-clk { - pins = "I2S3_OUT"; - drive-strength = <12>; - bias-pull-down; - }; - conf-cd { - pins = "TXD3"; - bias-pull-up; - }; - }; - - sd0_pins_uhs: sd0-pins-uhs { - mux { - function = "sd"; - groups = "sd_0"; - }; - - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "I2S3_OUT"; - bias-pull-down; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spic0_pins: spic0-pins { - mux { - function = "spi"; - groups = "spic0_0"; - }; - }; - - spic1_pins: spic1-pins { - mux { - function = "spi"; - groups = "spic1_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - /* serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_1_tx_rx" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&bch { - status = "okay"; -}; - -&btif { - status = "okay"; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&irrx_pins>; - status = "okay"; -}; - -ð { - status = "okay"; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "sgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&gsw { - mediatek,mdio = <&mdio>; - mediatek,portmap = "llllw"; - mediatek,mdio_master_pinmux = <0>; - reset-gpios = <&pio 54 0>; - interrupt-parent = <&pio>; - interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; - status = "okay"; - - port5: port@5 { - compatible = "mediatek,mt753x-port"; - reg = <5>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port6: port@6 { - compatible = "mediatek,mt753x-port"; - reg = <6>; - phy-mode = "sgmii"; - fixed-link { - speed = <2500>; - full-duplex; - }; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&emmc_pins_default>; - pinctrl-1 = <&emmc_pins_uhs>; - status = "okay"; - bus-width = <8>; - max-frequency = <50000000>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; - non-removable; -}; - -&mmc1 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&sd0_pins_default>; - pinctrl-1 = <&sd0_pins_uhs>; - status = "okay"; - bus-width = <4>; - max-frequency = <50000000>; - cap-sd-highspeed; - r_smpl = <1>; - cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_3p3v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; -}; - -&nandc { - pinctrl-names = "default"; - pinctrl-0 = <¶llel_nand_pins>; - status = "disabled"; -}; - -&nor_flash { - pinctrl-names = "default"; - pinctrl-0 = <&spi_nor_pins>; - status = "disabled"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; - status = "okay"; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&snfi { - pinctrl-names = "default"; - pinctrl-0 = <&serial_nand_pins>; - status = "okay"; - - spi_nand@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - spi-max-frequency = <104000000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "preloader"; - reg = <0x00000 0x0080000>; - read-only; - }; - - partition@80000 { - label = "ATF"; - reg = <0x80000 0x0040000>; - read-only; - }; - - partition@c0000 { - label = "uboot"; - reg = <0xc0000 0x0080000>; - read-only; - }; - - partition@140000 { - label = "uboot-env"; - reg = <0x140000 0x0080000>; - read-only; - }; - - partition@1c0000 { - label = "factory"; - reg = <0x1c0000 0x0040000>; - read-only; - }; - - partition@200000 { - label = "firmware"; - reg = <0x200000 0x2000000>; - }; - - partition@2200000 { - label = "reserved"; - reg = <0x2200000 0x4000000>; - }; - }; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spic0_pins>; - status = "okay"; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spic1_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_5v>; - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts deleted file mode 100644 index 1002ad2b77..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ /dev/null @@ -1,609 +0,0 @@ -/* - * Copyright (c) 2017 MediaTek Inc. - * Author: Ming Huang - * Sean Wang - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) - */ - -/dts-v1/; -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "MediaTek MT7622 RFB1 board"; - compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - poll-interval = <100>; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 0 0>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 102 0>; - }; - }; - - gsw: gsw@0 { - compatible = "mediatek,mt753x"; - mediatek,ethsys = <ðsys>; - #address-cells = <1>; - #size-cells = <0>; - }; - - memory { - reg = <0 0x40000000 0 0x3F000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "fixed-5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&pcie { - pinctrl-names = "default", "pcie1_pins"; - pinctrl-0 = <&pcie0_pins>; - pinctrl-1 = <&pcie1_pins>; - status = "okay"; - - pcie@0,0 { - status = "okay"; - }; - - pcie@1,0 { - status = "okay"; - }; - -}; - -&pio { - /* eMMC is shared pin with parallel NAND */ - emmc_pins_default: emmc-pins-default { - mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; - - /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", - * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, - * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively - */ - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - bias-pull-down; - }; - }; - - emmc_pins_uhs: emmc-pins-uhs { - mux { - function = "emmc"; - groups = "emmc"; - }; - - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - drive-strength = <4>; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - drive-strength = <4>; - bias-pull-down; - }; - }; - - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - i2c1_pins: i2c1-pins { - mux { - function = "i2c"; - groups = "i2c1_0"; - }; - }; - - i2c2_pins: i2c2-pins { - mux { - function = "i2c"; - groups = "i2c2_0"; - }; - }; - - i2s1_pins: i2s1-pins { - mux { - function = "i2s"; - groups = "i2s_out_mclk_bclk_ws", - "i2s1_in_data", - "i2s1_out_data"; - }; - - conf { - pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", - "I2S_WS", "I2S_MCLK"; - drive-strength = <12>; - bias-pull-down; - }; - }; - - irrx_pins: irrx-pins { - mux { - function = "ir"; - groups = "ir_1_rx"; - }; - }; - - irtx_pins: irtx-pins { - mux { - function = "ir"; - groups = "ir_1_tx"; - }; - }; - - /* Parallel nand is shared pin with eMMC */ - parallel_nand_pins: parallel-nand-pins { - mux { - function = "flash"; - groups = "par_nand"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - pwm7_pins: pwm1-2-pins { - mux { - function = "pwm"; - groups = "pwm_ch7_2"; - }; - }; - - wled_pins: wled-pins { - mux { - function = "led"; - groups = "wled"; - }; - }; - - sd0_pins_default: sd0-pins-default { - mux { - function = "sd"; - groups = "sd_0"; - }; - - /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", - * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, - * DAT2, DAT3, CMD, CLK for SD respectively. - */ - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - drive-strength = <8>; - bias-pull-up; - }; - conf-clk { - pins = "I2S3_OUT"; - drive-strength = <12>; - bias-pull-down; - }; - conf-cd { - pins = "TXD3"; - bias-pull-up; - }; - }; - - sd0_pins_uhs: sd0-pins-uhs { - mux { - function = "sd"; - groups = "sd_0"; - }; - - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "I2S3_OUT"; - bias-pull-down; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spic0_pins: spic0-pins { - mux { - function = "spi"; - groups = "spic0_0"; - }; - }; - - spic1_pins: spic1-pins { - mux { - function = "spi"; - groups = "spic1_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - /* serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_1_tx_rx" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&bch { - status = "okay"; -}; - -&btif { - status = "okay"; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&irrx_pins>; - status = "okay"; -}; - -ð { - status = "okay"; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "sgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&gsw { - mediatek,mdio = <&mdio>; - mediatek,portmap = "llllw"; - mediatek,mdio_master_pinmux = <0>; - reset-gpios = <&pio 54 0>; - interrupt-parent = <&pio>; - interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; - status = "okay"; - - port5: port@5 { - compatible = "mediatek,mt753x-port"; - reg = <5>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port6: port@6 { - compatible = "mediatek,mt753x-port"; - reg = <6>; - phy-mode = "sgmii"; - fixed-link { - speed = <2500>; - full-duplex; - }; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&emmc_pins_default>; - pinctrl-1 = <&emmc_pins_uhs>; - status = "okay"; - bus-width = <8>; - max-frequency = <50000000>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; - non-removable; -}; - -&mmc1 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&sd0_pins_default>; - pinctrl-1 = <&sd0_pins_uhs>; - status = "okay"; - bus-width = <4>; - max-frequency = <50000000>; - cap-sd-highspeed; - r_smpl = <1>; - cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_3p3v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; -}; - -&nandc { - pinctrl-names = "default"; - pinctrl-0 = <¶llel_nand_pins>; - status = "disabled"; -}; - -&nor_flash { - pinctrl-names = "default"; - pinctrl-0 = <&spi_nor_pins>; - status = "disabled"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; - status = "okay"; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&snfi { - pinctrl-names = "default"; - pinctrl-0 = <&serial_nand_pins>; - status = "okay"; - - spi_nand@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - spi-max-frequency = <104000000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "preloader"; - reg = <0x00000 0x0080000>; - read-only; - }; - - partition@80000 { - label = "ATF"; - reg = <0x80000 0x0040000>; - read-only; - }; - - partition@c0000 { - label = "uboot"; - reg = <0xc0000 0x0080000>; - read-only; - }; - - partition@140000 { - label = "uboot-env"; - reg = <0x140000 0x0080000>; - read-only; - }; - - partition@1c0000 { - label = "factory"; - reg = <0x1c0000 0x0040000>; - read-only; - }; - - partition@200000 { - label = "firmware"; - reg = <0x200000 0x2000000>; - }; - - partition@2200000 { - label = "reserved"; - reg = <0x2200000 0x4000000>; - }; - }; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spic0_pins>; - status = "okay"; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spic1_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_5v>; - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622.dtsi deleted file mode 100644 index 934b4d9383..0000000000 --- a/target/linux/mediatek/files-4.19/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ /dev/null @@ -1,914 +0,0 @@ -/* - * Copyright (c) 2017 MediaTek Inc. - * Author: Ming Huang - * Sean Wang - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) - */ - -#include -#include -#include -#include -#include -#include -#include - -/ { - compatible = "mediatek,mt7622"; - interrupt-parent = <&sysirq>; - #address-cells = <2>; - #size-cells = <2>; - - cpu_opp_table: opp-table { - compatible = "operating-points-v2"; - opp-shared; - opp-300000000 { - opp-hz = /bits/ 64 <30000000>; - opp-microvolt = <950000>; - }; - - opp-437500000 { - opp-hz = /bits/ 64 <437500000>; - opp-microvolt = <1000000>; - }; - - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <1050000>; - }; - - opp-812500000 { - opp-hz = /bits/ 64 <812500000>; - opp-microvolt = <1100000>; - }; - - opp-1025000000 { - opp-hz = /bits/ 64 <1025000000>; - opp-microvolt = <1150000>; - }; - - opp-1137500000 { - opp-hz = /bits/ 64 <1137500000>; - opp-microvolt = <1200000>; - }; - - opp-1262500000 { - opp-hz = /bits/ 64 <1262500000>; - opp-microvolt = <1250000>; - }; - - opp-1350000000 { - opp-hz = /bits/ 64 <1350000000>; - opp-microvolt = <1310000>; - }; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x0>; - clocks = <&infracfg CLK_INFRA_MUX1_SEL>, - <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>; - clock-names = "cpu", "intermediate"; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; - enable-method = "psci"; - clock-frequency = <1300000000>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x1>; - clocks = <&infracfg CLK_INFRA_MUX1_SEL>, - <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>; - clock-names = "cpu", "intermediate"; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; - enable-method = "psci"; - clock-frequency = <1300000000>; - }; - }; - - pwrap_clk: dummy40m { - compatible = "fixed-clock"; - clock-frequency = <40000000>; - #clock-cells = <0>; - }; - - clk25m: oscillator { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - clock-output-names = "clkxtal"; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ - secmon_reserved: secmon@43000000 { - reg = <0 0x43000000 0 0x30000>; - no-map; - }; - }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <1000>; - - thermal-sensors = <&thermal 0>; - - trips { - cpu_passive: cpu-passive { - temperature = <47000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_active: cpu-active { - temperature = <67000>; - hysteresis = <2000>; - type = "active"; - }; - - cpu_hot: cpu-hot { - temperature = <87000>; - hysteresis = <2000>; - type = "hot"; - }; - - cpu-crit { - temperature = <107000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_passive>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - - map1 { - trip = <&cpu_active>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - - map2 { - trip = <&cpu_hot>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupt-parent = <&gic>; - interrupts = , - , - , - ; - }; - - infracfg: infracfg@10000000 { - compatible = "mediatek,mt7622-infracfg", - "syscon"; - reg = <0 0x10000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pwrap: pwrap@10001000 { - compatible = "mediatek,mt7622-pwrap"; - reg = <0 0x10001000 0 0x250>; - reg-names = "pwrap"; - clocks = <&infracfg CLK_INFRA_PMIC_PD>, <&pwrap_clk>; - clock-names = "spi", "wrap"; - resets = <&infracfg MT7622_INFRA_PMIC_WRAP_RST>; - reset-names = "pwrap"; - interrupts = ; - status = "disabled"; - }; - - pericfg: pericfg@10002000 { - compatible = "mediatek,mt7622-pericfg", - "syscon"; - reg = <0 0x10002000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - scpsys: scpsys@10006000 { - compatible = "mediatek,mt7622-scpsys", - "syscon"; - #power-domain-cells = <1>; - reg = <0 0x10006000 0 0x1000>; - interrupts = , - , - , - ; - infracfg = <&infracfg>; - clocks = <&topckgen CLK_TOP_HIF_SEL>; - clock-names = "hif_sel"; - }; - - cir: cir@10009000 { - compatible = "mediatek,mt7622-cir"; - reg = <0 0x10009000 0 0x1000>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_IRRX_PD>, - <&topckgen CLK_TOP_AXI_SEL>; - clock-names = "clk", "bus"; - status = "disabled"; - }; - - sysirq: interrupt-controller@10200620 { - compatible = "mediatek,mt7622-sysirq", - "mediatek,mt6577-sysirq"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0 0x10200620 0 0x20>; - }; - - efuse: efuse@10206000 { - compatible = "mediatek,mt7622-efuse", - "mediatek,efuse"; - reg = <0 0x10206000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - - thermal_calibration: calib@198 { - reg = <0x198 0xc>; - }; - }; - - apmixedsys: apmixedsys@10209000 { - compatible = "mediatek,mt7622-apmixedsys", - "syscon"; - reg = <0 0x10209000 0 0x1000>; - #clock-cells = <1>; - }; - - topckgen: topckgen@10210000 { - compatible = "mediatek,mt7622-topckgen", - "syscon"; - reg = <0 0x10210000 0 0x1000>; - #clock-cells = <1>; - }; - - rng: rng@1020f000 { - compatible = "mediatek,mt7622-rng", - "mediatek,mt7623-rng"; - reg = <0 0x1020f000 0 0x1000>; - clocks = <&infracfg CLK_INFRA_TRNG>; - clock-names = "rng"; - }; - - pio: pinctrl@10211000 { - compatible = "mediatek,mt7622-pinctrl"; - reg = <0 0x10211000 0 0x1000>, - <0 0x10005000 0 0x1000>; - reg-names = "base", "eint"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pio 0 0 103>; - interrupt-controller; - interrupts = ; - interrupt-parent = <&gic>; - #interrupt-cells = <2>; - }; - - watchdog: watchdog@10212000 { - compatible = "mediatek,mt7622-wdt", - "mediatek,mt6589-wdt"; - reg = <0 0x10212000 0 0x800>; - }; - - rtc: rtc@10212800 { - compatible = "mediatek,mt7622-rtc", - "mediatek,soc-rtc"; - reg = <0 0x10212800 0 0x200>; - interrupts = ; - clocks = <&topckgen CLK_TOP_RTC>; - clock-names = "rtc"; - }; - - gic: interrupt-controller@10300000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0 0x10310000 0 0x1000>, - <0 0x10320000 0 0x1000>, - <0 0x10340000 0 0x2000>, - <0 0x10360000 0 0x2000>; - }; - - auxadc: adc@11001000 { - compatible = "mediatek,mt7622-auxadc"; - reg = <0 0x11001000 0 0x1000>; - clocks = <&pericfg CLK_PERI_AUXADC_PD>; - clock-names = "main"; - #io-channel-cells = <1>; - }; - - uart0: serial@11002000 { - compatible = "mediatek,mt7622-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11002000 0 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART0_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart1: serial@11003000 { - compatible = "mediatek,mt7622-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11003000 0 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART1_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart2: serial@11004000 { - compatible = "mediatek,mt7622-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11004000 0 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART2_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart3: serial@11005000 { - compatible = "mediatek,mt7622-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11005000 0 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART3_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - pwm: pwm@11006000 { - compatible = "mediatek,mt7622-pwm"; - reg = <0 0x11006000 0 0x1000>; - interrupts = ; - clocks = <&topckgen CLK_TOP_PWM_SEL>, - <&pericfg CLK_PERI_PWM_PD>, - <&pericfg CLK_PERI_PWM1_PD>, - <&pericfg CLK_PERI_PWM2_PD>, - <&pericfg CLK_PERI_PWM3_PD>, - <&pericfg CLK_PERI_PWM4_PD>, - <&pericfg CLK_PERI_PWM5_PD>, - <&pericfg CLK_PERI_PWM6_PD>; - clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4", - "pwm5", "pwm6"; - status = "disabled"; - }; - - i2c0: i2c@11007000 { - compatible = "mediatek,mt7622-i2c"; - reg = <0 0x11007000 0 0x90>, - <0 0x11000100 0 0x80>; - interrupts = ; - clock-div = <16>; - clocks = <&pericfg CLK_PERI_I2C0_PD>, - <&pericfg CLK_PERI_AP_DMA_PD>; - clock-names = "main", "dma"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@11008000 { - compatible = "mediatek,mt7622-i2c"; - reg = <0 0x11008000 0 0x90>, - <0 0x11000180 0 0x80>; - interrupts = ; - clock-div = <16>; - clocks = <&pericfg CLK_PERI_I2C1_PD>, - <&pericfg CLK_PERI_AP_DMA_PD>; - clock-names = "main", "dma"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@11009000 { - compatible = "mediatek,mt7622-i2c"; - reg = <0 0x11009000 0 0x90>, - <0 0x11000200 0 0x80>; - interrupts = ; - clock-div = <16>; - clocks = <&pericfg CLK_PERI_I2C2_PD>, - <&pericfg CLK_PERI_AP_DMA_PD>; - clock-names = "main", "dma"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi0: spi@1100a000 { - compatible = "mediatek,mt7622-spi"; - reg = <0 0x1100a000 0 0x100>; - interrupts = ; - clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, - <&topckgen CLK_TOP_SPI0_SEL>, - <&pericfg CLK_PERI_SPI0_PD>; - clock-names = "parent-clk", "sel-clk", "spi-clk"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - thermal: thermal@1100b000 { - #thermal-sensor-cells = <1>; - compatible = "mediatek,mt7622-thermal"; - reg = <0 0x1100b000 0 0x1000>; - interrupts = <0 78 IRQ_TYPE_LEVEL_LOW>; - clocks = <&pericfg CLK_PERI_THERM_PD>, - <&pericfg CLK_PERI_AUXADC_PD>; - clock-names = "therm", "auxadc"; - resets = <&pericfg MT7622_PERI_THERM_SW_RST>; - reset-names = "therm"; - mediatek,auxadc = <&auxadc>; - mediatek,apmixedsys = <&apmixedsys>; - nvmem-cells = <&thermal_calibration>; - nvmem-cell-names = "calibration-data"; - }; - - btif: serial@1100c000 { - compatible = "mediatek,mt7622-btif", - "mediatek,mtk-btif"; - reg = <0 0x1100c000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_BTIF_PD>; - clock-names = "main"; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - - bluetooth { - compatible = "mediatek,mt7622-bluetooth"; - power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>; - clocks = <&clk25m>; - clock-names = "ref"; - }; - }; - - nandc: nfi@1100d000 { - compatible = "mediatek,mt7622-nfc"; - reg = <0 0x1100D000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_NFI_PD>, - <&pericfg CLK_PERI_SNFI_PD>; - clock-names = "nfi_clk", "pad_clk"; - ecc-engine = <&bch>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - bch: ecc@1100e000 { - compatible = "mediatek,mt7622-ecc"; - reg = <0 0x1100e000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_NFIECC_PD>; - clock-names = "nfiecc_clk"; - status = "disabled"; - }; - - nor_flash: spi@11014000 { - compatible = "mediatek,mt7622-nor", - "mediatek,mt8173-nor"; - reg = <0 0x11014000 0 0xe0>; - clocks = <&pericfg CLK_PERI_FLASH_PD>, - <&topckgen CLK_TOP_FLASH_SEL>; - clock-names = "spi", "sf"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - snfi: spi@1100d000 { - compatible = "mediatek,mt7622-snfi"; - reg = <0 0x1100d000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_NFI_PD>, - <&pericfg CLK_PERI_SNFI_PD>; - clock-names = "nfi_clk", "spi_clk"; - ecc-engine = <&bch>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi1: spi@11016000 { - compatible = "mediatek,mt7622-spi"; - reg = <0 0x11016000 0 0x100>; - interrupts = ; - clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, - <&topckgen CLK_TOP_SPI1_SEL>, - <&pericfg CLK_PERI_SPI1_PD>; - clock-names = "parent-clk", "sel-clk", "spi-clk"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart4: serial@11019000 { - compatible = "mediatek,mt7622-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11019000 0 0x400>; - interrupts = ; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART4_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - audsys: clock-controller@11220000 { - compatible = "mediatek,mt7622-audsys", "syscon"; - reg = <0 0x11220000 0 0x2000>; - #clock-cells = <1>; - - afe: audio-controller { - compatible = "mediatek,mt7622-audio"; - interrupts = , - ; - interrupt-names = "afe", "asys"; - - clocks = <&infracfg CLK_INFRA_AUDIO_PD>, - <&topckgen CLK_TOP_AUD1_SEL>, - <&topckgen CLK_TOP_AUD2_SEL>, - <&topckgen CLK_TOP_A1SYS_HP_DIV_PD>, - <&topckgen CLK_TOP_A2SYS_HP_DIV_PD>, - <&topckgen CLK_TOP_I2S0_MCK_SEL>, - <&topckgen CLK_TOP_I2S1_MCK_SEL>, - <&topckgen CLK_TOP_I2S2_MCK_SEL>, - <&topckgen CLK_TOP_I2S3_MCK_SEL>, - <&topckgen CLK_TOP_I2S0_MCK_DIV>, - <&topckgen CLK_TOP_I2S1_MCK_DIV>, - <&topckgen CLK_TOP_I2S2_MCK_DIV>, - <&topckgen CLK_TOP_I2S3_MCK_DIV>, - <&topckgen CLK_TOP_I2S0_MCK_DIV_PD>, - <&topckgen CLK_TOP_I2S1_MCK_DIV_PD>, - <&topckgen CLK_TOP_I2S2_MCK_DIV_PD>, - <&topckgen CLK_TOP_I2S3_MCK_DIV_PD>, - <&audsys CLK_AUDIO_I2SO1>, - <&audsys CLK_AUDIO_I2SO2>, - <&audsys CLK_AUDIO_I2SO3>, - <&audsys CLK_AUDIO_I2SO4>, - <&audsys CLK_AUDIO_I2SIN1>, - <&audsys CLK_AUDIO_I2SIN2>, - <&audsys CLK_AUDIO_I2SIN3>, - <&audsys CLK_AUDIO_I2SIN4>, - <&audsys CLK_AUDIO_ASRCO1>, - <&audsys CLK_AUDIO_ASRCO2>, - <&audsys CLK_AUDIO_ASRCO3>, - <&audsys CLK_AUDIO_ASRCO4>, - <&audsys CLK_AUDIO_AFE>, - <&audsys CLK_AUDIO_AFE_CONN>, - <&audsys CLK_AUDIO_A1SYS>, - <&audsys CLK_AUDIO_A2SYS>; - - clock-names = "infra_sys_audio_clk", - "top_audio_mux1_sel", - "top_audio_mux2_sel", - "top_audio_a1sys_hp", - "top_audio_a2sys_hp", - "i2s0_src_sel", - "i2s1_src_sel", - "i2s2_src_sel", - "i2s3_src_sel", - "i2s0_src_div", - "i2s1_src_div", - "i2s2_src_div", - "i2s3_src_div", - "i2s0_mclk_en", - "i2s1_mclk_en", - "i2s2_mclk_en", - "i2s3_mclk_en", - "i2so0_hop_ck", - "i2so1_hop_ck", - "i2so2_hop_ck", - "i2so3_hop_ck", - "i2si0_hop_ck", - "i2si1_hop_ck", - "i2si2_hop_ck", - "i2si3_hop_ck", - "asrc0_out_ck", - "asrc1_out_ck", - "asrc2_out_ck", - "asrc3_out_ck", - "audio_afe_pd", - "audio_afe_conn_pd", - "audio_a1sys_pd", - "audio_a2sys_pd"; - - assigned-clocks = <&topckgen CLK_TOP_A1SYS_HP_SEL>, - <&topckgen CLK_TOP_A2SYS_HP_SEL>, - <&topckgen CLK_TOP_A1SYS_HP_DIV>, - <&topckgen CLK_TOP_A2SYS_HP_DIV>; - assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL>, - <&topckgen CLK_TOP_AUD2PLL>; - assigned-clock-rates = <0>, <0>, <49152000>, <45158400>; - }; - }; - - mmc0: mmc@11230000 { - compatible = "mediatek,mt7622-mmc"; - reg = <0 0x11230000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_MSDC30_0_PD>, - <&topckgen CLK_TOP_MSDC50_0_SEL>; - clock-names = "source", "hclk"; - status = "disabled"; - }; - - mmc1: mmc@11240000 { - compatible = "mediatek,mt7622-mmc"; - reg = <0 0x11240000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_MSDC30_1_PD>, - <&topckgen CLK_TOP_AXI_SEL>; - clock-names = "source", "hclk"; - status = "disabled"; - }; - - wmac: wmac@18000000 { - compatible = "mediatek,mt7622-wmac"; - reg = <0 0x18000000 0 0x100000>; - interrupts = ; - - mediatek,infracfg = <&infracfg>; - status = "disabled"; - - power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>; - }; - - ssusbsys: ssusbsys@1a000000 { - compatible = "mediatek,mt7622-ssusbsys", - "syscon"; - reg = <0 0x1a000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - ssusb: usb@1a0c0000 { - compatible = "mediatek,mt7622-xhci", - "mediatek,mtk-xhci"; - reg = <0 0x1a0c0000 0 0x01000>, - <0 0x1a0c4700 0 0x0100>; - reg-names = "mac", "ippc"; - interrupts = ; - power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF1>; - clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, - <&ssusbsys CLK_SSUSB_REF_EN>, - <&ssusbsys CLK_SSUSB_MCU_EN>, - <&ssusbsys CLK_SSUSB_DMA_EN>; - clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; - phys = <&u2port0 PHY_TYPE_USB2>, - <&u3port0 PHY_TYPE_USB3>, - <&u2port1 PHY_TYPE_USB2>; - - status = "disabled"; - }; - - u3phy: usb-phy@1a0c4000 { - compatible = "mediatek,mt7622-u3phy", - "mediatek,generic-tphy-v1"; - reg = <0 0x1a0c4000 0 0x700>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "disabled"; - - u2port0: usb-phy@1a0c4800 { - reg = <0 0x1a0c4800 0 0x0100>; - #phy-cells = <1>; - clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>; - clock-names = "ref"; - }; - - u3port0: usb-phy@1a0c4900 { - reg = <0 0x1a0c4900 0 0x0700>; - #phy-cells = <1>; - clocks = <&clk25m>; - clock-names = "ref"; - }; - - u2port1: usb-phy@1a0c5000 { - reg = <0 0x1a0c5000 0 0x0100>; - #phy-cells = <1>; - clocks = <&ssusbsys CLK_SSUSB_U2_PHY_1P_EN>; - clock-names = "ref"; - }; - }; - - pciesys: pciesys@1a100800 { - compatible = "mediatek,mt7622-pciesys", - "syscon"; - reg = <0 0x1a100800 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pcie: pcie@1a140000 { - compatible = "mediatek,mt7622-pcie"; - device_type = "pci"; - reg = <0 0x1a140000 0 0x1000>, - <0 0x1a143000 0 0x1000>, - <0 0x1a145000 0 0x1000>; - reg-names = "subsys", "port0", "port1"; - #address-cells = <3>; - #size-cells = <2>; - interrupts = , - ; - clocks = <&pciesys CLK_PCIE_P0_MAC_EN>, - <&pciesys CLK_PCIE_P1_MAC_EN>, - <&pciesys CLK_PCIE_P0_AHB_EN>, - <&pciesys CLK_PCIE_P0_AHB_EN>, - <&pciesys CLK_PCIE_P0_AUX_EN>, - <&pciesys CLK_PCIE_P1_AUX_EN>, - <&pciesys CLK_PCIE_P0_AXI_EN>, - <&pciesys CLK_PCIE_P1_AXI_EN>, - <&pciesys CLK_PCIE_P0_OBFF_EN>, - <&pciesys CLK_PCIE_P1_OBFF_EN>, - <&pciesys CLK_PCIE_P0_PIPE_EN>, - <&pciesys CLK_PCIE_P1_PIPE_EN>; - clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1", - "aux_ck0", "aux_ck1", "axi_ck0", "axi_ck1", - "obff_ck0", "obff_ck1", "pipe_ck0", "pipe_ck1"; - power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; - bus-range = <0x00 0xff>; - ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>; - status = "disabled"; - - pcie0: pcie@0,0 { - reg = <0x0000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges; - status = "disabled"; - - num-lanes = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc0 0>, - <0 0 0 2 &pcie_intc0 1>, - <0 0 0 3 &pcie_intc0 2>, - <0 0 0 4 &pcie_intc0 3>; - pcie_intc0: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - - pcie1: pcie@1,0 { - reg = <0x0800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges; - status = "disabled"; - - num-lanes = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc1 0>, - <0 0 0 2 &pcie_intc1 1>, - <0 0 0 3 &pcie_intc1 2>, - <0 0 0 4 &pcie_intc1 3>; - pcie_intc1: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - }; - - sata: sata@1a200000 { - compatible = "mediatek,mt7622-ahci", - "mediatek,mtk-ahci"; - reg = <0 0x1a200000 0 0x1100>; - interrupts = ; - interrupt-names = "hostc"; - clocks = <&pciesys CLK_SATA_AHB_EN>, - <&pciesys CLK_SATA_AXI_EN>, - <&pciesys CLK_SATA_ASIC_EN>, - <&pciesys CLK_SATA_RBC_EN>, - <&pciesys CLK_SATA_PM_EN>; - clock-names = "ahb", "axi", "asic", "rbc", "pm"; - phys = <&sata_port PHY_TYPE_SATA>; - phy-names = "sata-phy"; - ports-implemented = <0x1>; - power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; - resets = <&pciesys MT7622_SATA_AXI_BUS_RST>, - <&pciesys MT7622_SATA_PHY_SW_RST>, - <&pciesys MT7622_SATA_PHY_REG_RST>; - reset-names = "axi", "sw", "reg"; - mediatek,phy-mode = <&pciesys>; - status = "disabled"; - }; - - sata_phy: sata-phy@1a243000 { - compatible = "mediatek,generic-tphy-v1"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "disabled"; - - sata_port: sata-phy@1a243000 { - reg = <0 0x1a243000 0 0x0100>; - clocks = <&topckgen CLK_TOP_ETH_500M>; - clock-names = "ref"; - #phy-cells = <1>; - }; - }; - - ethsys: syscon@1b000000 { - compatible = "mediatek,mt7622-ethsys", - "syscon"; - reg = <0 0x1b000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - hsdma: dma-controller@1b007000 { - compatible = "mediatek,mt7622-hsdma"; - reg = <0 0x1b007000 0 0x1000>; - interrupts = ; - clocks = <ðsys CLK_ETH_HSDMA_EN>; - clock-names = "hsdma"; - power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; - #dma-cells = <1>; - }; - - eth: ethernet@1b100000 { - compatible = "mediatek,mt7622-eth", - "mediatek,mt2701-eth", - "syscon"; - reg = <0 0x1b100000 0 0x20000>; - interrupts = , - , - ; - clocks = <&topckgen CLK_TOP_ETH_SEL>, - <ðsys CLK_ETH_ESW_EN>, - <ðsys CLK_ETH_GP0_EN>, - <ðsys CLK_ETH_GP1_EN>, - <ðsys CLK_ETH_GP2_EN>, - <&sgmiisys CLK_SGMII_TX250M_EN>, - <&sgmiisys CLK_SGMII_RX250M_EN>, - <&sgmiisys CLK_SGMII_CDR_REF>, - <&sgmiisys CLK_SGMII_CDR_FB>, - <&topckgen CLK_TOP_SGMIIPLL>, - <&apmixedsys CLK_APMIXED_ETH2PLL>; - clock-names = "ethif", "esw", "gp0", "gp1", "gp2", - "sgmii_tx250m", "sgmii_rx250m", - "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", - "eth2pll"; - power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sgmiisys: sgmiisys@1b128000 { - compatible = "mediatek,mt7622-sgmiisys", - "syscon"; - reg = <0 0x1b128000 0 0x3000>; - #clock-cells = <1>; - mediatek,physpeed = "2500"; - }; -}; diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/Kconfig b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/Kconfig deleted file mode 100644 index d9e0230cf0..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/Kconfig +++ /dev/null @@ -1,3 +0,0 @@ - -config MT753X_GSW - tristate "Driver for the MediaTek MT753x switch" diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/Makefile b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/Makefile deleted file mode 100644 index 7aae451cd1..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for MediaTek MT753x gigabit switch -# - -obj-$(CONFIG_MT753X_GSW) += mt753x.o - -mt753x-$(CONFIG_SWCONFIG) += mt753x_swconfig.o - -mt753x-y += mt753x_mdio.o mt7530.o mt7531.o \ - mt753x_common.o mt753x_vlan.o \ - mt753x_nl.o diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7530.c b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7530.c deleted file mode 100644 index 6a94d0d2f4..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7530.c +++ /dev/null @@ -1,631 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Weijie Gao - */ - -#include -#include - -#include "mt753x.h" -#include "mt753x_regs.h" - -/* MT7530 registers */ - -/* Unique fields of PMCR for MT7530 */ -#define FORCE_MODE BIT(15) - -/* Unique fields of GMACCR for MT7530 */ -#define VLAN_SUPT_NO_S 14 -#define VLAN_SUPT_NO_M 0x1c000 -#define LATE_COL_DROP BIT(13) - -/* Unique fields of (M)HWSTRAP for MT7530 */ -#define BOND_OPTION BIT(24) -#define P5_PHY0_SEL BIT(20) -#define CHG_TRAP BIT(16) -#define LOOPDET_DIS BIT(14) -#define P5_INTF_SEL_GMAC5 BIT(13) -#define SMI_ADDR_S 11 -#define SMI_ADDR_M 0x1800 -#define XTAL_FSEL_S 9 -#define XTAL_FSEL_M 0x600 -#define P6_INTF_DIS BIT(8) -#define P5_INTF_MODE_RGMII BIT(7) -#define P5_INTF_DIS_S BIT(6) -#define C_MDIO_BPS_S BIT(5) -#define EEPROM_EN_S BIT(4) - -/* PHY EEE Register bitmap of define */ -#define PHY_DEV07 0x07 -#define PHY_DEV07_REG_03C 0x3c - -/* PHY Extend Register 0x14 bitmap of define */ -#define PHY_EXT_REG_14 0x14 - -/* Fields of PHY_EXT_REG_14 */ -#define PHY_EN_DOWN_SHFIT BIT(4) - -/* PHY Token Ring Register 0x10 bitmap of define */ -#define PHY_TR_REG_10 0x10 - -/* PHY Token Ring Register 0x12 bitmap of define */ -#define PHY_TR_REG_12 0x12 - -/* PHY LPI PCS/DSP Control Register bitmap of define */ -#define PHY_LPI_REG_11 0x11 - -/* PHY DEV 0x1e Register bitmap of define */ -#define PHY_DEV1E 0x1e -#define PHY_DEV1E_REG_123 0x123 -#define PHY_DEV1E_REG_A6 0xa6 - -/* Values of XTAL_FSEL */ -#define XTAL_20MHZ 1 -#define XTAL_40MHZ 2 -#define XTAL_25MHZ 3 - -#define P6ECR 0x7830 -#define P6_INTF_MODE_TRGMII BIT(0) - -#define TRGMII_TXCTRL 0x7a40 -#define TRAIN_TXEN BIT(31) -#define TXC_INV BIT(30) -#define TX_DOEO BIT(29) -#define TX_RST BIT(28) - -#define TRGMII_TD0_CTRL 0x7a50 -#define TRGMII_TD1_CTRL 0x7a58 -#define TRGMII_TD2_CTRL 0x7a60 -#define TRGMII_TD3_CTRL 0x7a68 -#define TRGMII_TXCTL_CTRL 0x7a70 -#define TRGMII_TCK_CTRL 0x7a78 -#define TRGMII_TD_CTRL(n) (0x7a50 + (n) * 8) -#define NUM_TRGMII_CTRL 6 -#define TX_DMPEDRV BIT(31) -#define TX_DM_SR BIT(15) -#define TX_DMERODT BIT(14) -#define TX_DMOECTL BIT(13) -#define TX_TAP_S 8 -#define TX_TAP_M 0xf00 -#define TX_TRAIN_WD_S 0 -#define TX_TRAIN_WD_M 0xff - -#define TRGMII_TD0_ODT 0x7a54 -#define TRGMII_TD1_ODT 0x7a5c -#define TRGMII_TD2_ODT 0x7a64 -#define TRGMII_TD3_ODT 0x7a6c -#define TRGMII_TXCTL_ODT 0x7574 -#define TRGMII_TCK_ODT 0x757c -#define TRGMII_TD_ODT(n) (0x7a54 + (n) * 8) -#define NUM_TRGMII_ODT 6 -#define TX_DM_DRVN_PRE_S 30 -#define TX_DM_DRVN_PRE_M 0xc0000000 -#define TX_DM_DRVP_PRE_S 28 -#define TX_DM_DRVP_PRE_M 0x30000000 -#define TX_DM_TDSEL_S 24 -#define TX_DM_TDSEL_M 0xf000000 -#define TX_ODTEN BIT(23) -#define TX_DME_PRE BIT(20) -#define TX_DM_DRVNT0 BIT(19) -#define TX_DM_DRVPT0 BIT(18) -#define TX_DM_DRVNTE BIT(17) -#define TX_DM_DRVPTE BIT(16) -#define TX_DM_ODTN_S 12 -#define TX_DM_ODTN_M 0x7000 -#define TX_DM_ODTP_S 8 -#define TX_DM_ODTP_M 0x700 -#define TX_DM_DRVN_S 4 -#define TX_DM_DRVN_M 0xf0 -#define TX_DM_DRVP_S 0 -#define TX_DM_DRVP_M 0x0f - -#define P5RGMIIRXCR 0x7b00 -#define CSR_RGMII_RCTL_CFG_S 24 -#define CSR_RGMII_RCTL_CFG_M 0x7000000 -#define CSR_RGMII_RXD_CFG_S 16 -#define CSR_RGMII_RXD_CFG_M 0x70000 -#define CSR_RGMII_EDGE_ALIGN BIT(8) -#define CSR_RGMII_RXC_90DEG_CFG_S 4 -#define CSR_RGMII_RXC_90DEG_CFG_M 0xf0 -#define CSR_RGMII_RXC_0DEG_CFG_S 0 -#define CSR_RGMII_RXC_0DEG_CFG_M 0x0f - -#define P5RGMIITXCR 0x7b04 -#define CSR_RGMII_TXEN_CFG_S 16 -#define CSR_RGMII_TXEN_CFG_M 0x70000 -#define CSR_RGMII_TXD_CFG_S 8 -#define CSR_RGMII_TXD_CFG_M 0x700 -#define CSR_RGMII_TXC_CFG_S 0 -#define CSR_RGMII_TXC_CFG_M 0x1f - -#define CHIP_REV 0x7ffc -#define CHIP_NAME_S 16 -#define CHIP_NAME_M 0xffff0000 -#define CHIP_REV_S 0 -#define CHIP_REV_M 0x0f - -/* MMD registers */ -#define CORE_PLL_GROUP2 0x401 -#define RG_SYSPLL_EN_NORMAL BIT(15) -#define RG_SYSPLL_VODEN BIT(14) -#define RG_SYSPLL_POSDIV_S 5 -#define RG_SYSPLL_POSDIV_M 0x60 - -#define CORE_PLL_GROUP4 0x403 -#define RG_SYSPLL_DDSFBK_EN BIT(12) -#define RG_SYSPLL_BIAS_EN BIT(11) -#define RG_SYSPLL_BIAS_LPF_EN BIT(10) - -#define CORE_PLL_GROUP5 0x404 -#define RG_LCDDS_PCW_NCPO1_S 0 -#define RG_LCDDS_PCW_NCPO1_M 0xffff - -#define CORE_PLL_GROUP6 0x405 -#define RG_LCDDS_PCW_NCPO0_S 0 -#define RG_LCDDS_PCW_NCPO0_M 0xffff - -#define CORE_PLL_GROUP7 0x406 -#define RG_LCDDS_PWDB BIT(15) -#define RG_LCDDS_ISO_EN BIT(13) -#define RG_LCCDS_C_S 4 -#define RG_LCCDS_C_M 0x70 -#define RG_LCDDS_PCW_NCPO_CHG BIT(3) - -#define CORE_PLL_GROUP10 0x409 -#define RG_LCDDS_SSC_DELTA_S 0 -#define RG_LCDDS_SSC_DELTA_M 0xfff - -#define CORE_PLL_GROUP11 0x40a -#define RG_LCDDS_SSC_DELTA1_S 0 -#define RG_LCDDS_SSC_DELTA1_M 0xfff - -#define CORE_GSWPLL_GCR_1 0x040d -#define GSWPLL_PREDIV_S 14 -#define GSWPLL_PREDIV_M 0xc000 -#define GSWPLL_POSTDIV_200M_S 12 -#define GSWPLL_POSTDIV_200M_M 0x3000 -#define GSWPLL_EN_PRE BIT(11) -#define GSWPLL_FBKSEL BIT(10) -#define GSWPLL_BP BIT(9) -#define GSWPLL_BR BIT(8) -#define GSWPLL_FBKDIV_200M_S 0 -#define GSWPLL_FBKDIV_200M_M 0xff - -#define CORE_GSWPLL_GCR_2 0x040e -#define GSWPLL_POSTDIV_500M_S 8 -#define GSWPLL_POSTDIV_500M_M 0x300 -#define GSWPLL_FBKDIV_500M_S 0 -#define GSWPLL_FBKDIV_500M_M 0xff - -#define TRGMII_GSW_CLK_CG 0x0410 -#define TRGMIICK_EN BIT(1) -#define GSWCK_EN BIT(0) - -static int mt7530_mii_read(struct gsw_mt753x *gsw, int phy, int reg) -{ - if (phy < MT753X_NUM_PHYS) - phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK; - - return mdiobus_read(gsw->host_bus, phy, reg); -} - -static void mt7530_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val) -{ - if (phy < MT753X_NUM_PHYS) - phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK; - - mdiobus_write(gsw->host_bus, phy, reg, val); -} - -static int mt7530_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg) -{ - u16 val; - - if (addr < MT753X_NUM_PHYS) - addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->host_bus->mdio_lock); - - gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG, - (MMD_ADDR << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M)); - - gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG, reg); - - gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG, - (MMD_DATA << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M)); - - val = gsw->host_bus->read(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG); - - mutex_unlock(&gsw->host_bus->mdio_lock); - - return val; -} - -static void mt7530_mmd_write(struct gsw_mt753x *gsw, int addr, int devad, - u16 reg, u16 val) -{ - if (addr < MT753X_NUM_PHYS) - addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->host_bus->mdio_lock); - - gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG, - (MMD_ADDR << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M)); - - gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG, reg); - - gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ACC_CTL_REG, - (MMD_DATA << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M)); - - gsw->host_bus->write(gsw->host_bus, addr, MII_MMD_ADDR_DATA_REG, val); - - mutex_unlock(&gsw->host_bus->mdio_lock); -} - -static void mt7530_core_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val) -{ - gsw->mmd_write(gsw, 0, 0x1f, reg, val); -} - -static void mt7530_trgmii_setting(struct gsw_mt753x *gsw) -{ - u16 i; - - mt7530_core_reg_write(gsw, CORE_PLL_GROUP5, 0x0780); - mdelay(1); - mt7530_core_reg_write(gsw, CORE_PLL_GROUP6, 0); - mt7530_core_reg_write(gsw, CORE_PLL_GROUP10, 0x87); - mdelay(1); - mt7530_core_reg_write(gsw, CORE_PLL_GROUP11, 0x87); - - /* PLL BIAS enable */ - mt7530_core_reg_write(gsw, CORE_PLL_GROUP4, - RG_SYSPLL_DDSFBK_EN | RG_SYSPLL_BIAS_EN); - mdelay(1); - - /* PLL LPF enable */ - mt7530_core_reg_write(gsw, CORE_PLL_GROUP4, - RG_SYSPLL_DDSFBK_EN | - RG_SYSPLL_BIAS_EN | RG_SYSPLL_BIAS_LPF_EN); - - /* sys PLL enable */ - mt7530_core_reg_write(gsw, CORE_PLL_GROUP2, - RG_SYSPLL_EN_NORMAL | RG_SYSPLL_VODEN | - (1 << RG_SYSPLL_POSDIV_S)); - - /* LCDDDS PWDS */ - mt7530_core_reg_write(gsw, CORE_PLL_GROUP7, - (3 << RG_LCCDS_C_S) | - RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); - mdelay(1); - - /* Enable MT7530 TRGMII clock */ - mt7530_core_reg_write(gsw, TRGMII_GSW_CLK_CG, GSWCK_EN | TRGMIICK_EN); - - /* lower Tx Driving */ - for (i = 0 ; i < NUM_TRGMII_ODT; i++) - mt753x_reg_write(gsw, TRGMII_TD_ODT(i), - (4 << TX_DM_DRVP_S) | (4 << TX_DM_DRVN_S)); -} - -static void mt7530_rgmii_setting(struct gsw_mt753x *gsw) -{ - u32 val; - - mt7530_core_reg_write(gsw, CORE_PLL_GROUP5, 0x0c80); - mdelay(1); - mt7530_core_reg_write(gsw, CORE_PLL_GROUP6, 0); - mt7530_core_reg_write(gsw, CORE_PLL_GROUP10, 0x87); - mdelay(1); - mt7530_core_reg_write(gsw, CORE_PLL_GROUP11, 0x87); - - val = mt753x_reg_read(gsw, TRGMII_TXCTRL); - val &= ~TXC_INV; - mt753x_reg_write(gsw, TRGMII_TXCTRL, val); - - mt753x_reg_write(gsw, TRGMII_TCK_CTRL, - (8 << TX_TAP_S) | (0x55 << TX_TRAIN_WD_S)); -} - -static int mt7530_mac_port_setup(struct gsw_mt753x *gsw) -{ - u32 hwstrap, p6ecr = 0, p5mcr, p6mcr, phyad; - - hwstrap = mt753x_reg_read(gsw, MHWSTRAP); - hwstrap &= ~(P6_INTF_DIS | P5_INTF_MODE_RGMII | P5_INTF_DIS_S); - hwstrap |= P5_INTF_SEL_GMAC5; - if (!gsw->port5_cfg.enabled) { - p5mcr = FORCE_MODE; - hwstrap |= P5_INTF_DIS_S; - } else { - p5mcr = (IPG_96BIT_WITH_SHORT_IPG << IPG_CFG_S) | - MAC_MODE | MAC_TX_EN | MAC_RX_EN | - BKOFF_EN | BACKPR_EN; - - if (gsw->port5_cfg.force_link) { - p5mcr |= FORCE_MODE | FORCE_LINK | FORCE_RX_FC | - FORCE_TX_FC; - p5mcr |= gsw->port5_cfg.speed << FORCE_SPD_S; - - if (gsw->port5_cfg.duplex) - p5mcr |= FORCE_DPX; - } - - switch (gsw->port5_cfg.phy_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - break; - case PHY_INTERFACE_MODE_RGMII: - hwstrap |= P5_INTF_MODE_RGMII; - break; - default: - dev_info(gsw->dev, "%s is not supported by port5\n", - phy_modes(gsw->port5_cfg.phy_mode)); - p5mcr = FORCE_MODE; - hwstrap |= P5_INTF_DIS_S; - } - - /* Port5 to PHY direct mode */ - if (of_property_read_u32(gsw->port5_cfg.np, "phy-address", - &phyad)) - goto parse_p6; - - if (phyad != 0 && phyad != 4) { - dev_info(gsw->dev, - "Only PHY 0/4 can be connected to Port 5\n"); - goto parse_p6; - } - - hwstrap &= ~P5_INTF_SEL_GMAC5; - if (phyad == 0) - hwstrap |= P5_PHY0_SEL; - else - hwstrap &= ~P5_PHY0_SEL; - } - -parse_p6: - if (!gsw->port6_cfg.enabled) { - p6mcr = FORCE_MODE; - hwstrap |= P6_INTF_DIS; - } else { - p6mcr = (IPG_96BIT_WITH_SHORT_IPG << IPG_CFG_S) | - MAC_MODE | MAC_TX_EN | MAC_RX_EN | - BKOFF_EN | BACKPR_EN; - - if (gsw->port6_cfg.force_link) { - p6mcr |= FORCE_MODE | FORCE_LINK | FORCE_RX_FC | - FORCE_TX_FC; - p6mcr |= gsw->port6_cfg.speed << FORCE_SPD_S; - - if (gsw->port6_cfg.duplex) - p6mcr |= FORCE_DPX; - } - - switch (gsw->port6_cfg.phy_mode) { - case PHY_INTERFACE_MODE_RGMII: - p6ecr = BIT(1); - break; - case PHY_INTERFACE_MODE_TRGMII: - /* set MT7530 central align */ - p6ecr = BIT(0); - break; - default: - dev_info(gsw->dev, "%s is not supported by port6\n", - phy_modes(gsw->port6_cfg.phy_mode)); - p6mcr = FORCE_MODE; - hwstrap |= P6_INTF_DIS; - } - } - - mt753x_reg_write(gsw, MHWSTRAP, hwstrap); - mt753x_reg_write(gsw, P6ECR, p6ecr); - - mt753x_reg_write(gsw, PMCR(5), p5mcr); - mt753x_reg_write(gsw, PMCR(6), p6mcr); - - return 0; -} - -static void mt7530_core_pll_setup(struct gsw_mt753x *gsw) -{ - u32 hwstrap; - - hwstrap = mt753x_reg_read(gsw, HWSTRAP); - - switch ((hwstrap & XTAL_FSEL_M) >> XTAL_FSEL_S) { - case XTAL_40MHZ: - /* Disable MT7530 core clock */ - mt7530_core_reg_write(gsw, TRGMII_GSW_CLK_CG, 0); - - /* disable MT7530 PLL */ - mt7530_core_reg_write(gsw, CORE_GSWPLL_GCR_1, - (2 << GSWPLL_POSTDIV_200M_S) | - (32 << GSWPLL_FBKDIV_200M_S)); - - /* For MT7530 core clock = 500Mhz */ - mt7530_core_reg_write(gsw, CORE_GSWPLL_GCR_2, - (1 << GSWPLL_POSTDIV_500M_S) | - (25 << GSWPLL_FBKDIV_500M_S)); - - /* Enable MT7530 PLL */ - mt7530_core_reg_write(gsw, CORE_GSWPLL_GCR_1, - (2 << GSWPLL_POSTDIV_200M_S) | - (32 << GSWPLL_FBKDIV_200M_S) | - GSWPLL_EN_PRE); - - usleep_range(20, 40); - - /* Enable MT7530 core clock */ - mt7530_core_reg_write(gsw, TRGMII_GSW_CLK_CG, GSWCK_EN); - break; - default: - /* TODO: PLL settings for 20/25MHz */ - break; - } - - hwstrap = mt753x_reg_read(gsw, HWSTRAP); - hwstrap |= CHG_TRAP; - if (gsw->direct_phy_access) - hwstrap &= ~C_MDIO_BPS_S; - else - hwstrap |= C_MDIO_BPS_S; - - mt753x_reg_write(gsw, MHWSTRAP, hwstrap); - - if (gsw->port6_cfg.enabled && - gsw->port6_cfg.phy_mode == PHY_INTERFACE_MODE_TRGMII) { - mt7530_trgmii_setting(gsw); - } else { - /* RGMII */ - mt7530_rgmii_setting(gsw); - } - - /* delay setting for 10/1000M */ - mt753x_reg_write(gsw, P5RGMIIRXCR, - CSR_RGMII_EDGE_ALIGN | - (2 << CSR_RGMII_RXC_0DEG_CFG_S)); - mt753x_reg_write(gsw, P5RGMIITXCR, 0x14 << CSR_RGMII_TXC_CFG_S); -} - -static int mt7530_sw_detect(struct gsw_mt753x *gsw, struct chip_rev *crev) -{ - u32 rev; - - rev = mt753x_reg_read(gsw, CHIP_REV); - - if (((rev & CHIP_NAME_M) >> CHIP_NAME_S) == MT7530) { - if (crev) { - crev->rev = rev & CHIP_REV_M; - crev->name = "MT7530"; - } - - return 0; - } - - return -ENODEV; -} - -static void mt7530_phy_setting(struct gsw_mt753x *gsw) -{ - int i; - u32 val; - - for (i = 0; i < MT753X_NUM_PHYS; i++) { - /* Disable EEE */ - gsw->mmd_write(gsw, i, PHY_DEV07, PHY_DEV07_REG_03C, 0); - - /* Enable HW auto downshift */ - gsw->mii_write(gsw, i, 0x1f, 0x1); - val = gsw->mii_read(gsw, i, PHY_EXT_REG_14); - val |= PHY_EN_DOWN_SHFIT; - gsw->mii_write(gsw, i, PHY_EXT_REG_14, val); - - /* Increase SlvDPSready time */ - gsw->mii_write(gsw, i, 0x1f, 0x52b5); - gsw->mii_write(gsw, i, PHY_TR_REG_10, 0xafae); - gsw->mii_write(gsw, i, PHY_TR_REG_12, 0x2f); - gsw->mii_write(gsw, i, PHY_TR_REG_10, 0x8fae); - - /* Increase post_update_timer */ - gsw->mii_write(gsw, i, 0x1f, 0x3); - gsw->mii_write(gsw, i, PHY_LPI_REG_11, 0x4b); - gsw->mii_write(gsw, i, 0x1f, 0); - - /* Adjust 100_mse_threshold */ - gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_123, 0xffff); - - /* Disable mcc */ - gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_A6, 0x300); - } -} - -static inline bool get_phy_access_mode(const struct device_node *np) -{ - return of_property_read_bool(np, "mt7530,direct-phy-access"); -} - -static int mt7530_sw_init(struct gsw_mt753x *gsw) -{ - int i; - u32 val; - - gsw->direct_phy_access = get_phy_access_mode(gsw->dev->of_node); - - /* Force MT7530 to use (in)direct PHY access */ - val = mt753x_reg_read(gsw, HWSTRAP); - val |= CHG_TRAP; - if (gsw->direct_phy_access) - val &= ~C_MDIO_BPS_S; - else - val |= C_MDIO_BPS_S; - mt753x_reg_write(gsw, MHWSTRAP, val); - - /* Read PHY address base from HWSTRAP */ - gsw->phy_base = (((val & SMI_ADDR_M) >> SMI_ADDR_S) << 3) + 8; - gsw->phy_base &= MT753X_SMI_ADDR_MASK; - - if (gsw->direct_phy_access) { - gsw->mii_read = mt7530_mii_read; - gsw->mii_write = mt7530_mii_write; - gsw->mmd_read = mt7530_mmd_read; - gsw->mmd_write = mt7530_mmd_write; - } else { - gsw->mii_read = mt753x_mii_read; - gsw->mii_write = mt753x_mii_write; - gsw->mmd_read = mt753x_mmd_ind_read; - gsw->mmd_write = mt753x_mmd_ind_write; - } - - for (i = 0; i < MT753X_NUM_PHYS; i++) { - val = gsw->mii_read(gsw, i, MII_BMCR); - val |= BMCR_PDOWN; - gsw->mii_write(gsw, i, MII_BMCR, val); - } - - /* Force MAC link down before reset */ - mt753x_reg_write(gsw, PMCR(5), FORCE_MODE); - mt753x_reg_write(gsw, PMCR(6), FORCE_MODE); - - /* Switch soft reset */ - /* BUG: sw reset causes gsw int flooding */ - mt753x_reg_write(gsw, SYS_CTRL, SW_PHY_RST | SW_SYS_RST | SW_REG_RST); - usleep_range(10, 20); - - /* global mac control settings configuration */ - mt753x_reg_write(gsw, GMACCR, - LATE_COL_DROP | (15 << MTCC_LMT_S) | - (2 << MAX_RX_JUMBO_S) | RX_PKT_LEN_MAX_JUMBO); - - mt7530_core_pll_setup(gsw); - mt7530_mac_port_setup(gsw); - - return 0; -} - -static int mt7530_sw_post_init(struct gsw_mt753x *gsw) -{ - int i; - u32 val; - - mt7530_phy_setting(gsw); - - for (i = 0; i < MT753X_NUM_PHYS; i++) { - val = gsw->mii_read(gsw, i, MII_BMCR); - val &= ~BMCR_PDOWN; - gsw->mii_write(gsw, i, MII_BMCR, val); - } - - return 0; -} - -struct mt753x_sw_id mt7530_id = { - .model = MT7530, - .detect = mt7530_sw_detect, - .init = mt7530_sw_init, - .post_init = mt7530_sw_post_init -}; diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7530.h b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7530.h deleted file mode 100644 index 40243d4e5a..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7530.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2018 MediaTek Inc. - */ - -#ifndef _MT7530_H_ -#define _MT7530_H_ - -#include "mt753x.h" - -extern struct mt753x_sw_id mt7530_id; - -#endif /* _MT7530_H_ */ diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7531.c b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7531.c deleted file mode 100644 index 7ebf09c102..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7531.c +++ /dev/null @@ -1,918 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Zhanguo Ju - */ - -#include -#include -#include - -#include "mt753x.h" -#include "mt753x_regs.h" - -/* MT7531 registers */ -#define SGMII_REG_BASE 0x5000 -#define SGMII_REG_PORT_BASE 0x1000 -#define SGMII_REG(p, r) (SGMII_REG_BASE + \ - (p) * SGMII_REG_PORT_BASE + (r)) -#define PCS_CONTROL_1(p) SGMII_REG(p, 0x00) -#define SGMII_MODE(p) SGMII_REG(p, 0x20) -#define QPHY_PWR_STATE_CTRL(p) SGMII_REG(p, 0xe8) -#define PHYA_CTRL_SIGNAL3(p) SGMII_REG(p, 0x128) - -/* Fields of PCS_CONTROL_1 */ -#define SGMII_LINK_STATUS BIT(18) -#define SGMII_AN_ENABLE BIT(12) -#define SGMII_AN_RESTART BIT(9) - -/* Fields of SGMII_MODE */ -#define SGMII_REMOTE_FAULT_DIS BIT(8) -#define SGMII_IF_MODE_FORCE_DUPLEX BIT(4) -#define SGMII_IF_MODE_FORCE_SPEED_S 0x2 -#define SGMII_IF_MODE_FORCE_SPEED_M 0x0c -#define SGMII_IF_MODE_ADVERT_AN BIT(1) - -/* Values of SGMII_IF_MODE_FORCE_SPEED */ -#define SGMII_IF_MODE_FORCE_SPEED_10 0 -#define SGMII_IF_MODE_FORCE_SPEED_100 1 -#define SGMII_IF_MODE_FORCE_SPEED_1000 2 - -/* Fields of QPHY_PWR_STATE_CTRL */ -#define PHYA_PWD BIT(4) - -/* Fields of PHYA_CTRL_SIGNAL3 */ -#define RG_TPHY_SPEED_S 2 -#define RG_TPHY_SPEED_M 0x0c - -/* Values of RG_TPHY_SPEED */ -#define RG_TPHY_SPEED_1000 0 -#define RG_TPHY_SPEED_2500 1 - -/* Unique fields of (M)HWSTRAP for MT7531 */ -#define XTAL_FSEL_S 7 -#define XTAL_FSEL_M BIT(7) -#define PHY_EN BIT(6) -#define CHG_STRAP BIT(8) - -/* Efuse Register Define */ -#define GBE_EFUSE 0x7bc8 -#define GBE_SEL_EFUSE_EN BIT(0) - -/* PHY ENABLE Register bitmap define */ -#define PHY_DEV1F 0x1f -#define PHY_DEV1F_REG_44 0x44 -#define PHY_DEV1F_REG_104 0x104 -#define PHY_DEV1F_REG_10A 0x10a -#define PHY_DEV1F_REG_10B 0x10b -#define PHY_DEV1F_REG_10C 0x10c -#define PHY_DEV1F_REG_10D 0x10d -#define PHY_DEV1F_REG_268 0x268 -#define PHY_DEV1F_REG_269 0x269 -#define PHY_DEV1F_REG_403 0x403 - -/* Fields of PHY_DEV1F_REG_403 */ -#define GBE_EFUSE_SETTING BIT(3) -#define PHY_EN_BYPASS_MODE BIT(4) -#define POWER_ON_OFF BIT(5) -#define PHY_PLL_M GENMASK(9, 8) -#define PHY_PLL_SEL(x) (((x) << 8) & GENMASK(9, 8)) - -/* PHY EEE Register bitmap of define */ -#define PHY_DEV07 0x07 -#define PHY_DEV07_REG_03C 0x3c - -/* PHY Extend Register 0x14 bitmap of define */ -#define PHY_EXT_REG_14 0x14 - -/* Fields of PHY_EXT_REG_14 */ -#define PHY_EN_DOWN_SHFIT BIT(4) - -/* PHY Extend Register 0x17 bitmap of define */ -#define PHY_EXT_REG_17 0x17 - -/* Fields of PHY_EXT_REG_17 */ -#define PHY_LINKDOWN_POWER_SAVING_EN BIT(4) - -/* PHY Token Ring Register 0x10 bitmap of define */ -#define PHY_TR_REG_10 0x10 - -/* PHY Token Ring Register 0x12 bitmap of define */ -#define PHY_TR_REG_12 0x12 - -/* PHY DEV 0x1e Register bitmap of define */ -#define PHY_DEV1E 0x1e -#define PHY_DEV1E_REG_13 0x13 -#define PHY_DEV1E_REG_14 0x14 -#define PHY_DEV1E_REG_41 0x41 -#define PHY_DEV1E_REG_A6 0xa6 -#define PHY_DEV1E_REG_0C6 0x0c6 -#define PHY_DEV1E_REG_0FE 0x0fe -#define PHY_DEV1E_REG_123 0x123 -#define PHY_DEV1E_REG_189 0x189 - -/* Fields of PHY_DEV1E_REG_0C6 */ -#define PHY_POWER_SAVING_S 8 -#define PHY_POWER_SAVING_M 0x300 -#define PHY_POWER_SAVING_TX 0x0 - -/* Fields of PHY_DEV1E_REG_189 */ -#define DESCRAMBLER_CLEAR_EN 0x1 - -/* Values of XTAL_FSEL_S */ -#define XTAL_40MHZ 0 -#define XTAL_25MHZ 1 - -#define PLLGP_EN 0x7820 -#define EN_COREPLL BIT(2) -#define SW_CLKSW BIT(1) -#define SW_PLLGP BIT(0) - -#define PLLGP_CR0 0x78a8 -#define RG_COREPLL_EN BIT(22) -#define RG_COREPLL_POSDIV_S 23 -#define RG_COREPLL_POSDIV_M 0x3800000 -#define RG_COREPLL_SDM_PCW_S 1 -#define RG_COREPLL_SDM_PCW_M 0x3ffffe -#define RG_COREPLL_SDM_PCW_CHG BIT(0) - -/* TOP Signals Status Register */ -#define TOP_SIG_SR 0x780c -#define PAD_DUAL_SGMII_EN BIT(1) - -/* RGMII and SGMII PLL clock */ -#define ANA_PLLGP_CR2 0x78b0 -#define ANA_PLLGP_CR5 0x78bc - -/* GPIO mode define */ -#define GPIO_MODE_REGS(x) (0x7c0c + (((x) / 8) * 4)) -#define GPIO_MODE_S 4 - -/* GPIO GROUP IOLB SMT0 Control */ -#define SMT0_IOLB 0x7f04 -#define SMT_IOLB_5_SMI_MDC_EN BIT(5) - -/* Unique fields of PMCR for MT7531 */ -#define FORCE_MODE_EEE1G BIT(25) -#define FORCE_MODE_EEE100 BIT(26) -#define FORCE_MODE_TX_FC BIT(27) -#define FORCE_MODE_RX_FC BIT(28) -#define FORCE_MODE_DPX BIT(29) -#define FORCE_MODE_SPD BIT(30) -#define FORCE_MODE_LNK BIT(31) -#define FORCE_MODE BIT(15) - -#define CHIP_REV 0x781C -#define CHIP_NAME_S 16 -#define CHIP_NAME_M 0xffff0000 -#define CHIP_REV_S 0 -#define CHIP_REV_M 0x0f -#define CHIP_REV_E1 0x0 - -#define CLKGEN_CTRL 0x7500 -#define CLK_SKEW_OUT_S 8 -#define CLK_SKEW_OUT_M 0x300 -#define CLK_SKEW_IN_S 6 -#define CLK_SKEW_IN_M 0xc0 -#define RXCLK_NO_DELAY BIT(5) -#define TXCLK_NO_REVERSE BIT(4) -#define GP_MODE_S 1 -#define GP_MODE_M 0x06 -#define GP_CLK_EN BIT(0) - -/* Values of GP_MODE */ -#define GP_MODE_RGMII 0 -#define GP_MODE_MII 1 -#define GP_MODE_REV_MII 2 - -/* Values of CLK_SKEW_IN */ -#define CLK_SKEW_IN_NO_CHANGE 0 -#define CLK_SKEW_IN_DELAY_100PPS 1 -#define CLK_SKEW_IN_DELAY_200PPS 2 -#define CLK_SKEW_IN_REVERSE 3 - -/* Values of CLK_SKEW_OUT */ -#define CLK_SKEW_OUT_NO_CHANGE 0 -#define CLK_SKEW_OUT_DELAY_100PPS 1 -#define CLK_SKEW_OUT_DELAY_200PPS 2 -#define CLK_SKEW_OUT_REVERSE 3 - -/* Proprietory Control Register of Internal Phy device 0x1e */ -#define RXADC_CONTROL_3 0xc2 -#define RXADC_LDO_CONTROL_2 0xd3 - -/* Proprietory Control Register of Internal Phy device 0x1f */ -#define TXVLD_DA_271 0x271 -#define TXVLD_DA_272 0x272 -#define TXVLD_DA_273 0x273 - -/* DSP Channel and NOD_ADDR*/ -#define DSP_CH 0x2 -#define DSP_NOD_ADDR 0xD - -/* gpio pinmux pins and functions define */ -static int gpio_int_pins[] = {0}; -static int gpio_int_funcs[] = {1}; -static int gpio_mdc_pins[] = {11, 20}; -static int gpio_mdc_funcs[] = {2, 2}; -static int gpio_mdio_pins[] = {12, 21}; -static int gpio_mdio_funcs[] = {2, 2}; - -static int mt7531_set_port_sgmii_force_mode(struct gsw_mt753x *gsw, u32 port, - struct mt753x_port_cfg *port_cfg) -{ - u32 speed, port_base, val; - ktime_t timeout; - u32 timeout_us; - - if (port < 5 || port >= MT753X_NUM_PORTS) { - dev_info(gsw->dev, "port %d is not a SGMII port\n", port); - return -EINVAL; - } - - port_base = port - 5; - - switch (port_cfg->speed) { - case MAC_SPD_1000: - speed = RG_TPHY_SPEED_1000; - break; - case MAC_SPD_2500: - speed = RG_TPHY_SPEED_2500; - break; - default: - dev_info(gsw->dev, "invalid SGMII speed idx %d for port %d\n", - port_cfg->speed, port); - - speed = RG_TPHY_SPEED_1000; - } - - /* Step 1: Speed select register setting */ - val = mt753x_reg_read(gsw, PHYA_CTRL_SIGNAL3(port_base)); - val &= ~RG_TPHY_SPEED_M; - val |= speed << RG_TPHY_SPEED_S; - mt753x_reg_write(gsw, PHYA_CTRL_SIGNAL3(port_base), val); - - /* Step 2 : Disable AN */ - val = mt753x_reg_read(gsw, PCS_CONTROL_1(port_base)); - val &= ~SGMII_AN_ENABLE; - mt753x_reg_write(gsw, PCS_CONTROL_1(port_base), val); - - /* Step 3: SGMII force mode setting */ - val = mt753x_reg_read(gsw, SGMII_MODE(port_base)); - val &= ~SGMII_IF_MODE_ADVERT_AN; - val &= ~SGMII_IF_MODE_FORCE_SPEED_M; - val |= SGMII_IF_MODE_FORCE_SPEED_1000 << SGMII_IF_MODE_FORCE_SPEED_S; - val |= SGMII_IF_MODE_FORCE_DUPLEX; - /* For sgmii force mode, 0 is full duplex and 1 is half duplex */ - if (port_cfg->duplex) - val &= ~SGMII_IF_MODE_FORCE_DUPLEX; - - mt753x_reg_write(gsw, SGMII_MODE(port_base), val); - - /* Step 4: XXX: Disable Link partner's AN and set force mode */ - - /* Step 5: XXX: Special setting for PHYA ==> reserved for flexible */ - - /* Step 6 : Release PHYA power down state */ - val = mt753x_reg_read(gsw, QPHY_PWR_STATE_CTRL(port_base)); - val &= ~PHYA_PWD; - mt753x_reg_write(gsw, QPHY_PWR_STATE_CTRL(port_base), val); - - /* Step 7 : Polling SGMII_LINK_STATUS */ - timeout_us = 2000000; - timeout = ktime_add_us(ktime_get(), timeout_us); - while (1) { - val = mt753x_reg_read(gsw, PCS_CONTROL_1(port_base)); - val &= SGMII_LINK_STATUS; - - if (val) - break; - - if (ktime_compare(ktime_get(), timeout) > 0) - return -ETIMEDOUT; - } - - return 0; -} - -static int mt7531_set_port_sgmii_an_mode(struct gsw_mt753x *gsw, u32 port, - struct mt753x_port_cfg *port_cfg) -{ - u32 speed, port_base, val; - ktime_t timeout; - u32 timeout_us; - - if (port < 5 || port >= MT753X_NUM_PORTS) { - dev_info(gsw->dev, "port %d is not a SGMII port\n", port); - return -EINVAL; - } - - port_base = port - 5; - - switch (port_cfg->speed) { - case MAC_SPD_1000: - speed = RG_TPHY_SPEED_1000; - break; - case MAC_SPD_2500: - speed = RG_TPHY_SPEED_2500; - break; - default: - dev_info(gsw->dev, "invalid SGMII speed idx %d for port %d\n", - port_cfg->speed, port); - - speed = RG_TPHY_SPEED_1000; - } - - /* Step 1: Speed select register setting */ - val = mt753x_reg_read(gsw, PHYA_CTRL_SIGNAL3(port_base)); - val &= ~RG_TPHY_SPEED_M; - val |= speed << RG_TPHY_SPEED_S; - mt753x_reg_write(gsw, PHYA_CTRL_SIGNAL3(port_base), val); - - /* Step 2: Remote fault disable */ - val = mt753x_reg_read(gsw, SGMII_MODE(port)); - val |= SGMII_REMOTE_FAULT_DIS; - mt753x_reg_write(gsw, SGMII_MODE(port), val); - - /* Step 3: Setting Link partner's AN enable = 1 */ - - /* Step 4: Setting Link partner's device ability for speed/duplex */ - - /* Step 5: AN re-start */ - val = mt753x_reg_read(gsw, PCS_CONTROL_1(port)); - val |= SGMII_AN_RESTART; - mt753x_reg_write(gsw, PCS_CONTROL_1(port), val); - - /* Step 6: Special setting for PHYA ==> reserved for flexible */ - - /* Step 7 : Polling SGMII_LINK_STATUS */ - timeout_us = 2000000; - timeout = ktime_add_us(ktime_get(), timeout_us); - while (1) { - val = mt753x_reg_read(gsw, PCS_CONTROL_1(port_base)); - val &= SGMII_LINK_STATUS; - - if (val) - break; - - if (ktime_compare(ktime_get(), timeout) > 0) - return -ETIMEDOUT; - } - - return 0; -} - -static int mt7531_set_port_rgmii(struct gsw_mt753x *gsw, u32 port) -{ - u32 val; - - if (port != 5) { - dev_info(gsw->dev, "RGMII mode is not available for port %d\n", - port); - return -EINVAL; - } - - val = mt753x_reg_read(gsw, CLKGEN_CTRL); - val |= GP_CLK_EN; - val &= ~GP_MODE_M; - val |= GP_MODE_RGMII << GP_MODE_S; - val |= TXCLK_NO_REVERSE; - val |= RXCLK_NO_DELAY; - val &= ~CLK_SKEW_IN_M; - val |= CLK_SKEW_IN_NO_CHANGE << CLK_SKEW_IN_S; - val &= ~CLK_SKEW_OUT_M; - val |= CLK_SKEW_OUT_NO_CHANGE << CLK_SKEW_OUT_S; - mt753x_reg_write(gsw, CLKGEN_CTRL, val); - - return 0; -} - -static int mt7531_mac_port_setup(struct gsw_mt753x *gsw, u32 port, - struct mt753x_port_cfg *port_cfg) -{ - u32 pmcr; - u32 speed; - - if (port < 5 || port >= MT753X_NUM_PORTS) { - dev_info(gsw->dev, "port %d is not a MAC port\n", port); - return -EINVAL; - } - - if (port_cfg->enabled) { - pmcr = (IPG_96BIT_WITH_SHORT_IPG << IPG_CFG_S) | - MAC_MODE | MAC_TX_EN | MAC_RX_EN | - BKOFF_EN | BACKPR_EN; - - if (port_cfg->force_link) { - /* PMCR's speed field 0x11 is reserved, - * sw should set 0x10 - */ - speed = port_cfg->speed; - if (port_cfg->speed == MAC_SPD_2500) - speed = MAC_SPD_1000; - - pmcr |= FORCE_MODE_LNK | FORCE_LINK | - FORCE_MODE_SPD | FORCE_MODE_DPX | - FORCE_MODE_RX_FC | FORCE_MODE_TX_FC | - FORCE_RX_FC | FORCE_TX_FC | - (speed << FORCE_SPD_S); - - if (port_cfg->duplex) - pmcr |= FORCE_DPX; - } - } else { - pmcr = FORCE_MODE_LNK; - } - - switch (port_cfg->phy_mode) { - case PHY_INTERFACE_MODE_RGMII: - mt7531_set_port_rgmii(gsw, port); - break; - case PHY_INTERFACE_MODE_SGMII: - if (port_cfg->force_link) - mt7531_set_port_sgmii_force_mode(gsw, port, port_cfg); - else - mt7531_set_port_sgmii_an_mode(gsw, port, port_cfg); - break; - default: - if (port_cfg->enabled) - dev_info(gsw->dev, "%s is not supported by port %d\n", - phy_modes(port_cfg->phy_mode), port); - - pmcr = FORCE_MODE_LNK; - } - - mt753x_reg_write(gsw, PMCR(port), pmcr); - - return 0; -} - -static void mt7531_core_pll_setup(struct gsw_mt753x *gsw) -{ - u32 hwstrap; - u32 val; - - val = mt753x_reg_read(gsw, TOP_SIG_SR); - if (val & PAD_DUAL_SGMII_EN) - return; - - hwstrap = mt753x_reg_read(gsw, HWSTRAP); - - switch ((hwstrap & XTAL_FSEL_M) >> XTAL_FSEL_S) { - case XTAL_25MHZ: - /* Step 1 : Disable MT7531 COREPLL */ - val = mt753x_reg_read(gsw, PLLGP_EN); - val &= ~EN_COREPLL; - mt753x_reg_write(gsw, PLLGP_EN, val); - - /* Step 2: switch to XTAL output */ - val = mt753x_reg_read(gsw, PLLGP_EN); - val |= SW_CLKSW; - mt753x_reg_write(gsw, PLLGP_EN, val); - - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_EN; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - /* Step 3: disable PLLGP and enable program PLLGP */ - val = mt753x_reg_read(gsw, PLLGP_EN); - val |= SW_PLLGP; - mt753x_reg_write(gsw, PLLGP_EN, val); - - /* Step 4: program COREPLL output frequency to 500MHz */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_POSDIV_M; - val |= 2 << RG_COREPLL_POSDIV_S; - mt753x_reg_write(gsw, PLLGP_CR0, val); - usleep_range(25, 35); - - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_SDM_PCW_M; - val |= 0x140000 << RG_COREPLL_SDM_PCW_S; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - /* Set feedback divide ratio update signal to high */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val |= RG_COREPLL_SDM_PCW_CHG; - mt753x_reg_write(gsw, PLLGP_CR0, val); - /* Wait for at least 16 XTAL clocks */ - usleep_range(10, 20); - - /* Step 5: set feedback divide ratio update signal to low */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_SDM_PCW_CHG; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - /* Enable 325M clock for SGMII */ - mt753x_reg_write(gsw, ANA_PLLGP_CR5, 0xad0000); - - /* Enable 250SSC clock for RGMII */ - mt753x_reg_write(gsw, ANA_PLLGP_CR2, 0x4f40000); - - /* Step 6: Enable MT7531 PLL */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val |= RG_COREPLL_EN; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - val = mt753x_reg_read(gsw, PLLGP_EN); - val |= EN_COREPLL; - mt753x_reg_write(gsw, PLLGP_EN, val); - usleep_range(25, 35); - - break; - case XTAL_40MHZ: - /* Step 1 : Disable MT7531 COREPLL */ - val = mt753x_reg_read(gsw, PLLGP_EN); - val &= ~EN_COREPLL; - mt753x_reg_write(gsw, PLLGP_EN, val); - - /* Step 2: switch to XTAL output */ - val = mt753x_reg_read(gsw, PLLGP_EN); - val |= SW_CLKSW; - mt753x_reg_write(gsw, PLLGP_EN, val); - - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_EN; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - /* Step 3: disable PLLGP and enable program PLLGP */ - val = mt753x_reg_read(gsw, PLLGP_EN); - val |= SW_PLLGP; - mt753x_reg_write(gsw, PLLGP_EN, val); - - /* Step 4: program COREPLL output frequency to 500MHz */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_POSDIV_M; - val |= 2 << RG_COREPLL_POSDIV_S; - mt753x_reg_write(gsw, PLLGP_CR0, val); - usleep_range(25, 35); - - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_SDM_PCW_M; - val |= 0x190000 << RG_COREPLL_SDM_PCW_S; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - /* Set feedback divide ratio update signal to high */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val |= RG_COREPLL_SDM_PCW_CHG; - mt753x_reg_write(gsw, PLLGP_CR0, val); - /* Wait for at least 16 XTAL clocks */ - usleep_range(10, 20); - - /* Step 5: set feedback divide ratio update signal to low */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val &= ~RG_COREPLL_SDM_PCW_CHG; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - /* Enable 325M clock for SGMII */ - mt753x_reg_write(gsw, ANA_PLLGP_CR5, 0xad0000); - - /* Enable 250SSC clock for RGMII */ - mt753x_reg_write(gsw, ANA_PLLGP_CR2, 0x4f40000); - - /* Step 6: Enable MT7531 PLL */ - val = mt753x_reg_read(gsw, PLLGP_CR0); - val |= RG_COREPLL_EN; - mt753x_reg_write(gsw, PLLGP_CR0, val); - - val = mt753x_reg_read(gsw, PLLGP_EN); - val |= EN_COREPLL; - mt753x_reg_write(gsw, PLLGP_EN, val); - usleep_range(25, 35); - break; - } -} - -static int mt7531_internal_phy_calibration(struct gsw_mt753x *gsw) -{ - return 0; -} - -static int mt7531_sw_detect(struct gsw_mt753x *gsw, struct chip_rev *crev) -{ - u32 rev, topsig; - - rev = mt753x_reg_read(gsw, CHIP_REV); - - if (((rev & CHIP_NAME_M) >> CHIP_NAME_S) == MT7531) { - if (crev) { - topsig = mt753x_reg_read(gsw, TOP_SIG_SR); - - crev->rev = rev & CHIP_REV_M; - crev->name = topsig & PAD_DUAL_SGMII_EN ? - "MT7531AE" : "MT7531BE"; - } - - return 0; - } - - return -ENODEV; -} - -static void pinmux_set_mux_7531(struct gsw_mt753x *gsw, u32 pin, u32 mode) -{ - u32 val; - - val = mt753x_reg_read(gsw, GPIO_MODE_REGS(pin)); - val &= ~(0xf << (pin & 7) * GPIO_MODE_S); - val |= mode << (pin & 7) * GPIO_MODE_S; - mt753x_reg_write(gsw, GPIO_MODE_REGS(pin), val); -} - -static int mt7531_set_gpio_pinmux(struct gsw_mt753x *gsw) -{ - u32 group = 0; - struct device_node *np = gsw->dev->of_node; - - /* Set GPIO 0 interrupt mode */ - pinmux_set_mux_7531(gsw, gpio_int_pins[0], gpio_int_funcs[0]); - - of_property_read_u32(np, "mediatek,mdio_master_pinmux", &group); - - /* group = 0: do nothing, 1: 1st group (AE), 2: 2nd group (BE) */ - if (group > 0 && group <= 2) { - group--; - pinmux_set_mux_7531(gsw, gpio_mdc_pins[group], - gpio_mdc_funcs[group]); - pinmux_set_mux_7531(gsw, gpio_mdio_pins[group], - gpio_mdio_funcs[group]); - } - - return 0; -} - -static void mt7531_phy_pll_setup(struct gsw_mt753x *gsw) -{ - u32 hwstrap; - u32 val; - - hwstrap = mt753x_reg_read(gsw, HWSTRAP); - - switch ((hwstrap & XTAL_FSEL_M) >> XTAL_FSEL_S) { - case XTAL_25MHZ: - /* disable pll auto calibration */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_104, 0x608); - - /* change pll sel */ - val = gsw->mmd_read(gsw, 0, PHY_DEV1F, - PHY_DEV1F_REG_403); - val &= ~(PHY_PLL_M); - val |= PHY_PLL_SEL(3); - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, val); - - /* set divider ratio */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, - PHY_DEV1F_REG_10A, 0x1009); - - /* set divider ratio */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10B, 0x7c6); - - /* capacitance and resistance adjustment */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, - PHY_DEV1F_REG_10C, 0xa8be); - - break; - case XTAL_40MHZ: - /* disable pll auto calibration */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_104, 0x608); - - /* change pll sel */ - val = gsw->mmd_read(gsw, 0, PHY_DEV1F, - PHY_DEV1F_REG_403); - val &= ~(PHY_PLL_M); - val |= PHY_PLL_SEL(3); - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, val); - - /* set divider ratio */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, - PHY_DEV1F_REG_10A, 0x1018); - - /* set divider ratio */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10B, 0xc676); - - /* capacitance and resistance adjustment */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, - PHY_DEV1F_REG_10C, 0xd8be); - break; - } - - /* power down pll. additional delay is not required via mdio access */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10D, 0x10); - - /* power up pll */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_10D, 0x14); -} - -static void mt7531_phy_setting(struct gsw_mt753x *gsw) -{ - int i; - u32 val; - - /* Adjust DAC TX Delay */ - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_44, 0xc0); - - for (i = 0; i < MT753X_NUM_PHYS; i++) { - /* Disable EEE */ - gsw->mmd_write(gsw, i, PHY_DEV07, PHY_DEV07_REG_03C, 0); - - /* Enable HW auto downshift */ - gsw->mii_write(gsw, i, 0x1f, 0x1); - val = gsw->mii_read(gsw, i, PHY_EXT_REG_14); - val |= PHY_EN_DOWN_SHFIT; - gsw->mii_write(gsw, i, PHY_EXT_REG_14, val); - - /* Increase SlvDPSready time */ - gsw->mii_write(gsw, i, 0x1f, 0x52b5); - gsw->mii_write(gsw, i, PHY_TR_REG_10, 0xafae); - gsw->mii_write(gsw, i, PHY_TR_REG_12, 0x2f); - gsw->mii_write(gsw, i, PHY_TR_REG_10, 0x8fae); - gsw->mii_write(gsw, i, 0x1f, 0); - - /* Adjust 100_mse_threshold */ - gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_123, 0xffff); - - /* Disable mcc */ - gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_A6, 0x300); - - /* PHY link down power saving enable */ - val = gsw->mii_read(gsw, i, PHY_EXT_REG_17); - val |= PHY_LINKDOWN_POWER_SAVING_EN; - gsw->mii_write(gsw, i, PHY_EXT_REG_17, val); - - val = gsw->mmd_read(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_0C6); - val &= ~PHY_POWER_SAVING_M; - val |= PHY_POWER_SAVING_TX << PHY_POWER_SAVING_S; - gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_0C6, val); - - /* Set TX Pair delay selection */ - gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_13, 0x404); - gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_14, 0x404); - } -} - -static void mt7531_adjust_line_driving(struct gsw_mt753x *gsw, u32 port) -{ - /* For ADC timing margin window for LDO calibration */ - gsw->mmd_write(gsw, port, PHY_DEV1E, RXADC_LDO_CONTROL_2, 0x2222); - - /* Adjust AD sample timing */ - gsw->mmd_write(gsw, port, PHY_DEV1E, RXADC_CONTROL_3, 0x4444); - - /* Adjust Line driver current for different mode */ - gsw->mmd_write(gsw, port, PHY_DEV1F, TXVLD_DA_271, 0x2ca5); - - /* Adjust Line driver current for different mode */ - gsw->mmd_write(gsw, port, PHY_DEV1F, TXVLD_DA_272, 0xc6b); - - /* Adjust Line driver amplitude for 10BT */ - gsw->mmd_write(gsw, port, PHY_DEV1F, TXVLD_DA_273, 0x3000); - - /* Adjust RX Echo path filter */ - gsw->mmd_write(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_0FE, 0x2); - - /* Adjust RX HVGA bias current */ - gsw->mmd_write(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_41, 0x3333); - - /* Adjust TX class AB driver 1 */ - gsw->mmd_write(gsw, port, PHY_DEV1F, PHY_DEV1F_REG_268, 0x388); - - /* Adjust TX class AB driver 2 */ - gsw->mmd_write(gsw, port, PHY_DEV1F, PHY_DEV1F_REG_269, 0x4448); -} - -static void mt7531_eee_setting(struct gsw_mt753x *gsw, u32 port) -{ - u32 tr_reg_control; - u32 val; - - /* Disable generate signal to clear the scramble_lock when lpi mode */ - val = gsw->mmd_read(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_189); - val &= ~DESCRAMBLER_CLEAR_EN; - gsw->mmd_write(gsw, port, PHY_DEV1E, PHY_DEV1E_REG_189, val); - - /* roll back CR*/ - gsw->mii_write(gsw, port, 0x1f, 0x52b5); - gsw->mmd_write(gsw, port, 0x1e, 0x2d1, 0); - tr_reg_control = (1 << 15) | (0 << 13) | (DSP_CH << 11) | - (DSP_NOD_ADDR << 7) | (0x8 << 1); - gsw->mii_write(gsw, port, 17, 0x1b); - gsw->mii_write(gsw, port, 18, 0); - gsw->mii_write(gsw, port, 16, tr_reg_control); - tr_reg_control = (1 << 15) | (0 << 13) | (DSP_CH << 11) | - (DSP_NOD_ADDR << 7) | (0xf << 1); - gsw->mii_write(gsw, port, 17, 0); - gsw->mii_write(gsw, port, 18, 0); - gsw->mii_write(gsw, port, 16, tr_reg_control); - - tr_reg_control = (1 << 15) | (0 << 13) | (DSP_CH << 11) | - (DSP_NOD_ADDR << 7) | (0x10 << 1); - gsw->mii_write(gsw, port, 17, 0x500); - gsw->mii_write(gsw, port, 18, 0); - gsw->mii_write(gsw, port, 16, tr_reg_control); - gsw->mii_write(gsw, port, 0x1f, 0); -} - -static int mt7531_sw_init(struct gsw_mt753x *gsw) -{ - int i; - u32 val; - - gsw->phy_base = (gsw->smi_addr + 1) & MT753X_SMI_ADDR_MASK; - - gsw->mii_read = mt753x_mii_read; - gsw->mii_write = mt753x_mii_write; - gsw->mmd_read = mt753x_mmd_read; - gsw->mmd_write = mt753x_mmd_write; - - for (i = 0; i < MT753X_NUM_PHYS; i++) { - val = gsw->mii_read(gsw, i, MII_BMCR); - val |= BMCR_ISOLATE; - gsw->mii_write(gsw, i, MII_BMCR, val); - } - - /* Force MAC link down before reset */ - mt753x_reg_write(gsw, PMCR(5), FORCE_MODE_LNK); - mt753x_reg_write(gsw, PMCR(6), FORCE_MODE_LNK); - - /* Switch soft reset */ - mt753x_reg_write(gsw, SYS_CTRL, SW_SYS_RST | SW_REG_RST); - usleep_range(10, 20); - - /* Enable MDC input Schmitt Trigger */ - val = mt753x_reg_read(gsw, SMT0_IOLB); - mt753x_reg_write(gsw, SMT0_IOLB, val | SMT_IOLB_5_SMI_MDC_EN); - - /* Set 7531 gpio pinmux */ - mt7531_set_gpio_pinmux(gsw); - - /* Global mac control settings */ - mt753x_reg_write(gsw, GMACCR, - (15 << MTCC_LMT_S) | (11 << MAX_RX_JUMBO_S) | - RX_PKT_LEN_MAX_JUMBO); - - mt7531_core_pll_setup(gsw); - mt7531_mac_port_setup(gsw, 5, &gsw->port5_cfg); - mt7531_mac_port_setup(gsw, 6, &gsw->port6_cfg); - - return 0; -} - -static int mt7531_sw_post_init(struct gsw_mt753x *gsw) -{ - int i; - u32 val; - - mt7531_phy_pll_setup(gsw); - - /* Internal PHYs are disabled by default. SW should enable them. - * Note that this may already be enabled in bootloader stage. - */ - val = gsw->mmd_read(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403); - val |= PHY_EN_BYPASS_MODE; - val &= ~POWER_ON_OFF; - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, val); - - mt7531_phy_setting(gsw); - - for (i = 0; i < MT753X_NUM_PHYS; i++) { - val = gsw->mii_read(gsw, i, MII_BMCR); - val &= ~BMCR_ISOLATE; - gsw->mii_write(gsw, i, MII_BMCR, val); - } - - for (i = 0; i < MT753X_NUM_PHYS; i++) - mt7531_adjust_line_driving(gsw, i); - - for (i = 0; i < MT753X_NUM_PHYS; i++) - mt7531_eee_setting(gsw, i); - - val = mt753x_reg_read(gsw, CHIP_REV); - val &= CHIP_REV_M; - if (val == CHIP_REV_E1) { - mt7531_internal_phy_calibration(gsw); - } else { - val = mt753x_reg_read(gsw, GBE_EFUSE); - if (val & GBE_SEL_EFUSE_EN) { - val = gsw->mmd_read(gsw, 0, PHY_DEV1F, - PHY_DEV1F_REG_403); - val &= ~GBE_EFUSE_SETTING; - gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, - val); - } else { - mt7531_internal_phy_calibration(gsw); - } - } - - return 0; -} - -struct mt753x_sw_id mt7531_id = { - .model = MT7531, - .detect = mt7531_sw_detect, - .init = mt7531_sw_init, - .post_init = mt7531_sw_post_init -}; - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Zhanguo Ju "); -MODULE_DESCRIPTION("Driver for MediaTek MT753x Gigabit Switch"); diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7531.h b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7531.h deleted file mode 100644 index 52c8a49fd3..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt7531.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2018 MediaTek Inc. - */ - -#ifndef _MT7531_H_ -#define _MT7531_H_ - -#include "mt753x.h" - -extern struct mt753x_sw_id mt7531_id; - -#endif /* _MT7531_H_ */ diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x.h b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x.h deleted file mode 100644 index 837a415648..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x.h +++ /dev/null @@ -1,213 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Weijie Gao - */ - -#ifndef _MT753X_H_ -#define _MT753X_H_ - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_SWCONFIG -#include -#endif - -#include "mt753x_vlan.h" - -#define MT753X_DFL_CPU_PORT 6 -#define MT753X_NUM_PHYS 5 - -#define MT753X_DFL_SMI_ADDR 0x1f -#define MT753X_SMI_ADDR_MASK 0x1f - -struct gsw_mt753x; - -enum mt753x_model { - MT7530 = 0x7530, - MT7531 = 0x7531 -}; - -struct mt753x_port_cfg { - struct device_node *np; - int phy_mode; - u32 enabled: 1; - u32 force_link: 1; - u32 speed: 2; - u32 duplex: 1; -}; - -struct mt753x_phy { - struct gsw_mt753x *gsw; - struct net_device netdev; - struct phy_device *phydev; -}; - -struct gsw_mt753x { - u32 id; - - struct device *dev; - struct mii_bus *host_bus; - struct mii_bus *gphy_bus; - struct mutex mii_lock; /* MII access lock */ - u32 smi_addr; - u32 phy_base; - int direct_phy_access; - - enum mt753x_model model; - const char *name; - - struct mt753x_port_cfg port5_cfg; - struct mt753x_port_cfg port6_cfg; - - int phy_status_poll; - struct mt753x_phy phys[MT753X_NUM_PHYS]; - - int phy_link_sts; - - int irq; - int reset_pin; - struct work_struct irq_worker; - -#ifdef CONFIG_SWCONFIG - struct switch_dev swdev; - u32 cpu_port; -#endif - - int global_vlan_enable; - struct mt753x_vlan_entry vlan_entries[MT753X_NUM_VLANS]; - struct mt753x_port_entry port_entries[MT753X_NUM_PORTS]; - - int (*mii_read)(struct gsw_mt753x *gsw, int phy, int reg); - void (*mii_write)(struct gsw_mt753x *gsw, int phy, int reg, u16 val); - - int (*mmd_read)(struct gsw_mt753x *gsw, int addr, int devad, u16 reg); - void (*mmd_write)(struct gsw_mt753x *gsw, int addr, int devad, u16 reg, - u16 val); - - struct list_head list; -}; - -struct chip_rev { - const char *name; - u32 rev; -}; - -struct mt753x_sw_id { - enum mt753x_model model; - int (*detect)(struct gsw_mt753x *gsw, struct chip_rev *crev); - int (*init)(struct gsw_mt753x *gsw); - int (*post_init)(struct gsw_mt753x *gsw); -}; - -extern struct list_head mt753x_devs; - -struct gsw_mt753x *mt753x_get_gsw(u32 id); -struct gsw_mt753x *mt753x_get_first_gsw(void); -void mt753x_put_gsw(void); -void mt753x_lock_gsw(void); - -u32 mt753x_reg_read(struct gsw_mt753x *gsw, u32 reg); -void mt753x_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val); - -int mt753x_mii_read(struct gsw_mt753x *gsw, int phy, int reg); -void mt753x_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val); - -int mt753x_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg); -void mt753x_mmd_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg, - u16 val); - -int mt753x_mmd_ind_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg); -void mt753x_mmd_ind_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg, - u16 val); - -void mt753x_irq_worker(struct work_struct *work); -void mt753x_irq_enable(struct gsw_mt753x *gsw); - -/* MDIO Indirect Access Registers */ -#define MII_MMD_ACC_CTL_REG 0x0d -#define MMD_CMD_S 14 -#define MMD_CMD_M 0xc000 -#define MMD_DEVAD_S 0 -#define MMD_DEVAD_M 0x1f - -/* MMD_CMD: MMD commands */ -#define MMD_ADDR 0 -#define MMD_DATA 1 - -#define MII_MMD_ADDR_DATA_REG 0x0e - -/* Procedure of MT753x Internal Register Access - * - * 1. Internal Register Address - * - * The MT753x has a 16-bit register address and each register is 32-bit. - * This means the lowest two bits are not used as the register address is - * 4-byte aligned. - * - * Rest of the valid bits are divided into two parts: - * Bit 15..6 is the Page address - * Bit 5..2 is the low address - * - * ------------------------------------------------------------------- - * | 15 14 13 12 11 10 9 8 7 6 | 5 4 3 2 | 1 0 | - * |----------------------------------------|---------------|--------| - * | Page Address | Address | Unused | - * ------------------------------------------------------------------- - * - * 2. MDIO access timing - * - * The MT753x uses the following MDIO timing for a single register read - * - * Phase 1: Write Page Address - * ------------------------------------------------------------------- - * | ST | OP | PHY_ADDR | TYPE | RSVD | TA | RSVD | PAGE_ADDR | - * ------------------------------------------------------------------- - * | 01 | 01 | 11111 | 1 | 1111 | xx | 00000 | REG_ADDR[15..6] | - * ------------------------------------------------------------------- - * - * Phase 2: Write low Address & Read low word - * ------------------------------------------------------------------- - * | ST | OP | PHY_ADDR | TYPE | LOW_ADDR | TA | DATA | - * ------------------------------------------------------------------- - * | 01 | 10 | 11111 | 0 | REG_ADDR[5..2] | xx | DATA[15..0] | - * ------------------------------------------------------------------- - * - * Phase 3: Read high word - * ------------------------------------------------------------------- - * | ST | OP | PHY_ADDR | TYPE | RSVD | TA | DATA | - * ------------------------------------------------------------------- - * | 01 | 10 | 11111 | 1 | 0000 | xx | DATA[31..16] | - * ------------------------------------------------------------------- - * - * The MT753x uses the following MDIO timing for a single register write - * - * Phase 1: Write Page Address (The same as read) - * - * Phase 2: Write low Address and low word - * ------------------------------------------------------------------- - * | ST | OP | PHY_ADDR | TYPE | LOW_ADDR | TA | DATA | - * ------------------------------------------------------------------- - * | 01 | 01 | 11111 | 0 | REG_ADDR[5..2] | xx | DATA[15..0] | - * ------------------------------------------------------------------- - * - * Phase 3: write high word - * ------------------------------------------------------------------- - * | ST | OP | PHY_ADDR | TYPE | RSVD | TA | DATA | - * ------------------------------------------------------------------- - * | 01 | 01 | 11111 | 1 | 0000 | xx | DATA[31..16] | - * ------------------------------------------------------------------- - * - */ - -/* Internal Register Address fields */ -#define MT753X_REG_PAGE_ADDR_S 6 -#define MT753X_REG_PAGE_ADDR_M 0xffc0 -#define MT753X_REG_ADDR_S 2 -#define MT753X_REG_ADDR_M 0x3c -#endif /* _MT753X_H_ */ diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_common.c b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_common.c deleted file mode 100644 index 4015ddf125..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_common.c +++ /dev/null @@ -1,90 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Weijie Gao - */ - -#include -#include - -#include "mt753x.h" -#include "mt753x_regs.h" - -void mt753x_irq_enable(struct gsw_mt753x *gsw) -{ - u32 val; - int i; - - /* Record initial PHY link status */ - for (i = 0; i < MT753X_NUM_PHYS; i++) { - val = gsw->mii_read(gsw, i, MII_BMSR); - if (val & BMSR_LSTATUS) - gsw->phy_link_sts |= BIT(i); - } - - val = BIT(MT753X_NUM_PHYS) - 1; - - mt753x_reg_write(gsw, SYS_INT_EN, val); -} - -static void display_port_link_status(struct gsw_mt753x *gsw, u32 port) -{ - u32 pmsr, speed_bits; - const char *speed; - - pmsr = mt753x_reg_read(gsw, PMSR(port)); - - speed_bits = (pmsr & MAC_SPD_STS_M) >> MAC_SPD_STS_S; - - switch (speed_bits) { - case MAC_SPD_10: - speed = "10Mbps"; - break; - case MAC_SPD_100: - speed = "100Mbps"; - break; - case MAC_SPD_1000: - speed = "1Gbps"; - break; - case MAC_SPD_2500: - speed = "2.5Gbps"; - break; - } - - if (pmsr & MAC_LNK_STS) { - dev_info(gsw->dev, "Port %d Link is Up - %s/%s\n", - port, speed, (pmsr & MAC_DPX_STS) ? "Full" : "Half"); - } else { - dev_info(gsw->dev, "Port %d Link is Down\n", port); - } -} - -void mt753x_irq_worker(struct work_struct *work) -{ - struct gsw_mt753x *gsw; - u32 sts, physts, laststs; - int i; - - gsw = container_of(work, struct gsw_mt753x, irq_worker); - - sts = mt753x_reg_read(gsw, SYS_INT_STS); - - /* Check for changed PHY link status */ - for (i = 0; i < MT753X_NUM_PHYS; i++) { - if (!(sts & PHY_LC_INT(i))) - continue; - - laststs = gsw->phy_link_sts & BIT(i); - physts = !!(gsw->mii_read(gsw, i, MII_BMSR) & BMSR_LSTATUS); - physts <<= i; - - if (physts ^ laststs) { - gsw->phy_link_sts ^= BIT(i); - display_port_link_status(gsw, i); - } - } - - mt753x_reg_write(gsw, SYS_INT_STS, sts); - - enable_irq(gsw->irq); -} diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_mdio.c b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_mdio.c deleted file mode 100644 index a3f0c5d3f0..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_mdio.c +++ /dev/null @@ -1,598 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Weijie Gao - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mt753x.h" -#include "mt753x_swconfig.h" -#include "mt753x_regs.h" -#include "mt753x_nl.h" -#include "mt7530.h" -#include "mt7531.h" - -static u32 mt753x_id; -struct list_head mt753x_devs; -static DEFINE_MUTEX(mt753x_devs_lock); - -static struct mt753x_sw_id *mt753x_sw_ids[] = { - &mt7530_id, - &mt7531_id, -}; - -u32 mt753x_reg_read(struct gsw_mt753x *gsw, u32 reg) -{ - u32 high, low; - - mutex_lock(&gsw->host_bus->mdio_lock); - - gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f, - (reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S); - - low = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr, - (reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S); - - high = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr, 0x10); - - mutex_unlock(&gsw->host_bus->mdio_lock); - - return (high << 16) | (low & 0xffff); -} - -void mt753x_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val) -{ - mutex_lock(&gsw->host_bus->mdio_lock); - - gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f, - (reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S); - - gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, - (reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S, val & 0xffff); - - gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x10, val >> 16); - - mutex_unlock(&gsw->host_bus->mdio_lock); -} - -/* Indirect MDIO clause 22/45 access */ -static int mt753x_mii_rw(struct gsw_mt753x *gsw, int phy, int reg, u16 data, - u32 cmd, u32 st) -{ - ktime_t timeout; - u32 val, timeout_us; - int ret = 0; - - timeout_us = 100000; - timeout = ktime_add_us(ktime_get(), timeout_us); - while (1) { - val = mt753x_reg_read(gsw, PHY_IAC); - - if ((val & PHY_ACS_ST) == 0) - break; - - if (ktime_compare(ktime_get(), timeout) > 0) - return -ETIMEDOUT; - } - - val = (st << MDIO_ST_S) | - ((cmd << MDIO_CMD_S) & MDIO_CMD_M) | - ((phy << MDIO_PHY_ADDR_S) & MDIO_PHY_ADDR_M) | - ((reg << MDIO_REG_ADDR_S) & MDIO_REG_ADDR_M); - - if (cmd == MDIO_CMD_WRITE || cmd == MDIO_CMD_ADDR) - val |= data & MDIO_RW_DATA_M; - - mt753x_reg_write(gsw, PHY_IAC, val | PHY_ACS_ST); - - timeout_us = 100000; - timeout = ktime_add_us(ktime_get(), timeout_us); - while (1) { - val = mt753x_reg_read(gsw, PHY_IAC); - - if ((val & PHY_ACS_ST) == 0) - break; - - if (ktime_compare(ktime_get(), timeout) > 0) - return -ETIMEDOUT; - } - - if (cmd == MDIO_CMD_READ || cmd == MDIO_CMD_READ_C45) { - val = mt753x_reg_read(gsw, PHY_IAC); - ret = val & MDIO_RW_DATA_M; - } - - return ret; -} - -int mt753x_mii_read(struct gsw_mt753x *gsw, int phy, int reg) -{ - int val; - - if (phy < MT753X_NUM_PHYS) - phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->mii_lock); - val = mt753x_mii_rw(gsw, phy, reg, 0, MDIO_CMD_READ, MDIO_ST_C22); - mutex_unlock(&gsw->mii_lock); - - return val; -} - -void mt753x_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val) -{ - if (phy < MT753X_NUM_PHYS) - phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->mii_lock); - mt753x_mii_rw(gsw, phy, reg, val, MDIO_CMD_WRITE, MDIO_ST_C22); - mutex_unlock(&gsw->mii_lock); -} - -int mt753x_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg) -{ - int val; - - if (addr < MT753X_NUM_PHYS) - addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->mii_lock); - mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45); - val = mt753x_mii_rw(gsw, addr, devad, 0, MDIO_CMD_READ_C45, - MDIO_ST_C45); - mutex_unlock(&gsw->mii_lock); - - return val; -} - -void mt753x_mmd_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg, - u16 val) -{ - if (addr < MT753X_NUM_PHYS) - addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->mii_lock); - mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45); - mt753x_mii_rw(gsw, addr, devad, val, MDIO_CMD_WRITE, MDIO_ST_C45); - mutex_unlock(&gsw->mii_lock); -} - -int mt753x_mmd_ind_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg) -{ - u16 val; - - if (addr < MT753X_NUM_PHYS) - addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->mii_lock); - - mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG, - (MMD_ADDR << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M), - MDIO_CMD_WRITE, MDIO_ST_C22); - - mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg, - MDIO_CMD_WRITE, MDIO_ST_C22); - - mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG, - (MMD_DATA << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M), - MDIO_CMD_WRITE, MDIO_ST_C22); - - val = mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, 0, - MDIO_CMD_READ, MDIO_ST_C22); - - mutex_unlock(&gsw->mii_lock); - - return val; -} - -void mt753x_mmd_ind_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg, - u16 val) -{ - if (addr < MT753X_NUM_PHYS) - addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK; - - mutex_lock(&gsw->mii_lock); - - mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG, - (MMD_ADDR << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M), - MDIO_CMD_WRITE, MDIO_ST_C22); - - mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg, - MDIO_CMD_WRITE, MDIO_ST_C22); - - mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG, - (MMD_DATA << MMD_CMD_S) | - ((devad << MMD_DEVAD_S) & MMD_DEVAD_M), - MDIO_CMD_WRITE, MDIO_ST_C22); - - mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, val, - MDIO_CMD_WRITE, MDIO_ST_C22); - - mutex_unlock(&gsw->mii_lock); -} - -static inline int mt753x_get_duplex(const struct device_node *np) -{ - return of_property_read_bool(np, "full-duplex"); -} - -static void mt753x_load_port_cfg(struct gsw_mt753x *gsw) -{ - struct device_node *port_np; - struct device_node *fixed_link_node; - struct mt753x_port_cfg *port_cfg; - u32 port; - - for_each_child_of_node(gsw->dev->of_node, port_np) { - if (!of_device_is_compatible(port_np, "mediatek,mt753x-port")) - continue; - - if (!of_device_is_available(port_np)) - continue; - - if (of_property_read_u32(port_np, "reg", &port)) - continue; - - switch (port) { - case 5: - port_cfg = &gsw->port5_cfg; - break; - case 6: - port_cfg = &gsw->port6_cfg; - break; - default: - continue; - } - - if (port_cfg->enabled) { - dev_info(gsw->dev, "duplicated node for port%d\n", - port_cfg->phy_mode); - continue; - } - - port_cfg->np = port_np; - - port_cfg->phy_mode = of_get_phy_mode(port_np); - if (port_cfg->phy_mode < 0) { - dev_info(gsw->dev, "incorrect phy-mode %d\n", port); - continue; - } - - fixed_link_node = of_get_child_by_name(port_np, "fixed-link"); - if (fixed_link_node) { - u32 speed; - - port_cfg->force_link = 1; - port_cfg->duplex = mt753x_get_duplex(fixed_link_node); - - if (of_property_read_u32(fixed_link_node, "speed", - &speed)) { - speed = 0; - continue; - } - - of_node_put(fixed_link_node); - - switch (speed) { - case 10: - port_cfg->speed = MAC_SPD_10; - break; - case 100: - port_cfg->speed = MAC_SPD_100; - break; - case 1000: - port_cfg->speed = MAC_SPD_1000; - break; - case 2500: - port_cfg->speed = MAC_SPD_2500; - break; - default: - dev_info(gsw->dev, "incorrect speed %d\n", - speed); - continue; - } - } - - port_cfg->enabled = 1; - } -} - -static void mt753x_add_gsw(struct gsw_mt753x *gsw) -{ - mutex_lock(&mt753x_devs_lock); - gsw->id = mt753x_id++; - INIT_LIST_HEAD(&gsw->list); - list_add_tail(&gsw->list, &mt753x_devs); - mutex_unlock(&mt753x_devs_lock); -} - -static void mt753x_remove_gsw(struct gsw_mt753x *gsw) -{ - mutex_lock(&mt753x_devs_lock); - list_del(&gsw->list); - mutex_unlock(&mt753x_devs_lock); -} - - -struct gsw_mt753x *mt753x_get_gsw(u32 id) -{ - struct gsw_mt753x *dev; - - mutex_lock(&mt753x_devs_lock); - - list_for_each_entry(dev, &mt753x_devs, list) { - if (dev->id == id) - return dev; - } - - mutex_unlock(&mt753x_devs_lock); - - return NULL; -} - -struct gsw_mt753x *mt753x_get_first_gsw(void) -{ - struct gsw_mt753x *dev; - - mutex_lock(&mt753x_devs_lock); - - list_for_each_entry(dev, &mt753x_devs, list) - return dev; - - mutex_unlock(&mt753x_devs_lock); - - return NULL; -} - -void mt753x_put_gsw(void) -{ - mutex_unlock(&mt753x_devs_lock); -} - -void mt753x_lock_gsw(void) -{ - mutex_lock(&mt753x_devs_lock); -} - -static int mt753x_hw_reset(struct gsw_mt753x *gsw) -{ - struct device_node *np = gsw->dev->of_node; - struct reset_control *rstc; - int mcm; - int ret = -EINVAL; - - mcm = of_property_read_bool(np, "mediatek,mcm"); - if (mcm) { - rstc = devm_reset_control_get(gsw->dev, "mcm"); - ret = IS_ERR(rstc); - if (IS_ERR(rstc)) { - dev_err(gsw->dev, "Missing reset ctrl of switch\n"); - return ret; - } - - reset_control_assert(rstc); - msleep(30); - reset_control_deassert(rstc); - - gsw->reset_pin = -1; - return 0; - } - - gsw->reset_pin = of_get_named_gpio(np, "reset-gpios", 0); - if (gsw->reset_pin < 0) { - dev_err(gsw->dev, "Missing reset pin of switch\n"); - return ret; - } - - ret = devm_gpio_request(gsw->dev, gsw->reset_pin, "mt753x-reset"); - if (ret) { - dev_info(gsw->dev, "Failed to request gpio %d\n", - gsw->reset_pin); - return ret; - } - - gpio_direction_output(gsw->reset_pin, 0); - msleep(30); - gpio_set_value(gsw->reset_pin, 1); - msleep(500); - - return 0; -} - -static irqreturn_t mt753x_irq_handler(int irq, void *dev) -{ - struct gsw_mt753x *gsw = dev; - - disable_irq_nosync(gsw->irq); - - schedule_work(&gsw->irq_worker); - - return IRQ_HANDLED; -} - -static int mt753x_probe(struct platform_device *pdev) -{ - struct gsw_mt753x *gsw; - struct mt753x_sw_id *sw; - struct device_node *np = pdev->dev.of_node; - struct device_node *mdio; - struct mii_bus *mdio_bus; - int ret = -EINVAL; - struct chip_rev rev; - struct mt753x_mapping *map; - int i; - - mdio = of_parse_phandle(np, "mediatek,mdio", 0); - if (!mdio) - return -EINVAL; - - mdio_bus = of_mdio_find_bus(mdio); - if (!mdio_bus) - return -EPROBE_DEFER; - - gsw = devm_kzalloc(&pdev->dev, sizeof(struct gsw_mt753x), GFP_KERNEL); - if (!gsw) - return -ENOMEM; - - gsw->host_bus = mdio_bus; - gsw->dev = &pdev->dev; - mutex_init(&gsw->mii_lock); - - /* Switch hard reset */ - if (mt753x_hw_reset(gsw)) - goto fail; - - /* Fetch the SMI address dirst */ - if (of_property_read_u32(np, "mediatek,smi-addr", &gsw->smi_addr)) - gsw->smi_addr = MT753X_DFL_SMI_ADDR; - - /* Get LAN/WAN port mapping */ - map = mt753x_find_mapping(np); - if (map) { - mt753x_apply_mapping(gsw, map); - gsw->global_vlan_enable = 1; - dev_info(gsw->dev, "LAN/WAN VLAN setting=%s\n", map->name); - } - - /* Load MAC port configurations */ - mt753x_load_port_cfg(gsw); - - /* Check for valid switch and then initialize */ - for (i = 0; i < ARRAY_SIZE(mt753x_sw_ids); i++) { - if (!mt753x_sw_ids[i]->detect(gsw, &rev)) { - sw = mt753x_sw_ids[i]; - - gsw->name = rev.name; - gsw->model = sw->model; - - dev_info(gsw->dev, "Switch is MediaTek %s rev %d", - gsw->name, rev.rev); - - /* Initialize the switch */ - ret = sw->init(gsw); - if (ret) - goto fail; - - break; - } - } - - if (i >= ARRAY_SIZE(mt753x_sw_ids)) { - dev_err(gsw->dev, "No mt753x switch found\n"); - goto fail; - } - - gsw->irq = platform_get_irq(pdev, 0); - if (gsw->irq >= 0) { - ret = devm_request_irq(gsw->dev, gsw->irq, mt753x_irq_handler, - 0, dev_name(gsw->dev), gsw); - if (ret) { - dev_err(gsw->dev, "Failed to request irq %d\n", - gsw->irq); - goto fail; - } - - INIT_WORK(&gsw->irq_worker, mt753x_irq_worker); - } - - platform_set_drvdata(pdev, gsw); - - gsw->phy_status_poll = of_property_read_bool(gsw->dev->of_node, - "mediatek,phy-poll"); - - mt753x_add_gsw(gsw); - - mt753x_swconfig_init(gsw); - - if (sw->post_init) - sw->post_init(gsw); - - if (gsw->irq >= 0) - mt753x_irq_enable(gsw); - - return 0; - -fail: - devm_kfree(&pdev->dev, gsw); - - return ret; -} - -static int mt753x_remove(struct platform_device *pdev) -{ - struct gsw_mt753x *gsw = platform_get_drvdata(pdev); - - if (gsw->irq >= 0) - cancel_work_sync(&gsw->irq_worker); - - if (gsw->reset_pin >= 0) - devm_gpio_free(&pdev->dev, gsw->reset_pin); - -#ifdef CONFIG_SWCONFIG - mt753x_swconfig_destroy(gsw); -#endif - - mt753x_remove_gsw(gsw); - - platform_set_drvdata(pdev, NULL); - - return 0; -} - -static const struct of_device_id mt753x_ids[] = { - { .compatible = "mediatek,mt753x" }, - { }, -}; - -MODULE_DEVICE_TABLE(of, mt753x_ids); - -static struct platform_driver mt753x_driver = { - .probe = mt753x_probe, - .remove = mt753x_remove, - .driver = { - .name = "mt753x", - .of_match_table = mt753x_ids, - }, -}; - -static int __init mt753x_init(void) -{ - int ret; - - INIT_LIST_HEAD(&mt753x_devs); - ret = platform_driver_register(&mt753x_driver); - - mt753x_nl_init(); - - return ret; -} -module_init(mt753x_init); - -static void __exit mt753x_exit(void) -{ - mt753x_nl_exit(); - - platform_driver_unregister(&mt753x_driver); -} -module_exit(mt753x_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Weijie Gao "); -MODULE_DESCRIPTION("Driver for MediaTek MT753x Gigabit Switch"); diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_nl.c b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_nl.c deleted file mode 100644 index 54916243e7..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_nl.c +++ /dev/null @@ -1,380 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Sirui Zhao - */ - -#include -#include -#include -#include -#include - -#include "mt753x.h" -#include "mt753x_nl.h" - -struct mt753x_nl_cmd_item { - enum mt753x_cmd cmd; - bool require_dev; - int (*process)(struct genl_info *info, struct gsw_mt753x *gsw); - u32 nr_required_attrs; - const enum mt753x_attr *required_attrs; -}; - -static int mt753x_nl_response(struct sk_buff *skb, struct genl_info *info); - -static const struct nla_policy mt753x_nl_cmd_policy[] = { - [MT753X_ATTR_TYPE_MESG] = { .type = NLA_STRING }, - [MT753X_ATTR_TYPE_PHY] = { .type = NLA_S32 }, - [MT753X_ATTR_TYPE_REG] = { .type = NLA_S32 }, - [MT753X_ATTR_TYPE_VAL] = { .type = NLA_S32 }, - [MT753X_ATTR_TYPE_DEV_NAME] = { .type = NLA_S32 }, - [MT753X_ATTR_TYPE_DEV_ID] = { .type = NLA_S32 }, - [MT753X_ATTR_TYPE_DEVAD] = { .type = NLA_S32 }, -}; - -static const struct genl_ops mt753x_nl_ops[] = { - { - .cmd = MT753X_CMD_REQUEST, - .doit = mt753x_nl_response, - .policy = mt753x_nl_cmd_policy, - .flags = GENL_ADMIN_PERM, - }, { - .cmd = MT753X_CMD_READ, - .doit = mt753x_nl_response, - .policy = mt753x_nl_cmd_policy, - .flags = GENL_ADMIN_PERM, - }, { - .cmd = MT753X_CMD_WRITE, - .doit = mt753x_nl_response, - .policy = mt753x_nl_cmd_policy, - .flags = GENL_ADMIN_PERM, - }, -}; - -static struct genl_family mt753x_nl_family = { - .name = MT753X_GENL_NAME, - .version = MT753X_GENL_VERSION, - .maxattr = MT753X_NR_ATTR_TYPE, - .ops = mt753x_nl_ops, - .n_ops = ARRAY_SIZE(mt753x_nl_ops), -}; - -static int mt753x_nl_list_devs(char *buff, int size) -{ - struct gsw_mt753x *gsw; - int len, total = 0; - char buf[80]; - - memset(buff, 0, size); - - mt753x_lock_gsw(); - - list_for_each_entry(gsw, &mt753x_devs, list) { - len = snprintf(buf, sizeof(buf), - "id: %d, model: %s, node: %s\n", - gsw->id, gsw->name, gsw->dev->of_node->name); - strncat(buff, buf, size - total); - total += len; - } - - mt753x_put_gsw(); - - return total; -} - -static int mt753x_nl_prepare_reply(struct genl_info *info, u8 cmd, - struct sk_buff **skbp) -{ - struct sk_buff *msg; - void *reply; - - if (!info) - return -EINVAL; - - msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); - if (!msg) - return -ENOMEM; - - /* Construct send-back message header */ - reply = genlmsg_put(msg, info->snd_portid, info->snd_seq, - &mt753x_nl_family, 0, cmd); - if (!reply) { - nlmsg_free(msg); - return -EINVAL; - } - - *skbp = msg; - return 0; -} - -static int mt753x_nl_send_reply(struct sk_buff *skb, struct genl_info *info) -{ - struct genlmsghdr *genlhdr = nlmsg_data(nlmsg_hdr(skb)); - void *reply = genlmsg_data(genlhdr); - - /* Finalize a generic netlink message (update message header) */ - genlmsg_end(skb, reply); - - /* reply to a request */ - return genlmsg_reply(skb, info); -} - -static s32 mt753x_nl_get_s32(struct genl_info *info, enum mt753x_attr attr, - s32 defval) -{ - struct nlattr *na; - - na = info->attrs[attr]; - if (na) - return nla_get_s32(na); - - return defval; -} - -static int mt753x_nl_get_u32(struct genl_info *info, enum mt753x_attr attr, - u32 *val) -{ - struct nlattr *na; - - na = info->attrs[attr]; - if (na) { - *val = nla_get_u32(na); - return 0; - } - - return -1; -} - -static struct gsw_mt753x *mt753x_nl_parse_find_gsw(struct genl_info *info) -{ - struct gsw_mt753x *gsw; - struct nlattr *na; - int gsw_id; - - na = info->attrs[MT753X_ATTR_TYPE_DEV_ID]; - if (na) { - gsw_id = nla_get_s32(na); - if (gsw_id >= 0) - gsw = mt753x_get_gsw(gsw_id); - else - gsw = mt753x_get_first_gsw(); - } else { - gsw = mt753x_get_first_gsw(); - } - - return gsw; -} - -static int mt753x_nl_get_swdevs(struct genl_info *info, struct gsw_mt753x *gsw) -{ - struct sk_buff *rep_skb = NULL; - char dev_info[512]; - int ret; - - ret = mt753x_nl_list_devs(dev_info, sizeof(dev_info)); - if (!ret) { - pr_info("No switch registered\n"); - return -EINVAL; - } - - ret = mt753x_nl_prepare_reply(info, MT753X_CMD_REPLY, &rep_skb); - if (ret < 0) - goto err; - - ret = nla_put_string(rep_skb, MT753X_ATTR_TYPE_MESG, dev_info); - if (ret < 0) - goto err; - - return mt753x_nl_send_reply(rep_skb, info); - -err: - if (rep_skb) - nlmsg_free(rep_skb); - - return ret; -} - -static int mt753x_nl_reply_read(struct genl_info *info, struct gsw_mt753x *gsw) -{ - struct sk_buff *rep_skb = NULL; - s32 phy, devad, reg; - int value; - int ret = 0; - - phy = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_PHY, -1); - devad = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_DEVAD, -1); - reg = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_REG, -1); - - if (reg < 0) - goto err; - - ret = mt753x_nl_prepare_reply(info, MT753X_CMD_READ, &rep_skb); - if (ret < 0) - goto err; - - if (phy >= 0) { - if (devad < 0) - value = gsw->mii_read(gsw, phy, reg); - else - value = gsw->mmd_read(gsw, phy, devad, reg); - } else { - value = mt753x_reg_read(gsw, reg); - } - - ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_REG, reg); - if (ret < 0) - goto err; - - ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_VAL, value); - if (ret < 0) - goto err; - - return mt753x_nl_send_reply(rep_skb, info); - -err: - if (rep_skb) - nlmsg_free(rep_skb); - - return ret; -} - -static int mt753x_nl_reply_write(struct genl_info *info, struct gsw_mt753x *gsw) -{ - struct sk_buff *rep_skb = NULL; - s32 phy, devad, reg; - u32 value; - int ret = 0; - - phy = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_PHY, -1); - devad = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_DEVAD, -1); - reg = mt753x_nl_get_s32(info, MT753X_ATTR_TYPE_REG, -1); - - if (mt753x_nl_get_u32(info, MT753X_ATTR_TYPE_VAL, &value)) - goto err; - - if (reg < 0) - goto err; - - ret = mt753x_nl_prepare_reply(info, MT753X_CMD_WRITE, &rep_skb); - if (ret < 0) - goto err; - - if (phy >= 0) { - if (devad < 0) - gsw->mii_write(gsw, phy, reg, value); - else - gsw->mmd_write(gsw, phy, devad, reg, value); - } else { - mt753x_reg_write(gsw, reg, value); - } - - ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_REG, reg); - if (ret < 0) - goto err; - - ret = nla_put_s32(rep_skb, MT753X_ATTR_TYPE_VAL, value); - if (ret < 0) - goto err; - - return mt753x_nl_send_reply(rep_skb, info); - -err: - if (rep_skb) - nlmsg_free(rep_skb); - - return ret; -} - -static const enum mt753x_attr mt753x_nl_cmd_read_attrs[] = { - MT753X_ATTR_TYPE_REG -}; - -static const enum mt753x_attr mt753x_nl_cmd_write_attrs[] = { - MT753X_ATTR_TYPE_REG, - MT753X_ATTR_TYPE_VAL -}; - -static const struct mt753x_nl_cmd_item mt753x_nl_cmds[] = { - { - .cmd = MT753X_CMD_REQUEST, - .require_dev = false, - .process = mt753x_nl_get_swdevs - }, { - .cmd = MT753X_CMD_READ, - .require_dev = true, - .process = mt753x_nl_reply_read, - .required_attrs = mt753x_nl_cmd_read_attrs, - .nr_required_attrs = ARRAY_SIZE(mt753x_nl_cmd_read_attrs), - }, { - .cmd = MT753X_CMD_WRITE, - .require_dev = true, - .process = mt753x_nl_reply_write, - .required_attrs = mt753x_nl_cmd_write_attrs, - .nr_required_attrs = ARRAY_SIZE(mt753x_nl_cmd_write_attrs), - } -}; - -static int mt753x_nl_response(struct sk_buff *skb, struct genl_info *info) -{ - struct genlmsghdr *hdr = nlmsg_data(info->nlhdr); - const struct mt753x_nl_cmd_item *cmditem = NULL; - struct gsw_mt753x *gsw = NULL; - u32 sat_req_attrs = 0; - int i, ret; - - for (i = 0; i < ARRAY_SIZE(mt753x_nl_cmds); i++) { - if (hdr->cmd == mt753x_nl_cmds[i].cmd) { - cmditem = &mt753x_nl_cmds[i]; - break; - } - } - - if (!cmditem) { - pr_info("mt753x-nl: unknown cmd %u\n", hdr->cmd); - return -EINVAL; - } - - for (i = 0; i < cmditem->nr_required_attrs; i++) { - if (info->attrs[cmditem->required_attrs[i]]) - sat_req_attrs++; - } - - if (sat_req_attrs != cmditem->nr_required_attrs) { - pr_info("mt753x-nl: missing required attr(s) for cmd %u\n", - hdr->cmd); - return -EINVAL; - } - - if (cmditem->require_dev) { - gsw = mt753x_nl_parse_find_gsw(info); - if (!gsw) { - pr_info("mt753x-nl: failed to find switch dev\n"); - return -EINVAL; - } - } - - ret = cmditem->process(info, gsw); - - mt753x_put_gsw(); - - return ret; -} - -int __init mt753x_nl_init(void) -{ - int ret; - - ret = genl_register_family(&mt753x_nl_family); - if (ret) { - pr_info("mt753x-nl: genl_register_family_with_ops failed\n"); - return ret; - } - - return 0; -} - -void __exit mt753x_nl_exit(void) -{ - genl_unregister_family(&mt753x_nl_family); -} diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_nl.h b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_nl.h deleted file mode 100644 index 85dc9e791a..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_nl.h +++ /dev/null @@ -1,43 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Sirui Zhao - */ - -#ifndef _MT753X_NL_H_ -#define _MT753X_NL_H_ - -#define MT753X_GENL_NAME "mt753x" -#define MT753X_GENL_VERSION 0x1 - -enum mt753x_cmd { - MT753X_CMD_UNSPEC = 0, - MT753X_CMD_REQUEST, - MT753X_CMD_REPLY, - MT753X_CMD_READ, - MT753X_CMD_WRITE, - - __MT753X_CMD_MAX, -}; - -enum mt753x_attr { - MT753X_ATTR_TYPE_UNSPEC = 0, - MT753X_ATTR_TYPE_MESG, - MT753X_ATTR_TYPE_PHY, - MT753X_ATTR_TYPE_DEVAD, - MT753X_ATTR_TYPE_REG, - MT753X_ATTR_TYPE_VAL, - MT753X_ATTR_TYPE_DEV_NAME, - MT753X_ATTR_TYPE_DEV_ID, - - __MT753X_ATTR_TYPE_MAX, -}; - -#define MT753X_NR_ATTR_TYPE (__MT753X_ATTR_TYPE_MAX - 1) - -#ifdef __KERNEL__ -int __init mt753x_nl_init(void); -void __exit mt753x_nl_exit(void); -#endif /* __KERNEL__ */ - -#endif /* _MT753X_NL_H_ */ diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_regs.h b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_regs.h deleted file mode 100644 index 3f23ae200e..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_regs.h +++ /dev/null @@ -1,294 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Weijie Gao - */ - -#ifndef _MT753X_REGS_H_ -#define _MT753X_REGS_H_ - -#include - -/* Values of Egress TAG Control */ -#define ETAG_CTRL_UNTAG 0 -#define ETAG_CTRL_TAG 2 -#define ETAG_CTRL_SWAP 1 -#define ETAG_CTRL_STACK 3 - -#define VTCR 0x90 -#define VAWD1 0x94 -#define VAWD2 0x98 - -/* Fields of VTCR */ -#define VTCR_BUSY BIT(31) -#define IDX_INVLD BIT(16) -#define VTCR_FUNC_S 12 -#define VTCR_FUNC_M 0xf000 -#define VTCR_VID_S 0 -#define VTCR_VID_M 0xfff - -/* Values of VTCR_FUNC */ -#define VTCR_READ_VLAN_ENTRY 0 -#define VTCR_WRITE_VLAN_ENTRY 1 -#define VTCR_INVD_VLAN_ENTRY 2 -#define VTCR_ENABLE_VLAN_ENTRY 3 -#define VTCR_READ_ACL_ENTRY 4 -#define VTCR_WRITE_ACL_ENTRY 5 -#define VTCR_READ_TRTCM_TABLE 6 -#define VTCR_WRITE_TRTCM_TABLE 7 -#define VTCR_READ_ACL_MASK_ENTRY 8 -#define VTCR_WRITE_ACL_MASK_ENTRY 9 -#define VTCR_READ_ACL_RULE_ENTRY 10 -#define VTCR_WRITE_ACL_RULE_ENTRY 11 -#define VTCR_READ_ACL_RATE_ENTRY 12 -#define VTCR_WRITE_ACL_RATE_ENTRY 13 - -/* VLAN entry fields */ -/* VAWD1 */ -#define PORT_STAG BIT(31) -#define IVL_MAC BIT(30) -#define EG_CON BIT(29) -#define VTAG_EN BIT(28) -#define COPY_PRI BIT(27) -#define USER_PRI_S 24 -#define USER_PRI_M 0x7000000 -#define PORT_MEM_S 16 -#define PORT_MEM_M 0xff0000 -#define S_TAG1_S 4 -#define S_TAG1_M 0xfff0 -#define FID_S 1 -#define FID_M 0x0e -#define VENTRY_VALID BIT(0) - -/* VAWD2 */ -#define S_TAG2_S 16 -#define S_TAG2_M 0xffff0000 -#define PORT_ETAG_S(p) ((p) * 2) -#define PORT_ETAG_M 0x03 - -#define PORT_CTRL_BASE 0x2000 -#define PORT_CTRL_PORT_OFFSET 0x100 -#define PORT_CTRL_REG(p, r) (PORT_CTRL_BASE + \ - (p) * PORT_CTRL_PORT_OFFSET + (r)) -#define CKGCR(p) PORT_CTRL_REG(p, 0x00) -#define PCR(p) PORT_CTRL_REG(p, 0x04) -#define PIC(p) PORT_CTRL_REG(p, 0x08) -#define PSC(p) PORT_CTRL_REG(p, 0x0c) -#define PVC(p) PORT_CTRL_REG(p, 0x10) -#define PPBV1(p) PORT_CTRL_REG(p, 0x14) -#define PPBV2(p) PORT_CTRL_REG(p, 0x18) -#define BSR(p) PORT_CTRL_REG(p, 0x1c) -#define STAG01 PORT_CTRL_REG(p, 0x20) -#define STAG23 PORT_CTRL_REG(p, 0x24) -#define STAG45 PORT_CTRL_REG(p, 0x28) -#define STAG67 PORT_CTRL_REG(p, 0x2c) - -#define PPBV(p, g) (PPBV1(p) + ((g) / 2) * 4) - -/* Fields of PCR */ -#define MLDV2_EN BIT(30) -#define EG_TAG_S 28 -#define EG_TAG_M 0x30000000 -#define PORT_PRI_S 24 -#define PORT_PRI_M 0x7000000 -#define PORT_MATRIX_S 16 -#define PORT_MATRIX_M 0xff0000 -#define UP2DSCP_EN BIT(12) -#define UP2TAG_EN BIT(11) -#define ACL_EN BIT(10) -#define PORT_TX_MIR BIT(9) -#define PORT_RX_MIR BIT(8) -#define ACL_MIR BIT(7) -#define MIS_PORT_FW_S 4 -#define MIS_PORT_FW_M 0x70 -#define VLAN_MIS BIT(2) -#define PORT_VLAN_S 0 -#define PORT_VLAN_M 0x03 - -/* Values of PORT_VLAN */ -#define PORT_MATRIX_MODE 0 -#define FALLBACK_MODE 1 -#define CHECK_MODE 2 -#define SECURITY_MODE 3 - -/* Fields of PVC */ -#define STAG_VPID_S 16 -#define STAG_VPID_M 0xffff0000 -#define DIS_PVID BIT(15) -#define FORCE_PVID BIT(14) -#define PT_VPM BIT(12) -#define PT_OPTION BIT(11) -#define PVC_EG_TAG_S 8 -#define PVC_EG_TAG_M 0x700 -#define VLAN_ATTR_S 6 -#define VLAN_ATTR_M 0xc0 -#define PVC_PORT_STAG BIT(5) -#define BC_LKYV_EN BIT(4) -#define MC_LKYV_EN BIT(3) -#define UC_LKYV_EN BIT(2) -#define ACC_FRM_S 0 -#define ACC_FRM_M 0x03 - -/* Values of VLAN_ATTR */ -#define VA_USER_PORT 0 -#define VA_STACK_PORT 1 -#define VA_TRANSLATION_PORT 2 -#define VA_TRANSPARENT_PORT 3 - -/* Fields of PPBV */ -#define GRP_PORT_PRI_S(g) (((g) % 2) * 16 + 13) -#define GRP_PORT_PRI_M 0x07 -#define GRP_PORT_VID_S(g) (((g) % 2) * 16) -#define GRP_PORT_VID_M 0xfff - -#define PORT_MAC_CTRL_BASE 0x3000 -#define PORT_MAC_CTRL_PORT_OFFSET 0x100 -#define PORT_MAC_CTRL_REG(p, r) (PORT_MAC_CTRL_BASE + \ - (p) * PORT_MAC_CTRL_PORT_OFFSET + (r)) -#define PMCR(p) PORT_MAC_CTRL_REG(p, 0x00) -#define PMEEECR(p) PORT_MAC_CTRL_REG(p, 0x04) -#define PMSR(p) PORT_MAC_CTRL_REG(p, 0x08) -#define PINT_EN(p) PORT_MAC_CTRL_REG(p, 0x10) -#define PINT_STS(p) PORT_MAC_CTRL_REG(p, 0x14) - -#define GMACCR (PORT_MAC_CTRL_BASE + 0xe0) -#define TXCRC_EN BIT(19) -#define RXCRC_EN BIT(18) -#define PRMBL_LMT_EN BIT(17) -#define MTCC_LMT_S 9 -#define MTCC_LMT_M 0x1e00 -#define MAX_RX_JUMBO_S 2 -#define MAX_RX_JUMBO_M 0x3c -#define MAX_RX_PKT_LEN_S 0 -#define MAX_RX_PKT_LEN_M 0x3 - -/* Values of MAX_RX_PKT_LEN */ -#define RX_PKT_LEN_1518 0 -#define RX_PKT_LEN_1536 1 -#define RX_PKT_LEN_1522 2 -#define RX_PKT_LEN_MAX_JUMBO 3 - -/* Fields of PMCR */ -#define IPG_CFG_S 18 -#define IPG_CFG_M 0xc0000 -#define EXT_PHY BIT(17) -#define MAC_MODE BIT(16) -#define MAC_TX_EN BIT(14) -#define MAC_RX_EN BIT(13) -#define MAC_PRE BIT(11) -#define BKOFF_EN BIT(9) -#define BACKPR_EN BIT(8) -#define FORCE_EEE1G BIT(7) -#define FORCE_EEE1000 BIT(6) -#define FORCE_RX_FC BIT(5) -#define FORCE_TX_FC BIT(4) -#define FORCE_SPD_S 2 -#define FORCE_SPD_M 0x0c -#define FORCE_DPX BIT(1) -#define FORCE_LINK BIT(0) - -/* Fields of PMSR */ -#define EEE1G_STS BIT(7) -#define EEE100_STS BIT(6) -#define RX_FC_STS BIT(5) -#define TX_FC_STS BIT(4) -#define MAC_SPD_STS_S 2 -#define MAC_SPD_STS_M 0x0c -#define MAC_DPX_STS BIT(1) -#define MAC_LNK_STS BIT(0) - -/* Values of MAC_SPD_STS */ -#define MAC_SPD_10 0 -#define MAC_SPD_100 1 -#define MAC_SPD_1000 2 -#define MAC_SPD_2500 3 - -/* Values of IPG_CFG */ -#define IPG_96BIT 0 -#define IPG_96BIT_WITH_SHORT_IPG 1 -#define IPG_64BIT 2 - -#define MIB_COUNTER_BASE 0x4000 -#define MIB_COUNTER_PORT_OFFSET 0x100 -#define MIB_COUNTER_REG(p, r) (MIB_COUNTER_BASE + \ - (p) * MIB_COUNTER_PORT_OFFSET + (r)) -#define STATS_TDPC 0x00 -#define STATS_TCRC 0x04 -#define STATS_TUPC 0x08 -#define STATS_TMPC 0x0C -#define STATS_TBPC 0x10 -#define STATS_TCEC 0x14 -#define STATS_TSCEC 0x18 -#define STATS_TMCEC 0x1C -#define STATS_TDEC 0x20 -#define STATS_TLCEC 0x24 -#define STATS_TXCEC 0x28 -#define STATS_TPPC 0x2C -#define STATS_TL64PC 0x30 -#define STATS_TL65PC 0x34 -#define STATS_TL128PC 0x38 -#define STATS_TL256PC 0x3C -#define STATS_TL512PC 0x40 -#define STATS_TL1024PC 0x44 -#define STATS_TOC 0x48 -#define STATS_RDPC 0x60 -#define STATS_RFPC 0x64 -#define STATS_RUPC 0x68 -#define STATS_RMPC 0x6C -#define STATS_RBPC 0x70 -#define STATS_RAEPC 0x74 -#define STATS_RCEPC 0x78 -#define STATS_RUSPC 0x7C -#define STATS_RFEPC 0x80 -#define STATS_ROSPC 0x84 -#define STATS_RJEPC 0x88 -#define STATS_RPPC 0x8C -#define STATS_RL64PC 0x90 -#define STATS_RL65PC 0x94 -#define STATS_RL128PC 0x98 -#define STATS_RL256PC 0x9C -#define STATS_RL512PC 0xA0 -#define STATS_RL1024PC 0xA4 -#define STATS_ROC 0xA8 -#define STATS_RDPC_CTRL 0xB0 -#define STATS_RDPC_ING 0xB4 -#define STATS_RDPC_ARL 0xB8 - -#define SYS_CTRL 0x7000 -#define SW_PHY_RST BIT(2) -#define SW_SYS_RST BIT(1) -#define SW_REG_RST BIT(0) - -#define SYS_INT_EN 0x7008 -#define SYS_INT_STS 0x700c -#define MAC_PC_INT BIT(16) -#define PHY_INT(p) BIT((p) + 8) -#define PHY_LC_INT(p) BIT(p) - -#define PHY_IAC 0x701c -#define PHY_ACS_ST BIT(31) -#define MDIO_REG_ADDR_S 25 -#define MDIO_REG_ADDR_M 0x3e000000 -#define MDIO_PHY_ADDR_S 20 -#define MDIO_PHY_ADDR_M 0x1f00000 -#define MDIO_CMD_S 18 -#define MDIO_CMD_M 0xc0000 -#define MDIO_ST_S 16 -#define MDIO_ST_M 0x30000 -#define MDIO_RW_DATA_S 0 -#define MDIO_RW_DATA_M 0xffff - -/* MDIO_CMD: MDIO commands */ -#define MDIO_CMD_ADDR 0 -#define MDIO_CMD_WRITE 1 -#define MDIO_CMD_READ 2 -#define MDIO_CMD_READ_C45 3 - -/* MDIO_ST: MDIO start field */ -#define MDIO_ST_C45 0 -#define MDIO_ST_C22 1 - -#define HWSTRAP 0x7800 -#define MHWSTRAP 0x7804 - -#endif /* _MT753X_REGS_H_ */ diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_swconfig.c b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_swconfig.c deleted file mode 100644 index 342ad576b2..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_swconfig.c +++ /dev/null @@ -1,510 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Weijie Gao - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mt753x.h" -#include "mt753x_swconfig.h" -#include "mt753x_regs.h" - -#define MT753X_PORT_MIB_TXB_ID 18 /* TxByte */ -#define MT753X_PORT_MIB_RXB_ID 37 /* RxByte */ - -#define MIB_DESC(_s, _o, _n) \ - { \ - .size = (_s), \ - .offset = (_o), \ - .name = (_n), \ - } - -struct mt753x_mib_desc { - unsigned int size; - unsigned int offset; - const char *name; -}; - -static const struct mt753x_mib_desc mt753x_mibs[] = { - MIB_DESC(1, STATS_TDPC, "TxDrop"), - MIB_DESC(1, STATS_TCRC, "TxCRC"), - MIB_DESC(1, STATS_TUPC, "TxUni"), - MIB_DESC(1, STATS_TMPC, "TxMulti"), - MIB_DESC(1, STATS_TBPC, "TxBroad"), - MIB_DESC(1, STATS_TCEC, "TxCollision"), - MIB_DESC(1, STATS_TSCEC, "TxSingleCol"), - MIB_DESC(1, STATS_TMCEC, "TxMultiCol"), - MIB_DESC(1, STATS_TDEC, "TxDefer"), - MIB_DESC(1, STATS_TLCEC, "TxLateCol"), - MIB_DESC(1, STATS_TXCEC, "TxExcCol"), - MIB_DESC(1, STATS_TPPC, "TxPause"), - MIB_DESC(1, STATS_TL64PC, "Tx64Byte"), - MIB_DESC(1, STATS_TL65PC, "Tx65Byte"), - MIB_DESC(1, STATS_TL128PC, "Tx128Byte"), - MIB_DESC(1, STATS_TL256PC, "Tx256Byte"), - MIB_DESC(1, STATS_TL512PC, "Tx512Byte"), - MIB_DESC(1, STATS_TL1024PC, "Tx1024Byte"), - MIB_DESC(2, STATS_TOC, "TxByte"), - MIB_DESC(1, STATS_RDPC, "RxDrop"), - MIB_DESC(1, STATS_RFPC, "RxFiltered"), - MIB_DESC(1, STATS_RUPC, "RxUni"), - MIB_DESC(1, STATS_RMPC, "RxMulti"), - MIB_DESC(1, STATS_RBPC, "RxBroad"), - MIB_DESC(1, STATS_RAEPC, "RxAlignErr"), - MIB_DESC(1, STATS_RCEPC, "RxCRC"), - MIB_DESC(1, STATS_RUSPC, "RxUnderSize"), - MIB_DESC(1, STATS_RFEPC, "RxFragment"), - MIB_DESC(1, STATS_ROSPC, "RxOverSize"), - MIB_DESC(1, STATS_RJEPC, "RxJabber"), - MIB_DESC(1, STATS_RPPC, "RxPause"), - MIB_DESC(1, STATS_RL64PC, "Rx64Byte"), - MIB_DESC(1, STATS_RL65PC, "Rx65Byte"), - MIB_DESC(1, STATS_RL128PC, "Rx128Byte"), - MIB_DESC(1, STATS_RL256PC, "Rx256Byte"), - MIB_DESC(1, STATS_RL512PC, "Rx512Byte"), - MIB_DESC(1, STATS_RL1024PC, "Rx1024Byte"), - MIB_DESC(2, STATS_ROC, "RxByte"), - MIB_DESC(1, STATS_RDPC_CTRL, "RxCtrlDrop"), - MIB_DESC(1, STATS_RDPC_ING, "RxIngDrop"), - MIB_DESC(1, STATS_RDPC_ARL, "RxARLDrop") -}; - -enum { - /* Global attributes. */ - MT753X_ATTR_ENABLE_VLAN, -}; - -static int mt753x_get_vlan_enable(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - val->value.i = gsw->global_vlan_enable; - - return 0; -} - -static int mt753x_set_vlan_enable(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - gsw->global_vlan_enable = val->value.i != 0; - - return 0; -} - -static int mt753x_get_port_pvid(struct switch_dev *dev, int port, int *val) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - if (port >= MT753X_NUM_PORTS) - return -EINVAL; - - *val = mt753x_reg_read(gsw, PPBV1(port)); - *val &= GRP_PORT_VID_M; - - return 0; -} - -static int mt753x_set_port_pvid(struct switch_dev *dev, int port, int pvid) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - if (port >= MT753X_NUM_PORTS) - return -EINVAL; - - if (pvid < MT753X_MIN_VID || pvid > MT753X_MAX_VID) - return -EINVAL; - - gsw->port_entries[port].pvid = pvid; - - return 0; -} - -static int mt753x_get_vlan_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - u32 member; - u32 etags; - int i; - - val->len = 0; - - if (val->port_vlan < 0 || val->port_vlan >= MT753X_NUM_VLANS) - return -EINVAL; - - mt753x_vlan_ctrl(gsw, VTCR_READ_VLAN_ENTRY, val->port_vlan); - - member = mt753x_reg_read(gsw, VAWD1); - member &= PORT_MEM_M; - member >>= PORT_MEM_S; - - etags = mt753x_reg_read(gsw, VAWD2); - - for (i = 0; i < MT753X_NUM_PORTS; i++) { - struct switch_port *p; - int etag; - - if (!(member & BIT(i))) - continue; - - p = &val->value.ports[val->len++]; - p->id = i; - - etag = (etags >> PORT_ETAG_S(i)) & PORT_ETAG_M; - - if (etag == ETAG_CTRL_TAG) - p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED); - else if (etag != ETAG_CTRL_UNTAG) - dev_info(gsw->dev, - "vlan egress tag control neither untag nor tag.\n"); - } - - return 0; -} - -static int mt753x_set_vlan_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - u8 member = 0; - u8 etags = 0; - int i; - - if (val->port_vlan < 0 || val->port_vlan >= MT753X_NUM_VLANS || - val->len > MT753X_NUM_PORTS) - return -EINVAL; - - for (i = 0; i < val->len; i++) { - struct switch_port *p = &val->value.ports[i]; - - if (p->id >= MT753X_NUM_PORTS) - return -EINVAL; - - member |= BIT(p->id); - - if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED)) - etags |= BIT(p->id); - } - - gsw->vlan_entries[val->port_vlan].member = member; - gsw->vlan_entries[val->port_vlan].etags = etags; - - return 0; -} - -static int mt753x_set_vid(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - int vlan; - u16 vid; - - vlan = val->port_vlan; - vid = (u16)val->value.i; - - if (vlan < 0 || vlan >= MT753X_NUM_VLANS) - return -EINVAL; - - if (vid < MT753X_MIN_VID || vid > MT753X_MAX_VID) - return -EINVAL; - - gsw->vlan_entries[vlan].vid = vid; - return 0; -} - -static int mt753x_get_vid(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) -{ - val->value.i = val->port_vlan; - return 0; -} - -static int mt753x_get_port_link(struct switch_dev *dev, int port, - struct switch_port_link *link) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - u32 speed, pmsr; - - if (port < 0 || port >= MT753X_NUM_PORTS) - return -EINVAL; - - pmsr = mt753x_reg_read(gsw, PMSR(port)); - - link->link = pmsr & MAC_LNK_STS; - link->duplex = pmsr & MAC_DPX_STS; - speed = (pmsr & MAC_SPD_STS_M) >> MAC_SPD_STS_S; - - switch (speed) { - case MAC_SPD_10: - link->speed = SWITCH_PORT_SPEED_10; - break; - case MAC_SPD_100: - link->speed = SWITCH_PORT_SPEED_100; - break; - case MAC_SPD_1000: - link->speed = SWITCH_PORT_SPEED_1000; - break; - case MAC_SPD_2500: - /* TODO: swconfig has no support for 2500 now */ - link->speed = SWITCH_PORT_SPEED_UNKNOWN; - break; - } - - return 0; -} - -static int mt753x_set_port_link(struct switch_dev *dev, int port, - struct switch_port_link *link) -{ -#ifndef MODULE - if (port >= MT753X_NUM_PHYS) - return -EINVAL; - - return switch_generic_set_link(dev, port, link); -#else - return -ENOTSUPP; -#endif -} - -static u64 get_mib_counter(struct gsw_mt753x *gsw, int i, int port) -{ - unsigned int offset; - u64 lo, hi, hi2; - - offset = mt753x_mibs[i].offset; - - if (mt753x_mibs[i].size == 1) - return mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset)); - - do { - hi = mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset + 4)); - lo = mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset)); - hi2 = mt753x_reg_read(gsw, MIB_COUNTER_REG(port, offset + 4)); - } while (hi2 != hi); - - return (hi << 32) | lo; -} - -static int mt753x_get_port_mib(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) -{ - static char buf[4096]; - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - int i, len = 0; - - if (val->port_vlan >= MT753X_NUM_PORTS) - return -EINVAL; - - len += snprintf(buf + len, sizeof(buf) - len, - "Port %d MIB counters\n", val->port_vlan); - - for (i = 0; i < ARRAY_SIZE(mt753x_mibs); ++i) { - u64 counter; - - len += snprintf(buf + len, sizeof(buf) - len, - "%-11s: ", mt753x_mibs[i].name); - counter = get_mib_counter(gsw, i, val->port_vlan); - len += snprintf(buf + len, sizeof(buf) - len, "%llu\n", - counter); - } - - val->value.s = buf; - val->len = len; - return 0; -} - -static int mt753x_get_port_stats(struct switch_dev *dev, int port, - struct switch_port_stats *stats) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - if (port < 0 || port >= MT753X_NUM_PORTS) - return -EINVAL; - - stats->tx_bytes = get_mib_counter(gsw, MT753X_PORT_MIB_TXB_ID, port); - stats->rx_bytes = get_mib_counter(gsw, MT753X_PORT_MIB_RXB_ID, port); - - return 0; -} - -static void mt753x_port_isolation(struct gsw_mt753x *gsw) -{ - int i; - - for (i = 0; i < MT753X_NUM_PORTS; i++) - mt753x_reg_write(gsw, PCR(i), - BIT(gsw->cpu_port) << PORT_MATRIX_S); - - mt753x_reg_write(gsw, PCR(gsw->cpu_port), PORT_MATRIX_M); - - for (i = 0; i < MT753X_NUM_PORTS; i++) - mt753x_reg_write(gsw, PVC(i), - (0x8100 << STAG_VPID_S) | - (VA_TRANSPARENT_PORT << VLAN_ATTR_S)); -} - -static int mt753x_apply_config(struct switch_dev *dev) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - if (!gsw->global_vlan_enable) { - mt753x_port_isolation(gsw); - return 0; - } - - mt753x_apply_vlan_config(gsw); - - return 0; -} - -static int mt753x_reset_switch(struct switch_dev *dev) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - int i; - - memset(gsw->port_entries, 0, sizeof(gsw->port_entries)); - memset(gsw->vlan_entries, 0, sizeof(gsw->vlan_entries)); - - /* set default vid of each vlan to the same number of vlan, so the vid - * won't need be set explicitly. - */ - for (i = 0; i < MT753X_NUM_VLANS; i++) - gsw->vlan_entries[i].vid = i; - - return 0; -} - -static int mt753x_phy_read16(struct switch_dev *dev, int addr, u8 reg, - u16 *value) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - *value = gsw->mii_read(gsw, addr, reg); - - return 0; -} - -static int mt753x_phy_write16(struct switch_dev *dev, int addr, u8 reg, - u16 value) -{ - struct gsw_mt753x *gsw = container_of(dev, struct gsw_mt753x, swdev); - - gsw->mii_write(gsw, addr, reg, value); - - return 0; -} - -static const struct switch_attr mt753x_global[] = { - { - .type = SWITCH_TYPE_INT, - .name = "enable_vlan", - .description = "VLAN mode (1:enabled)", - .max = 1, - .id = MT753X_ATTR_ENABLE_VLAN, - .get = mt753x_get_vlan_enable, - .set = mt753x_set_vlan_enable, - } -}; - -static const struct switch_attr mt753x_port[] = { - { - .type = SWITCH_TYPE_STRING, - .name = "mib", - .description = "Get MIB counters for port", - .get = mt753x_get_port_mib, - .set = NULL, - }, -}; - -static const struct switch_attr mt753x_vlan[] = { - { - .type = SWITCH_TYPE_INT, - .name = "vid", - .description = "VLAN ID (0-4094)", - .set = mt753x_set_vid, - .get = mt753x_get_vid, - .max = 4094, - }, -}; - -static const struct switch_dev_ops mt753x_swdev_ops = { - .attr_global = { - .attr = mt753x_global, - .n_attr = ARRAY_SIZE(mt753x_global), - }, - .attr_port = { - .attr = mt753x_port, - .n_attr = ARRAY_SIZE(mt753x_port), - }, - .attr_vlan = { - .attr = mt753x_vlan, - .n_attr = ARRAY_SIZE(mt753x_vlan), - }, - .get_vlan_ports = mt753x_get_vlan_ports, - .set_vlan_ports = mt753x_set_vlan_ports, - .get_port_pvid = mt753x_get_port_pvid, - .set_port_pvid = mt753x_set_port_pvid, - .get_port_link = mt753x_get_port_link, - .set_port_link = mt753x_set_port_link, - .get_port_stats = mt753x_get_port_stats, - .apply_config = mt753x_apply_config, - .reset_switch = mt753x_reset_switch, - .phy_read16 = mt753x_phy_read16, - .phy_write16 = mt753x_phy_write16, -}; - -int mt753x_swconfig_init(struct gsw_mt753x *gsw) -{ - struct device_node *np = gsw->dev->of_node; - struct switch_dev *swdev; - int ret; - - if (of_property_read_u32(np, "mediatek,cpuport", &gsw->cpu_port)) - gsw->cpu_port = MT753X_DFL_CPU_PORT; - - swdev = &gsw->swdev; - - swdev->name = gsw->name; - swdev->alias = gsw->name; - swdev->cpu_port = gsw->cpu_port; - swdev->ports = MT753X_NUM_PORTS; - swdev->vlans = MT753X_NUM_VLANS; - swdev->ops = &mt753x_swdev_ops; - - ret = register_switch(swdev, NULL); - if (ret) { - dev_notice(gsw->dev, "Failed to register switch %s\n", - swdev->name); - return ret; - } - - mt753x_apply_config(swdev); - - return 0; -} - -void mt753x_swconfig_destroy(struct gsw_mt753x *gsw) -{ - unregister_switch(&gsw->swdev); -} diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_swconfig.h b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_swconfig.h deleted file mode 100644 index f000364ee8..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_swconfig.h +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Weijie Gao - */ - -#ifndef _MT753X_SWCONFIG_H_ -#define _MT753X_SWCONFIG_H_ - -#ifdef CONFIG_SWCONFIG -#include -#include "mt753x.h" - -int mt753x_swconfig_init(struct gsw_mt753x *gsw); -void mt753x_swconfig_destroy(struct gsw_mt753x *gsw); -#else -static inline int mt753x_swconfig_init(struct gsw_mt753x *gsw) -{ - mt753x_apply_vlan_config(gsw); - - return 0; -} - -static inline void mt753x_swconfig_destroy(struct gsw_mt753x *gsw) -{ -} -#endif - -#endif /* _MT753X_SWCONFIG_H_ */ diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_vlan.c b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_vlan.c deleted file mode 100644 index 4d88eee8de..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_vlan.c +++ /dev/null @@ -1,183 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2018 MediaTek Inc. - */ - -#include "mt753x.h" -#include "mt753x_regs.h" - -struct mt753x_mapping mt753x_def_mapping[] = { - { - .name = "llllw", - .pvids = { 1, 1, 1, 1, 2, 2, 1 }, - .members = { 0, 0x4f, 0x30 }, - .etags = { 0, 0, 0 }, - .vids = { 0, 1, 2 }, - }, { - .name = "wllll", - .pvids = { 2, 1, 1, 1, 1, 2, 1 }, - .members = { 0, 0x5e, 0x21 }, - .etags = { 0, 0, 0 }, - .vids = { 0, 1, 2 }, - }, { - .name = "lwlll", - .pvids = { 1, 2, 1, 1, 1, 2, 1 }, - .members = { 0, 0x5d, 0x22 }, - .etags = { 0, 0, 0 }, - .vids = { 0, 1, 2 }, - }, -}; - -void mt753x_vlan_ctrl(struct gsw_mt753x *gsw, u32 cmd, u32 val) -{ - int i; - - mt753x_reg_write(gsw, VTCR, - VTCR_BUSY | ((cmd << VTCR_FUNC_S) & VTCR_FUNC_M) | - (val & VTCR_VID_M)); - - for (i = 0; i < 300; i++) { - u32 val = mt753x_reg_read(gsw, VTCR); - - if ((val & VTCR_BUSY) == 0) - break; - - usleep_range(1000, 1100); - } - - if (i == 300) - dev_info(gsw->dev, "vtcr timeout\n"); -} - -static void mt753x_write_vlan_entry(struct gsw_mt753x *gsw, int vlan, u16 vid, - u8 ports, u8 etags) -{ - int port; - u32 val; - - /* vlan port membership */ - if (ports) - mt753x_reg_write(gsw, VAWD1, - IVL_MAC | VTAG_EN | VENTRY_VALID | - ((ports << PORT_MEM_S) & PORT_MEM_M)); - else - mt753x_reg_write(gsw, VAWD1, 0); - - /* egress mode */ - val = 0; - for (port = 0; port < MT753X_NUM_PORTS; port++) { - if (etags & BIT(port)) - val |= ETAG_CTRL_TAG << PORT_ETAG_S(port); - else - val |= ETAG_CTRL_UNTAG << PORT_ETAG_S(port); - } - mt753x_reg_write(gsw, VAWD2, val); - - /* write to vlan table */ - mt753x_vlan_ctrl(gsw, VTCR_WRITE_VLAN_ENTRY, vid); -} - -void mt753x_apply_vlan_config(struct gsw_mt753x *gsw) -{ - int i, j; - u8 tag_ports; - u8 untag_ports; - - /* set all ports as security mode */ - for (i = 0; i < MT753X_NUM_PORTS; i++) - mt753x_reg_write(gsw, PCR(i), - PORT_MATRIX_M | SECURITY_MODE); - - /* check if a port is used in tag/untag vlan egress mode */ - tag_ports = 0; - untag_ports = 0; - - for (i = 0; i < MT753X_NUM_VLANS; i++) { - u8 member = gsw->vlan_entries[i].member; - u8 etags = gsw->vlan_entries[i].etags; - - if (!member) - continue; - - for (j = 0; j < MT753X_NUM_PORTS; j++) { - if (!(member & BIT(j))) - continue; - - if (etags & BIT(j)) - tag_ports |= 1u << j; - else - untag_ports |= 1u << j; - } - } - - /* set all untag-only ports as transparent and the rest as user port */ - for (i = 0; i < MT753X_NUM_PORTS; i++) { - u32 pvc_mode = 0x8100 << STAG_VPID_S; - - if (untag_ports & BIT(i) && !(tag_ports & BIT(i))) - pvc_mode = (0x8100 << STAG_VPID_S) | - (VA_TRANSPARENT_PORT << VLAN_ATTR_S); - - mt753x_reg_write(gsw, PVC(i), pvc_mode); - } - - /* first clear the switch vlan table */ - for (i = 0; i < MT753X_NUM_VLANS; i++) - mt753x_write_vlan_entry(gsw, i, i, 0, 0); - - /* now program only vlans with members to avoid - * clobbering remapped entries in later iterations - */ - for (i = 0; i < MT753X_NUM_VLANS; i++) { - u16 vid = gsw->vlan_entries[i].vid; - u8 member = gsw->vlan_entries[i].member; - u8 etags = gsw->vlan_entries[i].etags; - - if (member) - mt753x_write_vlan_entry(gsw, i, vid, member, etags); - } - - /* Port Default PVID */ - for (i = 0; i < MT753X_NUM_PORTS; i++) { - int vlan = gsw->port_entries[i].pvid; - u16 pvid = 0; - u32 val; - - if (vlan < MT753X_NUM_VLANS && gsw->vlan_entries[vlan].member) - pvid = gsw->vlan_entries[vlan].vid; - - val = mt753x_reg_read(gsw, PPBV1(i)); - val &= ~GRP_PORT_VID_M; - val |= pvid; - mt753x_reg_write(gsw, PPBV1(i), val); - } -} - -struct mt753x_mapping *mt753x_find_mapping(struct device_node *np) -{ - const char *map; - int i; - - if (of_property_read_string(np, "mediatek,portmap", &map)) - return NULL; - - for (i = 0; i < ARRAY_SIZE(mt753x_def_mapping); i++) - if (!strcmp(map, mt753x_def_mapping[i].name)) - return &mt753x_def_mapping[i]; - - return NULL; -} - -void mt753x_apply_mapping(struct gsw_mt753x *gsw, struct mt753x_mapping *map) -{ - int i = 0; - - for (i = 0; i < MT753X_NUM_PORTS; i++) - gsw->port_entries[i].pvid = map->pvids[i]; - - for (i = 0; i < MT753X_NUM_VLANS; i++) { - gsw->vlan_entries[i].member = map->members[i]; - gsw->vlan_entries[i].etags = map->etags[i]; - gsw->vlan_entries[i].vid = map->vids[i]; - } -} diff --git a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_vlan.h b/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_vlan.h deleted file mode 100644 index c726b8eacd..0000000000 --- a/target/linux/mediatek/files-4.19/drivers/net/phy/mtk/mt753x/mt753x_vlan.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2018 MediaTek Inc. - */ - -#ifndef _MT753X_VLAN_H_ -#define _MT753X_VLAN_H_ - -#define MT753X_NUM_PORTS 7 -#define MT753X_NUM_VLANS 4095 -#define MT753X_MAX_VID 4095 -#define MT753X_MIN_VID 0 - -struct gsw_mt753x; - -struct mt753x_port_entry { - u16 pvid; -}; - -struct mt753x_vlan_entry { - u16 vid; - u8 member; - u8 etags; -}; - -struct mt753x_mapping { - char *name; - u16 pvids[MT753X_NUM_PORTS]; - u8 members[MT753X_NUM_VLANS]; - u8 etags[MT753X_NUM_VLANS]; - u16 vids[MT753X_NUM_VLANS]; -}; - -extern struct mt753x_mapping mt753x_defaults[]; - -void mt753x_vlan_ctrl(struct gsw_mt753x *gsw, u32 cmd, u32 val); -void mt753x_apply_vlan_config(struct gsw_mt753x *gsw); -struct mt753x_mapping *mt753x_find_mapping(struct device_node *np); -void mt753x_apply_mapping(struct gsw_mt753x *gsw, struct mt753x_mapping *map); -#endif /* _MT753X_VLAN_H_ */ diff --git a/target/linux/mediatek/mt7622/config-4.19 b/target/linux/mediatek/mt7622/config-4.19 deleted file mode 100644 index e72bff61e4..0000000000 --- a/target/linux/mediatek/mt7622/config-4.19 +++ /dev/null @@ -1,593 +0,0 @@ -CONFIG_64BIT=y -CONFIG_AHCI_MTK=y -# CONFIG_ANDROID_DEFAULT_SETTING is not set -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_MEDIATEK=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_ARCH_SUPPORTS_LTO_CLANG=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARM64=y -# CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_64K_PAGES is not set -CONFIG_ARM64_CONT_SHIFT=4 -# CONFIG_ARM64_CRYPTO is not set -# CONFIG_ARM64_ERRATUM_1463225 is not set -CONFIG_ARM64_HW_AFDBM=y -# CONFIG_ARM64_LSE_ATOMICS is not set -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PAN=y -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -# CONFIG_ARM64_PMEM is not set -# CONFIG_ARM64_PTDUMP_DEBUGFS is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -CONFIG_ARM64_SSBD=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_UAO=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -# CONFIG_ARM64_VA_BITS_48 is not set -CONFIG_ARM64_VHE=y -# CONFIG_ARMV8_DEPRECATED is not set -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -CONFIG_ARM_MEDIATEK_CPUFREQ=y -CONFIG_ARM_PMU=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_ATA=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLOCK_COMPAT=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_BT=y -CONFIG_BT_BCM=y -CONFIG_BT_BREDR=y -CONFIG_BT_DEBUGFS=y -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_BCM=y -# CONFIG_BT_HCIUART_INTEL is not set -# CONFIG_BT_HCIUART_NOKIA is not set -CONFIG_BT_HCIUART_QCA=y -CONFIG_BT_HCIUART_SERDEV=y -CONFIG_BT_HCIVHCI=y -CONFIG_BT_HS=y -CONFIG_BT_LE=y -CONFIG_BT_MTKUART=y -CONFIG_BT_QCA=y -CONFIG_BUILD_BIN2C=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLOCK_THERMAL=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_MEDIATEK=y -CONFIG_COMMON_CLK_MT2712=y -# CONFIG_COMMON_CLK_MT2712_BDPSYS is not set -# CONFIG_COMMON_CLK_MT2712_IMGSYS is not set -# CONFIG_COMMON_CLK_MT2712_JPGDECSYS is not set -# CONFIG_COMMON_CLK_MT2712_MFGCFG is not set -# CONFIG_COMMON_CLK_MT2712_MMSYS is not set -# CONFIG_COMMON_CLK_MT2712_VDECSYS is not set -# CONFIG_COMMON_CLK_MT2712_VENCSYS is not set -# CONFIG_COMMON_CLK_MT6779 is not set -# CONFIG_COMMON_CLK_MT6797 is not set -CONFIG_COMMON_CLK_MT7622=y -CONFIG_COMMON_CLK_MT7622_AUDSYS=y -CONFIG_COMMON_CLK_MT7622_ETHSYS=y -CONFIG_COMMON_CLK_MT7622_HIFSYS=y -# CONFIG_COMMON_CLK_MT8173 is not set -CONFIG_COMPAT=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15 -# CONFIG_CPUFREQ_DT is not set -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_FREQ=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_TIMES is not set -CONFIG_CPU_RMAP=y -CONFIG_CPU_THERMAL=y -CONFIG_CRC16=y -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CMAC=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ECDH=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_KPP=y -CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CUSTOM_KERNEL_LCM="" -CONFIG_CUSTOM_LCM_X="0" -CONFIG_CUSTOM_LCM_Y="0" -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEFAULT_IOSCHED="noop" -CONFIG_DEFAULT_NOOP=y -# CONFIG_DEVAPC_ARCH_V1 is not set -# CONFIG_DEVAPC_MT6779 is not set -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_DMADEVICES=y -CONFIG_DMATEST=y -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_ENGINE_RAID=y -CONFIG_DMA_OF=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DTC=y -CONFIG_DYNAMIC_DEBUG=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EINT_MTK=y -# CONFIG_ENERGY_MODEL is not set -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FLATMEM_MANUAL is not set -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -# CONFIG_GPS is not set -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HUGETLBFS is not set -CONFIG_ICPLUS_PHY=y -CONFIG_IIO=y -# CONFIG_IIO_BUFFER is not set -# CONFIG_IIO_TRIGGER is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -# CONFIG_INTERCONNECT is not set -# CONFIG_IOSCHED_DEADLINE is not set -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_IRQ_WORK=y -CONFIG_JUMP_LABEL=y -CONFIG_LCM_HEIGHT="1920" -CONFIG_LCM_WIDTH="1080" -# CONFIG_LEGACY_ENERGY_MODEL_DT is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LTO_NONE=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_MARVELL_88Q_PHY is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEDIATEK_MT6577_AUXADC=y -CONFIG_MEDIATEK_WATCHDOG=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEMFD_CREATE=y -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_MTK=y -# CONFIG_MMC_TIFM_SD is not set -# CONFIG_MMPROFILE is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MT753X_GSW=y -# CONFIG_MTD_GPT_PARTS is not set -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_MTK=y -CONFIG_MTD_SPI_NAND=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_SPLIT_FIT_FW=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -# CONFIG_MTK_AAL_SUPPORT is not set -# CONFIG_MTK_ANDROID_DEFAULT_SETTING is not set -# CONFIG_MTK_ATF_LOGGER is not set -# CONFIG_MTK_BTIF is not set -# CONFIG_MTK_CMDQ is not set -# CONFIG_MTK_COMBO is not set -# CONFIG_MTK_CONNSYS_DEDICATED_LOG_PATH is not set -# CONFIG_MTK_CONN_LTE_IDC_SUPPORT is not set -# CONFIG_MTK_CONN_MT3337_CHIP_SUPPORT is not set -# CONFIG_MTK_CONSUMER_PARTIAL_UPDATE_SUPPORT is not set -# CONFIG_MTK_DEVAPC is not set -# CONFIG_MTK_DHCPV6C_WIFI is not set -# CONFIG_MTK_DISPLAY_LOW_MEMORY_DEBUG_SUPPORT is not set -CONFIG_MTK_DISP_PLATFORM="" -# CONFIG_MTK_DRE30_SUPPORT is not set -# CONFIG_MTK_DVFSRC is not set -CONFIG_MTK_EFUSE=y -# CONFIG_MTK_GED_SUPPORT is not set -# CONFIG_MTK_GPS_SUPPORT is not set -# CONFIG_MTK_GPU_COMMON_DVFS_SUPPORT is not set -# CONFIG_MTK_GPU_SUPPORT is not set -CONFIG_MTK_GPU_VERSION="" -CONFIG_MTK_HSDMA=y -CONFIG_MTK_ICE_DEBUG=y -CONFIG_MTK_INFRACFG=y -# CONFIG_MTK_LCM is not set -# CONFIG_MTK_LCM_DEVICE_TREE_SUPPORT is not set -CONFIG_MTK_LCM_PHYSICAL_ROTATION="" -# CONFIG_MTK_MERGE_INTERFACE_SUPPORT is not set -# CONFIG_MTK_MET_CORE is not set -# CONFIG_MTK_MET_MEM_ALLOC is not set -# CONFIG_MTK_MMDVFS is not set -# CONFIG_MTK_MMPROFILE_SUPPORT is not set -# CONFIG_MTK_OD_SUPPORT is not set -# CONFIG_MTK_OVERLAY_ENGINE_SUPPORT is not set -CONFIG_MTK_PMIC_WRAP=y -CONFIG_MTK_PQ_COLOR_MODE="DISP" -# CONFIG_MTK_REBOOT_MODE is not set -# CONFIG_MTK_ROUND_CORNER_SUPPORT is not set -# CONFIG_MTK_SCHED_INTEROP is not set -CONFIG_MTK_SCPSYS=y -# CONFIG_MTK_SCPSYS_BRINGUP is not set -# CONFIG_MTK_SPMTWAM is not set -CONFIG_MTK_THERMAL=y -CONFIG_MTK_TIMER=y -# CONFIG_MTK_TINYSYS_SSPM_PLT_SUPPORT is not set -# CONFIG_MTK_TINYSYS_SSPM_SUPPORT is not set -# CONFIG_MTK_VIDEOX is not set -# CONFIG_MTPROF is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_MEDIATEK_SOC=y -CONFIG_NET_VENDOR_MEDIATEK=y -CONFIG_NLS=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=2 -# CONFIG_NUMA is not set -CONFIG_NVMEM=y -# CONFIG_NXP_TJA1100_PHY is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PADATA=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI=y -CONFIG_PCIE_MEDIATEK=y -CONFIG_PCI_DEBUG=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PERF_EVENTS=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_MTK_TPHY=y -# CONFIG_PHY_MTK_UFS is not set -# CONFIG_PHY_MTK_XSPHY is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_MT2712 is not set -# CONFIG_PINCTRL_MT6765 is not set -# CONFIG_PINCTRL_MT6779 is not set -# CONFIG_PINCTRL_MT6797 is not set -CONFIG_PINCTRL_MT7622=y -# CONFIG_PINCTRL_MT8173 is not set -# CONFIG_PINCTRL_MT8183 is not set -CONFIG_PINCTRL_MTK_MOORE=y -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_SUPPLY=y -CONFIG_PRINTK_TIME=y -# CONFIG_PROC_UID is not set -# CONFIG_PSI is not set -CONFIG_PWM=y -CONFIG_PWM_MEDIATEK=y -# CONFIG_PWM_MTK_DISP is not set -CONFIG_PWM_SYSFS=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_RAS=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REALTEK_PHY=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_MT6380=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_MT7622=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTL8367S_GSW=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SCHED_MC=y -# CONFIG_SCHED_TUNE is not set -CONFIG_SCSI=y -# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set -# CONFIG_SECURITY_PERF_EVENTS_RESTRICT is not set -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_MT6577=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SG_POOL=y -# CONFIG_SINGLE_PANEL_OUTPUT is not set -CONFIG_SMP=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_MT65XX=y -# CONFIG_SPI_MTK_QUADSPI is not set -CONFIG_SPI_MTK_SNFI=y -CONFIG_SRCU=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYSVIPC_COMPAT=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_EMULATION=y -CONFIG_THERMAL_GOV_BANG_BANG=y -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -# CONFIG_UNMAP_KERNEL_AT_EL0 is not set -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_MTK=y -# CONFIG_USB_XHCI_PLATFORM is not set -CONFIG_VMAP_STACK=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP is not set -CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y -CONFIG_WATCHDOG_PRETIMEOUT_GOV=y -# CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP is not set -CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y -CONFIG_WATCHDOG_SYSFS=y -CONFIG_XPS=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/mediatek/mt7623/config-4.19 b/target/linux/mediatek/mt7623/config-4.19 deleted file mode 100644 index 8434972279..0000000000 --- a/target/linux/mediatek/mt7623/config-4.19 +++ /dev/null @@ -1,509 +0,0 @@ -# CONFIG_AIO is not set -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MEDIATEK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -# CONFIG_ARM_ATAG_DTB_COMPAT is not set -CONFIG_ARM_CPU_SUSPEND=y -# CONFIG_ARM_CPU_TOPOLOGY is not set -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_MEDIATEK_CPUFREQ=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_SMMU is not set -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BOUNCE=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_CLEANCACHE=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 rootfstype=squashfs,jffs2" -CONFIG_CMDLINE_FROM_BOOTLOADER=y -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_MEDIATEK=y -CONFIG_COMMON_CLK_MT2701=y -# CONFIG_COMMON_CLK_MT2701_AUDSYS is not set -CONFIG_COMMON_CLK_MT2701_BDPSYS=y -CONFIG_COMMON_CLK_MT2701_ETHSYS=y -# CONFIG_COMMON_CLK_MT2701_G3DSYS is not set -CONFIG_COMMON_CLK_MT2701_HIFSYS=y -CONFIG_COMMON_CLK_MT2701_IMGSYS=y -CONFIG_COMMON_CLK_MT2701_MMSYS=y -CONFIG_COMMON_CLK_MT2701_VDECSYS=y -# CONFIG_COMMON_CLK_MT7622 is not set -# CONFIG_COMMON_CLK_MT7629 is not set -# CONFIG_COMMON_CLK_MT7629_ETHSYS is not set -# CONFIG_COMMON_CLK_MT7629_HIFSYS is not set -# CONFIG_COMMON_CLK_MT8135 is not set -# CONFIG_COMMON_CLK_MT8173 is not set -CONFIG_COREDUMP=y -# CONFIG_CPUFREQ_DT is not set -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -# CONFIG_CPU_THERMAL is not set -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_MEDIATEK=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_ALIGN_RODATA=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_GPIO=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_MT6589_UART0=y -# CONFIG_DEBUG_MT8127_UART0 is not set -# CONFIG_DEBUG_MT8135_UART3 is not set -CONFIG_DEBUG_PREEMPT=y -CONFIG_DEBUG_UART_8250=y -# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set -CONFIG_DEBUG_UART_8250_SHIFT=2 -# CONFIG_DEBUG_UART_8250_WORD is not set -CONFIG_DEBUG_UART_PHYS=0x11004000 -CONFIG_DEBUG_UART_VIRT=0xf1004000 -CONFIG_DEBUG_UNCOMPRESS=y -# CONFIG_DEBUG_USER is not set -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EINT_MTK=y -CONFIG_ELF_CORE=y -CONFIG_EXT4_FS=y -CONFIG_F2FS_FS=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FREEZER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HOTPLUG_CPU=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_MTK=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MT65XX=y -CONFIG_ICPLUS_PHY=y -CONFIG_IIO=y -# CONFIG_IIO_BUFFER is not set -# CONFIG_IIO_TRIGGER is not set -CONFIG_INITRAMFS_COMPRESSION="" -CONFIG_INITRAMFS_ROOT_GID=1000 -CONFIG_INITRAMFS_ROOT_UID=1000 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -CONFIG_IOMMU_SUPPORT=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KALLSYMS=y -CONFIG_LEDS_MT6323=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_MACH_MT2701 is not set -# CONFIG_MACH_MT6589 is not set -# CONFIG_MACH_MT6592 is not set -CONFIG_MACH_MT7623=y -# CONFIG_MACH_MT7629 is not set -# CONFIG_MACH_MT8127 is not set -# CONFIG_MACH_MT8135 is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_GPIO=y -CONFIG_MEDIATEK_MT6577_AUXADC=y -CONFIG_MEDIATEK_WATCHDOG=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_CORE=y -CONFIG_MFD_MT6397=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_MTK=y -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MT753X_GSW is not set -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_MT81xx_NOR=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_MTK=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MTK_EFUSE=y -# CONFIG_MTK_HSDMA is not set -CONFIG_MTK_INFRACFG=y -# CONFIG_MTK_IOMMU is not set -# CONFIG_MTK_IOMMU_V1 is not set -CONFIG_MTK_PMIC_WRAP=y -CONFIG_MTK_SCPSYS=y -CONFIG_MTK_THERMAL=y -CONFIG_MTK_TIMER=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MT7530=y -CONFIG_NET_DSA_TAG_MTK=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_MEDIATEK_SOC=y -CONFIG_NET_SWITCHDEV=y -# CONFIG_NET_VENDOR_AURORA is not set -CONFIG_NET_VENDOR_MEDIATEK=y -# CONFIG_NET_VENDOR_WIZNET is not set -CONFIG_NLS=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_MEDIATEK=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHY_MTK_TPHY=y -# CONFIG_PHY_MTK_XSPHY is not set -CONFIG_PINCTRL=y -CONFIG_PINCTRL_MT2701=y -CONFIG_PINCTRL_MT6397=y -CONFIG_PINCTRL_MT7623=y -# CONFIG_PINCTRL_MT7629 is not set -CONFIG_PINCTRL_MTK=y -CONFIG_PINCTRL_MTK_MOORE=y -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_RCU=y -CONFIG_PRINTK_TIME=y -CONFIG_PWM=y -CONFIG_PWM_MEDIATEK=y -# CONFIG_PWM_MTK_DISP is not set -CONFIG_PWM_SYSFS=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# CONFIG_RCU_EXPERT is not set -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_MT6323=y -# CONFIG_REGULATOR_MT6380 is not set -# CONFIG_REGULATOR_MT6397 is not set -# CONFIG_REGULATOR_QCOM_SPMI is not set -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_MT6397 is not set -# CONFIG_RTC_DRV_MT7622 is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SERIAL_8250_DMA is not set -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_MT6577=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SFP is not set -CONFIG_SGL_ALLOC=y -CONFIG_SMP=y -# CONFIG_SMP_ON_UP is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_MT65XX=y -# CONFIG_SPI_MTK_SNFI is not set -CONFIG_SPMI=y -CONFIG_SRCU=y -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWCONFIG=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_TASKS_RCU=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_MTK=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/mediatek/mt7629/config-4.19 b/target/linux/mediatek/mt7629/config-4.19 deleted file mode 100644 index e36b00d485..0000000000 --- a/target/linux/mediatek/mt7629/config-4.19 +++ /dev/null @@ -1,373 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MEDIATEK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_PMU=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_VIRT_EXT=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_CACHE_L2X0=y -# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CHR_DEV_SCH=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2" -CONFIG_CMDLINE_FROM_BOOTLOADER=y -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_MEDIATEK=y -# CONFIG_COMMON_CLK_MT2701 is not set -# CONFIG_COMMON_CLK_MT7622 is not set -CONFIG_COMMON_CLK_MT7629=y -CONFIG_COMMON_CLK_MT7629_ETHSYS=y -CONFIG_COMMON_CLK_MT7629_HIFSYS=y -# CONFIG_COMMON_CLK_MT8135 is not set -# CONFIG_COMMON_CLK_MT8173 is not set -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_IDLE=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_USER is not set -CONFIG_DEFAULT_HOSTNAME="(mt7629)" -CONFIG_DEFAULT_IOSCHED="noop" -CONFIG_DEFAULT_NOOP=y -CONFIG_DTC=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EINT_MTK=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB=y -CONFIG_HANDLE_DOMAIN_IRQ=y -# CONFIG_HARDENED_USERCOPY is not set -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_MTK=y -CONFIG_HZ_FIXED=0 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_IOSCHED_DEADLINE is not set -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_IRQ_WORK=y -# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_MACH_MT2701 is not set -# CONFIG_MACH_MT6589 is not set -# CONFIG_MACH_MT6592 is not set -# CONFIG_MACH_MT7623 is not set -CONFIG_MACH_MT7629=y -# CONFIG_MACH_MT8127 is not set -# CONFIG_MACH_MT8135 is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEDIATEK_WATCHDOG=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MT753X_GSW=y -CONFIG_MTD_MT81xx_NOR=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_MTK=y -CONFIG_MTD_SPI_NAND=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_SPLIT_FIT_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -# CONFIG_MTK_EFUSE is not set -CONFIG_MTK_INFRACFG=y -# CONFIG_MTK_PMIC_WRAP is not set -CONFIG_MTK_SCPSYS=y -CONFIG_MTK_TIMER=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NETFILTER=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_MEDIATEK_SOC=y -CONFIG_NET_VENDOR_MEDIATEK=y -CONFIG_NLS=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=2 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_MEDIATEK=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHY_MTK_TPHY=y -# CONFIG_PHY_MTK_XSPHY is not set -CONFIG_PINCTRL=y -CONFIG_PINCTRL_MT7629=y -CONFIG_PINCTRL_MTK_MOORE=y -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PWM=y -CONFIG_PWM_MEDIATEK=y -# CONFIG_PWM_MTK_DISP is not set -CONFIG_PWM_SYSFS=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SCSI=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_MT6577=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_8250_RUNTIME_UARTS=3 -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -# CONFIG_SPI_MT65XX is not set -CONFIG_SPI_MTK_SNFI=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_STACKTRACE=y -# CONFIG_SWAP is not set -CONFIG_SWCONFIG=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_MTK=y -# CONFIG_USB_XHCI_PLATFORM is not set -CONFIG_USE_OF=y -# CONFIG_VFP is not set -CONFIG_WATCHDOG_CORE=y -# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/mediatek/patches-4.19/0001-arm-dts-mediatek-add-basic-support-for-MT7629-SoC.patch b/target/linux/mediatek/patches-4.19/0001-arm-dts-mediatek-add-basic-support-for-MT7629-SoC.patch deleted file mode 100644 index a8b3f99331..0000000000 --- a/target/linux/mediatek/patches-4.19/0001-arm-dts-mediatek-add-basic-support-for-MT7629-SoC.patch +++ /dev/null @@ -1,88 +0,0 @@ -From acb69c6600c3df52f0b3610801f3fd44c4392333 Mon Sep 17 00:00:00 2001 -Message-Id: -From: Ryder Lee -Date: Wed, 13 Mar 2019 16:42:15 +0800 -Subject: [PATCH] arm: dts: mediatek: add basic support for MT7629 SoC - -This adds basic support for MT7629 reference board. - -Signed-off-by: Ryder Lee ---- - include/dt-bindings/reset/mt7629-resets.h | 71 ++++ - 4 files changed, 704 insertions(+) - create mode 100644 include/dt-bindings/reset/mt7629-resets.h - ---- /dev/null -+++ b/include/dt-bindings/reset/mt7629-resets.h -@@ -0,0 +1,71 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2019 MediaTek Inc. -+ */ -+ -+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7629 -+#define _DT_BINDINGS_RESET_CONTROLLER_MT7629 -+ -+/* INFRACFG resets */ -+#define MT7629_INFRA_EMI_MPU_RST 0 -+#define MT7629_INFRA_UART5_RST 2 -+#define MT7629_INFRA_CIRQ_EINT_RST 3 -+#define MT7629_INFRA_APXGPT_RST 4 -+#define MT7629_INFRA_SCPSYS_RST 5 -+#define MT7629_INFRA_KP_RST 6 -+#define MT7629_INFRA_SPI1_RST 7 -+#define MT7629_INFRA_SPI4_RST 8 -+#define MT7629_INFRA_SYSTIMER_RST 9 -+#define MT7629_INFRA_IRRX_RST 10 -+#define MT7629_INFRA_AO_BUS_RST 16 -+#define MT7629_INFRA_EMI_RST 32 -+#define MT7629_INFRA_APMIXED_RST 35 -+#define MT7629_INFRA_MIPI_RST 36 -+#define MT7629_INFRA_TRNG_RST 37 -+#define MT7629_INFRA_SYSCIRQ_RST 38 -+#define MT7629_INFRA_MIPI_CSI_RST 39 -+#define MT7629_INFRA_GCE_FAXI_RST 40 -+#define MT7629_INFRA_I2C_SRAM_RST 41 -+#define MT7629_INFRA_IOMMU_RST 47 -+ -+/* PERICFG resets */ -+#define MT7629_PERI_UART0_SW_RST 0 -+#define MT7629_PERI_UART1_SW_RST 1 -+#define MT7629_PERI_UART2_SW_RST 2 -+#define MT7629_PERI_BTIF_SW_RST 6 -+#define MT7629_PERI_PWN_SW_RST 8 -+#define MT7629_PERI_DMA_SW_RST 11 -+#define MT7629_PERI_NFI_SW_RST 14 -+#define MT7629_PERI_I2C0_SW_RST 22 -+#define MT7629_PERI_SPI0_SW_RST 33 -+#define MT7629_PERI_SPI1_SW_RST 34 -+#define MT7629_PERI_FLASHIF_SW_RST 36 -+ -+/* PCIe Subsystem resets */ -+#define MT7629_PCIE1_CORE_RST 19 -+#define MT7629_PCIE1_MMIO_RST 20 -+#define MT7629_PCIE1_HRST 21 -+#define MT7629_PCIE1_USER_RST 22 -+#define MT7629_PCIE1_PIPE_RST 23 -+#define MT7629_PCIE0_CORE_RST 27 -+#define MT7629_PCIE0_MMIO_RST 28 -+#define MT7629_PCIE0_HRST 29 -+#define MT7629_PCIE0_USER_RST 30 -+#define MT7629_PCIE0_PIPE_RST 31 -+ -+/* SSUSB Subsystem resets */ -+#define MT7629_SSUSB_PHY_PWR_RST 3 -+#define MT7629_SSUSB_MAC_PWR_RST 4 -+ -+/* ETH Subsystem resets */ -+#define MT7629_ETHSYS_SYS_RST 0 -+#define MT7629_ETHSYS_MCM_RST 2 -+#define MT7629_ETHSYS_HSDMA_RST 5 -+#define MT7629_ETHSYS_FE_RST 6 -+#define MT7629_ETHSYS_ESW_RST 16 -+#define MT7629_ETHSYS_GMAC_RST 23 -+#define MT7629_ETHSYS_EPHY_RST 24 -+#define MT7629_ETHSYS_CRYPTO_RST 29 -+#define MT7629_ETHSYS_PPE_RST 31 -+ -+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7629 */ diff --git a/target/linux/mediatek/patches-4.19/0001-eth-sync-from-mtk-lede.patch b/target/linux/mediatek/patches-4.19/0001-eth-sync-from-mtk-lede.patch deleted file mode 100644 index 814f66cc4e..0000000000 --- a/target/linux/mediatek/patches-4.19/0001-eth-sync-from-mtk-lede.patch +++ /dev/null @@ -1,1646 +0,0 @@ ---- a/drivers/net/ethernet/mediatek/Kconfig -+++ b/drivers/net/ethernet/mediatek/Kconfig -@@ -1,6 +1,6 @@ - config NET_VENDOR_MEDIATEK - bool "MediaTek ethernet driver" -- depends on ARCH_MEDIATEK -+ depends on ARCH_MEDIATEK || RALINK - ---help--- - If you have a Mediatek SoC with ethernet, say Y. - ---- a/drivers/net/ethernet/mediatek/Makefile -+++ b/drivers/net/ethernet/mediatek/Makefile -@@ -2,4 +2,5 @@ - # Makefile for the Mediatek SoCs built-in ethernet macs - # - --obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth_soc.o -+obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth_soc.o mtk_sgmii.o \ -+ mtk_eth_path.o ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c -@@ -0,0 +1,333 @@ -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; version 2 of the License -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Copyright (C) 2018 Sean Wang -+ */ -+ -+#include -+#include -+ -+#include "mtk_eth_soc.h" -+ -+struct mtk_eth_muxc { -+ int (*set_path)(struct mtk_eth *eth, int path); -+}; -+ -+static const char * const mtk_eth_mux_name[] = { -+ "mux_gdm1_to_gmac1_esw", "mux_gmac2_gmac0_to_gephy", -+ "mux_u3_gmac2_to_qphy", "mux_gmac1_gmac2_to_sgmii_rgmii", -+ "mux_gmac12_to_gephy_sgmii", -+}; -+ -+static const char * const mtk_eth_path_name[] = { -+ "gmac1_rgmii", "gmac1_trgmii", "gmac1_sgmii", "gmac2_rgmii", -+ "gmac2_sgmii", "gmac2_gephy", "gdm1_esw", -+}; -+ -+static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, int path) -+{ -+ u32 val, mask, set; -+ bool updated = true; -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC1_SGMII: -+ mask = ~(u32)MTK_MUX_TO_ESW; -+ set = 0; -+ break; -+ case MTK_ETH_PATH_GDM1_ESW: -+ mask = ~(u32)MTK_MUX_TO_ESW; -+ set = MTK_MUX_TO_ESW; -+ break; -+ default: -+ updated = false; -+ break; -+ }; -+ -+ if (updated) { -+ val = mtk_r32(eth, MTK_MAC_MISC); -+ val = (val & mask) | set; -+ mtk_w32(eth, val, MTK_MAC_MISC); -+ } -+ -+ dev_info(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name[path], __func__, updated); -+ -+ return 0; -+} -+ -+static int set_mux_gmac2_gmac0_to_gephy(struct mtk_eth *eth, int path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC2_GEPHY: -+ val = ~(u32)GEPHY_MAC_SEL; -+ break; -+ default: -+ updated = false; -+ break; -+ } -+ -+ if (updated) -+ regmap_update_bits(eth->infra, INFRA_MISC2, GEPHY_MAC_SEL, val); -+ -+ dev_info(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name[path], __func__, updated); -+ -+ return 0; -+} -+ -+static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, int path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC2_SGMII: -+ val = CO_QPHY_SEL; -+ break; -+ default: -+ updated = false; -+ break; -+ } -+ -+ if (updated) -+ regmap_update_bits(eth->infra, INFRA_MISC2, CO_QPHY_SEL, val); -+ -+ dev_info(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name[path], __func__, updated); -+ -+ return 0; -+} -+ -+static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, int path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC1_SGMII: -+ val = SYSCFG0_SGMII_GMAC1; -+ break; -+ case MTK_ETH_PATH_GMAC2_SGMII: -+ val = SYSCFG0_SGMII_GMAC2; -+ break; -+ case MTK_ETH_PATH_GMAC1_RGMII: -+ case MTK_ETH_PATH_GMAC2_RGMII: -+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -+ val &= SYSCFG0_SGMII_MASK; -+ -+ if ((path == MTK_GMAC1_RGMII && val == SYSCFG0_SGMII_GMAC1) || -+ (path == MTK_GMAC2_RGMII && val == SYSCFG0_SGMII_GMAC2)) -+ val = 0; -+ else -+ updated = false; -+ break; -+ default: -+ updated = false; -+ break; -+ }; -+ -+ if (updated) -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, val); -+ -+ dev_info(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name[path], __func__, updated); -+ -+ return 0; -+} -+ -+static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, int path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ -+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC1_SGMII: -+ val |= SYSCFG0_SGMII_GMAC1_V2; -+ break; -+ case MTK_ETH_PATH_GMAC2_GEPHY: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2; -+ break; -+ case MTK_ETH_PATH_GMAC2_SGMII: -+ val |= SYSCFG0_SGMII_GMAC2_V2; -+ break; -+ default: -+ updated = false; -+ }; -+ -+ if (updated) -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, val); -+ -+ if (!updated) -+ dev_info(eth->dev, "path %s no needs updatiion in %s\n", -+ mtk_eth_path_name[path], __func__); -+ -+ dev_info(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name[path], __func__, updated); -+ -+ return 0; -+} -+ -+static const struct mtk_eth_muxc mtk_eth_muxc[] = { -+ { .set_path = set_mux_gdm1_to_gmac1_esw, }, -+ { .set_path = set_mux_gmac2_gmac0_to_gephy, }, -+ { .set_path = set_mux_u3_gmac2_to_qphy, }, -+ { .set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii, }, -+ { .set_path = set_mux_gmac12_to_gephy_sgmii, } -+}; -+ -+static int mtk_eth_mux_setup(struct mtk_eth *eth, int path) -+{ -+ int i, err = 0; -+ -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_PATH_BIT(path))) { -+ dev_info(eth->dev, "path %s isn't support on the SoC\n", -+ mtk_eth_path_name[path]); -+ return -EINVAL; -+ } -+ -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_MUX)) -+ return 0; -+ -+ /* Setup MUX in path fabric */ -+ for (i = 0; i < MTK_ETH_MUX_MAX; i++) { -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_MUX_BIT(i))) { -+ err = mtk_eth_muxc[i].set_path(eth, path); -+ if (err) -+ goto out; -+ } else { -+ dev_info(eth->dev, "mux %s isn't present on the SoC\n", -+ mtk_eth_mux_name[i]); -+ } -+ } -+ -+out: -+ return err; -+} -+ -+static int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id) -+{ -+ unsigned int val = 0; -+ int sid, err, path; -+ -+ path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII : -+ MTK_ETH_PATH_GMAC2_SGMII; -+ -+ /* Setup proper MUXes along the path */ -+ err = mtk_eth_mux_setup(eth, path); -+ if (err) -+ return err; -+ -+ /* The path GMAC to SGMII will be enabled once the SGMIISYS is being -+ * setup done. -+ */ -+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -+ -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, ~(u32)SYSCFG0_SGMII_MASK); -+ -+ /* Decide how GMAC and SGMIISYS be mapped */ -+ sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? 0 : mac_id; -+ -+ /* Setup SGMIISYS with the determined property */ -+ if (MTK_HAS_FLAGS(eth->sgmii->flags[sid], MTK_SGMII_PHYSPEED_AN)) -+ err = mtk_sgmii_setup_mode_an(eth->sgmii, sid); -+ else -+ err = mtk_sgmii_setup_mode_force(eth->sgmii, sid); -+ -+ if (err) -+ return err; -+ -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, val); -+ -+ return 0; -+} -+ -+static int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id) -+{ -+ int err, path = 0; -+ -+ if (mac_id == 1) -+ path = MTK_ETH_PATH_GMAC2_GEPHY; -+ -+ if (!path) -+ return -EINVAL; -+ -+ /* Setup proper MUXes along the path */ -+ err = mtk_eth_mux_setup(eth, path); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+static int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id) -+{ -+ int err, path; -+ -+ path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_RGMII : -+ MTK_ETH_PATH_GMAC2_RGMII; -+ -+ /* Setup proper MUXes along the path */ -+ err = mtk_eth_mux_setup(eth, path); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+int mtk_setup_hw_path(struct mtk_eth *eth, int mac_id, int phymode) -+{ -+ int err; -+ -+ switch (phymode) { -+ case PHY_INTERFACE_MODE_TRGMII: -+ case PHY_INTERFACE_MODE_RGMII_TXID: -+ case PHY_INTERFACE_MODE_RGMII_RXID: -+ case PHY_INTERFACE_MODE_RGMII_ID: -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_MII: -+ case PHY_INTERFACE_MODE_REVMII: -+ case PHY_INTERFACE_MODE_RMII: -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RGMII)) { -+ err = mtk_gmac_rgmii_path_setup(eth, mac_id); -+ if (err) -+ return err; -+ } -+ break; -+ case PHY_INTERFACE_MODE_SGMII: -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { -+ err = mtk_gmac_sgmii_path_setup(eth, mac_id); -+ if (err) -+ return err; -+ } -+ break; -+ case PHY_INTERFACE_MODE_GMII: -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_GEPHY)) { -+ err = mtk_gmac_gephy_path_setup(eth, mac_id); -+ if (err) -+ return err; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -23,6 +23,7 @@ - #include - #include - #include -+#include - #include - - #include "mtk_eth_soc.h" -@@ -54,8 +55,10 @@ static const struct mtk_ethtool_stats { - }; - - static const char * const mtk_clks_source_name[] = { -- "ethif", "esw", "gp0", "gp1", "gp2", "trgpll", "sgmii_tx250m", -- "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", "eth2pll" -+ "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll", -+ "sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", -+ "sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb", -+ "sgmii_ck", "eth2pll", - }; - - void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg) -@@ -84,8 +87,8 @@ static int mtk_mdio_busy_wait(struct mtk - return -1; - } - --static u32 _mtk_mdio_write(struct mtk_eth *eth, u32 phy_addr, -- u32 phy_register, u32 write_data) -+u32 _mtk_mdio_write(struct mtk_eth *eth, u32 phy_addr, -+ u32 phy_register, u32 write_data) - { - if (mtk_mdio_busy_wait(eth)) - return -1; -@@ -103,7 +106,7 @@ static u32 _mtk_mdio_write(struct mtk_et - return 0; - } - --static u32 _mtk_mdio_read(struct mtk_eth *eth, int phy_addr, int phy_reg) -+u32 _mtk_mdio_read(struct mtk_eth *eth, int phy_addr, int phy_reg) - { - u32 d; - -@@ -123,6 +126,34 @@ static u32 _mtk_mdio_read(struct mtk_eth - return d; - } - -+u32 mtk_cl45_ind_read(struct mtk_eth *eth, u32 port, u32 devad, u32 reg, u32 *data) -+{ -+ mutex_lock(ð->mii_bus->mdio_lock); -+ -+ _mtk_mdio_write(eth, port, MII_MMD_ACC_CTL_REG, devad); -+ _mtk_mdio_write(eth, port, MII_MMD_ADDR_DATA_REG, reg); -+ _mtk_mdio_write(eth, port, MII_MMD_ACC_CTL_REG, MMD_OP_MODE_DATA | devad); -+ *data = _mtk_mdio_read(eth, port, MII_MMD_ADDR_DATA_REG); -+ -+ mutex_unlock(ð->mii_bus->mdio_lock); -+ -+ return 0; -+} -+ -+u32 mtk_cl45_ind_write(struct mtk_eth *eth, u32 port, u32 devad, u32 reg, u32 data) -+{ -+ mutex_lock(ð->mii_bus->mdio_lock); -+ -+ _mtk_mdio_write(eth, port, MII_MMD_ACC_CTL_REG, devad); -+ _mtk_mdio_write(eth, port, MII_MMD_ADDR_DATA_REG, reg); -+ _mtk_mdio_write(eth, port, MII_MMD_ACC_CTL_REG, MMD_OP_MODE_DATA | devad); -+ _mtk_mdio_write(eth, port, MII_MMD_ADDR_DATA_REG, data); -+ -+ mutex_unlock(ð->mii_bus->mdio_lock); -+ -+ return 0; -+} -+ - static int mtk_mdio_write(struct mii_bus *bus, int phy_addr, - int phy_reg, u16 val) - { -@@ -165,51 +196,12 @@ static void mtk_gmac0_rgmii_adjust(struc - mtk_w32(eth, val, TRGMII_TCK_CTRL); - } - --static void mtk_gmac_sgmii_hw_setup(struct mtk_eth *eth, int mac_id) --{ -- u32 val; -- -- /* Setup the link timer and QPHY power up inside SGMIISYS */ -- regmap_write(eth->sgmiisys, SGMSYS_PCS_LINK_TIMER, -- SGMII_LINK_TIMER_DEFAULT); -- -- regmap_read(eth->sgmiisys, SGMSYS_SGMII_MODE, &val); -- val |= SGMII_REMOTE_FAULT_DIS; -- regmap_write(eth->sgmiisys, SGMSYS_SGMII_MODE, val); -- -- regmap_read(eth->sgmiisys, SGMSYS_PCS_CONTROL_1, &val); -- val |= SGMII_AN_RESTART; -- regmap_write(eth->sgmiisys, SGMSYS_PCS_CONTROL_1, val); -- -- regmap_read(eth->sgmiisys, SGMSYS_QPHY_PWR_STATE_CTRL, &val); -- val &= ~SGMII_PHYA_PWD; -- regmap_write(eth->sgmiisys, SGMSYS_QPHY_PWR_STATE_CTRL, val); -- -- /* Determine MUX for which GMAC uses the SGMII interface */ -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_DUAL_GMAC_SHARED_SGMII)) { -- regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -- val &= ~SYSCFG0_SGMII_MASK; -- val |= !mac_id ? SYSCFG0_SGMII_GMAC1 : SYSCFG0_SGMII_GMAC2; -- regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); -- -- dev_info(eth->dev, "setup shared sgmii for gmac=%d\n", -- mac_id); -- } -- -- /* Setup the GMAC1 going through SGMII path when SoC also support -- * ESW on GMAC1 -- */ -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_GMAC1_ESW | MTK_GMAC1_SGMII) && -- !mac_id) { -- mtk_w32(eth, 0, MTK_MAC_MISC); -- dev_info(eth->dev, "setup gmac1 going through sgmii"); -- } --} -- - static void mtk_phy_link_adjust(struct net_device *dev) - { - struct mtk_mac *mac = netdev_priv(dev); -+ struct mtk_eth *eth = mac->hw; - u16 lcl_adv = 0, rmt_adv = 0; -+ u32 lcl_eee = 0, rmt_eee = 0; - u8 flowctrl; - u32 mcr = MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG | - MAC_MCR_FORCE_MODE | MAC_MCR_TX_EN | -@@ -229,7 +221,7 @@ static void mtk_phy_link_adjust(struct n - }; - - if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII) && -- !mac->id && !mac->trgmii) -+ !mac->id && !mac->trgmii) - mtk_gmac0_rgmii_adjust(mac->hw, dev->phydev->speed); - - if (dev->phydev->link) -@@ -259,7 +251,16 @@ static void mtk_phy_link_adjust(struct n - flowctrl & FLOW_CTRL_RX ? "enabled" : "disabled", - flowctrl & FLOW_CTRL_TX ? "enabled" : "disabled"); - } -+ /*EEE capability*/ -+ mtk_cl45_ind_read(eth, 0, MDIO_MMD_AN, MDIO_AN_EEE_ADV, &lcl_eee); -+ mtk_cl45_ind_read(eth, 0, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE, &rmt_eee); -+ -+ if ((lcl_eee & rmt_eee & MDIO_EEE_1000T) == MDIO_EEE_1000T) -+ mcr |= MAC_MCR_MDIO_EEE_1000T; -+ if ((lcl_eee & rmt_eee & MDIO_EEE_100TX) == MDIO_EEE_100TX) -+ mcr |= MAC_MCR_MDIO_EEE_100TX; - -+ /*Setup MCR*/ - mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); - - if (dev->phydev->link) -@@ -290,10 +291,10 @@ static int mtk_phy_connect_node(struct m - return -ENODEV; - } - -- dev_info(eth->dev, -- "connected mac %d to PHY at %s [uid=%08x, driver=%s]\n", -- mac->id, phydev_name(phydev), phydev->phy_id, -- phydev->drv->name); -+ dev_info(eth->dev, -+ "connected mac %d to PHY at %s [uid=%08x, driver=%s]\n", -+ mac->id, phydev_name(phydev), phydev->phy_id, -+ phydev->drv->name); - - return 0; - } -@@ -304,6 +305,7 @@ static int mtk_phy_connect(struct net_de - struct mtk_eth *eth; - struct device_node *np; - u32 val; -+ int err; - - eth = mac->hw; - np = of_parse_phandle(mac->of_node, "phy-handle", 0); -@@ -313,6 +315,10 @@ static int mtk_phy_connect(struct net_de - if (!np) - return -ENODEV; - -+ err = mtk_setup_hw_path(eth, mac->id, of_get_phy_mode(np)); -+ if (err) -+ goto err_phy; -+ - mac->ge_mode = 0; - switch (of_get_phy_mode(np)) { - case PHY_INTERFACE_MODE_TRGMII: -@@ -323,10 +329,9 @@ static int mtk_phy_connect(struct net_de - case PHY_INTERFACE_MODE_RGMII: - break; - case PHY_INTERFACE_MODE_SGMII: -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) -- mtk_gmac_sgmii_hw_setup(eth, mac->id); - break; - case PHY_INTERFACE_MODE_MII: -+ case PHY_INTERFACE_MODE_GMII: - mac->ge_mode = 1; - break; - case PHY_INTERFACE_MODE_REVMII: -@@ -355,7 +360,7 @@ static int mtk_phy_connect(struct net_de - dev->phydev->speed = 0; - dev->phydev->duplex = 0; - -- if (of_phy_is_fixed_link(mac->of_node)) -+ if (!strncmp(dev->phydev->drv->name, "Generic", 7)) - dev->phydev->supported |= - SUPPORTED_Pause | SUPPORTED_Asym_Pause; - -@@ -535,37 +540,37 @@ static void mtk_stats_update(struct mtk_ - } - - static void mtk_get_stats64(struct net_device *dev, -- struct rtnl_link_stats64 *storage) -+ struct rtnl_link_stats64 *storage) - { -- struct mtk_mac *mac = netdev_priv(dev); -- struct mtk_hw_stats *hw_stats = mac->hw_stats; -- unsigned int start; -- -- if (netif_running(dev) && netif_device_present(dev)) { -- if (spin_trylock_bh(&hw_stats->stats_lock)) { -- mtk_stats_update_mac(mac); -- spin_unlock_bh(&hw_stats->stats_lock); -- } -- } -- -- do { -- start = u64_stats_fetch_begin_irq(&hw_stats->syncp); -- storage->rx_packets = hw_stats->rx_packets; -- storage->tx_packets = hw_stats->tx_packets; -- storage->rx_bytes = hw_stats->rx_bytes; -- storage->tx_bytes = hw_stats->tx_bytes; -- storage->collisions = hw_stats->tx_collisions; -- storage->rx_length_errors = hw_stats->rx_short_errors + -- hw_stats->rx_long_errors; -- storage->rx_over_errors = hw_stats->rx_overflow; -- storage->rx_crc_errors = hw_stats->rx_fcs_errors; -- storage->rx_errors = hw_stats->rx_checksum_errors; -- storage->tx_aborted_errors = hw_stats->tx_skip; -- } while (u64_stats_fetch_retry_irq(&hw_stats->syncp, start)); -- -- storage->tx_errors = dev->stats.tx_errors; -- storage->rx_dropped = dev->stats.rx_dropped; -- storage->tx_dropped = dev->stats.tx_dropped; -+ struct mtk_mac *mac = netdev_priv(dev); -+ struct mtk_hw_stats *hw_stats = mac->hw_stats; -+ unsigned int start; -+ -+ if (netif_running(dev) && netif_device_present(dev)) { -+ if (spin_trylock_bh(&hw_stats->stats_lock)) { -+ mtk_stats_update_mac(mac); -+ spin_unlock_bh(&hw_stats->stats_lock); -+ } -+ } -+ -+ do { -+ start = u64_stats_fetch_begin_irq(&hw_stats->syncp); -+ storage->rx_packets = hw_stats->rx_packets; -+ storage->tx_packets = hw_stats->tx_packets; -+ storage->rx_bytes = hw_stats->rx_bytes; -+ storage->tx_bytes = hw_stats->tx_bytes; -+ storage->collisions = hw_stats->tx_collisions; -+ storage->rx_length_errors = hw_stats->rx_short_errors + -+ hw_stats->rx_long_errors; -+ storage->rx_over_errors = hw_stats->rx_overflow; -+ storage->rx_crc_errors = hw_stats->rx_fcs_errors; -+ storage->rx_errors = hw_stats->rx_checksum_errors; -+ storage->tx_aborted_errors = hw_stats->tx_skip; -+ } while (u64_stats_fetch_retry_irq(&hw_stats->syncp, start)); -+ -+ storage->tx_errors = dev->stats.tx_errors; -+ storage->rx_dropped = dev->stats.rx_dropped; -+ storage->tx_dropped = dev->stats.tx_dropped; - } - - static inline int mtk_max_frag_size(int mtu) -@@ -605,10 +610,10 @@ static int mtk_init_fq_dma(struct mtk_et - dma_addr_t dma_addr; - int i; - -- eth->scratch_ring = dma_zalloc_coherent(eth->dev, -- cnt * sizeof(struct mtk_tx_dma), -- ð->phy_scratch_ring, -- GFP_ATOMIC); -+ eth->scratch_ring = dma_alloc_coherent(eth->dev, -+ cnt * sizeof(struct mtk_tx_dma), -+ ð->phy_scratch_ring, -+ GFP_ATOMIC | __GFP_ZERO); - if (unlikely(!eth->scratch_ring)) - return -ENOMEM; - -@@ -623,6 +628,7 @@ static int mtk_init_fq_dma(struct mtk_et - if (unlikely(dma_mapping_error(eth->dev, dma_addr))) - return -ENOMEM; - -+ memset(eth->scratch_ring, 0x0, sizeof(struct mtk_tx_dma) * cnt); - phy_ring_tail = eth->phy_scratch_ring + - (sizeof(struct mtk_tx_dma) * (cnt - 1)); - -@@ -673,7 +679,7 @@ static void mtk_tx_unmap(struct mtk_eth - } - tx_buf->flags = 0; - if (tx_buf->skb && -- (tx_buf->skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC)) -+ (tx_buf->skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC)) - dev_kfree_skb_any(tx_buf->skb); - tx_buf->skb = NULL; - } -@@ -689,6 +695,7 @@ static int mtk_tx_map(struct sk_buff *sk - unsigned int nr_frags; - int i, n_desc = 1; - u32 txd4 = 0, fport; -+ u32 qid = 0; - - itxd = ring->next_free; - if (itxd == ring->last_free) -@@ -708,9 +715,10 @@ static int mtk_tx_map(struct sk_buff *sk - if (skb->ip_summed == CHECKSUM_PARTIAL) - txd4 |= TX_DMA_CHKSUM; - -- /* VLAN header offload */ -- if (skb_vlan_tag_present(skb)) -- txd4 |= TX_DMA_INS_VLAN | skb_vlan_tag_get(skb); -+#if defined(CONFIG_NET_MEDIATEK_HW_QOS) -+ qid = skb->mark & (MTK_QDMA_TX_MASK); -+ qid += (!mac->id) ? (MTK_QDMA_TX_MASK + 1) : 0; -+#endif - - mapped_addr = dma_map_single(eth->dev, skb->data, - skb_headlen(skb), DMA_TO_DEVICE); -@@ -727,6 +735,7 @@ static int mtk_tx_map(struct sk_buff *sk - /* TX SG offload */ - txd = itxd; - nr_frags = skb_shinfo(skb)->nr_frags; -+ - for (i = 0; i < nr_frags; i++) { - struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; - unsigned int offset = 0; -@@ -753,10 +762,10 @@ static int mtk_tx_map(struct sk_buff *sk - last_frag = true; - - WRITE_ONCE(txd->txd1, mapped_addr); -- WRITE_ONCE(txd->txd3, (TX_DMA_SWC | -+ WRITE_ONCE(txd->txd3, (TX_DMA_SWC | QID_LOW_BITS(qid) | - TX_DMA_PLEN0(frag_map_size) | - last_frag * TX_DMA_LS0)); -- WRITE_ONCE(txd->txd4, fport); -+ WRITE_ONCE(txd->txd4, fport | QID_HIGH_BITS(qid)); - - tx_buf = mtk_desc_to_tx_buf(ring, txd); - memset(tx_buf, 0, sizeof(*tx_buf)); -@@ -775,9 +784,9 @@ static int mtk_tx_map(struct sk_buff *sk - /* store skb to cleanup */ - itx_buf->skb = skb; - -- WRITE_ONCE(itxd->txd4, txd4); - WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) | -- (!nr_frags * TX_DMA_LS0))); -+ (!nr_frags * TX_DMA_LS0)) | QID_LOW_BITS(qid)); -+ WRITE_ONCE(itxd->txd4, txd4 | QID_HIGH_BITS(qid)); - - netdev_sent_queue(dev, skb->len); - skb_tx_timestamp(skb); -@@ -922,7 +931,7 @@ drop: - return NETDEV_TX_OK; - } - --static struct mtk_rx_ring *mtk_get_rx_ring(struct mtk_eth *eth) -+struct mtk_rx_ring *mtk_get_rx_ring(struct mtk_eth *eth) - { - int i; - struct mtk_rx_ring *ring; -@@ -991,10 +1000,24 @@ static int mtk_poll_rx(struct napi_struc - break; - - /* find out which mac the packet come from. values start at 1 */ -+#if defined(CONFIG_NET_DSA) -+ mac = (trxd.rxd4 >> 22) & 0x1; -+ mac = (mac + 1) % 2; -+#else - mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) & -- RX_DMA_FPORT_MASK; -- mac--; -- -+ RX_DMA_FPORT_MASK; -+ /* From QDMA(5). This is a external interface case of HWNAT. -+ * When the incoming frame comes from an external interface -+ * rather than GMAC1/GMAC2, HWNAT driver sends the original -+ * frame to PPE via PPD(ping pong device) for HWNAT RX -+ * frame learning. After learning, PPE transmit the -+ * original frame back to PPD again to run SW NAT path. -+ */ -+ if (mac == 5) -+ mac = 0; -+ else -+ mac--; -+#endif - if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT || - !eth->netdev[mac])) - goto release_desc; -@@ -1044,6 +1067,7 @@ static int mtk_poll_rx(struct napi_struc - RX_DMA_VID(trxd.rxd3)) - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), - RX_DMA_VID(trxd.rxd3)); -+ - skb_record_rx_queue(skb, 0); - napi_gro_receive(napi, skb); - -@@ -1128,7 +1152,7 @@ static int mtk_poll_tx(struct mtk_eth *e - } - - if (mtk_queue_stopped(eth) && -- (atomic_read(&ring->free_count) > ring->thresh)) -+ (atomic_read(&ring->free_count) > ring->thresh)) - mtk_wake_queue(eth); - - return total; -@@ -1220,11 +1244,14 @@ static int mtk_tx_alloc(struct mtk_eth * - if (!ring->buf) - goto no_tx_mem; - -- ring->dma = dma_zalloc_coherent(eth->dev, MTK_DMA_SIZE * sz, -- &ring->phys, GFP_ATOMIC); -+ ring->dma = dma_alloc_coherent(eth->dev, -+ MTK_DMA_SIZE * sz, -+ &ring->phys, -+ GFP_ATOMIC | __GFP_ZERO); - if (!ring->dma) - goto no_tx_mem; - -+ memset(ring->dma, 0, MTK_DMA_SIZE * sz); - for (i = 0; i < MTK_DMA_SIZE; i++) { - int next = (i + 1) % MTK_DMA_SIZE; - u32 next_ptr = ring->phys + next * sz; -@@ -1317,9 +1344,10 @@ static int mtk_rx_alloc(struct mtk_eth * - return -ENOMEM; - } - -- ring->dma = dma_zalloc_coherent(eth->dev, -- rx_dma_size * sizeof(*ring->dma), -- &ring->phys, GFP_ATOMIC); -+ ring->dma = dma_alloc_coherent(eth->dev, -+ rx_dma_size * sizeof(*ring->dma), -+ &ring->phys, -+ GFP_ATOMIC | __GFP_ZERO); - if (!ring->dma) - return -ENOMEM; - -@@ -1516,8 +1544,8 @@ static int mtk_hwlro_add_ipaddr(struct n - int hwlro_idx; - - if ((fsp->flow_type != TCP_V4_FLOW) || -- (!fsp->h_u.tcp_ip4_spec.ip4dst) || -- (fsp->location > 1)) -+ (!fsp->h_u.tcp_ip4_spec.ip4dst) || -+ (fsp->location > 1)) - return -EINVAL; - - mac->hwlro_ip[fsp->location] = htonl(fsp->h_u.tcp_ip4_spec.ip4dst); -@@ -1744,6 +1772,34 @@ static void mtk_tx_timeout(struct net_de - schedule_work(ð->pending_work); - } - -+static irqreturn_t mtk_handle_irq_tx_rx(int irq, void *_eth) -+{ -+ struct mtk_eth *eth = _eth; -+ u32 tx_status, rx_status; -+ -+ tx_status = mtk_r32(eth, MTK_QMTK_INT_STATUS); -+ -+ if (tx_status & MTK_TX_DONE_INT) { -+ if (likely(napi_schedule_prep(ð->tx_napi))) { -+ mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); -+ __napi_schedule(ð->tx_napi); -+ } -+ mtk_w32(eth, tx_status, MTK_QMTK_INT_STATUS); -+ } -+ -+ rx_status = mtk_r32(eth, MTK_PDMA_INT_STATUS); -+ -+ if (rx_status & MTK_RX_DONE_INT) { -+ if (likely(napi_schedule_prep(ð->rx_napi))) { -+ mtk_rx_irq_disable(eth, MTK_RX_DONE_INT); -+ __napi_schedule(ð->rx_napi); -+ } -+ mtk_w32(eth, rx_status, MTK_PDMA_INT_STATUS); -+ } -+ -+ return IRQ_HANDLED; -+} -+ - static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth) - { - struct mtk_eth *eth = _eth; -@@ -1784,8 +1840,8 @@ static void mtk_poll_controller(struct n - - static int mtk_start_dma(struct mtk_eth *eth) - { -- u32 rx_2b_offset = (NET_IP_ALIGN == 2) ? MTK_RX_2B_OFFSET : 0; - int err; -+ u32 rx_2b_offet = (NET_IP_ALIGN == 2) ? MTK_RX_2B_OFFSET : 0; - - err = mtk_dma_init(eth); - if (err) { -@@ -1801,7 +1857,7 @@ static int mtk_start_dma(struct mtk_eth - MTK_QDMA_GLO_CFG); - - mtk_w32(eth, -- MTK_RX_DMA_EN | rx_2b_offset | -+ MTK_RX_DMA_EN | rx_2b_offet | - MTK_RX_BT_32DWORDS | MTK_MULTI_EN, - MTK_PDMA_GLO_CFG); - -@@ -1814,7 +1870,7 @@ static int mtk_open(struct net_device *d - struct mtk_eth *eth = mac->hw; - - /* we run 2 netdevs on the same dma ring so we only bring it up once */ -- if (!refcount_read(ð->dma_refcnt)) { -+ if (!atomic_read(ð->dma_refcnt)) { - int err = mtk_start_dma(eth); - - if (err) -@@ -1824,10 +1880,8 @@ static int mtk_open(struct net_device *d - napi_enable(ð->rx_napi); - mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); - mtk_rx_irq_enable(eth, MTK_RX_DONE_INT); -- refcount_set(ð->dma_refcnt, 1); - } -- else -- refcount_inc(ð->dma_refcnt); -+ atomic_inc(ð->dma_refcnt); - - phy_start(dev->phydev); - netif_start_queue(dev); -@@ -1867,7 +1921,7 @@ static int mtk_stop(struct net_device *d - phy_stop(dev->phydev); - - /* only shutdown DMA if this is the last user */ -- if (!refcount_dec_and_test(ð->dma_refcnt)) -+ if (!atomic_dec_and_test(ð->dma_refcnt)) - return 0; - - mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); -@@ -1973,14 +2027,16 @@ static int mtk_hw_init(struct mtk_eth *e - val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); - mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); - -- /* Enable RX VLan Offloading */ -- mtk_w32(eth, 1, MTK_CDMP_EG_CTRL); -+ /* Disable RX VLan Offloading */ -+ mtk_w32(eth, 0, MTK_CDMP_EG_CTRL); -+ -+#if defined(CONFIG_NET_DSA) -+ mtk_w32(eth, 0x81000001, MTK_CDMP_IG_CTRL); -+#endif - -- /* enable interrupt delay for RX */ -- mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT); -+ mtk_w32(eth, 0x8f0f8f0f, MTK_PDMA_DELAY_INT); -+ mtk_w32(eth, 0x8f0f8f0f, MTK_QDMA_DELAY_INT); - -- /* disable delay and normal interrupt */ -- mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); - mtk_tx_irq_disable(eth, ~0); - mtk_rx_irq_disable(eth, ~0); - mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); -@@ -2172,27 +2228,27 @@ static int mtk_cleanup(struct mtk_eth *e - } - - static int mtk_get_link_ksettings(struct net_device *ndev, -- struct ethtool_link_ksettings *cmd) -+ struct ethtool_link_ksettings *cmd) - { -- struct mtk_mac *mac = netdev_priv(ndev); -+ struct mtk_mac *mac = netdev_priv(ndev); - -- if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) -- return -EBUSY; -+ if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) -+ return -EBUSY; - -- phy_ethtool_ksettings_get(ndev->phydev, cmd); -+ phy_ethtool_ksettings_get(ndev->phydev, cmd); - -- return 0; -+ return 0; - } - - static int mtk_set_link_ksettings(struct net_device *ndev, -- const struct ethtool_link_ksettings *cmd) -+ const struct ethtool_link_ksettings *cmd) - { -- struct mtk_mac *mac = netdev_priv(ndev); -+ struct mtk_mac *mac = netdev_priv(ndev); - -- if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) -- return -EBUSY; -+ if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) -+ return -EBUSY; - -- return phy_ethtool_ksettings_set(ndev->phydev, cmd); -+ return phy_ethtool_ksettings_set(ndev->phydev, cmd); - } - - static void mtk_get_drvinfo(struct net_device *dev, -@@ -2355,8 +2411,8 @@ static int mtk_set_rxnfc(struct net_devi - } - - static const struct ethtool_ops mtk_ethtool_ops = { -- .get_link_ksettings = mtk_get_link_ksettings, -- .set_link_ksettings = mtk_set_link_ksettings, -+ .get_link_ksettings = mtk_get_link_ksettings, -+ .set_link_ksettings = mtk_set_link_ksettings, - .get_drvinfo = mtk_get_drvinfo, - .get_msglevel = mtk_get_msglevel, - .set_msglevel = mtk_set_msglevel, -@@ -2366,7 +2422,7 @@ static const struct ethtool_ops mtk_etht - .get_sset_count = mtk_get_sset_count, - .get_ethtool_stats = mtk_get_ethtool_stats, - .get_rxnfc = mtk_get_rxnfc, -- .set_rxnfc = mtk_set_rxnfc, -+ .set_rxnfc = mtk_set_rxnfc, - }; - - static const struct net_device_ops mtk_netdev_ops = { -@@ -2463,6 +2519,7 @@ static int mtk_probe(struct platform_dev - { - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct device_node *mac_np; -+ const struct of_device_id *match; - struct mtk_eth *eth; - int err; - int i; -@@ -2471,7 +2528,8 @@ static int mtk_probe(struct platform_dev - if (!eth) - return -ENOMEM; - -- eth->soc = of_device_get_match_data(&pdev->dev); -+ match = of_match_device(of_mtk_match, &pdev->dev); -+ eth->soc = (struct mtk_soc_data *)match->data; - - eth->dev = &pdev->dev; - eth->base = devm_ioremap_resource(&pdev->dev, res); -@@ -2489,26 +2547,37 @@ static int mtk_probe(struct platform_dev - return PTR_ERR(eth->ethsys); - } - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { -- eth->sgmiisys = -- syscon_regmap_lookup_by_phandle(pdev->dev.of_node, -- "mediatek,sgmiisys"); -- if (IS_ERR(eth->sgmiisys)) { -- dev_err(&pdev->dev, "no sgmiisys regmap found\n"); -- return PTR_ERR(eth->sgmiisys); -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_INFRA)) { -+ eth->infra = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, -+ "mediatek,infracfg"); -+ if (IS_ERR(eth->infra)) { -+ dev_info(&pdev->dev, "no ethsys regmap found\n"); -+ return PTR_ERR(eth->infra); - } - } - -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { -+ eth->sgmii = devm_kzalloc(eth->dev, sizeof(*eth->sgmii), -+ GFP_KERNEL); -+ if (!eth->sgmii) -+ return -ENOMEM; -+ -+ err = mtk_sgmii_init(eth->sgmii, pdev->dev.of_node, -+ eth->soc->ana_rgc3); -+ if (err) -+ return err; -+ } -+ - if (eth->soc->required_pctl) { - eth->pctl = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, - "mediatek,pctl"); - if (IS_ERR(eth->pctl)) { -- dev_err(&pdev->dev, "no pctl regmap found\n"); -+ dev_info(&pdev->dev, "no pctl regmap found\n"); - return PTR_ERR(eth->pctl); - } - } - -- for (i = 0; i < 3; i++) { -+ for (i = 0; i < eth->soc->irq_num; i++) { - eth->irq[i] = platform_get_irq(pdev, i); - if (eth->irq[i] < 0) { - dev_err(&pdev->dev, "no IRQ%d resource found\n", i); -@@ -2552,15 +2621,22 @@ static int mtk_probe(struct platform_dev - goto err_deinit_hw; - } - -- err = devm_request_irq(eth->dev, eth->irq[1], mtk_handle_irq_tx, 0, -- dev_name(eth->dev), eth); -- if (err) -- goto err_free_dev; -+ if (eth->soc->irq_num > 1) { -+ err = devm_request_irq(eth->dev, eth->irq[1], mtk_handle_irq_tx, 0, -+ dev_name(eth->dev), eth); -+ if (err) -+ goto err_free_dev; - -- err = devm_request_irq(eth->dev, eth->irq[2], mtk_handle_irq_rx, 0, -- dev_name(eth->dev), eth); -- if (err) -- goto err_free_dev; -+ err = devm_request_irq(eth->dev, eth->irq[2], mtk_handle_irq_rx, 0, -+ dev_name(eth->dev), eth); -+ if (err) -+ goto err_free_dev; -+ } else { -+ err = devm_request_irq(eth->dev, eth->irq[0], mtk_handle_irq_tx_rx, 0, -+ dev_name(eth->dev), eth); -+ if (err) -+ goto err_free_dev; -+ } - - err = mtk_mdio_init(eth); - if (err) -@@ -2626,27 +2702,48 @@ static int mtk_remove(struct platform_de - } - - static const struct mtk_soc_data mt2701_data = { -- .caps = MTK_GMAC1_TRGMII | MTK_HWLRO, -+ .caps = MT7623_CAPS | MTK_HWLRO, - .required_clks = MT7623_CLKS_BITMAP, - .required_pctl = true, -+ .irq_num = 3, - }; - - static const struct mtk_soc_data mt7622_data = { -- .caps = MTK_DUAL_GMAC_SHARED_SGMII | MTK_GMAC1_ESW | MTK_HWLRO, -+ .ana_rgc3 = 0x2028, -+ .caps = MT7622_CAPS | MTK_HWLRO, - .required_clks = MT7622_CLKS_BITMAP, - .required_pctl = false, -+ .irq_num = 3, - }; - - static const struct mtk_soc_data mt7623_data = { -- .caps = MTK_GMAC1_TRGMII | MTK_HWLRO, -+ .caps = MT7623_CAPS | MTK_HWLRO, - .required_clks = MT7623_CLKS_BITMAP, - .required_pctl = true, -+ .irq_num = 3, -+}; -+ -+static const struct mtk_soc_data leopard_data = { -+ .ana_rgc3 = 0x128, -+ .caps = LEOPARD_CAPS | MTK_HWLRO, -+ .required_clks = LEOPARD_CLKS_BITMAP, -+ .required_pctl = false, -+ .irq_num = 3, -+}; -+ -+static const struct mtk_soc_data mt7621_data = { -+ .caps = MT7621_CAPS, -+ .required_clks = MT7621_CLKS_BITMAP, -+ .required_pctl = false, -+ .irq_num = 1, - }; - - const struct of_device_id of_mtk_match[] = { - { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data}, - { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data}, - { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data}, -+ { .compatible = "mediatek,mt7629-eth", .data = &leopard_data}, -+ { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data}, - {}, - }; - MODULE_DEVICE_TABLE(of, of_mtk_match); ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -15,13 +15,17 @@ - #ifndef MTK_ETH_H - #define MTK_ETH_H - -+#include -+#include -+#include -+#include - #include - - #define MTK_QDMA_PAGE_SIZE 2048 - #define MTK_MAX_RX_LENGTH 1536 - #define MTK_TX_DMA_BUF_LEN 0x3fff --#define MTK_DMA_SIZE 256 --#define MTK_NAPI_WEIGHT 64 -+#define MTK_DMA_SIZE 2048 -+#define MTK_NAPI_WEIGHT 256 - #define MTK_MAC_COUNT 2 - #define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN) - #define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN) -@@ -36,8 +40,6 @@ - NETIF_MSG_TX_ERR) - #define MTK_HW_FEATURES (NETIF_F_IP_CSUM | \ - NETIF_F_RXCSUM | \ -- NETIF_F_HW_VLAN_CTAG_TX | \ -- NETIF_F_HW_VLAN_CTAG_RX | \ - NETIF_F_SG | NETIF_F_TSO | \ - NETIF_F_TSO6 | \ - NETIF_F_IPV6_CSUM) -@@ -76,6 +78,9 @@ - #define MTK_CDMQ_IG_CTRL 0x1400 - #define MTK_CDMQ_STAG_EN BIT(0) - -+/* CDMP Ingress Control Register */ -+#define MTK_CDMP_IG_CTRL 0x400 -+ - /* CDMP Exgress Control Register */ - #define MTK_CDMP_EG_CTRL 0x404 - -@@ -225,8 +230,9 @@ - #define MTK_TX_DONE_INT1 BIT(1) - #define MTK_TX_DONE_INT0 BIT(0) - #define MTK_RX_DONE_INT MTK_RX_DONE_DLY --#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \ -- MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3) -+#define MTK_TX_DONE_DLY BIT(28) -+#define MTK_TX_DONE_INT MTK_TX_DONE_DLY -+ - - /* QDMA Interrupt grouping registers */ - #define MTK_QDMA_INT_GRP1 0x1a20 -@@ -267,6 +273,12 @@ - #define MTK_GDM1_TX_GBCNT 0x2400 - #define MTK_STAT_OFFSET 0x40 - -+/* QDMA TX NUM */ -+#define MTK_QDMA_TX_NUM 16 -+#define MTK_QDMA_TX_MASK ((MTK_QDMA_TX_NUM / 2) - 1) -+#define QID_LOW_BITS(x) ((x) & 0xf) -+#define QID_HIGH_BITS(x) ((((x) >> 4) & 0x3) & GENMASK(21, 20)) -+ - /* QDMA descriptor txd4 */ - #define TX_DMA_CHKSUM (0x7 << 29) - #define TX_DMA_TSO BIT(28) -@@ -316,6 +328,8 @@ - #define MAC_MCR_RX_EN BIT(13) - #define MAC_MCR_BACKOFF_EN BIT(9) - #define MAC_MCR_BACKPR_EN BIT(8) -+#define MAC_MCR_MDIO_EEE_1000T BIT(7) -+#define MAC_MCR_MDIO_EEE_100TX BIT(6) - #define MAC_MCR_FORCE_RX_FC BIT(5) - #define MAC_MCR_FORCE_TX_FC BIT(4) - #define MAC_MCR_SPEED_1000 BIT(3) -@@ -368,9 +382,11 @@ - #define ETHSYS_SYSCFG0 0x14 - #define SYSCFG0_GE_MASK 0x3 - #define SYSCFG0_GE_MODE(x, y) (x << (12 + (y * 2))) --#define SYSCFG0_SGMII_MASK (3 << 8) --#define SYSCFG0_SGMII_GMAC1 ((2 << 8) & GENMASK(9, 8)) --#define SYSCFG0_SGMII_GMAC2 ((3 << 8) & GENMASK(9, 8)) -+#define SYSCFG0_SGMII_MASK GENMASK(9, 8) -+#define SYSCFG0_SGMII_GMAC1 ((2 << 8) & SYSCFG0_SGMII_MASK) -+#define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) -+#define SYSCFG0_SGMII_GMAC1_V2 BIT(9) -+#define SYSCFG0_SGMII_GMAC2_V2 BIT(8) - - /* ethernet subsystem clock register */ - #define ETHSYS_CLKCFG0 0x2c -@@ -398,6 +414,16 @@ - #define SGMSYS_QPHY_PWR_STATE_CTRL 0xe8 - #define SGMII_PHYA_PWD BIT(4) - -+/* Infrasys subsystem config registers */ -+#define INFRA_MISC2 0x70c -+#define CO_QPHY_SEL BIT(0) -+#define GEPHY_MAC_SEL BIT(1) -+ -+/*MDIO control*/ -+#define MII_MMD_ACC_CTL_REG 0x0d -+#define MII_MMD_ADDR_DATA_REG 0x0e -+#define MMD_OP_MODE_DATA BIT(14) -+ - struct mtk_rx_dma { - unsigned int rxd1; - unsigned int rxd2; -@@ -462,15 +488,21 @@ enum mtk_tx_flags { - */ - enum mtk_clks_map { - MTK_CLK_ETHIF, -+ MTK_CLK_SGMIITOP, - MTK_CLK_ESW, - MTK_CLK_GP0, - MTK_CLK_GP1, - MTK_CLK_GP2, -+ MTK_CLK_FE, - MTK_CLK_TRGPLL, - MTK_CLK_SGMII_TX_250M, - MTK_CLK_SGMII_RX_250M, - MTK_CLK_SGMII_CDR_REF, - MTK_CLK_SGMII_CDR_FB, -+ MTK_CLK_SGMII2_TX_250M, -+ MTK_CLK_SGMII2_RX_250M, -+ MTK_CLK_SGMII2_CDR_REF, -+ MTK_CLK_SGMII2_CDR_FB, - MTK_CLK_SGMII_CK, - MTK_CLK_ETH2PLL, - MTK_CLK_MAX -@@ -488,6 +520,22 @@ enum mtk_clks_map { - BIT(MTK_CLK_SGMII_CDR_FB) | \ - BIT(MTK_CLK_SGMII_CK) | \ - BIT(MTK_CLK_ETH2PLL)) -+#define LEOPARD_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ -+ BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ -+ BIT(MTK_CLK_GP2) | BIT(MTK_CLK_FE) | \ -+ BIT(MTK_CLK_SGMII_TX_250M) | \ -+ BIT(MTK_CLK_SGMII_RX_250M) | \ -+ BIT(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT(MTK_CLK_SGMII2_CDR_REF) | \ -+ BIT(MTK_CLK_SGMII2_CDR_FB) | \ -+ BIT(MTK_CLK_SGMII_CK) | \ -+ BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP)) -+ -+#define MT7621_CLKS_BITMAP 0 -+ - enum mtk_dev_state { - MTK_HW_INIT, - MTK_RESETTING -@@ -557,35 +605,149 @@ struct mtk_rx_ring { - u32 crx_idx_reg; - }; - --#define MTK_TRGMII BIT(0) --#define MTK_GMAC1_TRGMII (BIT(1) | MTK_TRGMII) --#define MTK_ESW BIT(4) --#define MTK_GMAC1_ESW (BIT(5) | MTK_ESW) --#define MTK_SGMII BIT(8) --#define MTK_GMAC1_SGMII (BIT(9) | MTK_SGMII) --#define MTK_GMAC2_SGMII (BIT(10) | MTK_SGMII) --#define MTK_DUAL_GMAC_SHARED_SGMII (BIT(11) | MTK_GMAC1_SGMII | \ -- MTK_GMAC2_SGMII) -+enum mtk_eth_mux { -+ MTK_ETH_MUX_GDM1_TO_GMAC1_ESW, -+ MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY, -+ MTK_ETH_MUX_U3_GMAC2_TO_QPHY, -+ MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII, -+ MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII, -+ MTK_ETH_MUX_MAX, -+}; -+ -+enum mtk_eth_path { -+ MTK_ETH_PATH_GMAC1_RGMII, -+ MTK_ETH_PATH_GMAC1_TRGMII, -+ MTK_ETH_PATH_GMAC1_SGMII, -+ MTK_ETH_PATH_GMAC2_RGMII, -+ MTK_ETH_PATH_GMAC2_SGMII, -+ MTK_ETH_PATH_GMAC2_GEPHY, -+ MTK_ETH_PATH_GDM1_ESW, -+ MTK_ETH_PATH_MAX, -+}; -+ -+/* Capability for function group */ -+#define MTK_RGMII BIT(0) -+#define MTK_TRGMII BIT(1) -+#define MTK_SGMII BIT(2) -+#define MTK_ESW BIT(3) -+#define MTK_GEPHY BIT(4) -+#define MTK_MUX BIT(5) -+#define MTK_INFRA BIT(6) -+#define MTK_SHARED_SGMII BIT(7) -+ -+/* Capability for features on SoCs */ -+#define MTK_PATH_BIT(x) BIT((x) + 10) -+ -+#define MTK_GMAC1_RGMII \ -+ (MTK_PATH_BIT(MTK_ETH_PATH_GMAC1_RGMII) | MTK_RGMII) -+ -+#define MTK_GMAC1_TRGMII \ -+ (MTK_PATH_BIT(MTK_ETH_PATH_GMAC1_TRGMII) | MTK_TRGMII) -+ -+#define MTK_GMAC1_SGMII \ -+ (MTK_PATH_BIT(MTK_ETH_PATH_GMAC1_SGMII) | MTK_SGMII) -+ -+#define MTK_GMAC2_RGMII \ -+ (MTK_PATH_BIT(MTK_ETH_PATH_GMAC2_RGMII) | MTK_RGMII) -+ -+#define MTK_GMAC2_SGMII \ -+ (MTK_PATH_BIT(MTK_ETH_PATH_GMAC2_SGMII) | MTK_SGMII) -+ -+#define MTK_GMAC2_GEPHY \ -+ (MTK_PATH_BIT(MTK_ETH_PATH_GMAC2_GEPHY) | MTK_GEPHY) -+ -+#define MTK_GDM1_ESW \ -+ (MTK_PATH_BIT(MTK_ETH_PATH_GDM1_ESW) | MTK_ESW) -+ -+#define MTK_MUX_BIT(x) BIT((x) + 20) -+ -+/* Capability for MUXes present on SoCs */ -+/* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */ -+#define MTK_MUX_GDM1_TO_GMAC1_ESW \ -+ (MTK_MUX_BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW) | MTK_MUX) -+ -+/* 0: GMAC2 -> GEPHY, 1: GMAC0 -> GePHY */ -+#define MTK_MUX_GMAC2_GMAC0_TO_GEPHY \ -+ (MTK_MUX_BIT(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY) | MTK_MUX | MTK_INFRA) -+ -+/* 0: U3 -> QPHY, 1: GMAC2 -> QPHY */ -+#define MTK_MUX_U3_GMAC2_TO_QPHY \ -+ (MTK_MUX_BIT(MTK_ETH_MUX_U3_GMAC2_TO_QPHY) | MTK_MUX | MTK_INFRA) -+ -+/* 2: GMAC1 -> SGMII, 3: GMAC2 -> SGMII */ -+#define MTK_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \ -+ (MTK_MUX_BIT(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII) | MTK_MUX | \ -+ MTK_SHARED_SGMII) -+ -+/* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */ -+#define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ -+ (MTK_MUX_BIT(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII) | MTK_MUX) -+ - #define MTK_HWLRO BIT(12) -+ - #define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x)) - -+#define MT7622_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_SGMII | MTK_GMAC2_RGMII | \ -+ MTK_GMAC2_SGMII | MTK_GDM1_ESW | \ -+ MTK_MUX_GDM1_TO_GMAC1_ESW | \ -+ MTK_MUX_GMAC1_GMAC2_TO_SGMII_RGMII) -+ -+#define MT7623_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | MTK_GMAC2_RGMII) -+ -+#define LEOPARD_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ -+ MTK_GDM1_ESW | MTK_MUX_GDM1_TO_GMAC1_ESW | \ -+ MTK_MUX_GMAC2_GMAC0_TO_GEPHY | \ -+ MTK_MUX_U3_GMAC2_TO_QPHY | \ -+ MTK_MUX_GMAC12_TO_GEPHY_SGMII) -+ -+#define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | MTK_GMAC2_RGMII) -+ - /* struct mtk_eth_data - This is the structure holding all differences - * among various plaforms -+ * @ana_rgc3: The offset for register ANA_RGC3 related to -+ * sgmiisys syscon - * @caps Flags shown the extra capability for the SoC - * @required_clks Flags shown the bitmap for required clocks on - * the target SoC - * @required_pctl A bool value to show whether the SoC requires - * the extra setup for those pins used by GMAC. -+ * @irq_num total eth irq num support in target SoC - */ - struct mtk_soc_data { -+ u32 ana_rgc3; - u32 caps; - u32 required_clks; - bool required_pctl; -+ u32 irq_num; - }; - - /* currently no SoC has more than 2 macs */ - #define MTK_MAX_DEVS 2 - -+struct mtk_eth_debug { -+ struct dentry *root; -+}; -+ -+#define MTK_SGMII_PHYSPEED_AN BIT(31) -+#define MTK_SGMII_PHYSPEED_MASK GENMASK(0, 2) -+#define MTK_SGMII_PHYSPEED_1000 BIT(0) -+#define MTK_SGMII_PHYSPEED_2500 BIT(1) -+#define MTK_HAS_FLAGS(flags, _x) (((flags) & (_x)) == (_x)) -+ -+/* struct mtk_sgmii - This is the structure holding sgmii regmap and its -+ * characteristics -+ * @regmap: The register map pointing at the range used to setup -+ * SGMII modes -+ * @flags: The enum refers to which mode the sgmii wants to run on -+ * @ana_rgc3: The offset refers to register ANA_RGC3 related to regmap -+ */ -+ -+struct mtk_sgmii { -+ struct regmap *regmap[MTK_MAX_DEVS]; -+ u32 flags[MTK_MAX_DEVS]; -+ u32 ana_rgc3; -+}; -+ - /* struct mtk_eth - This is the main datasructure for holding the state - * of the driver - * @dev: The device pointer -@@ -601,14 +763,15 @@ struct mtk_soc_data { - * @msg_enable: Ethtool msg level - * @ethsys: The register map pointing at the range used to setup - * MII modes -- * @sgmiisys: The register map pointing at the range used to setup -- * SGMII modes -+ * @infra: The register map pointing at the range used to setup -+ * SGMII and GePHY path - * @pctl: The register map pointing at the range used to setup - * GMAC port drive/slew values - * @dma_refcnt: track how many netdevs are using the DMA engine - * @tx_ring: Pointer to the memory holding info about the TX ring - * @rx_ring: Pointer to the memory holding info about the RX ring -- * @rx_ring_qdma: Pointer to the memory holding info about the QDMA RX ring -+ * @rx_ring_qdma: Pointer to the memory holding info about the QDMA RX -+ * ring - * @tx_napi: The TX NAPI struct - * @rx_napi: The RX NAPI struct - * @scratch_ring: Newer SoCs need memory for a second HW managed TX ring -@@ -619,13 +782,16 @@ struct mtk_soc_data { - * @pending_work: The workqueue used to reset the dma ring - * @state: Initialization and runtime state of the device - * @soc: Holding specific data among vaious SoCs -+ * @debug: Holding specific data for mtk_eth_dbg usage. - */ - - struct mtk_eth { - struct device *dev; - void __iomem *base; - spinlock_t page_lock; -+ /* spin_lock for enable/disable tx irq critial section */ - spinlock_t tx_irq_lock; -+ /* spin_lock for enable/disable rx irq critial section */ - spinlock_t rx_irq_lock; - struct net_device dummy_dev; - struct net_device *netdev[MTK_MAX_DEVS]; -@@ -634,10 +800,11 @@ struct mtk_eth { - u32 msg_enable; - unsigned long sysclk; - struct regmap *ethsys; -- struct regmap *sgmiisys; -+ struct regmap *infra; -+ struct mtk_sgmii *sgmii; - struct regmap *pctl; - bool hwlro; -- refcount_t dma_refcnt; -+ atomic_t dma_refcnt; - struct mtk_tx_ring tx_ring; - struct mtk_rx_ring rx_ring[MTK_MAX_RX_RING_NUM]; - struct mtk_rx_ring rx_ring_qdma; -@@ -653,6 +820,7 @@ struct mtk_eth { - unsigned long state; - - const struct mtk_soc_data *soc; -+ struct mtk_eth_debug debug; - }; - - /* struct mtk_mac - the structure that holds the info about the MACs of the -@@ -664,6 +832,7 @@ struct mtk_eth { - * @hw_stats: Packet statistics counter - * @trgmii Indicate if the MAC uses TRGMII connected to internal - switch -+ * @phy_dev: The attached PHY if available - */ - struct mtk_mac { - int id; -@@ -674,6 +843,7 @@ struct mtk_mac { - __be32 hwlro_ip[MTK_MAX_LRO_IP_CNT]; - int hwlro_ip_cnt; - bool trgmii; -+ struct phy_device *phy_dev; - }; - - /* the struct describing the SoC. these are declared in the soc_xyz.c files */ -@@ -685,4 +855,10 @@ void mtk_stats_update_mac(struct mtk_mac - void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg); - u32 mtk_r32(struct mtk_eth *eth, unsigned reg); - -+int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *np, -+ u32 ana_rgc3); -+int mtk_sgmii_setup_mode_an(struct mtk_sgmii *ss, int id); -+int mtk_sgmii_setup_mode_force(struct mtk_sgmii *ss, int id); -+int mtk_setup_hw_path(struct mtk_eth *eth, int mac_id, int phymode); -+ - #endif /* MTK_ETH_H */ ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c -@@ -0,0 +1,114 @@ -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; version 2 of the License -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Copyright (C) 2018 Sean Wang -+ */ -+ -+#include -+#include -+#include -+ -+#include "mtk_eth_soc.h" -+ -+int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *r, u32 ana_rgc3) -+{ -+ struct device_node *np; -+ const char *str; -+ int i, err; -+ -+ ss->ana_rgc3 = ana_rgc3; -+ -+ for (i = 0; i < MTK_MAX_DEVS; i++) { -+ np = of_parse_phandle(r, "mediatek,sgmiisys", i); -+ if (!np) -+ break; -+ -+ ss->regmap[i] = syscon_node_to_regmap(np); -+ if (IS_ERR(ss->regmap[i])) -+ return PTR_ERR(ss->regmap[i]); -+ -+ err = of_property_read_string(np, "mediatek,physpeed", &str); -+ if (err) -+ return err; -+ -+ if (!strcmp(str, "2500")) -+ pr_info("sean debug physpeed = 2500\n"); -+ -+ if (!strcmp(str, "2500")) -+ ss->flags[i] |= MTK_SGMII_PHYSPEED_2500; -+ else if (!strcmp(str, "1000")) -+ ss->flags[i] |= MTK_SGMII_PHYSPEED_1000; -+ else if (!strcmp(str, "auto")) -+ ss->flags[i] |= MTK_SGMII_PHYSPEED_AN; -+ else -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+int mtk_sgmii_setup_mode_an(struct mtk_sgmii *ss, int id) -+{ -+ unsigned int val; -+ -+ if (!ss->regmap[id]) -+ return -EINVAL; -+ -+ /* Setup the link timer and QPHY power up inside SGMIISYS */ -+ regmap_write(ss->regmap[id], SGMSYS_PCS_LINK_TIMER, -+ SGMII_LINK_TIMER_DEFAULT); -+ -+ regmap_read(ss->regmap[id], SGMSYS_SGMII_MODE, &val); -+ val |= SGMII_REMOTE_FAULT_DIS; -+ regmap_write(ss->regmap[id], SGMSYS_SGMII_MODE, val); -+ -+ regmap_read(ss->regmap[id], SGMSYS_PCS_CONTROL_1, &val); -+ val |= SGMII_AN_RESTART; -+ regmap_write(ss->regmap[id], SGMSYS_PCS_CONTROL_1, val); -+ -+ regmap_read(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, &val); -+ val &= ~SGMII_PHYA_PWD; -+ regmap_write(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, val); -+ -+ return 0; -+} -+ -+int mtk_sgmii_setup_mode_force(struct mtk_sgmii *ss, int id) -+{ -+ unsigned int val; -+ int mode; -+ -+ if (!ss->regmap[id]) -+ return -EINVAL; -+ -+ regmap_read(ss->regmap[id], ss->ana_rgc3, &val); -+ val &= ~GENMASK(2, 3); -+ mode = ss->flags[id] & MTK_SGMII_PHYSPEED_MASK; -+ val |= (mode == MTK_SGMII_PHYSPEED_1000) ? 0 : BIT(2); -+ regmap_write(ss->regmap[id], ss->ana_rgc3, val); -+ -+ /* disable SGMII AN */ -+ regmap_read(ss->regmap[id], SGMSYS_PCS_CONTROL_1, &val); -+ val &= ~BIT(12); -+ regmap_write(ss->regmap[id], SGMSYS_PCS_CONTROL_1, val); -+ -+ /* SGMII force mode setting */ -+ val = 0x31120019; -+ regmap_write(ss->regmap[id], SGMSYS_SGMII_MODE, val); -+ -+ /* Release PHYA power down state */ -+ regmap_read(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, &val); -+ val &= ~SGMII_PHYA_PWD; -+ regmap_write(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, val); -+ -+ return 0; -+} diff --git a/target/linux/mediatek/patches-4.19/0002-Revert-ARM-mediatek-add-MT7623a-smp-bringup-code.patch b/target/linux/mediatek/patches-4.19/0002-Revert-ARM-mediatek-add-MT7623a-smp-bringup-code.patch deleted file mode 100644 index fcbe09dde7..0000000000 --- a/target/linux/mediatek/patches-4.19/0002-Revert-ARM-mediatek-add-MT7623a-smp-bringup-code.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 2663146427cedb9d7582cfa481d5d5611fb3138a Mon Sep 17 00:00:00 2001 -From: Ryder Lee -Date: Tue, 29 Jan 2019 12:28:48 +0800 -Subject: [PATCH] Revert "ARM: mediatek: add MT7623a smp bringup code" - -This reverts commit 3b99ab7deca1e5f4229b4bdecd005d71e22cfc60. - -The compatible "mediatek,mt7623a" is useless, so remove it. - -Signed-off-by: Ryder Lee -Signed-off-by: Matthias Brugger ---- - arch/arm/mach-mediatek/mediatek.c | 2 -- - arch/arm/mach-mediatek/platsmp.c | 1 - - 2 files changed, 3 deletions(-) - ---- a/arch/arm/mach-mediatek/mediatek.c -+++ b/arch/arm/mach-mediatek/mediatek.c -@@ -30,7 +30,6 @@ static void __init mediatek_timer_init(v - - if (of_machine_is_compatible("mediatek,mt6589") || - of_machine_is_compatible("mediatek,mt7623") || -- of_machine_is_compatible("mediatek,mt7623a") || - of_machine_is_compatible("mediatek,mt8135") || - of_machine_is_compatible("mediatek,mt8127")) { - /* turn on GPT6 which ungates arch timer clocks */ -@@ -50,7 +49,6 @@ static const char * const mediatek_board - "mediatek,mt6589", - "mediatek,mt6592", - "mediatek,mt7623", -- "mediatek,mt7623a", - "mediatek,mt8127", - "mediatek,mt8135", - NULL, ---- a/arch/arm/mach-mediatek/platsmp.c -+++ b/arch/arm/mach-mediatek/platsmp.c -@@ -60,7 +60,6 @@ static const struct of_device_id mtk_tz_ - static const struct of_device_id mtk_smp_boot_infos[] __initconst = { - { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot }, - { .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot }, -- { .compatible = "mediatek,mt7623a", .data = &mtk_mt7623_boot }, - {}, - }; - diff --git a/target/linux/mediatek/patches-4.19/0002-eth-fix-dsa-support.patch b/target/linux/mediatek/patches-4.19/0002-eth-fix-dsa-support.patch deleted file mode 100644 index 6c90222517..0000000000 --- a/target/linux/mediatek/patches-4.19/0002-eth-fix-dsa-support.patch +++ /dev/null @@ -1,34 +0,0 @@ ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -999,11 +999,6 @@ static int mtk_poll_rx(struct napi_struc - if (!(trxd.rxd2 & RX_DMA_DONE)) - break; - -- /* find out which mac the packet come from. values start at 1 */ --#if defined(CONFIG_NET_DSA) -- mac = (trxd.rxd4 >> 22) & 0x1; -- mac = (mac + 1) % 2; --#else - mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) & - RX_DMA_FPORT_MASK; - /* From QDMA(5). This is a external interface case of HWNAT. -@@ -1017,7 +1012,7 @@ static int mtk_poll_rx(struct napi_struc - mac = 0; - else - mac--; --#endif -+ - if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT || - !eth->netdev[mac])) - goto release_desc; -@@ -2030,10 +2025,6 @@ static int mtk_hw_init(struct mtk_eth *e - /* Disable RX VLan Offloading */ - mtk_w32(eth, 0, MTK_CDMP_EG_CTRL); - --#if defined(CONFIG_NET_DSA) -- mtk_w32(eth, 0x81000001, MTK_CDMP_IG_CTRL); --#endif -- - mtk_w32(eth, 0x8f0f8f0f, MTK_PDMA_DELAY_INT); - mtk_w32(eth, 0x8f0f8f0f, MTK_QDMA_DELAY_INT); - diff --git a/target/linux/mediatek/patches-4.19/0003-arm-mediatek-add-MT7629-smp-bring-up-code.patch b/target/linux/mediatek/patches-4.19/0003-arm-mediatek-add-MT7629-smp-bring-up-code.patch deleted file mode 100644 index 73de655c5f..0000000000 --- a/target/linux/mediatek/patches-4.19/0003-arm-mediatek-add-MT7629-smp-bring-up-code.patch +++ /dev/null @@ -1,48 +0,0 @@ -From a43379dddf1ba14b6a9d50d95175117bbdf52ed2 Mon Sep 17 00:00:00 2001 -From: Ryder Lee -Date: Tue, 29 Jan 2019 12:31:18 +0800 -Subject: [PATCH] arm: mediatek: add MT7629 smp bring up code - -Add support for booting secondary CPUs on MT7629. - -Signed-off-by: Ryder Lee -Signed-off-by: Matthias Brugger ---- - arch/arm/mach-mediatek/Kconfig | 4 ++++ - arch/arm/mach-mediatek/mediatek.c | 1 + - arch/arm/mach-mediatek/platsmp.c | 1 + - 3 files changed, 6 insertions(+) - ---- a/arch/arm/mach-mediatek/Kconfig -+++ b/arch/arm/mach-mediatek/Kconfig -@@ -26,6 +26,10 @@ config MACH_MT7623 - bool "MediaTek MT7623 SoCs support" - default ARCH_MEDIATEK - -+config MACH_MT7629 -+ bool "MediaTek MT7629 SoCs support" -+ default ARCH_MEDIATEK -+ - config MACH_MT8127 - bool "MediaTek MT8127 SoCs support" - default ARCH_MEDIATEK ---- a/arch/arm/mach-mediatek/mediatek.c -+++ b/arch/arm/mach-mediatek/mediatek.c -@@ -49,6 +49,7 @@ static const char * const mediatek_board - "mediatek,mt6589", - "mediatek,mt6592", - "mediatek,mt7623", -+ "mediatek,mt7629", - "mediatek,mt8127", - "mediatek,mt8135", - NULL, ---- a/arch/arm/mach-mediatek/platsmp.c -+++ b/arch/arm/mach-mediatek/platsmp.c -@@ -60,6 +60,7 @@ static const struct of_device_id mtk_tz_ - static const struct of_device_id mtk_smp_boot_infos[] __initconst = { - { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot }, - { .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot }, -+ { .compatible = "mediatek,mt7629", .data = &mtk_mt7623_boot }, - {}, - }; - diff --git a/target/linux/mediatek/patches-4.19/0003-mt7531-gsw-internal_phy_calibration.patch b/target/linux/mediatek/patches-4.19/0003-mt7531-gsw-internal_phy_calibration.patch deleted file mode 100644 index db22cc2189..0000000000 --- a/target/linux/mediatek/patches-4.19/0003-mt7531-gsw-internal_phy_calibration.patch +++ /dev/null @@ -1,1261 +0,0 @@ ---- a/drivers/net/phy/mtk/mt753x/Makefile -+++ b/drivers/net/phy/mtk/mt753x/Makefile -@@ -8,4 +8,4 @@ mt753x-$(CONFIG_SWCONFIG) += mt753x_swco - - mt753x-y += mt753x_mdio.o mt7530.o mt7531.o \ - mt753x_common.o mt753x_vlan.o \ -- mt753x_nl.o -+ mt753x_nl.o mt753x_phy.o ---- a/drivers/net/phy/mtk/mt753x/mt7531.c -+++ b/drivers/net/phy/mtk/mt753x/mt7531.c -@@ -585,6 +585,27 @@ static void mt7531_core_pll_setup(struct - - static int mt7531_internal_phy_calibration(struct gsw_mt753x *gsw) - { -+ u32 i, val; -+ int ret; -+ -+ dev_info(gsw->dev,">>>>>>>>>>>>>>>>>>>>>>>>>>>>> START CALIBRATION:\n"); -+ -+ /* gphy value from sw path */ -+ val = gsw->mmd_read(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403); -+ val |= GBE_EFUSE_SETTING; -+ gsw->mmd_write(gsw, 0, PHY_DEV1F, PHY_DEV1F_REG_403, val); -+ -+ for (i = 0; i < 5; i++) { -+ dev_info(gsw->dev, "-------- gephy-calbration (port:%d) --------\n", -+ i); -+ ret = mt753x_phy_calibration(gsw, i); -+ -+ /* set Auto-negotiation with giga extension. */ -+ gsw->mii_write(gsw, i, 0, 0x1340); -+ if (ret) -+ return ret; -+ } -+ - return 0; - } - ---- a/drivers/net/phy/mtk/mt753x/mt753x.h -+++ b/drivers/net/phy/mtk/mt753x/mt753x.h -@@ -129,6 +129,8 @@ void mt753x_mmd_ind_write(struct gsw_mt7 - void mt753x_irq_worker(struct work_struct *work); - void mt753x_irq_enable(struct gsw_mt753x *gsw); - -+int mt753x_phy_calibration(struct gsw_mt753x *gsw, u8 phyaddr); -+ - /* MDIO Indirect Access Registers */ - #define MII_MMD_ACC_CTL_REG 0x0d - #define MMD_CMD_S 14 ---- /dev/null -+++ b/drivers/net/phy/mtk/mt753x/mt753x_phy.c -@@ -0,0 +1,1061 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Common part for MediaTek MT753x gigabit switch -+ * -+ * Copyright (C) 2018 MediaTek Inc. All Rights Reserved. -+ * -+ * Author: Weijie Gao -+ */ -+ -+#include -+#include -+ -+#include "mt753x.h" -+#include "mt753x_regs.h" -+#include "mt753x_phy.h" -+ -+u32 tc_phy_read_dev_reg(struct gsw_mt753x *gsw, u32 port_num, u32 dev_addr, u32 reg_addr) -+{ -+ u32 phy_val; -+ phy_val = gsw->mmd_read(gsw, port_num, dev_addr, reg_addr); -+ -+ //printk("switch phy cl45 r %d 0x%x 0x%x = %x\n",port_num, dev_addr, reg_addr, phy_val); -+ //switch_phy_read_cl45(port_num, dev_addr, reg_addr, &phy_val); -+ return phy_val; -+} -+ -+void tc_phy_write_dev_reg(struct gsw_mt753x *gsw, u32 port_num, u32 dev_addr, u32 reg_addr, u32 write_data) -+{ -+ u32 phy_val; -+ gsw->mmd_write(gsw, port_num, dev_addr, reg_addr, write_data); -+ phy_val = gsw->mmd_read(gsw, port_num, dev_addr, reg_addr); -+ //printk("switch phy cl45 w %d 0x%x 0x%x 0x%x --> read back 0x%x\n",port_num, dev_addr, reg_addr, write_data, phy_val); -+ //switch_phy_write_cl45(port_num, dev_addr, reg_addr, write_data); -+} -+ -+void switch_phy_write(struct gsw_mt753x *gsw, u32 port_num, u32 reg_addr, u32 write_data){ -+ gsw->mii_write(gsw, port_num, reg_addr, write_data); -+} -+ -+u32 switch_phy_read(struct gsw_mt753x *gsw, u32 port_num, u32 reg_addr){ -+ return gsw->mii_read(gsw, port_num, reg_addr); -+} -+ -+const u8 MT753x_ZCAL_TO_R50ohm_GE_TBL_100[64] = { -+ 127, 127, 127, 127, 127, 127, 127, 127, -+ 127, 127, 127, 127, 127, 123, 122, 117, -+ 115, 112, 103, 100, 98, 87, 85, 83, -+ 81, 72, 70, 68, 66, 64, 55, 53, -+ 52, 50, 49, 48, 38, 36, 35, 34, -+ 33, 32, 22, 21, 20, 19, 18, 17, -+ 16, 7, 6, 5, 4, 3, 2, 1, -+ 0, 0, 0, 0, 0, 0, 0, 0 -+}; -+ -+const u8 MT753x_TX_OFFSET_TBL[64] = { -+ 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, -+ 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, -+ 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9, 0x8, -+ 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1, 0x0, -+ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, -+ 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, -+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, -+ 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f -+}; -+ -+u8 ge_cal_flag; -+ -+u8 all_ge_ana_cal_wait(struct gsw_mt753x *gsw, u32 delay, u32 phyaddr) // for EN7512 -+{ -+ u8 all_ana_cal_status; -+ u32 cnt, tmp_1e_17c; -+ //tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x017c, 0x0001); // da_calin_flag pull high -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0x0001); -+ //printk("delay = %d\n", delay); -+ -+ cnt = 10000; -+ do { -+ udelay(delay); -+ cnt--; -+ all_ana_cal_status = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x17b) & 0x1; -+ -+ } while ((all_ana_cal_status == 0) && (cnt != 0)); -+ -+ -+ if(all_ana_cal_status == 1) { -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0); -+ return all_ana_cal_status; -+ } else { -+ tmp_1e_17c = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x17c); -+ if ((tmp_1e_17c & 0x1) != 1) { -+ pr_info("FIRST MDC/MDIO write error\n"); -+ pr_info("FIRST 1e_17c = %x\n", tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x17c)); -+ -+ } -+ printk("re-K again\n"); -+ -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0x0001); -+ cnt = 10000; -+ do { -+ udelay(delay); -+ cnt--; -+ tmp_1e_17c = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x17c); -+ if ((tmp_1e_17c & 0x1) != 1) { -+ pr_info("SECOND MDC/MDIO write error\n"); -+ pr_info("SECOND 1e_17c = %x\n", tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x17c)); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0x0001); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0x0001); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0x0001); -+ } -+ } while ((cnt != 0) && (tmp_1e_17c == 0)); -+ -+ cnt = 10000; -+ do { -+ udelay(delay); -+ cnt--; -+ all_ana_cal_status = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x17b) & 0x1; -+ -+ } while ((all_ana_cal_status == 0) && (cnt != 0)); -+ -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x17c, 0); -+ } -+ -+ if(all_ana_cal_status == 0){ -+ pr_info("!!!!!!!!!!!! dev1Eh_reg17b ERROR\n"); -+ } -+ -+ return all_ana_cal_status; -+} -+ -+ -+ -+ -+int ge_cal_rext(struct gsw_mt753x *gsw, u8 phyaddr, u32 delay) -+{ -+ u8 rg_zcal_ctrl, all_ana_cal_status; -+ u16 ad_cal_comp_out_init; -+ u16 dev1e_e0_ana_cal_r5; -+ int calibration_polarity; -+ u8 cnt = 0; -+ u16 dev1e_17a_tmp, dev1e_e0_tmp; -+ -+ /* *** Iext/Rext Cal start ************ */ -+ all_ana_cal_status = ANACAL_INIT; -+ /* analog calibration enable, Rext calibration enable */ -+ /* 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a */ -+ /* 1e_dc[0]:rg_txvos_calen */ -+ /* 1e_e1[4]:rg_cal_refsel(0:1.2V) */ -+ //tc_phy_write_dev_reg(phyaddr, 0x1e, 0x00db, 0x1110) -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00db, 0x1110); -+ //tc_phy_write_dev_reg(phyaddr, 0x1e, 0x00dc, 0x0000); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00dc, 0); -+ //tc_phy_write_dev_reg(phyaddr, 0x1e, 0x00e1, 0x0000); -+ //tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00e1, 0x10); -+ -+ rg_zcal_ctrl = 0x20;/* start with 0 dB */ -+ dev1e_e0_ana_cal_r5 = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0xe0); // get default value -+ /* 1e_e0[5:0]:rg_zcal_ctrl */ -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0xe0, rg_zcal_ctrl); -+ all_ana_cal_status = all_ge_ana_cal_wait(gsw, delay, phyaddr);/* delay 20 usec */ -+ -+ if (all_ana_cal_status == 0) { -+ all_ana_cal_status = ANACAL_ERROR; -+ printk(" GE Rext AnaCal ERROR init! \r\n"); -+ return -1; -+ } -+ /* 1e_17a[8]:ad_cal_comp_out */ -+ ad_cal_comp_out_init = (tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x017a) >> 8) & 0x1; -+ if (ad_cal_comp_out_init == 1) -+ calibration_polarity = -1; -+ else /* ad_cal_comp_out_init == 0 */ -+ calibration_polarity = 1; -+ cnt = 0; -+ while (all_ana_cal_status < ANACAL_ERROR) { -+ cnt++; -+ rg_zcal_ctrl += calibration_polarity; -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0xe0, (rg_zcal_ctrl)); -+ all_ana_cal_status = all_ge_ana_cal_wait(gsw, delay, phyaddr); /* delay 20 usec */ -+ dev1e_17a_tmp = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x017a); -+ if (all_ana_cal_status == 0) { -+ all_ana_cal_status = ANACAL_ERROR; -+ printk(" GE Rext AnaCal ERROR 2! \r\n"); -+ return -1; -+ } else if (((dev1e_17a_tmp >> 8) & 0x1) != ad_cal_comp_out_init) { -+ all_ana_cal_status = ANACAL_FINISH; -+ //printk(" GE Rext AnaCal Done! (%d)(0x%x) \r\n", cnt, rg_zcal_ctrl); -+ } else { -+ dev1e_17a_tmp = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x017a); -+ dev1e_e0_tmp = tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0xe0); -+ if ((rg_zcal_ctrl == 0x3F) || (rg_zcal_ctrl == 0x00)) { -+ all_ana_cal_status = ANACAL_SATURATION; /* need to FT(IC fail?) */ -+ printk(" GE Rext AnaCal Saturation! \r\n"); -+ rg_zcal_ctrl = 0x20; /* 0 dB */ -+ } -+ } -+ } -+ -+ if (all_ana_cal_status == ANACAL_ERROR) { -+ rg_zcal_ctrl = 0x20; /* 0 dB */ -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00e0, (dev1e_e0_ana_cal_r5 | rg_zcal_ctrl)); -+ } else if(all_ana_cal_status == ANACAL_FINISH){ -+ //tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00e0, (dev1e_e0_ana_cal_r5 | rg_zcal_ctrl)); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00e0, ((rg_zcal_ctrl << 8) | rg_zcal_ctrl)); -+ printk("0x1e-e0 = %x\n", tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x00e0)); -+ /* **** 1f_115[2:0] = rg_zcal_ctrl[5:3] // Mog review */ -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1f, 0x0115, ((rg_zcal_ctrl & 0x3f) >> 3)); -+ printk("0x1f-115 = %x\n", tc_phy_read_dev_reg(gsw, PHY0, 0x1f, 0x115)); -+ printk(" GE Rext AnaCal Done! (%d)(0x%x) \r\n", cnt, rg_zcal_ctrl); -+ ge_cal_flag = 1; -+ } else { -+ printk("GE Rxet cal something wrong2\n"); -+ } -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00db, 0x0000); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00db, 0x0000); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00dc, 0x0000); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00dc, 0x0000); -+} -+ -+//----------------------------------------------------------------- -+int ge_cal_r50(struct gsw_mt753x *gsw, u8 phyaddr, u32 delay) -+{ -+ u8 rg_zcal_ctrl, all_ana_cal_status, calibration_pair; -+ u16 ad_cal_comp_out_init; -+ u16 dev1e_e0_ana_cal_r5; -+ int calibration_polarity; -+ u8 cnt = 0; -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00db, 0x1100); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00dc, 0x0000); // 1e_dc[0]:rg_txvos_calen -+ -+ for(calibration_pair = ANACAL_PAIR_A; calibration_pair <= ANACAL_PAIR_D; calibration_pair ++) { -+ rg_zcal_ctrl = 0x20; // start with 0 dB -+ dev1e_e0_ana_cal_r5 = (tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x00e0) & (~0x003f)); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00e0, (dev1e_e0_ana_cal_r5 | rg_zcal_ctrl)); // 1e_e0[5:0]:rg_zcal_ctrl -+ if(calibration_pair == ANACAL_PAIR_A) -+ { -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00db, 0x1101); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00dc, 0x0000); -+ //printk("R50 pair A 1e_db=%x 1e_db=%x\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00db), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00dc)); -+ -+ } -+ else if(calibration_pair == ANACAL_PAIR_B) -+ { -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00db, 0x1100); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00dc, 0x1000); // 1e_dc[12]:rg_zcalen_b -+ //printk("R50 pair B 1e_db=%x 1e_db=%x\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00db),tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00dc)); -+ -+ } -+ else if(calibration_pair == ANACAL_PAIR_C) -+ { -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00db, 0x1100); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00dc, 0x0100); // 1e_dc[8]:rg_zcalen_c -+ //printk("R50 pair C 1e_db=%x 1e_db=%x\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00db), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00dc)); -+ -+ } -+ else // if(calibration_pair == ANACAL_PAIR_D) -+ { -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00db, 0x1100); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00dc, 0x0010); // 1e_dc[4]:rg_zcalen_d -+ //printk("R50 pair D 1e_db=%x 1e_db=%x\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00db), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x00dc)); -+ -+ } -+ -+ all_ana_cal_status = all_ge_ana_cal_wait(gsw, delay, phyaddr); // delay 20 usec -+ if(all_ana_cal_status == 0) -+ { -+ all_ana_cal_status = ANACAL_ERROR; -+ printk( "GE R50 AnaCal ERROR init! \r\n"); -+ return -1; -+ } -+ -+ ad_cal_comp_out_init = (tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x017a)>>8) & 0x1; // 1e_17a[8]:ad_cal_comp_out -+ if(ad_cal_comp_out_init == 1) -+ calibration_polarity = -1; -+ else -+ calibration_polarity = 1; -+ -+ cnt = 0; -+ while(all_ana_cal_status < ANACAL_ERROR) -+ { -+ cnt ++; -+ rg_zcal_ctrl += calibration_polarity; -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00e0, (dev1e_e0_ana_cal_r5 | rg_zcal_ctrl)); -+ all_ana_cal_status = all_ge_ana_cal_wait(gsw, delay, phyaddr); // delay 20 usec -+ -+ if(all_ana_cal_status == 0) -+ { -+ all_ana_cal_status = ANACAL_ERROR; -+ printk( " GE R50 AnaCal ERROR 2! \r\n"); -+ return -1; -+ } -+ else if(((tc_phy_read_dev_reg(gsw, PHY0, 0x1e, 0x017a)>>8)&0x1) != ad_cal_comp_out_init) -+ { -+ all_ana_cal_status = ANACAL_FINISH; -+ } -+ else { -+ if((rg_zcal_ctrl == 0x3F)||(rg_zcal_ctrl == 0x00)) -+ { -+ all_ana_cal_status = ANACAL_SATURATION; // need to FT -+ printk( " GE R50 AnaCal Saturation! \r\n"); -+ } -+ } -+ } -+ -+ if(all_ana_cal_status == ANACAL_ERROR) { -+ rg_zcal_ctrl = 0x20; // 0 dB -+ //tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00e0, (dev1e_e0_ana_cal_r5 | rg_zcal_ctrl)); -+ } -+ else { -+ rg_zcal_ctrl = MT753x_ZCAL_TO_R50ohm_GE_TBL_100[rg_zcal_ctrl - 9]; // wait Mog zcal/r50 mapping table -+ printk( " GE R50 AnaCal Done! (%d) (0x%x)(0x%x) \r\n", cnt, rg_zcal_ctrl, (rg_zcal_ctrl|0x80)); -+ } -+ -+ if(calibration_pair == ANACAL_PAIR_A) { -+ ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174) & (~0x7f00); -+ //ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174); -+ //printk( " GE-a 1e_174(0x%x)(0x%x), 1e_175(0x%x) \r\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174), ad_cal_comp_out_init, tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175)); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x0174, (ad_cal_comp_out_init | (((rg_zcal_ctrl<<8)&0xff00) | 0x8000))); // 1e_174[15:8] -+ //printk( " GE-a 1e_174(0x%x), 1e_175(0x%x) \r\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175)); -+ } -+ else if(calibration_pair == ANACAL_PAIR_B) { -+ ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174) & (~0x007f); -+ //ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174); -+ //printk( " GE-b 1e_174(0x%x)(0x%x), 1e_175(0x%x) \r\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174), ad_cal_comp_out_init, tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175)); -+ -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x0174, (ad_cal_comp_out_init | (((rg_zcal_ctrl<<0)&0x00ff) | 0x0080))); // 1e_174[7:0] -+ //printk( " GE-b 1e_174(0x%x), 1e_175(0x%x) \r\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175)); -+ } -+ else if(calibration_pair == ANACAL_PAIR_C) { -+ ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175) & (~0x7f00); -+ //ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x0175, (ad_cal_comp_out_init | (((rg_zcal_ctrl<<8)&0xff00) | 0x8000))); // 1e_175[15:8] -+ //printk( " GE-c 1e_174(0x%x), 1e_175(0x%x) \r\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175)); -+ } else {// if(calibration_pair == ANACAL_PAIR_D) -+ ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175) & (~0x007f); -+ //ad_cal_comp_out_init = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x0175, (ad_cal_comp_out_init | (((rg_zcal_ctrl<<0)&0x00ff) | 0x0080))); // 1e_175[7:0] -+ //printk( " GE-d 1e_174(0x%x), 1e_175(0x%x) \r\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175)); -+ } -+ //tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00e0, ((rg_zcal_ctrl<<8)|rg_zcal_ctrl)); -+ } -+ -+ printk( " GE 1e_174(0x%x), 1e_175(0x%x) \r\n", tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0174), tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0175)); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00db, 0x0000); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00db, 0x0000); -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00dc, 0x0000); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00dc, 0x0000); -+} -+ -+int ge_cal_tx_offset(struct gsw_mt753x *gsw, u8 phyaddr, u32 delay) -+{ -+ u8 all_ana_cal_status, calibration_pair; -+ u16 ad_cal_comp_out_init; -+ int calibration_polarity, tx_offset_temp; -+ u8 tx_offset_reg_shift, tabl_idx, i; -+ u8 cnt = 0; -+ u16 tx_offset_reg, reg_temp, cal_temp; -+ //switch_phy_write(phyaddr, R0, 0x2100);//harry tmp -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00db, 0x0100); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a -+ tc_phy_write_dev_reg(gsw, PHY0, 0x1e, 0x00dc, 0x0001); // 1e_dc[0]:rg_txvos_calen -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x0096, 0x8000); // 1e_96[15]:bypass_tx_offset_cal, Hw bypass, Fw cal -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x003e, 0xf808); // 1e_3e -+ for(i = 0; i <= 4; i++) -+ tc_phy_write_dev_reg(gsw, i, 0x1e, 0x00dd, 0x0000); -+ for(calibration_pair = ANACAL_PAIR_A; calibration_pair <= ANACAL_PAIR_D; calibration_pair ++) -+ { -+ tabl_idx = 31; -+ tx_offset_temp = MT753x_TX_OFFSET_TBL[tabl_idx]; -+ -+ if(calibration_pair == ANACAL_PAIR_A) { -+ //tc_phy_write_dev_reg(phyaddr, 0x1e, 0x145, 0x5010); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x00dd, 0x1000); // 1e_dd[12]:rg_txg_calen_a -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x017d, (0x8000|DAC_IN_0V)); // 1e_17d:dac_in0_a -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x0181, (0x8000|DAC_IN_0V)); // 1e_181:dac_in1_a -+ //printk("tx offset pairA 1e_dd = %x, 1e_17d=%x, 1e_181=%x\n", tc_phy_read_dev_reg(phyaddr, 0x1e, 0x00dd), tc_phy_read_dev_reg(phyaddr, 0x1e, 0x017d), tc_phy_read_dev_reg(phyaddr, 0x1e, 0x0181)); -+ reg_temp = (tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x0172) & (~0x3f00)); -+ tx_offset_reg_shift = 8; // 1e_172[13:8] -+ tx_offset_reg = 0x0172; -+ -+ //tc_phy_write_dev_reg(phyaddr, 0x1e, tx_offset_reg, (reg_temp|(tx_offset_temp<>8) & 0x1; // 1e_17a[8]:ad_cal_comp_out -+ if(ad_cal_comp_out_init == 1) -+ calibration_polarity = 1; -+ else -+ calibration_polarity = -1; -+ -+ cnt = 0; -+ //printk("TX offset cnt = %d, tabl_idx= %x, offset_val = %x\n", cnt, tabl_idx, MT753x_TX_OFFSET_TBL[tabl_idx]); -+ while(all_ana_cal_status < ANACAL_ERROR) { -+ -+ cnt ++; -+ tabl_idx += calibration_polarity; -+ //tx_offset_temp += calibration_polarity; -+ //cal_temp = tx_offset_temp; -+ cal_temp = MT753x_TX_OFFSET_TBL[tabl_idx]; -+ //printk("TX offset cnt = %d, tabl_idx= %x, offset_val = %x\n", cnt, tabl_idx, MT753x_TX_OFFSET_TBL[tabl_idx]); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, tx_offset_reg, (reg_temp|(cal_temp<>8)&0x1) != ad_cal_comp_out_init) { -+ all_ana_cal_status = ANACAL_FINISH; -+ } else { -+ if((tabl_idx == 0)||(tabl_idx == 0x3f)) { -+ all_ana_cal_status = ANACAL_SATURATION; // need to FT -+ printk( " GE Tx offset AnaCal Saturation! \r\n"); -+ } -+ } -+ } -+ -+ if(all_ana_cal_status == ANACAL_ERROR) { -+ tx_offset_temp = TX_AMP_OFFSET_0MV; -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, tx_offset_reg, (reg_temp|(tx_offset_temp<>8) & 0x1; // 1e_17a[8]:ad_cal_comp_out -+ if(ad_cal_comp_out_init == 1) -+ calibration_polarity = -1; -+ else -+ calibration_polarity = 1; -+ -+ cnt =0; -+ while(all_ana_cal_status < ANACAL_ERROR) { -+ cnt ++; -+ tx_amp_temp += calibration_polarity; -+ //printk("tx_amp : %x, 1e %x = %x\n", tx_amp_temp, tx_amp_reg, (reg_temp|(tx_amp_temp<>8)&0x1) != ad_cal_comp_out_init) { -+ //printk("TX AMP ANACAL_FINISH\n"); -+ all_ana_cal_status = ANACAL_FINISH; -+ if (phyaddr == 0) { -+ if (calibration_pair == ANACAL_PAIR_A) -+ tx_amp_temp = tx_amp_temp - 2; -+ else if(calibration_pair == ANACAL_PAIR_B) -+ tx_amp_temp = tx_amp_temp - 1; -+ else if(calibration_pair == ANACAL_PAIR_C) -+ tx_amp_temp = tx_amp_temp - 2; -+ else if(calibration_pair == ANACAL_PAIR_D) -+ tx_amp_temp = tx_amp_temp - 1; -+ } else if (phyaddr == 1) { -+ if (calibration_pair == ANACAL_PAIR_A) -+ tx_amp_temp = tx_amp_temp - 1; -+ else if(calibration_pair == ANACAL_PAIR_B) -+ tx_amp_temp = tx_amp_temp ; -+ else if(calibration_pair == ANACAL_PAIR_C) -+ tx_amp_temp = tx_amp_temp - 1; -+ else if(calibration_pair == ANACAL_PAIR_D) -+ tx_amp_temp = tx_amp_temp - 1; -+ } else if (phyaddr == 2) { -+ if (calibration_pair == ANACAL_PAIR_A) -+ tx_amp_temp = tx_amp_temp; -+ else if(calibration_pair == ANACAL_PAIR_B) -+ tx_amp_temp = tx_amp_temp - 1; -+ else if(calibration_pair == ANACAL_PAIR_C) -+ tx_amp_temp = tx_amp_temp; -+ else if(calibration_pair == ANACAL_PAIR_D) -+ tx_amp_temp = tx_amp_temp - 1; -+ } else if (phyaddr == 3) { -+ tx_amp_temp = tx_amp_temp; -+ } else if (phyaddr == 4) { -+ if (calibration_pair == ANACAL_PAIR_A) -+ tx_amp_temp = tx_amp_temp; -+ else if(calibration_pair == ANACAL_PAIR_B) -+ tx_amp_temp = tx_amp_temp - 1; -+ else if(calibration_pair == ANACAL_PAIR_C) -+ tx_amp_temp = tx_amp_temp; -+ else if(calibration_pair == ANACAL_PAIR_D) -+ tx_amp_temp = tx_amp_temp; -+ } -+ reg_temp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, tx_amp_reg)&(~0xff00); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, tx_amp_reg_100,(tx_amp_temp|((tx_amp_temp)<> 10); -+ reg_tmp -= 8; -+ reg_backup = 0x0000; -+ reg_backup |= ((reg_tmp << 10) | (reg_tmp << 0)); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x12, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x12); -+ //printk("PORT[%d] 1e.012 = %x (OFFSET_1000M_PAIR_A)\n", phyaddr, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x16); -+ reg_tmp = ((reg_backup & 0x3f) >> 0); -+ reg_tmp -= 8; -+ reg_backup = (reg_backup & (~0x3f)); -+ reg_backup |= (reg_tmp << 0); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x16, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x16); -+ //printk("PORT[%d] 1e.016 = %x (OFFSET_TESTMODE_1000M_PAIR_A)\n", phyaddr, reg_backup); -+ } -+ else if(calibration_pair == ANACAL_PAIR_B){ -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x17); -+ reg_tmp = ((reg_backup & 0x3f00) >> 8); -+ reg_tmp -= 8; -+ reg_backup = 0x0000; -+ reg_backup |= ((reg_tmp << 8) | (reg_tmp << 0)); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x17, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x17); -+ //printk("PORT[%d] 1e.017 = %x (OFFSET_1000M_PAIR_B)\n", phyaddr, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x18); -+ reg_tmp = ((reg_backup & 0x3f) >> 0); -+ reg_tmp -= 8; -+ reg_backup = (reg_backup & (~0x3f)); -+ reg_backup |= (reg_tmp << 0); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x18, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x18); -+ //printk("PORT[%d] 1e.018 = %x (OFFSET_TESTMODE_1000M_PAIR_B)\n", phyaddr, reg_backup); -+ } -+ else if(calibration_pair == ANACAL_PAIR_C){ -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x19); -+ reg_tmp = ((reg_backup & 0x3f00) >> 8); -+ reg_tmp -= 8; -+ reg_backup = (reg_backup & (~0x3f00)); -+ reg_backup |= (reg_tmp << 8); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x19, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x19); -+ //printk("PORT[%d] 1e.019 = %x (OFFSET_1000M_PAIR_C)\n", phyaddr, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x20); -+ reg_tmp = ((reg_backup & 0x3f) >> 0); -+ reg_tmp -= 8; -+ reg_backup = (reg_backup & (~0x3f)); -+ reg_backup |= (reg_tmp << 0); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x20, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x20); -+ //printk("PORT[%d] 1e.020 = %x (OFFSET_TESTMODE_1000M_PAIR_C)\n", phyaddr, reg_backup); -+ } -+ else if(calibration_pair == ANACAL_PAIR_D){ -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x21); -+ reg_tmp = ((reg_backup & 0x3f00) >> 8); -+ reg_tmp -= 8; -+ reg_backup = (reg_backup & (~0x3f00)); -+ reg_backup |= (reg_tmp << 8); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x21, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x21); -+ //printk("PORT[%d] 1e.021 = %x (OFFSET_1000M_PAIR_D)\n", phyaddr, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x22); -+ reg_tmp = ((reg_backup & 0x3f) >> 0); -+ reg_tmp -= 8; -+ reg_backup = (reg_backup & (~0x3f)); -+ reg_backup |= (reg_tmp << 0); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x22, reg_backup); -+ reg_backup = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x22); -+ //printk("PORT[%d] 1e.022 = %x (OFFSET_TESTMODE_1000M_PAIR_D)\n", phyaddr, reg_backup); -+ } -+ -+ if (calibration_pair == ANACAL_PAIR_A){ -+ //printk("PORT (%d) TX_AMP PAIR (A) FINAL CALIBRATION RESULT\n", phyaddr); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x12); -+ //printk("1e.012 = 0x%x\n", debug_tmp); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x16); -+ //printk("1e.016 = 0x%x\n", debug_tmp); -+ } -+ -+ else if(calibration_pair == ANACAL_PAIR_B){ -+ //printk("PORT (%d) TX_AMP PAIR (A) FINAL CALIBRATION RESULT\n", phyaddr); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x17); -+ //printk("1e.017 = 0x%x\n", debug_tmp); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x18); -+ //printk("1e.018 = 0x%x\n", debug_tmp); -+ } -+ else if(calibration_pair == ANACAL_PAIR_C){ -+ //printk("PORT (%d) TX_AMP PAIR (A) FINAL CALIBRATION RESULT\n", phyaddr); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x19); -+ //printk("1e.019 = 0x%x\n", debug_tmp); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x20); -+ //printk("1e.020 = 0x%x\n", debug_tmp); -+ } -+ else if(calibration_pair == ANACAL_PAIR_D){ -+ //printk("PORT (%d) TX_AMP PAIR (A) FINAL CALIBRATION RESULT\n", phyaddr); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x21); -+ //printk("1e.021 = 0x%x\n", debug_tmp); -+ debug_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, 0x22); -+ //printk("1e.022 = 0x%x\n", debug_tmp); -+ } -+ -+ -+ printk( " GE Tx amp AnaCal Done! (pair-%d)(1e_%x = 0x%x)\n", calibration_pair, tx_amp_reg, tc_phy_read_dev_reg(gsw, phyaddr, 0x1e, tx_amp_reg)); -+ -+ } else { -+ if((tx_amp_temp == 0x3f)||(tx_amp_temp == 0x00)) { -+ all_ana_cal_status = ANACAL_SATURATION; // need to FT -+ printk( " GE Tx amp AnaCal Saturation! \r\n"); -+ } -+ } -+ } -+ -+ if(all_ana_cal_status == ANACAL_ERROR) { -+ tx_amp_temp = 0x20; -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, tx_amp_reg, (reg_temp|(tx_amp_temp<4) -+ pr_info("pairA RX_DC_OFFSET error"); -+} -+ -+void check_rx_dc_offset_pair_b(struct gsw_mt753x *gsw, u8 phyaddr) -+{ -+ u32 reg_tmp; -+ u8 reg_val; -+ -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1f, 0x15, (phyaddr << 13) | 0x1151); -+ reg_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1f, 0x1a); -+ reg_tmp = reg_tmp & 0xff; -+ pr_info("before pairB output = %x\n", reg_tmp); -+ udelay(40); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1f, 0x15, (phyaddr << 13) | 0x1143); -+ udelay(40); -+ reg_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1f, 0x1a); -+ reg_tmp = reg_tmp & 0xff; -+ pr_info("after pairB output = %x\n", reg_tmp); -+ if ((reg_tmp & 0x80) != 0) -+ reg_tmp = (~reg_tmp) + 1; -+ if ((reg_tmp & 0xff) >4) -+ pr_info("pairB RX_DC_OFFSET error"); -+} -+ -+void check_rx_dc_offset_pair_c(struct gsw_mt753x *gsw, u8 phyaddr) -+{ -+ u32 reg_tmp; -+ u8 reg_val; -+ -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1f, 0x15, (phyaddr << 13) | 0x1153); -+ reg_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1f, 0x1a); -+ reg_tmp = reg_tmp & 0xff; -+ pr_info("before pairC output = %x\n", reg_tmp); -+ udelay(40); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1f, 0x15, (phyaddr << 13) | 0x1144); -+ udelay(40); -+ reg_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1f, 0x1a); -+ reg_tmp = reg_tmp & 0xff; -+ pr_info("after pairC output = %x\n", reg_tmp); -+ if ((reg_tmp & 0x80) != 0) -+ reg_tmp = (~reg_tmp) + 1; -+ if ((reg_tmp & 0xff) >4) -+ pr_info("pairC RX_DC_OFFSET error"); -+} -+ -+void check_rx_dc_offset_pair_d(struct gsw_mt753x *gsw, u8 phyaddr) -+{ -+ u32 reg_tmp; -+ u8 reg_val; -+ -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1f, 0x15, (phyaddr << 13) | 0x1155); -+ reg_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1f, 0x1a); -+ reg_tmp = reg_tmp & 0xff; -+ pr_info("before pairD output = %x\n", reg_tmp); -+ udelay(40); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1f, 0x15, (phyaddr << 13) | 0x1145); -+ udelay(40); -+ reg_tmp = tc_phy_read_dev_reg(gsw, phyaddr, 0x1f, 0x1a); -+ reg_tmp = reg_tmp & 0xff; -+ pr_info("after pairD output = %x\n", reg_tmp); -+ if ((reg_tmp & 0x80) != 0) -+ reg_tmp = (~reg_tmp) + 1; -+ if ((reg_tmp & 0xff) >4) -+ pr_info("pairD RX_DC_OFFSET error"); -+} -+ -+ -+int mt753x_phy_calibration(struct gsw_mt753x *gsw, u8 phyaddr){ -+ -+ int ret; -+ -+ phy_calibration(gsw, phyaddr); -+ -+ /*eye pic*/ -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x0, 0x187); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x1, 0x1c9); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x2, 0x1c6); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x3, 0x182); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x4, 0x208); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x5, 0x205); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x6, 0x384); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x7, 0x3cb); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x8, 0x3c4); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0x9, 0x30a); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0xa, 0x00b); -+ tc_phy_write_dev_reg(gsw, phyaddr, 0x1e, 0xb, 0x002); -+ -+ rx_dc_offset(gsw, phyaddr); -+ check_rx_dc_offset_pair_a(gsw, phyaddr); -+ check_rx_dc_offset_pair_b(gsw, phyaddr); -+ check_rx_dc_offset_pair_c(gsw, phyaddr); -+ check_rx_dc_offset_pair_d(gsw, phyaddr); -+ -+ return ret; -+} ---- /dev/null -+++ b/drivers/net/phy/mtk/mt753x/mt753x_phy.h -@@ -0,0 +1,145 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Register definitions for MediaTek MT753x Gigabit switches -+ * -+ * Copyright (C) 2018 MediaTek Inc. All Rights Reserved. -+ * -+ * Author: Weijie Gao -+ */ -+ -+#ifndef _MT753X_PHY_H_ -+#define _MT753X_PHY_H_ -+ -+#include -+ -+/*phy calibration use*/ -+#define DEV_1E 0x1E -+/*global device 0x1f, always set P0*/ -+#define DEV_1F 0x1F -+ -+ -+/************IEXT/REXT CAL***************/ -+/* bits range: for example BITS(16,23) = 0xFF0000*/ -+#define BITS(m, n) (~(BIT(m) - 1) & ((BIT(n) - 1) | BIT(n))) -+#define ANACAL_INIT 0x01 -+#define ANACAL_ERROR 0xFD -+#define ANACAL_SATURATION 0xFE -+#define ANACAL_FINISH 0xFF -+#define ANACAL_PAIR_A 0 -+#define ANACAL_PAIR_B 1 -+#define ANACAL_PAIR_C 2 -+#define ANACAL_PAIR_D 3 -+#define DAC_IN_0V 0x00 -+#define DAC_IN_2V 0xf0 -+#define TX_AMP_OFFSET_0MV 0x20 -+#define TX_AMP_OFFSET_VALID_BITS 6 -+ -+#define R0 0 -+#define PHY0 0 -+#define PHY1 1 -+#define PHY2 2 -+#define PHY3 3 -+#define PHY4 4 -+#define ANA_TEST_MODE BITS(8, 15) -+#define TST_TCLK_SEL BITs(6, 7) -+#define ANA_TEST_VGA_RG 0x100 -+ -+#define FORCE_MDI_CROSS_OVER BITS(3, 4) -+#define T10_TEST_CTL_RG 0x145 -+#define RG_185 0x185 -+#define RG_TX_SLEW BIT(0) -+#define ANA_CAL_0 0xdb -+#define RG_CAL_CKINV BIT(12) -+#define RG_ANA_CALEN BIT(8) -+#define RG_REXT_CALEN BIT(4) -+#define RG_ZCALEN_A BIT(0) -+#define ANA_CAL_1 0xdc -+#define RG_ZCALEN_B BIT(12) -+#define RG_ZCALEN_C BIT(8) -+#define RG_ZCALEN_D BIT(4) -+#define RG_TXVOS_CALEN BIT(0) -+#define ANA_CAL_6 0xe1 -+#define RG_CAL_REFSEL BIT(4) -+#define RG_CAL_COMP_PWD BIT(0) -+#define ANA_CAL_5 0xe0 -+#define RG_REXT_TRIM BITs(8, 13) -+#define RG_ZCAL_CTRL BITs(0, 5) -+#define RG_17A 0x17a -+#define AD_CAL_COMP_OUT BIT(8) -+#define RG_17B 0x17b -+#define AD_CAL_CLK bit(0) -+#define RG_17C 0x17c -+#define DA_CALIN_FLAG bit(0) -+/************R50 CAL****************************/ -+#define RG_174 0x174 -+#define RG_R50OHM_RSEL_TX_A_EN BIT[15] -+#define CR_R50OHM_RSEL_TX_A BITS[8:14] -+#define RG_R50OHM_RSEL_TX_B_EN BIT[7] -+#define CR_R50OHM_RSEL_TX_B BITS[6:0] -+#define RG_175 0x175 -+#define RG_R50OHM_RSEL_TX_C_EN BITS[15] -+#define CR_R50OHM_RSEL_TX_C BITS[8:14] -+#define RG_R50OHM_RSEL_TX_D_EN BIT[7] -+#define CR_R50OHM_RSEL_TX_D BITS[0:6] -+/**********TX offset Calibration***************************/ -+#define RG_95 0x96 -+#define BYPASS_TX_OFFSET_CAL BIT(15) -+#define RG_3E 0x3e -+#define BYPASS_PD_TXVLD_A BIT(15) -+#define BYPASS_PD_TXVLD_B BIT(14) -+#define BYPASS_PD_TXVLD_C BIT(13) -+#define BYPASS_PD_TXVLD_D BIT(12) -+#define BYPASS_PD_TX_10M BIT(11) -+#define POWER_DOWN_TXVLD_A BIT(7) -+#define POWER_DOWN_TXVLD_B BIT(6) -+#define POWER_DOWN_TXVLD_C BIT(5) -+#define POWER_DOWN_TXVLD_D BIT(4) -+#define POWER_DOWN_TX_10M BIT(3) -+#define RG_DD 0xdd -+#define RG_TXG_CALEN_A BIT(12) -+#define RG_TXG_CALEN_B BIT(8) -+#define RG_TXG_CALEN_C BIT(4) -+#define RG_TXG_CALEN_D BIT(0) -+#define RG_17D 0x17D -+#define FORCE_DASN_DAC_IN0_A BIT(15) -+#define DASN_DAC_IN0_A BITS(0, 9) -+#define RG_17E 0x17E -+#define FORCE_DASN_DAC_IN0_B BIT(15) -+#define DASN_DAC_IN0_B BITS(0, 9) -+#define RG_17F 0x17F -+ -+#define FORCE_DASN_DAC_IN0_C BIT(15) -+#define DASN_DAC_IN0_C BITS(0, 9) -+#define RG_180 0x180 -+#define FORCE_DASN_DAC_IN0_D BIT(15) -+#define DASN_DAC_IN0_D BITS(0, 9) -+ -+#define RG_181 0x181 -+#define FORCE_DASN_DAC_IN1_A BIT(15) -+#define DASN_DAC_IN1_A BITS(0, 9) -+#define RG_182 0x182 -+#define FORCE_DASN_DAC_IN1_B BIT(15) -+#define DASN_DAC_IN1_B BITS(0, 9) -+#define RG_183 0x183 -+#define FORCE_DASN_DAC_IN1_C BIT15] -+#define DASN_DAC_IN1_C BITS(0, 9) -+#define RG_184 0x184 -+#define FORCE_DASN_DAC_IN1_D BIT(15) -+#define DASN_DAC_IN1_D BITS(0, 9) -+#define RG_172 0x172 -+#define CR_TX_AMP_OFFSET_A BITS(8, 13) -+#define CR_TX_AMP_OFFSET_B BITS(0, 5) -+#define RG_173 0x173 -+#define CR_TX_AMP_OFFSET_C BITS(8, 13) -+#define CR_TX_AMP_OFFSET_D BITS(0, 5) -+/**********TX Amp Calibration ***************************/ -+#define RG_12 0x12 -+#define DA_TX_I2MPB_A_GBE BITS(10, 15) -+#define RG_17 0x17 -+#define DA_TX_I2MPB_B_GBE BITS(8, 13) -+#define RG_19 0x19 -+#define DA_TX_I2MPB_C_GBE BITS(8, 13) -+#define RG_21 0x21 -+#define DA_TX_I2MPB_D_GBE BITS(8, 13) -+ -+#endif /* _MT753X_REGS_H_ */ diff --git a/target/linux/mediatek/patches-4.19/0003-switch-add-mt7531.patch b/target/linux/mediatek/patches-4.19/0003-switch-add-mt7531.patch deleted file mode 100644 index 43c8d01da7..0000000000 --- a/target/linux/mediatek/patches-4.19/0003-switch-add-mt7531.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -292,6 +292,8 @@ config RTL8367B_PHY - - endif # RTL8366_SMI - -+source "drivers/net/phy/mtk/mt753x/Kconfig" -+ - comment "MII PHY device drivers" - - config SFP ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -101,3 +101,5 @@ obj-$(CONFIG_STE10XP) += ste10Xp.o - obj-$(CONFIG_TERANETICS_PHY) += teranetics.o - obj-$(CONFIG_VITESSE_PHY) += vitesse.o - obj-$(CONFIG_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o -+obj-$(CONFIG_MT753X_GSW) += mtk/mt753x/ -+ diff --git a/target/linux/mediatek/patches-4.19/0004-clk-mediatek-add-clock-support-for-MT7629-SoC.patch b/target/linux/mediatek/patches-4.19/0004-clk-mediatek-add-clock-support-for-MT7629-SoC.patch deleted file mode 100644 index 4944573591..0000000000 --- a/target/linux/mediatek/patches-4.19/0004-clk-mediatek-add-clock-support-for-MT7629-SoC.patch +++ /dev/null @@ -1,1320 +0,0 @@ -From 3b5e748615e714711220b2a95d19bd25a037db09 Mon Sep 17 00:00:00 2001 -From: Ryder Lee -Date: Mon, 5 Nov 2018 16:43:55 +0800 -Subject: [PATCH] clk: mediatek: add clock support for MT7629 SoC - -Add all supported clocks exported from every susbystem found on MT7629 SoC. - -Signed-off-by: Wenzhen Yu -Signed-off-by: Ryder Lee -Acked-by: Rob Herring -Signed-off-by: Stephen Boyd ---- - drivers/clk/mediatek/Kconfig | 23 + - drivers/clk/mediatek/Makefile | 3 + - drivers/clk/mediatek/clk-mt7629-eth.c | 159 ++++++ - drivers/clk/mediatek/clk-mt7629-hif.c | 156 ++++++ - drivers/clk/mediatek/clk-mt7629.c | 723 +++++++++++++++++++++++++ - include/dt-bindings/clock/mt7629-clk.h | 203 +++++++ - 6 files changed, 1267 insertions(+) - create mode 100644 drivers/clk/mediatek/clk-mt7629-eth.c - create mode 100644 drivers/clk/mediatek/clk-mt7629-hif.c - create mode 100644 drivers/clk/mediatek/clk-mt7629.c - create mode 100644 include/dt-bindings/clock/mt7629-clk.h - ---- a/drivers/clk/mediatek/Kconfig -+++ b/drivers/clk/mediatek/Kconfig -@@ -178,6 +178,29 @@ config COMMON_CLK_MT7622_AUDSYS - This driver supports MediaTek MT7622 AUDSYS clocks providing - to audio consumers such as I2S and TDM. - -+config COMMON_CLK_MT7629 -+ bool "Clock driver for MediaTek MT7629" -+ depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST -+ select COMMON_CLK_MEDIATEK -+ default ARCH_MEDIATEK && ARM -+ ---help--- -+ This driver supports MediaTek MT7629 basic clocks and clocks -+ required for various periperals found on MediaTek. -+ -+config COMMON_CLK_MT7629_ETHSYS -+ bool "Clock driver for MediaTek MT7629 ETHSYS" -+ depends on COMMON_CLK_MT7629 -+ ---help--- -+ This driver add support for clocks for Ethernet and SGMII -+ required on MediaTek MT7629 SoC. -+ -+config COMMON_CLK_MT7629_HIFSYS -+ bool "Clock driver for MediaTek MT7629 HIFSYS" -+ depends on COMMON_CLK_MT7629 -+ ---help--- -+ This driver supports MediaTek MT7629 HIFSYS clocks providing -+ to PCI-E and USB. -+ - config COMMON_CLK_MT8135 - bool "Clock driver for MediaTek MT8135" - depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST ---- a/drivers/clk/mediatek/Makefile -+++ b/drivers/clk/mediatek/Makefile -@@ -26,5 +26,8 @@ obj-$(CONFIG_COMMON_CLK_MT7622) += clk-m - obj-$(CONFIG_COMMON_CLK_MT7622_ETHSYS) += clk-mt7622-eth.o - obj-$(CONFIG_COMMON_CLK_MT7622_HIFSYS) += clk-mt7622-hif.o - obj-$(CONFIG_COMMON_CLK_MT7622_AUDSYS) += clk-mt7622-aud.o -+obj-$(CONFIG_COMMON_CLK_MT7629) += clk-mt7629.o -+obj-$(CONFIG_COMMON_CLK_MT7629_ETHSYS) += clk-mt7629-eth.o -+obj-$(CONFIG_COMMON_CLK_MT7629_HIFSYS) += clk-mt7629-hif.o - obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135.o - obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173.o ---- /dev/null -+++ b/drivers/clk/mediatek/clk-mt7629-eth.c -@@ -0,0 +1,159 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * Author: Wenzhen Yu -+ * Ryder Lee -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "clk-mtk.h" -+#include "clk-gate.h" -+ -+#include -+ -+#define GATE_ETH(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = ð_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr_inv, \ -+ } -+ -+static const struct mtk_gate_regs eth_cg_regs = { -+ .set_ofs = 0x30, -+ .clr_ofs = 0x30, -+ .sta_ofs = 0x30, -+}; -+ -+static const struct mtk_gate eth_clks[] = { -+ GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "eth2pll", 6), -+ GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "txclk_src_pre", 7), -+ GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "txclk_src_pre", 8), -+ GATE_ETH(CLK_ETH_GP0_EN, "eth_gp0_en", "txclk_src_pre", 9), -+ GATE_ETH(CLK_ETH_ESW_EN, "eth_esw_en", "eth_500m", 16), -+}; -+ -+static const struct mtk_gate_regs sgmii_cg_regs = { -+ .set_ofs = 0xE4, -+ .clr_ofs = 0xE4, -+ .sta_ofs = 0xE4, -+}; -+ -+#define GATE_SGMII(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &sgmii_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr_inv, \ -+ } -+ -+static const struct mtk_gate sgmii_clks[2][4] = { -+ { -+ GATE_SGMII(CLK_SGMII_TX_EN, "sgmii_tx_en", -+ "ssusb_tx250m", 2), -+ GATE_SGMII(CLK_SGMII_RX_EN, "sgmii_rx_en", -+ "ssusb_eq_rx250m", 3), -+ GATE_SGMII(CLK_SGMII_CDR_REF, "sgmii_cdr_ref", -+ "ssusb_cdr_ref", 4), -+ GATE_SGMII(CLK_SGMII_CDR_FB, "sgmii_cdr_fb", -+ "ssusb_cdr_fb", 5), -+ }, { -+ GATE_SGMII(CLK_SGMII_TX_EN, "sgmii_tx_en1", -+ "ssusb_tx250m", 2), -+ GATE_SGMII(CLK_SGMII_RX_EN, "sgmii_rx_en1", -+ "ssusb_eq_rx250m", 3), -+ GATE_SGMII(CLK_SGMII_CDR_REF, "sgmii_cdr_ref1", -+ "ssusb_cdr_ref", 4), -+ GATE_SGMII(CLK_SGMII_CDR_FB, "sgmii_cdr_fb1", -+ "ssusb_cdr_fb", 5), -+ } -+}; -+ -+static int clk_mt7629_ethsys_init(struct platform_device *pdev) -+{ -+ struct clk_onecell_data *clk_data; -+ struct device_node *node = pdev->dev.of_node; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK); -+ -+ mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ dev_err(&pdev->dev, -+ "could not register clock provider: %s: %d\n", -+ pdev->name, r); -+ -+ mtk_register_reset_controller(node, 1, 0x34); -+ -+ return r; -+} -+ -+static int clk_mt7629_sgmiisys_init(struct platform_device *pdev) -+{ -+ struct clk_onecell_data *clk_data; -+ struct device_node *node = pdev->dev.of_node; -+ static int id; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK); -+ -+ mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK, -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ dev_err(&pdev->dev, -+ "could not register clock provider: %s: %d\n", -+ pdev->name, r); -+ -+ return r; -+} -+ -+static const struct of_device_id of_match_clk_mt7629_eth[] = { -+ { -+ .compatible = "mediatek,mt7629-ethsys", -+ .data = clk_mt7629_ethsys_init, -+ }, { -+ .compatible = "mediatek,mt7629-sgmiisys", -+ .data = clk_mt7629_sgmiisys_init, -+ }, { -+ /* sentinel */ -+ } -+}; -+ -+static int clk_mt7629_eth_probe(struct platform_device *pdev) -+{ -+ int (*clk_init)(struct platform_device *); -+ int r; -+ -+ clk_init = of_device_get_match_data(&pdev->dev); -+ if (!clk_init) -+ return -EINVAL; -+ -+ r = clk_init(pdev); -+ if (r) -+ dev_err(&pdev->dev, -+ "could not register clock provider: %s: %d\n", -+ pdev->name, r); -+ -+ return r; -+} -+ -+static struct platform_driver clk_mt7629_eth_drv = { -+ .probe = clk_mt7629_eth_probe, -+ .driver = { -+ .name = "clk-mt7629-eth", -+ .of_match_table = of_match_clk_mt7629_eth, -+ }, -+}; -+ -+builtin_platform_driver(clk_mt7629_eth_drv); ---- /dev/null -+++ b/drivers/clk/mediatek/clk-mt7629-hif.c -@@ -0,0 +1,156 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * Author: Wenzhen Yu -+ * Ryder Lee -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "clk-mtk.h" -+#include "clk-gate.h" -+ -+#include -+ -+#define GATE_PCIE(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &pcie_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr_inv, \ -+ } -+ -+#define GATE_SSUSB(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &ssusb_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr_inv, \ -+ } -+ -+static const struct mtk_gate_regs pcie_cg_regs = { -+ .set_ofs = 0x30, -+ .clr_ofs = 0x30, -+ .sta_ofs = 0x30, -+}; -+ -+static const struct mtk_gate_regs ssusb_cg_regs = { -+ .set_ofs = 0x30, -+ .clr_ofs = 0x30, -+ .sta_ofs = 0x30, -+}; -+ -+static const struct mtk_gate ssusb_clks[] = { -+ GATE_SSUSB(CLK_SSUSB_U2_PHY_1P_EN, "ssusb_u2_phy_1p", -+ "to_u2_phy_1p", 0), -+ GATE_SSUSB(CLK_SSUSB_U2_PHY_EN, "ssusb_u2_phy_en", "to_u2_phy", 1), -+ GATE_SSUSB(CLK_SSUSB_REF_EN, "ssusb_ref_en", "to_usb3_ref", 5), -+ GATE_SSUSB(CLK_SSUSB_SYS_EN, "ssusb_sys_en", "to_usb3_sys", 6), -+ GATE_SSUSB(CLK_SSUSB_MCU_EN, "ssusb_mcu_en", "to_usb3_mcu", 7), -+ GATE_SSUSB(CLK_SSUSB_DMA_EN, "ssusb_dma_en", "to_usb3_dma", 8), -+}; -+ -+static const struct mtk_gate pcie_clks[] = { -+ GATE_PCIE(CLK_PCIE_P1_AUX_EN, "pcie_p1_aux_en", "p1_1mhz", 12), -+ GATE_PCIE(CLK_PCIE_P1_OBFF_EN, "pcie_p1_obff_en", "free_run_4mhz", 13), -+ GATE_PCIE(CLK_PCIE_P1_AHB_EN, "pcie_p1_ahb_en", "from_top_ahb", 14), -+ GATE_PCIE(CLK_PCIE_P1_AXI_EN, "pcie_p1_axi_en", "from_top_axi", 15), -+ GATE_PCIE(CLK_PCIE_P1_MAC_EN, "pcie_p1_mac_en", "pcie1_mac_en", 16), -+ GATE_PCIE(CLK_PCIE_P1_PIPE_EN, "pcie_p1_pipe_en", "pcie1_pipe_en", 17), -+ GATE_PCIE(CLK_PCIE_P0_AUX_EN, "pcie_p0_aux_en", "p0_1mhz", 18), -+ GATE_PCIE(CLK_PCIE_P0_OBFF_EN, "pcie_p0_obff_en", "free_run_4mhz", 19), -+ GATE_PCIE(CLK_PCIE_P0_AHB_EN, "pcie_p0_ahb_en", "from_top_ahb", 20), -+ GATE_PCIE(CLK_PCIE_P0_AXI_EN, "pcie_p0_axi_en", "from_top_axi", 21), -+ GATE_PCIE(CLK_PCIE_P0_MAC_EN, "pcie_p0_mac_en", "pcie0_mac_en", 22), -+ GATE_PCIE(CLK_PCIE_P0_PIPE_EN, "pcie_p0_pipe_en", "pcie0_pipe_en", 23), -+}; -+ -+static int clk_mt7629_ssusbsys_init(struct platform_device *pdev) -+{ -+ struct clk_onecell_data *clk_data; -+ struct device_node *node = pdev->dev.of_node; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK); -+ -+ mtk_clk_register_gates(node, ssusb_clks, ARRAY_SIZE(ssusb_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ dev_err(&pdev->dev, -+ "could not register clock provider: %s: %d\n", -+ pdev->name, r); -+ -+ mtk_register_reset_controller(node, 1, 0x34); -+ -+ return r; -+} -+ -+static int clk_mt7629_pciesys_init(struct platform_device *pdev) -+{ -+ struct clk_onecell_data *clk_data; -+ struct device_node *node = pdev->dev.of_node; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK); -+ -+ mtk_clk_register_gates(node, pcie_clks, ARRAY_SIZE(pcie_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ dev_err(&pdev->dev, -+ "could not register clock provider: %s: %d\n", -+ pdev->name, r); -+ -+ mtk_register_reset_controller(node, 1, 0x34); -+ -+ return r; -+} -+ -+static const struct of_device_id of_match_clk_mt7629_hif[] = { -+ { -+ .compatible = "mediatek,mt7629-pciesys", -+ .data = clk_mt7629_pciesys_init, -+ }, { -+ .compatible = "mediatek,mt7629-ssusbsys", -+ .data = clk_mt7629_ssusbsys_init, -+ }, { -+ /* sentinel */ -+ } -+}; -+ -+static int clk_mt7629_hif_probe(struct platform_device *pdev) -+{ -+ int (*clk_init)(struct platform_device *); -+ int r; -+ -+ clk_init = of_device_get_match_data(&pdev->dev); -+ if (!clk_init) -+ return -EINVAL; -+ -+ r = clk_init(pdev); -+ if (r) -+ dev_err(&pdev->dev, -+ "could not register clock provider: %s: %d\n", -+ pdev->name, r); -+ -+ return r; -+} -+ -+static struct platform_driver clk_mt7629_hif_drv = { -+ .probe = clk_mt7629_hif_probe, -+ .driver = { -+ .name = "clk-mt7629-hif", -+ .of_match_table = of_match_clk_mt7629_hif, -+ }, -+}; -+ -+builtin_platform_driver(clk_mt7629_hif_drv); ---- /dev/null -+++ b/drivers/clk/mediatek/clk-mt7629.c -@@ -0,0 +1,723 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * Author: Wenzhen Yu -+ * Ryder Lee -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "clk-mtk.h" -+#include "clk-gate.h" -+#include "clk-cpumux.h" -+ -+#include -+ -+#define MT7629_PLL_FMAX (2500UL * MHZ) -+#define CON0_MT7629_RST_BAR BIT(24) -+ -+#define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ -+ _pd_reg, _pd_shift, _tuner_reg, _pcw_reg, \ -+ _pcw_shift, _div_table, _parent_name) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .reg = _reg, \ -+ .pwr_reg = _pwr_reg, \ -+ .en_mask = _en_mask, \ -+ .flags = _flags, \ -+ .rst_bar_mask = CON0_MT7629_RST_BAR, \ -+ .fmax = MT7629_PLL_FMAX, \ -+ .pcwbits = _pcwbits, \ -+ .pd_reg = _pd_reg, \ -+ .pd_shift = _pd_shift, \ -+ .tuner_reg = _tuner_reg, \ -+ .pcw_reg = _pcw_reg, \ -+ .pcw_shift = _pcw_shift, \ -+ .div_table = _div_table, \ -+ .parent_name = _parent_name, \ -+ } -+ -+#define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ -+ _pd_reg, _pd_shift, _tuner_reg, _pcw_reg, \ -+ _pcw_shift) \ -+ PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ -+ _pd_reg, _pd_shift, _tuner_reg, _pcw_reg, _pcw_shift, \ -+ NULL, "clk20m") -+ -+#define GATE_APMIXED(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &apmixed_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr_inv, \ -+ } -+ -+#define GATE_INFRA(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &infra_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+#define GATE_PERI0(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &peri0_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+#define GATE_PERI1(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &peri1_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+static DEFINE_SPINLOCK(mt7629_clk_lock); -+ -+static const char * const axi_parents[] = { -+ "clkxtal", -+ "syspll1_d2", -+ "syspll_d5", -+ "syspll1_d4", -+ "univpll_d5", -+ "univpll2_d2", -+ "univpll_d7", -+ "dmpll_ck" -+}; -+ -+static const char * const mem_parents[] = { -+ "clkxtal", -+ "dmpll_ck" -+}; -+ -+static const char * const ddrphycfg_parents[] = { -+ "clkxtal", -+ "syspll1_d8" -+}; -+ -+static const char * const eth_parents[] = { -+ "clkxtal", -+ "syspll1_d2", -+ "univpll1_d2", -+ "syspll1_d4", -+ "univpll_d5", -+ "sgmiipll_d2", -+ "univpll_d7", -+ "dmpll_ck" -+}; -+ -+static const char * const pwm_parents[] = { -+ "clkxtal", -+ "univpll2_d4" -+}; -+ -+static const char * const f10m_ref_parents[] = { -+ "clkxtal", -+ "sgmiipll_d2" -+}; -+ -+static const char * const nfi_infra_parents[] = { -+ "clkxtal", -+ "clkxtal", -+ "clkxtal", -+ "clkxtal", -+ "clkxtal", -+ "clkxtal", -+ "univpll2_d8", -+ "univpll3_d4", -+ "syspll1_d8", -+ "univpll1_d8", -+ "syspll4_d2", -+ "syspll2_d4", -+ "univpll2_d4", -+ "univpll3_d2", -+ "syspll1_d4", -+ "syspll_d7" -+}; -+ -+static const char * const flash_parents[] = { -+ "clkxtal", -+ "univpll_d80_d4", -+ "syspll2_d8", -+ "syspll3_d4", -+ "univpll3_d4", -+ "univpll1_d8", -+ "syspll2_d4", -+ "univpll2_d4" -+}; -+ -+static const char * const uart_parents[] = { -+ "clkxtal", -+ "univpll2_d8" -+}; -+ -+static const char * const spi0_parents[] = { -+ "clkxtal", -+ "syspll3_d2", -+ "clkxtal", -+ "syspll2_d4", -+ "syspll4_d2", -+ "univpll2_d4", -+ "univpll1_d8", -+ "clkxtal" -+}; -+ -+static const char * const spi1_parents[] = { -+ "clkxtal", -+ "syspll3_d2", -+ "clkxtal", -+ "syspll4_d4", -+ "syspll4_d2", -+ "univpll2_d4", -+ "univpll1_d8", -+ "clkxtal" -+}; -+ -+static const char * const msdc30_0_parents[] = { -+ "clkxtal", -+ "univpll2_d16", -+ "univ48m" -+}; -+ -+static const char * const msdc30_1_parents[] = { -+ "clkxtal", -+ "univpll2_d16", -+ "univ48m", -+ "syspll2_d4", -+ "univpll2_d4", -+ "syspll_d7", -+ "syspll2_d2", -+ "univpll2_d2" -+}; -+ -+static const char * const ap2wbmcu_parents[] = { -+ "clkxtal", -+ "syspll1_d2", -+ "univ48m", -+ "syspll1_d8", -+ "univpll2_d4", -+ "syspll_d7", -+ "syspll2_d2", -+ "univpll2_d2" -+}; -+ -+static const char * const audio_parents[] = { -+ "clkxtal", -+ "syspll3_d4", -+ "syspll4_d4", -+ "syspll1_d16" -+}; -+ -+static const char * const aud_intbus_parents[] = { -+ "clkxtal", -+ "syspll1_d4", -+ "syspll4_d2", -+ "dmpll_d4" -+}; -+ -+static const char * const pmicspi_parents[] = { -+ "clkxtal", -+ "syspll1_d8", -+ "syspll3_d4", -+ "syspll1_d16", -+ "univpll3_d4", -+ "clkxtal", -+ "univpll2_d4", -+ "dmpll_d8" -+}; -+ -+static const char * const scp_parents[] = { -+ "clkxtal", -+ "syspll1_d8", -+ "univpll2_d2", -+ "univpll2_d4" -+}; -+ -+static const char * const atb_parents[] = { -+ "clkxtal", -+ "syspll1_d2", -+ "syspll_d5" -+}; -+ -+static const char * const hif_parents[] = { -+ "clkxtal", -+ "syspll1_d2", -+ "univpll1_d2", -+ "syspll1_d4", -+ "univpll_d5", -+ "clk_null", -+ "univpll_d7" -+}; -+ -+static const char * const sata_parents[] = { -+ "clkxtal", -+ "univpll2_d4" -+}; -+ -+static const char * const usb20_parents[] = { -+ "clkxtal", -+ "univpll3_d4", -+ "syspll1_d8" -+}; -+ -+static const char * const aud1_parents[] = { -+ "clkxtal" -+}; -+ -+static const char * const irrx_parents[] = { -+ "clkxtal", -+ "syspll4_d16" -+}; -+ -+static const char * const crypto_parents[] = { -+ "clkxtal", -+ "univpll_d3", -+ "univpll1_d2", -+ "syspll1_d2", -+ "univpll_d5", -+ "syspll_d5", -+ "univpll2_d2", -+ "syspll_d2" -+}; -+ -+static const char * const gpt10m_parents[] = { -+ "clkxtal", -+ "clkxtal_d4" -+}; -+ -+static const char * const peribus_ck_parents[] = { -+ "syspll1_d8", -+ "syspll1_d4" -+}; -+ -+static const char * const infra_mux1_parents[] = { -+ "clkxtal", -+ "armpll", -+ "main_core_en", -+ "armpll" -+}; -+ -+static const struct mtk_gate_regs apmixed_cg_regs = { -+ .set_ofs = 0x8, -+ .clr_ofs = 0x8, -+ .sta_ofs = 0x8, -+}; -+ -+static const struct mtk_gate_regs infra_cg_regs = { -+ .set_ofs = 0x40, -+ .clr_ofs = 0x44, -+ .sta_ofs = 0x48, -+}; -+ -+static const struct mtk_gate_regs peri0_cg_regs = { -+ .set_ofs = 0x8, -+ .clr_ofs = 0x10, -+ .sta_ofs = 0x18, -+}; -+ -+static const struct mtk_gate_regs peri1_cg_regs = { -+ .set_ofs = 0xC, -+ .clr_ofs = 0x14, -+ .sta_ofs = 0x1C, -+}; -+ -+static const struct mtk_pll_data plls[] = { -+ PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x00000001, -+ 0, 21, 0x0204, 24, 0, 0x0204, 0), -+ PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0210, 0x021C, 0x00000001, -+ HAVE_RST_BAR, 21, 0x0214, 24, 0, 0x0214, 0), -+ PLL(CLK_APMIXED_UNIV2PLL, "univ2pll", 0x0220, 0x022C, 0x00000001, -+ HAVE_RST_BAR, 7, 0x0224, 24, 0, 0x0224, 14), -+ PLL(CLK_APMIXED_ETH1PLL, "eth1pll", 0x0300, 0x0310, 0x00000001, -+ 0, 21, 0x0300, 1, 0, 0x0304, 0), -+ PLL(CLK_APMIXED_ETH2PLL, "eth2pll", 0x0314, 0x0320, 0x00000001, -+ 0, 21, 0x0314, 1, 0, 0x0318, 0), -+ PLL(CLK_APMIXED_SGMIPLL, "sgmipll", 0x0358, 0x0368, 0x00000001, -+ 0, 21, 0x0358, 1, 0, 0x035C, 0), -+}; -+ -+static const struct mtk_gate apmixed_clks[] = { -+ GATE_APMIXED(CLK_APMIXED_MAIN_CORE_EN, "main_core_en", "mainpll", 5), -+}; -+ -+static const struct mtk_gate infra_clks[] = { -+ GATE_INFRA(CLK_INFRA_DBGCLK_PD, "infra_dbgclk_pd", "hd_faxi", 0), -+ GATE_INFRA(CLK_INFRA_TRNG_PD, "infra_trng_pd", "hd_faxi", 2), -+ GATE_INFRA(CLK_INFRA_DEVAPC_PD, "infra_devapc_pd", "hd_faxi", 4), -+ GATE_INFRA(CLK_INFRA_APXGPT_PD, "infra_apxgpt_pd", "infrao_10m", 18), -+ GATE_INFRA(CLK_INFRA_SEJ_PD, "infra_sej_pd", "infrao_10m", 19), -+}; -+ -+static const struct mtk_fixed_clk top_fixed_clks[] = { -+ FIXED_CLK(CLK_TOP_TO_U2_PHY, "to_u2_phy", "clkxtal", -+ 31250000), -+ FIXED_CLK(CLK_TOP_TO_U2_PHY_1P, "to_u2_phy_1p", "clkxtal", -+ 31250000), -+ FIXED_CLK(CLK_TOP_PCIE0_PIPE_EN, "pcie0_pipe_en", "clkxtal", -+ 125000000), -+ FIXED_CLK(CLK_TOP_PCIE1_PIPE_EN, "pcie1_pipe_en", "clkxtal", -+ 125000000), -+ FIXED_CLK(CLK_TOP_SSUSB_TX250M, "ssusb_tx250m", "clkxtal", -+ 250000000), -+ FIXED_CLK(CLK_TOP_SSUSB_EQ_RX250M, "ssusb_eq_rx250m", "clkxtal", -+ 250000000), -+ FIXED_CLK(CLK_TOP_SSUSB_CDR_REF, "ssusb_cdr_ref", "clkxtal", -+ 33333333), -+ FIXED_CLK(CLK_TOP_SSUSB_CDR_FB, "ssusb_cdr_fb", "clkxtal", -+ 50000000), -+ FIXED_CLK(CLK_TOP_SATA_ASIC, "sata_asic", "clkxtal", -+ 50000000), -+ FIXED_CLK(CLK_TOP_SATA_RBC, "sata_rbc", "clkxtal", -+ 50000000), -+}; -+ -+static const struct mtk_fixed_factor top_divs[] = { -+ FACTOR(CLK_TOP_TO_USB3_SYS, "to_usb3_sys", "eth1pll", 1, 4), -+ FACTOR(CLK_TOP_P1_1MHZ, "p1_1mhz", "eth1pll", 1, 500), -+ FACTOR(CLK_TOP_4MHZ, "free_run_4mhz", "eth1pll", 1, 125), -+ FACTOR(CLK_TOP_P0_1MHZ, "p0_1mhz", "eth1pll", 1, 500), -+ FACTOR(CLK_TOP_ETH_500M, "eth_500m", "eth1pll", 1, 1), -+ FACTOR(CLK_TOP_TXCLK_SRC_PRE, "txclk_src_pre", "sgmiipll_d2", 1, 1), -+ FACTOR(CLK_TOP_RTC, "rtc", "clkxtal", 1, 1024), -+ FACTOR(CLK_TOP_PWM_QTR_26M, "pwm_qtr_26m", "clkxtal", 1, 1), -+ FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "cpum_tck", 1, 1), -+ FACTOR(CLK_TOP_TO_USB3_DA_TOP, "to_usb3_da_top", "clkxtal", 1, 1), -+ FACTOR(CLK_TOP_MEMPLL, "mempll", "clkxtal", 32, 1), -+ FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1), -+ FACTOR(CLK_TOP_DMPLL_D4, "dmpll_d4", "mempll", 1, 4), -+ FACTOR(CLK_TOP_DMPLL_D8, "dmpll_d8", "mempll", 1, 8), -+ FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2), -+ FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "mainpll", 1, 4), -+ FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "mainpll", 1, 8), -+ FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "mainpll", 1, 16), -+ FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "mainpll", 1, 32), -+ FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "mainpll", 1, 6), -+ FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "mainpll", 1, 12), -+ FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "mainpll", 1, 24), -+ FACTOR(CLK_TOP_SYSPLL_D5, "syspll_d5", "mainpll", 1, 5), -+ FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "mainpll", 1, 10), -+ FACTOR(CLK_TOP_SYSPLL3_D4, "syspll3_d4", "mainpll", 1, 20), -+ FACTOR(CLK_TOP_SYSPLL_D7, "syspll_d7", "mainpll", 1, 7), -+ FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "mainpll", 1, 14), -+ FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "mainpll", 1, 28), -+ FACTOR(CLK_TOP_SYSPLL4_D16, "syspll4_d16", "mainpll", 1, 112), -+ FACTOR(CLK_TOP_UNIVPLL, "univpll", "univ2pll", 1, 2), -+ FACTOR(CLK_TOP_UNIVPLL1_D2, "univpll1_d2", "univpll", 1, 4), -+ FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll", 1, 8), -+ FACTOR(CLK_TOP_UNIVPLL1_D8, "univpll1_d8", "univpll", 1, 16), -+ FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3), -+ FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univpll", 1, 6), -+ FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll", 1, 12), -+ FACTOR(CLK_TOP_UNIVPLL2_D8, "univpll2_d8", "univpll", 1, 24), -+ FACTOR(CLK_TOP_UNIVPLL2_D16, "univpll2_d16", "univpll", 1, 48), -+ FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5), -+ FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll", 1, 10), -+ FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll", 1, 20), -+ FACTOR(CLK_TOP_UNIVPLL3_D16, "univpll3_d16", "univpll", 1, 80), -+ FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7), -+ FACTOR(CLK_TOP_UNIVPLL_D80_D4, "univpll_d80_d4", "univpll", 1, 320), -+ FACTOR(CLK_TOP_UNIV48M, "univ48m", "univpll", 1, 25), -+ FACTOR(CLK_TOP_SGMIIPLL_D2, "sgmiipll_d2", "sgmipll", 1, 2), -+ FACTOR(CLK_TOP_CLKXTAL_D4, "clkxtal_d4", "clkxtal", 1, 4), -+ FACTOR(CLK_TOP_HD_FAXI, "hd_faxi", "axi_sel", 1, 1), -+ FACTOR(CLK_TOP_FAXI, "faxi", "axi_sel", 1, 1), -+ FACTOR(CLK_TOP_F_FAUD_INTBUS, "f_faud_intbus", "aud_intbus_sel", 1, 1), -+ FACTOR(CLK_TOP_AP2WBHIF_HCLK, "ap2wbhif_hclk", "syspll1_d8", 1, 1), -+ FACTOR(CLK_TOP_10M_INFRAO, "infrao_10m", "gpt10m_sel", 1, 1), -+ FACTOR(CLK_TOP_MSDC30_1, "msdc30_1", "msdc30_1_sel", 1, 1), -+ FACTOR(CLK_TOP_SPI, "spi", "spi0_sel", 1, 1), -+ FACTOR(CLK_TOP_SF, "sf", "nfi_infra_sel", 1, 1), -+ FACTOR(CLK_TOP_FLASH, "flash", "flash_sel", 1, 1), -+ FACTOR(CLK_TOP_TO_USB3_REF, "to_usb3_ref", "sata_sel", 1, 4), -+ FACTOR(CLK_TOP_TO_USB3_MCU, "to_usb3_mcu", "axi_sel", 1, 1), -+ FACTOR(CLK_TOP_TO_USB3_DMA, "to_usb3_dma", "hif_sel", 1, 1), -+ FACTOR(CLK_TOP_FROM_TOP_AHB, "from_top_ahb", "axi_sel", 1, 1), -+ FACTOR(CLK_TOP_FROM_TOP_AXI, "from_top_axi", "hif_sel", 1, 1), -+ FACTOR(CLK_TOP_PCIE1_MAC_EN, "pcie1_mac_en", "univpll1_d4", 1, 1), -+ FACTOR(CLK_TOP_PCIE0_MAC_EN, "pcie0_mac_en", "univpll1_d4", 1, 1), -+}; -+ -+static const struct mtk_gate peri_clks[] = { -+ /* PERI0 */ -+ GATE_PERI0(CLK_PERI_PWM1_PD, "peri_pwm1_pd", "pwm_qtr_26m", 2), -+ GATE_PERI0(CLK_PERI_PWM2_PD, "peri_pwm2_pd", "pwm_qtr_26m", 3), -+ GATE_PERI0(CLK_PERI_PWM3_PD, "peri_pwm3_pd", "pwm_qtr_26m", 4), -+ GATE_PERI0(CLK_PERI_PWM4_PD, "peri_pwm4_pd", "pwm_qtr_26m", 5), -+ GATE_PERI0(CLK_PERI_PWM5_PD, "peri_pwm5_pd", "pwm_qtr_26m", 6), -+ GATE_PERI0(CLK_PERI_PWM6_PD, "peri_pwm6_pd", "pwm_qtr_26m", 7), -+ GATE_PERI0(CLK_PERI_PWM7_PD, "peri_pwm7_pd", "pwm_qtr_26m", 8), -+ GATE_PERI0(CLK_PERI_PWM_PD, "peri_pwm_pd", "pwm_qtr_26m", 9), -+ GATE_PERI0(CLK_PERI_AP_DMA_PD, "peri_ap_dma_pd", "faxi", 12), -+ GATE_PERI0(CLK_PERI_MSDC30_1_PD, "peri_msdc30_1", "msdc30_1", 14), -+ GATE_PERI0(CLK_PERI_UART0_PD, "peri_uart0_pd", "faxi", 17), -+ GATE_PERI0(CLK_PERI_UART1_PD, "peri_uart1_pd", "faxi", 18), -+ GATE_PERI0(CLK_PERI_UART2_PD, "peri_uart2_pd", "faxi", 19), -+ GATE_PERI0(CLK_PERI_UART3_PD, "peri_uart3_pd", "faxi", 20), -+ GATE_PERI0(CLK_PERI_BTIF_PD, "peri_btif_pd", "faxi", 22), -+ GATE_PERI0(CLK_PERI_I2C0_PD, "peri_i2c0_pd", "faxi", 23), -+ GATE_PERI0(CLK_PERI_SPI0_PD, "peri_spi0_pd", "spi", 28), -+ GATE_PERI0(CLK_PERI_SNFI_PD, "peri_snfi_pd", "sf", 29), -+ GATE_PERI0(CLK_PERI_NFI_PD, "peri_nfi_pd", "faxi", 30), -+ GATE_PERI0(CLK_PERI_NFIECC_PD, "peri_nfiecc_pd", "faxi", 31), -+ /* PERI1 */ -+ GATE_PERI1(CLK_PERI_FLASH_PD, "peri_flash_pd", "flash", 1), -+}; -+ -+static struct mtk_composite infra_muxes[] = { -+ /* INFRA_TOPCKGEN_CKMUXSEL */ -+ MUX(CLK_INFRA_MUX1_SEL, "infra_mux1_sel", infra_mux1_parents, 0x000, -+ 2, 2), -+}; -+ -+static struct mtk_composite top_muxes[] = { -+ /* CLK_CFG_0 */ -+ MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, -+ 0x040, 0, 3, 7), -+ MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, -+ 0x040, 8, 1, 15), -+ MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents, -+ 0x040, 16, 1, 23), -+ MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents, -+ 0x040, 24, 3, 31), -+ /* CLK_CFG_1 */ -+ MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, -+ 0x050, 0, 2, 7), -+ MUX_GATE(CLK_TOP_F10M_REF_SEL, "f10m_ref_sel", f10m_ref_parents, -+ 0x050, 8, 1, 15), -+ MUX_GATE(CLK_TOP_NFI_INFRA_SEL, "nfi_infra_sel", nfi_infra_parents, -+ 0x050, 16, 4, 23), -+ MUX_GATE(CLK_TOP_FLASH_SEL, "flash_sel", flash_parents, -+ 0x050, 24, 3, 31), -+ /* CLK_CFG_2 */ -+ MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, -+ 0x060, 0, 1, 7), -+ MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents, -+ 0x060, 8, 3, 15), -+ MUX_GATE(CLK_TOP_SPI1_SEL, "spi1_sel", spi1_parents, -+ 0x060, 16, 3, 23), -+ MUX_GATE(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", uart_parents, -+ 0x060, 24, 3, 31), -+ /* CLK_CFG_3 */ -+ MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_0_parents, -+ 0x070, 0, 3, 7), -+ MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_1_parents, -+ 0x070, 8, 3, 15), -+ MUX_GATE(CLK_TOP_AP2WBMCU_SEL, "ap2wbmcu_sel", ap2wbmcu_parents, -+ 0x070, 16, 3, 23), -+ MUX_GATE(CLK_TOP_AP2WBHIF_SEL, "ap2wbhif_sel", ap2wbmcu_parents, -+ 0x070, 24, 3, 31), -+ /* CLK_CFG_4 */ -+ MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents, -+ 0x080, 0, 2, 7), -+ MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, -+ 0x080, 8, 2, 15), -+ MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, -+ 0x080, 16, 3, 23), -+ MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, -+ 0x080, 24, 2, 31), -+ /* CLK_CFG_5 */ -+ MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, -+ 0x090, 0, 2, 7), -+ MUX_GATE(CLK_TOP_HIF_SEL, "hif_sel", hif_parents, -+ 0x090, 8, 3, 15), -+ MUX_GATE(CLK_TOP_SATA_SEL, "sata_sel", sata_parents, -+ 0x090, 16, 1, 23), -+ MUX_GATE(CLK_TOP_U2_SEL, "usb20_sel", usb20_parents, -+ 0x090, 24, 2, 31), -+ /* CLK_CFG_6 */ -+ MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents, -+ 0x0A0, 0, 1, 7), -+ MUX_GATE(CLK_TOP_AUD2_SEL, "aud2_sel", aud1_parents, -+ 0x0A0, 8, 1, 15), -+ MUX_GATE(CLK_TOP_IRRX_SEL, "irrx_sel", irrx_parents, -+ 0x0A0, 16, 1, 23), -+ MUX_GATE(CLK_TOP_IRTX_SEL, "irtx_sel", irrx_parents, -+ 0x0A0, 24, 1, 31), -+ /* CLK_CFG_7 */ -+ MUX_GATE(CLK_TOP_SATA_MCU_SEL, "sata_mcu_sel", scp_parents, -+ 0x0B0, 0, 2, 7), -+ MUX_GATE(CLK_TOP_PCIE0_MCU_SEL, "pcie0_mcu_sel", scp_parents, -+ 0x0B0, 8, 2, 15), -+ MUX_GATE(CLK_TOP_PCIE1_MCU_SEL, "pcie1_mcu_sel", scp_parents, -+ 0x0B0, 16, 2, 23), -+ MUX_GATE(CLK_TOP_SSUSB_MCU_SEL, "ssusb_mcu_sel", scp_parents, -+ 0x0B0, 24, 2, 31), -+ /* CLK_CFG_8 */ -+ MUX_GATE(CLK_TOP_CRYPTO_SEL, "crypto_sel", crypto_parents, -+ 0x0C0, 0, 3, 7), -+ MUX_GATE(CLK_TOP_SGMII_REF_1_SEL, "sgmii_ref_1_sel", f10m_ref_parents, -+ 0x0C0, 8, 1, 15), -+ MUX_GATE(CLK_TOP_10M_SEL, "gpt10m_sel", gpt10m_parents, -+ 0x0C0, 16, 1, 23), -+}; -+ -+static struct mtk_composite peri_muxes[] = { -+ /* PERI_GLOBALCON_CKSEL */ -+ MUX(CLK_PERIBUS_SEL, "peribus_ck_sel", peribus_ck_parents, 0x05C, 0, 1), -+}; -+ -+static int mtk_topckgen_init(struct platform_device *pdev) -+{ -+ struct clk_onecell_data *clk_data; -+ void __iomem *base; -+ struct device_node *node = pdev->dev.of_node; -+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ -+ base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); -+ -+ mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), -+ clk_data); -+ -+ mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), -+ clk_data); -+ -+ mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), -+ base, &mt7629_clk_lock, clk_data); -+ -+ clk_prepare_enable(clk_data->clks[CLK_TOP_AXI_SEL]); -+ clk_prepare_enable(clk_data->clks[CLK_TOP_MEM_SEL]); -+ clk_prepare_enable(clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]); -+ -+ return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+} -+ -+static int mtk_infrasys_init(struct platform_device *pdev) -+{ -+ struct device_node *node = pdev->dev.of_node; -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); -+ -+ mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), -+ clk_data); -+ -+ mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, -+ clk_data); -+ if (r) -+ return r; -+ -+ return 0; -+} -+ -+static int mtk_pericfg_init(struct platform_device *pdev) -+{ -+ struct clk_onecell_data *clk_data; -+ void __iomem *base; -+ int r; -+ struct device_node *node = pdev->dev.of_node; -+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ -+ base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); -+ -+ mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), -+ clk_data); -+ -+ mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base, -+ &mt7629_clk_lock, clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ return r; -+ -+ clk_prepare_enable(clk_data->clks[CLK_PERI_UART0_PD]); -+ -+ return 0; -+} -+ -+static int mtk_apmixedsys_init(struct platform_device *pdev) -+{ -+ struct clk_onecell_data *clk_data; -+ struct device_node *node = pdev->dev.of_node; -+ -+ clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK); -+ if (!clk_data) -+ return -ENOMEM; -+ -+ mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), -+ clk_data); -+ -+ mtk_clk_register_gates(node, apmixed_clks, -+ ARRAY_SIZE(apmixed_clks), clk_data); -+ -+ clk_prepare_enable(clk_data->clks[CLK_APMIXED_ARMPLL]); -+ clk_prepare_enable(clk_data->clks[CLK_APMIXED_MAIN_CORE_EN]); -+ -+ return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+} -+ -+ -+static const struct of_device_id of_match_clk_mt7629[] = { -+ { -+ .compatible = "mediatek,mt7629-apmixedsys", -+ .data = mtk_apmixedsys_init, -+ }, { -+ .compatible = "mediatek,mt7629-infracfg", -+ .data = mtk_infrasys_init, -+ }, { -+ .compatible = "mediatek,mt7629-topckgen", -+ .data = mtk_topckgen_init, -+ }, { -+ .compatible = "mediatek,mt7629-pericfg", -+ .data = mtk_pericfg_init, -+ }, { -+ /* sentinel */ -+ } -+}; -+ -+static int clk_mt7629_probe(struct platform_device *pdev) -+{ -+ int (*clk_init)(struct platform_device *); -+ int r; -+ -+ clk_init = of_device_get_match_data(&pdev->dev); -+ if (!clk_init) -+ return -EINVAL; -+ -+ r = clk_init(pdev); -+ if (r) -+ dev_err(&pdev->dev, -+ "could not register clock provider: %s: %d\n", -+ pdev->name, r); -+ -+ return r; -+} -+ -+static struct platform_driver clk_mt7629_drv = { -+ .probe = clk_mt7629_probe, -+ .driver = { -+ .name = "clk-mt7629", -+ .of_match_table = of_match_clk_mt7629, -+ }, -+}; -+ -+static int clk_mt7629_init(void) -+{ -+ return platform_driver_register(&clk_mt7629_drv); -+} -+ -+arch_initcall(clk_mt7629_init); ---- /dev/null -+++ b/include/dt-bindings/clock/mt7629-clk.h -@@ -0,0 +1,203 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ */ -+ -+#ifndef _DT_BINDINGS_CLK_MT7629_H -+#define _DT_BINDINGS_CLK_MT7629_H -+ -+/* TOPCKGEN */ -+#define CLK_TOP_TO_U2_PHY 0 -+#define CLK_TOP_TO_U2_PHY_1P 1 -+#define CLK_TOP_PCIE0_PIPE_EN 2 -+#define CLK_TOP_PCIE1_PIPE_EN 3 -+#define CLK_TOP_SSUSB_TX250M 4 -+#define CLK_TOP_SSUSB_EQ_RX250M 5 -+#define CLK_TOP_SSUSB_CDR_REF 6 -+#define CLK_TOP_SSUSB_CDR_FB 7 -+#define CLK_TOP_SATA_ASIC 8 -+#define CLK_TOP_SATA_RBC 9 -+#define CLK_TOP_TO_USB3_SYS 10 -+#define CLK_TOP_P1_1MHZ 11 -+#define CLK_TOP_4MHZ 12 -+#define CLK_TOP_P0_1MHZ 13 -+#define CLK_TOP_ETH_500M 14 -+#define CLK_TOP_TXCLK_SRC_PRE 15 -+#define CLK_TOP_RTC 16 -+#define CLK_TOP_PWM_QTR_26M 17 -+#define CLK_TOP_CPUM_TCK_IN 18 -+#define CLK_TOP_TO_USB3_DA_TOP 19 -+#define CLK_TOP_MEMPLL 20 -+#define CLK_TOP_DMPLL 21 -+#define CLK_TOP_DMPLL_D4 22 -+#define CLK_TOP_DMPLL_D8 23 -+#define CLK_TOP_SYSPLL_D2 24 -+#define CLK_TOP_SYSPLL1_D2 25 -+#define CLK_TOP_SYSPLL1_D4 26 -+#define CLK_TOP_SYSPLL1_D8 27 -+#define CLK_TOP_SYSPLL1_D16 28 -+#define CLK_TOP_SYSPLL2_D2 29 -+#define CLK_TOP_SYSPLL2_D4 30 -+#define CLK_TOP_SYSPLL2_D8 31 -+#define CLK_TOP_SYSPLL_D5 32 -+#define CLK_TOP_SYSPLL3_D2 33 -+#define CLK_TOP_SYSPLL3_D4 34 -+#define CLK_TOP_SYSPLL_D7 35 -+#define CLK_TOP_SYSPLL4_D2 36 -+#define CLK_TOP_SYSPLL4_D4 37 -+#define CLK_TOP_SYSPLL4_D16 38 -+#define CLK_TOP_UNIVPLL 39 -+#define CLK_TOP_UNIVPLL1_D2 40 -+#define CLK_TOP_UNIVPLL1_D4 41 -+#define CLK_TOP_UNIVPLL1_D8 42 -+#define CLK_TOP_UNIVPLL_D3 43 -+#define CLK_TOP_UNIVPLL2_D2 44 -+#define CLK_TOP_UNIVPLL2_D4 45 -+#define CLK_TOP_UNIVPLL2_D8 46 -+#define CLK_TOP_UNIVPLL2_D16 47 -+#define CLK_TOP_UNIVPLL_D5 48 -+#define CLK_TOP_UNIVPLL3_D2 49 -+#define CLK_TOP_UNIVPLL3_D4 50 -+#define CLK_TOP_UNIVPLL3_D16 51 -+#define CLK_TOP_UNIVPLL_D7 52 -+#define CLK_TOP_UNIVPLL_D80_D4 53 -+#define CLK_TOP_UNIV48M 54 -+#define CLK_TOP_SGMIIPLL_D2 55 -+#define CLK_TOP_CLKXTAL_D4 56 -+#define CLK_TOP_HD_FAXI 57 -+#define CLK_TOP_FAXI 58 -+#define CLK_TOP_F_FAUD_INTBUS 59 -+#define CLK_TOP_AP2WBHIF_HCLK 60 -+#define CLK_TOP_10M_INFRAO 61 -+#define CLK_TOP_MSDC30_1 62 -+#define CLK_TOP_SPI 63 -+#define CLK_TOP_SF 64 -+#define CLK_TOP_FLASH 65 -+#define CLK_TOP_TO_USB3_REF 66 -+#define CLK_TOP_TO_USB3_MCU 67 -+#define CLK_TOP_TO_USB3_DMA 68 -+#define CLK_TOP_FROM_TOP_AHB 69 -+#define CLK_TOP_FROM_TOP_AXI 70 -+#define CLK_TOP_PCIE1_MAC_EN 71 -+#define CLK_TOP_PCIE0_MAC_EN 72 -+#define CLK_TOP_AXI_SEL 73 -+#define CLK_TOP_MEM_SEL 74 -+#define CLK_TOP_DDRPHYCFG_SEL 75 -+#define CLK_TOP_ETH_SEL 76 -+#define CLK_TOP_PWM_SEL 77 -+#define CLK_TOP_F10M_REF_SEL 78 -+#define CLK_TOP_NFI_INFRA_SEL 79 -+#define CLK_TOP_FLASH_SEL 80 -+#define CLK_TOP_UART_SEL 81 -+#define CLK_TOP_SPI0_SEL 82 -+#define CLK_TOP_SPI1_SEL 83 -+#define CLK_TOP_MSDC50_0_SEL 84 -+#define CLK_TOP_MSDC30_0_SEL 85 -+#define CLK_TOP_MSDC30_1_SEL 86 -+#define CLK_TOP_AP2WBMCU_SEL 87 -+#define CLK_TOP_AP2WBHIF_SEL 88 -+#define CLK_TOP_AUDIO_SEL 89 -+#define CLK_TOP_AUD_INTBUS_SEL 90 -+#define CLK_TOP_PMICSPI_SEL 91 -+#define CLK_TOP_SCP_SEL 92 -+#define CLK_TOP_ATB_SEL 93 -+#define CLK_TOP_HIF_SEL 94 -+#define CLK_TOP_SATA_SEL 95 -+#define CLK_TOP_U2_SEL 96 -+#define CLK_TOP_AUD1_SEL 97 -+#define CLK_TOP_AUD2_SEL 98 -+#define CLK_TOP_IRRX_SEL 99 -+#define CLK_TOP_IRTX_SEL 100 -+#define CLK_TOP_SATA_MCU_SEL 101 -+#define CLK_TOP_PCIE0_MCU_SEL 102 -+#define CLK_TOP_PCIE1_MCU_SEL 103 -+#define CLK_TOP_SSUSB_MCU_SEL 104 -+#define CLK_TOP_CRYPTO_SEL 105 -+#define CLK_TOP_SGMII_REF_1_SEL 106 -+#define CLK_TOP_10M_SEL 107 -+#define CLK_TOP_NR_CLK 108 -+ -+/* INFRACFG */ -+#define CLK_INFRA_MUX1_SEL 0 -+#define CLK_INFRA_DBGCLK_PD 1 -+#define CLK_INFRA_TRNG_PD 2 -+#define CLK_INFRA_DEVAPC_PD 3 -+#define CLK_INFRA_APXGPT_PD 4 -+#define CLK_INFRA_SEJ_PD 5 -+#define CLK_INFRA_NR_CLK 6 -+ -+/* PERICFG */ -+#define CLK_PERIBUS_SEL 0 -+#define CLK_PERI_PWM1_PD 1 -+#define CLK_PERI_PWM2_PD 2 -+#define CLK_PERI_PWM3_PD 3 -+#define CLK_PERI_PWM4_PD 4 -+#define CLK_PERI_PWM5_PD 5 -+#define CLK_PERI_PWM6_PD 6 -+#define CLK_PERI_PWM7_PD 7 -+#define CLK_PERI_PWM_PD 8 -+#define CLK_PERI_AP_DMA_PD 9 -+#define CLK_PERI_MSDC30_1_PD 10 -+#define CLK_PERI_UART0_PD 11 -+#define CLK_PERI_UART1_PD 12 -+#define CLK_PERI_UART2_PD 13 -+#define CLK_PERI_UART3_PD 14 -+#define CLK_PERI_BTIF_PD 15 -+#define CLK_PERI_I2C0_PD 16 -+#define CLK_PERI_SPI0_PD 17 -+#define CLK_PERI_SNFI_PD 18 -+#define CLK_PERI_NFI_PD 19 -+#define CLK_PERI_NFIECC_PD 20 -+#define CLK_PERI_FLASH_PD 21 -+#define CLK_PERI_NR_CLK 22 -+ -+/* APMIXEDSYS */ -+#define CLK_APMIXED_ARMPLL 0 -+#define CLK_APMIXED_MAINPLL 1 -+#define CLK_APMIXED_UNIV2PLL 2 -+#define CLK_APMIXED_ETH1PLL 3 -+#define CLK_APMIXED_ETH2PLL 4 -+#define CLK_APMIXED_SGMIPLL 5 -+#define CLK_APMIXED_MAIN_CORE_EN 6 -+#define CLK_APMIXED_NR_CLK 7 -+ -+/* SSUSBSYS */ -+#define CLK_SSUSB_U2_PHY_1P_EN 0 -+#define CLK_SSUSB_U2_PHY_EN 1 -+#define CLK_SSUSB_REF_EN 2 -+#define CLK_SSUSB_SYS_EN 3 -+#define CLK_SSUSB_MCU_EN 4 -+#define CLK_SSUSB_DMA_EN 5 -+#define CLK_SSUSB_NR_CLK 6 -+ -+/* PCIESYS */ -+#define CLK_PCIE_P1_AUX_EN 0 -+#define CLK_PCIE_P1_OBFF_EN 1 -+#define CLK_PCIE_P1_AHB_EN 2 -+#define CLK_PCIE_P1_AXI_EN 3 -+#define CLK_PCIE_P1_MAC_EN 4 -+#define CLK_PCIE_P1_PIPE_EN 5 -+#define CLK_PCIE_P0_AUX_EN 6 -+#define CLK_PCIE_P0_OBFF_EN 7 -+#define CLK_PCIE_P0_AHB_EN 8 -+#define CLK_PCIE_P0_AXI_EN 9 -+#define CLK_PCIE_P0_MAC_EN 10 -+#define CLK_PCIE_P0_PIPE_EN 11 -+#define CLK_PCIE_NR_CLK 12 -+ -+/* ETHSYS */ -+#define CLK_ETH_FE_EN 0 -+#define CLK_ETH_GP2_EN 1 -+#define CLK_ETH_GP1_EN 2 -+#define CLK_ETH_GP0_EN 3 -+#define CLK_ETH_ESW_EN 4 -+#define CLK_ETH_NR_CLK 5 -+ -+/* SGMIISYS */ -+#define CLK_SGMII_TX_EN 0 -+#define CLK_SGMII_RX_EN 1 -+#define CLK_SGMII_CDR_REF 2 -+#define CLK_SGMII_CDR_FB 3 -+#define CLK_SGMII_NR_CLK 4 -+ -+#endif /* _DT_BINDINGS_CLK_MT7629_H */ diff --git a/target/linux/mediatek/patches-4.19/0005-pinctrl-mediatek-sync-with-5.3.patch b/target/linux/mediatek/patches-4.19/0005-pinctrl-mediatek-sync-with-5.3.patch deleted file mode 100644 index 56c2dcfdb7..0000000000 --- a/target/linux/mediatek/patches-4.19/0005-pinctrl-mediatek-sync-with-5.3.patch +++ /dev/null @@ -1,15859 +0,0 @@ -This patch squashes the following upstream commits: - -5ca1b1c5cd98 pinctrl: mediatek: mt8183: Add pm_ops -5c0904488a20 pinctrl: mediatek: Add pm_ops to pinctrl-paris -1802d0beecaf treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 -ec8f24b7faaf treewide: Add SPDX license identifier - Makefile/Kconfig -264667112ef0 pinctrl: mediatek: Add MT8516 Pinctrl driver -5e73de3413c5 pinctrl: add drive for I2C related pins on MT8183 -e65372124cd7 Merge tag 'v5.0-rc6' into devel -2d2d478576d7 pinctrl: mediatek: fix Kconfig build errors for moore core -6e737a4e921e pinctrl: mediatek: add EINT support to virtual GPIOs -b5af33df50e9 pinctrl: mediatek: improve Kconfig dependencies -9ede2a76f66e pinctrl: mediatek: Convert to using %pOFn instead of device_node.name -b44677375fee pinctrl: mediatek: add pinctrl support for MT7629 SoC -f969b7aac980 pinctrl: mediatek: Add initial pinctrl driver for MT6797 SoC -7c68024a82a2 pinctrl: mediatek: Fix dependencies for EINT_MTK -78bf386daf8a pinctrl: mediatek: clean up indentation issues, add missing tab -28e0603c4df4 pinctrl: mediatek: Make eint_m u16 -71a9d395aa12 pinctrl: mediatek: select GPIOLIB -ad335bee6ced pinctrl: mediatek: mark dummy helpers as 'static inline' -7a52127e3cf1 pinctrl: mediatek: fix check on EINT_NA comparison -bb8d8466ca25 pinctrl: mediatek: add eint support to MT6765 pinctrl driver -477fecee7ca9 pinctrl: mediatek: add MT6765 pinctrl driver -ecfcfb498860 pinctrl: mediatek: add no eint function for pin define -7f2e29e133ea pinctrl: mediatek: fix static checker warning caused by EINT_NA -068cfb9a0fd9 pinctrl: mediatek: moore: fix return value check in mtk_moore_pinctrl_probe() -07c6b037c2ba pinctrl: mediatek: make symbol 'mtk_drive' static -184744e9a014 pinctrl: mediatek: paris: fix return value check in mtk_paris_pinctrl_probe() -22d7fe4984a2 pinctrl: mtk: Fix up GPIO includes -55818b90233b Merge branch 'ib-mtk' into devel -6561859b067f pinctrl: mediatek: add eint support to MT8183 pinctrl driver -89132dd8ffd2 pinctrl: mediatek: extend eint build to pinctrl-mtk-common-v2.c -29686f0151df pintcrl: mediatek: add pull tweaks for I2C related pins on MT8183 -79348f6fb713 pinctrl: mediatek: extend advanced pull support in pinctrl-mtk-common-v2.c -750cd15d9081 pinctrl: mediatek: add MT8183 pinctrl driver -805250982bb5 pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings -b7d7f9eeca55 pinctrl: mediatek: extend struct mtk_pin_desc which per-pin driver depends on -9d9b171c6897 pinctrl: mediatek: adjust error code and message when some register not supported is found -2bc47dfe4f8b pinctrl: mediatek: add multiple register bases support to pinctrl-mtk-common-v2.c -ea051eb38413 pinctrl: mediatek: use pin descriptor all in pinctrl-mtk-common-v2.c -e7507f57a93a pinctrl: mediatek: add MT7623 pinctrl driver based on generic pinctrl binding -9afc305bfad7 pinctrl: mediatek: add pullen, pullsel register support to pinctrl-mtk-common-v2.c -182c842fd5e6 pinctrl: mediatek: add ies register support to pinctrl-mtk-common-v2.c -0d7ca772148f pinctrl: mediatek: add advanced pull related support to pinctrl-mtk-common-v2.c -85430152ba46 pinctrl: mediatek: add pull related support to pinctrl-mtk-common-v2.c -3ad38a14e13c pinctrl: mediatek: add drv register support to pinctrl-mtk-common-v2.c -c28321979ba8 pinctrl: mediatek: add driving strength related support to pinctrl-mtk-common-v2.c -1dc5e5369159 pinctrl: mediatek: extend struct mtk_pin_soc to pinctrl-mtk-common-v2.c -fb5fa8dc151b pinctrl: mediatek: extend struct mtk_pin_desc to pinctrl-mtk-common-v2.c -b906faf7b61d pinctrl: mediatek: extend struct mtk_pin_field_calc to pinctrl-mtk-common-v2.c -e78d57b2f87c pinctrl: mediatek: add pinctrl-moore that implements the generic pinctrl dt-bindings -a1a503a8c332 pinctrl: mediatek: add pinctrl-mtk-common-v2 for all MediaTek pinctrls -1c5fb66afa2a pinctrl: Include nothing else -94f4e54cecaf pinctrl: Convert to using %pOFn instead of device_node.name - ---- a/drivers/pinctrl/mediatek/Kconfig -+++ b/drivers/pinctrl/mediatek/Kconfig -@@ -3,7 +3,8 @@ menu "MediaTek pinctrl drivers" - - config EINT_MTK - bool "MediaTek External Interrupt Support" -- depends on PINCTRL_MTK || PINCTRL_MT7622 || COMPILE_TEST -+ depends on PINCTRL_MTK || PINCTRL_MTK_MOORE || PINCTRL_MTK_PARIS || COMPILE_TEST -+ select GPIOLIB - select IRQ_DOMAIN - - config PINCTRL_MTK -@@ -15,6 +16,24 @@ config PINCTRL_MTK - select EINT_MTK - select OF_GPIO - -+config PINCTRL_MTK_MOORE -+ bool -+ depends on OF -+ select GENERIC_PINCONF -+ select GENERIC_PINCTRL_GROUPS -+ select GENERIC_PINMUX_FUNCTIONS -+ select GPIOLIB -+ select OF_GPIO -+ -+config PINCTRL_MTK_PARIS -+ bool -+ depends on OF -+ select PINMUX -+ select GENERIC_PINCONF -+ select GPIOLIB -+ select EINT_MTK -+ select OF_GPIO -+ - # For ARMv7 SoCs - config PINCTRL_MT2701 - bool "Mediatek MT2701 pin control" -@@ -23,6 +42,20 @@ config PINCTRL_MT2701 - default MACH_MT2701 - select PINCTRL_MTK - -+config PINCTRL_MT7623 -+ bool "Mediatek MT7623 pin control with generic binding" -+ depends on MACH_MT7623 || COMPILE_TEST -+ depends on OF -+ default MACH_MT7623 -+ select PINCTRL_MTK_MOORE -+ -+config PINCTRL_MT7629 -+ bool "Mediatek MT7629 pin control" -+ depends on MACH_MT7629 || COMPILE_TEST -+ depends on OF -+ default MACH_MT7629 -+ select PINCTRL_MTK_MOORE -+ - config PINCTRL_MT8135 - bool "Mediatek MT8135 pin control" - depends on MACH_MT8135 || COMPILE_TEST -@@ -45,21 +78,46 @@ config PINCTRL_MT2712 - default ARM64 && ARCH_MEDIATEK - select PINCTRL_MTK - -+config PINCTRL_MT6765 -+ bool "Mediatek MT6765 pin control" -+ depends on OF -+ depends on ARM64 || COMPILE_TEST -+ default ARM64 && ARCH_MEDIATEK -+ select PINCTRL_MTK_PARIS -+ -+config PINCTRL_MT6797 -+ bool "Mediatek MT6797 pin control" -+ depends on OF -+ depends on ARM64 || COMPILE_TEST -+ default ARM64 && ARCH_MEDIATEK -+ select PINCTRL_MTK_PARIS -+ - config PINCTRL_MT7622 - bool "MediaTek MT7622 pin control" - depends on OF - depends on ARM64 || COMPILE_TEST -- select GENERIC_PINCONF -- select GENERIC_PINCTRL_GROUPS -- select GENERIC_PINMUX_FUNCTIONS -- select GPIOLIB -- select OF_GPIO -+ default ARM64 && ARCH_MEDIATEK -+ select PINCTRL_MTK_MOORE - - config PINCTRL_MT8173 - bool "Mediatek MT8173 pin control" - depends on OF - depends on ARM64 || COMPILE_TEST - default ARM64 && ARCH_MEDIATEK -+ select PINCTRL_MTK -+ -+config PINCTRL_MT8183 -+ bool "Mediatek MT8183 pin control" -+ depends on OF -+ depends on ARM64 || COMPILE_TEST -+ default ARM64 && ARCH_MEDIATEK -+ select PINCTRL_MTK_PARIS -+ -+config PINCTRL_MT8516 -+ bool "Mediatek MT8516 pin control" -+ depends on OF -+ depends on ARM64 || COMPILE_TEST -+ default ARM64 && ARCH_MEDIATEK - select PINCTRL_MTK - - # For PMIC ---- a/drivers/pinctrl/mediatek/Makefile -+++ b/drivers/pinctrl/mediatek/Makefile -@@ -2,12 +2,20 @@ - # Core - obj-$(CONFIG_EINT_MTK) += mtk-eint.o - obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o -+obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o pinctrl-mtk-common-v2.o -+obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o pinctrl-mtk-common-v2.o - - # SoC Drivers - obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o - obj-$(CONFIG_PINCTRL_MT2712) += pinctrl-mt2712.o - obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o - obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o -+obj-$(CONFIG_PINCTRL_MT6765) += pinctrl-mt6765.o -+obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o - obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o -+obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o -+obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o - obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o -+obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o -+obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o - obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o ---- a/drivers/pinctrl/mediatek/mtk-eint.c -+++ b/drivers/pinctrl/mediatek/mtk-eint.c -@@ -11,7 +11,7 @@ - - #include - #include --#include -+#include - #include - #include - #include ---- a/drivers/pinctrl/mediatek/mtk-eint.h -+++ b/drivers/pinctrl/mediatek/mtk-eint.h -@@ -92,13 +92,13 @@ static inline int mtk_eint_do_resume(str - return -EOPNOTSUPP; - } - --int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_n, -+static inline int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_n, - unsigned int debounce) - { - return -EOPNOTSUPP; - } - --int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n) -+static inline int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n) - { - return -EOPNOTSUPP; - } ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-moore.c -@@ -0,0 +1,690 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding -+ * pinctrl-bindings.txt for MediaTek SoC. -+ * -+ * Copyright (C) 2017-2018 MediaTek Inc. -+ * Author: Sean Wang -+ * -+ */ -+ -+#include -+#include "pinctrl-moore.h" -+ -+#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME -+ -+/* Custom pinconf parameters */ -+#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) -+#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) -+#define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) -+#define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) -+ -+static const struct pinconf_generic_params mtk_custom_bindings[] = { -+ {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, -+ {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, -+ {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, -+ {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, -+}; -+ -+#ifdef CONFIG_DEBUG_FS -+static const struct pin_config_item mtk_conf_items[] = { -+ PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), -+ PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), -+ PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), -+ PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), -+}; -+#endif -+ -+static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, -+ unsigned int selector, unsigned int group) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ struct function_desc *func; -+ struct group_desc *grp; -+ int i; -+ -+ func = pinmux_generic_get_function(pctldev, selector); -+ if (!func) -+ return -EINVAL; -+ -+ grp = pinctrl_generic_get_group(pctldev, group); -+ if (!grp) -+ return -EINVAL; -+ -+ dev_dbg(pctldev->dev, "enable function %s group %s\n", -+ func->name, grp->name); -+ -+ for (i = 0; i < grp->num_pins; i++) { -+ const struct mtk_pin_desc *desc; -+ int *pin_modes = grp->data; -+ int pin = grp->pins[i]; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, -+ pin_modes[i]); -+ } -+ -+ return 0; -+} -+ -+static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, -+ struct pinctrl_gpio_range *range, -+ unsigned int pin) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, -+ hw->soc->gpio_m); -+} -+ -+static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, -+ struct pinctrl_gpio_range *range, -+ unsigned int pin, bool input) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ /* hardware would take 0 as input direction */ -+ return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); -+} -+ -+static int mtk_pinconf_get(struct pinctrl_dev *pctldev, -+ unsigned int pin, unsigned long *config) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ u32 param = pinconf_to_config_param(*config); -+ int val, val2, err, reg, ret = 1; -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ switch (param) { -+ case PIN_CONFIG_BIAS_DISABLE: -+ if (hw->soc->bias_disable_get) { -+ err = hw->soc->bias_disable_get(hw, desc, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_UP: -+ if (hw->soc->bias_get) { -+ err = hw->soc->bias_get(hw, desc, 1, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_DOWN: -+ if (hw->soc->bias_get) { -+ err = hw->soc->bias_get(hw, desc, 0, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_SLEW_RATE: -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val); -+ if (err) -+ return err; -+ -+ if (!val) -+ return -EINVAL; -+ -+ break; -+ case PIN_CONFIG_INPUT_ENABLE: -+ case PIN_CONFIG_OUTPUT_ENABLE: -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); -+ if (err) -+ return err; -+ -+ /* HW takes input mode as zero; output mode as non-zero */ -+ if ((val && param == PIN_CONFIG_INPUT_ENABLE) || -+ (!val && param == PIN_CONFIG_OUTPUT_ENABLE)) -+ return -EINVAL; -+ -+ break; -+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE: -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); -+ if (err) -+ return err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2); -+ if (err) -+ return err; -+ -+ if (val || !val2) -+ return -EINVAL; -+ -+ break; -+ case PIN_CONFIG_DRIVE_STRENGTH: -+ if (hw->soc->drive_get) { -+ err = hw->soc->drive_get(hw, desc, &ret); -+ if (err) -+ return err; -+ } else { -+ err = -ENOTSUPP; -+ } -+ break; -+ case MTK_PIN_CONFIG_TDSEL: -+ case MTK_PIN_CONFIG_RDSEL: -+ reg = (param == MTK_PIN_CONFIG_TDSEL) ? -+ PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; -+ -+ err = mtk_hw_get_value(hw, desc, reg, &val); -+ if (err) -+ return err; -+ -+ ret = val; -+ -+ break; -+ case MTK_PIN_CONFIG_PU_ADV: -+ case MTK_PIN_CONFIG_PD_ADV: -+ if (hw->soc->adv_pull_get) { -+ bool pullup; -+ -+ pullup = param == MTK_PIN_CONFIG_PU_ADV; -+ err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ default: -+ return -ENOTSUPP; -+ } -+ -+ *config = pinconf_to_config_packed(param, ret); -+ -+ return 0; -+} -+ -+static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, -+ unsigned long *configs, unsigned int num_configs) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ const struct mtk_pin_desc *desc; -+ u32 reg, param, arg; -+ int cfg, err = 0; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ for (cfg = 0; cfg < num_configs; cfg++) { -+ param = pinconf_to_config_param(configs[cfg]); -+ arg = pinconf_to_config_argument(configs[cfg]); -+ -+ switch (param) { -+ case PIN_CONFIG_BIAS_DISABLE: -+ if (hw->soc->bias_disable_set) { -+ err = hw->soc->bias_disable_set(hw, desc); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_UP: -+ if (hw->soc->bias_set) { -+ err = hw->soc->bias_set(hw, desc, 1); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_DOWN: -+ if (hw->soc->bias_set) { -+ err = hw->soc->bias_set(hw, desc, 0); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_OUTPUT_ENABLE: -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, -+ MTK_DISABLE); -+ if (err) -+ goto err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ MTK_OUTPUT); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_INPUT_ENABLE: -+ -+ if (hw->soc->ies_present) { -+ mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, -+ MTK_ENABLE); -+ } -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ MTK_INPUT); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_SLEW_RATE: -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, -+ arg); -+ if (err) -+ goto err; -+ -+ break; -+ case PIN_CONFIG_OUTPUT: -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ MTK_OUTPUT); -+ if (err) -+ goto err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, -+ arg); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE: -+ /* arg = 1: Input mode & SMT enable ; -+ * arg = 0: Output mode & SMT disable -+ */ -+ arg = arg ? 2 : 1; -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ arg & 1); -+ if (err) -+ goto err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, -+ !!(arg & 2)); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_DRIVE_STRENGTH: -+ if (hw->soc->drive_set) { -+ err = hw->soc->drive_set(hw, desc, arg); -+ if (err) -+ return err; -+ } else { -+ err = -ENOTSUPP; -+ } -+ break; -+ case MTK_PIN_CONFIG_TDSEL: -+ case MTK_PIN_CONFIG_RDSEL: -+ reg = (param == MTK_PIN_CONFIG_TDSEL) ? -+ PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; -+ -+ err = mtk_hw_set_value(hw, desc, reg, arg); -+ if (err) -+ goto err; -+ break; -+ case MTK_PIN_CONFIG_PU_ADV: -+ case MTK_PIN_CONFIG_PD_ADV: -+ if (hw->soc->adv_pull_set) { -+ bool pullup; -+ -+ pullup = param == MTK_PIN_CONFIG_PU_ADV; -+ err = hw->soc->adv_pull_set(hw, desc, pullup, -+ arg); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ default: -+ err = -ENOTSUPP; -+ } -+ } -+err: -+ return err; -+} -+ -+static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev, -+ unsigned int group, unsigned long *config) -+{ -+ const unsigned int *pins; -+ unsigned int i, npins, old = 0; -+ int ret; -+ -+ ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); -+ if (ret) -+ return ret; -+ -+ for (i = 0; i < npins; i++) { -+ if (mtk_pinconf_get(pctldev, pins[i], config)) -+ return -ENOTSUPP; -+ -+ /* configs do not match between two pins */ -+ if (i && old != *config) -+ return -ENOTSUPP; -+ -+ old = *config; -+ } -+ -+ return 0; -+} -+ -+static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev, -+ unsigned int group, unsigned long *configs, -+ unsigned int num_configs) -+{ -+ const unsigned int *pins; -+ unsigned int i, npins; -+ int ret; -+ -+ ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); -+ if (ret) -+ return ret; -+ -+ for (i = 0; i < npins; i++) { -+ ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static const struct pinctrl_ops mtk_pctlops = { -+ .get_groups_count = pinctrl_generic_get_group_count, -+ .get_group_name = pinctrl_generic_get_group_name, -+ .get_group_pins = pinctrl_generic_get_group_pins, -+ .dt_node_to_map = pinconf_generic_dt_node_to_map_all, -+ .dt_free_map = pinconf_generic_dt_free_map, -+}; -+ -+static const struct pinmux_ops mtk_pmxops = { -+ .get_functions_count = pinmux_generic_get_function_count, -+ .get_function_name = pinmux_generic_get_function_name, -+ .get_function_groups = pinmux_generic_get_function_groups, -+ .set_mux = mtk_pinmux_set_mux, -+ .gpio_request_enable = mtk_pinmux_gpio_request_enable, -+ .gpio_set_direction = mtk_pinmux_gpio_set_direction, -+ .strict = true, -+}; -+ -+static const struct pinconf_ops mtk_confops = { -+ .is_generic = true, -+ .pin_config_get = mtk_pinconf_get, -+ .pin_config_set = mtk_pinconf_set, -+ .pin_config_group_get = mtk_pinconf_group_get, -+ .pin_config_group_set = mtk_pinconf_group_set, -+ .pin_config_config_dbg_show = pinconf_generic_dump_config, -+}; -+ -+static struct pinctrl_desc mtk_desc = { -+ .name = PINCTRL_PINCTRL_DEV, -+ .pctlops = &mtk_pctlops, -+ .pmxops = &mtk_pmxops, -+ .confops = &mtk_confops, -+ .owner = THIS_MODULE, -+}; -+ -+static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ int value, err; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); -+ if (err) -+ return err; -+ -+ return !!value; -+} -+ -+static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; -+ -+ mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); -+} -+ -+static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) -+{ -+ return pinctrl_gpio_direction_input(chip->base + gpio); -+} -+ -+static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, -+ int value) -+{ -+ mtk_gpio_set(chip, gpio, value); -+ -+ return pinctrl_gpio_direction_output(chip->base + gpio); -+} -+ -+static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ -+ if (!hw->eint) -+ return -ENOTSUPP; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; -+ -+ if (desc->eint.eint_n == (u16)EINT_NA) -+ return -ENOTSUPP; -+ -+ return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); -+} -+ -+static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, -+ unsigned long config) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ u32 debounce; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; -+ -+ if (!hw->eint || -+ pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || -+ desc->eint.eint_n == (u16)EINT_NA) -+ return -ENOTSUPP; -+ -+ debounce = pinconf_to_config_argument(config); -+ -+ return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); -+} -+ -+static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) -+{ -+ struct gpio_chip *chip = &hw->chip; -+ int ret; -+ -+ chip->label = PINCTRL_PINCTRL_DEV; -+ chip->parent = hw->dev; -+ chip->request = gpiochip_generic_request; -+ chip->free = gpiochip_generic_free; -+ chip->direction_input = mtk_gpio_direction_input; -+ chip->direction_output = mtk_gpio_direction_output; -+ chip->get = mtk_gpio_get; -+ chip->set = mtk_gpio_set; -+ chip->to_irq = mtk_gpio_to_irq, -+ chip->set_config = mtk_gpio_set_config, -+ chip->base = -1; -+ chip->ngpio = hw->soc->npins; -+ chip->of_node = np; -+ chip->of_gpio_n_cells = 2; -+ -+ ret = gpiochip_add_data(chip, hw); -+ if (ret < 0) -+ return ret; -+ -+ /* Just for backward compatible for these old pinctrl nodes without -+ * "gpio-ranges" property. Otherwise, called directly from a -+ * DeviceTree-supported pinctrl driver is DEPRECATED. -+ * Please see Section 2.1 of -+ * Documentation/devicetree/bindings/gpio/gpio.txt on how to -+ * bind pinctrl and gpio drivers via the "gpio-ranges" property. -+ */ -+ if (!of_find_property(np, "gpio-ranges", NULL)) { -+ ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, -+ chip->ngpio); -+ if (ret < 0) { -+ gpiochip_remove(chip); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+static int mtk_build_groups(struct mtk_pinctrl *hw) -+{ -+ int err, i; -+ -+ for (i = 0; i < hw->soc->ngrps; i++) { -+ const struct group_desc *group = hw->soc->grps + i; -+ -+ err = pinctrl_generic_add_group(hw->pctrl, group->name, -+ group->pins, group->num_pins, -+ group->data); -+ if (err < 0) { -+ dev_err(hw->dev, "Failed to register group %s\n", -+ group->name); -+ return err; -+ } -+ } -+ -+ return 0; -+} -+ -+static int mtk_build_functions(struct mtk_pinctrl *hw) -+{ -+ int i, err; -+ -+ for (i = 0; i < hw->soc->nfuncs ; i++) { -+ const struct function_desc *func = hw->soc->funcs + i; -+ -+ err = pinmux_generic_add_function(hw->pctrl, func->name, -+ func->group_names, -+ func->num_group_names, -+ func->data); -+ if (err < 0) { -+ dev_err(hw->dev, "Failed to register function %s\n", -+ func->name); -+ return err; -+ } -+ } -+ -+ return 0; -+} -+ -+int mtk_moore_pinctrl_probe(struct platform_device *pdev, -+ const struct mtk_pin_soc *soc) -+{ -+ struct pinctrl_pin_desc *pins; -+ struct resource *res; -+ struct mtk_pinctrl *hw; -+ int err, i; -+ -+ hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); -+ if (!hw) -+ return -ENOMEM; -+ -+ hw->soc = soc; -+ hw->dev = &pdev->dev; -+ -+ if (!hw->soc->nbase_names) { -+ dev_err(&pdev->dev, -+ "SoC should be assigned at least one register base\n"); -+ return -EINVAL; -+ } -+ -+ hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, -+ sizeof(*hw->base), GFP_KERNEL); -+ if (!hw->base) -+ return -ENOMEM; -+ -+ for (i = 0; i < hw->soc->nbase_names; i++) { -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -+ hw->soc->base_names[i]); -+ if (!res) { -+ dev_err(&pdev->dev, "missing IO resource\n"); -+ return -ENXIO; -+ } -+ -+ hw->base[i] = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(hw->base[i])) -+ return PTR_ERR(hw->base[i]); -+ } -+ -+ hw->nbase = hw->soc->nbase_names; -+ -+ /* Copy from internal struct mtk_pin_desc to register to the core */ -+ pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), -+ GFP_KERNEL); -+ if (!pins) -+ return -ENOMEM; -+ -+ for (i = 0; i < hw->soc->npins; i++) { -+ pins[i].number = hw->soc->pins[i].number; -+ pins[i].name = hw->soc->pins[i].name; -+ } -+ -+ /* Setup pins descriptions per SoC types */ -+ mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; -+ mtk_desc.npins = hw->soc->npins; -+ mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); -+ mtk_desc.custom_params = mtk_custom_bindings; -+#ifdef CONFIG_DEBUG_FS -+ mtk_desc.custom_conf_items = mtk_conf_items; -+#endif -+ -+ err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, -+ &hw->pctrl); -+ if (err) -+ return err; -+ -+ /* Setup groups descriptions per SoC types */ -+ err = mtk_build_groups(hw); -+ if (err) { -+ dev_err(&pdev->dev, "Failed to build groups\n"); -+ return err; -+ } -+ -+ /* Setup functions descriptions per SoC types */ -+ err = mtk_build_functions(hw); -+ if (err) { -+ dev_err(&pdev->dev, "Failed to build functions\n"); -+ return err; -+ } -+ -+ /* For able to make pinctrl_claim_hogs, we must not enable pinctrl -+ * until all groups and functions are being added one. -+ */ -+ err = pinctrl_enable(hw->pctrl); -+ if (err) -+ return err; -+ -+ err = mtk_build_eint(hw, pdev); -+ if (err) -+ dev_warn(&pdev->dev, -+ "Failed to add EINT, but pinctrl still can work\n"); -+ -+ /* Build gpiochip should be after pinctrl_enable is done */ -+ err = mtk_build_gpiochip(hw, pdev->dev.of_node); -+ if (err) { -+ dev_err(&pdev->dev, "Failed to add gpio_chip\n"); -+ return err; -+ } -+ -+ platform_set_drvdata(pdev, hw); -+ -+ return 0; -+} ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-moore.h -@@ -0,0 +1,51 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2017-2018 MediaTek Inc. -+ * -+ * Author: Sean Wang -+ * -+ */ -+#ifndef __PINCTRL_MOORE_H -+#define __PINCTRL_MOORE_H -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../core.h" -+#include "../pinconf.h" -+#include "../pinmux.h" -+#include "mtk-eint.h" -+#include "pinctrl-mtk-common-v2.h" -+ -+#define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), } -+ -+#define MTK_PIN(_number, _name, _eint_m, _eint_n, _drv_n) { \ -+ .number = _number, \ -+ .name = _name, \ -+ .eint = { \ -+ .eint_m = _eint_m, \ -+ .eint_n = _eint_n, \ -+ }, \ -+ .drv_n = _drv_n, \ -+ .funcs = NULL, \ -+ } -+ -+#define PINCTRL_PIN_GROUP(name, id) \ -+ { \ -+ name, \ -+ id##_pins, \ -+ ARRAY_SIZE(id##_pins), \ -+ id##_funcs, \ -+ } -+ -+int mtk_moore_pinctrl_probe(struct platform_device *pdev, -+ const struct mtk_pin_soc *soc); -+ -+#endif /* __PINCTRL_MOORE_H */ ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c -@@ -0,0 +1,1108 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: ZH Chen -+ * -+ */ -+ -+#include "pinctrl-mtk-mt6765.h" -+#include "pinctrl-paris.h" -+ -+/* MT6765 have multiple bases to program pin configuration listed as the below: -+ * iocfg[0]:0x10005000, iocfg[1]:0x10002C00, iocfg[2]:0x10002800, -+ * iocfg[3]:0x10002A00, iocfg[4]:0x10002000, iocfg[5]:0x10002200, -+ * iocfg[6]:0x10002500, iocfg[7]:0x10002600. -+ * _i_base could be used to indicate what base the pin should be mapped into. -+ */ -+ -+#define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 32, 0) -+ -+#define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 32, 1) -+ -+static const struct mtk_pin_field_calc mt6765_pin_mode_range[] = { -+ PIN_FIELD(0, 202, 0x300, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_dir_range[] = { -+ PIN_FIELD(0, 202, 0x0, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_di_range[] = { -+ PIN_FIELD(0, 202, 0x200, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_do_range[] = { -+ PIN_FIELD(0, 202, 0x100, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_smt_range[] = { -+ PINS_FIELD_BASE(0, 3, 2, 0x00b0, 0x10, 4, 1), -+ PINS_FIELD_BASE(4, 7, 2, 0x00b0, 0x10, 5, 1), -+ PIN_FIELD_BASE(8, 8, 3, 0x0080, 0x10, 3, 1), -+ PINS_FIELD_BASE(9, 11, 2, 0x00b0, 0x10, 6, 1), -+ PIN_FIELD_BASE(12, 12, 5, 0x0060, 0x10, 9, 1), -+ PINS_FIELD_BASE(13, 16, 6, 0x00b0, 0x10, 10, 1), -+ PINS_FIELD_BASE(17, 20, 6, 0x00b0, 0x10, 8, 1), -+ PINS_FIELD_BASE(21, 24, 6, 0x00b0, 0x10, 9, 1), -+ PINS_FIELD_BASE(25, 28, 6, 0x00b0, 0x10, 7, 1), -+ PIN_FIELD_BASE(29, 29, 6, 0x00b0, 0x10, 0, 1), -+ PIN_FIELD_BASE(30, 30, 6, 0x00b0, 0x10, 1, 1), -+ PINS_FIELD_BASE(31, 34, 6, 0x00b0, 0x10, 2, 1), -+ PINS_FIELD_BASE(35, 36, 6, 0x00b0, 0x10, 5, 1), -+ PIN_FIELD_BASE(37, 37, 6, 0x00b0, 0x10, 6, 1), -+ PIN_FIELD_BASE(38, 38, 6, 0x00b0, 0x10, 4, 1), -+ PINS_FIELD_BASE(39, 40, 6, 0x00b0, 0x10, 3, 1), -+ PINS_FIELD_BASE(41, 42, 7, 0x00c0, 0x10, 6, 1), -+ PIN_FIELD_BASE(43, 43, 7, 0x00c0, 0x10, 3, 1), -+ PIN_FIELD_BASE(44, 44, 7, 0x00c0, 0x10, 4, 1), -+ PIN_FIELD_BASE(45, 45, 7, 0x00c0, 0x10, 8, 1), -+ PINS_FIELD_BASE(46, 47, 7, 0x00c0, 0x10, 7, 1), -+ PIN_FIELD_BASE(48, 48, 7, 0x00c0, 0x10, 15, 1), -+ PIN_FIELD_BASE(49, 49, 7, 0x00c0, 0x10, 17, 1), -+ PIN_FIELD_BASE(50, 50, 7, 0x00c0, 0x10, 14, 1), -+ PIN_FIELD_BASE(51, 51, 7, 0x00c0, 0x10, 16, 1), -+ PINS_FIELD_BASE(52, 57, 7, 0x00c0, 0x10, 0, 1), -+ PINS_FIELD_BASE(58, 60, 7, 0x00c0, 0x10, 12, 1), -+ PINS_FIELD_BASE(61, 62, 3, 0x0080, 0x10, 5, 1), -+ PINS_FIELD_BASE(63, 64, 3, 0x0080, 0x10, 4, 1), -+ PINS_FIELD_BASE(65, 66, 3, 0x0080, 0x10, 7, 1), -+ PINS_FIELD_BASE(67, 68, 3, 0x0080, 0x10, 6, 1), -+ PINS_FIELD_BASE(69, 73, 3, 0x0080, 0x10, 1, 1), -+ PINS_FIELD_BASE(74, 78, 3, 0x0080, 0x10, 2, 1), -+ PINS_FIELD_BASE(79, 80, 3, 0x0080, 0x10, 0, 1), -+ PIN_FIELD_BASE(81, 81, 3, 0x0080, 0x10, 12, 1), -+ PIN_FIELD_BASE(82, 82, 3, 0x0080, 0x10, 11, 1), -+ PIN_FIELD_BASE(83, 83, 3, 0x0080, 0x10, 9, 1), -+ PIN_FIELD_BASE(84, 84, 3, 0x0080, 0x10, 10, 1), -+ PIN_FIELD_BASE(85, 85, 7, 0x00c0, 0x10, 12, 1), -+ PIN_FIELD_BASE(86, 86, 7, 0x00c0, 0x10, 13, 1), -+ PIN_FIELD_BASE(87, 87, 7, 0x00c0, 0x10, 2, 1), -+ PIN_FIELD_BASE(88, 88, 7, 0x00c0, 0x10, 1, 1), -+ PIN_FIELD_BASE(89, 89, 2, 0x00b0, 0x10, 13, 1), -+ PIN_FIELD_BASE(90, 90, 3, 0x0080, 0x10, 8, 1), -+ PINS_FIELD_BASE(91, 92, 2, 0x00b0, 0x10, 8, 1), -+ PINS_FIELD_BASE(93, 94, 2, 0x00b0, 0x10, 7, 1), -+ PINS_FIELD_BASE(95, 96, 2, 0x00b0, 0x10, 14, 1), -+ PINS_FIELD_BASE(97, 98, 2, 0x00b0, 0x10, 2, 1), -+ PIN_FIELD_BASE(99, 99, 2, 0x00b0, 0x10, 0, 1), -+ PIN_FIELD_BASE(100, 100, 2, 0x00b0, 0x10, 1, 1), -+ PINS_FIELD_BASE(101, 102, 2, 0x00b0, 0x10, 3, 1), -+ PIN_FIELD_BASE(103, 103, 2, 0x00b0, 0x10, 9, 1), -+ PIN_FIELD_BASE(104, 104, 2, 0x00b0, 0x10, 11, 1), -+ PIN_FIELD_BASE(105, 105, 2, 0x00b0, 0x10, 10, 1), -+ PIN_FIELD_BASE(106, 106, 2, 0x00b0, 0x10, 12, 1), -+ PIN_FIELD_BASE(107, 107, 1, 0x0080, 0x10, 4, 1), -+ PIN_FIELD_BASE(108, 108, 1, 0x0080, 0x10, 3, 1), -+ PIN_FIELD_BASE(109, 109, 1, 0x0080, 0x10, 5, 1), -+ PIN_FIELD_BASE(110, 110, 1, 0x0080, 0x10, 0, 1), -+ PIN_FIELD_BASE(111, 111, 1, 0x0080, 0x10, 1, 1), -+ PIN_FIELD_BASE(112, 112, 1, 0x0080, 0x10, 2, 1), -+ PIN_FIELD_BASE(113, 113, 1, 0x0080, 0x10, 9, 1), -+ PIN_FIELD_BASE(114, 114, 1, 0x0080, 0x10, 10, 1), -+ PIN_FIELD_BASE(115, 115, 1, 0x0080, 0x10, 6, 1), -+ PIN_FIELD_BASE(116, 116, 1, 0x0080, 0x10, 7, 1), -+ PIN_FIELD_BASE(117, 117, 1, 0x0080, 0x10, 12, 1), -+ PIN_FIELD_BASE(118, 118, 1, 0x0080, 0x10, 13, 1), -+ PIN_FIELD_BASE(119, 119, 1, 0x0080, 0x10, 14, 1), -+ PIN_FIELD_BASE(120, 120, 1, 0x0080, 0x10, 11, 1), -+ PIN_FIELD_BASE(121, 121, 1, 0x0080, 0x10, 8, 1), -+ PIN_FIELD_BASE(122, 122, 4, 0x0080, 0x10, 2, 1), -+ PIN_FIELD_BASE(123, 123, 4, 0x0080, 0x10, 3, 1), -+ PIN_FIELD_BASE(124, 124, 4, 0x0080, 0x10, 1, 1), -+ PIN_FIELD_BASE(125, 125, 4, 0x0080, 0x10, 5, 1), -+ PIN_FIELD_BASE(126, 126, 4, 0x0080, 0x10, 7, 1), -+ PIN_FIELD_BASE(127, 127, 4, 0x0080, 0x10, 9, 1), -+ PIN_FIELD_BASE(128, 128, 4, 0x0080, 0x10, 4, 1), -+ PIN_FIELD_BASE(129, 129, 4, 0x0080, 0x10, 8, 1), -+ PIN_FIELD_BASE(130, 130, 4, 0x0080, 0x10, 10, 1), -+ PIN_FIELD_BASE(131, 131, 4, 0x0080, 0x10, 11, 1), -+ PIN_FIELD_BASE(132, 132, 4, 0x0080, 0x10, 6, 1), -+ PIN_FIELD_BASE(133, 133, 4, 0x0080, 0x10, 12, 1), -+ PIN_FIELD_BASE(134, 134, 5, 0x0060, 0x10, 11, 1), -+ PIN_FIELD_BASE(135, 135, 5, 0x0060, 0x10, 13, 1), -+ PIN_FIELD_BASE(136, 136, 5, 0x0060, 0x10, 1, 1), -+ PIN_FIELD_BASE(137, 137, 5, 0x0060, 0x10, 7, 1), -+ PIN_FIELD_BASE(138, 138, 5, 0x0060, 0x10, 4, 1), -+ PIN_FIELD_BASE(139, 139, 5, 0x0060, 0x10, 5, 1), -+ PIN_FIELD_BASE(140, 140, 5, 0x0060, 0x10, 0, 1), -+ PIN_FIELD_BASE(141, 141, 5, 0x0060, 0x10, 6, 1), -+ PIN_FIELD_BASE(142, 142, 5, 0x0060, 0x10, 2, 1), -+ PIN_FIELD_BASE(143, 143, 5, 0x0060, 0x10, 3, 1), -+ PINS_FIELD_BASE(144, 147, 5, 0x0060, 0x10, 10, 1), -+ PINS_FIELD_BASE(148, 149, 5, 0x0060, 0x10, 12, 1), -+ PINS_FIELD_BASE(150, 151, 7, 0x00c0, 0x10, 9, 1), -+ PINS_FIELD_BASE(152, 153, 7, 0x00c0, 0x10, 10, 1), -+ PIN_FIELD_BASE(154, 154, 7, 0x00c0, 0x10, 11, 1), -+ PINS_FIELD_BASE(155, 158, 3, 0x0080, 0x10, 13, 1), -+ PIN_FIELD_BASE(159, 159, 7, 0x00c0, 0x10, 11, 1), -+ PIN_FIELD_BASE(160, 160, 5, 0x0060, 0x10, 8, 1), -+ PIN_FIELD_BASE(161, 161, 1, 0x0080, 0x10, 15, 1), -+ PIN_FIELD_BASE(162, 162, 1, 0x0080, 0x10, 16, 1), -+ PINS_FIELD_BASE(163, 170, 4, 0x0080, 0x10, 0, 1), -+ PINS_FIELD_BASE(171, 179, 7, 0x00c0, 0x10, 5, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_pd_range[] = { -+ PIN_FIELD_BASE(0, 0, 2, 0x0040, 0x10, 6, 1), -+ PIN_FIELD_BASE(1, 1, 2, 0x0040, 0x10, 7, 1), -+ PIN_FIELD_BASE(2, 2, 2, 0x0040, 0x10, 10, 1), -+ PIN_FIELD_BASE(3, 3, 2, 0x0040, 0x10, 11, 1), -+ PIN_FIELD_BASE(4, 4, 2, 0x0040, 0x10, 12, 1), -+ PIN_FIELD_BASE(5, 5, 2, 0x0040, 0x10, 13, 1), -+ PIN_FIELD_BASE(6, 6, 2, 0x0040, 0x10, 14, 1), -+ PIN_FIELD_BASE(7, 7, 2, 0x0040, 0x10, 15, 1), -+ PIN_FIELD_BASE(8, 8, 3, 0x0040, 0x10, 12, 1), -+ PIN_FIELD_BASE(9, 9, 2, 0x0040, 0x10, 16, 1), -+ PIN_FIELD_BASE(10, 10, 2, 0x0040, 0x10, 8, 1), -+ PIN_FIELD_BASE(11, 11, 2, 0x0040, 0x10, 9, 1), -+ PIN_FIELD_BASE(12, 12, 5, 0x0030, 0x10, 9, 1), -+ PIN_FIELD_BASE(13, 13, 6, 0x0040, 0x10, 14, 1), -+ PIN_FIELD_BASE(14, 14, 6, 0x0040, 0x10, 13, 1), -+ PIN_FIELD_BASE(15, 15, 6, 0x0040, 0x10, 15, 1), -+ PIN_FIELD_BASE(16, 16, 6, 0x0040, 0x10, 12, 1), -+ PIN_FIELD_BASE(17, 17, 6, 0x0040, 0x10, 7, 1), -+ PIN_FIELD_BASE(18, 18, 6, 0x0040, 0x10, 4, 1), -+ PIN_FIELD_BASE(19, 19, 6, 0x0040, 0x10, 6, 1), -+ PIN_FIELD_BASE(20, 20, 6, 0x0040, 0x10, 5, 1), -+ PIN_FIELD_BASE(21, 21, 6, 0x0040, 0x10, 10, 1), -+ PIN_FIELD_BASE(22, 22, 6, 0x0040, 0x10, 9, 1), -+ PIN_FIELD_BASE(23, 23, 6, 0x0040, 0x10, 11, 1), -+ PIN_FIELD_BASE(24, 24, 6, 0x0040, 0x10, 8, 1), -+ PIN_FIELD_BASE(25, 25, 6, 0x0040, 0x10, 2, 1), -+ PIN_FIELD_BASE(26, 26, 6, 0x0040, 0x10, 1, 1), -+ PIN_FIELD_BASE(27, 27, 6, 0x0040, 0x10, 3, 1), -+ PINS_FIELD_BASE(28, 40, 6, 0x0040, 0x10, 0, 1), -+ PIN_FIELD_BASE(41, 41, 7, 0x0060, 0x10, 19, 1), -+ PIN_FIELD_BASE(42, 42, 7, 0x0060, 0x10, 9, 1), -+ PIN_FIELD_BASE(43, 43, 7, 0x0060, 0x10, 8, 1), -+ PIN_FIELD_BASE(44, 44, 7, 0x0060, 0x10, 10, 1), -+ PIN_FIELD_BASE(45, 45, 7, 0x0060, 0x10, 22, 1), -+ PIN_FIELD_BASE(46, 46, 7, 0x0060, 0x10, 21, 1), -+ PIN_FIELD_BASE(47, 47, 7, 0x0060, 0x10, 20, 1), -+ PIN_FIELD_BASE(48, 48, 7, 0x0070, 0x10, 3, 1), -+ PIN_FIELD_BASE(49, 49, 7, 0x0070, 0x10, 5, 1), -+ PIN_FIELD_BASE(50, 50, 7, 0x0070, 0x10, 2, 1), -+ PIN_FIELD_BASE(51, 51, 7, 0x0070, 0x10, 4, 1), -+ PIN_FIELD_BASE(52, 52, 7, 0x0060, 0x10, 1, 1), -+ PIN_FIELD_BASE(53, 53, 7, 0x0060, 0x10, 0, 1), -+ PIN_FIELD_BASE(54, 54, 7, 0x0060, 0x10, 5, 1), -+ PIN_FIELD_BASE(55, 55, 7, 0x0060, 0x10, 3, 1), -+ PIN_FIELD_BASE(56, 56, 7, 0x0060, 0x10, 4, 1), -+ PIN_FIELD_BASE(57, 57, 7, 0x0060, 0x10, 2, 1), -+ PIN_FIELD_BASE(58, 58, 7, 0x0070, 0x10, 0, 1), -+ PIN_FIELD_BASE(59, 59, 7, 0x0060, 0x10, 31, 1), -+ PIN_FIELD_BASE(60, 60, 7, 0x0060, 0x10, 30, 1), -+ PIN_FIELD_BASE(61, 61, 3, 0x0040, 0x10, 18, 1), -+ PIN_FIELD_BASE(62, 62, 3, 0x0040, 0x10, 14, 1), -+ PIN_FIELD_BASE(63, 63, 3, 0x0040, 0x10, 17, 1), -+ PIN_FIELD_BASE(64, 64, 3, 0x0040, 0x10, 13, 1), -+ PIN_FIELD_BASE(65, 65, 3, 0x0040, 0x10, 20, 1), -+ PIN_FIELD_BASE(66, 66, 3, 0x0040, 0x10, 16, 1), -+ PIN_FIELD_BASE(67, 67, 3, 0x0040, 0x10, 19, 1), -+ PIN_FIELD_BASE(68, 68, 3, 0x0040, 0x10, 15, 1), -+ PIN_FIELD_BASE(69, 69, 3, 0x0040, 0x10, 8, 1), -+ PIN_FIELD_BASE(70, 70, 3, 0x0040, 0x10, 7, 1), -+ PIN_FIELD_BASE(71, 71, 3, 0x0040, 0x10, 6, 1), -+ PIN_FIELD_BASE(72, 72, 3, 0x0040, 0x10, 5, 1), -+ PIN_FIELD_BASE(73, 73, 3, 0x0040, 0x10, 4, 1), -+ PIN_FIELD_BASE(74, 74, 3, 0x0040, 0x10, 3, 1), -+ PIN_FIELD_BASE(75, 75, 3, 0x0040, 0x10, 2, 1), -+ PIN_FIELD_BASE(76, 76, 3, 0x0040, 0x10, 1, 1), -+ PIN_FIELD_BASE(77, 77, 3, 0x0040, 0x10, 0, 1), -+ PIN_FIELD_BASE(78, 78, 3, 0x0040, 0x10, 9, 1), -+ PIN_FIELD_BASE(79, 79, 3, 0x0040, 0x10, 11, 1), -+ PIN_FIELD_BASE(80, 80, 3, 0x0040, 0x10, 10, 1), -+ PIN_FIELD_BASE(81, 81, 3, 0x0040, 0x10, 25, 1), -+ PIN_FIELD_BASE(82, 82, 3, 0x0040, 0x10, 24, 1), -+ PIN_FIELD_BASE(83, 83, 3, 0x0040, 0x10, 22, 1), -+ PIN_FIELD_BASE(84, 84, 3, 0x0040, 0x10, 23, 1), -+ PIN_FIELD_BASE(85, 85, 7, 0x0070, 0x10, 1, 1), -+ PIN_FIELD_BASE(86, 86, 7, 0x0060, 0x10, 29, 1), -+ PIN_FIELD_BASE(87, 87, 7, 0x0060, 0x10, 7, 1), -+ PIN_FIELD_BASE(88, 88, 7, 0x0060, 0x10, 6, 1), -+ PIN_FIELD_BASE(89, 89, 2, 0x0040, 0x10, 21, 1), -+ PINS_FIELD_BASE(90, 94, 3, 0x0040, 0x10, 21, 1), -+ PIN_FIELD_BASE(95, 95, 2, 0x0040, 0x10, 22, 1), -+ PIN_FIELD_BASE(96, 96, 2, 0x0040, 0x10, 23, 1), -+ PIN_FIELD_BASE(97, 97, 2, 0x0040, 0x10, 2, 1), -+ PIN_FIELD_BASE(98, 98, 2, 0x0040, 0x10, 3, 1), -+ PIN_FIELD_BASE(99, 99, 2, 0x0040, 0x10, 0, 1), -+ PIN_FIELD_BASE(100, 100, 2, 0x0040, 0x10, 1, 1), -+ PIN_FIELD_BASE(101, 101, 2, 0x0040, 0x10, 4, 1), -+ PIN_FIELD_BASE(102, 102, 2, 0x0040, 0x10, 5, 1), -+ PIN_FIELD_BASE(103, 103, 2, 0x0040, 0x10, 17, 1), -+ PIN_FIELD_BASE(104, 104, 2, 0x0040, 0x10, 19, 1), -+ PIN_FIELD_BASE(105, 105, 2, 0x0040, 0x10, 18, 1), -+ PIN_FIELD_BASE(106, 106, 2, 0x0040, 0x10, 20, 1), -+ PIN_FIELD_BASE(107, 107, 1, 0x0040, 0x10, 4, 1), -+ PIN_FIELD_BASE(108, 108, 1, 0x0040, 0x10, 3, 1), -+ PIN_FIELD_BASE(109, 109, 1, 0x0040, 0x10, 5, 1), -+ PIN_FIELD_BASE(110, 110, 1, 0x0040, 0x10, 0, 1), -+ PIN_FIELD_BASE(111, 111, 1, 0x0040, 0x10, 1, 1), -+ PIN_FIELD_BASE(112, 112, 1, 0x0040, 0x10, 2, 1), -+ PIN_FIELD_BASE(113, 113, 1, 0x0040, 0x10, 9, 1), -+ PIN_FIELD_BASE(114, 114, 1, 0x0040, 0x10, 10, 1), -+ PIN_FIELD_BASE(115, 115, 1, 0x0040, 0x10, 6, 1), -+ PIN_FIELD_BASE(116, 116, 1, 0x0040, 0x10, 7, 1), -+ PIN_FIELD_BASE(117, 117, 1, 0x0040, 0x10, 12, 1), -+ PIN_FIELD_BASE(118, 118, 1, 0x0040, 0x10, 13, 1), -+ PIN_FIELD_BASE(119, 119, 1, 0x0040, 0x10, 14, 1), -+ PIN_FIELD_BASE(120, 120, 1, 0x0040, 0x10, 11, 1), -+ PINS_FIELD_BASE(121, 133, 1, 0x0040, 0x10, 8, 1), -+ PIN_FIELD_BASE(134, 134, 5, 0x0030, 0x10, 14, 1), -+ PIN_FIELD_BASE(135, 135, 5, 0x0030, 0x10, 19, 1), -+ PIN_FIELD_BASE(136, 136, 5, 0x0030, 0x10, 1, 1), -+ PIN_FIELD_BASE(137, 137, 5, 0x0030, 0x10, 7, 1), -+ PIN_FIELD_BASE(138, 138, 5, 0x0030, 0x10, 4, 1), -+ PIN_FIELD_BASE(139, 139, 5, 0x0030, 0x10, 5, 1), -+ PIN_FIELD_BASE(140, 140, 5, 0x0030, 0x10, 0, 1), -+ PIN_FIELD_BASE(141, 141, 5, 0x0030, 0x10, 6, 1), -+ PIN_FIELD_BASE(142, 142, 5, 0x0030, 0x10, 2, 1), -+ PIN_FIELD_BASE(143, 143, 5, 0x0030, 0x10, 3, 1), -+ PIN_FIELD_BASE(144, 144, 5, 0x0030, 0x10, 12, 1), -+ PIN_FIELD_BASE(145, 145, 5, 0x0030, 0x10, 11, 1), -+ PIN_FIELD_BASE(146, 146, 5, 0x0030, 0x10, 13, 1), -+ PIN_FIELD_BASE(147, 147, 5, 0x0030, 0x10, 10, 1), -+ PIN_FIELD_BASE(148, 148, 5, 0x0030, 0x10, 15, 1), -+ PIN_FIELD_BASE(149, 149, 5, 0x0030, 0x10, 16, 1), -+ PIN_FIELD_BASE(150, 150, 7, 0x0060, 0x10, 23, 1), -+ PIN_FIELD_BASE(151, 151, 7, 0x0060, 0x10, 24, 1), -+ PIN_FIELD_BASE(152, 152, 7, 0x0060, 0x10, 25, 1), -+ PIN_FIELD_BASE(153, 153, 7, 0x0060, 0x10, 26, 1), -+ PIN_FIELD_BASE(154, 154, 7, 0x0060, 0x10, 28, 1), -+ PIN_FIELD_BASE(155, 155, 3, 0x0040, 0x10, 28, 1), -+ PIN_FIELD_BASE(156, 156, 3, 0x0040, 0x10, 27, 1), -+ PIN_FIELD_BASE(157, 157, 3, 0x0040, 0x10, 29, 1), -+ PIN_FIELD_BASE(158, 158, 3, 0x0040, 0x10, 26, 1), -+ PIN_FIELD_BASE(159, 159, 7, 0x0060, 0x10, 27, 1), -+ PIN_FIELD_BASE(160, 160, 5, 0x0030, 0x10, 8, 1), -+ PIN_FIELD_BASE(161, 161, 1, 0x0040, 0x10, 15, 1), -+ PIN_FIELD_BASE(162, 162, 1, 0x0040, 0x10, 16, 1), -+ PIN_FIELD_BASE(163, 163, 4, 0x0020, 0x10, 0, 1), -+ PIN_FIELD_BASE(164, 164, 4, 0x0020, 0x10, 1, 1), -+ PIN_FIELD_BASE(165, 165, 4, 0x0020, 0x10, 2, 1), -+ PIN_FIELD_BASE(166, 166, 4, 0x0020, 0x10, 3, 1), -+ PIN_FIELD_BASE(167, 167, 4, 0x0020, 0x10, 4, 1), -+ PIN_FIELD_BASE(168, 168, 4, 0x0020, 0x10, 5, 1), -+ PIN_FIELD_BASE(169, 169, 4, 0x0020, 0x10, 6, 1), -+ PIN_FIELD_BASE(170, 170, 4, 0x0020, 0x10, 7, 1), -+ PIN_FIELD_BASE(171, 171, 7, 0x0060, 0x10, 17, 1), -+ PIN_FIELD_BASE(172, 172, 7, 0x0060, 0x10, 18, 1), -+ PIN_FIELD_BASE(173, 173, 7, 0x0060, 0x10, 11, 1), -+ PIN_FIELD_BASE(174, 174, 7, 0x0060, 0x10, 12, 1), -+ PIN_FIELD_BASE(175, 175, 7, 0x0060, 0x10, 13, 1), -+ PIN_FIELD_BASE(176, 176, 7, 0x0060, 0x10, 14, 1), -+ PIN_FIELD_BASE(177, 177, 7, 0x0060, 0x10, 15, 1), -+ PINS_FIELD_BASE(178, 179, 7, 0x0060, 0x10, 16, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_pu_range[] = { -+ PIN_FIELD_BASE(0, 0, 2, 0x0060, 0x10, 6, 1), -+ PIN_FIELD_BASE(1, 1, 2, 0x0060, 0x10, 7, 1), -+ PIN_FIELD_BASE(2, 2, 2, 0x0060, 0x10, 10, 1), -+ PIN_FIELD_BASE(3, 3, 2, 0x0060, 0x10, 11, 1), -+ PIN_FIELD_BASE(4, 4, 2, 0x0060, 0x10, 12, 1), -+ PIN_FIELD_BASE(5, 5, 2, 0x0060, 0x10, 13, 1), -+ PIN_FIELD_BASE(6, 6, 2, 0x0060, 0x10, 14, 1), -+ PIN_FIELD_BASE(7, 7, 2, 0x0060, 0x10, 15, 1), -+ PIN_FIELD_BASE(8, 8, 3, 0x0050, 0x10, 12, 1), -+ PIN_FIELD_BASE(9, 9, 2, 0x0060, 0x10, 16, 1), -+ PIN_FIELD_BASE(10, 10, 2, 0x0060, 0x10, 8, 1), -+ PIN_FIELD_BASE(11, 11, 2, 0x0060, 0x10, 9, 1), -+ PIN_FIELD_BASE(12, 12, 5, 0x0040, 0x10, 9, 1), -+ PIN_FIELD_BASE(13, 13, 6, 0x0060, 0x10, 14, 1), -+ PIN_FIELD_BASE(14, 14, 6, 0x0060, 0x10, 13, 1), -+ PIN_FIELD_BASE(15, 15, 6, 0x0060, 0x10, 15, 1), -+ PIN_FIELD_BASE(16, 16, 6, 0x0060, 0x10, 12, 1), -+ PIN_FIELD_BASE(17, 17, 6, 0x0060, 0x10, 7, 1), -+ PIN_FIELD_BASE(18, 18, 6, 0x0060, 0x10, 4, 1), -+ PIN_FIELD_BASE(19, 19, 6, 0x0060, 0x10, 6, 1), -+ PIN_FIELD_BASE(20, 20, 6, 0x0060, 0x10, 5, 1), -+ PIN_FIELD_BASE(21, 21, 6, 0x0060, 0x10, 10, 1), -+ PIN_FIELD_BASE(22, 22, 6, 0x0060, 0x10, 9, 1), -+ PIN_FIELD_BASE(23, 23, 6, 0x0060, 0x10, 11, 1), -+ PIN_FIELD_BASE(24, 24, 6, 0x0060, 0x10, 8, 1), -+ PIN_FIELD_BASE(25, 25, 6, 0x0060, 0x10, 2, 1), -+ PIN_FIELD_BASE(26, 26, 6, 0x0060, 0x10, 1, 1), -+ PIN_FIELD_BASE(27, 27, 6, 0x0060, 0x10, 3, 1), -+ PINS_FIELD_BASE(28, 40, 6, 0x0060, 0x10, 0, 1), -+ PIN_FIELD_BASE(41, 41, 7, 0x0080, 0x10, 19, 1), -+ PIN_FIELD_BASE(42, 42, 7, 0x0080, 0x10, 9, 1), -+ PIN_FIELD_BASE(43, 43, 7, 0x0080, 0x10, 8, 1), -+ PIN_FIELD_BASE(44, 44, 7, 0x0080, 0x10, 10, 1), -+ PIN_FIELD_BASE(45, 45, 7, 0x0080, 0x10, 22, 1), -+ PIN_FIELD_BASE(46, 46, 7, 0x0080, 0x10, 21, 1), -+ PIN_FIELD_BASE(47, 47, 7, 0x0080, 0x10, 20, 1), -+ PIN_FIELD_BASE(48, 48, 7, 0x0090, 0x10, 3, 1), -+ PIN_FIELD_BASE(49, 49, 7, 0x0090, 0x10, 5, 1), -+ PIN_FIELD_BASE(50, 50, 7, 0x0090, 0x10, 2, 1), -+ PIN_FIELD_BASE(51, 51, 7, 0x0090, 0x10, 4, 1), -+ PIN_FIELD_BASE(52, 52, 7, 0x0080, 0x10, 1, 1), -+ PIN_FIELD_BASE(53, 53, 7, 0x0080, 0x10, 0, 1), -+ PIN_FIELD_BASE(54, 54, 7, 0x0080, 0x10, 5, 1), -+ PIN_FIELD_BASE(55, 55, 7, 0x0080, 0x10, 3, 1), -+ PIN_FIELD_BASE(56, 56, 7, 0x0080, 0x10, 4, 1), -+ PIN_FIELD_BASE(57, 57, 7, 0x0080, 0x10, 2, 1), -+ PIN_FIELD_BASE(58, 58, 7, 0x0090, 0x10, 0, 1), -+ PIN_FIELD_BASE(59, 59, 7, 0x0080, 0x10, 31, 1), -+ PIN_FIELD_BASE(60, 60, 7, 0x0080, 0x10, 30, 1), -+ PIN_FIELD_BASE(61, 61, 3, 0x0050, 0x10, 18, 1), -+ PIN_FIELD_BASE(62, 62, 3, 0x0050, 0x10, 14, 1), -+ PIN_FIELD_BASE(63, 63, 3, 0x0050, 0x10, 17, 1), -+ PIN_FIELD_BASE(64, 64, 3, 0x0050, 0x10, 13, 1), -+ PIN_FIELD_BASE(65, 65, 3, 0x0050, 0x10, 20, 1), -+ PIN_FIELD_BASE(66, 66, 3, 0x0050, 0x10, 16, 1), -+ PIN_FIELD_BASE(67, 67, 3, 0x0050, 0x10, 19, 1), -+ PIN_FIELD_BASE(68, 68, 3, 0x0050, 0x10, 15, 1), -+ PIN_FIELD_BASE(69, 69, 3, 0x0050, 0x10, 8, 1), -+ PIN_FIELD_BASE(70, 70, 3, 0x0050, 0x10, 7, 1), -+ PIN_FIELD_BASE(71, 71, 3, 0x0050, 0x10, 6, 1), -+ PIN_FIELD_BASE(72, 72, 3, 0x0050, 0x10, 5, 1), -+ PIN_FIELD_BASE(73, 73, 3, 0x0050, 0x10, 4, 1), -+ PIN_FIELD_BASE(74, 74, 3, 0x0050, 0x10, 3, 1), -+ PIN_FIELD_BASE(75, 75, 3, 0x0050, 0x10, 2, 1), -+ PIN_FIELD_BASE(76, 76, 3, 0x0050, 0x10, 1, 1), -+ PIN_FIELD_BASE(77, 77, 3, 0x0050, 0x10, 0, 1), -+ PIN_FIELD_BASE(78, 78, 3, 0x0050, 0x10, 9, 1), -+ PIN_FIELD_BASE(79, 79, 3, 0x0050, 0x10, 11, 1), -+ PIN_FIELD_BASE(80, 80, 3, 0x0050, 0x10, 10, 1), -+ PIN_FIELD_BASE(81, 81, 3, 0x0050, 0x10, 25, 1), -+ PIN_FIELD_BASE(82, 82, 3, 0x0050, 0x10, 24, 1), -+ PIN_FIELD_BASE(83, 83, 3, 0x0050, 0x10, 22, 1), -+ PIN_FIELD_BASE(84, 84, 3, 0x0050, 0x10, 23, 1), -+ PIN_FIELD_BASE(85, 85, 7, 0x0090, 0x10, 1, 1), -+ PIN_FIELD_BASE(86, 86, 7, 0x0080, 0x10, 29, 1), -+ PIN_FIELD_BASE(87, 87, 7, 0x0080, 0x10, 7, 1), -+ PIN_FIELD_BASE(88, 88, 7, 0x0080, 0x10, 6, 1), -+ PIN_FIELD_BASE(89, 89, 2, 0x0060, 0x10, 21, 1), -+ PINS_FIELD_BASE(90, 94, 3, 0x0050, 0x10, 21, 1), -+ PIN_FIELD_BASE(95, 95, 2, 0x0060, 0x10, 22, 1), -+ PIN_FIELD_BASE(96, 96, 2, 0x0060, 0x10, 23, 1), -+ PIN_FIELD_BASE(97, 97, 2, 0x0060, 0x10, 2, 1), -+ PIN_FIELD_BASE(98, 98, 2, 0x0060, 0x10, 3, 1), -+ PIN_FIELD_BASE(99, 99, 2, 0x0060, 0x10, 0, 1), -+ PIN_FIELD_BASE(100, 100, 2, 0x0060, 0x10, 1, 1), -+ PIN_FIELD_BASE(101, 101, 2, 0x0060, 0x10, 4, 1), -+ PIN_FIELD_BASE(102, 102, 2, 0x0060, 0x10, 5, 1), -+ PIN_FIELD_BASE(103, 103, 2, 0x0060, 0x10, 17, 1), -+ PIN_FIELD_BASE(104, 104, 2, 0x0060, 0x10, 19, 1), -+ PIN_FIELD_BASE(105, 105, 2, 0x0060, 0x10, 18, 1), -+ PIN_FIELD_BASE(106, 106, 2, 0x0060, 0x10, 20, 1), -+ PIN_FIELD_BASE(107, 107, 1, 0x0050, 0x10, 4, 1), -+ PIN_FIELD_BASE(108, 108, 1, 0x0050, 0x10, 3, 1), -+ PIN_FIELD_BASE(109, 109, 1, 0x0050, 0x10, 5, 1), -+ PIN_FIELD_BASE(110, 110, 1, 0x0050, 0x10, 0, 1), -+ PIN_FIELD_BASE(111, 111, 1, 0x0050, 0x10, 1, 1), -+ PIN_FIELD_BASE(112, 112, 1, 0x0050, 0x10, 2, 1), -+ PIN_FIELD_BASE(113, 113, 1, 0x0050, 0x10, 9, 1), -+ PIN_FIELD_BASE(114, 114, 1, 0x0050, 0x10, 10, 1), -+ PIN_FIELD_BASE(115, 115, 1, 0x0050, 0x10, 6, 1), -+ PIN_FIELD_BASE(116, 116, 1, 0x0050, 0x10, 7, 1), -+ PIN_FIELD_BASE(117, 117, 1, 0x0050, 0x10, 12, 1), -+ PIN_FIELD_BASE(118, 118, 1, 0x0050, 0x10, 13, 1), -+ PIN_FIELD_BASE(119, 119, 1, 0x0050, 0x10, 14, 1), -+ PIN_FIELD_BASE(120, 120, 1, 0x0050, 0x10, 11, 1), -+ PINS_FIELD_BASE(121, 133, 1, 0x0050, 0x10, 8, 1), -+ PIN_FIELD_BASE(134, 134, 5, 0x0040, 0x10, 14, 1), -+ PIN_FIELD_BASE(135, 135, 5, 0x0040, 0x10, 19, 1), -+ PIN_FIELD_BASE(136, 136, 5, 0x0040, 0x10, 1, 1), -+ PIN_FIELD_BASE(137, 137, 5, 0x0040, 0x10, 7, 1), -+ PIN_FIELD_BASE(138, 138, 5, 0x0040, 0x10, 4, 1), -+ PIN_FIELD_BASE(139, 139, 5, 0x0040, 0x10, 5, 1), -+ PIN_FIELD_BASE(140, 140, 5, 0x0040, 0x10, 0, 1), -+ PIN_FIELD_BASE(141, 141, 5, 0x0040, 0x10, 6, 1), -+ PIN_FIELD_BASE(142, 142, 5, 0x0040, 0x10, 2, 1), -+ PIN_FIELD_BASE(143, 143, 5, 0x0040, 0x10, 3, 1), -+ PIN_FIELD_BASE(144, 144, 5, 0x0040, 0x10, 12, 1), -+ PIN_FIELD_BASE(145, 145, 5, 0x0040, 0x10, 11, 1), -+ PIN_FIELD_BASE(146, 146, 5, 0x0040, 0x10, 13, 1), -+ PIN_FIELD_BASE(147, 147, 5, 0x0040, 0x10, 10, 1), -+ PIN_FIELD_BASE(148, 148, 5, 0x0040, 0x10, 15, 1), -+ PIN_FIELD_BASE(149, 149, 5, 0x0040, 0x10, 16, 1), -+ PIN_FIELD_BASE(150, 150, 7, 0x0080, 0x10, 23, 1), -+ PIN_FIELD_BASE(151, 151, 7, 0x0080, 0x10, 24, 1), -+ PIN_FIELD_BASE(152, 152, 7, 0x0080, 0x10, 25, 1), -+ PIN_FIELD_BASE(153, 153, 7, 0x0080, 0x10, 26, 1), -+ PIN_FIELD_BASE(154, 154, 7, 0x0080, 0x10, 28, 1), -+ PIN_FIELD_BASE(155, 155, 3, 0x0050, 0x10, 28, 1), -+ PIN_FIELD_BASE(156, 156, 3, 0x0050, 0x10, 27, 1), -+ PIN_FIELD_BASE(157, 157, 3, 0x0050, 0x10, 29, 1), -+ PIN_FIELD_BASE(158, 158, 3, 0x0050, 0x10, 26, 1), -+ PIN_FIELD_BASE(159, 159, 7, 0x0080, 0x10, 27, 1), -+ PIN_FIELD_BASE(160, 160, 5, 0x0040, 0x10, 8, 1), -+ PIN_FIELD_BASE(161, 161, 1, 0x0050, 0x10, 15, 1), -+ PIN_FIELD_BASE(162, 162, 1, 0x0050, 0x10, 16, 1), -+ PIN_FIELD_BASE(163, 163, 4, 0x0040, 0x10, 0, 1), -+ PIN_FIELD_BASE(164, 164, 4, 0x0040, 0x10, 1, 1), -+ PIN_FIELD_BASE(165, 165, 4, 0x0040, 0x10, 2, 1), -+ PIN_FIELD_BASE(166, 166, 4, 0x0040, 0x10, 3, 1), -+ PIN_FIELD_BASE(167, 167, 4, 0x0040, 0x10, 4, 1), -+ PIN_FIELD_BASE(168, 168, 4, 0x0040, 0x10, 5, 1), -+ PIN_FIELD_BASE(169, 169, 4, 0x0040, 0x10, 6, 1), -+ PIN_FIELD_BASE(170, 170, 4, 0x0040, 0x10, 7, 1), -+ PIN_FIELD_BASE(171, 171, 7, 0x0080, 0x10, 17, 1), -+ PIN_FIELD_BASE(172, 172, 7, 0x0080, 0x10, 18, 1), -+ PIN_FIELD_BASE(173, 173, 7, 0x0080, 0x10, 11, 1), -+ PIN_FIELD_BASE(174, 174, 7, 0x0080, 0x10, 12, 1), -+ PIN_FIELD_BASE(175, 175, 7, 0x0080, 0x10, 13, 1), -+ PIN_FIELD_BASE(176, 176, 7, 0x0080, 0x10, 14, 1), -+ PIN_FIELD_BASE(177, 177, 7, 0x0080, 0x10, 15, 1), -+ PINS_FIELD_BASE(178, 179, 7, 0x0080, 0x10, 16, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_tdsel_range[] = { -+ PINS_FIELD_BASE(0, 3, 2, 0x00c0, 0x10, 16, 4), -+ PINS_FIELD_BASE(4, 7, 2, 0x00c0, 0x10, 20, 4), -+ PIN_FIELD_BASE(8, 8, 3, 0x0090, 0x10, 12, 4), -+ PINS_FIELD_BASE(9, 11, 2, 0x00c0, 0x10, 24, 4), -+ PIN_FIELD_BASE(12, 12, 5, 0x0080, 0x10, 4, 4), -+ PINS_FIELD_BASE(13, 16, 6, 0x00e0, 0x10, 8, 4), -+ PINS_FIELD_BASE(17, 20, 6, 0x00e0, 0x10, 0, 4), -+ PINS_FIELD_BASE(21, 24, 6, 0x00e0, 0x10, 4, 4), -+ PINS_FIELD_BASE(25, 28, 6, 0x00d0, 0x10, 28, 4), -+ PIN_FIELD_BASE(29, 29, 6, 0x00d0, 0x10, 0, 4), -+ PIN_FIELD_BASE(30, 30, 6, 0x00d0, 0x10, 4, 4), -+ PINS_FIELD_BASE(31, 34, 6, 0x00d0, 0x10, 8, 4), -+ PINS_FIELD_BASE(35, 36, 6, 0x00d0, 0x10, 20, 4), -+ PIN_FIELD_BASE(37, 37, 6, 0x00d0, 0x10, 24, 4), -+ PIN_FIELD_BASE(38, 38, 6, 0x00d0, 0x10, 16, 4), -+ PINS_FIELD_BASE(39, 40, 6, 0x00d0, 0x10, 12, 4), -+ PINS_FIELD_BASE(41, 42, 7, 0x00d0, 0x10, 24, 4), -+ PIN_FIELD_BASE(43, 43, 7, 0x00d0, 0x10, 12, 4), -+ PIN_FIELD_BASE(44, 44, 7, 0x00d0, 0x10, 16, 4), -+ PIN_FIELD_BASE(45, 45, 7, 0x00e0, 0x10, 0, 4), -+ PINS_FIELD_BASE(46, 47, 7, 0x00d0, 0x10, 28, 4), -+ PINS_FIELD_BASE(48, 49, 7, 0x00e0, 0x10, 28, 4), -+ PINS_FIELD_BASE(50, 51, 7, 0x00e0, 0x10, 24, 4), -+ PINS_FIELD_BASE(52, 57, 7, 0x00d0, 0x10, 0, 4), -+ PINS_FIELD_BASE(58, 60, 7, 0x00e0, 0x10, 16, 4), -+ PINS_FIELD_BASE(61, 62, 3, 0x0090, 0x10, 20, 4), -+ PINS_FIELD_BASE(63, 64, 3, 0x0090, 0x10, 16, 4), -+ PINS_FIELD_BASE(65, 66, 3, 0x0090, 0x10, 28, 4), -+ PINS_FIELD_BASE(67, 68, 3, 0x0090, 0x10, 24, 4), -+ PINS_FIELD_BASE(69, 73, 3, 0x0090, 0x10, 4, 4), -+ PINS_FIELD_BASE(74, 78, 3, 0x0090, 0x10, 8, 4), -+ PINS_FIELD_BASE(79, 80, 3, 0x0090, 0x10, 0, 4), -+ PIN_FIELD_BASE(81, 81, 3, 0x00a0, 0x10, 8, 4), -+ PINS_FIELD_BASE(82, 83, 3, 0x00a0, 0x10, 4, 4), -+ PIN_FIELD_BASE(84, 84, 3, 0x00a0, 0x10, 8, 4), -+ PIN_FIELD_BASE(85, 85, 7, 0x00e0, 0x10, 16, 4), -+ PIN_FIELD_BASE(86, 86, 7, 0x00e0, 0x10, 20, 4), -+ PIN_FIELD_BASE(87, 87, 7, 0x00d0, 0x10, 8, 4), -+ PIN_FIELD_BASE(88, 88, 7, 0x00d0, 0x10, 4, 4), -+ PIN_FIELD_BASE(89, 89, 2, 0x00d0, 0x10, 12, 4), -+ PIN_FIELD_BASE(90, 90, 3, 0x00a0, 0x10, 0, 4), -+ PINS_FIELD_BASE(91, 92, 2, 0x00d0, 0x10, 0, 4), -+ PINS_FIELD_BASE(93, 94, 2, 0x00c0, 0x10, 28, 4), -+ PINS_FIELD_BASE(95, 96, 2, 0x00d0, 0x10, 16, 4), -+ PINS_FIELD_BASE(97, 98, 2, 0x00c0, 0x10, 8, 4), -+ PIN_FIELD_BASE(99, 99, 2, 0x00c0, 0x10, 0, 4), -+ PIN_FIELD_BASE(100, 100, 2, 0x00c0, 0x10, 4, 4), -+ PINS_FIELD_BASE(101, 102, 2, 0x00c0, 0x10, 12, 4), -+ PINS_FIELD_BASE(103, 104, 2, 0x00d0, 0x10, 4, 4), -+ PINS_FIELD_BASE(105, 106, 2, 0x00d0, 0x10, 8, 4), -+ PIN_FIELD_BASE(107, 107, 1, 0x0090, 0x10, 16, 4), -+ PIN_FIELD_BASE(108, 108, 1, 0x0090, 0x10, 12, 4), -+ PIN_FIELD_BASE(109, 109, 1, 0x0090, 0x10, 20, 4), -+ PIN_FIELD_BASE(110, 110, 1, 0x0090, 0x10, 0, 4), -+ PIN_FIELD_BASE(111, 111, 1, 0x0090, 0x10, 4, 4), -+ PIN_FIELD_BASE(112, 112, 1, 0x0090, 0x10, 8, 4), -+ PIN_FIELD_BASE(113, 113, 1, 0x00a0, 0x10, 4, 4), -+ PIN_FIELD_BASE(114, 114, 1, 0x00a0, 0x10, 8, 4), -+ PIN_FIELD_BASE(115, 115, 1, 0x0090, 0x10, 24, 4), -+ PIN_FIELD_BASE(116, 116, 1, 0x0090, 0x10, 28, 4), -+ PIN_FIELD_BASE(117, 117, 1, 0x00a0, 0x10, 16, 4), -+ PIN_FIELD_BASE(118, 118, 1, 0x00a0, 0x10, 20, 4), -+ PIN_FIELD_BASE(119, 119, 1, 0x00a0, 0x10, 24, 4), -+ PIN_FIELD_BASE(120, 120, 1, 0x00a0, 0x10, 12, 4), -+ PIN_FIELD_BASE(121, 121, 1, 0x00a0, 0x10, 0, 4), -+ PIN_FIELD_BASE(122, 122, 4, 0x0090, 0x10, 8, 4), -+ PIN_FIELD_BASE(123, 123, 4, 0x0090, 0x10, 12, 4), -+ PIN_FIELD_BASE(124, 124, 4, 0x0090, 0x10, 4, 4), -+ PINS_FIELD_BASE(125, 130, 4, 0x0090, 0x10, 12, 4), -+ PIN_FIELD_BASE(131, 131, 4, 0x0090, 0x10, 16, 4), -+ PIN_FIELD_BASE(132, 132, 4, 0x0090, 0x10, 12, 4), -+ PIN_FIELD_BASE(133, 133, 4, 0x0090, 0x10, 20, 4), -+ PIN_FIELD_BASE(134, 134, 5, 0x0080, 0x10, 12, 4), -+ PIN_FIELD_BASE(135, 135, 5, 0x0080, 0x10, 20, 4), -+ PIN_FIELD_BASE(136, 136, 5, 0x0070, 0x10, 4, 4), -+ PIN_FIELD_BASE(137, 137, 5, 0x0070, 0x10, 28, 4), -+ PIN_FIELD_BASE(138, 138, 5, 0x0070, 0x10, 16, 4), -+ PIN_FIELD_BASE(139, 139, 5, 0x0070, 0x10, 20, 4), -+ PIN_FIELD_BASE(140, 140, 5, 0x0070, 0x10, 0, 4), -+ PIN_FIELD_BASE(141, 141, 5, 0x0070, 0x10, 24, 4), -+ PIN_FIELD_BASE(142, 142, 5, 0x0070, 0x10, 8, 4), -+ PIN_FIELD_BASE(143, 143, 5, 0x0070, 0x10, 12, 4), -+ PINS_FIELD_BASE(144, 147, 5, 0x0080, 0x10, 8, 4), -+ PINS_FIELD_BASE(148, 149, 5, 0x0080, 0x10, 16, 4), -+ PINS_FIELD_BASE(150, 151, 7, 0x00e0, 0x10, 4, 4), -+ PINS_FIELD_BASE(152, 153, 7, 0x00e0, 0x10, 8, 4), -+ PIN_FIELD_BASE(154, 154, 7, 0x00e0, 0x10, 12, 4), -+ PINS_FIELD_BASE(155, 158, 3, 0x00a0, 0x10, 12, 4), -+ PIN_FIELD_BASE(159, 159, 7, 0x00e0, 0x10, 12, 4), -+ PIN_FIELD_BASE(160, 160, 5, 0x0080, 0x10, 0, 4), -+ PINS_FIELD_BASE(161, 162, 1, 0x00a0, 0x10, 28, 4), -+ PINS_FIELD_BASE(163, 170, 4, 0x0090, 0x10, 0, 4), -+ PINS_FIELD_BASE(171, 179, 7, 0x00d0, 0x10, 20, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_rdsel_range[] = { -+ PINS_FIELD_BASE(0, 3, 2, 0x0090, 0x10, 8, 2), -+ PINS_FIELD_BASE(4, 7, 2, 0x0090, 0x10, 10, 2), -+ PIN_FIELD_BASE(8, 8, 3, 0x0060, 0x10, 6, 2), -+ PINS_FIELD_BASE(9, 11, 2, 0x0090, 0x10, 12, 2), -+ PIN_FIELD_BASE(12, 12, 5, 0x0050, 0x10, 18, 2), -+ PINS_FIELD_BASE(13, 16, 6, 0x00a0, 0x10, 18, 2), -+ PINS_FIELD_BASE(17, 20, 6, 0x00a0, 0x10, 14, 2), -+ PINS_FIELD_BASE(21, 24, 6, 0x00a0, 0x10, 16, 2), -+ PINS_FIELD_BASE(25, 28, 6, 0x00a0, 0x10, 12, 2), -+ PIN_FIELD_BASE(29, 29, 6, 0x0090, 0x10, 0, 6), -+ PIN_FIELD_BASE(30, 30, 6, 0x0090, 0x10, 6, 6), -+ PINS_FIELD_BASE(31, 34, 6, 0x0090, 0x10, 12, 6), -+ PINS_FIELD_BASE(35, 36, 6, 0x00a0, 0x10, 0, 6), -+ PIN_FIELD_BASE(37, 37, 6, 0x00a0, 0x10, 6, 6), -+ PIN_FIELD_BASE(38, 38, 6, 0x0090, 0x10, 24, 6), -+ PINS_FIELD_BASE(39, 40, 6, 0x0090, 0x10, 18, 6), -+ PINS_FIELD_BASE(41, 42, 7, 0x00a0, 0x10, 12, 2), -+ PIN_FIELD_BASE(43, 43, 7, 0x00a0, 0x10, 6, 2), -+ PIN_FIELD_BASE(44, 44, 7, 0x00a0, 0x10, 8, 2), -+ PIN_FIELD_BASE(45, 45, 7, 0x00a0, 0x10, 16, 2), -+ PINS_FIELD_BASE(46, 47, 7, 0x00a0, 0x10, 14, 2), -+ PINS_FIELD_BASE(48, 49, 7, 0x00a0, 0x10, 30, 2), -+ PINS_FIELD_BASE(50, 51, 7, 0x00a0, 0x10, 28, 2), -+ PINS_FIELD_BASE(52, 57, 7, 0x00a0, 0x10, 0, 2), -+ PINS_FIELD_BASE(58, 60, 7, 0x00a0, 0x10, 24, 2), -+ PINS_FIELD_BASE(61, 62, 3, 0x0060, 0x10, 10, 2), -+ PINS_FIELD_BASE(63, 64, 3, 0x0060, 0x10, 8, 2), -+ PINS_FIELD_BASE(65, 66, 3, 0x0060, 0x10, 14, 2), -+ PINS_FIELD_BASE(67, 68, 3, 0x0060, 0x10, 12, 2), -+ PINS_FIELD_BASE(69, 73, 3, 0x0060, 0x10, 2, 2), -+ PINS_FIELD_BASE(74, 78, 3, 0x0060, 0x10, 4, 2), -+ PINS_FIELD_BASE(79, 80, 3, 0x0060, 0x10, 0, 2), -+ PIN_FIELD_BASE(81, 81, 3, 0x0060, 0x10, 20, 2), -+ PINS_FIELD_BASE(82, 83, 3, 0x0060, 0x10, 18, 2), -+ PIN_FIELD_BASE(84, 84, 3, 0x0060, 0x10, 20, 2), -+ PIN_FIELD_BASE(85, 85, 7, 0x00a0, 0x10, 24, 2), -+ PIN_FIELD_BASE(86, 86, 7, 0x00a0, 0x10, 26, 2), -+ PIN_FIELD_BASE(87, 87, 7, 0x00a0, 0x10, 4, 2), -+ PIN_FIELD_BASE(88, 88, 7, 0x00a0, 0x10, 2, 2), -+ PIN_FIELD_BASE(89, 89, 2, 0x0090, 0x10, 22, 2), -+ PIN_FIELD_BASE(90, 90, 3, 0x0060, 0x10, 16, 2), -+ PINS_FIELD_BASE(91, 92, 2, 0x0090, 0x10, 16, 2), -+ PINS_FIELD_BASE(93, 94, 2, 0x0090, 0x10, 14, 2), -+ PINS_FIELD_BASE(95, 96, 2, 0x0090, 0x10, 24, 2), -+ PINS_FIELD_BASE(97, 98, 2, 0x0090, 0x10, 4, 2), -+ PIN_FIELD_BASE(99, 99, 2, 0x0090, 0x10, 0, 2), -+ PIN_FIELD_BASE(100, 100, 2, 0x0090, 0x10, 2, 2), -+ PINS_FIELD_BASE(101, 102, 2, 0x0090, 0x10, 6, 2), -+ PINS_FIELD_BASE(103, 104, 2, 0x0090, 0x10, 18, 2), -+ PINS_FIELD_BASE(105, 106, 2, 0x0090, 0x10, 20, 2), -+ PIN_FIELD_BASE(107, 107, 1, 0x0060, 0x10, 8, 2), -+ PIN_FIELD_BASE(108, 108, 1, 0x0060, 0x10, 6, 2), -+ PIN_FIELD_BASE(109, 109, 1, 0x0060, 0x10, 10, 2), -+ PIN_FIELD_BASE(110, 110, 1, 0x0060, 0x10, 0, 2), -+ PIN_FIELD_BASE(111, 111, 1, 0x0060, 0x10, 2, 2), -+ PIN_FIELD_BASE(112, 112, 1, 0x0060, 0x10, 4, 2), -+ PIN_FIELD_BASE(113, 113, 1, 0x0060, 0x10, 18, 2), -+ PIN_FIELD_BASE(114, 114, 1, 0x0060, 0x10, 20, 2), -+ PIN_FIELD_BASE(115, 115, 1, 0x0060, 0x10, 12, 2), -+ PIN_FIELD_BASE(116, 116, 1, 0x0060, 0x10, 14, 2), -+ PIN_FIELD_BASE(117, 117, 1, 0x0060, 0x10, 24, 2), -+ PIN_FIELD_BASE(118, 118, 1, 0x0060, 0x10, 26, 2), -+ PIN_FIELD_BASE(119, 119, 1, 0x0060, 0x10, 28, 2), -+ PIN_FIELD_BASE(120, 120, 1, 0x0060, 0x10, 22, 2), -+ PIN_FIELD_BASE(121, 121, 1, 0x0060, 0x10, 16, 2), -+ PIN_FIELD_BASE(122, 122, 4, 0x0070, 0x10, 8, 6), -+ PIN_FIELD_BASE(123, 123, 4, 0x0070, 0x10, 14, 6), -+ PIN_FIELD_BASE(124, 124, 4, 0x0070, 0x10, 2, 6), -+ PINS_FIELD_BASE(125, 130, 4, 0x0070, 0x10, 14, 6), -+ PIN_FIELD_BASE(131, 131, 4, 0x0070, 0x10, 20, 6), -+ PIN_FIELD_BASE(132, 132, 4, 0x0070, 0x10, 14, 6), -+ PIN_FIELD_BASE(133, 133, 4, 0x0070, 0x10, 26, 6), -+ PIN_FIELD_BASE(134, 134, 5, 0x0050, 0x10, 22, 2), -+ PIN_FIELD_BASE(135, 135, 5, 0x0050, 0x10, 30, 2), -+ PIN_FIELD_BASE(136, 136, 5, 0x0050, 0x10, 2, 2), -+ PIN_FIELD_BASE(137, 137, 5, 0x0050, 0x10, 14, 2), -+ PIN_FIELD_BASE(138, 138, 5, 0x0050, 0x10, 8, 2), -+ PIN_FIELD_BASE(139, 139, 5, 0x0050, 0x10, 10, 2), -+ PIN_FIELD_BASE(140, 140, 5, 0x0050, 0x10, 0, 2), -+ PIN_FIELD_BASE(141, 141, 5, 0x0050, 0x10, 12, 2), -+ PIN_FIELD_BASE(142, 142, 5, 0x0050, 0x10, 4, 2), -+ PIN_FIELD_BASE(143, 143, 5, 0x0050, 0x10, 6, 2), -+ PINS_FIELD_BASE(144, 147, 5, 0x0050, 0x10, 20, 2), -+ PINS_FIELD_BASE(148, 149, 5, 0x0050, 0x10, 24, 2), -+ PINS_FIELD_BASE(150, 151, 7, 0x00a0, 0x10, 18, 2), -+ PINS_FIELD_BASE(152, 153, 7, 0x00a0, 0x10, 20, 2), -+ PIN_FIELD_BASE(154, 154, 7, 0x00a0, 0x10, 22, 2), -+ PINS_FIELD_BASE(155, 158, 3, 0x0060, 0x10, 22, 2), -+ PIN_FIELD_BASE(159, 159, 7, 0x00a0, 0x10, 22, 2), -+ PIN_FIELD_BASE(160, 160, 5, 0x0050, 0x10, 16, 2), -+ PINS_FIELD_BASE(161, 162, 1, 0x0060, 0x10, 30, 2), -+ PINS_FIELD_BASE(163, 170, 4, 0x0070, 0x10, 0, 2), -+ PINS_FIELD_BASE(171, 179, 7, 0x00a0, 0x10, 10, 2), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_drv_range[] = { -+ PINS_FIELD_BASE(0, 2, 2, 0x0000, 0x10, 12, 3), -+ PIN_FIELD_BASE(3, 3, 2, 0x0000, 0x10, 15, 3), -+ PINS_FIELD_BASE(4, 6, 2, 0x0000, 0x10, 18, 3), -+ PIN_FIELD_BASE(7, 7, 2, 0x0000, 0x10, 21, 3), -+ PIN_FIELD_BASE(8, 8, 3, 0x0000, 0x10, 9, 3), -+ PINS_FIELD_BASE(9, 11, 2, 0x0000, 0x10, 24, 3), -+ PIN_FIELD_BASE(12, 12, 5, 0x0000, 0x10, 27, 3), -+ PINS_FIELD_BASE(13, 15, 6, 0x0010, 0x10, 3, 3), -+ PIN_FIELD_BASE(16, 16, 6, 0x0010, 0x10, 6, 3), -+ PIN_FIELD_BASE(17, 17, 6, 0x0000, 0x10, 23, 3), -+ PIN_FIELD_BASE(18, 18, 6, 0x0000, 0x10, 26, 3), -+ PINS_FIELD_BASE(19, 20, 6, 0x0000, 0x10, 23, 3), -+ PINS_FIELD_BASE(21, 23, 6, 0x0000, 0x10, 29, 3), -+ PIN_FIELD_BASE(24, 24, 6, 0x0010, 0x10, 0, 3), -+ PINS_FIELD_BASE(25, 27, 6, 0x0000, 0x10, 17, 3), -+ PIN_FIELD_BASE(28, 28, 6, 0x0000, 0x10, 20, 3), -+ PIN_FIELD_BASE(29, 29, 6, 0x0000, 0x10, 0, 3), -+ PIN_FIELD_BASE(30, 30, 6, 0x0000, 0x10, 3, 3), -+ PINS_FIELD_BASE(31, 34, 6, 0x0000, 0x10, 6, 3), -+ PINS_FIELD_BASE(35, 36, 6, 0x0000, 0x10, 13, 2), -+ PIN_FIELD_BASE(37, 37, 6, 0x0000, 0x10, 15, 2), -+ PIN_FIELD_BASE(38, 38, 6, 0x0000, 0x10, 11, 2), -+ PINS_FIELD_BASE(39, 40, 6, 0x0000, 0x10, 9, 2), -+ PINS_FIELD_BASE(41, 42, 7, 0x0000, 0x10, 21, 3), -+ PIN_FIELD_BASE(43, 43, 7, 0x0000, 0x10, 9, 3), -+ PIN_FIELD_BASE(44, 44, 7, 0x0000, 0x10, 12, 3), -+ PIN_FIELD_BASE(45, 45, 7, 0x0000, 0x10, 27, 3), -+ PINS_FIELD_BASE(46, 47, 7, 0x0000, 0x10, 24, 3), -+ PINS_FIELD_BASE(48, 49, 7, 0x0010, 0x10, 18, 3), -+ PINS_FIELD_BASE(50, 51, 7, 0x0010, 0x10, 15, 3), -+ PINS_FIELD_BASE(52, 57, 7, 0x0000, 0x10, 0, 3), -+ PINS_FIELD_BASE(58, 60, 7, 0x0010, 0x10, 9, 3), -+ PINS_FIELD_BASE(61, 62, 3, 0x0000, 0x10, 15, 3), -+ PINS_FIELD_BASE(63, 64, 3, 0x0000, 0x10, 12, 3), -+ PINS_FIELD_BASE(65, 66, 3, 0x0000, 0x10, 21, 3), -+ PINS_FIELD_BASE(67, 68, 3, 0x0000, 0x10, 18, 3), -+ PINS_FIELD_BASE(69, 73, 3, 0x0000, 0x10, 3, 3), -+ PINS_FIELD_BASE(74, 78, 3, 0x0000, 0x10, 6, 3), -+ PINS_FIELD_BASE(79, 80, 3, 0x0000, 0x10, 0, 3), -+ PIN_FIELD_BASE(81, 81, 3, 0x0010, 0x10, 0, 3), -+ PINS_FIELD_BASE(82, 83, 3, 0x0000, 0x10, 27, 3), -+ PIN_FIELD_BASE(84, 84, 3, 0x0010, 0x10, 0, 3), -+ PIN_FIELD_BASE(85, 85, 7, 0x0010, 0x10, 9, 3), -+ PIN_FIELD_BASE(86, 86, 7, 0x0010, 0x10, 12, 3), -+ PIN_FIELD_BASE(87, 87, 7, 0x0000, 0x10, 6, 3), -+ PIN_FIELD_BASE(88, 88, 7, 0x0000, 0x10, 3, 3), -+ PIN_FIELD_BASE(89, 89, 2, 0x0010, 0x10, 15, 3), -+ PIN_FIELD_BASE(90, 90, 3, 0x0000, 0x10, 24, 3), -+ PIN_FIELD_BASE(91, 91, 2, 0x0010, 0x10, 6, 3), -+ PIN_FIELD_BASE(92, 92, 2, 0x0010, 0x10, 3, 3), -+ PIN_FIELD_BASE(93, 93, 2, 0x0000, 0x10, 27, 3), -+ PIN_FIELD_BASE(94, 94, 2, 0x0010, 0x10, 0, 3), -+ PINS_FIELD_BASE(95, 96, 2, 0x0010, 0x10, 18, 3), -+ PINS_FIELD_BASE(97, 98, 2, 0x0000, 0x10, 6, 3), -+ PIN_FIELD_BASE(99, 99, 2, 0x0000, 0x10, 0, 3), -+ PIN_FIELD_BASE(100, 100, 2, 0x0000, 0x10, 3, 3), -+ PINS_FIELD_BASE(101, 102, 2, 0x0000, 0x10, 9, 3), -+ PINS_FIELD_BASE(103, 104, 2, 0x0010, 0x10, 9, 3), -+ PINS_FIELD_BASE(105, 106, 2, 0x0010, 0x10, 12, 3), -+ PIN_FIELD_BASE(107, 107, 1, 0x0000, 0x10, 12, 3), -+ PIN_FIELD_BASE(108, 108, 1, 0x0000, 0x10, 9, 3), -+ PIN_FIELD_BASE(109, 109, 1, 0x0000, 0x10, 15, 3), -+ PIN_FIELD_BASE(110, 110, 1, 0x0000, 0x10, 0, 3), -+ PIN_FIELD_BASE(111, 111, 1, 0x0000, 0x10, 3, 3), -+ PIN_FIELD_BASE(112, 112, 1, 0x0000, 0x10, 6, 3), -+ PIN_FIELD_BASE(113, 113, 1, 0x0000, 0x10, 27, 3), -+ PIN_FIELD_BASE(114, 114, 1, 0x0010, 0x10, 0, 3), -+ PIN_FIELD_BASE(115, 115, 1, 0x0000, 0x10, 18, 3), -+ PIN_FIELD_BASE(116, 116, 1, 0x0000, 0x10, 21, 3), -+ PIN_FIELD_BASE(117, 117, 1, 0x0010, 0x10, 6, 3), -+ PIN_FIELD_BASE(118, 118, 1, 0x0010, 0x10, 9, 3), -+ PIN_FIELD_BASE(119, 119, 1, 0x0010, 0x10, 12, 3), -+ PIN_FIELD_BASE(120, 120, 1, 0x0010, 0x10, 3, 3), -+ PIN_FIELD_BASE(121, 121, 1, 0x0000, 0x10, 24, 3), -+ PIN_FIELD_BASE(122, 122, 4, 0x0000, 0x10, 9, 3), -+ PIN_FIELD_BASE(123, 123, 4, 0x0000, 0x10, 12, 3), -+ PIN_FIELD_BASE(124, 124, 4, 0x0000, 0x10, 6, 3), -+ PINS_FIELD_BASE(125, 130, 4, 0x0000, 0x10, 12, 3), -+ PIN_FIELD_BASE(131, 131, 4, 0x0000, 0x10, 15, 3), -+ PIN_FIELD_BASE(132, 132, 4, 0x0000, 0x10, 12, 3), -+ PIN_FIELD_BASE(133, 133, 4, 0x0000, 0x10, 18, 3), -+ PIN_FIELD_BASE(134, 134, 5, 0x0010, 0x10, 6, 3), -+ PIN_FIELD_BASE(135, 135, 5, 0x0010, 0x10, 12, 3), -+ PIN_FIELD_BASE(136, 136, 5, 0x0000, 0x10, 3, 3), -+ PIN_FIELD_BASE(137, 137, 5, 0x0000, 0x10, 21, 3), -+ PIN_FIELD_BASE(138, 138, 5, 0x0000, 0x10, 12, 3), -+ PIN_FIELD_BASE(139, 139, 5, 0x0000, 0x10, 15, 3), -+ PIN_FIELD_BASE(140, 140, 5, 0x0000, 0x10, 0, 3), -+ PIN_FIELD_BASE(141, 141, 5, 0x0000, 0x10, 18, 3), -+ PIN_FIELD_BASE(142, 142, 5, 0x0000, 0x10, 6, 3), -+ PIN_FIELD_BASE(143, 143, 5, 0x0000, 0x10, 9, 3), -+ PINS_FIELD_BASE(144, 146, 5, 0x0010, 0x10, 0, 3), -+ PIN_FIELD_BASE(147, 147, 5, 0x0010, 0x10, 3, 3), -+ PINS_FIELD_BASE(148, 149, 5, 0x0010, 0x10, 9, 3), -+ PINS_FIELD_BASE(150, 151, 7, 0x0010, 0x10, 0, 3), -+ PINS_FIELD_BASE(152, 153, 7, 0x0010, 0x10, 3, 3), -+ PIN_FIELD_BASE(154, 154, 7, 0x0010, 0x10, 6, 3), -+ PINS_FIELD_BASE(155, 157, 3, 0x0010, 0x10, 3, 3), -+ PIN_FIELD_BASE(158, 158, 3, 0x0010, 0x10, 6, 3), -+ PIN_FIELD_BASE(159, 159, 7, 0x0010, 0x10, 6, 3), -+ PIN_FIELD_BASE(160, 160, 5, 0x0000, 0x10, 24, 3), -+ PINS_FIELD_BASE(161, 162, 1, 0x0010, 0x10, 15, 3), -+ PINS_FIELD_BASE(163, 166, 4, 0x0000, 0x10, 0, 3), -+ PINS_FIELD_BASE(167, 170, 4, 0x0000, 0x10, 3, 3), -+ PINS_FIELD_BASE(171, 174, 7, 0x0000, 0x10, 18, 3), -+ PINS_FIELD_BASE(175, 179, 7, 0x0000, 0x10, 15, 3), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_pupd_range[] = { -+ PINS_FIELD_BASE(0, 28, 0, 0x0050, 0x10, 18, 1), -+ PIN_FIELD_BASE(29, 29, 6, 0x0050, 0x10, 0, 1), -+ PIN_FIELD_BASE(30, 30, 6, 0x0050, 0x10, 1, 1), -+ PIN_FIELD_BASE(31, 31, 6, 0x0050, 0x10, 5, 1), -+ PIN_FIELD_BASE(32, 32, 6, 0x0050, 0x10, 2, 1), -+ PIN_FIELD_BASE(33, 33, 6, 0x0050, 0x10, 4, 1), -+ PIN_FIELD_BASE(34, 34, 6, 0x0050, 0x10, 3, 1), -+ PIN_FIELD_BASE(35, 35, 6, 0x0050, 0x10, 10, 1), -+ PIN_FIELD_BASE(36, 36, 6, 0x0050, 0x10, 11, 1), -+ PIN_FIELD_BASE(37, 37, 6, 0x0050, 0x10, 9, 1), -+ PIN_FIELD_BASE(38, 38, 6, 0x0050, 0x10, 6, 1), -+ PIN_FIELD_BASE(39, 39, 6, 0x0050, 0x10, 8, 1), -+ PINS_FIELD_BASE(40, 90, 6, 0x0050, 0x10, 7, 1), -+ PIN_FIELD_BASE(91, 91, 2, 0x0050, 0x10, 3, 1), -+ PIN_FIELD_BASE(92, 92, 2, 0x0050, 0x10, 2, 1), -+ PIN_FIELD_BASE(93, 93, 2, 0x0050, 0x10, 0, 1), -+ PINS_FIELD_BASE(94, 121, 2, 0x0050, 0x10, 1, 1), -+ PIN_FIELD_BASE(122, 122, 4, 0x0030, 0x10, 1, 1), -+ PIN_FIELD_BASE(123, 123, 4, 0x0030, 0x10, 2, 1), -+ PIN_FIELD_BASE(124, 124, 4, 0x0030, 0x10, 0, 1), -+ PIN_FIELD_BASE(125, 125, 4, 0x0030, 0x10, 4, 1), -+ PIN_FIELD_BASE(126, 126, 4, 0x0030, 0x10, 6, 1), -+ PIN_FIELD_BASE(127, 127, 4, 0x0030, 0x10, 8, 1), -+ PIN_FIELD_BASE(128, 128, 4, 0x0030, 0x10, 3, 1), -+ PIN_FIELD_BASE(129, 129, 4, 0x0030, 0x10, 7, 1), -+ PIN_FIELD_BASE(130, 130, 4, 0x0030, 0x10, 9, 1), -+ PIN_FIELD_BASE(131, 131, 4, 0x0030, 0x10, 10, 1), -+ PIN_FIELD_BASE(132, 132, 4, 0x0030, 0x10, 5, 1), -+ PINS_FIELD_BASE(133, 179, 4, 0x0030, 0x10, 11, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_r0_range[] = { -+ PINS_FIELD_BASE(0, 28, 4, 0x0030, 0x10, 11, 1), -+ PIN_FIELD_BASE(29, 29, 6, 0x0070, 0x10, 0, 1), -+ PIN_FIELD_BASE(30, 30, 6, 0x0070, 0x10, 1, 1), -+ PIN_FIELD_BASE(31, 31, 6, 0x0070, 0x10, 5, 1), -+ PIN_FIELD_BASE(32, 32, 6, 0x0070, 0x10, 2, 1), -+ PIN_FIELD_BASE(33, 33, 6, 0x0070, 0x10, 4, 1), -+ PIN_FIELD_BASE(34, 34, 6, 0x0070, 0x10, 3, 1), -+ PIN_FIELD_BASE(35, 35, 6, 0x0070, 0x10, 10, 1), -+ PIN_FIELD_BASE(36, 36, 6, 0x0070, 0x10, 11, 1), -+ PIN_FIELD_BASE(37, 37, 6, 0x0070, 0x10, 9, 1), -+ PIN_FIELD_BASE(38, 38, 6, 0x0070, 0x10, 6, 1), -+ PIN_FIELD_BASE(39, 39, 6, 0x0070, 0x10, 8, 1), -+ PINS_FIELD_BASE(40, 90, 6, 0x0070, 0x10, 7, 1), -+ PIN_FIELD_BASE(91, 91, 2, 0x0070, 0x10, 3, 1), -+ PIN_FIELD_BASE(92, 92, 2, 0x0070, 0x10, 2, 1), -+ PIN_FIELD_BASE(93, 93, 2, 0x0070, 0x10, 0, 1), -+ PINS_FIELD_BASE(94, 121, 2, 0x0070, 0x10, 1, 1), -+ PIN_FIELD_BASE(122, 122, 4, 0x0050, 0x10, 1, 1), -+ PIN_FIELD_BASE(123, 123, 4, 0x0050, 0x10, 2, 1), -+ PIN_FIELD_BASE(124, 124, 4, 0x0050, 0x10, 0, 1), -+ PIN_FIELD_BASE(125, 125, 4, 0x0050, 0x10, 4, 1), -+ PIN_FIELD_BASE(126, 126, 4, 0x0050, 0x10, 6, 1), -+ PIN_FIELD_BASE(127, 127, 4, 0x0050, 0x10, 8, 1), -+ PIN_FIELD_BASE(128, 128, 4, 0x0050, 0x10, 3, 1), -+ PIN_FIELD_BASE(129, 129, 4, 0x0050, 0x10, 7, 1), -+ PIN_FIELD_BASE(130, 130, 4, 0x0050, 0x10, 9, 1), -+ PIN_FIELD_BASE(131, 131, 4, 0x0050, 0x10, 10, 1), -+ PIN_FIELD_BASE(132, 132, 4, 0x0050, 0x10, 5, 1), -+ PINS_FIELD_BASE(133, 179, 4, 0x0050, 0x10, 11, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_r1_range[] = { -+ PINS_FIELD_BASE(0, 28, 4, 0x0050, 0x10, 11, 1), -+ PIN_FIELD_BASE(29, 29, 6, 0x0080, 0x10, 0, 1), -+ PIN_FIELD_BASE(30, 30, 6, 0x0080, 0x10, 1, 1), -+ PIN_FIELD_BASE(31, 31, 6, 0x0080, 0x10, 5, 1), -+ PIN_FIELD_BASE(32, 32, 6, 0x0080, 0x10, 2, 1), -+ PIN_FIELD_BASE(33, 33, 6, 0x0080, 0x10, 4, 1), -+ PIN_FIELD_BASE(34, 34, 6, 0x0080, 0x10, 3, 1), -+ PIN_FIELD_BASE(35, 35, 6, 0x0080, 0x10, 10, 1), -+ PIN_FIELD_BASE(36, 36, 6, 0x0080, 0x10, 11, 1), -+ PIN_FIELD_BASE(37, 37, 6, 0x0080, 0x10, 9, 1), -+ PIN_FIELD_BASE(38, 38, 6, 0x0080, 0x10, 6, 1), -+ PIN_FIELD_BASE(39, 39, 6, 0x0080, 0x10, 8, 1), -+ PINS_FIELD_BASE(40, 90, 6, 0x0080, 0x10, 7, 1), -+ PIN_FIELD_BASE(91, 91, 2, 0x0080, 0x10, 3, 1), -+ PIN_FIELD_BASE(92, 92, 2, 0x0080, 0x10, 2, 1), -+ PIN_FIELD_BASE(93, 93, 2, 0x0080, 0x10, 0, 1), -+ PINS_FIELD_BASE(94, 121, 2, 0x0080, 0x10, 1, 1), -+ PIN_FIELD_BASE(122, 122, 4, 0x0060, 0x10, 1, 1), -+ PIN_FIELD_BASE(123, 123, 4, 0x0060, 0x10, 2, 1), -+ PIN_FIELD_BASE(124, 124, 4, 0x0060, 0x10, 0, 1), -+ PIN_FIELD_BASE(125, 125, 4, 0x0060, 0x10, 4, 1), -+ PIN_FIELD_BASE(126, 126, 4, 0x0060, 0x10, 6, 1), -+ PIN_FIELD_BASE(127, 127, 4, 0x0060, 0x10, 8, 1), -+ PIN_FIELD_BASE(128, 128, 4, 0x0060, 0x10, 3, 1), -+ PIN_FIELD_BASE(129, 129, 4, 0x0060, 0x10, 7, 1), -+ PIN_FIELD_BASE(130, 130, 4, 0x0060, 0x10, 9, 1), -+ PIN_FIELD_BASE(131, 131, 4, 0x0060, 0x10, 10, 1), -+ PIN_FIELD_BASE(132, 132, 4, 0x0060, 0x10, 5, 1), -+ PINS_FIELD_BASE(133, 179, 4, 0x0060, 0x10, 11, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6765_pin_ies_range[] = { -+ PIN_FIELD_BASE(0, 0, 2, 0x0030, 0x10, 6, 1), -+ PIN_FIELD_BASE(1, 1, 2, 0x0030, 0x10, 7, 1), -+ PIN_FIELD_BASE(2, 2, 2, 0x0030, 0x10, 10, 1), -+ PIN_FIELD_BASE(3, 3, 2, 0x0030, 0x10, 11, 1), -+ PIN_FIELD_BASE(4, 4, 2, 0x0030, 0x10, 12, 1), -+ PIN_FIELD_BASE(5, 5, 2, 0x0030, 0x10, 13, 1), -+ PIN_FIELD_BASE(6, 6, 2, 0x0030, 0x10, 14, 1), -+ PIN_FIELD_BASE(7, 7, 2, 0x0030, 0x10, 15, 1), -+ PIN_FIELD_BASE(8, 8, 3, 0x0030, 0x10, 12, 1), -+ PIN_FIELD_BASE(9, 9, 2, 0x0030, 0x10, 16, 1), -+ PIN_FIELD_BASE(10, 10, 2, 0x0030, 0x10, 8, 1), -+ PIN_FIELD_BASE(11, 11, 2, 0x0030, 0x10, 9, 1), -+ PIN_FIELD_BASE(12, 12, 5, 0x0020, 0x10, 9, 1), -+ PIN_FIELD_BASE(13, 13, 6, 0x0020, 0x10, 26, 1), -+ PIN_FIELD_BASE(14, 14, 6, 0x0020, 0x10, 25, 1), -+ PIN_FIELD_BASE(15, 15, 6, 0x0020, 0x10, 27, 1), -+ PIN_FIELD_BASE(16, 16, 6, 0x0020, 0x10, 24, 1), -+ PIN_FIELD_BASE(17, 17, 6, 0x0020, 0x10, 19, 1), -+ PIN_FIELD_BASE(18, 18, 6, 0x0020, 0x10, 16, 1), -+ PIN_FIELD_BASE(19, 19, 6, 0x0020, 0x10, 18, 1), -+ PIN_FIELD_BASE(20, 20, 6, 0x0020, 0x10, 17, 1), -+ PIN_FIELD_BASE(21, 21, 6, 0x0020, 0x10, 22, 1), -+ PIN_FIELD_BASE(22, 22, 6, 0x0020, 0x10, 21, 1), -+ PIN_FIELD_BASE(23, 23, 6, 0x0020, 0x10, 23, 1), -+ PIN_FIELD_BASE(24, 24, 6, 0x0020, 0x10, 20, 1), -+ PIN_FIELD_BASE(25, 25, 6, 0x0020, 0x10, 14, 1), -+ PIN_FIELD_BASE(26, 26, 6, 0x0020, 0x10, 13, 1), -+ PIN_FIELD_BASE(27, 27, 6, 0x0020, 0x10, 15, 1), -+ PIN_FIELD_BASE(28, 28, 6, 0x0020, 0x10, 12, 1), -+ PIN_FIELD_BASE(29, 29, 6, 0x0020, 0x10, 0, 1), -+ PIN_FIELD_BASE(30, 30, 6, 0x0020, 0x10, 1, 1), -+ PIN_FIELD_BASE(31, 31, 6, 0x0020, 0x10, 5, 1), -+ PIN_FIELD_BASE(32, 32, 6, 0x0020, 0x10, 2, 1), -+ PIN_FIELD_BASE(33, 33, 6, 0x0020, 0x10, 4, 1), -+ PIN_FIELD_BASE(34, 34, 6, 0x0020, 0x10, 3, 1), -+ PIN_FIELD_BASE(35, 35, 6, 0x0020, 0x10, 10, 1), -+ PIN_FIELD_BASE(36, 36, 6, 0x0020, 0x10, 11, 1), -+ PIN_FIELD_BASE(37, 37, 6, 0x0020, 0x10, 9, 1), -+ PIN_FIELD_BASE(38, 38, 6, 0x0020, 0x10, 6, 1), -+ PIN_FIELD_BASE(39, 39, 6, 0x0020, 0x10, 8, 1), -+ PIN_FIELD_BASE(40, 40, 6, 0x0020, 0x10, 7, 1), -+ PIN_FIELD_BASE(41, 41, 7, 0x0040, 0x10, 19, 1), -+ PIN_FIELD_BASE(42, 42, 7, 0x0040, 0x10, 9, 1), -+ PIN_FIELD_BASE(43, 43, 7, 0x0040, 0x10, 8, 1), -+ PIN_FIELD_BASE(44, 44, 7, 0x0040, 0x10, 10, 1), -+ PIN_FIELD_BASE(45, 45, 7, 0x0040, 0x10, 22, 1), -+ PIN_FIELD_BASE(46, 46, 7, 0x0040, 0x10, 21, 1), -+ PIN_FIELD_BASE(47, 47, 7, 0x0040, 0x10, 20, 1), -+ PIN_FIELD_BASE(48, 48, 7, 0x0050, 0x10, 3, 1), -+ PIN_FIELD_BASE(49, 49, 7, 0x0050, 0x10, 5, 1), -+ PIN_FIELD_BASE(50, 50, 7, 0x0050, 0x10, 2, 1), -+ PIN_FIELD_BASE(51, 51, 7, 0x0050, 0x10, 4, 1), -+ PIN_FIELD_BASE(52, 52, 7, 0x0040, 0x10, 1, 1), -+ PIN_FIELD_BASE(53, 53, 7, 0x0040, 0x10, 0, 1), -+ PIN_FIELD_BASE(54, 54, 7, 0x0040, 0x10, 5, 1), -+ PIN_FIELD_BASE(55, 55, 7, 0x0040, 0x10, 3, 1), -+ PIN_FIELD_BASE(56, 56, 7, 0x0040, 0x10, 4, 1), -+ PIN_FIELD_BASE(57, 57, 7, 0x0040, 0x10, 2, 1), -+ PIN_FIELD_BASE(58, 58, 7, 0x0050, 0x10, 0, 1), -+ PIN_FIELD_BASE(59, 59, 7, 0x0040, 0x10, 31, 1), -+ PIN_FIELD_BASE(60, 60, 7, 0x0040, 0x10, 30, 1), -+ PIN_FIELD_BASE(61, 61, 3, 0x0030, 0x10, 18, 1), -+ PIN_FIELD_BASE(62, 62, 3, 0x0030, 0x10, 14, 1), -+ PIN_FIELD_BASE(63, 63, 3, 0x0030, 0x10, 17, 1), -+ PIN_FIELD_BASE(64, 64, 3, 0x0030, 0x10, 13, 1), -+ PIN_FIELD_BASE(65, 65, 3, 0x0030, 0x10, 20, 1), -+ PIN_FIELD_BASE(66, 66, 3, 0x0030, 0x10, 16, 1), -+ PIN_FIELD_BASE(67, 67, 3, 0x0030, 0x10, 19, 1), -+ PIN_FIELD_BASE(68, 68, 3, 0x0030, 0x10, 15, 1), -+ PIN_FIELD_BASE(69, 69, 3, 0x0030, 0x10, 8, 1), -+ PIN_FIELD_BASE(70, 70, 3, 0x0030, 0x10, 7, 1), -+ PIN_FIELD_BASE(71, 71, 3, 0x0030, 0x10, 6, 1), -+ PIN_FIELD_BASE(72, 72, 3, 0x0030, 0x10, 5, 1), -+ PIN_FIELD_BASE(73, 73, 3, 0x0030, 0x10, 4, 1), -+ PIN_FIELD_BASE(74, 74, 3, 0x0030, 0x10, 3, 1), -+ PIN_FIELD_BASE(75, 75, 3, 0x0030, 0x10, 2, 1), -+ PIN_FIELD_BASE(76, 76, 3, 0x0030, 0x10, 1, 1), -+ PIN_FIELD_BASE(77, 77, 3, 0x0030, 0x10, 0, 1), -+ PIN_FIELD_BASE(78, 78, 3, 0x0030, 0x10, 9, 1), -+ PIN_FIELD_BASE(79, 79, 3, 0x0030, 0x10, 11, 1), -+ PIN_FIELD_BASE(80, 80, 3, 0x0030, 0x10, 10, 1), -+ PIN_FIELD_BASE(81, 81, 3, 0x0030, 0x10, 25, 1), -+ PIN_FIELD_BASE(82, 82, 3, 0x0030, 0x10, 24, 1), -+ PIN_FIELD_BASE(83, 83, 3, 0x0030, 0x10, 22, 1), -+ PIN_FIELD_BASE(84, 84, 3, 0x0030, 0x10, 23, 1), -+ PIN_FIELD_BASE(85, 85, 7, 0x0050, 0x10, 1, 1), -+ PIN_FIELD_BASE(86, 86, 7, 0x0040, 0x10, 29, 1), -+ PIN_FIELD_BASE(87, 87, 7, 0x0040, 0x10, 7, 1), -+ PIN_FIELD_BASE(88, 88, 7, 0x0040, 0x10, 6, 1), -+ PIN_FIELD_BASE(89, 89, 2, 0x0030, 0x10, 25, 1), -+ PIN_FIELD_BASE(90, 90, 3, 0x0030, 0x10, 21, 1), -+ PIN_FIELD_BASE(91, 91, 2, 0x0030, 0x10, 20, 1), -+ PIN_FIELD_BASE(92, 92, 2, 0x0030, 0x10, 19, 1), -+ PIN_FIELD_BASE(93, 93, 2, 0x0030, 0x10, 17, 1), -+ PIN_FIELD_BASE(94, 94, 2, 0x0030, 0x10, 18, 1), -+ PIN_FIELD_BASE(95, 95, 2, 0x0030, 0x10, 26, 1), -+ PIN_FIELD_BASE(96, 96, 2, 0x0030, 0x10, 27, 1), -+ PIN_FIELD_BASE(97, 97, 2, 0x0030, 0x10, 2, 1), -+ PIN_FIELD_BASE(98, 98, 2, 0x0030, 0x10, 3, 1), -+ PIN_FIELD_BASE(99, 99, 2, 0x0030, 0x10, 0, 1), -+ PIN_FIELD_BASE(100, 100, 2, 0x0030, 0x10, 1, 1), -+ PIN_FIELD_BASE(101, 101, 2, 0x0030, 0x10, 4, 1), -+ PIN_FIELD_BASE(102, 102, 2, 0x0030, 0x10, 5, 1), -+ PIN_FIELD_BASE(103, 103, 2, 0x0030, 0x10, 21, 1), -+ PIN_FIELD_BASE(104, 104, 2, 0x0030, 0x10, 23, 1), -+ PIN_FIELD_BASE(105, 105, 2, 0x0030, 0x10, 22, 1), -+ PIN_FIELD_BASE(106, 106, 2, 0x0030, 0x10, 24, 1), -+ PIN_FIELD_BASE(107, 107, 1, 0x0030, 0x10, 4, 1), -+ PIN_FIELD_BASE(108, 108, 1, 0x0030, 0x10, 3, 1), -+ PIN_FIELD_BASE(109, 109, 1, 0x0030, 0x10, 5, 1), -+ PIN_FIELD_BASE(110, 110, 1, 0x0030, 0x10, 0, 1), -+ PIN_FIELD_BASE(111, 111, 1, 0x0030, 0x10, 1, 1), -+ PIN_FIELD_BASE(112, 112, 1, 0x0030, 0x10, 2, 1), -+ PIN_FIELD_BASE(113, 113, 1, 0x0030, 0x10, 9, 1), -+ PIN_FIELD_BASE(114, 114, 1, 0x0030, 0x10, 10, 1), -+ PIN_FIELD_BASE(115, 115, 1, 0x0030, 0x10, 6, 1), -+ PIN_FIELD_BASE(116, 116, 1, 0x0030, 0x10, 7, 1), -+ PIN_FIELD_BASE(117, 117, 1, 0x0030, 0x10, 12, 1), -+ PIN_FIELD_BASE(118, 118, 1, 0x0030, 0x10, 13, 1), -+ PIN_FIELD_BASE(119, 119, 1, 0x0030, 0x10, 14, 1), -+ PIN_FIELD_BASE(120, 120, 1, 0x0030, 0x10, 11, 1), -+ PIN_FIELD_BASE(121, 121, 1, 0x0030, 0x10, 8, 1), -+ PIN_FIELD_BASE(122, 122, 4, 0x0010, 0x10, 9, 1), -+ PIN_FIELD_BASE(123, 123, 4, 0x0010, 0x10, 10, 1), -+ PIN_FIELD_BASE(124, 124, 4, 0x0010, 0x10, 8, 1), -+ PIN_FIELD_BASE(125, 125, 4, 0x0010, 0x10, 12, 1), -+ PIN_FIELD_BASE(126, 126, 4, 0x0010, 0x10, 14, 1), -+ PIN_FIELD_BASE(127, 127, 4, 0x0010, 0x10, 16, 1), -+ PIN_FIELD_BASE(128, 128, 4, 0x0010, 0x10, 11, 1), -+ PIN_FIELD_BASE(129, 129, 4, 0x0010, 0x10, 15, 1), -+ PIN_FIELD_BASE(130, 130, 4, 0x0010, 0x10, 17, 1), -+ PIN_FIELD_BASE(131, 131, 4, 0x0010, 0x10, 18, 1), -+ PIN_FIELD_BASE(132, 132, 4, 0x0010, 0x10, 13, 1), -+ PIN_FIELD_BASE(133, 133, 4, 0x0010, 0x10, 19, 1), -+ PIN_FIELD_BASE(134, 134, 5, 0x0020, 0x10, 14, 1), -+ PIN_FIELD_BASE(135, 135, 5, 0x0020, 0x10, 17, 1), -+ PIN_FIELD_BASE(136, 136, 5, 0x0020, 0x10, 1, 1), -+ PIN_FIELD_BASE(137, 137, 5, 0x0020, 0x10, 7, 1), -+ PIN_FIELD_BASE(138, 138, 5, 0x0020, 0x10, 4, 1), -+ PIN_FIELD_BASE(139, 139, 5, 0x0020, 0x10, 5, 1), -+ PIN_FIELD_BASE(140, 140, 5, 0x0020, 0x10, 0, 1), -+ PIN_FIELD_BASE(141, 141, 5, 0x0020, 0x10, 6, 1), -+ PIN_FIELD_BASE(142, 142, 5, 0x0020, 0x10, 2, 1), -+ PIN_FIELD_BASE(143, 143, 5, 0x0020, 0x10, 3, 1), -+ PIN_FIELD_BASE(144, 144, 5, 0x0020, 0x10, 12, 1), -+ PIN_FIELD_BASE(145, 145, 5, 0x0020, 0x10, 11, 1), -+ PIN_FIELD_BASE(146, 146, 5, 0x0020, 0x10, 13, 1), -+ PIN_FIELD_BASE(147, 147, 5, 0x0020, 0x10, 10, 1), -+ PIN_FIELD_BASE(148, 148, 5, 0x0020, 0x10, 15, 1), -+ PIN_FIELD_BASE(149, 149, 5, 0x0020, 0x10, 16, 1), -+ PIN_FIELD_BASE(150, 150, 7, 0x0040, 0x10, 23, 1), -+ PIN_FIELD_BASE(151, 151, 7, 0x0040, 0x10, 24, 1), -+ PIN_FIELD_BASE(152, 152, 7, 0x0040, 0x10, 25, 1), -+ PIN_FIELD_BASE(153, 153, 7, 0x0040, 0x10, 26, 1), -+ PIN_FIELD_BASE(154, 154, 7, 0x0040, 0x10, 28, 1), -+ PIN_FIELD_BASE(155, 155, 3, 0x0030, 0x10, 28, 1), -+ PIN_FIELD_BASE(156, 156, 3, 0x0030, 0x10, 27, 1), -+ PIN_FIELD_BASE(157, 157, 3, 0x0030, 0x10, 29, 1), -+ PIN_FIELD_BASE(158, 158, 3, 0x0030, 0x10, 26, 1), -+ PIN_FIELD_BASE(159, 159, 7, 0x0040, 0x10, 27, 1), -+ PIN_FIELD_BASE(160, 160, 5, 0x0020, 0x10, 8, 1), -+ PIN_FIELD_BASE(161, 161, 1, 0x0030, 0x10, 15, 1), -+ PIN_FIELD_BASE(162, 162, 1, 0x0030, 0x10, 16, 1), -+ PIN_FIELD_BASE(163, 163, 4, 0x0010, 0x10, 0, 1), -+ PIN_FIELD_BASE(164, 164, 4, 0x0010, 0x10, 1, 1), -+ PIN_FIELD_BASE(165, 165, 4, 0x0010, 0x10, 2, 1), -+ PIN_FIELD_BASE(166, 166, 4, 0x0010, 0x10, 3, 1), -+ PIN_FIELD_BASE(167, 167, 4, 0x0010, 0x10, 4, 1), -+ PIN_FIELD_BASE(168, 168, 4, 0x0010, 0x10, 5, 1), -+ PIN_FIELD_BASE(169, 169, 4, 0x0010, 0x10, 6, 1), -+ PIN_FIELD_BASE(170, 170, 4, 0x0010, 0x10, 7, 1), -+ PIN_FIELD_BASE(171, 171, 7, 0x0040, 0x10, 17, 1), -+ PIN_FIELD_BASE(172, 172, 7, 0x0040, 0x10, 18, 1), -+ PIN_FIELD_BASE(173, 173, 7, 0x0040, 0x10, 11, 1), -+ PIN_FIELD_BASE(174, 174, 7, 0x0040, 0x10, 12, 1), -+ PIN_FIELD_BASE(175, 175, 7, 0x0040, 0x10, 13, 1), -+ PIN_FIELD_BASE(176, 176, 7, 0x0040, 0x10, 14, 1), -+ PIN_FIELD_BASE(177, 177, 7, 0x0040, 0x10, 15, 1), -+ PINS_FIELD_BASE(178, 179, 7, 0x0040, 0x10, 16, 1), -+}; -+ -+static const struct mtk_pin_reg_calc mt6765_reg_cals[PINCTRL_PIN_REG_MAX] = { -+ [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6765_pin_mode_range), -+ [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6765_pin_dir_range), -+ [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6765_pin_di_range), -+ [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6765_pin_do_range), -+ [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt6765_pin_smt_range), -+ [PINCTRL_PIN_REG_PD] = MTK_RANGE(mt6765_pin_pd_range), -+ [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt6765_pin_pu_range), -+ [PINCTRL_PIN_REG_TDSEL] = MTK_RANGE(mt6765_pin_tdsel_range), -+ [PINCTRL_PIN_REG_RDSEL] = MTK_RANGE(mt6765_pin_rdsel_range), -+ [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt6765_pin_drv_range), -+ [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt6765_pin_pupd_range), -+ [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt6765_pin_r0_range), -+ [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt6765_pin_r1_range), -+ [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt6765_pin_ies_range), -+}; -+ -+static const char * const mt6765_pinctrl_register_base_names[] = { -+ "iocfg0", "iocfg1", "iocfg2", "iocfg3", "iocfg4", "iocfg5", -+ "iocfg6", "iocfg7", -+}; -+ -+static const struct mtk_eint_hw mt6765_eint_hw = { -+ .port_mask = 7, -+ .ports = 6, -+ .ap_num = 160, -+ .db_cnt = 13, -+}; -+ -+static const struct mtk_pin_soc mt6765_data = { -+ .reg_cal = mt6765_reg_cals, -+ .pins = mtk_pins_mt6765, -+ .npins = ARRAY_SIZE(mtk_pins_mt6765), -+ .ngrps = ARRAY_SIZE(mtk_pins_mt6765), -+ .eint_hw = &mt6765_eint_hw, -+ .gpio_m = 0, -+ .ies_present = true, -+ .base_names = mt6765_pinctrl_register_base_names, -+ .nbase_names = ARRAY_SIZE(mt6765_pinctrl_register_base_names), -+ .bias_disable_set = mtk_pinconf_bias_disable_set, -+ .bias_disable_get = mtk_pinconf_bias_disable_get, -+ .bias_set = mtk_pinconf_bias_set, -+ .bias_get = mtk_pinconf_bias_get, -+ .drive_set = mtk_pinconf_drive_set_rev1, -+ .drive_get = mtk_pinconf_drive_get_rev1, -+ .adv_pull_get = mtk_pinconf_adv_pull_get, -+ .adv_pull_set = mtk_pinconf_adv_pull_set, -+}; -+ -+static const struct of_device_id mt6765_pinctrl_of_match[] = { -+ { .compatible = "mediatek,mt6765-pinctrl", }, -+ { } -+}; -+ -+static int mt6765_pinctrl_probe(struct platform_device *pdev) -+{ -+ return mtk_paris_pinctrl_probe(pdev, &mt6765_data); -+} -+ -+static struct platform_driver mt6765_pinctrl_driver = { -+ .driver = { -+ .name = "mt6765-pinctrl", -+ .of_match_table = mt6765_pinctrl_of_match, -+ }, -+ .probe = mt6765_pinctrl_probe, -+}; -+ -+static int __init mt6765_pinctrl_init(void) -+{ -+ return platform_driver_register(&mt6765_pinctrl_driver); -+} -+arch_initcall(mt6765_pinctrl_init); ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mt6797.c -@@ -0,0 +1,82 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Based on pinctrl-mt6765.c -+ * -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: ZH Chen -+ * -+ * Copyright (C) Manivannan Sadhasivam -+ * -+ */ -+ -+#include "pinctrl-mtk-mt6797.h" -+#include "pinctrl-paris.h" -+ -+/* -+ * MT6797 have multiple bases to program pin configuration listed as the below: -+ * gpio:0x10005000, iocfg[l]:0x10002000, iocfg[b]:0x10002400, -+ * iocfg[r]:0x10002800, iocfg[t]:0x10002C00. -+ * _i_base could be used to indicate what base the pin should be mapped into. -+ */ -+ -+static const struct mtk_pin_field_calc mt6797_pin_mode_range[] = { -+ PIN_FIELD(0, 261, 0x300, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt6797_pin_dir_range[] = { -+ PIN_FIELD(0, 261, 0x0, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6797_pin_di_range[] = { -+ PIN_FIELD(0, 261, 0x200, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt6797_pin_do_range[] = { -+ PIN_FIELD(0, 261, 0x100, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_reg_calc mt6797_reg_cals[PINCTRL_PIN_REG_MAX] = { -+ [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6797_pin_mode_range), -+ [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6797_pin_dir_range), -+ [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6797_pin_di_range), -+ [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6797_pin_do_range), -+}; -+ -+static const char * const mt6797_pinctrl_register_base_names[] = { -+ "gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt", -+}; -+ -+static const struct mtk_pin_soc mt6797_data = { -+ .reg_cal = mt6797_reg_cals, -+ .pins = mtk_pins_mt6797, -+ .npins = ARRAY_SIZE(mtk_pins_mt6797), -+ .ngrps = ARRAY_SIZE(mtk_pins_mt6797), -+ .gpio_m = 0, -+ .base_names = mt6797_pinctrl_register_base_names, -+ .nbase_names = ARRAY_SIZE(mt6797_pinctrl_register_base_names), -+}; -+ -+static const struct of_device_id mt6797_pinctrl_of_match[] = { -+ { .compatible = "mediatek,mt6797-pinctrl", }, -+ { } -+}; -+ -+static int mt6797_pinctrl_probe(struct platform_device *pdev) -+{ -+ return mtk_paris_pinctrl_probe(pdev, &mt6797_data); -+} -+ -+static struct platform_driver mt6797_pinctrl_driver = { -+ .driver = { -+ .name = "mt6797-pinctrl", -+ .of_match_table = mt6797_pinctrl_of_match, -+ }, -+ .probe = mt6797_pinctrl_probe, -+}; -+ -+static int __init mt6797_pinctrl_init(void) -+{ -+ return platform_driver_register(&mt6797_pinctrl_driver); -+} -+arch_initcall(mt6797_pinctrl_init); ---- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c -+++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c -@@ -1,297 +1,140 @@ -+// SPDX-License-Identifier: GPL-2.0 - /* -- * MediaTek MT7622 Pinctrl Driver -+ * Copyright (C) 2017-2018 MediaTek Inc. - * -- * Copyright (C) 2017 Sean Wang -+ * Author: Sean Wang - * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include --#include -- --#include "../core.h" --#include "../pinconf.h" --#include "../pinmux.h" --#include "mtk-eint.h" -- --#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME --#define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), } --#define PINCTRL_PIN_GROUP(name, id) \ -- { \ -- name, \ -- id##_pins, \ -- ARRAY_SIZE(id##_pins), \ -- id##_funcs, \ -- } -- --#define MTK_GPIO_MODE 1 --#define MTK_INPUT 0 --#define MTK_OUTPUT 1 --#define MTK_DISABLE 0 --#define MTK_ENABLE 1 -- --/* Custom pinconf parameters */ --#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) --#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) -- --/* List these attributes which could be modified for the pin */ --enum { -- PINCTRL_PIN_REG_MODE, -- PINCTRL_PIN_REG_DIR, -- PINCTRL_PIN_REG_DI, -- PINCTRL_PIN_REG_DO, -- PINCTRL_PIN_REG_SR, -- PINCTRL_PIN_REG_SMT, -- PINCTRL_PIN_REG_PD, -- PINCTRL_PIN_REG_PU, -- PINCTRL_PIN_REG_E4, -- PINCTRL_PIN_REG_E8, -- PINCTRL_PIN_REG_TDSEL, -- PINCTRL_PIN_REG_RDSEL, -- PINCTRL_PIN_REG_MAX, --}; -- --/* struct mtk_pin_field - the structure that holds the information of the field -- * used to describe the attribute for the pin -- * @offset: the register offset relative to the base address -- * @mask: the mask used to filter out the field from the register -- * @bitpos: the start bit relative to the register -- * @next: the indication that the field would be extended to the -- next register -- */ --struct mtk_pin_field { -- u32 offset; -- u32 mask; -- u8 bitpos; -- u8 next; --}; -- --/* struct mtk_pin_field_calc - the structure that holds the range providing -- * the guide used to look up the relevant field -- * @s_pin: the start pin within the range -- * @e_pin: the end pin within the range -- * @s_addr: the start address for the range -- * @x_addrs: the address distance between two consecutive registers -- * within the range -- * @s_bit: the start bit for the first register within the range -- * @x_bits: the bit distance between two consecutive pins within -- * the range -- */ --struct mtk_pin_field_calc { -- u16 s_pin; -- u16 e_pin; -- u32 s_addr; -- u8 x_addrs; -- u8 s_bit; -- u8 x_bits; --}; -- --/* struct mtk_pin_reg_calc - the structure that holds all ranges used to -- * determine which register the pin would make use of -- * for certain pin attribute. -- * @range: the start address for the range -- * @nranges: the number of items in the range - */ --struct mtk_pin_reg_calc { -- const struct mtk_pin_field_calc *range; -- unsigned int nranges; --}; - --/* struct mtk_pin_soc - the structure that holds SoC-specific data */ --struct mtk_pin_soc { -- const struct mtk_pin_reg_calc *reg_cal; -- const struct pinctrl_pin_desc *pins; -- unsigned int npins; -- const struct group_desc *grps; -- unsigned int ngrps; -- const struct function_desc *funcs; -- unsigned int nfuncs; -- const struct mtk_eint_regs *eint_regs; -- const struct mtk_eint_hw *eint_hw; --}; -+#include "pinctrl-moore.h" - --struct mtk_pinctrl { -- struct pinctrl_dev *pctrl; -- void __iomem *base; -- struct device *dev; -- struct gpio_chip chip; -- const struct mtk_pin_soc *soc; -- struct mtk_eint *eint; --}; -+#define MT7622_PIN(_number, _name) \ -+ MTK_PIN(_number, _name, 1, _number, DRV_GRP0) - - static const struct mtk_pin_field_calc mt7622_pin_mode_range[] = { -- {0, 0, 0x320, 0x10, 16, 4}, -- {1, 4, 0x3a0, 0x10, 16, 4}, -- {5, 5, 0x320, 0x10, 0, 4}, -- {6, 6, 0x300, 0x10, 4, 4}, -- {7, 7, 0x300, 0x10, 4, 4}, -- {8, 9, 0x350, 0x10, 20, 4}, -- {10, 10, 0x300, 0x10, 8, 4}, -- {11, 11, 0x300, 0x10, 8, 4}, -- {12, 12, 0x300, 0x10, 8, 4}, -- {13, 13, 0x300, 0x10, 8, 4}, -- {14, 15, 0x320, 0x10, 4, 4}, -- {16, 17, 0x320, 0x10, 20, 4}, -- {18, 21, 0x310, 0x10, 16, 4}, -- {22, 22, 0x380, 0x10, 16, 4}, -- {23, 23, 0x300, 0x10, 24, 4}, -- {24, 24, 0x300, 0x10, 24, 4}, -- {25, 25, 0x300, 0x10, 12, 4}, -- {25, 25, 0x300, 0x10, 12, 4}, -- {26, 26, 0x300, 0x10, 12, 4}, -- {27, 27, 0x300, 0x10, 12, 4}, -- {28, 28, 0x300, 0x10, 12, 4}, -- {29, 29, 0x300, 0x10, 12, 4}, -- {30, 30, 0x300, 0x10, 12, 4}, -- {31, 31, 0x300, 0x10, 12, 4}, -- {32, 32, 0x300, 0x10, 12, 4}, -- {33, 33, 0x300, 0x10, 12, 4}, -- {34, 34, 0x300, 0x10, 12, 4}, -- {35, 35, 0x300, 0x10, 12, 4}, -- {36, 36, 0x300, 0x10, 12, 4}, -- {37, 37, 0x300, 0x10, 20, 4}, -- {38, 38, 0x300, 0x10, 20, 4}, -- {39, 39, 0x300, 0x10, 20, 4}, -- {40, 40, 0x300, 0x10, 20, 4}, -- {41, 41, 0x300, 0x10, 20, 4}, -- {42, 42, 0x300, 0x10, 20, 4}, -- {43, 43, 0x300, 0x10, 20, 4}, -- {44, 44, 0x300, 0x10, 20, 4}, -- {45, 46, 0x300, 0x10, 20, 4}, -- {47, 47, 0x300, 0x10, 20, 4}, -- {48, 48, 0x300, 0x10, 20, 4}, -- {49, 49, 0x300, 0x10, 20, 4}, -- {50, 50, 0x300, 0x10, 20, 4}, -- {51, 70, 0x330, 0x10, 4, 4}, -- {71, 71, 0x300, 0x10, 16, 4}, -- {72, 72, 0x300, 0x10, 16, 4}, -- {73, 76, 0x310, 0x10, 0, 4}, -- {77, 77, 0x320, 0x10, 28, 4}, -- {78, 78, 0x320, 0x10, 12, 4}, -- {79, 82, 0x3a0, 0x10, 0, 4}, -- {83, 83, 0x350, 0x10, 28, 4}, -- {84, 84, 0x330, 0x10, 0, 4}, -- {85, 90, 0x360, 0x10, 4, 4}, -- {91, 94, 0x390, 0x10, 16, 4}, -- {95, 97, 0x380, 0x10, 20, 4}, -- {98, 101, 0x390, 0x10, 0, 4}, -- {102, 102, 0x360, 0x10, 0, 4}, -+ PIN_FIELD(0, 0, 0x320, 0x10, 16, 4), -+ PIN_FIELD(1, 4, 0x3a0, 0x10, 16, 4), -+ PIN_FIELD(5, 5, 0x320, 0x10, 0, 4), -+ PINS_FIELD(6, 7, 0x300, 0x10, 4, 4), -+ PIN_FIELD(8, 9, 0x350, 0x10, 20, 4), -+ PINS_FIELD(10, 13, 0x300, 0x10, 8, 4), -+ PIN_FIELD(14, 15, 0x320, 0x10, 4, 4), -+ PIN_FIELD(16, 17, 0x320, 0x10, 20, 4), -+ PIN_FIELD(18, 21, 0x310, 0x10, 16, 4), -+ PIN_FIELD(22, 22, 0x380, 0x10, 16, 4), -+ PINS_FIELD(23, 24, 0x300, 0x10, 24, 4), -+ PINS_FIELD(25, 36, 0x300, 0x10, 12, 4), -+ PINS_FIELD(37, 50, 0x300, 0x10, 20, 4), -+ PIN_FIELD(51, 70, 0x330, 0x10, 4, 4), -+ PINS_FIELD(71, 72, 0x300, 0x10, 16, 4), -+ PIN_FIELD(73, 76, 0x310, 0x10, 0, 4), -+ PIN_FIELD(77, 77, 0x320, 0x10, 28, 4), -+ PIN_FIELD(78, 78, 0x320, 0x10, 12, 4), -+ PIN_FIELD(79, 82, 0x3a0, 0x10, 0, 4), -+ PIN_FIELD(83, 83, 0x350, 0x10, 28, 4), -+ PIN_FIELD(84, 84, 0x330, 0x10, 0, 4), -+ PIN_FIELD(85, 90, 0x360, 0x10, 4, 4), -+ PIN_FIELD(91, 94, 0x390, 0x10, 16, 4), -+ PIN_FIELD(95, 97, 0x380, 0x10, 20, 4), -+ PIN_FIELD(98, 101, 0x390, 0x10, 0, 4), -+ PIN_FIELD(102, 102, 0x360, 0x10, 0, 4), - }; - - static const struct mtk_pin_field_calc mt7622_pin_dir_range[] = { -- {0, 102, 0x0, 0x10, 0, 1}, -+ PIN_FIELD(0, 102, 0x0, 0x10, 0, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_di_range[] = { -- {0, 102, 0x200, 0x10, 0, 1}, -+ PIN_FIELD(0, 102, 0x200, 0x10, 0, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_do_range[] = { -- {0, 102, 0x100, 0x10, 0, 1}, -+ PIN_FIELD(0, 102, 0x100, 0x10, 0, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_sr_range[] = { -- {0, 31, 0x910, 0x10, 0, 1}, -- {32, 50, 0xa10, 0x10, 0, 1}, -- {51, 70, 0x810, 0x10, 0, 1}, -- {71, 72, 0xb10, 0x10, 0, 1}, -- {73, 86, 0xb10, 0x10, 4, 1}, -- {87, 90, 0xc10, 0x10, 0, 1}, -- {91, 102, 0xb10, 0x10, 18, 1}, -+ PIN_FIELD(0, 31, 0x910, 0x10, 0, 1), -+ PIN_FIELD(32, 50, 0xa10, 0x10, 0, 1), -+ PIN_FIELD(51, 70, 0x810, 0x10, 0, 1), -+ PIN_FIELD(71, 72, 0xb10, 0x10, 0, 1), -+ PIN_FIELD(73, 86, 0xb10, 0x10, 4, 1), -+ PIN_FIELD(87, 90, 0xc10, 0x10, 0, 1), -+ PIN_FIELD(91, 102, 0xb10, 0x10, 18, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_smt_range[] = { -- {0, 31, 0x920, 0x10, 0, 1}, -- {32, 50, 0xa20, 0x10, 0, 1}, -- {51, 70, 0x820, 0x10, 0, 1}, -- {71, 72, 0xb20, 0x10, 0, 1}, -- {73, 86, 0xb20, 0x10, 4, 1}, -- {87, 90, 0xc20, 0x10, 0, 1}, -- {91, 102, 0xb20, 0x10, 18, 1}, -+ PIN_FIELD(0, 31, 0x920, 0x10, 0, 1), -+ PIN_FIELD(32, 50, 0xa20, 0x10, 0, 1), -+ PIN_FIELD(51, 70, 0x820, 0x10, 0, 1), -+ PIN_FIELD(71, 72, 0xb20, 0x10, 0, 1), -+ PIN_FIELD(73, 86, 0xb20, 0x10, 4, 1), -+ PIN_FIELD(87, 90, 0xc20, 0x10, 0, 1), -+ PIN_FIELD(91, 102, 0xb20, 0x10, 18, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_pu_range[] = { -- {0, 31, 0x930, 0x10, 0, 1}, -- {32, 50, 0xa30, 0x10, 0, 1}, -- {51, 70, 0x830, 0x10, 0, 1}, -- {71, 72, 0xb30, 0x10, 0, 1}, -- {73, 86, 0xb30, 0x10, 4, 1}, -- {87, 90, 0xc30, 0x10, 0, 1}, -- {91, 102, 0xb30, 0x10, 18, 1}, -+ PIN_FIELD(0, 31, 0x930, 0x10, 0, 1), -+ PIN_FIELD(32, 50, 0xa30, 0x10, 0, 1), -+ PIN_FIELD(51, 70, 0x830, 0x10, 0, 1), -+ PIN_FIELD(71, 72, 0xb30, 0x10, 0, 1), -+ PIN_FIELD(73, 86, 0xb30, 0x10, 4, 1), -+ PIN_FIELD(87, 90, 0xc30, 0x10, 0, 1), -+ PIN_FIELD(91, 102, 0xb30, 0x10, 18, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_pd_range[] = { -- {0, 31, 0x940, 0x10, 0, 1}, -- {32, 50, 0xa40, 0x10, 0, 1}, -- {51, 70, 0x840, 0x10, 0, 1}, -- {71, 72, 0xb40, 0x10, 0, 1}, -- {73, 86, 0xb40, 0x10, 4, 1}, -- {87, 90, 0xc40, 0x10, 0, 1}, -- {91, 102, 0xb40, 0x10, 18, 1}, -+ PIN_FIELD(0, 31, 0x940, 0x10, 0, 1), -+ PIN_FIELD(32, 50, 0xa40, 0x10, 0, 1), -+ PIN_FIELD(51, 70, 0x840, 0x10, 0, 1), -+ PIN_FIELD(71, 72, 0xb40, 0x10, 0, 1), -+ PIN_FIELD(73, 86, 0xb40, 0x10, 4, 1), -+ PIN_FIELD(87, 90, 0xc40, 0x10, 0, 1), -+ PIN_FIELD(91, 102, 0xb40, 0x10, 18, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_e4_range[] = { -- {0, 31, 0x960, 0x10, 0, 1}, -- {32, 50, 0xa60, 0x10, 0, 1}, -- {51, 70, 0x860, 0x10, 0, 1}, -- {71, 72, 0xb60, 0x10, 0, 1}, -- {73, 86, 0xb60, 0x10, 4, 1}, -- {87, 90, 0xc60, 0x10, 0, 1}, -- {91, 102, 0xb60, 0x10, 18, 1}, -+ PIN_FIELD(0, 31, 0x960, 0x10, 0, 1), -+ PIN_FIELD(32, 50, 0xa60, 0x10, 0, 1), -+ PIN_FIELD(51, 70, 0x860, 0x10, 0, 1), -+ PIN_FIELD(71, 72, 0xb60, 0x10, 0, 1), -+ PIN_FIELD(73, 86, 0xb60, 0x10, 4, 1), -+ PIN_FIELD(87, 90, 0xc60, 0x10, 0, 1), -+ PIN_FIELD(91, 102, 0xb60, 0x10, 18, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_e8_range[] = { -- {0, 31, 0x970, 0x10, 0, 1}, -- {32, 50, 0xa70, 0x10, 0, 1}, -- {51, 70, 0x870, 0x10, 0, 1}, -- {71, 72, 0xb70, 0x10, 0, 1}, -- {73, 86, 0xb70, 0x10, 4, 1}, -- {87, 90, 0xc70, 0x10, 0, 1}, -- {91, 102, 0xb70, 0x10, 18, 1}, -+ PIN_FIELD(0, 31, 0x970, 0x10, 0, 1), -+ PIN_FIELD(32, 50, 0xa70, 0x10, 0, 1), -+ PIN_FIELD(51, 70, 0x870, 0x10, 0, 1), -+ PIN_FIELD(71, 72, 0xb70, 0x10, 0, 1), -+ PIN_FIELD(73, 86, 0xb70, 0x10, 4, 1), -+ PIN_FIELD(87, 90, 0xc70, 0x10, 0, 1), -+ PIN_FIELD(91, 102, 0xb70, 0x10, 18, 1), - }; - - static const struct mtk_pin_field_calc mt7622_pin_tdsel_range[] = { -- {0, 31, 0x980, 0x4, 0, 4}, -- {32, 50, 0xa80, 0x4, 0, 4}, -- {51, 70, 0x880, 0x4, 0, 4}, -- {71, 72, 0xb80, 0x4, 0, 4}, -- {73, 86, 0xb80, 0x4, 16, 4}, -- {87, 90, 0xc80, 0x4, 0, 4}, -- {91, 102, 0xb88, 0x4, 8, 4}, -+ PIN_FIELD(0, 31, 0x980, 0x4, 0, 4), -+ PIN_FIELD(32, 50, 0xa80, 0x4, 0, 4), -+ PIN_FIELD(51, 70, 0x880, 0x4, 0, 4), -+ PIN_FIELD(71, 72, 0xb80, 0x4, 0, 4), -+ PIN_FIELD(73, 86, 0xb80, 0x4, 16, 4), -+ PIN_FIELD(87, 90, 0xc80, 0x4, 0, 4), -+ PIN_FIELD(91, 102, 0xb88, 0x4, 8, 4), - }; - - static const struct mtk_pin_field_calc mt7622_pin_rdsel_range[] = { -- {0, 31, 0x990, 0x4, 0, 6}, -- {32, 50, 0xa90, 0x4, 0, 6}, -- {51, 58, 0x890, 0x4, 0, 6}, -- {59, 60, 0x894, 0x4, 28, 6}, -- {61, 62, 0x894, 0x4, 16, 6}, -- {63, 66, 0x898, 0x4, 8, 6}, -- {67, 68, 0x89c, 0x4, 12, 6}, -- {69, 70, 0x89c, 0x4, 0, 6}, -- {71, 72, 0xb90, 0x4, 0, 6}, -- {73, 86, 0xb90, 0x4, 24, 6}, -- {87, 90, 0xc90, 0x4, 0, 6}, -- {91, 102, 0xb9c, 0x4, 12, 6}, -+ PIN_FIELD(0, 31, 0x990, 0x4, 0, 6), -+ PIN_FIELD(32, 50, 0xa90, 0x4, 0, 6), -+ PIN_FIELD(51, 58, 0x890, 0x4, 0, 6), -+ PIN_FIELD(59, 60, 0x894, 0x4, 28, 6), -+ PIN_FIELD(61, 62, 0x894, 0x4, 16, 6), -+ PIN_FIELD(63, 66, 0x898, 0x4, 8, 6), -+ PIN_FIELD(67, 68, 0x89c, 0x4, 12, 6), -+ PIN_FIELD(69, 70, 0x89c, 0x4, 0, 6), -+ PIN_FIELD(71, 72, 0xb90, 0x4, 0, 6), -+ PIN_FIELD(73, 86, 0xb90, 0x4, 24, 6), -+ PIN_FIELD(87, 90, 0xc90, 0x4, 0, 6), -+ PIN_FIELD(91, 102, 0xb9c, 0x4, 12, 6), - }; - - static const struct mtk_pin_reg_calc mt7622_reg_cals[PINCTRL_PIN_REG_MAX] = { -@@ -309,110 +152,110 @@ static const struct mtk_pin_reg_calc mt7 - [PINCTRL_PIN_REG_RDSEL] = MTK_RANGE(mt7622_pin_rdsel_range), - }; - --static const struct pinctrl_pin_desc mt7622_pins[] = { -- PINCTRL_PIN(0, "GPIO_A"), -- PINCTRL_PIN(1, "I2S1_IN"), -- PINCTRL_PIN(2, "I2S1_OUT"), -- PINCTRL_PIN(3, "I2S_BCLK"), -- PINCTRL_PIN(4, "I2S_WS"), -- PINCTRL_PIN(5, "I2S_MCLK"), -- PINCTRL_PIN(6, "TXD0"), -- PINCTRL_PIN(7, "RXD0"), -- PINCTRL_PIN(8, "SPI_WP"), -- PINCTRL_PIN(9, "SPI_HOLD"), -- PINCTRL_PIN(10, "SPI_CLK"), -- PINCTRL_PIN(11, "SPI_MOSI"), -- PINCTRL_PIN(12, "SPI_MISO"), -- PINCTRL_PIN(13, "SPI_CS"), -- PINCTRL_PIN(14, "I2C_SDA"), -- PINCTRL_PIN(15, "I2C_SCL"), -- PINCTRL_PIN(16, "I2S2_IN"), -- PINCTRL_PIN(17, "I2S3_IN"), -- PINCTRL_PIN(18, "I2S4_IN"), -- PINCTRL_PIN(19, "I2S2_OUT"), -- PINCTRL_PIN(20, "I2S3_OUT"), -- PINCTRL_PIN(21, "I2S4_OUT"), -- PINCTRL_PIN(22, "GPIO_B"), -- PINCTRL_PIN(23, "MDC"), -- PINCTRL_PIN(24, "MDIO"), -- PINCTRL_PIN(25, "G2_TXD0"), -- PINCTRL_PIN(26, "G2_TXD1"), -- PINCTRL_PIN(27, "G2_TXD2"), -- PINCTRL_PIN(28, "G2_TXD3"), -- PINCTRL_PIN(29, "G2_TXEN"), -- PINCTRL_PIN(30, "G2_TXC"), -- PINCTRL_PIN(31, "G2_RXD0"), -- PINCTRL_PIN(32, "G2_RXD1"), -- PINCTRL_PIN(33, "G2_RXD2"), -- PINCTRL_PIN(34, "G2_RXD3"), -- PINCTRL_PIN(35, "G2_RXDV"), -- PINCTRL_PIN(36, "G2_RXC"), -- PINCTRL_PIN(37, "NCEB"), -- PINCTRL_PIN(38, "NWEB"), -- PINCTRL_PIN(39, "NREB"), -- PINCTRL_PIN(40, "NDL4"), -- PINCTRL_PIN(41, "NDL5"), -- PINCTRL_PIN(42, "NDL6"), -- PINCTRL_PIN(43, "NDL7"), -- PINCTRL_PIN(44, "NRB"), -- PINCTRL_PIN(45, "NCLE"), -- PINCTRL_PIN(46, "NALE"), -- PINCTRL_PIN(47, "NDL0"), -- PINCTRL_PIN(48, "NDL1"), -- PINCTRL_PIN(49, "NDL2"), -- PINCTRL_PIN(50, "NDL3"), -- PINCTRL_PIN(51, "MDI_TP_P0"), -- PINCTRL_PIN(52, "MDI_TN_P0"), -- PINCTRL_PIN(53, "MDI_RP_P0"), -- PINCTRL_PIN(54, "MDI_RN_P0"), -- PINCTRL_PIN(55, "MDI_TP_P1"), -- PINCTRL_PIN(56, "MDI_TN_P1"), -- PINCTRL_PIN(57, "MDI_RP_P1"), -- PINCTRL_PIN(58, "MDI_RN_P1"), -- PINCTRL_PIN(59, "MDI_RP_P2"), -- PINCTRL_PIN(60, "MDI_RN_P2"), -- PINCTRL_PIN(61, "MDI_TP_P2"), -- PINCTRL_PIN(62, "MDI_TN_P2"), -- PINCTRL_PIN(63, "MDI_TP_P3"), -- PINCTRL_PIN(64, "MDI_TN_P3"), -- PINCTRL_PIN(65, "MDI_RP_P3"), -- PINCTRL_PIN(66, "MDI_RN_P3"), -- PINCTRL_PIN(67, "MDI_RP_P4"), -- PINCTRL_PIN(68, "MDI_RN_P4"), -- PINCTRL_PIN(69, "MDI_TP_P4"), -- PINCTRL_PIN(70, "MDI_TN_P4"), -- PINCTRL_PIN(71, "PMIC_SCL"), -- PINCTRL_PIN(72, "PMIC_SDA"), -- PINCTRL_PIN(73, "SPIC1_CLK"), -- PINCTRL_PIN(74, "SPIC1_MOSI"), -- PINCTRL_PIN(75, "SPIC1_MISO"), -- PINCTRL_PIN(76, "SPIC1_CS"), -- PINCTRL_PIN(77, "GPIO_D"), -- PINCTRL_PIN(78, "WATCHDOG"), -- PINCTRL_PIN(79, "RTS3_N"), -- PINCTRL_PIN(80, "CTS3_N"), -- PINCTRL_PIN(81, "TXD3"), -- PINCTRL_PIN(82, "RXD3"), -- PINCTRL_PIN(83, "PERST0_N"), -- PINCTRL_PIN(84, "PERST1_N"), -- PINCTRL_PIN(85, "WLED_N"), -- PINCTRL_PIN(86, "EPHY_LED0_N"), -- PINCTRL_PIN(87, "AUXIN0"), -- PINCTRL_PIN(88, "AUXIN1"), -- PINCTRL_PIN(89, "AUXIN2"), -- PINCTRL_PIN(90, "AUXIN3"), -- PINCTRL_PIN(91, "TXD4"), -- PINCTRL_PIN(92, "RXD4"), -- PINCTRL_PIN(93, "RTS4_N"), -- PINCTRL_PIN(94, "CTS4_N"), -- PINCTRL_PIN(95, "PWM1"), -- PINCTRL_PIN(96, "PWM2"), -- PINCTRL_PIN(97, "PWM3"), -- PINCTRL_PIN(98, "PWM4"), -- PINCTRL_PIN(99, "PWM5"), -- PINCTRL_PIN(100, "PWM6"), -- PINCTRL_PIN(101, "PWM7"), -- PINCTRL_PIN(102, "GPIO_E"), -+static const struct mtk_pin_desc mt7622_pins[] = { -+ MT7622_PIN(0, "GPIO_A"), -+ MT7622_PIN(1, "I2S1_IN"), -+ MT7622_PIN(2, "I2S1_OUT"), -+ MT7622_PIN(3, "I2S_BCLK"), -+ MT7622_PIN(4, "I2S_WS"), -+ MT7622_PIN(5, "I2S_MCLK"), -+ MT7622_PIN(6, "TXD0"), -+ MT7622_PIN(7, "RXD0"), -+ MT7622_PIN(8, "SPI_WP"), -+ MT7622_PIN(9, "SPI_HOLD"), -+ MT7622_PIN(10, "SPI_CLK"), -+ MT7622_PIN(11, "SPI_MOSI"), -+ MT7622_PIN(12, "SPI_MISO"), -+ MT7622_PIN(13, "SPI_CS"), -+ MT7622_PIN(14, "I2C_SDA"), -+ MT7622_PIN(15, "I2C_SCL"), -+ MT7622_PIN(16, "I2S2_IN"), -+ MT7622_PIN(17, "I2S3_IN"), -+ MT7622_PIN(18, "I2S4_IN"), -+ MT7622_PIN(19, "I2S2_OUT"), -+ MT7622_PIN(20, "I2S3_OUT"), -+ MT7622_PIN(21, "I2S4_OUT"), -+ MT7622_PIN(22, "GPIO_B"), -+ MT7622_PIN(23, "MDC"), -+ MT7622_PIN(24, "MDIO"), -+ MT7622_PIN(25, "G2_TXD0"), -+ MT7622_PIN(26, "G2_TXD1"), -+ MT7622_PIN(27, "G2_TXD2"), -+ MT7622_PIN(28, "G2_TXD3"), -+ MT7622_PIN(29, "G2_TXEN"), -+ MT7622_PIN(30, "G2_TXC"), -+ MT7622_PIN(31, "G2_RXD0"), -+ MT7622_PIN(32, "G2_RXD1"), -+ MT7622_PIN(33, "G2_RXD2"), -+ MT7622_PIN(34, "G2_RXD3"), -+ MT7622_PIN(35, "G2_RXDV"), -+ MT7622_PIN(36, "G2_RXC"), -+ MT7622_PIN(37, "NCEB"), -+ MT7622_PIN(38, "NWEB"), -+ MT7622_PIN(39, "NREB"), -+ MT7622_PIN(40, "NDL4"), -+ MT7622_PIN(41, "NDL5"), -+ MT7622_PIN(42, "NDL6"), -+ MT7622_PIN(43, "NDL7"), -+ MT7622_PIN(44, "NRB"), -+ MT7622_PIN(45, "NCLE"), -+ MT7622_PIN(46, "NALE"), -+ MT7622_PIN(47, "NDL0"), -+ MT7622_PIN(48, "NDL1"), -+ MT7622_PIN(49, "NDL2"), -+ MT7622_PIN(50, "NDL3"), -+ MT7622_PIN(51, "MDI_TP_P0"), -+ MT7622_PIN(52, "MDI_TN_P0"), -+ MT7622_PIN(53, "MDI_RP_P0"), -+ MT7622_PIN(54, "MDI_RN_P0"), -+ MT7622_PIN(55, "MDI_TP_P1"), -+ MT7622_PIN(56, "MDI_TN_P1"), -+ MT7622_PIN(57, "MDI_RP_P1"), -+ MT7622_PIN(58, "MDI_RN_P1"), -+ MT7622_PIN(59, "MDI_RP_P2"), -+ MT7622_PIN(60, "MDI_RN_P2"), -+ MT7622_PIN(61, "MDI_TP_P2"), -+ MT7622_PIN(62, "MDI_TN_P2"), -+ MT7622_PIN(63, "MDI_TP_P3"), -+ MT7622_PIN(64, "MDI_TN_P3"), -+ MT7622_PIN(65, "MDI_RP_P3"), -+ MT7622_PIN(66, "MDI_RN_P3"), -+ MT7622_PIN(67, "MDI_RP_P4"), -+ MT7622_PIN(68, "MDI_RN_P4"), -+ MT7622_PIN(69, "MDI_TP_P4"), -+ MT7622_PIN(70, "MDI_TN_P4"), -+ MT7622_PIN(71, "PMIC_SCL"), -+ MT7622_PIN(72, "PMIC_SDA"), -+ MT7622_PIN(73, "SPIC1_CLK"), -+ MT7622_PIN(74, "SPIC1_MOSI"), -+ MT7622_PIN(75, "SPIC1_MISO"), -+ MT7622_PIN(76, "SPIC1_CS"), -+ MT7622_PIN(77, "GPIO_D"), -+ MT7622_PIN(78, "WATCHDOG"), -+ MT7622_PIN(79, "RTS3_N"), -+ MT7622_PIN(80, "CTS3_N"), -+ MT7622_PIN(81, "TXD3"), -+ MT7622_PIN(82, "RXD3"), -+ MT7622_PIN(83, "PERST0_N"), -+ MT7622_PIN(84, "PERST1_N"), -+ MT7622_PIN(85, "WLED_N"), -+ MT7622_PIN(86, "EPHY_LED0_N"), -+ MT7622_PIN(87, "AUXIN0"), -+ MT7622_PIN(88, "AUXIN1"), -+ MT7622_PIN(89, "AUXIN2"), -+ MT7622_PIN(90, "AUXIN3"), -+ MT7622_PIN(91, "TXD4"), -+ MT7622_PIN(92, "RXD4"), -+ MT7622_PIN(93, "RTS4_N"), -+ MT7622_PIN(94, "CTS4_N"), -+ MT7622_PIN(95, "PWM1"), -+ MT7622_PIN(96, "PWM2"), -+ MT7622_PIN(97, "PWM3"), -+ MT7622_PIN(98, "PWM4"), -+ MT7622_PIN(99, "PWM5"), -+ MT7622_PIN(100, "PWM6"), -+ MT7622_PIN(101, "PWM7"), -+ MT7622_PIN(102, "GPIO_E"), - }; - - /* List all groups consisting of these pins dedicated to the enablement of -@@ -906,18 +749,6 @@ static const struct function_desc mt7622 - {"watchdog", mt7622_wdt_groups, ARRAY_SIZE(mt7622_wdt_groups)}, - }; - --static const struct pinconf_generic_params mtk_custom_bindings[] = { -- {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, -- {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, --}; -- --#ifdef CONFIG_DEBUG_FS --static const struct pin_config_item mtk_conf_items[] = { -- PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), -- PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), --}; --#endif -- - static const struct mtk_eint_hw mt7622_eint_hw = { - .port_mask = 7, - .ports = 7, -@@ -934,830 +765,38 @@ static const struct mtk_pin_soc mt7622_d - .funcs = mt7622_functions, - .nfuncs = ARRAY_SIZE(mt7622_functions), - .eint_hw = &mt7622_eint_hw, -+ .gpio_m = 1, -+ .ies_present = false, -+ .base_names = mtk_default_register_base_names, -+ .nbase_names = ARRAY_SIZE(mtk_default_register_base_names), -+ .bias_disable_set = mtk_pinconf_bias_disable_set, -+ .bias_disable_get = mtk_pinconf_bias_disable_get, -+ .bias_set = mtk_pinconf_bias_set, -+ .bias_get = mtk_pinconf_bias_get, -+ .drive_set = mtk_pinconf_drive_set, -+ .drive_get = mtk_pinconf_drive_get, - }; - --static void mtk_w32(struct mtk_pinctrl *pctl, u32 reg, u32 val) --{ -- writel_relaxed(val, pctl->base + reg); --} -- --static u32 mtk_r32(struct mtk_pinctrl *pctl, u32 reg) --{ -- return readl_relaxed(pctl->base + reg); --} -- --static void mtk_rmw(struct mtk_pinctrl *pctl, u32 reg, u32 mask, u32 set) --{ -- u32 val; -- -- val = mtk_r32(pctl, reg); -- val &= ~mask; -- val |= set; -- mtk_w32(pctl, reg, val); --} -- --static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw, int pin, -- const struct mtk_pin_reg_calc *rc, -- struct mtk_pin_field *pfd) --{ -- const struct mtk_pin_field_calc *c, *e; -- u32 bits; -- -- c = rc->range; -- e = c + rc->nranges; -- -- while (c < e) { -- if (pin >= c->s_pin && pin <= c->e_pin) -- break; -- c++; -- } -- -- if (c >= e) { -- dev_err(hw->dev, "Out of range for pin = %d\n", pin); -- return -EINVAL; -- } -- -- /* Caculated bits as the overall offset the pin is located at */ -- bits = c->s_bit + (pin - c->s_pin) * (c->x_bits); -- -- /* Fill pfd from bits and 32-bit register applied is assumed */ -- pfd->offset = c->s_addr + c->x_addrs * (bits / 32); -- pfd->bitpos = bits % 32; -- pfd->mask = (1 << c->x_bits) - 1; -- -- /* pfd->next is used for indicating that bit wrapping-around happens -- * which requires the manipulation for bit 0 starting in the next -- * register to form the complete field read/write. -- */ -- pfd->next = pfd->bitpos + c->x_bits - 1 > 31 ? c->x_addrs : 0; -- -- return 0; --} -- --static int mtk_hw_pin_field_get(struct mtk_pinctrl *hw, int pin, -- int field, struct mtk_pin_field *pfd) --{ -- const struct mtk_pin_reg_calc *rc; -- -- if (field < 0 || field >= PINCTRL_PIN_REG_MAX) { -- dev_err(hw->dev, "Invalid Field %d\n", field); -- return -EINVAL; -- } -- -- if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { -- rc = &hw->soc->reg_cal[field]; -- } else { -- dev_err(hw->dev, "Undefined range for field %d\n", field); -- return -EINVAL; -- } -- -- return mtk_hw_pin_field_lookup(hw, pin, rc, pfd); --} -- --static void mtk_hw_bits_part(struct mtk_pin_field *pf, int *h, int *l) --{ -- *l = 32 - pf->bitpos; -- *h = get_count_order(pf->mask) - *l; --} -- --static void mtk_hw_write_cross_field(struct mtk_pinctrl *hw, -- struct mtk_pin_field *pf, int value) --{ -- int nbits_l, nbits_h; -- -- mtk_hw_bits_part(pf, &nbits_h, &nbits_l); -- -- mtk_rmw(hw, pf->offset, pf->mask << pf->bitpos, -- (value & pf->mask) << pf->bitpos); -- -- mtk_rmw(hw, pf->offset + pf->next, BIT(nbits_h) - 1, -- (value & pf->mask) >> nbits_l); --} -- --static void mtk_hw_read_cross_field(struct mtk_pinctrl *hw, -- struct mtk_pin_field *pf, int *value) --{ -- int nbits_l, nbits_h, h, l; -- -- mtk_hw_bits_part(pf, &nbits_h, &nbits_l); -- -- l = (mtk_r32(hw, pf->offset) >> pf->bitpos) & (BIT(nbits_l) - 1); -- h = (mtk_r32(hw, pf->offset + pf->next)) & (BIT(nbits_h) - 1); -- -- *value = (h << nbits_l) | l; --} -- --static int mtk_hw_set_value(struct mtk_pinctrl *hw, int pin, int field, -- int value) --{ -- struct mtk_pin_field pf; -- int err; -- -- err = mtk_hw_pin_field_get(hw, pin, field, &pf); -- if (err) -- return err; -- -- if (!pf.next) -- mtk_rmw(hw, pf.offset, pf.mask << pf.bitpos, -- (value & pf.mask) << pf.bitpos); -- else -- mtk_hw_write_cross_field(hw, &pf, value); -- -- return 0; --} -- --static int mtk_hw_get_value(struct mtk_pinctrl *hw, int pin, int field, -- int *value) --{ -- struct mtk_pin_field pf; -- int err; -- -- err = mtk_hw_pin_field_get(hw, pin, field, &pf); -- if (err) -- return err; -- -- if (!pf.next) -- *value = (mtk_r32(hw, pf.offset) >> pf.bitpos) & pf.mask; -- else -- mtk_hw_read_cross_field(hw, &pf, value); -- -- return 0; --} -- --static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, -- unsigned int selector, unsigned int group) --{ -- struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -- struct function_desc *func; -- struct group_desc *grp; -- int i; -- -- func = pinmux_generic_get_function(pctldev, selector); -- if (!func) -- return -EINVAL; -- -- grp = pinctrl_generic_get_group(pctldev, group); -- if (!grp) -- return -EINVAL; -- -- dev_dbg(pctldev->dev, "enable function %s group %s\n", -- func->name, grp->name); -- -- for (i = 0; i < grp->num_pins; i++) { -- int *pin_modes = grp->data; -- -- mtk_hw_set_value(hw, grp->pins[i], PINCTRL_PIN_REG_MODE, -- pin_modes[i]); -- } -- -- return 0; --} -- --static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, -- struct pinctrl_gpio_range *range, -- unsigned int pin) --{ -- struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -- -- return mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_MODE, MTK_GPIO_MODE); --} -- --static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, -- struct pinctrl_gpio_range *range, -- unsigned int pin, bool input) --{ -- struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -- -- /* hardware would take 0 as input direction */ -- return mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_DIR, !input); --} -- --static int mtk_pinconf_get(struct pinctrl_dev *pctldev, -- unsigned int pin, unsigned long *config) --{ -- struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -- u32 param = pinconf_to_config_param(*config); -- int val, val2, err, reg, ret = 1; -- -- switch (param) { -- case PIN_CONFIG_BIAS_DISABLE: -- err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_PU, &val); -- if (err) -- return err; -- -- err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_PD, &val2); -- if (err) -- return err; -- -- if (val || val2) -- return -EINVAL; -- -- break; -- case PIN_CONFIG_BIAS_PULL_UP: -- case PIN_CONFIG_BIAS_PULL_DOWN: -- case PIN_CONFIG_SLEW_RATE: -- reg = (param == PIN_CONFIG_BIAS_PULL_UP) ? -- PINCTRL_PIN_REG_PU : -- (param == PIN_CONFIG_BIAS_PULL_DOWN) ? -- PINCTRL_PIN_REG_PD : PINCTRL_PIN_REG_SR; -- -- err = mtk_hw_get_value(hw, pin, reg, &val); -- if (err) -- return err; -- -- if (!val) -- return -EINVAL; -- -- break; -- case PIN_CONFIG_INPUT_ENABLE: -- case PIN_CONFIG_OUTPUT_ENABLE: -- err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_DIR, &val); -- if (err) -- return err; -- -- /* HW takes input mode as zero; output mode as non-zero */ -- if ((val && param == PIN_CONFIG_INPUT_ENABLE) || -- (!val && param == PIN_CONFIG_OUTPUT_ENABLE)) -- return -EINVAL; -- -- break; -- case PIN_CONFIG_INPUT_SCHMITT_ENABLE: -- err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_DIR, &val); -- if (err) -- return err; -- -- err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_SMT, &val2); -- if (err) -- return err; -- -- if (val || !val2) -- return -EINVAL; -- -- break; -- case PIN_CONFIG_DRIVE_STRENGTH: -- err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_E4, &val); -- if (err) -- return err; -- -- err = mtk_hw_get_value(hw, pin, PINCTRL_PIN_REG_E8, &val2); -- if (err) -- return err; -- -- /* 4mA when (e8, e4) = (0, 0); 8mA when (e8, e4) = (0, 1) -- * 12mA when (e8, e4) = (1, 0); 16mA when (e8, e4) = (1, 1) -- */ -- ret = ((val2 << 1) + val + 1) * 4; -- -- break; -- case MTK_PIN_CONFIG_TDSEL: -- case MTK_PIN_CONFIG_RDSEL: -- reg = (param == MTK_PIN_CONFIG_TDSEL) ? -- PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; -- -- err = mtk_hw_get_value(hw, pin, reg, &val); -- if (err) -- return err; -- -- ret = val; -- -- break; -- default: -- return -ENOTSUPP; -- } -- -- *config = pinconf_to_config_packed(param, ret); -- -- return 0; --} -- --static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, -- unsigned long *configs, unsigned int num_configs) --{ -- struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -- u32 reg, param, arg; -- int cfg, err = 0; -- -- for (cfg = 0; cfg < num_configs; cfg++) { -- param = pinconf_to_config_param(configs[cfg]); -- arg = pinconf_to_config_argument(configs[cfg]); -- -- switch (param) { -- case PIN_CONFIG_BIAS_DISABLE: -- case PIN_CONFIG_BIAS_PULL_UP: -- case PIN_CONFIG_BIAS_PULL_DOWN: -- arg = (param == PIN_CONFIG_BIAS_DISABLE) ? 0 : -- (param == PIN_CONFIG_BIAS_PULL_UP) ? 1 : 2; -- -- err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_PU, -- arg & 1); -- if (err) -- goto err; -- -- err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_PD, -- !!(arg & 2)); -- if (err) -- goto err; -- break; -- case PIN_CONFIG_OUTPUT_ENABLE: -- err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_SMT, -- MTK_DISABLE); -- if (err) -- goto err; -- /* else: fall through */ -- case PIN_CONFIG_INPUT_ENABLE: -- case PIN_CONFIG_SLEW_RATE: -- reg = (param == PIN_CONFIG_SLEW_RATE) ? -- PINCTRL_PIN_REG_SR : PINCTRL_PIN_REG_DIR; -- -- arg = (param == PIN_CONFIG_INPUT_ENABLE) ? 0 : -- (param == PIN_CONFIG_OUTPUT_ENABLE) ? 1 : arg; -- err = mtk_hw_set_value(hw, pin, reg, arg); -- if (err) -- goto err; -- -- break; -- case PIN_CONFIG_OUTPUT: -- err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_DIR, -- MTK_OUTPUT); -- if (err) -- goto err; -- -- err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_DO, -- arg); -- if (err) -- goto err; -- break; -- case PIN_CONFIG_INPUT_SCHMITT_ENABLE: -- /* arg = 1: Input mode & SMT enable ; -- * arg = 0: Output mode & SMT disable -- */ -- arg = arg ? 2 : 1; -- err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_DIR, -- arg & 1); -- if (err) -- goto err; -- -- err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_SMT, -- !!(arg & 2)); -- if (err) -- goto err; -- break; -- case PIN_CONFIG_DRIVE_STRENGTH: -- /* 4mA when (e8, e4) = (0, 0); -- * 8mA when (e8, e4) = (0, 1); -- * 12mA when (e8, e4) = (1, 0); -- * 16mA when (e8, e4) = (1, 1) -- */ -- if (!(arg % 4) && (arg >= 4 && arg <= 16)) { -- arg = arg / 4 - 1; -- err = mtk_hw_set_value(hw, pin, -- PINCTRL_PIN_REG_E4, -- arg & 0x1); -- if (err) -- goto err; -- -- err = mtk_hw_set_value(hw, pin, -- PINCTRL_PIN_REG_E8, -- (arg & 0x2) >> 1); -- if (err) -- goto err; -- } else { -- err = -ENOTSUPP; -- } -- break; -- case MTK_PIN_CONFIG_TDSEL: -- case MTK_PIN_CONFIG_RDSEL: -- reg = (param == MTK_PIN_CONFIG_TDSEL) ? -- PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; -- -- err = mtk_hw_set_value(hw, pin, reg, arg); -- if (err) -- goto err; -- break; -- default: -- err = -ENOTSUPP; -- } -- } --err: -- return err; --} -- --static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev, -- unsigned int group, unsigned long *config) --{ -- const unsigned int *pins; -- unsigned int i, npins, old = 0; -- int ret; -- -- ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); -- if (ret) -- return ret; -- -- for (i = 0; i < npins; i++) { -- if (mtk_pinconf_get(pctldev, pins[i], config)) -- return -ENOTSUPP; -- -- /* configs do not match between two pins */ -- if (i && old != *config) -- return -ENOTSUPP; -- -- old = *config; -- } -- -- return 0; --} -- --static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev, -- unsigned int group, unsigned long *configs, -- unsigned int num_configs) --{ -- const unsigned int *pins; -- unsigned int i, npins; -- int ret; -- -- ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); -- if (ret) -- return ret; -- -- for (i = 0; i < npins; i++) { -- ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs); -- if (ret) -- return ret; -- } -- -- return 0; --} -- --static const struct pinctrl_ops mtk_pctlops = { -- .get_groups_count = pinctrl_generic_get_group_count, -- .get_group_name = pinctrl_generic_get_group_name, -- .get_group_pins = pinctrl_generic_get_group_pins, -- .dt_node_to_map = pinconf_generic_dt_node_to_map_all, -- .dt_free_map = pinconf_generic_dt_free_map, --}; -- --static const struct pinmux_ops mtk_pmxops = { -- .get_functions_count = pinmux_generic_get_function_count, -- .get_function_name = pinmux_generic_get_function_name, -- .get_function_groups = pinmux_generic_get_function_groups, -- .set_mux = mtk_pinmux_set_mux, -- .gpio_request_enable = mtk_pinmux_gpio_request_enable, -- .gpio_set_direction = mtk_pinmux_gpio_set_direction, -- .strict = true, --}; -- --static const struct pinconf_ops mtk_confops = { -- .is_generic = true, -- .pin_config_get = mtk_pinconf_get, -- .pin_config_set = mtk_pinconf_set, -- .pin_config_group_get = mtk_pinconf_group_get, -- .pin_config_group_set = mtk_pinconf_group_set, -- .pin_config_config_dbg_show = pinconf_generic_dump_config, --}; -- --static struct pinctrl_desc mtk_desc = { -- .name = PINCTRL_PINCTRL_DEV, -- .pctlops = &mtk_pctlops, -- .pmxops = &mtk_pmxops, -- .confops = &mtk_confops, -- .owner = THIS_MODULE, --}; -- --static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) --{ -- struct mtk_pinctrl *hw = gpiochip_get_data(chip); -- int value, err; -- -- err = mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value); -- if (err) -- return err; -- -- return !!value; --} -- --static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) --{ -- struct mtk_pinctrl *hw = gpiochip_get_data(chip); -- -- mtk_hw_set_value(hw, gpio, PINCTRL_PIN_REG_DO, !!value); --} -- --static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) --{ -- return pinctrl_gpio_direction_input(chip->base + gpio); --} -- --static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, -- int value) --{ -- mtk_gpio_set(chip, gpio, value); -- -- return pinctrl_gpio_direction_output(chip->base + gpio); --} -- --static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) --{ -- struct mtk_pinctrl *hw = gpiochip_get_data(chip); -- unsigned long eint_n; -- -- if (!hw->eint) -- return -ENOTSUPP; -- -- eint_n = offset; -- -- return mtk_eint_find_irq(hw->eint, eint_n); --} -- --static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, -- unsigned long config) --{ -- struct mtk_pinctrl *hw = gpiochip_get_data(chip); -- unsigned long eint_n; -- u32 debounce; -- -- if (!hw->eint || -- pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) -- return -ENOTSUPP; -- -- debounce = pinconf_to_config_argument(config); -- eint_n = offset; -- -- return mtk_eint_set_debounce(hw->eint, eint_n, debounce); --} -- --static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) --{ -- struct gpio_chip *chip = &hw->chip; -- int ret; -- -- chip->label = PINCTRL_PINCTRL_DEV; -- chip->parent = hw->dev; -- chip->request = gpiochip_generic_request; -- chip->free = gpiochip_generic_free; -- chip->direction_input = mtk_gpio_direction_input; -- chip->direction_output = mtk_gpio_direction_output; -- chip->get = mtk_gpio_get; -- chip->set = mtk_gpio_set; -- chip->to_irq = mtk_gpio_to_irq, -- chip->set_config = mtk_gpio_set_config, -- chip->base = -1; -- chip->ngpio = hw->soc->npins; -- chip->of_node = np; -- chip->of_gpio_n_cells = 2; -- -- ret = gpiochip_add_data(chip, hw); -- if (ret < 0) -- return ret; -- -- /* Just for backward compatible for these old pinctrl nodes without -- * "gpio-ranges" property. Otherwise, called directly from a -- * DeviceTree-supported pinctrl driver is DEPRECATED. -- * Please see Section 2.1 of -- * Documentation/devicetree/bindings/gpio/gpio.txt on how to -- * bind pinctrl and gpio drivers via the "gpio-ranges" property. -- */ -- if (!of_find_property(np, "gpio-ranges", NULL)) { -- ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, -- chip->ngpio); -- if (ret < 0) { -- gpiochip_remove(chip); -- return ret; -- } -- } -- -- return 0; --} -- --static int mtk_build_groups(struct mtk_pinctrl *hw) --{ -- int err, i; -- -- for (i = 0; i < hw->soc->ngrps; i++) { -- const struct group_desc *group = hw->soc->grps + i; -- -- err = pinctrl_generic_add_group(hw->pctrl, group->name, -- group->pins, group->num_pins, -- group->data); -- if (err < 0) { -- dev_err(hw->dev, "Failed to register group %s\n", -- group->name); -- return err; -- } -- } -- -- return 0; --} -- --static int mtk_build_functions(struct mtk_pinctrl *hw) --{ -- int i, err; -- -- for (i = 0; i < hw->soc->nfuncs ; i++) { -- const struct function_desc *func = hw->soc->funcs + i; -- -- err = pinmux_generic_add_function(hw->pctrl, func->name, -- func->group_names, -- func->num_group_names, -- func->data); -- if (err < 0) { -- dev_err(hw->dev, "Failed to register function %s\n", -- func->name); -- return err; -- } -- } -- -- return 0; --} -- --static int mtk_xt_get_gpio_n(void *data, unsigned long eint_n, -- unsigned int *gpio_n, -- struct gpio_chip **gpio_chip) --{ -- struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; -- -- *gpio_chip = &hw->chip; -- *gpio_n = eint_n; -- -- return 0; --} -- --static int mtk_xt_get_gpio_state(void *data, unsigned long eint_n) --{ -- struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; -- struct gpio_chip *gpio_chip; -- unsigned int gpio_n; -- int err; -- -- err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); -- if (err) -- return err; -- -- return mtk_gpio_get(gpio_chip, gpio_n); --} -- --static int mtk_xt_set_gpio_as_eint(void *data, unsigned long eint_n) --{ -- struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; -- struct gpio_chip *gpio_chip; -- unsigned int gpio_n; -- int err; -- -- err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); -- if (err) -- return err; -- -- err = mtk_hw_set_value(hw, gpio_n, PINCTRL_PIN_REG_MODE, -- MTK_GPIO_MODE); -- if (err) -- return err; -- -- err = mtk_hw_set_value(hw, gpio_n, PINCTRL_PIN_REG_DIR, MTK_INPUT); -- if (err) -- return err; -- -- err = mtk_hw_set_value(hw, gpio_n, PINCTRL_PIN_REG_SMT, MTK_ENABLE); -- if (err) -- return err; -- -- return 0; --} -- --static const struct mtk_eint_xt mtk_eint_xt = { -- .get_gpio_n = mtk_xt_get_gpio_n, -- .get_gpio_state = mtk_xt_get_gpio_state, -- .set_gpio_as_eint = mtk_xt_set_gpio_as_eint, --}; -- --static int --mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) --{ -- struct device_node *np = pdev->dev.of_node; -- struct resource *res; -- -- if (!IS_ENABLED(CONFIG_EINT_MTK)) -- return 0; -- -- if (!of_property_read_bool(np, "interrupt-controller")) -- return -ENODEV; -- -- hw->eint = devm_kzalloc(hw->dev, sizeof(*hw->eint), GFP_KERNEL); -- if (!hw->eint) -- return -ENOMEM; -- -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eint"); -- if (!res) { -- dev_err(&pdev->dev, "Unable to get eint resource\n"); -- return -ENODEV; -- } -- -- hw->eint->base = devm_ioremap_resource(&pdev->dev, res); -- if (IS_ERR(hw->eint->base)) -- return PTR_ERR(hw->eint->base); -- -- hw->eint->irq = irq_of_parse_and_map(np, 0); -- if (!hw->eint->irq) -- return -EINVAL; -- -- hw->eint->dev = &pdev->dev; -- hw->eint->hw = hw->soc->eint_hw; -- hw->eint->pctl = hw; -- hw->eint->gpio_xlate = &mtk_eint_xt; -- -- return mtk_eint_do_init(hw->eint); --} -- --static const struct of_device_id mtk_pinctrl_of_match[] = { -- { .compatible = "mediatek,mt7622-pinctrl", .data = &mt7622_data}, -+static const struct of_device_id mt7622_pinctrl_of_match[] = { -+ { .compatible = "mediatek,mt7622-pinctrl", }, - { } - }; - --static int mtk_pinctrl_probe(struct platform_device *pdev) -+static int mt7622_pinctrl_probe(struct platform_device *pdev) - { -- struct resource *res; -- struct mtk_pinctrl *hw; -- const struct of_device_id *of_id = -- of_match_device(mtk_pinctrl_of_match, &pdev->dev); -- int err; -- -- hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); -- if (!hw) -- return -ENOMEM; -- -- hw->soc = of_id->data; -- -- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -- if (!res) { -- dev_err(&pdev->dev, "missing IO resource\n"); -- return -ENXIO; -- } -- -- hw->dev = &pdev->dev; -- hw->base = devm_ioremap_resource(&pdev->dev, res); -- if (IS_ERR(hw->base)) -- return PTR_ERR(hw->base); -- -- /* Setup pins descriptions per SoC types */ -- mtk_desc.pins = hw->soc->pins; -- mtk_desc.npins = hw->soc->npins; -- mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); -- mtk_desc.custom_params = mtk_custom_bindings; --#ifdef CONFIG_DEBUG_FS -- mtk_desc.custom_conf_items = mtk_conf_items; --#endif -- -- err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, -- &hw->pctrl); -- if (err) -- return err; -- -- /* Setup groups descriptions per SoC types */ -- err = mtk_build_groups(hw); -- if (err) { -- dev_err(&pdev->dev, "Failed to build groups\n"); -- return err; -- } -- -- /* Setup functions descriptions per SoC types */ -- err = mtk_build_functions(hw); -- if (err) { -- dev_err(&pdev->dev, "Failed to build functions\n"); -- return err; -- } -- -- /* For able to make pinctrl_claim_hogs, we must not enable pinctrl -- * until all groups and functions are being added one. -- */ -- err = pinctrl_enable(hw->pctrl); -- if (err) -- return err; -- -- err = mtk_build_eint(hw, pdev); -- if (err) -- dev_warn(&pdev->dev, -- "Failed to add EINT, but pinctrl still can work\n"); -- -- /* Build gpiochip should be after pinctrl_enable is done */ -- err = mtk_build_gpiochip(hw, pdev->dev.of_node); -- if (err) { -- dev_err(&pdev->dev, "Failed to add gpio_chip\n"); -- return err; -- } -- -- platform_set_drvdata(pdev, hw); -- -- return 0; -+ return mtk_moore_pinctrl_probe(pdev, &mt7622_data); - } - --static struct platform_driver mtk_pinctrl_driver = { -+static struct platform_driver mt7622_pinctrl_driver = { - .driver = { -- .name = "mtk-pinctrl", -- .of_match_table = mtk_pinctrl_of_match, -+ .name = "mt7622-pinctrl", -+ .of_match_table = mt7622_pinctrl_of_match, - }, -- .probe = mtk_pinctrl_probe, -+ .probe = mt7622_pinctrl_probe, - }; - --static int __init mtk_pinctrl_init(void) -+static int __init mt7622_pinctrl_init(void) - { -- return platform_driver_register(&mtk_pinctrl_driver); -+ return platform_driver_register(&mt7622_pinctrl_driver); - } --arch_initcall(mtk_pinctrl_init); -+arch_initcall(mt7622_pinctrl_init); ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c -@@ -0,0 +1,1441 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * The MT7623 driver based on Linux generic pinctrl binding. -+ * -+ * Copyright (C) 2015 - 2018 MediaTek Inc. -+ * Author: Biao Huang -+ * Ryder Lee -+ * Sean Wang -+ */ -+ -+#include "pinctrl-moore.h" -+ -+#define PIN_BOND_REG0 0xb10 -+#define PIN_BOND_REG1 0xf20 -+#define PIN_BOND_REG2 0xef0 -+#define BOND_PCIE_CLR (0x77 << 3) -+#define BOND_I2S_CLR 0x3 -+#define BOND_MSDC0E_CLR 0x1 -+ -+#define PIN_FIELD15(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 15, false) -+ -+#define PIN_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 16, 0) -+ -+#define PINS_FIELD16(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 16, 1) -+ -+#define MT7623_PIN(_number, _name, _eint_n, _drv_grp) \ -+ MTK_PIN(_number, _name, 0, _eint_n, _drv_grp) -+ -+static const struct mtk_pin_field_calc mt7623_pin_mode_range[] = { -+ PIN_FIELD15(0, 278, 0x760, 0x10, 0, 3), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_dir_range[] = { -+ PIN_FIELD16(0, 175, 0x0, 0x10, 0, 1), -+ PIN_FIELD16(176, 278, 0xc0, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_di_range[] = { -+ PIN_FIELD16(0, 278, 0x630, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_do_range[] = { -+ PIN_FIELD16(0, 278, 0x500, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_ies_range[] = { -+ PINS_FIELD16(0, 6, 0xb20, 0x10, 0, 1), -+ PINS_FIELD16(7, 9, 0xb20, 0x10, 1, 1), -+ PINS_FIELD16(10, 13, 0xb30, 0x10, 3, 1), -+ PINS_FIELD16(14, 15, 0xb30, 0x10, 13, 1), -+ PINS_FIELD16(16, 17, 0xb40, 0x10, 7, 1), -+ PINS_FIELD16(18, 29, 0xb40, 0x10, 13, 1), -+ PINS_FIELD16(30, 32, 0xb40, 0x10, 7, 1), -+ PINS_FIELD16(33, 37, 0xb40, 0x10, 13, 1), -+ PIN_FIELD16(38, 38, 0xb20, 0x10, 13, 1), -+ PINS_FIELD16(39, 42, 0xb40, 0x10, 13, 1), -+ PINS_FIELD16(43, 45, 0xb20, 0x10, 10, 1), -+ PINS_FIELD16(47, 48, 0xb20, 0x10, 11, 1), -+ PIN_FIELD16(49, 49, 0xb20, 0x10, 12, 1), -+ PINS_FIELD16(50, 52, 0xb20, 0x10, 13, 1), -+ PINS_FIELD16(53, 56, 0xb20, 0x10, 14, 1), -+ PINS_FIELD16(57, 58, 0xb20, 0x10, 15, 1), -+ PIN_FIELD16(59, 59, 0xb30, 0x10, 10, 1), -+ PINS_FIELD16(60, 62, 0xb30, 0x10, 0, 1), -+ PINS_FIELD16(63, 65, 0xb30, 0x10, 1, 1), -+ PINS_FIELD16(66, 71, 0xb30, 0x10, 2, 1), -+ PINS_FIELD16(72, 74, 0xb20, 0x10, 12, 1), -+ PINS_FIELD16(75, 76, 0xb30, 0x10, 3, 1), -+ PINS_FIELD16(77, 78, 0xb30, 0x10, 4, 1), -+ PINS_FIELD16(79, 82, 0xb30, 0x10, 5, 1), -+ PINS_FIELD16(83, 84, 0xb30, 0x10, 2, 1), -+ PIN_FIELD16(85, 85, 0xda0, 0x10, 4, 1), -+ PIN_FIELD16(86, 86, 0xd90, 0x10, 4, 1), -+ PINS_FIELD16(87, 90, 0xdb0, 0x10, 4, 1), -+ PINS_FIELD16(101, 104, 0xb30, 0x10, 6, 1), -+ PIN_FIELD16(105, 105, 0xd40, 0x10, 4, 1), -+ PIN_FIELD16(106, 106, 0xd30, 0x10, 4, 1), -+ PINS_FIELD16(107, 110, 0xd50, 0x10, 4, 1), -+ PINS_FIELD16(111, 115, 0xce0, 0x10, 4, 1), -+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 4, 1), -+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 4, 1), -+ PINS_FIELD16(118, 121, 0xce0, 0x10, 4, 1), -+ PINS_FIELD16(122, 125, 0xb30, 0x10, 7, 1), -+ PIN_FIELD16(126, 126, 0xb20, 0x10, 12, 1), -+ PINS_FIELD16(127, 142, 0xb30, 0x10, 9, 1), -+ PINS_FIELD16(143, 160, 0xb30, 0x10, 10, 1), -+ PINS_FIELD16(161, 168, 0xb30, 0x10, 12, 1), -+ PINS_FIELD16(169, 183, 0xb30, 0x10, 10, 1), -+ PINS_FIELD16(184, 186, 0xb30, 0x10, 9, 1), -+ PIN_FIELD16(187, 187, 0xb30, 0x10, 14, 1), -+ PIN_FIELD16(188, 188, 0xb20, 0x10, 13, 1), -+ PINS_FIELD16(189, 193, 0xb30, 0x10, 15, 1), -+ PINS_FIELD16(194, 198, 0xb40, 0x10, 0, 1), -+ PIN_FIELD16(199, 199, 0xb20, 0x10, 1, 1), -+ PINS_FIELD16(200, 202, 0xb40, 0x10, 1, 1), -+ PINS_FIELD16(203, 207, 0xb40, 0x10, 2, 1), -+ PINS_FIELD16(208, 209, 0xb40, 0x10, 3, 1), -+ PIN_FIELD16(210, 210, 0xb40, 0x10, 4, 1), -+ PINS_FIELD16(211, 235, 0xb40, 0x10, 5, 1), -+ PINS_FIELD16(236, 241, 0xb40, 0x10, 6, 1), -+ PINS_FIELD16(242, 243, 0xb40, 0x10, 7, 1), -+ PINS_FIELD16(244, 247, 0xb40, 0x10, 8, 1), -+ PIN_FIELD16(248, 248, 0xb40, 0x10, 9, 1), -+ PINS_FIELD16(249, 257, 0xfc0, 0x10, 4, 1), -+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 4, 1), -+ PIN_FIELD16(259, 259, 0xc90, 0x10, 4, 1), -+ PIN_FIELD16(260, 260, 0x3a0, 0x10, 4, 1), -+ PIN_FIELD16(261, 261, 0xd50, 0x10, 4, 1), -+ PINS_FIELD16(262, 277, 0xb40, 0x10, 12, 1), -+ PIN_FIELD16(278, 278, 0xb40, 0x10, 13, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_smt_range[] = { -+ PINS_FIELD16(0, 6, 0xb50, 0x10, 0, 1), -+ PINS_FIELD16(7, 9, 0xb50, 0x10, 1, 1), -+ PINS_FIELD16(10, 13, 0xb60, 0x10, 3, 1), -+ PINS_FIELD16(14, 15, 0xb60, 0x10, 13, 1), -+ PINS_FIELD16(16, 17, 0xb70, 0x10, 7, 1), -+ PINS_FIELD16(18, 29, 0xb70, 0x10, 13, 1), -+ PINS_FIELD16(30, 32, 0xb70, 0x10, 7, 1), -+ PINS_FIELD16(33, 37, 0xb70, 0x10, 13, 1), -+ PIN_FIELD16(38, 38, 0xb50, 0x10, 13, 1), -+ PINS_FIELD16(39, 42, 0xb70, 0x10, 13, 1), -+ PINS_FIELD16(43, 45, 0xb50, 0x10, 10, 1), -+ PINS_FIELD16(47, 48, 0xb50, 0x10, 11, 1), -+ PIN_FIELD16(49, 49, 0xb50, 0x10, 12, 1), -+ PINS_FIELD16(50, 52, 0xb50, 0x10, 13, 1), -+ PINS_FIELD16(53, 56, 0xb50, 0x10, 14, 1), -+ PINS_FIELD16(57, 58, 0xb50, 0x10, 15, 1), -+ PIN_FIELD16(59, 59, 0xb60, 0x10, 10, 1), -+ PINS_FIELD16(60, 62, 0xb60, 0x10, 0, 1), -+ PINS_FIELD16(63, 65, 0xb60, 0x10, 1, 1), -+ PINS_FIELD16(66, 71, 0xb60, 0x10, 2, 1), -+ PINS_FIELD16(72, 74, 0xb50, 0x10, 12, 1), -+ PINS_FIELD16(75, 76, 0xb60, 0x10, 3, 1), -+ PINS_FIELD16(77, 78, 0xb60, 0x10, 4, 1), -+ PINS_FIELD16(79, 82, 0xb60, 0x10, 5, 1), -+ PINS_FIELD16(83, 84, 0xb60, 0x10, 2, 1), -+ PIN_FIELD16(85, 85, 0xda0, 0x10, 11, 1), -+ PIN_FIELD16(86, 86, 0xd90, 0x10, 11, 1), -+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 3, 1), -+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 7, 1), -+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 11, 1), -+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 15, 1), -+ PINS_FIELD16(101, 104, 0xb60, 0x10, 6, 1), -+ PIN_FIELD16(105, 105, 0xd40, 0x10, 11, 1), -+ PIN_FIELD16(106, 106, 0xd30, 0x10, 11, 1), -+ PIN_FIELD16(107, 107, 0xd60, 0x10, 3, 1), -+ PIN_FIELD16(108, 108, 0xd60, 0x10, 7, 1), -+ PIN_FIELD16(109, 109, 0xd60, 0x10, 11, 1), -+ PIN_FIELD16(110, 110, 0xd60, 0x10, 15, 1), -+ PIN_FIELD16(111, 111, 0xd00, 0x10, 15, 1), -+ PIN_FIELD16(112, 112, 0xd00, 0x10, 11, 1), -+ PIN_FIELD16(113, 113, 0xd00, 0x10, 7, 1), -+ PIN_FIELD16(114, 114, 0xd00, 0x10, 3, 1), -+ PIN_FIELD16(115, 115, 0xd10, 0x10, 3, 1), -+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 11, 1), -+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 11, 1), -+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 15, 1), -+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 7, 1), -+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 3, 1), -+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 7, 1), -+ PINS_FIELD16(122, 125, 0xb60, 0x10, 7, 1), -+ PIN_FIELD16(126, 126, 0xb50, 0x10, 12, 1), -+ PINS_FIELD16(127, 142, 0xb60, 0x10, 9, 1), -+ PINS_FIELD16(143, 160, 0xb60, 0x10, 10, 1), -+ PINS_FIELD16(161, 168, 0xb60, 0x10, 12, 1), -+ PINS_FIELD16(169, 183, 0xb60, 0x10, 10, 1), -+ PINS_FIELD16(184, 186, 0xb60, 0x10, 9, 1), -+ PIN_FIELD16(187, 187, 0xb60, 0x10, 14, 1), -+ PIN_FIELD16(188, 188, 0xb50, 0x10, 13, 1), -+ PINS_FIELD16(189, 193, 0xb60, 0x10, 15, 1), -+ PINS_FIELD16(194, 198, 0xb70, 0x10, 0, 1), -+ PIN_FIELD16(199, 199, 0xb50, 0x10, 1, 1), -+ PINS_FIELD16(200, 202, 0xb70, 0x10, 1, 1), -+ PINS_FIELD16(203, 207, 0xb70, 0x10, 2, 1), -+ PINS_FIELD16(208, 209, 0xb70, 0x10, 3, 1), -+ PIN_FIELD16(210, 210, 0xb70, 0x10, 4, 1), -+ PINS_FIELD16(211, 235, 0xb70, 0x10, 5, 1), -+ PINS_FIELD16(236, 241, 0xb70, 0x10, 6, 1), -+ PINS_FIELD16(242, 243, 0xb70, 0x10, 7, 1), -+ PINS_FIELD16(244, 247, 0xb70, 0x10, 8, 1), -+ PIN_FIELD16(248, 248, 0xb70, 0x10, 9, 10), -+ PIN_FIELD16(249, 249, 0x140, 0x10, 3, 1), -+ PIN_FIELD16(250, 250, 0x130, 0x10, 15, 1), -+ PIN_FIELD16(251, 251, 0x130, 0x10, 11, 1), -+ PIN_FIELD16(252, 252, 0x130, 0x10, 7, 1), -+ PIN_FIELD16(253, 253, 0x130, 0x10, 3, 1), -+ PIN_FIELD16(254, 254, 0xf40, 0x10, 15, 1), -+ PIN_FIELD16(255, 255, 0xf40, 0x10, 11, 1), -+ PIN_FIELD16(256, 256, 0xf40, 0x10, 7, 1), -+ PIN_FIELD16(257, 257, 0xf40, 0x10, 3, 1), -+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 11, 1), -+ PIN_FIELD16(259, 259, 0xc90, 0x10, 11, 1), -+ PIN_FIELD16(260, 260, 0x3a0, 0x10, 11, 1), -+ PIN_FIELD16(261, 261, 0x0b0, 0x10, 3, 1), -+ PINS_FIELD16(262, 277, 0xb70, 0x10, 12, 1), -+ PIN_FIELD16(278, 278, 0xb70, 0x10, 13, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_pullen_range[] = { -+ PIN_FIELD16(0, 278, 0x150, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_pullsel_range[] = { -+ PIN_FIELD16(0, 278, 0x280, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_drv_range[] = { -+ PINS_FIELD16(0, 6, 0xf50, 0x10, 0, 4), -+ PINS_FIELD16(7, 9, 0xf50, 0x10, 4, 4), -+ PINS_FIELD16(10, 13, 0xf50, 0x10, 4, 4), -+ PINS_FIELD16(14, 15, 0xf50, 0x10, 12, 4), -+ PINS_FIELD16(16, 17, 0xf60, 0x10, 0, 4), -+ PINS_FIELD16(18, 21, 0xf60, 0x10, 0, 4), -+ PINS_FIELD16(22, 26, 0xf60, 0x10, 8, 4), -+ PINS_FIELD16(27, 29, 0xf60, 0x10, 12, 4), -+ PINS_FIELD16(30, 32, 0xf60, 0x10, 0, 4), -+ PINS_FIELD16(33, 37, 0xf70, 0x10, 0, 4), -+ PIN_FIELD16(38, 38, 0xf70, 0x10, 4, 4), -+ PINS_FIELD16(39, 42, 0xf70, 0x10, 8, 4), -+ PINS_FIELD16(43, 45, 0xf70, 0x10, 12, 4), -+ PINS_FIELD16(47, 48, 0xf80, 0x10, 0, 4), -+ PIN_FIELD16(49, 49, 0xf80, 0x10, 4, 4), -+ PINS_FIELD16(50, 52, 0xf70, 0x10, 4, 4), -+ PINS_FIELD16(53, 56, 0xf80, 0x10, 12, 4), -+ PINS_FIELD16(60, 62, 0xf90, 0x10, 8, 4), -+ PINS_FIELD16(63, 65, 0xf90, 0x10, 12, 4), -+ PINS_FIELD16(66, 71, 0xfa0, 0x10, 0, 4), -+ PINS_FIELD16(72, 74, 0xf80, 0x10, 4, 4), -+ PIN_FIELD16(85, 85, 0xda0, 0x10, 0, 4), -+ PIN_FIELD16(86, 86, 0xd90, 0x10, 0, 4), -+ PINS_FIELD16(87, 90, 0xdb0, 0x10, 0, 4), -+ PIN_FIELD16(105, 105, 0xd40, 0x10, 0, 4), -+ PIN_FIELD16(106, 106, 0xd30, 0x10, 0, 4), -+ PINS_FIELD16(107, 110, 0xd50, 0x10, 0, 4), -+ PINS_FIELD16(111, 115, 0xce0, 0x10, 0, 4), -+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 0, 4), -+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 0, 4), -+ PINS_FIELD16(118, 121, 0xce0, 0x10, 0, 4), -+ PIN_FIELD16(126, 126, 0xf80, 0x10, 4, 4), -+ PIN_FIELD16(188, 188, 0xf70, 0x10, 4, 4), -+ PINS_FIELD16(189, 193, 0xfe0, 0x10, 8, 4), -+ PINS_FIELD16(194, 198, 0xfe0, 0x10, 12, 4), -+ PIN_FIELD16(199, 199, 0xf50, 0x10, 4, 4), -+ PINS_FIELD16(200, 202, 0xfd0, 0x10, 0, 4), -+ PINS_FIELD16(203, 207, 0xfd0, 0x10, 4, 4), -+ PINS_FIELD16(208, 209, 0xfd0, 0x10, 8, 4), -+ PIN_FIELD16(210, 210, 0xfd0, 0x10, 12, 4), -+ PINS_FIELD16(211, 235, 0xff0, 0x10, 0, 4), -+ PINS_FIELD16(236, 241, 0xff0, 0x10, 4, 4), -+ PINS_FIELD16(242, 243, 0xff0, 0x10, 8, 4), -+ PIN_FIELD16(248, 248, 0xf00, 0x10, 0, 4), -+ PINS_FIELD16(249, 256, 0xfc0, 0x10, 0, 4), -+ PIN_FIELD16(257, 257, 0xce0, 0x10, 0, 4), -+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 0, 4), -+ PIN_FIELD16(259, 259, 0xc90, 0x10, 0, 4), -+ PIN_FIELD16(260, 260, 0x3a0, 0x10, 0, 4), -+ PIN_FIELD16(261, 261, 0xd50, 0x10, 0, 4), -+ PINS_FIELD16(262, 277, 0xf00, 0x10, 8, 4), -+ PIN_FIELD16(278, 278, 0xf70, 0x10, 8, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_tdsel_range[] = { -+ PINS_FIELD16(262, 276, 0x4c0, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_pupd_range[] = { -+ /* MSDC0 */ -+ PIN_FIELD16(111, 111, 0xd00, 0x10, 12, 1), -+ PIN_FIELD16(112, 112, 0xd00, 0x10, 8, 1), -+ PIN_FIELD16(113, 113, 0xd00, 0x10, 4, 1), -+ PIN_FIELD16(114, 114, 0xd00, 0x10, 0, 1), -+ PIN_FIELD16(115, 115, 0xd10, 0x10, 0, 1), -+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 8, 1), -+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 8, 1), -+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 12, 1), -+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 8, 1), -+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 4, 1), -+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 0, 1), -+ /* MSDC1 */ -+ PIN_FIELD16(105, 105, 0xd40, 0x10, 8, 1), -+ PIN_FIELD16(106, 106, 0xd30, 0x10, 8, 1), -+ PIN_FIELD16(107, 107, 0xd60, 0x10, 0, 1), -+ PIN_FIELD16(108, 108, 0xd60, 0x10, 10, 1), -+ PIN_FIELD16(109, 109, 0xd60, 0x10, 4, 1), -+ PIN_FIELD16(110, 110, 0xc60, 0x10, 12, 1), -+ /* MSDC1 */ -+ PIN_FIELD16(85, 85, 0xda0, 0x10, 8, 1), -+ PIN_FIELD16(86, 86, 0xd90, 0x10, 8, 1), -+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 0, 1), -+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 10, 1), -+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 4, 1), -+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 12, 1), -+ /* MSDC0E */ -+ PIN_FIELD16(249, 249, 0x140, 0x10, 0, 1), -+ PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1), -+ PIN_FIELD16(251, 251, 0x130, 0x10, 8, 1), -+ PIN_FIELD16(252, 252, 0x130, 0x10, 4, 1), -+ PIN_FIELD16(253, 253, 0x130, 0x10, 0, 1), -+ PIN_FIELD16(254, 254, 0xf40, 0x10, 12, 1), -+ PIN_FIELD16(255, 255, 0xf40, 0x10, 8, 1), -+ PIN_FIELD16(256, 256, 0xf40, 0x10, 4, 1), -+ PIN_FIELD16(257, 257, 0xf40, 0x10, 0, 1), -+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 8, 1), -+ PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1), -+ PIN_FIELD16(261, 261, 0x140, 0x10, 8, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_r1_range[] = { -+ /* MSDC0 */ -+ PIN_FIELD16(111, 111, 0xd00, 0x10, 13, 1), -+ PIN_FIELD16(112, 112, 0xd00, 0x10, 9, 1), -+ PIN_FIELD16(113, 113, 0xd00, 0x10, 5, 1), -+ PIN_FIELD16(114, 114, 0xd00, 0x10, 1, 1), -+ PIN_FIELD16(115, 115, 0xd10, 0x10, 1, 1), -+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 9, 1), -+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 9, 1), -+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 13, 1), -+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 9, 1), -+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 5, 1), -+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 1, 1), -+ /* MSDC1 */ -+ PIN_FIELD16(105, 105, 0xd40, 0x10, 9, 1), -+ PIN_FIELD16(106, 106, 0xd30, 0x10, 9, 1), -+ PIN_FIELD16(107, 107, 0xd60, 0x10, 1, 1), -+ PIN_FIELD16(108, 108, 0xd60, 0x10, 9, 1), -+ PIN_FIELD16(109, 109, 0xd60, 0x10, 5, 1), -+ PIN_FIELD16(110, 110, 0xc60, 0x10, 13, 1), -+ /* MSDC2 */ -+ PIN_FIELD16(85, 85, 0xda0, 0x10, 9, 1), -+ PIN_FIELD16(86, 86, 0xd90, 0x10, 9, 1), -+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 1, 1), -+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 9, 1), -+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 5, 1), -+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 13, 1), -+ /* MSDC0E */ -+ PIN_FIELD16(249, 249, 0x140, 0x10, 1, 1), -+ PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1), -+ PIN_FIELD16(251, 251, 0x130, 0x10, 9, 1), -+ PIN_FIELD16(252, 252, 0x130, 0x10, 5, 1), -+ PIN_FIELD16(253, 253, 0x130, 0x10, 1, 1), -+ PIN_FIELD16(254, 254, 0xf40, 0x10, 13, 1), -+ PIN_FIELD16(255, 255, 0xf40, 0x10, 9, 1), -+ PIN_FIELD16(256, 256, 0xf40, 0x10, 5, 1), -+ PIN_FIELD16(257, 257, 0xf40, 0x10, 1, 1), -+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 9, 1), -+ PIN_FIELD16(259, 259, 0xc90, 0x10, 9, 1), -+ PIN_FIELD16(261, 261, 0x140, 0x10, 9, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7623_pin_r0_range[] = { -+ /* MSDC0 */ -+ PIN_FIELD16(111, 111, 0xd00, 0x10, 14, 1), -+ PIN_FIELD16(112, 112, 0xd00, 0x10, 10, 1), -+ PIN_FIELD16(113, 113, 0xd00, 0x10, 6, 1), -+ PIN_FIELD16(114, 114, 0xd00, 0x10, 2, 1), -+ PIN_FIELD16(115, 115, 0xd10, 0x10, 2, 1), -+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 10, 1), -+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 10, 1), -+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 14, 1), -+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 10, 1), -+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 6, 1), -+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 2, 1), -+ /* MSDC1 */ -+ PIN_FIELD16(105, 105, 0xd40, 0x10, 10, 1), -+ PIN_FIELD16(106, 106, 0xd30, 0x10, 10, 1), -+ PIN_FIELD16(107, 107, 0xd60, 0x10, 2, 1), -+ PIN_FIELD16(108, 108, 0xd60, 0x10, 8, 1), -+ PIN_FIELD16(109, 109, 0xd60, 0x10, 6, 1), -+ PIN_FIELD16(110, 110, 0xc60, 0x10, 14, 1), -+ /* MSDC2 */ -+ PIN_FIELD16(85, 85, 0xda0, 0x10, 10, 1), -+ PIN_FIELD16(86, 86, 0xd90, 0x10, 10, 1), -+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 2, 1), -+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 8, 1), -+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 6, 1), -+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 14, 1), -+ /* MSDC0E */ -+ PIN_FIELD16(249, 249, 0x140, 0x10, 2, 1), -+ PIN_FIELD16(250, 250, 0x130, 0x10, 14, 1), -+ PIN_FIELD16(251, 251, 0x130, 0x10, 10, 1), -+ PIN_FIELD16(252, 252, 0x130, 0x10, 6, 1), -+ PIN_FIELD16(253, 253, 0x130, 0x10, 2, 1), -+ PIN_FIELD16(254, 254, 0xf40, 0x10, 14, 1), -+ PIN_FIELD16(255, 255, 0xf40, 0x10, 10, 1), -+ PIN_FIELD16(256, 256, 0xf40, 0x10, 6, 1), -+ PIN_FIELD16(257, 257, 0xf40, 0x10, 5, 1), -+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 10, 1), -+ PIN_FIELD16(259, 259, 0xc90, 0x10, 10, 1), -+ PIN_FIELD16(261, 261, 0x140, 0x10, 10, 1), -+}; -+ -+static const struct mtk_pin_reg_calc mt7623_reg_cals[] = { -+ [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7623_pin_mode_range), -+ [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7623_pin_dir_range), -+ [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt7623_pin_di_range), -+ [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt7623_pin_do_range), -+ [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt7623_pin_smt_range), -+ [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt7623_pin_pullsel_range), -+ [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt7623_pin_pullen_range), -+ [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7623_pin_drv_range), -+ [PINCTRL_PIN_REG_TDSEL] = MTK_RANGE(mt7623_pin_tdsel_range), -+ [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt7623_pin_ies_range), -+ [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt7623_pin_pupd_range), -+ [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt7623_pin_r0_range), -+ [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt7623_pin_r1_range), -+}; -+ -+static const struct mtk_pin_desc mt7623_pins[] = { -+ MT7623_PIN(0, "PWRAP_SPI0_MI", 148, DRV_GRP3), -+ MT7623_PIN(1, "PWRAP_SPI0_MO", 149, DRV_GRP3), -+ MT7623_PIN(2, "PWRAP_INT", 150, DRV_GRP3), -+ MT7623_PIN(3, "PWRAP_SPI0_CK", 151, DRV_GRP3), -+ MT7623_PIN(4, "PWRAP_SPI0_CSN", 152, DRV_GRP3), -+ MT7623_PIN(5, "PWRAP_SPI0_CK2", 153, DRV_GRP3), -+ MT7623_PIN(6, "PWRAP_SPI0_CSN2", 154, DRV_GRP3), -+ MT7623_PIN(7, "SPI1_CSN", 155, DRV_GRP3), -+ MT7623_PIN(8, "SPI1_MI", 156, DRV_GRP3), -+ MT7623_PIN(9, "SPI1_MO", 157, DRV_GRP3), -+ MT7623_PIN(10, "RTC32K_CK", 158, DRV_GRP3), -+ MT7623_PIN(11, "WATCHDOG", 159, DRV_GRP3), -+ MT7623_PIN(12, "SRCLKENA", 160, DRV_GRP3), -+ MT7623_PIN(13, "SRCLKENAI", 161, DRV_GRP3), -+ MT7623_PIN(14, "URXD2", 162, DRV_GRP1), -+ MT7623_PIN(15, "UTXD2", 163, DRV_GRP1), -+ MT7623_PIN(16, "I2S5_DATA_IN", 164, DRV_GRP1), -+ MT7623_PIN(17, "I2S5_BCK", 165, DRV_GRP1), -+ MT7623_PIN(18, "PCM_CLK", 166, DRV_GRP1), -+ MT7623_PIN(19, "PCM_SYNC", 167, DRV_GRP1), -+ MT7623_PIN(20, "PCM_RX", EINT_NA, DRV_GRP1), -+ MT7623_PIN(21, "PCM_TX", EINT_NA, DRV_GRP1), -+ MT7623_PIN(22, "EINT0", 0, DRV_GRP1), -+ MT7623_PIN(23, "EINT1", 1, DRV_GRP1), -+ MT7623_PIN(24, "EINT2", 2, DRV_GRP1), -+ MT7623_PIN(25, "EINT3", 3, DRV_GRP1), -+ MT7623_PIN(26, "EINT4", 4, DRV_GRP1), -+ MT7623_PIN(27, "EINT5", 5, DRV_GRP1), -+ MT7623_PIN(28, "EINT6", 6, DRV_GRP1), -+ MT7623_PIN(29, "EINT7", 7, DRV_GRP1), -+ MT7623_PIN(30, "I2S5_LRCK", 12, DRV_GRP1), -+ MT7623_PIN(31, "I2S5_MCLK", 13, DRV_GRP1), -+ MT7623_PIN(32, "I2S5_DATA", 14, DRV_GRP1), -+ MT7623_PIN(33, "I2S1_DATA", 15, DRV_GRP1), -+ MT7623_PIN(34, "I2S1_DATA_IN", 16, DRV_GRP1), -+ MT7623_PIN(35, "I2S1_BCK", 17, DRV_GRP1), -+ MT7623_PIN(36, "I2S1_LRCK", 18, DRV_GRP1), -+ MT7623_PIN(37, "I2S1_MCLK", 19, DRV_GRP1), -+ MT7623_PIN(38, "I2S2_DATA", 20, DRV_GRP1), -+ MT7623_PIN(39, "JTMS", 21, DRV_GRP3), -+ MT7623_PIN(40, "JTCK", 22, DRV_GRP3), -+ MT7623_PIN(41, "JTDI", 23, DRV_GRP3), -+ MT7623_PIN(42, "JTDO", 24, DRV_GRP3), -+ MT7623_PIN(43, "NCLE", 25, DRV_GRP1), -+ MT7623_PIN(44, "NCEB1", 26, DRV_GRP1), -+ MT7623_PIN(45, "NCEB0", 27, DRV_GRP1), -+ MT7623_PIN(46, "IR", 28, DRV_FIXED), -+ MT7623_PIN(47, "NREB", 29, DRV_GRP1), -+ MT7623_PIN(48, "NRNB", 30, DRV_GRP1), -+ MT7623_PIN(49, "I2S0_DATA", 31, DRV_GRP1), -+ MT7623_PIN(50, "I2S2_BCK", 32, DRV_GRP1), -+ MT7623_PIN(51, "I2S2_DATA_IN", 33, DRV_GRP1), -+ MT7623_PIN(52, "I2S2_LRCK", 34, DRV_GRP1), -+ MT7623_PIN(53, "SPI0_CSN", 35, DRV_GRP1), -+ MT7623_PIN(54, "SPI0_CK", 36, DRV_GRP1), -+ MT7623_PIN(55, "SPI0_MI", 37, DRV_GRP1), -+ MT7623_PIN(56, "SPI0_MO", 38, DRV_GRP1), -+ MT7623_PIN(57, "SDA1", 39, DRV_FIXED), -+ MT7623_PIN(58, "SCL1", 40, DRV_FIXED), -+ MT7623_PIN(59, "RAMBUF_I_CLK", EINT_NA, DRV_FIXED), -+ MT7623_PIN(60, "WB_RSTB", 41, DRV_GRP3), -+ MT7623_PIN(61, "F2W_DATA", 42, DRV_GRP3), -+ MT7623_PIN(62, "F2W_CLK", 43, DRV_GRP3), -+ MT7623_PIN(63, "WB_SCLK", 44, DRV_GRP3), -+ MT7623_PIN(64, "WB_SDATA", 45, DRV_GRP3), -+ MT7623_PIN(65, "WB_SEN", 46, DRV_GRP3), -+ MT7623_PIN(66, "WB_CRTL0", 47, DRV_GRP3), -+ MT7623_PIN(67, "WB_CRTL1", 48, DRV_GRP3), -+ MT7623_PIN(68, "WB_CRTL2", 49, DRV_GRP3), -+ MT7623_PIN(69, "WB_CRTL3", 50, DRV_GRP3), -+ MT7623_PIN(70, "WB_CRTL4", 51, DRV_GRP3), -+ MT7623_PIN(71, "WB_CRTL5", 52, DRV_GRP3), -+ MT7623_PIN(72, "I2S0_DATA_IN", 53, DRV_GRP1), -+ MT7623_PIN(73, "I2S0_LRCK", 54, DRV_GRP1), -+ MT7623_PIN(74, "I2S0_BCK", 55, DRV_GRP1), -+ MT7623_PIN(75, "SDA0", 56, DRV_FIXED), -+ MT7623_PIN(76, "SCL0", 57, DRV_FIXED), -+ MT7623_PIN(77, "SDA2", 58, DRV_FIXED), -+ MT7623_PIN(78, "SCL2", 59, DRV_FIXED), -+ MT7623_PIN(79, "URXD0", 60, DRV_FIXED), -+ MT7623_PIN(80, "UTXD0", 61, DRV_FIXED), -+ MT7623_PIN(81, "URXD1", 62, DRV_FIXED), -+ MT7623_PIN(82, "UTXD1", 63, DRV_FIXED), -+ MT7623_PIN(83, "LCM_RST", 64, DRV_FIXED), -+ MT7623_PIN(84, "DSI_TE", 65, DRV_FIXED), -+ MT7623_PIN(85, "MSDC2_CMD", 66, DRV_GRP4), -+ MT7623_PIN(86, "MSDC2_CLK", 67, DRV_GRP4), -+ MT7623_PIN(87, "MSDC2_DAT0", 68, DRV_GRP4), -+ MT7623_PIN(88, "MSDC2_DAT1", 69, DRV_GRP4), -+ MT7623_PIN(89, "MSDC2_DAT2", 70, DRV_GRP4), -+ MT7623_PIN(90, "MSDC2_DAT3", 71, DRV_GRP4), -+ MT7623_PIN(91, "TDN3", EINT_NA, DRV_FIXED), -+ MT7623_PIN(92, "TDP3", EINT_NA, DRV_FIXED), -+ MT7623_PIN(93, "TDN2", EINT_NA, DRV_FIXED), -+ MT7623_PIN(94, "TDP2", EINT_NA, DRV_FIXED), -+ MT7623_PIN(95, "TCN", EINT_NA, DRV_FIXED), -+ MT7623_PIN(96, "TCP", EINT_NA, DRV_FIXED), -+ MT7623_PIN(97, "TDN1", EINT_NA, DRV_FIXED), -+ MT7623_PIN(98, "TDP1", EINT_NA, DRV_FIXED), -+ MT7623_PIN(99, "TDN0", EINT_NA, DRV_FIXED), -+ MT7623_PIN(100, "TDP0", EINT_NA, DRV_FIXED), -+ MT7623_PIN(101, "SPI2_CSN", 74, DRV_FIXED), -+ MT7623_PIN(102, "SPI2_MI", 75, DRV_FIXED), -+ MT7623_PIN(103, "SPI2_MO", 76, DRV_FIXED), -+ MT7623_PIN(104, "SPI2_CLK", 77, DRV_FIXED), -+ MT7623_PIN(105, "MSDC1_CMD", 78, DRV_GRP4), -+ MT7623_PIN(106, "MSDC1_CLK", 79, DRV_GRP4), -+ MT7623_PIN(107, "MSDC1_DAT0", 80, DRV_GRP4), -+ MT7623_PIN(108, "MSDC1_DAT1", 81, DRV_GRP4), -+ MT7623_PIN(109, "MSDC1_DAT2", 82, DRV_GRP4), -+ MT7623_PIN(110, "MSDC1_DAT3", 83, DRV_GRP4), -+ MT7623_PIN(111, "MSDC0_DAT7", 84, DRV_GRP4), -+ MT7623_PIN(112, "MSDC0_DAT6", 85, DRV_GRP4), -+ MT7623_PIN(113, "MSDC0_DAT5", 86, DRV_GRP4), -+ MT7623_PIN(114, "MSDC0_DAT4", 87, DRV_GRP4), -+ MT7623_PIN(115, "MSDC0_RSTB", 88, DRV_GRP4), -+ MT7623_PIN(116, "MSDC0_CMD", 89, DRV_GRP4), -+ MT7623_PIN(117, "MSDC0_CLK", 90, DRV_GRP4), -+ MT7623_PIN(118, "MSDC0_DAT3", 91, DRV_GRP4), -+ MT7623_PIN(119, "MSDC0_DAT2", 92, DRV_GRP4), -+ MT7623_PIN(120, "MSDC0_DAT1", 93, DRV_GRP4), -+ MT7623_PIN(121, "MSDC0_DAT0", 94, DRV_GRP4), -+ MT7623_PIN(122, "CEC", 95, DRV_FIXED), -+ MT7623_PIN(123, "HTPLG", 96, DRV_FIXED), -+ MT7623_PIN(124, "HDMISCK", 97, DRV_FIXED), -+ MT7623_PIN(125, "HDMISD", 98, DRV_FIXED), -+ MT7623_PIN(126, "I2S0_MCLK", 99, DRV_GRP1), -+ MT7623_PIN(127, "RAMBUF_IDATA0", EINT_NA, DRV_FIXED), -+ MT7623_PIN(128, "RAMBUF_IDATA1", EINT_NA, DRV_FIXED), -+ MT7623_PIN(129, "RAMBUF_IDATA2", EINT_NA, DRV_FIXED), -+ MT7623_PIN(130, "RAMBUF_IDATA3", EINT_NA, DRV_FIXED), -+ MT7623_PIN(131, "RAMBUF_IDATA4", EINT_NA, DRV_FIXED), -+ MT7623_PIN(132, "RAMBUF_IDATA5", EINT_NA, DRV_FIXED), -+ MT7623_PIN(133, "RAMBUF_IDATA6", EINT_NA, DRV_FIXED), -+ MT7623_PIN(134, "RAMBUF_IDATA7", EINT_NA, DRV_FIXED), -+ MT7623_PIN(135, "RAMBUF_IDATA8", EINT_NA, DRV_FIXED), -+ MT7623_PIN(136, "RAMBUF_IDATA9", EINT_NA, DRV_FIXED), -+ MT7623_PIN(137, "RAMBUF_IDATA10", EINT_NA, DRV_FIXED), -+ MT7623_PIN(138, "RAMBUF_IDATA11", EINT_NA, DRV_FIXED), -+ MT7623_PIN(139, "RAMBUF_IDATA12", EINT_NA, DRV_FIXED), -+ MT7623_PIN(140, "RAMBUF_IDATA13", EINT_NA, DRV_FIXED), -+ MT7623_PIN(141, "RAMBUF_IDATA14", EINT_NA, DRV_FIXED), -+ MT7623_PIN(142, "RAMBUF_IDATA15", EINT_NA, DRV_FIXED), -+ MT7623_PIN(143, "RAMBUF_ODATA0", EINT_NA, DRV_FIXED), -+ MT7623_PIN(144, "RAMBUF_ODATA1", EINT_NA, DRV_FIXED), -+ MT7623_PIN(145, "RAMBUF_ODATA2", EINT_NA, DRV_FIXED), -+ MT7623_PIN(146, "RAMBUF_ODATA3", EINT_NA, DRV_FIXED), -+ MT7623_PIN(147, "RAMBUF_ODATA4", EINT_NA, DRV_FIXED), -+ MT7623_PIN(148, "RAMBUF_ODATA5", EINT_NA, DRV_FIXED), -+ MT7623_PIN(149, "RAMBUF_ODATA6", EINT_NA, DRV_FIXED), -+ MT7623_PIN(150, "RAMBUF_ODATA7", EINT_NA, DRV_FIXED), -+ MT7623_PIN(151, "RAMBUF_ODATA8", EINT_NA, DRV_FIXED), -+ MT7623_PIN(152, "RAMBUF_ODATA9", EINT_NA, DRV_FIXED), -+ MT7623_PIN(153, "RAMBUF_ODATA10", EINT_NA, DRV_FIXED), -+ MT7623_PIN(154, "RAMBUF_ODATA11", EINT_NA, DRV_FIXED), -+ MT7623_PIN(155, "RAMBUF_ODATA12", EINT_NA, DRV_FIXED), -+ MT7623_PIN(156, "RAMBUF_ODATA13", EINT_NA, DRV_FIXED), -+ MT7623_PIN(157, "RAMBUF_ODATA14", EINT_NA, DRV_FIXED), -+ MT7623_PIN(158, "RAMBUF_ODATA15", EINT_NA, DRV_FIXED), -+ MT7623_PIN(159, "RAMBUF_BE0", EINT_NA, DRV_FIXED), -+ MT7623_PIN(160, "RAMBUF_BE1", EINT_NA, DRV_FIXED), -+ MT7623_PIN(161, "AP2PT_INT", EINT_NA, DRV_FIXED), -+ MT7623_PIN(162, "AP2PT_INT_CLR", EINT_NA, DRV_FIXED), -+ MT7623_PIN(163, "PT2AP_INT", EINT_NA, DRV_FIXED), -+ MT7623_PIN(164, "PT2AP_INT_CLR", EINT_NA, DRV_FIXED), -+ MT7623_PIN(165, "AP2UP_INT", EINT_NA, DRV_FIXED), -+ MT7623_PIN(166, "AP2UP_INT_CLR", EINT_NA, DRV_FIXED), -+ MT7623_PIN(167, "UP2AP_INT", EINT_NA, DRV_FIXED), -+ MT7623_PIN(168, "UP2AP_INT_CLR", EINT_NA, DRV_FIXED), -+ MT7623_PIN(169, "RAMBUF_ADDR0", EINT_NA, DRV_FIXED), -+ MT7623_PIN(170, "RAMBUF_ADDR1", EINT_NA, DRV_FIXED), -+ MT7623_PIN(171, "RAMBUF_ADDR2", EINT_NA, DRV_FIXED), -+ MT7623_PIN(172, "RAMBUF_ADDR3", EINT_NA, DRV_FIXED), -+ MT7623_PIN(173, "RAMBUF_ADDR4", EINT_NA, DRV_FIXED), -+ MT7623_PIN(174, "RAMBUF_ADDR5", EINT_NA, DRV_FIXED), -+ MT7623_PIN(175, "RAMBUF_ADDR6", EINT_NA, DRV_FIXED), -+ MT7623_PIN(176, "RAMBUF_ADDR7", EINT_NA, DRV_FIXED), -+ MT7623_PIN(177, "RAMBUF_ADDR8", EINT_NA, DRV_FIXED), -+ MT7623_PIN(178, "RAMBUF_ADDR9", EINT_NA, DRV_FIXED), -+ MT7623_PIN(179, "RAMBUF_ADDR10", EINT_NA, DRV_FIXED), -+ MT7623_PIN(180, "RAMBUF_RW", EINT_NA, DRV_FIXED), -+ MT7623_PIN(181, "RAMBUF_LAST", EINT_NA, DRV_FIXED), -+ MT7623_PIN(182, "RAMBUF_HP", EINT_NA, DRV_FIXED), -+ MT7623_PIN(183, "RAMBUF_REQ", EINT_NA, DRV_FIXED), -+ MT7623_PIN(184, "RAMBUF_ALE", EINT_NA, DRV_FIXED), -+ MT7623_PIN(185, "RAMBUF_DLE", EINT_NA, DRV_FIXED), -+ MT7623_PIN(186, "RAMBUF_WDLE", EINT_NA, DRV_FIXED), -+ MT7623_PIN(187, "RAMBUF_O_CLK", EINT_NA, DRV_FIXED), -+ MT7623_PIN(188, "I2S2_MCLK", 100, DRV_GRP1), -+ MT7623_PIN(189, "I2S3_DATA", 101, DRV_GRP1), -+ MT7623_PIN(190, "I2S3_DATA_IN", 102, DRV_GRP1), -+ MT7623_PIN(191, "I2S3_BCK", 103, DRV_GRP1), -+ MT7623_PIN(192, "I2S3_LRCK", 104, DRV_GRP1), -+ MT7623_PIN(193, "I2S3_MCLK", 105, DRV_GRP1), -+ MT7623_PIN(194, "I2S4_DATA", 106, DRV_GRP1), -+ MT7623_PIN(195, "I2S4_DATA_IN", 107, DRV_GRP1), -+ MT7623_PIN(196, "I2S4_BCK", 108, DRV_GRP1), -+ MT7623_PIN(197, "I2S4_LRCK", 109, DRV_GRP1), -+ MT7623_PIN(198, "I2S4_MCLK", 110, DRV_GRP1), -+ MT7623_PIN(199, "SPI1_CLK", 111, DRV_GRP3), -+ MT7623_PIN(200, "SPDIF_OUT", 112, DRV_GRP1), -+ MT7623_PIN(201, "SPDIF_IN0", 113, DRV_GRP1), -+ MT7623_PIN(202, "SPDIF_IN1", 114, DRV_GRP1), -+ MT7623_PIN(203, "PWM0", 115, DRV_GRP1), -+ MT7623_PIN(204, "PWM1", 116, DRV_GRP1), -+ MT7623_PIN(205, "PWM2", 117, DRV_GRP1), -+ MT7623_PIN(206, "PWM3", 118, DRV_GRP1), -+ MT7623_PIN(207, "PWM4", 119, DRV_GRP1), -+ MT7623_PIN(208, "AUD_EXT_CK1", 120, DRV_GRP1), -+ MT7623_PIN(209, "AUD_EXT_CK2", 121, DRV_GRP1), -+ MT7623_PIN(210, "AUD_CLOCK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(211, "DVP_RESET", EINT_NA, DRV_GRP3), -+ MT7623_PIN(212, "DVP_CLOCK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(213, "DVP_CS", EINT_NA, DRV_GRP3), -+ MT7623_PIN(214, "DVP_CK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(215, "DVP_DI", EINT_NA, DRV_GRP3), -+ MT7623_PIN(216, "DVP_DO", EINT_NA, DRV_GRP3), -+ MT7623_PIN(217, "AP_CS", EINT_NA, DRV_GRP3), -+ MT7623_PIN(218, "AP_CK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(219, "AP_DI", EINT_NA, DRV_GRP3), -+ MT7623_PIN(220, "AP_DO", EINT_NA, DRV_GRP3), -+ MT7623_PIN(221, "DVD_BCLK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(222, "T8032_CLK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(223, "AP_BCLK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(224, "HOST_CS", EINT_NA, DRV_GRP3), -+ MT7623_PIN(225, "HOST_CK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(226, "HOST_DO0", EINT_NA, DRV_GRP3), -+ MT7623_PIN(227, "HOST_DO1", EINT_NA, DRV_GRP3), -+ MT7623_PIN(228, "SLV_CS", EINT_NA, DRV_GRP3), -+ MT7623_PIN(229, "SLV_CK", EINT_NA, DRV_GRP3), -+ MT7623_PIN(230, "SLV_DI0", EINT_NA, DRV_GRP3), -+ MT7623_PIN(231, "SLV_DI1", EINT_NA, DRV_GRP3), -+ MT7623_PIN(232, "AP2DSP_INT", EINT_NA, DRV_GRP3), -+ MT7623_PIN(233, "AP2DSP_INT_CLR", EINT_NA, DRV_GRP3), -+ MT7623_PIN(234, "DSP2AP_INT", EINT_NA, DRV_GRP3), -+ MT7623_PIN(235, "DSP2AP_INT_CLR", EINT_NA, DRV_GRP3), -+ MT7623_PIN(236, "EXT_SDIO3", 122, DRV_GRP1), -+ MT7623_PIN(237, "EXT_SDIO2", 123, DRV_GRP1), -+ MT7623_PIN(238, "EXT_SDIO1", 124, DRV_GRP1), -+ MT7623_PIN(239, "EXT_SDIO0", 125, DRV_GRP1), -+ MT7623_PIN(240, "EXT_XCS", 126, DRV_GRP1), -+ MT7623_PIN(241, "EXT_SCK", 127, DRV_GRP1), -+ MT7623_PIN(242, "URTS2", 128, DRV_GRP1), -+ MT7623_PIN(243, "UCTS2", 129, DRV_GRP1), -+ MT7623_PIN(244, "HDMI_SDA_RX", 130, DRV_FIXED), -+ MT7623_PIN(245, "HDMI_SCL_RX", 131, DRV_FIXED), -+ MT7623_PIN(246, "MHL_SENCE", 132, DRV_FIXED), -+ MT7623_PIN(247, "HDMI_HPD_CBUS_RX", 69, DRV_FIXED), -+ MT7623_PIN(248, "HDMI_TESTOUTP_RX", 133, DRV_GRP1), -+ MT7623_PIN(249, "MSDC0E_RSTB", 134, DRV_GRP4), -+ MT7623_PIN(250, "MSDC0E_DAT7", 135, DRV_GRP4), -+ MT7623_PIN(251, "MSDC0E_DAT6", 136, DRV_GRP4), -+ MT7623_PIN(252, "MSDC0E_DAT5", 137, DRV_GRP4), -+ MT7623_PIN(253, "MSDC0E_DAT4", 138, DRV_GRP4), -+ MT7623_PIN(254, "MSDC0E_DAT3", 139, DRV_GRP4), -+ MT7623_PIN(255, "MSDC0E_DAT2", 140, DRV_GRP4), -+ MT7623_PIN(256, "MSDC0E_DAT1", 141, DRV_GRP4), -+ MT7623_PIN(257, "MSDC0E_DAT0", 142, DRV_GRP4), -+ MT7623_PIN(258, "MSDC0E_CMD", 143, DRV_GRP4), -+ MT7623_PIN(259, "MSDC0E_CLK", 144, DRV_GRP4), -+ MT7623_PIN(260, "MSDC0E_DSL", 145, DRV_GRP4), -+ MT7623_PIN(261, "MSDC1_INS", 146, DRV_GRP4), -+ MT7623_PIN(262, "G2_TXEN", 8, DRV_GRP1), -+ MT7623_PIN(263, "G2_TXD3", 9, DRV_GRP1), -+ MT7623_PIN(264, "G2_TXD2", 10, DRV_GRP1), -+ MT7623_PIN(265, "G2_TXD1", 11, DRV_GRP1), -+ MT7623_PIN(266, "G2_TXD0", EINT_NA, DRV_GRP1), -+ MT7623_PIN(267, "G2_TXC", EINT_NA, DRV_GRP1), -+ MT7623_PIN(268, "G2_RXC", EINT_NA, DRV_GRP1), -+ MT7623_PIN(269, "G2_RXD0", EINT_NA, DRV_GRP1), -+ MT7623_PIN(270, "G2_RXD1", EINT_NA, DRV_GRP1), -+ MT7623_PIN(271, "G2_RXD2", EINT_NA, DRV_GRP1), -+ MT7623_PIN(272, "G2_RXD3", EINT_NA, DRV_GRP1), -+ MT7623_PIN(273, "ESW_INT", 168, DRV_GRP1), -+ MT7623_PIN(274, "G2_RXDV", EINT_NA, DRV_GRP1), -+ MT7623_PIN(275, "MDC", EINT_NA, DRV_GRP1), -+ MT7623_PIN(276, "MDIO", EINT_NA, DRV_GRP1), -+ MT7623_PIN(277, "ESW_RST", EINT_NA, DRV_GRP1), -+ MT7623_PIN(278, "JTAG_RESET", 147, DRV_GRP3), -+ MT7623_PIN(279, "USB3_RES_BOND", EINT_NA, DRV_GRP1), -+}; -+ -+/* List all groups consisting of these pins dedicated to the enablement of -+ * certain hardware block and the corresponding mode for all of the pins. -+ * The hardware probably has multiple combinations of these pinouts. -+ */ -+ -+/* AUDIO EXT CLK */ -+static int mt7623_aud_ext_clk0_pins[] = { 208, }; -+static int mt7623_aud_ext_clk0_funcs[] = { 1, }; -+static int mt7623_aud_ext_clk1_pins[] = { 209, }; -+static int mt7623_aud_ext_clk1_funcs[] = { 1, }; -+ -+/* DISP PWM */ -+static int mt7623_disp_pwm_0_pins[] = { 72, }; -+static int mt7623_disp_pwm_0_funcs[] = { 5, }; -+static int mt7623_disp_pwm_1_pins[] = { 203, }; -+static int mt7623_disp_pwm_1_funcs[] = { 2, }; -+static int mt7623_disp_pwm_2_pins[] = { 208, }; -+static int mt7623_disp_pwm_2_funcs[] = { 5, }; -+ -+/* ESW */ -+static int mt7623_esw_int_pins[] = { 273, }; -+static int mt7623_esw_int_funcs[] = { 1, }; -+static int mt7623_esw_rst_pins[] = { 277, }; -+static int mt7623_esw_rst_funcs[] = { 1, }; -+ -+/* EPHY */ -+static int mt7623_ephy_pins[] = { 262, 263, 264, 265, 266, 267, 268, -+ 269, 270, 271, 272, 274, }; -+static int mt7623_ephy_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -+ -+/* EXT_SDIO */ -+static int mt7623_ext_sdio_pins[] = { 236, 237, 238, 239, 240, 241, }; -+static int mt7623_ext_sdio_funcs[] = { 1, 1, 1, 1, 1, 1, }; -+ -+/* HDMI RX */ -+static int mt7623_hdmi_rx_pins[] = { 247, 248, }; -+static int mt7623_hdmi_rx_funcs[] = { 1, 1 }; -+static int mt7623_hdmi_rx_i2c_pins[] = { 244, 245, }; -+static int mt7623_hdmi_rx_i2c_funcs[] = { 1, 1 }; -+ -+/* HDMI TX */ -+static int mt7623_hdmi_cec_pins[] = { 122, }; -+static int mt7623_hdmi_cec_funcs[] = { 1, }; -+static int mt7623_hdmi_htplg_pins[] = { 123, }; -+static int mt7623_hdmi_htplg_funcs[] = { 1, }; -+static int mt7623_hdmi_i2c_pins[] = { 124, 125, }; -+static int mt7623_hdmi_i2c_funcs[] = { 1, 1 }; -+ -+/* I2C */ -+static int mt7623_i2c0_pins[] = { 75, 76, }; -+static int mt7623_i2c0_funcs[] = { 1, 1, }; -+static int mt7623_i2c1_0_pins[] = { 57, 58, }; -+static int mt7623_i2c1_0_funcs[] = { 1, 1, }; -+static int mt7623_i2c1_1_pins[] = { 242, 243, }; -+static int mt7623_i2c1_1_funcs[] = { 4, 4, }; -+static int mt7623_i2c1_2_pins[] = { 85, 86, }; -+static int mt7623_i2c1_2_funcs[] = { 3, 3, }; -+static int mt7623_i2c1_3_pins[] = { 105, 106, }; -+static int mt7623_i2c1_3_funcs[] = { 3, 3, }; -+static int mt7623_i2c1_4_pins[] = { 124, 125, }; -+static int mt7623_i2c1_4_funcs[] = { 4, 4, }; -+static int mt7623_i2c2_0_pins[] = { 77, 78, }; -+static int mt7623_i2c2_0_funcs[] = { 1, 1, }; -+static int mt7623_i2c2_1_pins[] = { 89, 90, }; -+static int mt7623_i2c2_1_funcs[] = { 3, 3, }; -+static int mt7623_i2c2_2_pins[] = { 109, 110, }; -+static int mt7623_i2c2_2_funcs[] = { 3, 3, }; -+static int mt7623_i2c2_3_pins[] = { 122, 123, }; -+static int mt7623_i2c2_3_funcs[] = { 4, 4, }; -+ -+/* I2S */ -+static int mt7623_i2s0_pins[] = { 49, 72, 73, 74, 126, }; -+static int mt7623_i2s0_funcs[] = { 1, 1, 1, 1, 1, }; -+static int mt7623_i2s1_pins[] = { 33, 34, 35, 36, 37, }; -+static int mt7623_i2s1_funcs[] = { 1, 1, 1, 1, 1, }; -+static int mt7623_i2s2_bclk_lrclk_mclk_pins[] = { 50, 52, 188, }; -+static int mt7623_i2s2_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, }; -+static int mt7623_i2s2_data_in_pins[] = { 51, }; -+static int mt7623_i2s2_data_in_funcs[] = { 1, }; -+static int mt7623_i2s2_data_0_pins[] = { 203, }; -+static int mt7623_i2s2_data_0_funcs[] = { 9, }; -+static int mt7623_i2s2_data_1_pins[] = { 38, }; -+static int mt7623_i2s2_data_1_funcs[] = { 4, }; -+static int mt7623_i2s3_bclk_lrclk_mclk_pins[] = { 191, 192, 193, }; -+static int mt7623_i2s3_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, }; -+static int mt7623_i2s3_data_in_pins[] = { 190, }; -+static int mt7623_i2s3_data_in_funcs[] = { 1, }; -+static int mt7623_i2s3_data_0_pins[] = { 204, }; -+static int mt7623_i2s3_data_0_funcs[] = { 9, }; -+static int mt7623_i2s3_data_1_pins[] = { 2, }; -+static int mt7623_i2s3_data_1_funcs[] = { 0, }; -+static int mt7623_i2s4_pins[] = { 194, 195, 196, 197, 198, }; -+static int mt7623_i2s4_funcs[] = { 1, 1, 1, 1, 1, }; -+static int mt7623_i2s5_pins[] = { 16, 17, 30, 31, 32, }; -+static int mt7623_i2s5_funcs[] = { 1, 1, 1, 1, 1, }; -+ -+/* IR */ -+static int mt7623_ir_pins[] = { 46, }; -+static int mt7623_ir_funcs[] = { 1, }; -+ -+/* LCD */ -+static int mt7623_mipi_tx_pins[] = { 91, 92, 93, 94, 95, 96, 97, 98, -+ 99, 100, }; -+static int mt7623_mipi_tx_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -+static int mt7623_dsi_te_pins[] = { 84, }; -+static int mt7623_dsi_te_funcs[] = { 1, }; -+static int mt7623_lcm_rst_pins[] = { 83, }; -+static int mt7623_lcm_rst_funcs[] = { 1, }; -+ -+/* MDC/MDIO */ -+static int mt7623_mdc_mdio_pins[] = { 275, 276, }; -+static int mt7623_mdc_mdio_funcs[] = { 1, 1, }; -+ -+/* MSDC */ -+static int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118, -+ 119, 120, 121, }; -+static int mt7623_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -+static int mt7623_msdc1_pins[] = { 105, 106, 107, 108, 109, 110, }; -+static int mt7623_msdc1_funcs[] = { 1, 1, 1, 1, 1, 1, }; -+static int mt7623_msdc1_ins_pins[] = { 261, }; -+static int mt7623_msdc1_ins_funcs[] = { 1, }; -+static int mt7623_msdc1_wp_0_pins[] = { 29, }; -+static int mt7623_msdc1_wp_0_funcs[] = { 1, }; -+static int mt7623_msdc1_wp_1_pins[] = { 55, }; -+static int mt7623_msdc1_wp_1_funcs[] = { 3, }; -+static int mt7623_msdc1_wp_2_pins[] = { 209, }; -+static int mt7623_msdc1_wp_2_funcs[] = { 2, }; -+static int mt7623_msdc2_pins[] = { 85, 86, 87, 88, 89, 90, }; -+static int mt7623_msdc2_funcs[] = { 1, 1, 1, 1, 1, 1, }; -+static int mt7623_msdc3_pins[] = { 249, 250, 251, 252, 253, 254, 255, 256, -+ 257, 258, 259, 260, }; -+static int mt7623_msdc3_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -+ -+/* NAND */ -+static int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115, -+ 116, 117, 118, 119, 120, 121, }; -+static int mt7623_nandc_funcs[] = { 1, 1, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4, -+ 4, 4, }; -+static int mt7623_nandc_ceb0_pins[] = { 45, }; -+static int mt7623_nandc_ceb0_funcs[] = { 1, }; -+static int mt7623_nandc_ceb1_pins[] = { 44, }; -+static int mt7623_nandc_ceb1_funcs[] = { 1, }; -+ -+/* RTC */ -+static int mt7623_rtc_pins[] = { 10, }; -+static int mt7623_rtc_funcs[] = { 1, }; -+ -+/* OTG */ -+static int mt7623_otg_iddig0_0_pins[] = { 29, }; -+static int mt7623_otg_iddig0_0_funcs[] = { 1, }; -+static int mt7623_otg_iddig0_1_pins[] = { 44, }; -+static int mt7623_otg_iddig0_1_funcs[] = { 2, }; -+static int mt7623_otg_iddig0_2_pins[] = { 236, }; -+static int mt7623_otg_iddig0_2_funcs[] = { 2, }; -+static int mt7623_otg_iddig1_0_pins[] = { 27, }; -+static int mt7623_otg_iddig1_0_funcs[] = { 2, }; -+static int mt7623_otg_iddig1_1_pins[] = { 47, }; -+static int mt7623_otg_iddig1_1_funcs[] = { 2, }; -+static int mt7623_otg_iddig1_2_pins[] = { 238, }; -+static int mt7623_otg_iddig1_2_funcs[] = { 2, }; -+static int mt7623_otg_drv_vbus0_0_pins[] = { 28, }; -+static int mt7623_otg_drv_vbus0_0_funcs[] = { 1, }; -+static int mt7623_otg_drv_vbus0_1_pins[] = { 45, }; -+static int mt7623_otg_drv_vbus0_1_funcs[] = { 2, }; -+static int mt7623_otg_drv_vbus0_2_pins[] = { 237, }; -+static int mt7623_otg_drv_vbus0_2_funcs[] = { 2, }; -+static int mt7623_otg_drv_vbus1_0_pins[] = { 26, }; -+static int mt7623_otg_drv_vbus1_0_funcs[] = { 2, }; -+static int mt7623_otg_drv_vbus1_1_pins[] = { 48, }; -+static int mt7623_otg_drv_vbus1_1_funcs[] = { 2, }; -+static int mt7623_otg_drv_vbus1_2_pins[] = { 239, }; -+static int mt7623_otg_drv_vbus1_2_funcs[] = { 2, }; -+ -+/* PCIE */ -+static int mt7623_pcie0_0_perst_pins[] = { 208, }; -+static int mt7623_pcie0_0_perst_funcs[] = { 3, }; -+static int mt7623_pcie0_1_perst_pins[] = { 22, }; -+static int mt7623_pcie0_1_perst_funcs[] = { 2, }; -+static int mt7623_pcie1_0_perst_pins[] = { 209, }; -+static int mt7623_pcie1_0_perst_funcs[] = { 3, }; -+static int mt7623_pcie1_1_perst_pins[] = { 23, }; -+static int mt7623_pcie1_1_perst_funcs[] = { 2, }; -+static int mt7623_pcie2_0_perst_pins[] = { 24, }; -+static int mt7623_pcie2_0_perst_funcs[] = { 2, }; -+static int mt7623_pcie2_1_perst_pins[] = { 29, }; -+static int mt7623_pcie2_1_perst_funcs[] = { 6, }; -+static int mt7623_pcie0_0_wake_pins[] = { 28, }; -+static int mt7623_pcie0_0_wake_funcs[] = { 6, }; -+static int mt7623_pcie0_1_wake_pins[] = { 251, }; -+static int mt7623_pcie0_1_wake_funcs[] = { 6, }; -+static int mt7623_pcie1_0_wake_pins[] = { 27, }; -+static int mt7623_pcie1_0_wake_funcs[] = { 6, }; -+static int mt7623_pcie1_1_wake_pins[] = { 253, }; -+static int mt7623_pcie1_1_wake_funcs[] = { 6, }; -+static int mt7623_pcie2_0_wake_pins[] = { 26, }; -+static int mt7623_pcie2_0_wake_funcs[] = { 6, }; -+static int mt7623_pcie2_1_wake_pins[] = { 255, }; -+static int mt7623_pcie2_1_wake_funcs[] = { 6, }; -+static int mt7623_pcie0_clkreq_pins[] = { 250, }; -+static int mt7623_pcie0_clkreq_funcs[] = { 6, }; -+static int mt7623_pcie1_clkreq_pins[] = { 252, }; -+static int mt7623_pcie1_clkreq_funcs[] = { 6, }; -+static int mt7623_pcie2_clkreq_pins[] = { 254, }; -+static int mt7623_pcie2_clkreq_funcs[] = { 6, }; -+ -+/* the pcie_*_rev are only used for MT7623 */ -+static int mt7623_pcie0_0_rev_perst_pins[] = { 208, }; -+static int mt7623_pcie0_0_rev_perst_funcs[] = { 11, }; -+static int mt7623_pcie0_1_rev_perst_pins[] = { 22, }; -+static int mt7623_pcie0_1_rev_perst_funcs[] = { 10, }; -+static int mt7623_pcie1_0_rev_perst_pins[] = { 209, }; -+static int mt7623_pcie1_0_rev_perst_funcs[] = { 11, }; -+static int mt7623_pcie1_1_rev_perst_pins[] = { 23, }; -+static int mt7623_pcie1_1_rev_perst_funcs[] = { 10, }; -+static int mt7623_pcie2_0_rev_perst_pins[] = { 24, }; -+static int mt7623_pcie2_0_rev_perst_funcs[] = { 11, }; -+static int mt7623_pcie2_1_rev_perst_pins[] = { 29, }; -+static int mt7623_pcie2_1_rev_perst_funcs[] = { 14, }; -+ -+/* PCM */ -+static int mt7623_pcm_clk_0_pins[] = { 18, }; -+static int mt7623_pcm_clk_0_funcs[] = { 1, }; -+static int mt7623_pcm_clk_1_pins[] = { 17, }; -+static int mt7623_pcm_clk_1_funcs[] = { 3, }; -+static int mt7623_pcm_clk_2_pins[] = { 35, }; -+static int mt7623_pcm_clk_2_funcs[] = { 3, }; -+static int mt7623_pcm_clk_3_pins[] = { 50, }; -+static int mt7623_pcm_clk_3_funcs[] = { 3, }; -+static int mt7623_pcm_clk_4_pins[] = { 74, }; -+static int mt7623_pcm_clk_4_funcs[] = { 3, }; -+static int mt7623_pcm_clk_5_pins[] = { 191, }; -+static int mt7623_pcm_clk_5_funcs[] = { 3, }; -+static int mt7623_pcm_clk_6_pins[] = { 196, }; -+static int mt7623_pcm_clk_6_funcs[] = { 3, }; -+static int mt7623_pcm_sync_0_pins[] = { 19, }; -+static int mt7623_pcm_sync_0_funcs[] = { 1, }; -+static int mt7623_pcm_sync_1_pins[] = { 30, }; -+static int mt7623_pcm_sync_1_funcs[] = { 3, }; -+static int mt7623_pcm_sync_2_pins[] = { 36, }; -+static int mt7623_pcm_sync_2_funcs[] = { 3, }; -+static int mt7623_pcm_sync_3_pins[] = { 52, }; -+static int mt7623_pcm_sync_3_funcs[] = { 31, }; -+static int mt7623_pcm_sync_4_pins[] = { 73, }; -+static int mt7623_pcm_sync_4_funcs[] = { 3, }; -+static int mt7623_pcm_sync_5_pins[] = { 192, }; -+static int mt7623_pcm_sync_5_funcs[] = { 3, }; -+static int mt7623_pcm_sync_6_pins[] = { 197, }; -+static int mt7623_pcm_sync_6_funcs[] = { 3, }; -+static int mt7623_pcm_rx_0_pins[] = { 20, }; -+static int mt7623_pcm_rx_0_funcs[] = { 1, }; -+static int mt7623_pcm_rx_1_pins[] = { 16, }; -+static int mt7623_pcm_rx_1_funcs[] = { 3, }; -+static int mt7623_pcm_rx_2_pins[] = { 34, }; -+static int mt7623_pcm_rx_2_funcs[] = { 3, }; -+static int mt7623_pcm_rx_3_pins[] = { 51, }; -+static int mt7623_pcm_rx_3_funcs[] = { 3, }; -+static int mt7623_pcm_rx_4_pins[] = { 72, }; -+static int mt7623_pcm_rx_4_funcs[] = { 3, }; -+static int mt7623_pcm_rx_5_pins[] = { 190, }; -+static int mt7623_pcm_rx_5_funcs[] = { 3, }; -+static int mt7623_pcm_rx_6_pins[] = { 195, }; -+static int mt7623_pcm_rx_6_funcs[] = { 3, }; -+static int mt7623_pcm_tx_0_pins[] = { 21, }; -+static int mt7623_pcm_tx_0_funcs[] = { 1, }; -+static int mt7623_pcm_tx_1_pins[] = { 32, }; -+static int mt7623_pcm_tx_1_funcs[] = { 3, }; -+static int mt7623_pcm_tx_2_pins[] = { 33, }; -+static int mt7623_pcm_tx_2_funcs[] = { 3, }; -+static int mt7623_pcm_tx_3_pins[] = { 38, }; -+static int mt7623_pcm_tx_3_funcs[] = { 3, }; -+static int mt7623_pcm_tx_4_pins[] = { 49, }; -+static int mt7623_pcm_tx_4_funcs[] = { 3, }; -+static int mt7623_pcm_tx_5_pins[] = { 189, }; -+static int mt7623_pcm_tx_5_funcs[] = { 3, }; -+static int mt7623_pcm_tx_6_pins[] = { 194, }; -+static int mt7623_pcm_tx_6_funcs[] = { 3, }; -+ -+/* PWM */ -+static int mt7623_pwm_ch1_0_pins[] = { 203, }; -+static int mt7623_pwm_ch1_0_funcs[] = { 1, }; -+static int mt7623_pwm_ch1_1_pins[] = { 208, }; -+static int mt7623_pwm_ch1_1_funcs[] = { 2, }; -+static int mt7623_pwm_ch1_2_pins[] = { 72, }; -+static int mt7623_pwm_ch1_2_funcs[] = { 4, }; -+static int mt7623_pwm_ch1_3_pins[] = { 88, }; -+static int mt7623_pwm_ch1_3_funcs[] = { 3, }; -+static int mt7623_pwm_ch1_4_pins[] = { 108, }; -+static int mt7623_pwm_ch1_4_funcs[] = { 3, }; -+static int mt7623_pwm_ch2_0_pins[] = { 204, }; -+static int mt7623_pwm_ch2_0_funcs[] = { 1, }; -+static int mt7623_pwm_ch2_1_pins[] = { 53, }; -+static int mt7623_pwm_ch2_1_funcs[] = { 5, }; -+static int mt7623_pwm_ch2_2_pins[] = { 88, }; -+static int mt7623_pwm_ch2_2_funcs[] = { 6, }; -+static int mt7623_pwm_ch2_3_pins[] = { 108, }; -+static int mt7623_pwm_ch2_3_funcs[] = { 6, }; -+static int mt7623_pwm_ch2_4_pins[] = { 209, }; -+static int mt7623_pwm_ch2_4_funcs[] = { 5, }; -+static int mt7623_pwm_ch3_0_pins[] = { 205, }; -+static int mt7623_pwm_ch3_0_funcs[] = { 1, }; -+static int mt7623_pwm_ch3_1_pins[] = { 55, }; -+static int mt7623_pwm_ch3_1_funcs[] = { 5, }; -+static int mt7623_pwm_ch3_2_pins[] = { 89, }; -+static int mt7623_pwm_ch3_2_funcs[] = { 6, }; -+static int mt7623_pwm_ch3_3_pins[] = { 109, }; -+static int mt7623_pwm_ch3_3_funcs[] = { 6, }; -+static int mt7623_pwm_ch4_0_pins[] = { 206, }; -+static int mt7623_pwm_ch4_0_funcs[] = { 1, }; -+static int mt7623_pwm_ch4_1_pins[] = { 90, }; -+static int mt7623_pwm_ch4_1_funcs[] = { 6, }; -+static int mt7623_pwm_ch4_2_pins[] = { 110, }; -+static int mt7623_pwm_ch4_2_funcs[] = { 6, }; -+static int mt7623_pwm_ch4_3_pins[] = { 124, }; -+static int mt7623_pwm_ch4_3_funcs[] = { 5, }; -+static int mt7623_pwm_ch5_0_pins[] = { 207, }; -+static int mt7623_pwm_ch5_0_funcs[] = { 1, }; -+static int mt7623_pwm_ch5_1_pins[] = { 125, }; -+static int mt7623_pwm_ch5_1_funcs[] = { 5, }; -+ -+/* PWRAP */ -+static int mt7623_pwrap_pins[] = { 0, 1, 2, 3, 4, 5, 6, }; -+static int mt7623_pwrap_funcs[] = { 1, 1, 1, 1, 1, 1, 1, }; -+ -+/* SPDIF */ -+static int mt7623_spdif_in0_0_pins[] = { 56, }; -+static int mt7623_spdif_in0_0_funcs[] = { 3, }; -+static int mt7623_spdif_in0_1_pins[] = { 201, }; -+static int mt7623_spdif_in0_1_funcs[] = { 1, }; -+static int mt7623_spdif_in1_0_pins[] = { 54, }; -+static int mt7623_spdif_in1_0_funcs[] = { 3, }; -+static int mt7623_spdif_in1_1_pins[] = { 202, }; -+static int mt7623_spdif_in1_1_funcs[] = { 1, }; -+static int mt7623_spdif_out_pins[] = { 202, }; -+static int mt7623_spdif_out_funcs[] = { 1, }; -+ -+/* SPI */ -+static int mt7623_spi0_pins[] = { 53, 54, 55, 56, }; -+static int mt7623_spi0_funcs[] = { 1, 1, 1, 1, }; -+static int mt7623_spi1_pins[] = { 7, 199, 8, 9, }; -+static int mt7623_spi1_funcs[] = { 1, 1, 1, 1, }; -+static int mt7623_spi2_pins[] = { 101, 104, 102, 103, }; -+static int mt7623_spi2_funcs[] = { 1, 1, 1, 1, }; -+ -+/* UART */ -+static int mt7623_uart0_0_txd_rxd_pins[] = { 79, 80, }; -+static int mt7623_uart0_0_txd_rxd_funcs[] = { 1, 1, }; -+static int mt7623_uart0_1_txd_rxd_pins[] = { 87, 88, }; -+static int mt7623_uart0_1_txd_rxd_funcs[] = { 5, 5, }; -+static int mt7623_uart0_2_txd_rxd_pins[] = { 107, 108, }; -+static int mt7623_uart0_2_txd_rxd_funcs[] = { 5, 5, }; -+static int mt7623_uart0_3_txd_rxd_pins[] = { 123, 122, }; -+static int mt7623_uart0_3_txd_rxd_funcs[] = { 5, 5, }; -+static int mt7623_uart0_rts_cts_pins[] = { 22, 23, }; -+static int mt7623_uart0_rts_cts_funcs[] = { 1, 1, }; -+static int mt7623_uart1_0_txd_rxd_pins[] = { 81, 82, }; -+static int mt7623_uart1_0_txd_rxd_funcs[] = { 1, 1, }; -+static int mt7623_uart1_1_txd_rxd_pins[] = { 89, 90, }; -+static int mt7623_uart1_1_txd_rxd_funcs[] = { 5, 5, }; -+static int mt7623_uart1_2_txd_rxd_pins[] = { 109, 110, }; -+static int mt7623_uart1_2_txd_rxd_funcs[] = { 5, 5, }; -+static int mt7623_uart1_rts_cts_pins[] = { 24, 25, }; -+static int mt7623_uart1_rts_cts_funcs[] = { 1, 1, }; -+static int mt7623_uart2_0_txd_rxd_pins[] = { 14, 15, }; -+static int mt7623_uart2_0_txd_rxd_funcs[] = { 1, 1, }; -+static int mt7623_uart2_1_txd_rxd_pins[] = { 200, 201, }; -+static int mt7623_uart2_1_txd_rxd_funcs[] = { 6, 6, }; -+static int mt7623_uart2_rts_cts_pins[] = { 242, 243, }; -+static int mt7623_uart2_rts_cts_funcs[] = { 1, 1, }; -+static int mt7623_uart3_txd_rxd_pins[] = { 242, 243, }; -+static int mt7623_uart3_txd_rxd_funcs[] = { 2, 2, }; -+static int mt7623_uart3_rts_cts_pins[] = { 26, 27, }; -+static int mt7623_uart3_rts_cts_funcs[] = { 1, 1, }; -+ -+/* Watchdog */ -+static int mt7623_watchdog_0_pins[] = { 11, }; -+static int mt7623_watchdog_0_funcs[] = { 1, }; -+static int mt7623_watchdog_1_pins[] = { 121, }; -+static int mt7623_watchdog_1_funcs[] = { 5, }; -+ -+static const struct group_desc mt7623_groups[] = { -+ PINCTRL_PIN_GROUP("aud_ext_clk0", mt7623_aud_ext_clk0), -+ PINCTRL_PIN_GROUP("aud_ext_clk1", mt7623_aud_ext_clk1), -+ PINCTRL_PIN_GROUP("dsi_te", mt7623_dsi_te), -+ PINCTRL_PIN_GROUP("disp_pwm_0", mt7623_disp_pwm_0), -+ PINCTRL_PIN_GROUP("disp_pwm_1", mt7623_disp_pwm_1), -+ PINCTRL_PIN_GROUP("disp_pwm_2", mt7623_disp_pwm_2), -+ PINCTRL_PIN_GROUP("ephy", mt7623_ephy), -+ PINCTRL_PIN_GROUP("esw_int", mt7623_esw_int), -+ PINCTRL_PIN_GROUP("esw_rst", mt7623_esw_rst), -+ PINCTRL_PIN_GROUP("ext_sdio", mt7623_ext_sdio), -+ PINCTRL_PIN_GROUP("hdmi_cec", mt7623_hdmi_cec), -+ PINCTRL_PIN_GROUP("hdmi_htplg", mt7623_hdmi_htplg), -+ PINCTRL_PIN_GROUP("hdmi_i2c", mt7623_hdmi_i2c), -+ PINCTRL_PIN_GROUP("hdmi_rx", mt7623_hdmi_rx), -+ PINCTRL_PIN_GROUP("hdmi_rx_i2c", mt7623_hdmi_rx_i2c), -+ PINCTRL_PIN_GROUP("i2c0", mt7623_i2c0), -+ PINCTRL_PIN_GROUP("i2c1_0", mt7623_i2c1_0), -+ PINCTRL_PIN_GROUP("i2c1_1", mt7623_i2c1_1), -+ PINCTRL_PIN_GROUP("i2c1_2", mt7623_i2c1_2), -+ PINCTRL_PIN_GROUP("i2c1_3", mt7623_i2c1_3), -+ PINCTRL_PIN_GROUP("i2c1_4", mt7623_i2c1_4), -+ PINCTRL_PIN_GROUP("i2c2_0", mt7623_i2c2_0), -+ PINCTRL_PIN_GROUP("i2c2_1", mt7623_i2c2_1), -+ PINCTRL_PIN_GROUP("i2c2_2", mt7623_i2c2_2), -+ PINCTRL_PIN_GROUP("i2c2_3", mt7623_i2c2_3), -+ PINCTRL_PIN_GROUP("i2s0", mt7623_i2s0), -+ PINCTRL_PIN_GROUP("i2s1", mt7623_i2s1), -+ PINCTRL_PIN_GROUP("i2s4", mt7623_i2s4), -+ PINCTRL_PIN_GROUP("i2s5", mt7623_i2s5), -+ PINCTRL_PIN_GROUP("i2s2_bclk_lrclk_mclk", mt7623_i2s2_bclk_lrclk_mclk), -+ PINCTRL_PIN_GROUP("i2s3_bclk_lrclk_mclk", mt7623_i2s3_bclk_lrclk_mclk), -+ PINCTRL_PIN_GROUP("i2s2_data_in", mt7623_i2s2_data_in), -+ PINCTRL_PIN_GROUP("i2s3_data_in", mt7623_i2s3_data_in), -+ PINCTRL_PIN_GROUP("i2s2_data_0", mt7623_i2s2_data_0), -+ PINCTRL_PIN_GROUP("i2s2_data_1", mt7623_i2s2_data_1), -+ PINCTRL_PIN_GROUP("i2s3_data_0", mt7623_i2s3_data_0), -+ PINCTRL_PIN_GROUP("i2s3_data_1", mt7623_i2s3_data_1), -+ PINCTRL_PIN_GROUP("ir", mt7623_ir), -+ PINCTRL_PIN_GROUP("lcm_rst", mt7623_lcm_rst), -+ PINCTRL_PIN_GROUP("mdc_mdio", mt7623_mdc_mdio), -+ PINCTRL_PIN_GROUP("mipi_tx", mt7623_mipi_tx), -+ PINCTRL_PIN_GROUP("msdc0", mt7623_msdc0), -+ PINCTRL_PIN_GROUP("msdc1", mt7623_msdc1), -+ PINCTRL_PIN_GROUP("msdc1_ins", mt7623_msdc1_ins), -+ PINCTRL_PIN_GROUP("msdc1_wp_0", mt7623_msdc1_wp_0), -+ PINCTRL_PIN_GROUP("msdc1_wp_1", mt7623_msdc1_wp_1), -+ PINCTRL_PIN_GROUP("msdc1_wp_2", mt7623_msdc1_wp_2), -+ PINCTRL_PIN_GROUP("msdc2", mt7623_msdc2), -+ PINCTRL_PIN_GROUP("msdc3", mt7623_msdc3), -+ PINCTRL_PIN_GROUP("nandc", mt7623_nandc), -+ PINCTRL_PIN_GROUP("nandc_ceb0", mt7623_nandc_ceb0), -+ PINCTRL_PIN_GROUP("nandc_ceb1", mt7623_nandc_ceb1), -+ PINCTRL_PIN_GROUP("otg_iddig0_0", mt7623_otg_iddig0_0), -+ PINCTRL_PIN_GROUP("otg_iddig0_1", mt7623_otg_iddig0_1), -+ PINCTRL_PIN_GROUP("otg_iddig0_2", mt7623_otg_iddig0_2), -+ PINCTRL_PIN_GROUP("otg_iddig1_0", mt7623_otg_iddig1_0), -+ PINCTRL_PIN_GROUP("otg_iddig1_1", mt7623_otg_iddig1_1), -+ PINCTRL_PIN_GROUP("otg_iddig1_2", mt7623_otg_iddig1_2), -+ PINCTRL_PIN_GROUP("otg_drv_vbus0_0", mt7623_otg_drv_vbus0_0), -+ PINCTRL_PIN_GROUP("otg_drv_vbus0_1", mt7623_otg_drv_vbus0_1), -+ PINCTRL_PIN_GROUP("otg_drv_vbus0_2", mt7623_otg_drv_vbus0_2), -+ PINCTRL_PIN_GROUP("otg_drv_vbus1_0", mt7623_otg_drv_vbus1_0), -+ PINCTRL_PIN_GROUP("otg_drv_vbus1_1", mt7623_otg_drv_vbus1_1), -+ PINCTRL_PIN_GROUP("otg_drv_vbus1_2", mt7623_otg_drv_vbus1_2), -+ PINCTRL_PIN_GROUP("pcie0_0_perst", mt7623_pcie0_0_perst), -+ PINCTRL_PIN_GROUP("pcie0_1_perst", mt7623_pcie0_1_perst), -+ PINCTRL_PIN_GROUP("pcie1_0_perst", mt7623_pcie1_0_perst), -+ PINCTRL_PIN_GROUP("pcie1_1_perst", mt7623_pcie1_1_perst), -+ PINCTRL_PIN_GROUP("pcie1_1_perst", mt7623_pcie1_1_perst), -+ PINCTRL_PIN_GROUP("pcie0_0_rev_perst", mt7623_pcie0_0_rev_perst), -+ PINCTRL_PIN_GROUP("pcie0_1_rev_perst", mt7623_pcie0_1_rev_perst), -+ PINCTRL_PIN_GROUP("pcie1_0_rev_perst", mt7623_pcie1_0_rev_perst), -+ PINCTRL_PIN_GROUP("pcie1_1_rev_perst", mt7623_pcie1_1_rev_perst), -+ PINCTRL_PIN_GROUP("pcie2_0_rev_perst", mt7623_pcie2_0_rev_perst), -+ PINCTRL_PIN_GROUP("pcie2_1_rev_perst", mt7623_pcie2_1_rev_perst), -+ PINCTRL_PIN_GROUP("pcie2_0_perst", mt7623_pcie2_0_perst), -+ PINCTRL_PIN_GROUP("pcie2_1_perst", mt7623_pcie2_1_perst), -+ PINCTRL_PIN_GROUP("pcie0_0_wake", mt7623_pcie0_0_wake), -+ PINCTRL_PIN_GROUP("pcie0_1_wake", mt7623_pcie0_1_wake), -+ PINCTRL_PIN_GROUP("pcie1_0_wake", mt7623_pcie1_0_wake), -+ PINCTRL_PIN_GROUP("pcie1_1_wake", mt7623_pcie1_1_wake), -+ PINCTRL_PIN_GROUP("pcie2_0_wake", mt7623_pcie2_0_wake), -+ PINCTRL_PIN_GROUP("pcie2_1_wake", mt7623_pcie2_1_wake), -+ PINCTRL_PIN_GROUP("pcie0_clkreq", mt7623_pcie0_clkreq), -+ PINCTRL_PIN_GROUP("pcie1_clkreq", mt7623_pcie1_clkreq), -+ PINCTRL_PIN_GROUP("pcie2_clkreq", mt7623_pcie2_clkreq), -+ PINCTRL_PIN_GROUP("pcm_clk_0", mt7623_pcm_clk_0), -+ PINCTRL_PIN_GROUP("pcm_clk_1", mt7623_pcm_clk_1), -+ PINCTRL_PIN_GROUP("pcm_clk_2", mt7623_pcm_clk_2), -+ PINCTRL_PIN_GROUP("pcm_clk_3", mt7623_pcm_clk_3), -+ PINCTRL_PIN_GROUP("pcm_clk_4", mt7623_pcm_clk_4), -+ PINCTRL_PIN_GROUP("pcm_clk_5", mt7623_pcm_clk_5), -+ PINCTRL_PIN_GROUP("pcm_clk_6", mt7623_pcm_clk_6), -+ PINCTRL_PIN_GROUP("pcm_sync_0", mt7623_pcm_sync_0), -+ PINCTRL_PIN_GROUP("pcm_sync_1", mt7623_pcm_sync_1), -+ PINCTRL_PIN_GROUP("pcm_sync_2", mt7623_pcm_sync_2), -+ PINCTRL_PIN_GROUP("pcm_sync_3", mt7623_pcm_sync_3), -+ PINCTRL_PIN_GROUP("pcm_sync_4", mt7623_pcm_sync_4), -+ PINCTRL_PIN_GROUP("pcm_sync_5", mt7623_pcm_sync_5), -+ PINCTRL_PIN_GROUP("pcm_sync_6", mt7623_pcm_sync_6), -+ PINCTRL_PIN_GROUP("pcm_rx_0", mt7623_pcm_rx_0), -+ PINCTRL_PIN_GROUP("pcm_rx_1", mt7623_pcm_rx_1), -+ PINCTRL_PIN_GROUP("pcm_rx_2", mt7623_pcm_rx_2), -+ PINCTRL_PIN_GROUP("pcm_rx_3", mt7623_pcm_rx_3), -+ PINCTRL_PIN_GROUP("pcm_rx_4", mt7623_pcm_rx_4), -+ PINCTRL_PIN_GROUP("pcm_rx_5", mt7623_pcm_rx_5), -+ PINCTRL_PIN_GROUP("pcm_rx_6", mt7623_pcm_rx_6), -+ PINCTRL_PIN_GROUP("pcm_tx_0", mt7623_pcm_tx_0), -+ PINCTRL_PIN_GROUP("pcm_tx_1", mt7623_pcm_tx_1), -+ PINCTRL_PIN_GROUP("pcm_tx_2", mt7623_pcm_tx_2), -+ PINCTRL_PIN_GROUP("pcm_tx_3", mt7623_pcm_tx_3), -+ PINCTRL_PIN_GROUP("pcm_tx_4", mt7623_pcm_tx_4), -+ PINCTRL_PIN_GROUP("pcm_tx_5", mt7623_pcm_tx_5), -+ PINCTRL_PIN_GROUP("pcm_tx_6", mt7623_pcm_tx_6), -+ PINCTRL_PIN_GROUP("pwm_ch1_0", mt7623_pwm_ch1_0), -+ PINCTRL_PIN_GROUP("pwm_ch1_1", mt7623_pwm_ch1_1), -+ PINCTRL_PIN_GROUP("pwm_ch1_2", mt7623_pwm_ch1_2), -+ PINCTRL_PIN_GROUP("pwm_ch1_3", mt7623_pwm_ch1_3), -+ PINCTRL_PIN_GROUP("pwm_ch1_4", mt7623_pwm_ch1_4), -+ PINCTRL_PIN_GROUP("pwm_ch2_0", mt7623_pwm_ch2_0), -+ PINCTRL_PIN_GROUP("pwm_ch2_1", mt7623_pwm_ch2_1), -+ PINCTRL_PIN_GROUP("pwm_ch2_2", mt7623_pwm_ch2_2), -+ PINCTRL_PIN_GROUP("pwm_ch2_3", mt7623_pwm_ch2_3), -+ PINCTRL_PIN_GROUP("pwm_ch2_4", mt7623_pwm_ch2_4), -+ PINCTRL_PIN_GROUP("pwm_ch3_0", mt7623_pwm_ch3_0), -+ PINCTRL_PIN_GROUP("pwm_ch3_1", mt7623_pwm_ch3_1), -+ PINCTRL_PIN_GROUP("pwm_ch3_2", mt7623_pwm_ch3_2), -+ PINCTRL_PIN_GROUP("pwm_ch3_3", mt7623_pwm_ch3_3), -+ PINCTRL_PIN_GROUP("pwm_ch4_0", mt7623_pwm_ch4_0), -+ PINCTRL_PIN_GROUP("pwm_ch4_1", mt7623_pwm_ch4_1), -+ PINCTRL_PIN_GROUP("pwm_ch4_2", mt7623_pwm_ch4_2), -+ PINCTRL_PIN_GROUP("pwm_ch4_3", mt7623_pwm_ch4_3), -+ PINCTRL_PIN_GROUP("pwm_ch5_0", mt7623_pwm_ch5_0), -+ PINCTRL_PIN_GROUP("pwm_ch5_1", mt7623_pwm_ch5_1), -+ PINCTRL_PIN_GROUP("pwrap", mt7623_pwrap), -+ PINCTRL_PIN_GROUP("rtc", mt7623_rtc), -+ PINCTRL_PIN_GROUP("spdif_in0_0", mt7623_spdif_in0_0), -+ PINCTRL_PIN_GROUP("spdif_in0_1", mt7623_spdif_in0_1), -+ PINCTRL_PIN_GROUP("spdif_in1_0", mt7623_spdif_in1_0), -+ PINCTRL_PIN_GROUP("spdif_in1_1", mt7623_spdif_in1_1), -+ PINCTRL_PIN_GROUP("spdif_out", mt7623_spdif_out), -+ PINCTRL_PIN_GROUP("spi0", mt7623_spi0), -+ PINCTRL_PIN_GROUP("spi1", mt7623_spi1), -+ PINCTRL_PIN_GROUP("spi2", mt7623_spi2), -+ PINCTRL_PIN_GROUP("uart0_0_txd_rxd", mt7623_uart0_0_txd_rxd), -+ PINCTRL_PIN_GROUP("uart0_1_txd_rxd", mt7623_uart0_1_txd_rxd), -+ PINCTRL_PIN_GROUP("uart0_2_txd_rxd", mt7623_uart0_2_txd_rxd), -+ PINCTRL_PIN_GROUP("uart0_3_txd_rxd", mt7623_uart0_3_txd_rxd), -+ PINCTRL_PIN_GROUP("uart1_0_txd_rxd", mt7623_uart1_0_txd_rxd), -+ PINCTRL_PIN_GROUP("uart1_1_txd_rxd", mt7623_uart1_1_txd_rxd), -+ PINCTRL_PIN_GROUP("uart1_2_txd_rxd", mt7623_uart1_2_txd_rxd), -+ PINCTRL_PIN_GROUP("uart2_0_txd_rxd", mt7623_uart2_0_txd_rxd), -+ PINCTRL_PIN_GROUP("uart2_1_txd_rxd", mt7623_uart2_1_txd_rxd), -+ PINCTRL_PIN_GROUP("uart3_txd_rxd", mt7623_uart3_txd_rxd), -+ PINCTRL_PIN_GROUP("uart0_rts_cts", mt7623_uart0_rts_cts), -+ PINCTRL_PIN_GROUP("uart1_rts_cts", mt7623_uart1_rts_cts), -+ PINCTRL_PIN_GROUP("uart2_rts_cts", mt7623_uart2_rts_cts), -+ PINCTRL_PIN_GROUP("uart3_rts_cts", mt7623_uart3_rts_cts), -+ PINCTRL_PIN_GROUP("watchdog_0", mt7623_watchdog_0), -+ PINCTRL_PIN_GROUP("watchdog_1", mt7623_watchdog_1), -+}; -+ -+/* Joint those groups owning the same capability in user point of view which -+ * allows that people tend to use through the device tree. -+ */ -+static const char *mt7623_aud_clk_groups[] = { "aud_ext_clk0", -+ "aud_ext_clk1", }; -+static const char *mt7623_disp_pwm_groups[] = { "disp_pwm_0", "disp_pwm_1", -+ "disp_pwm_2", }; -+static const char *mt7623_ethernet_groups[] = { "esw_int", "esw_rst", -+ "ephy", "mdc_mdio", }; -+static const char *mt7623_ext_sdio_groups[] = { "ext_sdio", }; -+static const char *mt7623_hdmi_groups[] = { "hdmi_cec", "hdmi_htplg", -+ "hdmi_i2c", "hdmi_rx", -+ "hdmi_rx_i2c", }; -+static const char *mt7623_i2c_groups[] = { "i2c0", "i2c1_0", "i2c1_1", -+ "i2c1_2", "i2c1_3", "i2c1_4", -+ "i2c2_0", "i2c2_1", "i2c2_2", -+ "i2c2_3", }; -+static const char *mt7623_i2s_groups[] = { "i2s0", "i2s1", -+ "i2s2_bclk_lrclk_mclk", -+ "i2s3_bclk_lrclk_mclk", -+ "i2s4", "i2s5", -+ "i2s2_data_in", "i2s3_data_in", -+ "i2s2_data_0", "i2s2_data_1", -+ "i2s3_data_0", "i2s3_data_1", }; -+static const char *mt7623_ir_groups[] = { "ir", }; -+static const char *mt7623_lcd_groups[] = { "dsi_te", "lcm_rst", "mipi_tx", }; -+static const char *mt7623_msdc_groups[] = { "msdc0", "msdc1", "msdc1_ins", -+ "msdc1_wp_0", "msdc1_wp_1", -+ "msdc1_wp_2", "msdc2", -+ "msdc3", }; -+static const char *mt7623_nandc_groups[] = { "nandc", "nandc_ceb0", -+ "nandc_ceb1", }; -+static const char *mt7623_otg_groups[] = { "otg_iddig0_0", "otg_iddig0_1", -+ "otg_iddig0_2", "otg_iddig1_0", -+ "otg_iddig1_1", "otg_iddig1_2", -+ "otg_drv_vbus0_0", -+ "otg_drv_vbus0_1", -+ "otg_drv_vbus0_2", -+ "otg_drv_vbus1_0", -+ "otg_drv_vbus1_1", -+ "otg_drv_vbus1_2", }; -+static const char *mt7623_pcie_groups[] = { "pcie0_0_perst", "pcie0_1_perst", -+ "pcie1_0_perst", "pcie1_1_perst", -+ "pcie2_0_perst", "pcie2_1_perst", -+ "pcie0_0_rev_perst", -+ "pcie0_1_rev_perst", -+ "pcie1_0_rev_perst", -+ "pcie1_1_rev_perst", -+ "pcie2_0_rev_perst", -+ "pcie2_1_rev_perst", -+ "pcie0_0_wake", "pcie0_1_wake", -+ "pcie2_0_wake", "pcie2_1_wake", -+ "pcie0_clkreq", "pcie1_clkreq", -+ "pcie2_clkreq", }; -+static const char *mt7623_pcm_groups[] = { "pcm_clk_0", "pcm_clk_1", -+ "pcm_clk_2", "pcm_clk_3", -+ "pcm_clk_4", "pcm_clk_5", -+ "pcm_clk_6", "pcm_sync_0", -+ "pcm_sync_1", "pcm_sync_2", -+ "pcm_sync_3", "pcm_sync_4", -+ "pcm_sync_5", "pcm_sync_6", -+ "pcm_rx_0", "pcm_rx_1", -+ "pcm_rx_2", "pcm_rx_3", -+ "pcm_rx_4", "pcm_rx_5", -+ "pcm_rx_6", "pcm_tx_0", -+ "pcm_tx_1", "pcm_tx_2", -+ "pcm_tx_3", "pcm_tx_4", -+ "pcm_tx_5", "pcm_tx_6", }; -+static const char *mt7623_pwm_groups[] = { "pwm_ch1_0", "pwm_ch1_1", -+ "pwm_ch1_2", "pwm_ch2_0", -+ "pwm_ch2_1", "pwm_ch2_2", -+ "pwm_ch3_0", "pwm_ch3_1", -+ "pwm_ch3_2", "pwm_ch4_0", -+ "pwm_ch4_1", "pwm_ch4_2", -+ "pwm_ch4_3", "pwm_ch5_0", -+ "pwm_ch5_1", "pwm_ch5_2", -+ "pwm_ch6_0", "pwm_ch6_1", -+ "pwm_ch6_2", "pwm_ch6_3", -+ "pwm_ch7_0", "pwm_ch7_1", -+ "pwm_ch7_2", }; -+static const char *mt7623_pwrap_groups[] = { "pwrap", }; -+static const char *mt7623_rtc_groups[] = { "rtc", }; -+static const char *mt7623_spi_groups[] = { "spi0", "spi2", "spi2", }; -+static const char *mt7623_spdif_groups[] = { "spdif_in0_0", "spdif_in0_1", -+ "spdif_in1_0", "spdif_in1_1", -+ "spdif_out", }; -+static const char *mt7623_uart_groups[] = { "uart0_0_txd_rxd", -+ "uart0_1_txd_rxd", -+ "uart0_2_txd_rxd", -+ "uart0_3_txd_rxd", -+ "uart1_0_txd_rxd", -+ "uart1_1_txd_rxd", -+ "uart1_2_txd_rxd", -+ "uart2_0_txd_rxd", -+ "uart2_1_txd_rxd", -+ "uart3_txd_rxd", -+ "uart0_rts_cts", -+ "uart1_rts_cts", -+ "uart2_rts_cts", -+ "uart3_rts_cts", }; -+static const char *mt7623_wdt_groups[] = { "watchdog_0", "watchdog_1", }; -+ -+static const struct function_desc mt7623_functions[] = { -+ {"audck", mt7623_aud_clk_groups, ARRAY_SIZE(mt7623_aud_clk_groups)}, -+ {"disp", mt7623_disp_pwm_groups, ARRAY_SIZE(mt7623_disp_pwm_groups)}, -+ {"eth", mt7623_ethernet_groups, ARRAY_SIZE(mt7623_ethernet_groups)}, -+ {"sdio", mt7623_ext_sdio_groups, ARRAY_SIZE(mt7623_ext_sdio_groups)}, -+ {"hdmi", mt7623_hdmi_groups, ARRAY_SIZE(mt7623_hdmi_groups)}, -+ {"i2c", mt7623_i2c_groups, ARRAY_SIZE(mt7623_i2c_groups)}, -+ {"i2s", mt7623_i2s_groups, ARRAY_SIZE(mt7623_i2s_groups)}, -+ {"ir", mt7623_ir_groups, ARRAY_SIZE(mt7623_ir_groups)}, -+ {"lcd", mt7623_lcd_groups, ARRAY_SIZE(mt7623_lcd_groups)}, -+ {"msdc", mt7623_msdc_groups, ARRAY_SIZE(mt7623_msdc_groups)}, -+ {"nand", mt7623_nandc_groups, ARRAY_SIZE(mt7623_nandc_groups)}, -+ {"otg", mt7623_otg_groups, ARRAY_SIZE(mt7623_otg_groups)}, -+ {"pcie", mt7623_pcie_groups, ARRAY_SIZE(mt7623_pcie_groups)}, -+ {"pcm", mt7623_pcm_groups, ARRAY_SIZE(mt7623_pcm_groups)}, -+ {"pwm", mt7623_pwm_groups, ARRAY_SIZE(mt7623_pwm_groups)}, -+ {"pwrap", mt7623_pwrap_groups, ARRAY_SIZE(mt7623_pwrap_groups)}, -+ {"rtc", mt7623_rtc_groups, ARRAY_SIZE(mt7623_rtc_groups)}, -+ {"spi", mt7623_spi_groups, ARRAY_SIZE(mt7623_spi_groups)}, -+ {"spdif", mt7623_spdif_groups, ARRAY_SIZE(mt7623_spdif_groups)}, -+ {"uart", mt7623_uart_groups, ARRAY_SIZE(mt7623_uart_groups)}, -+ {"watchdog", mt7623_wdt_groups, ARRAY_SIZE(mt7623_wdt_groups)}, -+}; -+ -+static const struct mtk_eint_hw mt7623_eint_hw = { -+ .port_mask = 6, -+ .ports = 6, -+ .ap_num = 169, -+ .db_cnt = 20, -+}; -+ -+static struct mtk_pin_soc mt7623_data = { -+ .reg_cal = mt7623_reg_cals, -+ .pins = mt7623_pins, -+ .npins = ARRAY_SIZE(mt7623_pins), -+ .grps = mt7623_groups, -+ .ngrps = ARRAY_SIZE(mt7623_groups), -+ .funcs = mt7623_functions, -+ .nfuncs = ARRAY_SIZE(mt7623_functions), -+ .eint_hw = &mt7623_eint_hw, -+ .gpio_m = 0, -+ .ies_present = true, -+ .base_names = mtk_default_register_base_names, -+ .nbase_names = ARRAY_SIZE(mtk_default_register_base_names), -+ .bias_disable_set = mtk_pinconf_bias_disable_set_rev1, -+ .bias_disable_get = mtk_pinconf_bias_disable_get_rev1, -+ .bias_set = mtk_pinconf_bias_set_rev1, -+ .bias_get = mtk_pinconf_bias_get_rev1, -+ .drive_set = mtk_pinconf_drive_set_rev1, -+ .drive_get = mtk_pinconf_drive_get_rev1, -+ .adv_pull_get = mtk_pinconf_adv_pull_get, -+ .adv_pull_set = mtk_pinconf_adv_pull_set, -+}; -+ -+/* -+ * There are some specific pins have mux functions greater than 8, -+ * and if we want to switch thees high modes we need to disable -+ * bonding constraints firstly. -+ */ -+static void mt7623_bonding_disable(struct platform_device *pdev) -+{ -+ struct mtk_pinctrl *hw = platform_get_drvdata(pdev); -+ -+ mtk_rmw(hw, 0, PIN_BOND_REG0, BOND_PCIE_CLR, BOND_PCIE_CLR); -+ mtk_rmw(hw, 0, PIN_BOND_REG1, BOND_I2S_CLR, BOND_I2S_CLR); -+ mtk_rmw(hw, 0, PIN_BOND_REG2, BOND_MSDC0E_CLR, BOND_MSDC0E_CLR); -+} -+ -+static const struct of_device_id mt7623_pctrl_match[] = { -+ { .compatible = "mediatek,mt7623-moore-pinctrl", }, -+ {} -+}; -+ -+static int mt7623_pinctrl_probe(struct platform_device *pdev) -+{ -+ int err; -+ -+ err = mtk_moore_pinctrl_probe(pdev, &mt7623_data); -+ if (err) -+ return err; -+ -+ mt7623_bonding_disable(pdev); -+ -+ return 0; -+} -+ -+static struct platform_driver mtk_pinctrl_driver = { -+ .probe = mt7623_pinctrl_probe, -+ .driver = { -+ .name = "mt7623-moore-pinctrl", -+ .of_match_table = mt7623_pctrl_match, -+ }, -+}; -+ -+static int __init mtk_pinctrl_init(void) -+{ -+ return platform_driver_register(&mtk_pinctrl_driver); -+} -+arch_initcall(mtk_pinctrl_init); ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c -@@ -0,0 +1,450 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * The MT7629 driver based on Linux generic pinctrl binding. -+ * -+ * Copyright (C) 2018 MediaTek Inc. -+ * Author: Ryder Lee -+ */ -+ -+#include "pinctrl-moore.h" -+ -+#define MT7629_PIN(_number, _name, _eint_n) \ -+ MTK_PIN(_number, _name, 0, _eint_n, DRV_GRP1) -+ -+static const struct mtk_pin_field_calc mt7629_pin_mode_range[] = { -+ PIN_FIELD(0, 78, 0x300, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_dir_range[] = { -+ PIN_FIELD(0, 78, 0x0, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_di_range[] = { -+ PIN_FIELD(0, 78, 0x200, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_do_range[] = { -+ PIN_FIELD(0, 78, 0x100, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_ies_range[] = { -+ PIN_FIELD(0, 10, 0x1000, 0x10, 0, 1), -+ PIN_FIELD(11, 18, 0x2000, 0x10, 0, 1), -+ PIN_FIELD(19, 32, 0x3000, 0x10, 0, 1), -+ PIN_FIELD(33, 48, 0x4000, 0x10, 0, 1), -+ PIN_FIELD(49, 50, 0x5000, 0x10, 0, 1), -+ PIN_FIELD(51, 69, 0x6000, 0x10, 0, 1), -+ PIN_FIELD(70, 78, 0x7000, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_smt_range[] = { -+ PIN_FIELD(0, 10, 0x1100, 0x10, 0, 1), -+ PIN_FIELD(11, 18, 0x2100, 0x10, 0, 1), -+ PIN_FIELD(19, 32, 0x3100, 0x10, 0, 1), -+ PIN_FIELD(33, 48, 0x4100, 0x10, 0, 1), -+ PIN_FIELD(49, 50, 0x5100, 0x10, 0, 1), -+ PIN_FIELD(51, 69, 0x6100, 0x10, 0, 1), -+ PIN_FIELD(70, 78, 0x7100, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_pullen_range[] = { -+ PIN_FIELD(0, 10, 0x1400, 0x10, 0, 1), -+ PIN_FIELD(11, 18, 0x2400, 0x10, 0, 1), -+ PIN_FIELD(19, 32, 0x3400, 0x10, 0, 1), -+ PIN_FIELD(33, 48, 0x4400, 0x10, 0, 1), -+ PIN_FIELD(49, 50, 0x5400, 0x10, 0, 1), -+ PIN_FIELD(51, 69, 0x6400, 0x10, 0, 1), -+ PIN_FIELD(70, 78, 0x7400, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_pullsel_range[] = { -+ PIN_FIELD(0, 10, 0x1500, 0x10, 0, 1), -+ PIN_FIELD(11, 18, 0x2500, 0x10, 0, 1), -+ PIN_FIELD(19, 32, 0x3500, 0x10, 0, 1), -+ PIN_FIELD(33, 48, 0x4500, 0x10, 0, 1), -+ PIN_FIELD(49, 50, 0x5500, 0x10, 0, 1), -+ PIN_FIELD(51, 69, 0x6500, 0x10, 0, 1), -+ PIN_FIELD(70, 78, 0x7500, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_drv_range[] = { -+ PIN_FIELD(0, 10, 0x1600, 0x10, 0, 4), -+ PIN_FIELD(11, 18, 0x2600, 0x10, 0, 4), -+ PIN_FIELD(19, 32, 0x3600, 0x10, 0, 4), -+ PIN_FIELD(33, 48, 0x4600, 0x10, 0, 4), -+ PIN_FIELD(49, 50, 0x5600, 0x10, 0, 4), -+ PIN_FIELD(51, 69, 0x6600, 0x10, 0, 4), -+ PIN_FIELD(70, 78, 0x7600, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_tdsel_range[] = { -+ PIN_FIELD(0, 10, 0x1200, 0x10, 0, 4), -+ PIN_FIELD(11, 18, 0x2200, 0x10, 0, 4), -+ PIN_FIELD(19, 32, 0x3200, 0x10, 0, 4), -+ PIN_FIELD(33, 48, 0x4200, 0x10, 0, 4), -+ PIN_FIELD(49, 50, 0x5200, 0x10, 0, 4), -+ PIN_FIELD(51, 69, 0x6200, 0x10, 0, 4), -+ PIN_FIELD(70, 78, 0x7200, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt7629_pin_rdsel_range[] = { -+ PIN_FIELD(0, 10, 0x1300, 0x10, 0, 4), -+ PIN_FIELD(11, 18, 0x2300, 0x10, 0, 4), -+ PIN_FIELD(19, 32, 0x3300, 0x10, 0, 4), -+ PIN_FIELD(33, 48, 0x4300, 0x10, 0, 4), -+ PIN_FIELD(49, 50, 0x5300, 0x10, 0, 4), -+ PIN_FIELD(51, 69, 0x6300, 0x10, 0, 4), -+ PIN_FIELD(70, 78, 0x7300, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_reg_calc mt7629_reg_cals[] = { -+ [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7629_pin_mode_range), -+ [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7629_pin_dir_range), -+ [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt7629_pin_di_range), -+ [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt7629_pin_do_range), -+ [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt7629_pin_ies_range), -+ [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt7629_pin_smt_range), -+ [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt7629_pin_pullsel_range), -+ [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt7629_pin_pullen_range), -+ [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7629_pin_drv_range), -+ [PINCTRL_PIN_REG_TDSEL] = MTK_RANGE(mt7629_pin_tdsel_range), -+ [PINCTRL_PIN_REG_RDSEL] = MTK_RANGE(mt7629_pin_rdsel_range), -+}; -+ -+static const struct mtk_pin_desc mt7629_pins[] = { -+ MT7629_PIN(0, "TOP_5G_CLK", 53), -+ MT7629_PIN(1, "TOP_5G_DATA", 54), -+ MT7629_PIN(2, "WF0_5G_HB0", 55), -+ MT7629_PIN(3, "WF0_5G_HB1", 56), -+ MT7629_PIN(4, "WF0_5G_HB2", 57), -+ MT7629_PIN(5, "WF0_5G_HB3", 58), -+ MT7629_PIN(6, "WF0_5G_HB4", 59), -+ MT7629_PIN(7, "WF0_5G_HB5", 60), -+ MT7629_PIN(8, "WF0_5G_HB6", 61), -+ MT7629_PIN(9, "XO_REQ", 9), -+ MT7629_PIN(10, "TOP_RST_N", 10), -+ MT7629_PIN(11, "SYS_WATCHDOG", 11), -+ MT7629_PIN(12, "EPHY_LED0_N_JTDO", 12), -+ MT7629_PIN(13, "EPHY_LED1_N_JTDI", 13), -+ MT7629_PIN(14, "EPHY_LED2_N_JTMS", 14), -+ MT7629_PIN(15, "EPHY_LED3_N_JTCLK", 15), -+ MT7629_PIN(16, "EPHY_LED4_N_JTRST_N", 16), -+ MT7629_PIN(17, "WF2G_LED_N", 17), -+ MT7629_PIN(18, "WF5G_LED_N", 18), -+ MT7629_PIN(19, "I2C_SDA", 19), -+ MT7629_PIN(20, "I2C_SCL", 20), -+ MT7629_PIN(21, "GPIO_9", 21), -+ MT7629_PIN(22, "GPIO_10", 22), -+ MT7629_PIN(23, "GPIO_11", 23), -+ MT7629_PIN(24, "GPIO_12", 24), -+ MT7629_PIN(25, "UART1_TXD", 25), -+ MT7629_PIN(26, "UART1_RXD", 26), -+ MT7629_PIN(27, "UART1_CTS", 27), -+ MT7629_PIN(28, "UART1_RTS", 28), -+ MT7629_PIN(29, "UART2_TXD", 29), -+ MT7629_PIN(30, "UART2_RXD", 30), -+ MT7629_PIN(31, "UART2_CTS", 31), -+ MT7629_PIN(32, "UART2_RTS", 32), -+ MT7629_PIN(33, "MDI_TP_P1", 33), -+ MT7629_PIN(34, "MDI_TN_P1", 34), -+ MT7629_PIN(35, "MDI_RP_P1", 35), -+ MT7629_PIN(36, "MDI_RN_P1", 36), -+ MT7629_PIN(37, "MDI_RP_P2", 37), -+ MT7629_PIN(38, "MDI_RN_P2", 38), -+ MT7629_PIN(39, "MDI_TP_P2", 39), -+ MT7629_PIN(40, "MDI_TN_P2", 40), -+ MT7629_PIN(41, "MDI_TP_P3", 41), -+ MT7629_PIN(42, "MDI_TN_P3", 42), -+ MT7629_PIN(43, "MDI_RP_P3", 43), -+ MT7629_PIN(44, "MDI_RN_P3", 44), -+ MT7629_PIN(45, "MDI_RP_P4", 45), -+ MT7629_PIN(46, "MDI_RN_P4", 46), -+ MT7629_PIN(47, "MDI_TP_P4", 47), -+ MT7629_PIN(48, "MDI_TN_P4", 48), -+ MT7629_PIN(49, "SMI_MDC", 49), -+ MT7629_PIN(50, "SMI_MDIO", 50), -+ MT7629_PIN(51, "PCIE_PERESET_N", 51), -+ MT7629_PIN(52, "PWM_0", 52), -+ MT7629_PIN(53, "GPIO_0", 0), -+ MT7629_PIN(54, "GPIO_1", 1), -+ MT7629_PIN(55, "GPIO_2", 2), -+ MT7629_PIN(56, "GPIO_3", 3), -+ MT7629_PIN(57, "GPIO_4", 4), -+ MT7629_PIN(58, "GPIO_5", 5), -+ MT7629_PIN(59, "GPIO_6", 6), -+ MT7629_PIN(60, "GPIO_7", 7), -+ MT7629_PIN(61, "GPIO_8", 8), -+ MT7629_PIN(62, "SPI_CLK", 62), -+ MT7629_PIN(63, "SPI_CS", 63), -+ MT7629_PIN(64, "SPI_MOSI", 64), -+ MT7629_PIN(65, "SPI_MISO", 65), -+ MT7629_PIN(66, "SPI_WP", 66), -+ MT7629_PIN(67, "SPI_HOLD", 67), -+ MT7629_PIN(68, "UART0_TXD", 68), -+ MT7629_PIN(69, "UART0_RXD", 69), -+ MT7629_PIN(70, "TOP_2G_CLK", 70), -+ MT7629_PIN(71, "TOP_2G_DATA", 71), -+ MT7629_PIN(72, "WF0_2G_HB0", 72), -+ MT7629_PIN(73, "WF0_2G_HB1", 73), -+ MT7629_PIN(74, "WF0_2G_HB2", 74), -+ MT7629_PIN(75, "WF0_2G_HB3", 75), -+ MT7629_PIN(76, "WF0_2G_HB4", 76), -+ MT7629_PIN(77, "WF0_2G_HB5", 77), -+ MT7629_PIN(78, "WF0_2G_HB6", 78), -+}; -+ -+/* List all groups consisting of these pins dedicated to the enablement of -+ * certain hardware block and the corresponding mode for all of the pins. -+ * The hardware probably has multiple combinations of these pinouts. -+ */ -+ -+/* LED for EPHY */ -+static int mt7629_ephy_leds_pins[] = { 12, 13, 14, 15, 16, 17, 18, }; -+static int mt7629_ephy_leds_funcs[] = { 1, 1, 1, 1, 1, 1, 1, }; -+static int mt7629_ephy_led0_pins[] = { 12, }; -+static int mt7629_ephy_led0_funcs[] = { 1, }; -+static int mt7629_ephy_led1_pins[] = { 13, }; -+static int mt7629_ephy_led1_funcs[] = { 1, }; -+static int mt7629_ephy_led2_pins[] = { 14, }; -+static int mt7629_ephy_led2_funcs[] = { 1, }; -+static int mt7629_ephy_led3_pins[] = { 15, }; -+static int mt7629_ephy_led3_funcs[] = { 1, }; -+static int mt7629_ephy_led4_pins[] = { 16, }; -+static int mt7629_ephy_led4_funcs[] = { 1, }; -+static int mt7629_wf2g_led_pins[] = { 17, }; -+static int mt7629_wf2g_led_funcs[] = { 1, }; -+static int mt7629_wf5g_led_pins[] = { 18, }; -+static int mt7629_wf5g_led_funcs[] = { 1, }; -+ -+/* Watchdog */ -+static int mt7629_watchdog_pins[] = { 11, }; -+static int mt7629_watchdog_funcs[] = { 1, }; -+ -+/* LED for GPHY */ -+static int mt7629_gphy_leds_0_pins[] = { 21, 22, 23, }; -+static int mt7629_gphy_leds_0_funcs[] = { 2, 2, 2, }; -+static int mt7629_gphy_led1_0_pins[] = { 21, }; -+static int mt7629_gphy_led1_0_funcs[] = { 2, }; -+static int mt7629_gphy_led2_0_pins[] = { 22, }; -+static int mt7629_gphy_led2_0_funcs[] = { 2, }; -+static int mt7629_gphy_led3_0_pins[] = { 23, }; -+static int mt7629_gphy_led3_0_funcs[] = { 2, }; -+static int mt7629_gphy_leds_1_pins[] = { 57, 58, 59, }; -+static int mt7629_gphy_leds_1_funcs[] = { 1, 1, 1, }; -+static int mt7629_gphy_led1_1_pins[] = { 57, }; -+static int mt7629_gphy_led1_1_funcs[] = { 1, }; -+static int mt7629_gphy_led2_1_pins[] = { 58, }; -+static int mt7629_gphy_led2_1_funcs[] = { 1, }; -+static int mt7629_gphy_led3_1_pins[] = { 59, }; -+static int mt7629_gphy_led3_1_funcs[] = { 1, }; -+ -+/* I2C */ -+static int mt7629_i2c_0_pins[] = { 19, 20, }; -+static int mt7629_i2c_0_funcs[] = { 1, 1, }; -+static int mt7629_i2c_1_pins[] = { 53, 54, }; -+static int mt7629_i2c_1_funcs[] = { 1, 1, }; -+ -+/* SPI */ -+static int mt7629_spi_0_pins[] = { 21, 22, 23, 24, }; -+static int mt7629_spi_0_funcs[] = { 1, 1, 1, 1, }; -+static int mt7629_spi_1_pins[] = { 62, 63, 64, 65, }; -+static int mt7629_spi_1_funcs[] = { 1, 1, 1, 1, }; -+static int mt7629_spi_wp_pins[] = { 66, }; -+static int mt7629_spi_wp_funcs[] = { 1, }; -+static int mt7629_spi_hold_pins[] = { 67, }; -+static int mt7629_spi_hold_funcs[] = { 1, }; -+ -+/* UART */ -+static int mt7629_uart1_0_txd_rxd_pins[] = { 25, 26, }; -+static int mt7629_uart1_0_txd_rxd_funcs[] = { 1, 1, }; -+static int mt7629_uart1_1_txd_rxd_pins[] = { 53, 54, }; -+static int mt7629_uart1_1_txd_rxd_funcs[] = { 2, 2, }; -+static int mt7629_uart2_0_txd_rxd_pins[] = { 29, 30, }; -+static int mt7629_uart2_0_txd_rxd_funcs[] = { 1, 1, }; -+static int mt7629_uart2_1_txd_rxd_pins[] = { 57, 58, }; -+static int mt7629_uart2_1_txd_rxd_funcs[] = { 2, 2, }; -+static int mt7629_uart1_0_cts_rts_pins[] = { 27, 28, }; -+static int mt7629_uart1_0_cts_rts_funcs[] = { 1, 1, }; -+static int mt7629_uart1_1_cts_rts_pins[] = { 55, 56, }; -+static int mt7629_uart1_1_cts_rts_funcs[] = { 2, 2, }; -+static int mt7629_uart2_0_cts_rts_pins[] = { 31, 32, }; -+static int mt7629_uart2_0_cts_rts_funcs[] = { 1, 1, }; -+static int mt7629_uart2_1_cts_rts_pins[] = { 59, 60, }; -+static int mt7629_uart2_1_cts_rts_funcs[] = { 2, 2, }; -+static int mt7629_uart0_txd_rxd_pins[] = { 68, 69, }; -+static int mt7629_uart0_txd_rxd_funcs[] = { 1, 1, }; -+ -+/* MDC/MDIO */ -+static int mt7629_mdc_mdio_pins[] = { 49, 50, }; -+static int mt7629_mdc_mdio_funcs[] = { 1, 1, }; -+ -+/* PCIE */ -+static int mt7629_pcie_pereset_pins[] = { 51, }; -+static int mt7629_pcie_pereset_funcs[] = { 1, }; -+static int mt7629_pcie_wake_pins[] = { 55, }; -+static int mt7629_pcie_wake_funcs[] = { 1, }; -+static int mt7629_pcie_clkreq_pins[] = { 56, }; -+static int mt7629_pcie_clkreq_funcs[] = { 1, }; -+ -+/* PWM */ -+static int mt7629_pwm_0_pins[] = { 52, }; -+static int mt7629_pwm_0_funcs[] = { 1, }; -+static int mt7629_pwm_1_pins[] = { 61, }; -+static int mt7629_pwm_1_funcs[] = { 2, }; -+ -+/* WF 2G */ -+static int mt7629_wf0_2g_pins[] = { 70, 71, 72, 73, 74, 75, 76, 77, 78, }; -+static int mt7629_wf0_2g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, }; -+ -+/* WF 5G */ -+static int mt7629_wf0_5g_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, }; -+static int mt7629_wf0_5g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -+ -+/* SNFI */ -+static int mt7629_snfi_pins[] = { 62, 63, 64, 65, 66, 67 }; -+static int mt7629_snfi_funcs[] = { 2, 2, 2, 2, 2, 2 }; -+ -+/* SPI NOR */ -+static int mt7629_snor_pins[] = { 62, 63, 64, 65, 66, 67 }; -+static int mt7629_snor_funcs[] = { 1, 1, 1, 1, 1, 1 }; -+ -+static const struct group_desc mt7629_groups[] = { -+ PINCTRL_PIN_GROUP("ephy_leds", mt7629_ephy_leds), -+ PINCTRL_PIN_GROUP("ephy_led0", mt7629_ephy_led0), -+ PINCTRL_PIN_GROUP("ephy_led1", mt7629_ephy_led1), -+ PINCTRL_PIN_GROUP("ephy_led2", mt7629_ephy_led2), -+ PINCTRL_PIN_GROUP("ephy_led3", mt7629_ephy_led3), -+ PINCTRL_PIN_GROUP("ephy_led4", mt7629_ephy_led4), -+ PINCTRL_PIN_GROUP("wf2g_led", mt7629_wf2g_led), -+ PINCTRL_PIN_GROUP("wf5g_led", mt7629_wf5g_led), -+ PINCTRL_PIN_GROUP("watchdog", mt7629_watchdog), -+ PINCTRL_PIN_GROUP("gphy_leds_0", mt7629_gphy_leds_0), -+ PINCTRL_PIN_GROUP("gphy_led1_0", mt7629_gphy_led1_0), -+ PINCTRL_PIN_GROUP("gphy_led2_0", mt7629_gphy_led2_0), -+ PINCTRL_PIN_GROUP("gphy_led3_0", mt7629_gphy_led3_0), -+ PINCTRL_PIN_GROUP("gphy_leds_1", mt7629_gphy_leds_1), -+ PINCTRL_PIN_GROUP("gphy_led1_1", mt7629_gphy_led1_1), -+ PINCTRL_PIN_GROUP("gphy_led2_1", mt7629_gphy_led2_1), -+ PINCTRL_PIN_GROUP("gphy_led3_1", mt7629_gphy_led3_1), -+ PINCTRL_PIN_GROUP("i2c_0", mt7629_i2c_0), -+ PINCTRL_PIN_GROUP("i2c_1", mt7629_i2c_1), -+ PINCTRL_PIN_GROUP("spi_0", mt7629_spi_0), -+ PINCTRL_PIN_GROUP("spi_1", mt7629_spi_1), -+ PINCTRL_PIN_GROUP("spi_wp", mt7629_spi_wp), -+ PINCTRL_PIN_GROUP("spi_hold", mt7629_spi_hold), -+ PINCTRL_PIN_GROUP("uart1_0_txd_rxd", mt7629_uart1_0_txd_rxd), -+ PINCTRL_PIN_GROUP("uart1_1_txd_rxd", mt7629_uart1_1_txd_rxd), -+ PINCTRL_PIN_GROUP("uart2_0_txd_rxd", mt7629_uart2_0_txd_rxd), -+ PINCTRL_PIN_GROUP("uart2_1_txd_rxd", mt7629_uart2_1_txd_rxd), -+ PINCTRL_PIN_GROUP("uart1_0_cts_rts", mt7629_uart1_0_cts_rts), -+ PINCTRL_PIN_GROUP("uart1_1_cts_rts", mt7629_uart1_1_cts_rts), -+ PINCTRL_PIN_GROUP("uart2_0_cts_rts", mt7629_uart2_0_cts_rts), -+ PINCTRL_PIN_GROUP("uart2_1_cts_rts", mt7629_uart2_1_cts_rts), -+ PINCTRL_PIN_GROUP("uart0_txd_rxd", mt7629_uart0_txd_rxd), -+ PINCTRL_PIN_GROUP("mdc_mdio", mt7629_mdc_mdio), -+ PINCTRL_PIN_GROUP("pcie_pereset", mt7629_pcie_pereset), -+ PINCTRL_PIN_GROUP("pcie_wake", mt7629_pcie_wake), -+ PINCTRL_PIN_GROUP("pcie_clkreq", mt7629_pcie_clkreq), -+ PINCTRL_PIN_GROUP("pwm_0", mt7629_pwm_0), -+ PINCTRL_PIN_GROUP("pwm_1", mt7629_pwm_1), -+ PINCTRL_PIN_GROUP("wf0_5g", mt7629_wf0_5g), -+ PINCTRL_PIN_GROUP("wf0_2g", mt7629_wf0_2g), -+ PINCTRL_PIN_GROUP("snfi", mt7629_snfi), -+ PINCTRL_PIN_GROUP("spi_nor", mt7629_snor), -+}; -+ -+/* Joint those groups owning the same capability in user point of view which -+ * allows that people tend to use through the device tree. -+ */ -+static const char *mt7629_ethernet_groups[] = { "mdc_mdio", }; -+static const char *mt7629_i2c_groups[] = { "i2c_0", "i2c_1", }; -+static const char *mt7629_led_groups[] = { "ephy_leds", "ephy_led0", -+ "ephy_led1", "ephy_led2", -+ "ephy_led3", "ephy_led4", -+ "wf2g_led", "wf5g_led", -+ "gphy_leds_0", "gphy_led1_0", -+ "gphy_led2_0", "gphy_led3_0", -+ "gphy_leds_1", "gphy_led1_1", -+ "gphy_led2_1", "gphy_led3_1",}; -+static const char *mt7629_pcie_groups[] = { "pcie_pereset", "pcie_wake", -+ "pcie_clkreq", }; -+static const char *mt7629_pwm_groups[] = { "pwm_0", "pwm_1", }; -+static const char *mt7629_spi_groups[] = { "spi_0", "spi_1", "spi_wp", -+ "spi_hold", }; -+static const char *mt7629_uart_groups[] = { "uart1_0_txd_rxd", -+ "uart1_1_txd_rxd", -+ "uart2_0_txd_rxd", -+ "uart2_1_txd_rxd", -+ "uart1_0_cts_rts", -+ "uart1_1_cts_rts", -+ "uart2_0_cts_rts", -+ "uart2_1_cts_rts", -+ "uart0_txd_rxd", }; -+static const char *mt7629_wdt_groups[] = { "watchdog", }; -+static const char *mt7629_wifi_groups[] = { "wf0_5g", "wf0_2g", }; -+static const char *mt7629_flash_groups[] = { "snfi", "spi_nor" }; -+ -+static const struct function_desc mt7629_functions[] = { -+ {"eth", mt7629_ethernet_groups, ARRAY_SIZE(mt7629_ethernet_groups)}, -+ {"i2c", mt7629_i2c_groups, ARRAY_SIZE(mt7629_i2c_groups)}, -+ {"led", mt7629_led_groups, ARRAY_SIZE(mt7629_led_groups)}, -+ {"pcie", mt7629_pcie_groups, ARRAY_SIZE(mt7629_pcie_groups)}, -+ {"pwm", mt7629_pwm_groups, ARRAY_SIZE(mt7629_pwm_groups)}, -+ {"spi", mt7629_spi_groups, ARRAY_SIZE(mt7629_spi_groups)}, -+ {"uart", mt7629_uart_groups, ARRAY_SIZE(mt7629_uart_groups)}, -+ {"watchdog", mt7629_wdt_groups, ARRAY_SIZE(mt7629_wdt_groups)}, -+ {"wifi", mt7629_wifi_groups, ARRAY_SIZE(mt7629_wifi_groups)}, -+ {"flash", mt7629_flash_groups, ARRAY_SIZE(mt7629_flash_groups)}, -+}; -+ -+static const struct mtk_eint_hw mt7629_eint_hw = { -+ .port_mask = 7, -+ .ports = 7, -+ .ap_num = ARRAY_SIZE(mt7629_pins), -+ .db_cnt = 16, -+}; -+ -+static struct mtk_pin_soc mt7629_data = { -+ .reg_cal = mt7629_reg_cals, -+ .pins = mt7629_pins, -+ .npins = ARRAY_SIZE(mt7629_pins), -+ .grps = mt7629_groups, -+ .ngrps = ARRAY_SIZE(mt7629_groups), -+ .funcs = mt7629_functions, -+ .nfuncs = ARRAY_SIZE(mt7629_functions), -+ .eint_hw = &mt7629_eint_hw, -+ .gpio_m = 0, -+ .ies_present = true, -+ .base_names = mtk_default_register_base_names, -+ .nbase_names = ARRAY_SIZE(mtk_default_register_base_names), -+ .bias_disable_set = mtk_pinconf_bias_disable_set_rev1, -+ .bias_disable_get = mtk_pinconf_bias_disable_get_rev1, -+ .bias_set = mtk_pinconf_bias_set_rev1, -+ .bias_get = mtk_pinconf_bias_get_rev1, -+ .drive_set = mtk_pinconf_drive_set_rev1, -+ .drive_get = mtk_pinconf_drive_get_rev1, -+}; -+ -+static const struct of_device_id mt7629_pinctrl_of_match[] = { -+ { .compatible = "mediatek,mt7629-pinctrl", }, -+ {} -+}; -+ -+static int mt7629_pinctrl_probe(struct platform_device *pdev) -+{ -+ return mtk_moore_pinctrl_probe(pdev, &mt7629_data); -+} -+ -+static struct platform_driver mt7629_pinctrl_driver = { -+ .driver = { -+ .name = "mt7629-pinctrl", -+ .of_match_table = mt7629_pinctrl_of_match, -+ }, -+ .probe = mt7629_pinctrl_probe, -+}; -+ -+static int __init mt7629_pinctrl_init(void) -+{ -+ return platform_driver_register(&mt7629_pinctrl_driver); -+} -+arch_initcall(mt7629_pinctrl_init); ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mt8183.c -@@ -0,0 +1,595 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: Zhiyong Tao -+ * -+ */ -+ -+#include "pinctrl-mtk-mt8183.h" -+#include "pinctrl-paris.h" -+ -+/* MT8183 have multiple bases to program pin configuration listed as the below: -+ * iocfg[0]:0x10005000, iocfg[1]:0x11F20000, iocfg[2]:0x11E80000, -+ * iocfg[3]:0x11E70000, iocfg[4]:0x11E90000, iocfg[5]:0x11D30000, -+ * iocfg[6]:0x11D20000, iocfg[7]:0x11C50000, iocfg[8]:0x11F30000. -+ * _i_based could be used to indicate what base the pin should be mapped into. -+ */ -+ -+#define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 32, 0) -+ -+#define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 32, 1) -+ -+static const struct mtk_pin_field_calc mt8183_pin_mode_range[] = { -+ PIN_FIELD(0, 192, 0x300, 0x10, 0, 4), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_dir_range[] = { -+ PIN_FIELD(0, 192, 0x0, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_di_range[] = { -+ PIN_FIELD(0, 192, 0x200, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_do_range[] = { -+ PIN_FIELD(0, 192, 0x100, 0x10, 0, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_ies_range[] = { -+ PINS_FIELD_BASE(0, 3, 6, 0x000, 0x10, 3, 1), -+ PINS_FIELD_BASE(4, 7, 6, 0x000, 0x10, 5, 1), -+ PIN_FIELD_BASE(8, 8, 6, 0x000, 0x10, 0, 1), -+ PINS_FIELD_BASE(9, 10, 6, 0x000, 0x10, 12, 1), -+ PIN_FIELD_BASE(11, 11, 1, 0x000, 0x10, 3, 1), -+ PIN_FIELD_BASE(12, 12, 1, 0x000, 0x10, 7, 1), -+ PINS_FIELD_BASE(13, 16, 2, 0x000, 0x10, 2, 1), -+ PINS_FIELD_BASE(17, 20, 2, 0x000, 0x10, 3, 1), -+ PINS_FIELD_BASE(21, 24, 2, 0x000, 0x10, 4, 1), -+ PINS_FIELD_BASE(25, 28, 2, 0x000, 0x10, 5, 1), -+ PIN_FIELD_BASE(29, 29, 2, 0x000, 0x10, 6, 1), -+ PIN_FIELD_BASE(30, 30, 2, 0x000, 0x10, 7, 1), -+ PINS_FIELD_BASE(31, 31, 2, 0x000, 0x10, 8, 1), -+ PINS_FIELD_BASE(32, 34, 2, 0x000, 0x10, 7, 1), -+ PINS_FIELD_BASE(35, 37, 3, 0x000, 0x10, 0, 1), -+ PINS_FIELD_BASE(38, 40, 3, 0x000, 0x10, 1, 1), -+ PINS_FIELD_BASE(41, 42, 3, 0x000, 0x10, 2, 1), -+ PINS_FIELD_BASE(43, 45, 3, 0x000, 0x10, 3, 1), -+ PINS_FIELD_BASE(46, 47, 3, 0x000, 0x10, 4, 1), -+ PINS_FIELD_BASE(48, 49, 3, 0x000, 0x10, 5, 1), -+ PINS_FIELD_BASE(50, 51, 4, 0x000, 0x10, 0, 1), -+ PINS_FIELD_BASE(52, 57, 4, 0x000, 0x10, 1, 1), -+ PINS_FIELD_BASE(58, 60, 4, 0x000, 0x10, 2, 1), -+ PINS_FIELD_BASE(61, 64, 5, 0x000, 0x10, 0, 1), -+ PINS_FIELD_BASE(65, 66, 5, 0x000, 0x10, 1, 1), -+ PINS_FIELD_BASE(67, 68, 5, 0x000, 0x10, 2, 1), -+ PINS_FIELD_BASE(69, 71, 5, 0x000, 0x10, 3, 1), -+ PINS_FIELD_BASE(72, 76, 5, 0x000, 0x10, 4, 1), -+ PINS_FIELD_BASE(77, 80, 5, 0x000, 0x10, 5, 1), -+ PIN_FIELD_BASE(81, 81, 5, 0x000, 0x10, 6, 1), -+ PINS_FIELD_BASE(82, 83, 5, 0x000, 0x10, 7, 1), -+ PIN_FIELD_BASE(84, 84, 5, 0x000, 0x10, 6, 1), -+ PINS_FIELD_BASE(85, 88, 5, 0x000, 0x10, 8, 1), -+ PIN_FIELD_BASE(89, 89, 6, 0x000, 0x10, 11, 1), -+ PIN_FIELD_BASE(90, 90, 6, 0x000, 0x10, 1, 1), -+ PINS_FIELD_BASE(91, 94, 6, 0x000, 0x10, 2, 1), -+ PINS_FIELD_BASE(95, 96, 6, 0x000, 0x10, 6, 1), -+ PINS_FIELD_BASE(97, 98, 6, 0x000, 0x10, 7, 1), -+ PIN_FIELD_BASE(99, 99, 6, 0x000, 0x10, 8, 1), -+ PIN_FIELD_BASE(100, 100, 6, 0x000, 0x10, 9, 1), -+ PINS_FIELD_BASE(101, 102, 6, 0x000, 0x10, 10, 1), -+ PINS_FIELD_BASE(103, 104, 6, 0x000, 0x10, 13, 1), -+ PINS_FIELD_BASE(105, 106, 6, 0x000, 0x10, 14, 1), -+ PIN_FIELD_BASE(107, 107, 7, 0x000, 0x10, 0, 1), -+ PIN_FIELD_BASE(108, 108, 7, 0x000, 0x10, 1, 1), -+ PIN_FIELD_BASE(109, 109, 7, 0x000, 0x10, 2, 1), -+ PIN_FIELD_BASE(110, 110, 7, 0x000, 0x10, 0, 1), -+ PIN_FIELD_BASE(111, 111, 7, 0x000, 0x10, 3, 1), -+ PIN_FIELD_BASE(112, 112, 7, 0x000, 0x10, 2, 1), -+ PIN_FIELD_BASE(113, 113, 7, 0x000, 0x10, 4, 1), -+ PIN_FIELD_BASE(114, 114, 7, 0x000, 0x10, 5, 1), -+ PIN_FIELD_BASE(115, 115, 7, 0x000, 0x10, 6, 1), -+ PIN_FIELD_BASE(116, 116, 7, 0x000, 0x10, 7, 1), -+ PIN_FIELD_BASE(117, 117, 7, 0x000, 0x10, 8, 1), -+ PIN_FIELD_BASE(118, 118, 7, 0x000, 0x10, 9, 1), -+ PIN_FIELD_BASE(119, 119, 7, 0x000, 0x10, 10, 1), -+ PIN_FIELD_BASE(120, 120, 7, 0x000, 0x10, 11, 1), -+ PIN_FIELD_BASE(121, 121, 7, 0x000, 0x10, 12, 1), -+ PIN_FIELD_BASE(122, 122, 8, 0x000, 0x10, 0, 1), -+ PIN_FIELD_BASE(123, 123, 8, 0x000, 0x10, 1, 1), -+ PIN_FIELD_BASE(124, 124, 8, 0x000, 0x10, 2, 1), -+ PINS_FIELD_BASE(125, 130, 8, 0x000, 0x10, 1, 1), -+ PIN_FIELD_BASE(131, 131, 8, 0x000, 0x10, 3, 1), -+ PIN_FIELD_BASE(132, 132, 8, 0x000, 0x10, 1, 1), -+ PIN_FIELD_BASE(133, 133, 8, 0x000, 0x10, 4, 1), -+ PIN_FIELD_BASE(134, 134, 1, 0x000, 0x10, 0, 1), -+ PIN_FIELD_BASE(135, 135, 1, 0x000, 0x10, 1, 1), -+ PINS_FIELD_BASE(136, 143, 1, 0x000, 0x10, 2, 1), -+ PINS_FIELD_BASE(144, 147, 1, 0x000, 0x10, 4, 1), -+ PIN_FIELD_BASE(148, 148, 1, 0x000, 0x10, 5, 1), -+ PIN_FIELD_BASE(149, 149, 1, 0x000, 0x10, 6, 1), -+ PINS_FIELD_BASE(150, 153, 1, 0x000, 0x10, 8, 1), -+ PIN_FIELD_BASE(154, 154, 1, 0x000, 0x10, 9, 1), -+ PINS_FIELD_BASE(155, 157, 1, 0x000, 0x10, 10, 1), -+ PINS_FIELD_BASE(158, 160, 1, 0x000, 0x10, 8, 1), -+ PINS_FIELD_BASE(161, 164, 2, 0x000, 0x10, 0, 1), -+ PINS_FIELD_BASE(165, 166, 2, 0x000, 0x10, 1, 1), -+ PINS_FIELD_BASE(167, 168, 4, 0x000, 0x10, 2, 1), -+ PIN_FIELD_BASE(169, 169, 4, 0x000, 0x10, 3, 1), -+ PINS_FIELD_BASE(170, 174, 4, 0x000, 0x10, 4, 1), -+ PINS_FIELD_BASE(175, 176, 4, 0x000, 0x10, 3, 1), -+ PINS_FIELD_BASE(177, 179, 6, 0x000, 0x10, 4, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_smt_range[] = { -+ PINS_FIELD_BASE(0, 3, 6, 0x010, 0x10, 3, 1), -+ PINS_FIELD_BASE(4, 7, 6, 0x010, 0x10, 5, 1), -+ PIN_FIELD_BASE(8, 8, 6, 0x010, 0x10, 0, 1), -+ PINS_FIELD_BASE(9, 10, 6, 0x010, 0x10, 12, 1), -+ PIN_FIELD_BASE(11, 11, 1, 0x010, 0x10, 3, 1), -+ PIN_FIELD_BASE(12, 12, 1, 0x010, 0x10, 7, 1), -+ PINS_FIELD_BASE(13, 16, 2, 0x010, 0x10, 2, 1), -+ PINS_FIELD_BASE(17, 20, 2, 0x010, 0x10, 3, 1), -+ PINS_FIELD_BASE(21, 24, 2, 0x010, 0x10, 4, 1), -+ PINS_FIELD_BASE(25, 28, 2, 0x010, 0x10, 5, 1), -+ PIN_FIELD_BASE(29, 29, 2, 0x010, 0x10, 6, 1), -+ PIN_FIELD_BASE(30, 30, 2, 0x010, 0x10, 7, 1), -+ PINS_FIELD_BASE(31, 31, 2, 0x010, 0x10, 8, 1), -+ PINS_FIELD_BASE(32, 34, 2, 0x010, 0x10, 7, 1), -+ PINS_FIELD_BASE(35, 37, 3, 0x010, 0x10, 0, 1), -+ PINS_FIELD_BASE(38, 40, 3, 0x010, 0x10, 1, 1), -+ PINS_FIELD_BASE(41, 42, 3, 0x010, 0x10, 2, 1), -+ PINS_FIELD_BASE(43, 45, 3, 0x010, 0x10, 3, 1), -+ PINS_FIELD_BASE(46, 47, 3, 0x010, 0x10, 4, 1), -+ PINS_FIELD_BASE(48, 49, 3, 0x010, 0x10, 5, 1), -+ PINS_FIELD_BASE(50, 51, 4, 0x010, 0x10, 0, 1), -+ PINS_FIELD_BASE(52, 57, 4, 0x010, 0x10, 1, 1), -+ PINS_FIELD_BASE(58, 60, 4, 0x010, 0x10, 2, 1), -+ PINS_FIELD_BASE(61, 64, 5, 0x010, 0x10, 0, 1), -+ PINS_FIELD_BASE(65, 66, 5, 0x010, 0x10, 1, 1), -+ PINS_FIELD_BASE(67, 68, 5, 0x010, 0x10, 2, 1), -+ PINS_FIELD_BASE(69, 71, 5, 0x010, 0x10, 3, 1), -+ PINS_FIELD_BASE(72, 76, 5, 0x010, 0x10, 4, 1), -+ PINS_FIELD_BASE(77, 80, 5, 0x010, 0x10, 5, 1), -+ PIN_FIELD_BASE(81, 81, 5, 0x010, 0x10, 6, 1), -+ PINS_FIELD_BASE(82, 83, 5, 0x010, 0x10, 7, 1), -+ PIN_FIELD_BASE(84, 84, 5, 0x010, 0x10, 6, 1), -+ PINS_FIELD_BASE(85, 88, 5, 0x010, 0x10, 8, 1), -+ PIN_FIELD_BASE(89, 89, 6, 0x010, 0x10, 11, 1), -+ PIN_FIELD_BASE(90, 90, 6, 0x010, 0x10, 1, 1), -+ PINS_FIELD_BASE(91, 94, 6, 0x010, 0x10, 2, 1), -+ PINS_FIELD_BASE(95, 96, 6, 0x010, 0x10, 6, 1), -+ PINS_FIELD_BASE(97, 98, 6, 0x010, 0x10, 7, 1), -+ PIN_FIELD_BASE(99, 99, 6, 0x010, 0x10, 8, 1), -+ PIN_FIELD_BASE(100, 100, 6, 0x010, 0x10, 9, 1), -+ PINS_FIELD_BASE(101, 102, 6, 0x010, 0x10, 10, 1), -+ PINS_FIELD_BASE(103, 104, 6, 0x010, 0x10, 13, 1), -+ PINS_FIELD_BASE(105, 106, 6, 0x010, 0x10, 14, 1), -+ PIN_FIELD_BASE(107, 107, 7, 0x010, 0x10, 0, 1), -+ PIN_FIELD_BASE(108, 108, 7, 0x010, 0x10, 1, 1), -+ PIN_FIELD_BASE(109, 109, 7, 0x010, 0x10, 2, 1), -+ PIN_FIELD_BASE(110, 110, 7, 0x010, 0x10, 0, 1), -+ PIN_FIELD_BASE(111, 111, 7, 0x010, 0x10, 3, 1), -+ PIN_FIELD_BASE(112, 112, 7, 0x010, 0x10, 2, 1), -+ PIN_FIELD_BASE(113, 113, 7, 0x010, 0x10, 4, 1), -+ PIN_FIELD_BASE(114, 114, 7, 0x010, 0x10, 5, 1), -+ PIN_FIELD_BASE(115, 115, 7, 0x010, 0x10, 6, 1), -+ PIN_FIELD_BASE(116, 116, 7, 0x010, 0x10, 7, 1), -+ PIN_FIELD_BASE(117, 117, 7, 0x010, 0x10, 8, 1), -+ PIN_FIELD_BASE(118, 118, 7, 0x010, 0x10, 9, 1), -+ PIN_FIELD_BASE(119, 119, 7, 0x010, 0x10, 10, 1), -+ PIN_FIELD_BASE(120, 120, 7, 0x010, 0x10, 11, 1), -+ PIN_FIELD_BASE(121, 121, 7, 0x010, 0x10, 12, 1), -+ PIN_FIELD_BASE(122, 122, 8, 0x010, 0x10, 0, 1), -+ PIN_FIELD_BASE(123, 123, 8, 0x010, 0x10, 1, 1), -+ PIN_FIELD_BASE(124, 124, 8, 0x010, 0x10, 2, 1), -+ PINS_FIELD_BASE(125, 130, 8, 0x010, 0x10, 1, 1), -+ PIN_FIELD_BASE(131, 131, 8, 0x010, 0x10, 3, 1), -+ PIN_FIELD_BASE(132, 132, 8, 0x010, 0x10, 1, 1), -+ PIN_FIELD_BASE(133, 133, 8, 0x010, 0x10, 4, 1), -+ PIN_FIELD_BASE(134, 134, 1, 0x010, 0x10, 0, 1), -+ PIN_FIELD_BASE(135, 135, 1, 0x010, 0x10, 1, 1), -+ PINS_FIELD_BASE(136, 143, 1, 0x010, 0x10, 2, 1), -+ PINS_FIELD_BASE(144, 147, 1, 0x010, 0x10, 4, 1), -+ PIN_FIELD_BASE(148, 148, 1, 0x010, 0x10, 5, 1), -+ PIN_FIELD_BASE(149, 149, 1, 0x010, 0x10, 6, 1), -+ PINS_FIELD_BASE(150, 153, 1, 0x010, 0x10, 8, 1), -+ PIN_FIELD_BASE(154, 154, 1, 0x010, 0x10, 9, 1), -+ PINS_FIELD_BASE(155, 157, 1, 0x010, 0x10, 10, 1), -+ PINS_FIELD_BASE(158, 160, 1, 0x010, 0x10, 8, 1), -+ PINS_FIELD_BASE(161, 164, 2, 0x010, 0x10, 0, 1), -+ PINS_FIELD_BASE(165, 166, 2, 0x010, 0x10, 1, 1), -+ PINS_FIELD_BASE(167, 168, 4, 0x010, 0x10, 2, 1), -+ PIN_FIELD_BASE(169, 169, 4, 0x010, 0x10, 3, 1), -+ PINS_FIELD_BASE(170, 174, 4, 0x010, 0x10, 4, 1), -+ PINS_FIELD_BASE(175, 176, 4, 0x010, 0x10, 3, 1), -+ PINS_FIELD_BASE(177, 179, 6, 0x010, 0x10, 4, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_pullen_range[] = { -+ PIN_FIELD_BASE(0, 3, 6, 0x060, 0x10, 6, 1), -+ PIN_FIELD_BASE(4, 7, 6, 0x060, 0x10, 11, 1), -+ PIN_FIELD_BASE(8, 8, 6, 0x060, 0x10, 0, 1), -+ PIN_FIELD_BASE(9, 10, 6, 0x060, 0x10, 26, 1), -+ PIN_FIELD_BASE(11, 11, 1, 0x060, 0x10, 10, 1), -+ PIN_FIELD_BASE(12, 12, 1, 0x060, 0x10, 17, 1), -+ PIN_FIELD_BASE(13, 28, 2, 0x060, 0x10, 6, 1), -+ PIN_FIELD_BASE(43, 49, 3, 0x060, 0x10, 8, 1), -+ PIN_FIELD_BASE(50, 60, 4, 0x060, 0x10, 0, 1), -+ PIN_FIELD_BASE(61, 88, 5, 0x060, 0x10, 0, 1), -+ PIN_FIELD_BASE(89, 89, 6, 0x060, 0x10, 24, 1), -+ PIN_FIELD_BASE(90, 90, 6, 0x060, 0x10, 1, 1), -+ PIN_FIELD_BASE(95, 95, 6, 0x060, 0x10, 15, 1), -+ PIN_FIELD_BASE(96, 102, 6, 0x060, 0x10, 17, 1), -+ PIN_FIELD_BASE(103, 106, 6, 0x060, 0x10, 28, 1), -+ PIN_FIELD_BASE(107, 121, 7, 0x060, 0x10, 0, 1), -+ PIN_FIELD_BASE(134, 143, 1, 0x060, 0x10, 0, 1), -+ PIN_FIELD_BASE(144, 149, 1, 0x060, 0x10, 11, 1), -+ PIN_FIELD_BASE(150, 160, 1, 0x060, 0x10, 18, 1), -+ PIN_FIELD_BASE(161, 166, 2, 0x060, 0x10, 0, 1), -+ PIN_FIELD_BASE(167, 176, 4, 0x060, 0x10, 11, 1), -+ PIN_FIELD_BASE(177, 177, 6, 0x060, 0x10, 10, 1), -+ PIN_FIELD_BASE(178, 178, 6, 0x060, 0x10, 16, 1), -+ PIN_FIELD_BASE(179, 179, 6, 0x060, 0x10, 25, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_pullsel_range[] = { -+ PIN_FIELD_BASE(0, 3, 6, 0x080, 0x10, 6, 1), -+ PIN_FIELD_BASE(4, 7, 6, 0x080, 0x10, 11, 1), -+ PIN_FIELD_BASE(8, 8, 6, 0x080, 0x10, 0, 1), -+ PIN_FIELD_BASE(9, 10, 6, 0x080, 0x10, 26, 1), -+ PIN_FIELD_BASE(11, 11, 1, 0x080, 0x10, 10, 1), -+ PIN_FIELD_BASE(12, 12, 1, 0x080, 0x10, 17, 1), -+ PIN_FIELD_BASE(13, 28, 2, 0x080, 0x10, 6, 1), -+ PIN_FIELD_BASE(43, 49, 3, 0x080, 0x10, 8, 1), -+ PIN_FIELD_BASE(50, 60, 4, 0x080, 0x10, 0, 1), -+ PIN_FIELD_BASE(61, 88, 5, 0x080, 0x10, 0, 1), -+ PIN_FIELD_BASE(89, 89, 6, 0x080, 0x10, 24, 1), -+ PIN_FIELD_BASE(90, 90, 6, 0x080, 0x10, 1, 1), -+ PIN_FIELD_BASE(95, 95, 6, 0x080, 0x10, 15, 1), -+ PIN_FIELD_BASE(96, 102, 6, 0x080, 0x10, 17, 1), -+ PIN_FIELD_BASE(103, 106, 6, 0x080, 0x10, 28, 1), -+ PIN_FIELD_BASE(107, 121, 7, 0x080, 0x10, 0, 1), -+ PIN_FIELD_BASE(134, 143, 1, 0x080, 0x10, 0, 1), -+ PIN_FIELD_BASE(144, 149, 1, 0x080, 0x10, 11, 1), -+ PIN_FIELD_BASE(150, 160, 1, 0x080, 0x10, 18, 1), -+ PIN_FIELD_BASE(161, 166, 2, 0x080, 0x10, 0, 1), -+ PIN_FIELD_BASE(167, 176, 4, 0x080, 0x10, 11, 1), -+ PIN_FIELD_BASE(177, 177, 6, 0x080, 0x10, 10, 1), -+ PIN_FIELD_BASE(178, 178, 6, 0x080, 0x10, 16, 1), -+ PIN_FIELD_BASE(179, 179, 6, 0x080, 0x10, 25, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_drv_range[] = { -+ PINS_FIELD_BASE(0, 3, 6, 0x0A0, 0x10, 12, 3), -+ PINS_FIELD_BASE(4, 7, 6, 0x0A0, 0x10, 20, 3), -+ PIN_FIELD_BASE(8, 8, 6, 0x0A0, 0x10, 0, 3), -+ PINS_FIELD_BASE(9, 10, 6, 0x0B0, 0x10, 16, 3), -+ PIN_FIELD_BASE(11, 11, 1, 0x0A0, 0x10, 12, 3), -+ PIN_FIELD_BASE(12, 12, 1, 0x0A0, 0x10, 28, 3), -+ PINS_FIELD_BASE(13, 16, 2, 0x0A0, 0x10, 8, 3), -+ PINS_FIELD_BASE(17, 20, 2, 0x0A0, 0x10, 12, 3), -+ PINS_FIELD_BASE(21, 24, 2, 0x0A0, 0x10, 16, 3), -+ PINS_FIELD_BASE(25, 28, 2, 0x0A0, 0x10, 20, 3), -+ PIN_FIELD_BASE(29, 29, 2, 0x0A0, 0x10, 24, 3), -+ PIN_FIELD_BASE(30, 30, 2, 0x0A0, 0x10, 28, 3), -+ PINS_FIELD_BASE(31, 31, 2, 0x0B0, 0x10, 0, 3), -+ PINS_FIELD_BASE(32, 34, 2, 0x0A0, 0x10, 28, 3), -+ PINS_FIELD_BASE(35, 37, 3, 0x0A0, 0x10, 0, 3), -+ PINS_FIELD_BASE(38, 40, 3, 0x0A0, 0x10, 4, 3), -+ PINS_FIELD_BASE(41, 42, 3, 0x0A0, 0x10, 8, 3), -+ PINS_FIELD_BASE(43, 45, 3, 0x0A0, 0x10, 12, 3), -+ PINS_FIELD_BASE(46, 47, 3, 0x0A0, 0x10, 16, 3), -+ PINS_FIELD_BASE(48, 49, 3, 0x0A0, 0x10, 20, 3), -+ PINS_FIELD_BASE(50, 51, 4, 0x0A0, 0x10, 0, 3), -+ PINS_FIELD_BASE(52, 57, 4, 0x0A0, 0x10, 4, 3), -+ PINS_FIELD_BASE(58, 60, 4, 0x0A0, 0x10, 8, 3), -+ PINS_FIELD_BASE(61, 64, 5, 0x0A0, 0x10, 0, 3), -+ PINS_FIELD_BASE(65, 66, 5, 0x0A0, 0x10, 4, 3), -+ PINS_FIELD_BASE(67, 68, 5, 0x0A0, 0x10, 8, 3), -+ PINS_FIELD_BASE(69, 71, 5, 0x0A0, 0x10, 12, 3), -+ PINS_FIELD_BASE(72, 76, 5, 0x0A0, 0x10, 16, 3), -+ PINS_FIELD_BASE(77, 80, 5, 0x0A0, 0x10, 20, 3), -+ PIN_FIELD_BASE(81, 81, 5, 0x0A0, 0x10, 24, 3), -+ PINS_FIELD_BASE(82, 83, 5, 0x0A0, 0x10, 28, 3), -+ PIN_FIELD_BASE(84, 84, 5, 0x0A0, 0x10, 24, 3), -+ PINS_FIELD_BASE(85, 88, 5, 0x0B0, 0x10, 0, 3), -+ PIN_FIELD_BASE(89, 89, 6, 0x0B0, 0x10, 12, 3), -+ PIN_FIELD_BASE(90, 90, 6, 0x0A0, 0x10, 4, 3), -+ PINS_FIELD_BASE(91, 94, 6, 0x0A0, 0x10, 8, 3), -+ PINS_FIELD_BASE(95, 96, 6, 0x0A0, 0x10, 24, 3), -+ PINS_FIELD_BASE(97, 98, 6, 0x0A0, 0x10, 28, 3), -+ PIN_FIELD_BASE(99, 99, 6, 0x0B0, 0x10, 0, 3), -+ PIN_FIELD_BASE(100, 100, 6, 0x0B0, 0x10, 4, 3), -+ PINS_FIELD_BASE(101, 102, 6, 0x0B0, 0x10, 8, 3), -+ PINS_FIELD_BASE(103, 104, 6, 0x0B0, 0x10, 20, 3), -+ PINS_FIELD_BASE(105, 106, 6, 0x0B0, 0x10, 24, 3), -+ PIN_FIELD_BASE(107, 107, 7, 0x0A0, 0x10, 0, 3), -+ PIN_FIELD_BASE(108, 108, 7, 0x0A0, 0x10, 4, 3), -+ PIN_FIELD_BASE(109, 109, 7, 0x0A0, 0x10, 8, 3), -+ PIN_FIELD_BASE(110, 110, 7, 0x0A0, 0x10, 0, 3), -+ PIN_FIELD_BASE(111, 111, 7, 0x0A0, 0x10, 4, 3), -+ PIN_FIELD_BASE(112, 112, 7, 0x0A0, 0x10, 8, 3), -+ PIN_FIELD_BASE(113, 113, 7, 0x0A0, 0x10, 16, 3), -+ PIN_FIELD_BASE(114, 114, 7, 0x0A0, 0x10, 20, 3), -+ PIN_FIELD_BASE(115, 115, 7, 0x0A0, 0x10, 24, 3), -+ PIN_FIELD_BASE(116, 116, 7, 0x0A0, 0x10, 28, 3), -+ PIN_FIELD_BASE(117, 117, 7, 0x0B0, 0x10, 0, 3), -+ PIN_FIELD_BASE(118, 118, 7, 0x0B0, 0x10, 4, 3), -+ PIN_FIELD_BASE(119, 119, 7, 0x0B0, 0x10, 8, 3), -+ PIN_FIELD_BASE(120, 120, 7, 0x0B0, 0x10, 12, 3), -+ PIN_FIELD_BASE(121, 121, 7, 0x0B0, 0x10, 16, 3), -+ PIN_FIELD_BASE(122, 122, 8, 0x0A0, 0x10, 0, 3), -+ PIN_FIELD_BASE(123, 123, 8, 0x0A0, 0x10, 4, 3), -+ PIN_FIELD_BASE(124, 124, 8, 0x0A0, 0x10, 8, 3), -+ PINS_FIELD_BASE(125, 130, 8, 0x0A0, 0x10, 4, 3), -+ PIN_FIELD_BASE(131, 131, 8, 0x0A0, 0x10, 12, 3), -+ PIN_FIELD_BASE(132, 132, 8, 0x0A0, 0x10, 4, 3), -+ PIN_FIELD_BASE(133, 133, 8, 0x0A0, 0x10, 16, 3), -+ PIN_FIELD_BASE(134, 134, 1, 0x0A0, 0x10, 0, 3), -+ PIN_FIELD_BASE(135, 135, 1, 0x0A0, 0x10, 4, 3), -+ PINS_FIELD_BASE(136, 143, 1, 0x0A0, 0x10, 8, 3), -+ PINS_FIELD_BASE(144, 147, 1, 0x0A0, 0x10, 16, 3), -+ PIN_FIELD_BASE(148, 148, 1, 0x0A0, 0x10, 20, 3), -+ PIN_FIELD_BASE(149, 149, 1, 0x0A0, 0x10, 24, 3), -+ PINS_FIELD_BASE(150, 153, 1, 0x0B0, 0x10, 0, 3), -+ PIN_FIELD_BASE(154, 154, 1, 0x0B0, 0x10, 4, 3), -+ PINS_FIELD_BASE(155, 157, 1, 0x0B0, 0x10, 8, 3), -+ PINS_FIELD_BASE(158, 160, 1, 0x0B0, 0x10, 0, 3), -+ PINS_FIELD_BASE(161, 164, 2, 0x0A0, 0x10, 0, 3), -+ PINS_FIELD_BASE(165, 166, 2, 0x0A0, 0x10, 4, 3), -+ PINS_FIELD_BASE(167, 168, 4, 0x0A0, 0x10, 8, 3), -+ PIN_FIELD_BASE(169, 169, 4, 0x0A0, 0x10, 12, 3), -+ PINS_FIELD_BASE(170, 174, 4, 0x0A0, 0x10, 16, 3), -+ PINS_FIELD_BASE(175, 176, 4, 0x0A0, 0x10, 12, 3), -+ PINS_FIELD_BASE(177, 179, 6, 0x0A0, 0x10, 16, 3), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_pupd_range[] = { -+ PIN_FIELD_BASE(29, 29, 2, 0x0C0, 0x10, 2, 1), -+ PIN_FIELD_BASE(30, 30, 2, 0x0C0, 0x10, 6, 1), -+ PIN_FIELD_BASE(31, 31, 2, 0x0C0, 0x10, 10, 1), -+ PIN_FIELD_BASE(32, 32, 2, 0x0C0, 0x10, 14, 1), -+ PIN_FIELD_BASE(33, 33, 2, 0x0C0, 0x10, 18, 1), -+ PIN_FIELD_BASE(34, 34, 2, 0x0C0, 0x10, 22, 1), -+ PIN_FIELD_BASE(35, 35, 3, 0x0C0, 0x10, 2, 1), -+ PIN_FIELD_BASE(36, 36, 3, 0x0C0, 0x10, 6, 1), -+ PIN_FIELD_BASE(37, 37, 3, 0x0C0, 0x10, 10, 1), -+ PIN_FIELD_BASE(38, 38, 3, 0x0C0, 0x10, 14, 1), -+ PIN_FIELD_BASE(39, 39, 3, 0x0C0, 0x10, 18, 1), -+ PIN_FIELD_BASE(40, 40, 3, 0x0C0, 0x10, 22, 1), -+ PIN_FIELD_BASE(41, 41, 3, 0x0C0, 0x10, 26, 1), -+ PIN_FIELD_BASE(42, 42, 3, 0x0C0, 0x10, 30, 1), -+ PIN_FIELD_BASE(91, 91, 6, 0x0C0, 0x10, 2, 1), -+ PIN_FIELD_BASE(92, 92, 6, 0x0C0, 0x10, 6, 1), -+ PIN_FIELD_BASE(93, 93, 6, 0x0C0, 0x10, 10, 1), -+ PIN_FIELD_BASE(94, 94, 6, 0x0C0, 0x10, 14, 1), -+ PIN_FIELD_BASE(122, 122, 8, 0x0C0, 0x10, 2, 1), -+ PIN_FIELD_BASE(123, 123, 8, 0x0C0, 0x10, 6, 1), -+ PIN_FIELD_BASE(124, 124, 8, 0x0C0, 0x10, 10, 1), -+ PIN_FIELD_BASE(125, 125, 8, 0x0C0, 0x10, 14, 1), -+ PIN_FIELD_BASE(126, 126, 8, 0x0C0, 0x10, 18, 1), -+ PIN_FIELD_BASE(127, 127, 8, 0x0C0, 0x10, 22, 1), -+ PIN_FIELD_BASE(128, 128, 8, 0x0C0, 0x10, 26, 1), -+ PIN_FIELD_BASE(129, 129, 8, 0x0C0, 0x10, 30, 1), -+ PIN_FIELD_BASE(130, 130, 8, 0x0D0, 0x10, 2, 1), -+ PIN_FIELD_BASE(131, 131, 8, 0x0D0, 0x10, 6, 1), -+ PIN_FIELD_BASE(132, 132, 8, 0x0D0, 0x10, 10, 1), -+ PIN_FIELD_BASE(133, 133, 8, 0x0D0, 0x10, 14, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_r0_range[] = { -+ PIN_FIELD_BASE(29, 29, 2, 0x0C0, 0x10, 0, 1), -+ PIN_FIELD_BASE(30, 30, 2, 0x0C0, 0x10, 4, 1), -+ PIN_FIELD_BASE(31, 31, 2, 0x0C0, 0x10, 8, 1), -+ PIN_FIELD_BASE(32, 32, 2, 0x0C0, 0x10, 12, 1), -+ PIN_FIELD_BASE(33, 33, 2, 0x0C0, 0x10, 16, 1), -+ PIN_FIELD_BASE(34, 34, 2, 0x0C0, 0x10, 20, 1), -+ PIN_FIELD_BASE(35, 35, 3, 0x0C0, 0x10, 0, 1), -+ PIN_FIELD_BASE(36, 36, 3, 0x0C0, 0x10, 4, 1), -+ PIN_FIELD_BASE(37, 37, 3, 0x0C0, 0x10, 8, 1), -+ PIN_FIELD_BASE(38, 38, 3, 0x0C0, 0x10, 12, 1), -+ PIN_FIELD_BASE(39, 39, 3, 0x0C0, 0x10, 16, 1), -+ PIN_FIELD_BASE(40, 40, 3, 0x0C0, 0x10, 20, 1), -+ PIN_FIELD_BASE(41, 41, 3, 0x0C0, 0x10, 24, 1), -+ PIN_FIELD_BASE(42, 42, 3, 0x0C0, 0x10, 28, 1), -+ PIN_FIELD_BASE(48, 48, 3, 0x0F0, 0x10, 18, 1), -+ PIN_FIELD_BASE(49, 49, 3, 0x0F0, 0x10, 13, 1), -+ PIN_FIELD_BASE(50, 50, 4, 0x0F0, 0x10, 10, 1), -+ PIN_FIELD_BASE(51, 51, 4, 0x0F0, 0x10, 5, 1), -+ PIN_FIELD_BASE(81, 81, 5, 0x0F0, 0x10, 7, 1), -+ PIN_FIELD_BASE(82, 82, 5, 0x0F0, 0x10, 5, 1), -+ PIN_FIELD_BASE(83, 83, 5, 0x0F0, 0x10, 15, 1), -+ PIN_FIELD_BASE(84, 84, 5, 0x0F0, 0x10, 17, 1), -+ PIN_FIELD_BASE(91, 91, 6, 0x0C0, 0x10, 0, 1), -+ PIN_FIELD_BASE(92, 92, 6, 0x0C0, 0x10, 4, 1), -+ PIN_FIELD_BASE(93, 93, 6, 0x0C0, 0x10, 8, 1), -+ PIN_FIELD_BASE(94, 94, 6, 0x0C0, 0x10, 12, 1), -+ PIN_FIELD_BASE(103, 103, 6, 0x0F0, 0x10, 20, 1), -+ PIN_FIELD_BASE(104, 104, 6, 0x0F0, 0x10, 10, 1), -+ PIN_FIELD_BASE(105, 105, 6, 0x0F0, 0x10, 22, 1), -+ PIN_FIELD_BASE(106, 106, 6, 0x0F0, 0x10, 12, 1), -+ PIN_FIELD_BASE(122, 122, 8, 0x0C0, 0x10, 0, 1), -+ PIN_FIELD_BASE(123, 123, 8, 0x0C0, 0x10, 4, 1), -+ PIN_FIELD_BASE(124, 124, 8, 0x0C0, 0x10, 8, 1), -+ PIN_FIELD_BASE(125, 125, 8, 0x0C0, 0x10, 12, 1), -+ PIN_FIELD_BASE(126, 126, 8, 0x0C0, 0x10, 16, 1), -+ PIN_FIELD_BASE(127, 127, 8, 0x0C0, 0x10, 20, 1), -+ PIN_FIELD_BASE(128, 128, 8, 0x0C0, 0x10, 24, 1), -+ PIN_FIELD_BASE(129, 129, 8, 0x0C0, 0x10, 28, 1), -+ PIN_FIELD_BASE(130, 130, 8, 0x0D0, 0x10, 0, 1), -+ PIN_FIELD_BASE(131, 131, 8, 0x0D0, 0x10, 4, 1), -+ PIN_FIELD_BASE(132, 132, 8, 0x0D0, 0x10, 8, 1), -+ PIN_FIELD_BASE(133, 133, 8, 0x0D0, 0x10, 12, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_r1_range[] = { -+ PIN_FIELD_BASE(29, 29, 2, 0x0C0, 0x10, 1, 1), -+ PIN_FIELD_BASE(30, 30, 2, 0x0C0, 0x10, 5, 1), -+ PIN_FIELD_BASE(31, 31, 2, 0x0C0, 0x10, 9, 1), -+ PIN_FIELD_BASE(32, 32, 2, 0x0C0, 0x10, 13, 1), -+ PIN_FIELD_BASE(33, 33, 2, 0x0C0, 0x10, 17, 1), -+ PIN_FIELD_BASE(34, 34, 2, 0x0C0, 0x10, 21, 1), -+ PIN_FIELD_BASE(35, 35, 3, 0x0C0, 0x10, 1, 1), -+ PIN_FIELD_BASE(36, 36, 3, 0x0C0, 0x10, 5, 1), -+ PIN_FIELD_BASE(37, 37, 3, 0x0C0, 0x10, 9, 1), -+ PIN_FIELD_BASE(38, 38, 3, 0x0C0, 0x10, 13, 1), -+ PIN_FIELD_BASE(39, 39, 3, 0x0C0, 0x10, 17, 1), -+ PIN_FIELD_BASE(40, 40, 3, 0x0C0, 0x10, 21, 1), -+ PIN_FIELD_BASE(41, 41, 3, 0x0C0, 0x10, 25, 1), -+ PIN_FIELD_BASE(42, 42, 3, 0x0C0, 0x10, 29, 1), -+ PIN_FIELD_BASE(48, 48, 3, 0x0F0, 0x10, 19, 1), -+ PIN_FIELD_BASE(49, 49, 3, 0x0F0, 0x10, 14, 1), -+ PIN_FIELD_BASE(50, 50, 4, 0x0F0, 0x10, 11, 1), -+ PIN_FIELD_BASE(51, 51, 4, 0x0F0, 0x10, 6, 1), -+ PIN_FIELD_BASE(81, 81, 5, 0x0F0, 0x10, 8, 1), -+ PIN_FIELD_BASE(82, 82, 5, 0x0F0, 0x10, 6, 1), -+ PIN_FIELD_BASE(83, 83, 5, 0x0F0, 0x10, 16, 1), -+ PIN_FIELD_BASE(84, 84, 5, 0x0F0, 0x10, 18, 1), -+ PIN_FIELD_BASE(91, 91, 6, 0x0C0, 0x10, 1, 1), -+ PIN_FIELD_BASE(92, 92, 6, 0x0C0, 0x10, 5, 1), -+ PIN_FIELD_BASE(93, 93, 6, 0x0C0, 0x10, 9, 1), -+ PIN_FIELD_BASE(94, 94, 6, 0x0C0, 0x10, 13, 1), -+ PIN_FIELD_BASE(103, 103, 6, 0x0F0, 0x10, 21, 1), -+ PIN_FIELD_BASE(104, 104, 6, 0x0F0, 0x10, 11, 1), -+ PIN_FIELD_BASE(105, 105, 6, 0x0F0, 0x10, 23, 1), -+ PIN_FIELD_BASE(106, 106, 6, 0x0F0, 0x10, 13, 1), -+ PIN_FIELD_BASE(122, 122, 8, 0x0C0, 0x10, 1, 1), -+ PIN_FIELD_BASE(123, 123, 8, 0x0C0, 0x10, 5, 1), -+ PIN_FIELD_BASE(124, 124, 8, 0x0C0, 0x10, 9, 1), -+ PIN_FIELD_BASE(125, 125, 8, 0x0C0, 0x10, 13, 1), -+ PIN_FIELD_BASE(126, 126, 8, 0x0C0, 0x10, 17, 1), -+ PIN_FIELD_BASE(127, 127, 8, 0x0C0, 0x10, 21, 1), -+ PIN_FIELD_BASE(128, 128, 8, 0x0C0, 0x10, 25, 1), -+ PIN_FIELD_BASE(129, 129, 8, 0x0C0, 0x10, 29, 1), -+ PIN_FIELD_BASE(130, 130, 8, 0x0D0, 0x10, 1, 1), -+ PIN_FIELD_BASE(131, 131, 8, 0x0D0, 0x10, 5, 1), -+ PIN_FIELD_BASE(132, 132, 8, 0x0D0, 0x10, 9, 1), -+ PIN_FIELD_BASE(133, 133, 8, 0x0D0, 0x10, 13, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_e1e0en_range[] = { -+ PIN_FIELD_BASE(48, 48, 3, 0x0F0, 0x10, 20, 1), -+ PIN_FIELD_BASE(49, 49, 3, 0x0F0, 0x10, 15, 1), -+ PIN_FIELD_BASE(50, 50, 4, 0x0F0, 0x10, 12, 1), -+ PIN_FIELD_BASE(51, 51, 4, 0x0F0, 0x10, 7, 1), -+ PIN_FIELD_BASE(81, 81, 5, 0x0F0, 0x10, 12, 1), -+ PIN_FIELD_BASE(82, 82, 5, 0x0F0, 0x10, 9, 1), -+ PIN_FIELD_BASE(83, 83, 5, 0x0F0, 0x10, 19, 1), -+ PIN_FIELD_BASE(84, 84, 5, 0x0F0, 0x10, 22, 1), -+ PIN_FIELD_BASE(103, 103, 6, 0x0F0, 0x10, 24, 1), -+ PIN_FIELD_BASE(104, 104, 6, 0x0F0, 0x10, 14, 1), -+ PIN_FIELD_BASE(105, 105, 6, 0x0F0, 0x10, 27, 1), -+ PIN_FIELD_BASE(106, 106, 6, 0x0F0, 0x10, 17, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_e0_range[] = { -+ PIN_FIELD_BASE(48, 48, 3, 0x0F0, 0x10, 21, 1), -+ PIN_FIELD_BASE(49, 49, 3, 0x0F0, 0x10, 16, 1), -+ PIN_FIELD_BASE(50, 50, 4, 0x0F0, 0x10, 13, 1), -+ PIN_FIELD_BASE(51, 51, 4, 0x0F0, 0x10, 8, 1), -+ PIN_FIELD_BASE(81, 81, 5, 0x0F0, 0x10, 13, 1), -+ PIN_FIELD_BASE(82, 82, 5, 0x0F0, 0x10, 10, 1), -+ PIN_FIELD_BASE(83, 83, 5, 0x0F0, 0x10, 20, 1), -+ PIN_FIELD_BASE(84, 84, 5, 0x0F0, 0x10, 23, 1), -+ PIN_FIELD_BASE(103, 103, 6, 0x0F0, 0x10, 25, 1), -+ PIN_FIELD_BASE(104, 104, 6, 0x0F0, 0x10, 15, 1), -+ PIN_FIELD_BASE(105, 105, 6, 0x0F0, 0x10, 28, 1), -+ PIN_FIELD_BASE(106, 106, 6, 0x0F0, 0x10, 18, 1), -+}; -+ -+static const struct mtk_pin_field_calc mt8183_pin_e1_range[] = { -+ PIN_FIELD_BASE(48, 48, 3, 0x0F0, 0x10, 22, 1), -+ PIN_FIELD_BASE(49, 49, 3, 0x0F0, 0x10, 17, 1), -+ PIN_FIELD_BASE(50, 50, 4, 0x0F0, 0x10, 14, 1), -+ PIN_FIELD_BASE(51, 51, 4, 0x0F0, 0x10, 9, 1), -+ PIN_FIELD_BASE(81, 81, 5, 0x0F0, 0x10, 14, 1), -+ PIN_FIELD_BASE(82, 82, 5, 0x0F0, 0x10, 11, 1), -+ PIN_FIELD_BASE(83, 83, 5, 0x0F0, 0x10, 21, 1), -+ PIN_FIELD_BASE(84, 84, 5, 0x0F0, 0x10, 24, 1), -+ PIN_FIELD_BASE(103, 103, 6, 0x0F0, 0x10, 26, 1), -+ PIN_FIELD_BASE(104, 104, 6, 0x0F0, 0x10, 16, 1), -+ PIN_FIELD_BASE(105, 105, 6, 0x0F0, 0x10, 29, 1), -+ PIN_FIELD_BASE(106, 106, 6, 0x0F0, 0x10, 19, 1), -+}; -+ -+static const struct mtk_pin_reg_calc mt8183_reg_cals[PINCTRL_PIN_REG_MAX] = { -+ [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8183_pin_mode_range), -+ [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8183_pin_dir_range), -+ [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8183_pin_di_range), -+ [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8183_pin_do_range), -+ [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8183_pin_smt_range), -+ [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8183_pin_ies_range), -+ [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt8183_pin_pullen_range), -+ [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt8183_pin_pullsel_range), -+ [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt8183_pin_drv_range), -+ [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt8183_pin_pupd_range), -+ [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8183_pin_r0_range), -+ [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8183_pin_r1_range), -+ [PINCTRL_PIN_REG_DRV_EN] = MTK_RANGE(mt8183_pin_e1e0en_range), -+ [PINCTRL_PIN_REG_DRV_E0] = MTK_RANGE(mt8183_pin_e0_range), -+ [PINCTRL_PIN_REG_DRV_E1] = MTK_RANGE(mt8183_pin_e1_range), -+}; -+ -+static const char * const mt8183_pinctrl_register_base_names[] = { -+ "iocfg0", "iocfg1", "iocfg2", "iocfg3", "iocfg4", "iocfg5", -+ "iocfg6", "iocfg7", "iocfg8", -+}; -+ -+static const struct mtk_eint_hw mt8183_eint_hw = { -+ .port_mask = 7, -+ .ports = 6, -+ .ap_num = 212, -+ .db_cnt = 13, -+}; -+ -+static const struct mtk_pin_soc mt8183_data = { -+ .reg_cal = mt8183_reg_cals, -+ .pins = mtk_pins_mt8183, -+ .npins = ARRAY_SIZE(mtk_pins_mt8183), -+ .ngrps = ARRAY_SIZE(mtk_pins_mt8183), -+ .eint_hw = &mt8183_eint_hw, -+ .gpio_m = 0, -+ .ies_present = true, -+ .base_names = mt8183_pinctrl_register_base_names, -+ .nbase_names = ARRAY_SIZE(mt8183_pinctrl_register_base_names), -+ .bias_disable_set = mtk_pinconf_bias_disable_set_rev1, -+ .bias_disable_get = mtk_pinconf_bias_disable_get_rev1, -+ .bias_set = mtk_pinconf_bias_set_rev1, -+ .bias_get = mtk_pinconf_bias_get_rev1, -+ .drive_set = mtk_pinconf_drive_set_rev1, -+ .drive_get = mtk_pinconf_drive_get_rev1, -+ .adv_pull_get = mtk_pinconf_adv_pull_get, -+ .adv_pull_set = mtk_pinconf_adv_pull_set, -+ .adv_drive_get = mtk_pinconf_adv_drive_get, -+ .adv_drive_set = mtk_pinconf_adv_drive_set, -+}; -+ -+static const struct of_device_id mt8183_pinctrl_of_match[] = { -+ { .compatible = "mediatek,mt8183-pinctrl", }, -+ { } -+}; -+ -+static int mt8183_pinctrl_probe(struct platform_device *pdev) -+{ -+ return mtk_paris_pinctrl_probe(pdev, &mt8183_data); -+} -+ -+static struct platform_driver mt8183_pinctrl_driver = { -+ .driver = { -+ .name = "mt8183-pinctrl", -+ .of_match_table = mt8183_pinctrl_of_match, -+ .pm = &mtk_paris_pinctrl_pm_ops, -+ }, -+ .probe = mt8183_pinctrl_probe, -+}; -+ -+static int __init mt8183_pinctrl_init(void) -+{ -+ return platform_driver_register(&mt8183_pinctrl_driver); -+} -+arch_initcall(mt8183_pinctrl_init); ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c -@@ -0,0 +1,362 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (c) 2019 MediaTek Inc. -+ * Author: Min.Guo -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "pinctrl-mtk-common.h" -+#include "pinctrl-mtk-mt8516.h" -+ -+static const struct mtk_drv_group_desc mt8516_drv_grp[] = { -+ /* 0E4E8SR 4/8/12/16 */ -+ MTK_DRV_GRP(4, 16, 1, 2, 4), -+ /* 0E2E4SR 2/4/6/8 */ -+ MTK_DRV_GRP(2, 8, 1, 2, 2), -+ /* E8E4E2 2/4/6/8/10/12/14/16 */ -+ MTK_DRV_GRP(2, 16, 0, 2, 2) -+}; -+ -+static const struct mtk_pin_drv_grp mt8516_pin_drv[] = { -+ MTK_PIN_DRV_GRP(0, 0xd00, 0, 0), -+ MTK_PIN_DRV_GRP(1, 0xd00, 0, 0), -+ MTK_PIN_DRV_GRP(2, 0xd00, 0, 0), -+ MTK_PIN_DRV_GRP(3, 0xd00, 0, 0), -+ MTK_PIN_DRV_GRP(4, 0xd00, 0, 0), -+ -+ MTK_PIN_DRV_GRP(5, 0xd00, 4, 0), -+ MTK_PIN_DRV_GRP(6, 0xd00, 4, 0), -+ MTK_PIN_DRV_GRP(7, 0xd00, 4, 0), -+ MTK_PIN_DRV_GRP(8, 0xd00, 4, 0), -+ MTK_PIN_DRV_GRP(9, 0xd00, 4, 0), -+ MTK_PIN_DRV_GRP(10, 0xd00, 4, 0), -+ -+ MTK_PIN_DRV_GRP(11, 0xd00, 8, 0), -+ MTK_PIN_DRV_GRP(12, 0xd00, 8, 0), -+ MTK_PIN_DRV_GRP(13, 0xd00, 8, 0), -+ -+ MTK_PIN_DRV_GRP(14, 0xd00, 12, 2), -+ MTK_PIN_DRV_GRP(15, 0xd00, 12, 2), -+ MTK_PIN_DRV_GRP(16, 0xd00, 12, 2), -+ MTK_PIN_DRV_GRP(17, 0xd00, 12, 2), -+ -+ MTK_PIN_DRV_GRP(18, 0xd10, 0, 0), -+ MTK_PIN_DRV_GRP(19, 0xd10, 0, 0), -+ MTK_PIN_DRV_GRP(20, 0xd10, 0, 0), -+ -+ MTK_PIN_DRV_GRP(21, 0xd00, 12, 2), -+ MTK_PIN_DRV_GRP(22, 0xd00, 12, 2), -+ MTK_PIN_DRV_GRP(23, 0xd00, 12, 2), -+ -+ MTK_PIN_DRV_GRP(24, 0xd00, 8, 0), -+ MTK_PIN_DRV_GRP(25, 0xd00, 8, 0), -+ -+ MTK_PIN_DRV_GRP(26, 0xd10, 4, 1), -+ MTK_PIN_DRV_GRP(27, 0xd10, 4, 1), -+ MTK_PIN_DRV_GRP(28, 0xd10, 4, 1), -+ MTK_PIN_DRV_GRP(29, 0xd10, 4, 1), -+ MTK_PIN_DRV_GRP(30, 0xd10, 4, 1), -+ -+ MTK_PIN_DRV_GRP(31, 0xd10, 8, 1), -+ MTK_PIN_DRV_GRP(32, 0xd10, 8, 1), -+ MTK_PIN_DRV_GRP(33, 0xd10, 8, 1), -+ -+ MTK_PIN_DRV_GRP(34, 0xd10, 12, 0), -+ MTK_PIN_DRV_GRP(35, 0xd10, 12, 0), -+ -+ MTK_PIN_DRV_GRP(36, 0xd20, 0, 0), -+ MTK_PIN_DRV_GRP(37, 0xd20, 0, 0), -+ MTK_PIN_DRV_GRP(38, 0xd20, 0, 0), -+ MTK_PIN_DRV_GRP(39, 0xd20, 0, 0), -+ -+ MTK_PIN_DRV_GRP(40, 0xd20, 4, 1), -+ -+ MTK_PIN_DRV_GRP(41, 0xd20, 8, 1), -+ MTK_PIN_DRV_GRP(42, 0xd20, 8, 1), -+ MTK_PIN_DRV_GRP(43, 0xd20, 8, 1), -+ -+ MTK_PIN_DRV_GRP(44, 0xd20, 12, 1), -+ MTK_PIN_DRV_GRP(45, 0xd20, 12, 1), -+ MTK_PIN_DRV_GRP(46, 0xd20, 12, 1), -+ MTK_PIN_DRV_GRP(47, 0xd20, 12, 1), -+ -+ MTK_PIN_DRV_GRP(48, 0xd30, 0, 1), -+ MTK_PIN_DRV_GRP(49, 0xd30, 0, 1), -+ MTK_PIN_DRV_GRP(50, 0xd30, 0, 1), -+ MTK_PIN_DRV_GRP(51, 0xd30, 0, 1), -+ -+ MTK_PIN_DRV_GRP(54, 0xd30, 8, 1), -+ -+ MTK_PIN_DRV_GRP(55, 0xd30, 12, 1), -+ MTK_PIN_DRV_GRP(56, 0xd30, 12, 1), -+ MTK_PIN_DRV_GRP(57, 0xd30, 12, 1), -+ -+ MTK_PIN_DRV_GRP(62, 0xd40, 8, 1), -+ MTK_PIN_DRV_GRP(63, 0xd40, 8, 1), -+ MTK_PIN_DRV_GRP(64, 0xd40, 8, 1), -+ MTK_PIN_DRV_GRP(65, 0xd40, 8, 1), -+ MTK_PIN_DRV_GRP(66, 0xd40, 8, 1), -+ MTK_PIN_DRV_GRP(67, 0xd40, 8, 1), -+ -+ MTK_PIN_DRV_GRP(68, 0xd40, 12, 2), -+ -+ MTK_PIN_DRV_GRP(69, 0xd50, 0, 2), -+ -+ MTK_PIN_DRV_GRP(70, 0xd50, 4, 2), -+ MTK_PIN_DRV_GRP(71, 0xd50, 4, 2), -+ MTK_PIN_DRV_GRP(72, 0xd50, 4, 2), -+ MTK_PIN_DRV_GRP(73, 0xd50, 4, 2), -+ -+ MTK_PIN_DRV_GRP(100, 0xd50, 8, 1), -+ MTK_PIN_DRV_GRP(101, 0xd50, 8, 1), -+ MTK_PIN_DRV_GRP(102, 0xd50, 8, 1), -+ MTK_PIN_DRV_GRP(103, 0xd50, 8, 1), -+ -+ MTK_PIN_DRV_GRP(104, 0xd50, 12, 2), -+ -+ MTK_PIN_DRV_GRP(105, 0xd60, 0, 2), -+ -+ MTK_PIN_DRV_GRP(106, 0xd60, 4, 2), -+ MTK_PIN_DRV_GRP(107, 0xd60, 4, 2), -+ MTK_PIN_DRV_GRP(108, 0xd60, 4, 2), -+ MTK_PIN_DRV_GRP(109, 0xd60, 4, 2), -+ -+ MTK_PIN_DRV_GRP(110, 0xd70, 0, 2), -+ MTK_PIN_DRV_GRP(111, 0xd70, 0, 2), -+ MTK_PIN_DRV_GRP(112, 0xd70, 0, 2), -+ MTK_PIN_DRV_GRP(113, 0xd70, 0, 2), -+ -+ MTK_PIN_DRV_GRP(114, 0xd70, 4, 2), -+ -+ MTK_PIN_DRV_GRP(115, 0xd60, 12, 2), -+ -+ MTK_PIN_DRV_GRP(116, 0xd60, 8, 2), -+ -+ MTK_PIN_DRV_GRP(117, 0xd70, 0, 2), -+ MTK_PIN_DRV_GRP(118, 0xd70, 0, 2), -+ MTK_PIN_DRV_GRP(119, 0xd70, 0, 2), -+ MTK_PIN_DRV_GRP(120, 0xd70, 0, 2), -+}; -+ -+static const struct mtk_pin_spec_pupd_set_samereg mt8516_spec_pupd[] = { -+ MTK_PIN_PUPD_SPEC_SR(14, 0xe50, 14, 13, 12), -+ MTK_PIN_PUPD_SPEC_SR(15, 0xe60, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(16, 0xe60, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(17, 0xe60, 10, 9, 8), -+ -+ MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 14, 13, 12), -+ MTK_PIN_PUPD_SPEC_SR(22, 0xe70, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(23, 0xe70, 6, 5, 4), -+ -+ MTK_PIN_PUPD_SPEC_SR(40, 0xe80, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(41, 0xe80, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(42, 0xe90, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(43, 0xe90, 6, 5, 4), -+ -+ MTK_PIN_PUPD_SPEC_SR(68, 0xe50, 10, 9, 8), -+ MTK_PIN_PUPD_SPEC_SR(69, 0xe50, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(70, 0xe40, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(71, 0xe40, 10, 9, 8), -+ MTK_PIN_PUPD_SPEC_SR(72, 0xe40, 14, 13, 12), -+ MTK_PIN_PUPD_SPEC_SR(73, 0xe50, 2, 1, 0), -+ -+ MTK_PIN_PUPD_SPEC_SR(104, 0xe40, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(105, 0xe30, 14, 13, 12), -+ MTK_PIN_PUPD_SPEC_SR(106, 0xe20, 14, 13, 12), -+ MTK_PIN_PUPD_SPEC_SR(107, 0xe30, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(108, 0xe30, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(109, 0xe30, 10, 9, 8), -+ MTK_PIN_PUPD_SPEC_SR(110, 0xe10, 14, 13, 12), -+ MTK_PIN_PUPD_SPEC_SR(111, 0xe10, 10, 9, 8), -+ MTK_PIN_PUPD_SPEC_SR(112, 0xe10, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(113, 0xe10, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(114, 0xe20, 10, 9, 8), -+ MTK_PIN_PUPD_SPEC_SR(115, 0xe20, 2, 1, 0), -+ MTK_PIN_PUPD_SPEC_SR(116, 0xe20, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(117, 0xe00, 14, 13, 12), -+ MTK_PIN_PUPD_SPEC_SR(118, 0xe00, 10, 9, 8), -+ MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 6, 5, 4), -+ MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 2, 1, 0), -+}; -+ -+static int mt8516_spec_pull_set(struct regmap *regmap, unsigned int pin, -+ unsigned char align, bool isup, unsigned int r1r0) -+{ -+ return mtk_pctrl_spec_pull_set_samereg(regmap, mt8516_spec_pupd, -+ ARRAY_SIZE(mt8516_spec_pupd), pin, align, isup, r1r0); -+} -+ -+static const struct mtk_pin_ies_smt_set mt8516_ies_set[] = { -+ MTK_PIN_IES_SMT_SPEC(0, 6, 0x900, 2), -+ MTK_PIN_IES_SMT_SPEC(7, 10, 0x900, 3), -+ MTK_PIN_IES_SMT_SPEC(11, 13, 0x900, 12), -+ MTK_PIN_IES_SMT_SPEC(14, 17, 0x900, 13), -+ MTK_PIN_IES_SMT_SPEC(18, 20, 0x910, 10), -+ MTK_PIN_IES_SMT_SPEC(21, 23, 0x900, 13), -+ MTK_PIN_IES_SMT_SPEC(24, 25, 0x900, 12), -+ MTK_PIN_IES_SMT_SPEC(26, 30, 0x900, 0), -+ MTK_PIN_IES_SMT_SPEC(31, 33, 0x900, 1), -+ MTK_PIN_IES_SMT_SPEC(34, 39, 0x900, 2), -+ MTK_PIN_IES_SMT_SPEC(40, 40, 0x910, 11), -+ MTK_PIN_IES_SMT_SPEC(41, 43, 0x900, 10), -+ MTK_PIN_IES_SMT_SPEC(44, 47, 0x900, 11), -+ MTK_PIN_IES_SMT_SPEC(48, 51, 0x900, 14), -+ MTK_PIN_IES_SMT_SPEC(52, 53, 0x910, 0), -+ MTK_PIN_IES_SMT_SPEC(54, 54, 0x910, 2), -+ MTK_PIN_IES_SMT_SPEC(55, 57, 0x910, 4), -+ MTK_PIN_IES_SMT_SPEC(58, 59, 0x900, 15), -+ MTK_PIN_IES_SMT_SPEC(60, 61, 0x910, 1), -+ MTK_PIN_IES_SMT_SPEC(62, 65, 0x910, 5), -+ MTK_PIN_IES_SMT_SPEC(66, 67, 0x910, 6), -+ MTK_PIN_IES_SMT_SPEC(68, 68, 0x930, 2), -+ MTK_PIN_IES_SMT_SPEC(69, 69, 0x930, 1), -+ MTK_PIN_IES_SMT_SPEC(70, 70, 0x930, 6), -+ MTK_PIN_IES_SMT_SPEC(71, 71, 0x930, 5), -+ MTK_PIN_IES_SMT_SPEC(72, 72, 0x930, 4), -+ MTK_PIN_IES_SMT_SPEC(73, 73, 0x930, 3), -+ MTK_PIN_IES_SMT_SPEC(100, 103, 0x910, 7), -+ MTK_PIN_IES_SMT_SPEC(104, 104, 0x920, 12), -+ MTK_PIN_IES_SMT_SPEC(105, 105, 0x920, 11), -+ MTK_PIN_IES_SMT_SPEC(106, 106, 0x930, 0), -+ MTK_PIN_IES_SMT_SPEC(107, 107, 0x920, 15), -+ MTK_PIN_IES_SMT_SPEC(108, 108, 0x920, 14), -+ MTK_PIN_IES_SMT_SPEC(109, 109, 0x920, 13), -+ MTK_PIN_IES_SMT_SPEC(110, 110, 0x920, 9), -+ MTK_PIN_IES_SMT_SPEC(111, 111, 0x920, 8), -+ MTK_PIN_IES_SMT_SPEC(112, 112, 0x920, 7), -+ MTK_PIN_IES_SMT_SPEC(113, 113, 0x920, 6), -+ MTK_PIN_IES_SMT_SPEC(114, 114, 0x920, 10), -+ MTK_PIN_IES_SMT_SPEC(115, 115, 0x920, 1), -+ MTK_PIN_IES_SMT_SPEC(116, 116, 0x920, 0), -+ MTK_PIN_IES_SMT_SPEC(117, 117, 0x920, 5), -+ MTK_PIN_IES_SMT_SPEC(118, 118, 0x920, 4), -+ MTK_PIN_IES_SMT_SPEC(119, 119, 0x920, 3), -+ MTK_PIN_IES_SMT_SPEC(120, 120, 0x920, 2), -+ MTK_PIN_IES_SMT_SPEC(121, 124, 0x910, 9), -+}; -+ -+static const struct mtk_pin_ies_smt_set mt8516_smt_set[] = { -+ MTK_PIN_IES_SMT_SPEC(0, 6, 0xA00, 2), -+ MTK_PIN_IES_SMT_SPEC(7, 10, 0xA00, 3), -+ MTK_PIN_IES_SMT_SPEC(11, 13, 0xA00, 12), -+ MTK_PIN_IES_SMT_SPEC(14, 17, 0xA00, 13), -+ MTK_PIN_IES_SMT_SPEC(18, 20, 0xA10, 10), -+ MTK_PIN_IES_SMT_SPEC(21, 23, 0xA00, 13), -+ MTK_PIN_IES_SMT_SPEC(24, 25, 0xA00, 12), -+ MTK_PIN_IES_SMT_SPEC(26, 30, 0xA00, 0), -+ MTK_PIN_IES_SMT_SPEC(31, 33, 0xA00, 1), -+ MTK_PIN_IES_SMT_SPEC(34, 39, 0xA900, 2), -+ MTK_PIN_IES_SMT_SPEC(40, 40, 0xA10, 11), -+ MTK_PIN_IES_SMT_SPEC(41, 43, 0xA00, 10), -+ MTK_PIN_IES_SMT_SPEC(44, 47, 0xA00, 11), -+ MTK_PIN_IES_SMT_SPEC(48, 51, 0xA00, 14), -+ MTK_PIN_IES_SMT_SPEC(52, 53, 0xA10, 0), -+ MTK_PIN_IES_SMT_SPEC(54, 54, 0xA10, 2), -+ MTK_PIN_IES_SMT_SPEC(55, 57, 0xA10, 4), -+ MTK_PIN_IES_SMT_SPEC(58, 59, 0xA00, 15), -+ MTK_PIN_IES_SMT_SPEC(60, 61, 0xA10, 1), -+ MTK_PIN_IES_SMT_SPEC(62, 65, 0xA10, 5), -+ MTK_PIN_IES_SMT_SPEC(66, 67, 0xA10, 6), -+ MTK_PIN_IES_SMT_SPEC(68, 68, 0xA30, 2), -+ MTK_PIN_IES_SMT_SPEC(69, 69, 0xA30, 1), -+ MTK_PIN_IES_SMT_SPEC(70, 70, 0xA30, 3), -+ MTK_PIN_IES_SMT_SPEC(71, 71, 0xA30, 4), -+ MTK_PIN_IES_SMT_SPEC(72, 72, 0xA30, 5), -+ MTK_PIN_IES_SMT_SPEC(73, 73, 0xA30, 6), -+ -+ MTK_PIN_IES_SMT_SPEC(100, 103, 0xA10, 7), -+ MTK_PIN_IES_SMT_SPEC(104, 104, 0xA20, 12), -+ MTK_PIN_IES_SMT_SPEC(105, 105, 0xA20, 11), -+ MTK_PIN_IES_SMT_SPEC(106, 106, 0xA30, 13), -+ MTK_PIN_IES_SMT_SPEC(107, 107, 0xA20, 14), -+ MTK_PIN_IES_SMT_SPEC(108, 108, 0xA20, 15), -+ MTK_PIN_IES_SMT_SPEC(109, 109, 0xA30, 0), -+ MTK_PIN_IES_SMT_SPEC(110, 110, 0xA20, 9), -+ MTK_PIN_IES_SMT_SPEC(111, 111, 0xA20, 8), -+ MTK_PIN_IES_SMT_SPEC(112, 112, 0xA20, 7), -+ MTK_PIN_IES_SMT_SPEC(113, 113, 0xA20, 6), -+ MTK_PIN_IES_SMT_SPEC(114, 114, 0xA20, 10), -+ MTK_PIN_IES_SMT_SPEC(115, 115, 0xA20, 1), -+ MTK_PIN_IES_SMT_SPEC(116, 116, 0xA20, 0), -+ MTK_PIN_IES_SMT_SPEC(117, 117, 0xA20, 5), -+ MTK_PIN_IES_SMT_SPEC(118, 118, 0xA20, 4), -+ MTK_PIN_IES_SMT_SPEC(119, 119, 0xA20, 3), -+ MTK_PIN_IES_SMT_SPEC(120, 120, 0xA20, 2), -+ MTK_PIN_IES_SMT_SPEC(121, 124, 0xA10, 9), -+}; -+ -+static int mt8516_ies_smt_set(struct regmap *regmap, unsigned int pin, -+ unsigned char align, int value, enum pin_config_param arg) -+{ -+ if (arg == PIN_CONFIG_INPUT_ENABLE) -+ return mtk_pconf_spec_set_ies_smt_range(regmap, mt8516_ies_set, -+ ARRAY_SIZE(mt8516_ies_set), pin, align, value); -+ else if (arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE) -+ return mtk_pconf_spec_set_ies_smt_range(regmap, mt8516_smt_set, -+ ARRAY_SIZE(mt8516_smt_set), pin, align, value); -+ return -EINVAL; -+} -+ -+static const struct mtk_pinctrl_devdata mt8516_pinctrl_data = { -+ .pins = mtk_pins_mt8516, -+ .npins = ARRAY_SIZE(mtk_pins_mt8516), -+ .grp_desc = mt8516_drv_grp, -+ .n_grp_cls = ARRAY_SIZE(mt8516_drv_grp), -+ .pin_drv_grp = mt8516_pin_drv, -+ .n_pin_drv_grps = ARRAY_SIZE(mt8516_pin_drv), -+ .spec_pull_set = mt8516_spec_pull_set, -+ .spec_ies_smt_set = mt8516_ies_smt_set, -+ .dir_offset = 0x0000, -+ .pullen_offset = 0x0500, -+ .pullsel_offset = 0x0600, -+ .dout_offset = 0x0100, -+ .din_offset = 0x0200, -+ .pinmux_offset = 0x0300, -+ .type1_start = 125, -+ .type1_end = 125, -+ .port_shf = 4, -+ .port_mask = 0xf, -+ .port_align = 4, -+ .eint_hw = { -+ .port_mask = 7, -+ .ports = 6, -+ .ap_num = 169, -+ .db_cnt = 64, -+ }, -+}; -+ -+static int mt8516_pinctrl_probe(struct platform_device *pdev) -+{ -+ return mtk_pctrl_init(pdev, &mt8516_pinctrl_data, NULL); -+} -+ -+static const struct of_device_id mt8516_pctrl_match[] = { -+ { -+ .compatible = "mediatek,mt8516-pinctrl", -+ }, -+ {} -+}; -+ -+MODULE_DEVICE_TABLE(of, mt8516_pctrl_match); -+ -+static struct platform_driver mtk_pinctrl_driver = { -+ .probe = mt8516_pinctrl_probe, -+ .driver = { -+ .name = "mediatek-mt8516-pinctrl", -+ .of_match_table = mt8516_pctrl_match, -+ .pm = &mtk_eint_pm_ops, -+ }, -+}; -+ -+static int __init mtk_pinctrl_init(void) -+{ -+ return platform_driver_register(&mtk_pinctrl_driver); -+} -+arch_initcall(mtk_pinctrl_init); ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c -@@ -0,0 +1,725 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: Sean Wang -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mtk-eint.h" -+#include "pinctrl-mtk-common-v2.h" -+ -+/** -+ * struct mtk_drive_desc - the structure that holds the information -+ * of the driving current -+ * @min: the minimum current of this group -+ * @max: the maximum current of this group -+ * @step: the step current of this group -+ * @scal: the weight factor -+ * -+ * formula: output = ((input) / step - 1) * scal -+ */ -+struct mtk_drive_desc { -+ u8 min; -+ u8 max; -+ u8 step; -+ u8 scal; -+}; -+ -+/* The groups of drive strength */ -+static const struct mtk_drive_desc mtk_drive[] = { -+ [DRV_GRP0] = { 4, 16, 4, 1 }, -+ [DRV_GRP1] = { 4, 16, 4, 2 }, -+ [DRV_GRP2] = { 2, 8, 2, 1 }, -+ [DRV_GRP3] = { 2, 8, 2, 2 }, -+ [DRV_GRP4] = { 2, 16, 2, 1 }, -+}; -+ -+static void mtk_w32(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 val) -+{ -+ writel_relaxed(val, pctl->base[i] + reg); -+} -+ -+static u32 mtk_r32(struct mtk_pinctrl *pctl, u8 i, u32 reg) -+{ -+ return readl_relaxed(pctl->base[i] + reg); -+} -+ -+void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set) -+{ -+ u32 val; -+ -+ val = mtk_r32(pctl, i, reg); -+ val &= ~mask; -+ val |= set; -+ mtk_w32(pctl, i, reg, val); -+} -+ -+static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, -+ int field, struct mtk_pin_field *pfd) -+{ -+ const struct mtk_pin_field_calc *c, *e; -+ const struct mtk_pin_reg_calc *rc; -+ u32 bits; -+ -+ if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { -+ rc = &hw->soc->reg_cal[field]; -+ } else { -+ dev_dbg(hw->dev, -+ "Not support field %d for pin %d (%s)\n", -+ field, desc->number, desc->name); -+ return -ENOTSUPP; -+ } -+ -+ c = rc->range; -+ e = c + rc->nranges; -+ -+ while (c < e) { -+ if (desc->number >= c->s_pin && desc->number <= c->e_pin) -+ break; -+ c++; -+ } -+ -+ if (c >= e) { -+ dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n", -+ field, desc->number, desc->name); -+ return -ENOTSUPP; -+ } -+ -+ if (c->i_base > hw->nbase - 1) { -+ dev_err(hw->dev, -+ "Invalid base for field %d for pin = %d (%s)\n", -+ field, desc->number, desc->name); -+ return -EINVAL; -+ } -+ -+ /* Calculated bits as the overall offset the pin is located at, -+ * if c->fixed is held, that determines the all the pins in the -+ * range use the same field with the s_pin. -+ */ -+ bits = c->fixed ? c->s_bit : c->s_bit + -+ (desc->number - c->s_pin) * (c->x_bits); -+ -+ /* Fill pfd from bits. For example 32-bit register applied is assumed -+ * when c->sz_reg is equal to 32. -+ */ -+ pfd->index = c->i_base; -+ pfd->offset = c->s_addr + c->x_addrs * (bits / c->sz_reg); -+ pfd->bitpos = bits % c->sz_reg; -+ pfd->mask = (1 << c->x_bits) - 1; -+ -+ /* pfd->next is used for indicating that bit wrapping-around happens -+ * which requires the manipulation for bit 0 starting in the next -+ * register to form the complete field read/write. -+ */ -+ pfd->next = pfd->bitpos + c->x_bits > c->sz_reg ? c->x_addrs : 0; -+ -+ return 0; -+} -+ -+static int mtk_hw_pin_field_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, -+ int field, struct mtk_pin_field *pfd) -+{ -+ if (field < 0 || field >= PINCTRL_PIN_REG_MAX) { -+ dev_err(hw->dev, "Invalid Field %d\n", field); -+ return -EINVAL; -+ } -+ -+ return mtk_hw_pin_field_lookup(hw, desc, field, pfd); -+} -+ -+static void mtk_hw_bits_part(struct mtk_pin_field *pf, int *h, int *l) -+{ -+ *l = 32 - pf->bitpos; -+ *h = get_count_order(pf->mask) - *l; -+} -+ -+static void mtk_hw_write_cross_field(struct mtk_pinctrl *hw, -+ struct mtk_pin_field *pf, int value) -+{ -+ int nbits_l, nbits_h; -+ -+ mtk_hw_bits_part(pf, &nbits_h, &nbits_l); -+ -+ mtk_rmw(hw, pf->index, pf->offset, pf->mask << pf->bitpos, -+ (value & pf->mask) << pf->bitpos); -+ -+ mtk_rmw(hw, pf->index, pf->offset + pf->next, BIT(nbits_h) - 1, -+ (value & pf->mask) >> nbits_l); -+} -+ -+static void mtk_hw_read_cross_field(struct mtk_pinctrl *hw, -+ struct mtk_pin_field *pf, int *value) -+{ -+ int nbits_l, nbits_h, h, l; -+ -+ mtk_hw_bits_part(pf, &nbits_h, &nbits_l); -+ -+ l = (mtk_r32(hw, pf->index, pf->offset) -+ >> pf->bitpos) & (BIT(nbits_l) - 1); -+ h = (mtk_r32(hw, pf->index, pf->offset + pf->next)) -+ & (BIT(nbits_h) - 1); -+ -+ *value = (h << nbits_l) | l; -+} -+ -+int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, -+ int field, int value) -+{ -+ struct mtk_pin_field pf; -+ int err; -+ -+ err = mtk_hw_pin_field_get(hw, desc, field, &pf); -+ if (err) -+ return err; -+ -+ if (!pf.next) -+ mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos, -+ (value & pf.mask) << pf.bitpos); -+ else -+ mtk_hw_write_cross_field(hw, &pf, value); -+ -+ return 0; -+} -+ -+int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, -+ int field, int *value) -+{ -+ struct mtk_pin_field pf; -+ int err; -+ -+ err = mtk_hw_pin_field_get(hw, desc, field, &pf); -+ if (err) -+ return err; -+ -+ if (!pf.next) -+ *value = (mtk_r32(hw, pf.index, pf.offset) -+ >> pf.bitpos) & pf.mask; -+ else -+ mtk_hw_read_cross_field(hw, &pf, value); -+ -+ return 0; -+} -+ -+static int mtk_xt_find_eint_num(struct mtk_pinctrl *hw, unsigned long eint_n) -+{ -+ const struct mtk_pin_desc *desc; -+ int i = 0; -+ -+ desc = (const struct mtk_pin_desc *)hw->soc->pins; -+ -+ while (i < hw->soc->npins) { -+ if (desc[i].eint.eint_n == eint_n) -+ return desc[i].number; -+ i++; -+ } -+ -+ return EINT_NA; -+} -+ -+static int mtk_xt_get_gpio_n(void *data, unsigned long eint_n, -+ unsigned int *gpio_n, -+ struct gpio_chip **gpio_chip) -+{ -+ struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)hw->soc->pins; -+ *gpio_chip = &hw->chip; -+ -+ /* Be greedy to guess first gpio_n is equal to eint_n */ -+ if (desc[eint_n].eint.eint_n == eint_n) -+ *gpio_n = eint_n; -+ else -+ *gpio_n = mtk_xt_find_eint_num(hw, eint_n); -+ -+ return *gpio_n == EINT_NA ? -EINVAL : 0; -+} -+ -+static int mtk_xt_get_gpio_state(void *data, unsigned long eint_n) -+{ -+ struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; -+ const struct mtk_pin_desc *desc; -+ struct gpio_chip *gpio_chip; -+ unsigned int gpio_n; -+ int value, err; -+ -+ err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); -+ if (err) -+ return err; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); -+ if (err) -+ return err; -+ -+ return !!value; -+} -+ -+static int mtk_xt_set_gpio_as_eint(void *data, unsigned long eint_n) -+{ -+ struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; -+ const struct mtk_pin_desc *desc; -+ struct gpio_chip *gpio_chip; -+ unsigned int gpio_n; -+ int err; -+ -+ err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); -+ if (err) -+ return err; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, -+ desc->eint.eint_m); -+ if (err) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_INPUT); -+ if (err) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, MTK_ENABLE); -+ /* SMT is supposed to be supported by every real GPIO and doesn't -+ * support virtual GPIOs, so the extra condition err != -ENOTSUPP -+ * is just for adding EINT support to these virtual GPIOs. It should -+ * add an extra flag in the pin descriptor when more pins with -+ * distinctive characteristic come out. -+ */ -+ if (err && err != -ENOTSUPP) -+ return err; -+ -+ return 0; -+} -+ -+static const struct mtk_eint_xt mtk_eint_xt = { -+ .get_gpio_n = mtk_xt_get_gpio_n, -+ .get_gpio_state = mtk_xt_get_gpio_state, -+ .set_gpio_as_eint = mtk_xt_set_gpio_as_eint, -+}; -+ -+int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct resource *res; -+ -+ if (!IS_ENABLED(CONFIG_EINT_MTK)) -+ return 0; -+ -+ if (!of_property_read_bool(np, "interrupt-controller")) -+ return -ENODEV; -+ -+ hw->eint = devm_kzalloc(hw->dev, sizeof(*hw->eint), GFP_KERNEL); -+ if (!hw->eint) -+ return -ENOMEM; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eint"); -+ if (!res) { -+ dev_err(&pdev->dev, "Unable to get eint resource\n"); -+ return -ENODEV; -+ } -+ -+ hw->eint->base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(hw->eint->base)) -+ return PTR_ERR(hw->eint->base); -+ -+ hw->eint->irq = irq_of_parse_and_map(np, 0); -+ if (!hw->eint->irq) -+ return -EINVAL; -+ -+ if (!hw->soc->eint_hw) -+ return -ENODEV; -+ -+ hw->eint->dev = &pdev->dev; -+ hw->eint->hw = hw->soc->eint_hw; -+ hw->eint->pctl = hw; -+ hw->eint->gpio_xlate = &mtk_eint_xt; -+ -+ return mtk_eint_do_init(hw->eint); -+} -+ -+/* Revision 0 */ -+int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc) -+{ -+ int err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, -+ MTK_DISABLE); -+ if (err) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, -+ MTK_DISABLE); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *res) -+{ -+ int v, v2; -+ int err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &v); -+ if (err) -+ return err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &v2); -+ if (err) -+ return err; -+ -+ if (v == MTK_ENABLE || v2 == MTK_ENABLE) -+ return -EINVAL; -+ -+ *res = 1; -+ -+ return 0; -+} -+ -+int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup) -+{ -+ int err, arg; -+ -+ arg = pullup ? 1 : 2; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, arg & 1); -+ if (err) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, -+ !!(arg & 2)); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, int *res) -+{ -+ int reg, err, v; -+ -+ reg = pullup ? PINCTRL_PIN_REG_PU : PINCTRL_PIN_REG_PD; -+ -+ err = mtk_hw_get_value(hw, desc, reg, &v); -+ if (err) -+ return err; -+ -+ if (!v) -+ return -EINVAL; -+ -+ *res = 1; -+ -+ return 0; -+} -+ -+/* Revision 1 */ -+int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc) -+{ -+ int err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, -+ MTK_DISABLE); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *res) -+{ -+ int v, err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); -+ if (err) -+ return err; -+ -+ if (v == MTK_ENABLE) -+ return -EINVAL; -+ -+ *res = 1; -+ -+ return 0; -+} -+ -+int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup) -+{ -+ int err, arg; -+ -+ arg = pullup ? MTK_PULLUP : MTK_PULLDOWN; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, -+ MTK_ENABLE); -+ if (err) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, arg); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ -+int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ int *res) -+{ -+ int err, v; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); -+ if (err) -+ return err; -+ -+ if (v == MTK_DISABLE) -+ return -EINVAL; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, &v); -+ if (err) -+ return err; -+ -+ if (pullup ^ (v == MTK_PULLUP)) -+ return -EINVAL; -+ -+ *res = 1; -+ -+ return 0; -+} -+ -+/* Revision 0 */ -+int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg) -+{ -+ const struct mtk_drive_desc *tb; -+ int err = -ENOTSUPP; -+ -+ tb = &mtk_drive[desc->drv_n]; -+ /* 4mA when (e8, e4) = (0, 0) -+ * 8mA when (e8, e4) = (0, 1) -+ * 12mA when (e8, e4) = (1, 0) -+ * 16mA when (e8, e4) = (1, 1) -+ */ -+ if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { -+ arg = (arg / tb->step - 1) * tb->scal; -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E4, -+ arg & 0x1); -+ if (err) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E8, -+ (arg & 0x2) >> 1); -+ if (err) -+ return err; -+ } -+ -+ return err; -+} -+ -+int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *val) -+{ -+ const struct mtk_drive_desc *tb; -+ int err, val1, val2; -+ -+ tb = &mtk_drive[desc->drv_n]; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E4, &val1); -+ if (err) -+ return err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E8, &val2); -+ if (err) -+ return err; -+ -+ /* 4mA when (e8, e4) = (0, 0); 8mA when (e8, e4) = (0, 1) -+ * 12mA when (e8, e4) = (1, 0); 16mA when (e8, e4) = (1, 1) -+ */ -+ *val = (((val2 << 1) + val1) / tb->scal + 1) * tb->step; -+ -+ return 0; -+} -+ -+/* Revision 1 */ -+int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg) -+{ -+ const struct mtk_drive_desc *tb; -+ int err = -ENOTSUPP; -+ -+ tb = &mtk_drive[desc->drv_n]; -+ -+ if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { -+ arg = (arg / tb->step - 1) * tb->scal; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, -+ arg); -+ if (err) -+ return err; -+ } -+ -+ return err; -+} -+ -+int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *val) -+{ -+ const struct mtk_drive_desc *tb; -+ int err, val1; -+ -+ tb = &mtk_drive[desc->drv_n]; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, &val1); -+ if (err) -+ return err; -+ -+ *val = ((val1 & 0x7) / tb->scal + 1) * tb->step; -+ -+ return 0; -+} -+ -+int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ u32 arg) -+{ -+ int err; -+ -+ /* 10K off & 50K (75K) off, when (R0, R1) = (0, 0); -+ * 10K off & 50K (75K) on, when (R0, R1) = (0, 1); -+ * 10K on & 50K (75K) off, when (R0, R1) = (1, 0); -+ * 10K on & 50K (75K) on, when (R0, R1) = (1, 1) -+ */ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, arg & 1); -+ if (err) -+ return 0; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, -+ !!(arg & 2)); -+ if (err) -+ return 0; -+ -+ arg = pullup ? 0 : 1; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, arg); -+ -+ /* If PUPD register is not supported for that pin, let's fallback to -+ * general bias control. -+ */ -+ if (err == -ENOTSUPP) { -+ if (hw->soc->bias_set) { -+ err = hw->soc->bias_set(hw, desc, pullup); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ } -+ -+ return err; -+} -+ -+int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ u32 *val) -+{ -+ u32 t, t2; -+ int err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, &t); -+ -+ /* If PUPD register is not supported for that pin, let's fallback to -+ * general bias control. -+ */ -+ if (err == -ENOTSUPP) { -+ if (hw->soc->bias_get) { -+ err = hw->soc->bias_get(hw, desc, pullup, val); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ } else { -+ /* t == 0 supposes PULLUP for the customized PULL setup */ -+ if (err) -+ return err; -+ -+ if (pullup ^ !t) -+ return -EINVAL; -+ } -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &t); -+ if (err) -+ return err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &t2); -+ if (err) -+ return err; -+ -+ *val = (t | t2 << 1) & 0x7; -+ -+ return 0; -+} -+ -+int mtk_pinconf_adv_drive_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg) -+{ -+ int err; -+ int en = arg & 1; -+ int e0 = !!(arg & 2); -+ int e1 = !!(arg & 4); -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, en); -+ if (err) -+ return err; -+ -+ if (!en) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, e0); -+ if (err) -+ return err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, e1); -+ if (err) -+ return err; -+ -+ return err; -+} -+ -+int mtk_pinconf_adv_drive_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 *val) -+{ -+ u32 en, e0, e1; -+ int err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, &en); -+ if (err) -+ return err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, &e0); -+ if (err) -+ return err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, &e1); -+ if (err) -+ return err; -+ -+ *val = (en | e0 << 1 | e1 << 2) & 0x7; -+ -+ return 0; -+} ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h -@@ -0,0 +1,302 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: Sean Wang -+ * -+ */ -+ -+#ifndef __PINCTRL_MTK_COMMON_V2_H -+#define __PINCTRL_MTK_COMMON_V2_H -+ -+#include -+ -+#define MTK_INPUT 0 -+#define MTK_OUTPUT 1 -+#define MTK_DISABLE 0 -+#define MTK_ENABLE 1 -+#define MTK_PULLDOWN 0 -+#define MTK_PULLUP 1 -+ -+#define EINT_NA U16_MAX -+#define NO_EINT_SUPPORT EINT_NA -+ -+#define PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, \ -+ _s_bit, _x_bits, _sz_reg, _fixed) { \ -+ .s_pin = _s_pin, \ -+ .e_pin = _e_pin, \ -+ .i_base = _i_base, \ -+ .s_addr = _s_addr, \ -+ .x_addrs = _x_addrs, \ -+ .s_bit = _s_bit, \ -+ .x_bits = _x_bits, \ -+ .sz_reg = _sz_reg, \ -+ .fixed = _fixed, \ -+ } -+ -+#define PIN_FIELD(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 32, 0) -+ -+#define PINS_FIELD(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ -+ PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ -+ _x_bits, 32, 1) -+ -+/* List these attributes which could be modified for the pin */ -+enum { -+ PINCTRL_PIN_REG_MODE, -+ PINCTRL_PIN_REG_DIR, -+ PINCTRL_PIN_REG_DI, -+ PINCTRL_PIN_REG_DO, -+ PINCTRL_PIN_REG_SR, -+ PINCTRL_PIN_REG_SMT, -+ PINCTRL_PIN_REG_PD, -+ PINCTRL_PIN_REG_PU, -+ PINCTRL_PIN_REG_E4, -+ PINCTRL_PIN_REG_E8, -+ PINCTRL_PIN_REG_TDSEL, -+ PINCTRL_PIN_REG_RDSEL, -+ PINCTRL_PIN_REG_DRV, -+ PINCTRL_PIN_REG_PUPD, -+ PINCTRL_PIN_REG_R0, -+ PINCTRL_PIN_REG_R1, -+ PINCTRL_PIN_REG_IES, -+ PINCTRL_PIN_REG_PULLEN, -+ PINCTRL_PIN_REG_PULLSEL, -+ PINCTRL_PIN_REG_DRV_EN, -+ PINCTRL_PIN_REG_DRV_E0, -+ PINCTRL_PIN_REG_DRV_E1, -+ PINCTRL_PIN_REG_MAX, -+}; -+ -+/* Group the pins by the driving current */ -+enum { -+ DRV_FIXED, -+ DRV_GRP0, -+ DRV_GRP1, -+ DRV_GRP2, -+ DRV_GRP3, -+ DRV_GRP4, -+ DRV_GRP_MAX, -+}; -+ -+static const char * const mtk_default_register_base_names[] = { -+ "base", -+}; -+ -+/* struct mtk_pin_field - the structure that holds the information of the field -+ * used to describe the attribute for the pin -+ * @base: the index pointing to the entry in base address list -+ * @offset: the register offset relative to the base address -+ * @mask: the mask used to filter out the field from the register -+ * @bitpos: the start bit relative to the register -+ * @next: the indication that the field would be extended to the -+ next register -+ */ -+struct mtk_pin_field { -+ u8 index; -+ u32 offset; -+ u32 mask; -+ u8 bitpos; -+ u8 next; -+}; -+ -+/* struct mtk_pin_field_calc - the structure that holds the range providing -+ * the guide used to look up the relevant field -+ * @s_pin: the start pin within the range -+ * @e_pin: the end pin within the range -+ * @i_base: the index pointing to the entry in base address list -+ * @s_addr: the start address for the range -+ * @x_addrs: the address distance between two consecutive registers -+ * within the range -+ * @s_bit: the start bit for the first register within the range -+ * @x_bits: the bit distance between two consecutive pins within -+ * the range -+ * @sz_reg: the size of bits in a register -+ * @fixed: the consecutive pins share the same bits with the 1st -+ * pin -+ */ -+struct mtk_pin_field_calc { -+ u16 s_pin; -+ u16 e_pin; -+ u8 i_base; -+ u32 s_addr; -+ u8 x_addrs; -+ u8 s_bit; -+ u8 x_bits; -+ u8 sz_reg; -+ u8 fixed; -+}; -+ -+/* struct mtk_pin_reg_calc - the structure that holds all ranges used to -+ * determine which register the pin would make use of -+ * for certain pin attribute. -+ * @range: the start address for the range -+ * @nranges: the number of items in the range -+ */ -+struct mtk_pin_reg_calc { -+ const struct mtk_pin_field_calc *range; -+ unsigned int nranges; -+}; -+ -+/** -+ * struct mtk_func_desc - the structure that providing information -+ * all the funcs for this pin -+ * @name: the name of function -+ * @muxval: the mux to the function -+ */ -+struct mtk_func_desc { -+ const char *name; -+ u8 muxval; -+}; -+ -+/** -+ * struct mtk_eint_desc - the structure that providing information -+ * for eint data per pin -+ * @eint_m: the eint mux for this pin -+ * @eitn_n: the eint number for this pin -+ */ -+struct mtk_eint_desc { -+ u16 eint_m; -+ u16 eint_n; -+}; -+ -+/** -+ * struct mtk_pin_desc - the structure that providing information -+ * for each pin of chips -+ * @number: unique pin number from the global pin number space -+ * @name: name for this pin -+ * @eint: the eint data for this pin -+ * @drv_n: the index with the driving group -+ * @funcs: all available functions for this pins (only used in -+ * those drivers compatible to pinctrl-mtk-common.c-like -+ * ones) -+ */ -+struct mtk_pin_desc { -+ unsigned int number; -+ const char *name; -+ struct mtk_eint_desc eint; -+ u8 drv_n; -+ struct mtk_func_desc *funcs; -+}; -+ -+struct mtk_pinctrl_group { -+ const char *name; -+ unsigned long config; -+ unsigned pin; -+}; -+ -+struct mtk_pinctrl; -+ -+/* struct mtk_pin_soc - the structure that holds SoC-specific data */ -+struct mtk_pin_soc { -+ const struct mtk_pin_reg_calc *reg_cal; -+ const struct mtk_pin_desc *pins; -+ unsigned int npins; -+ const struct group_desc *grps; -+ unsigned int ngrps; -+ const struct function_desc *funcs; -+ unsigned int nfuncs; -+ const struct mtk_eint_regs *eint_regs; -+ const struct mtk_eint_hw *eint_hw; -+ -+ /* Specific parameters per SoC */ -+ u8 gpio_m; -+ bool ies_present; -+ const char * const *base_names; -+ unsigned int nbase_names; -+ -+ /* Specific pinconfig operations */ -+ int (*bias_disable_set)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc); -+ int (*bias_disable_get)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *res); -+ int (*bias_set)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup); -+ int (*bias_get)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, int *res); -+ -+ int (*drive_set)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg); -+ int (*drive_get)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *val); -+ -+ int (*adv_pull_set)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ u32 arg); -+ int (*adv_pull_get)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ u32 *val); -+ int (*adv_drive_set)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg); -+ int (*adv_drive_get)(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 *val); -+ -+ /* Specific driver data */ -+ void *driver_data; -+}; -+ -+struct mtk_pinctrl { -+ struct pinctrl_dev *pctrl; -+ void __iomem **base; -+ u8 nbase; -+ struct device *dev; -+ struct gpio_chip chip; -+ const struct mtk_pin_soc *soc; -+ struct mtk_eint *eint; -+ struct mtk_pinctrl_group *groups; -+ const char **grp_names; -+}; -+ -+void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set); -+ -+int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, -+ int field, int value); -+int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, -+ int field, int *value); -+ -+int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev); -+ -+int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc); -+int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *res); -+int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup); -+int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ int *res); -+ -+int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc); -+int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, -+ int *res); -+int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup); -+int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ int *res); -+ -+int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg); -+int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *val); -+ -+int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg); -+int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, int *val); -+ -+int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ u32 arg); -+int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, bool pullup, -+ u32 *val); -+int mtk_pinconf_adv_drive_set(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 arg); -+int mtk_pinconf_adv_drive_get(struct mtk_pinctrl *hw, -+ const struct mtk_pin_desc *desc, u32 *val); -+ -+#endif /* __PINCTRL_MTK_COMMON_V2_H */ ---- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c -@@ -514,8 +514,8 @@ static int mtk_pctrl_dt_subnode_to_map(s - - pins = of_find_property(node, "pinmux", NULL); - if (!pins) { -- dev_err(pctl->dev, "missing pins property in node %s .\n", -- node->name); -+ dev_err(pctl->dev, "missing pins property in node %pOFn .\n", -+ node); - return -EINVAL; - } - ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6765.h -@@ -0,0 +1,1754 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: ZH Chen -+ * -+ */ -+ -+#ifndef __PINCTRL_MTK_MT6765_H -+#define __PINCTRL_MTK_MT6765_H -+ -+#include "pinctrl-paris.h" -+ -+static struct mtk_pin_desc mtk_pins_mt6765[] = { -+ MTK_PIN( -+ 0, "GPIO0", -+ MTK_EINT_FUNCTION(0, 0), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO0"), -+ MTK_FUNCTION(1, "UTXD1"), -+ MTK_FUNCTION(2, "CLKM0"), -+ MTK_FUNCTION(3, "MD_INT0"), -+ MTK_FUNCTION(4, "I2S0_MCK"), -+ MTK_FUNCTION(5, "MD_UTXD1"), -+ MTK_FUNCTION(6, "TP_GPIO0_AO"), -+ MTK_FUNCTION(7, "DBG_MON_B9") -+ ), -+ MTK_PIN( -+ 1, "GPIO1", -+ MTK_EINT_FUNCTION(0, 1), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO1"), -+ MTK_FUNCTION(1, "URXD1"), -+ MTK_FUNCTION(2, "CLKM1"), -+ MTK_FUNCTION(4, "I2S0_BCK"), -+ MTK_FUNCTION(5, "MD_URXD1"), -+ MTK_FUNCTION(6, "TP_GPIO1_AO"), -+ MTK_FUNCTION(7, "DBG_MON_B10") -+ ), -+ MTK_PIN( -+ 2, "GPIO2", -+ MTK_EINT_FUNCTION(0, 2), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO2"), -+ MTK_FUNCTION(1, "UCTS0"), -+ MTK_FUNCTION(2, "CLKM2"), -+ MTK_FUNCTION(3, "UTXD1"), -+ MTK_FUNCTION(4, "I2S0_LRCK"), -+ MTK_FUNCTION(5, "ANT_SEL6"), -+ MTK_FUNCTION(6, "TP_GPIO2_AO"), -+ MTK_FUNCTION(7, "DBG_MON_B11") -+ ), -+ MTK_PIN( -+ 3, "GPIO3", -+ MTK_EINT_FUNCTION(0, 3), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO3"), -+ MTK_FUNCTION(1, "URTS0"), -+ MTK_FUNCTION(2, "CLKM3"), -+ MTK_FUNCTION(3, "URXD1"), -+ MTK_FUNCTION(4, "I2S0_DI"), -+ MTK_FUNCTION(5, "ANT_SEL7"), -+ MTK_FUNCTION(6, "TP_GPIO3_AO"), -+ MTK_FUNCTION(7, "DBG_MON_B12") -+ ), -+ MTK_PIN( -+ 4, "GPIO4", -+ MTK_EINT_FUNCTION(0, 4), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO4"), -+ MTK_FUNCTION(1, "SPI1_B_MI"), -+ MTK_FUNCTION(2, "SCP_SPI1_MI"), -+ MTK_FUNCTION(3, "UCTS0"), -+ MTK_FUNCTION(4, "I2S3_MCK"), -+ MTK_FUNCTION(5, "SSPM_URXD_AO"), -+ MTK_FUNCTION(6, "TP_GPIO4_AO") -+ ), -+ MTK_PIN( -+ 5, "GPIO5", -+ MTK_EINT_FUNCTION(0, 5), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO5"), -+ MTK_FUNCTION(1, "SPI1_B_CSB"), -+ MTK_FUNCTION(2, "SCP_SPI1_CS"), -+ MTK_FUNCTION(3, "URTS0"), -+ MTK_FUNCTION(4, "I2S3_BCK"), -+ MTK_FUNCTION(5, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(6, "TP_GPIO5_AO") -+ ), -+ MTK_PIN( -+ 6, "GPIO6", -+ MTK_EINT_FUNCTION(0, 6), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO6"), -+ MTK_FUNCTION(1, "SPI1_B_MO"), -+ MTK_FUNCTION(2, "SCP_SPI1_MO"), -+ MTK_FUNCTION(3, "PWM0"), -+ MTK_FUNCTION(4, "I2S3_LRCK"), -+ MTK_FUNCTION(5, "MD_UTXD0"), -+ MTK_FUNCTION(6, "TP_GPIO6_AO") -+ ), -+ MTK_PIN( -+ 7, "GPIO7", -+ MTK_EINT_FUNCTION(0, 7), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO7"), -+ MTK_FUNCTION(1, "SPI1_B_CLK"), -+ MTK_FUNCTION(2, "SCP_SPI1_CK"), -+ MTK_FUNCTION(3, "PWM1"), -+ MTK_FUNCTION(4, "I2S3_DO"), -+ MTK_FUNCTION(5, "MD_URXD0"), -+ MTK_FUNCTION(6, "TP_GPIO7_AO") -+ ), -+ MTK_PIN( -+ 8, "GPIO8", -+ MTK_EINT_FUNCTION(0, 8), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO8"), -+ MTK_FUNCTION(1, "UTXD1"), -+ MTK_FUNCTION(2, "SRCLKENAI0"), -+ MTK_FUNCTION(3, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(4, "ANT_SEL3"), -+ MTK_FUNCTION(5, "MFG_JTAG_TRSTN"), -+ MTK_FUNCTION(6, "I2S2_MCK"), -+ MTK_FUNCTION(7, "JTRSTN_SEL1") -+ ), -+ MTK_PIN( -+ 9, "GPIO9", -+ MTK_EINT_FUNCTION(0, 9), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO9"), -+ MTK_FUNCTION(1, "MD_INT0"), -+ MTK_FUNCTION(2, "CMMCLK2"), -+ MTK_FUNCTION(3, "CONN_MCU_TRST_B"), -+ MTK_FUNCTION(4, "IDDIG"), -+ MTK_FUNCTION(5, "SDA_6306"), -+ MTK_FUNCTION(6, "MCUPM_JTAG_TRSTN"), -+ MTK_FUNCTION(7, "DBG_MON_B22") -+ ), -+ MTK_PIN( -+ 10, "GPIO10", -+ MTK_EINT_FUNCTION(0, 10), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO10"), -+ MTK_FUNCTION(1, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(3, "CONN_MCU_DBGI_N"), -+ MTK_FUNCTION(4, "SRCLKENAI1"), -+ MTK_FUNCTION(5, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(6, "CMVREF1"), -+ MTK_FUNCTION(7, "DBG_MON_B23") -+ ), -+ MTK_PIN( -+ 11, "GPIO11", -+ MTK_EINT_FUNCTION(0, 11), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO11"), -+ MTK_FUNCTION(1, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(2, "CLKM3"), -+ MTK_FUNCTION(3, "ANT_SEL6"), -+ MTK_FUNCTION(4, "SRCLKENAI0"), -+ MTK_FUNCTION(5, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(6, "UCTS1"), -+ MTK_FUNCTION(7, "DBG_MON_B24") -+ ), -+ MTK_PIN( -+ 12, "GPIO12", -+ MTK_EINT_FUNCTION(0, 12), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO12"), -+ MTK_FUNCTION(1, "PWM0"), -+ MTK_FUNCTION(2, "SRCLKENAI1"), -+ MTK_FUNCTION(3, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(4, "MD_INT0"), -+ MTK_FUNCTION(5, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(6, "URTS1") -+ ), -+ MTK_PIN( -+ 13, "GPIO13", -+ MTK_EINT_FUNCTION(0, 13), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO13"), -+ MTK_FUNCTION(1, "ANT_SEL0"), -+ MTK_FUNCTION(2, "SPI4_MI"), -+ MTK_FUNCTION(3, "SCP_SPI0_MI"), -+ MTK_FUNCTION(4, "MD_URXD0"), -+ MTK_FUNCTION(5, "CLKM0"), -+ MTK_FUNCTION(6, "I2S0_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A0") -+ ), -+ MTK_PIN( -+ 14, "GPIO14", -+ MTK_EINT_FUNCTION(0, 14), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO14"), -+ MTK_FUNCTION(1, "ANT_SEL1"), -+ MTK_FUNCTION(2, "SPI4_CSB"), -+ MTK_FUNCTION(3, "SCP_SPI0_CS"), -+ MTK_FUNCTION(4, "MD_UTXD0"), -+ MTK_FUNCTION(5, "CLKM1"), -+ MTK_FUNCTION(6, "I2S0_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A1") -+ ), -+ MTK_PIN( -+ 15, "GPIO15", -+ MTK_EINT_FUNCTION(0, 15), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO15"), -+ MTK_FUNCTION(1, "ANT_SEL2"), -+ MTK_FUNCTION(2, "SPI4_MO"), -+ MTK_FUNCTION(3, "SCP_SPI0_MO"), -+ MTK_FUNCTION(4, "MD_URXD1"), -+ MTK_FUNCTION(5, "CLKM2"), -+ MTK_FUNCTION(6, "I2S0_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A2") -+ ), -+ MTK_PIN( -+ 16, "GPIO16", -+ MTK_EINT_FUNCTION(0, 16), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO16"), -+ MTK_FUNCTION(1, "ANT_SEL3"), -+ MTK_FUNCTION(2, "SPI4_CLK"), -+ MTK_FUNCTION(3, "SCP_SPI0_CK"), -+ MTK_FUNCTION(4, "MD_UTXD1"), -+ MTK_FUNCTION(5, "CLKM3"), -+ MTK_FUNCTION(6, "I2S3_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A3") -+ ), -+ MTK_PIN( -+ 17, "GPIO17", -+ MTK_EINT_FUNCTION(0, 17), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO17"), -+ MTK_FUNCTION(1, "ANT_SEL4"), -+ MTK_FUNCTION(2, "SPI2_MO"), -+ MTK_FUNCTION(3, "SCP_SPI0_MO"), -+ MTK_FUNCTION(4, "PWM1"), -+ MTK_FUNCTION(5, "IDDIG"), -+ MTK_FUNCTION(6, "I2S0_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A4") -+ ), -+ MTK_PIN( -+ 18, "GPIO18", -+ MTK_EINT_FUNCTION(0, 18), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO18"), -+ MTK_FUNCTION(1, "ANT_SEL5"), -+ MTK_FUNCTION(2, "SPI2_CLK"), -+ MTK_FUNCTION(3, "SCP_SPI0_CK"), -+ MTK_FUNCTION(4, "MD_INT0"), -+ MTK_FUNCTION(5, "USB_DRVVBUS"), -+ MTK_FUNCTION(6, "I2S3_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A5") -+ ), -+ MTK_PIN( -+ 19, "GPIO19", -+ MTK_EINT_FUNCTION(0, 19), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO19"), -+ MTK_FUNCTION(1, "ANT_SEL6"), -+ MTK_FUNCTION(2, "SPI2_MI"), -+ MTK_FUNCTION(3, "SCP_SPI0_MI"), -+ MTK_FUNCTION(4, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(6, "I2S3_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A6") -+ ), -+ MTK_PIN( -+ 20, "GPIO20", -+ MTK_EINT_FUNCTION(0, 20), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO20"), -+ MTK_FUNCTION(1, "ANT_SEL7"), -+ MTK_FUNCTION(2, "SPI2_CSB"), -+ MTK_FUNCTION(3, "SCP_SPI0_CS"), -+ MTK_FUNCTION(4, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(5, "CMMCLK3"), -+ MTK_FUNCTION(6, "I2S3_DO"), -+ MTK_FUNCTION(7, "DBG_MON_A7") -+ ), -+ MTK_PIN( -+ 21, "GPIO21", -+ MTK_EINT_FUNCTION(0, 21), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO21"), -+ MTK_FUNCTION(1, "SPI3_MI"), -+ MTK_FUNCTION(2, "SRCLKENAI1"), -+ MTK_FUNCTION(3, "DAP_MD32_SWD"), -+ MTK_FUNCTION(4, "CMVREF0"), -+ MTK_FUNCTION(5, "SCP_SPI0_MI"), -+ MTK_FUNCTION(6, "I2S2_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A8") -+ ), -+ MTK_PIN( -+ 22, "GPIO22", -+ MTK_EINT_FUNCTION(0, 22), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO22"), -+ MTK_FUNCTION(1, "SPI3_CSB"), -+ MTK_FUNCTION(2, "SRCLKENAI0"), -+ MTK_FUNCTION(3, "DAP_MD32_SWCK"), -+ MTK_FUNCTION(4, "CMVREF1"), -+ MTK_FUNCTION(5, "SCP_SPI0_CS"), -+ MTK_FUNCTION(6, "I2S2_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A9") -+ ), -+ MTK_PIN( -+ 23, "GPIO23", -+ MTK_EINT_FUNCTION(0, 23), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO23"), -+ MTK_FUNCTION(1, "SPI3_MO"), -+ MTK_FUNCTION(2, "PWM0"), -+ MTK_FUNCTION(3, "KPROW7"), -+ MTK_FUNCTION(4, "ANT_SEL3"), -+ MTK_FUNCTION(5, "SCP_SPI0_MO"), -+ MTK_FUNCTION(6, "I2S2_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A10") -+ ), -+ MTK_PIN( -+ 24, "GPIO24", -+ MTK_EINT_FUNCTION(0, 24), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO24"), -+ MTK_FUNCTION(1, "SPI3_CLK"), -+ MTK_FUNCTION(2, "UDI_TCK"), -+ MTK_FUNCTION(3, "IO_JTAG_TCK"), -+ MTK_FUNCTION(4, "SSPM_JTAG_TCK"), -+ MTK_FUNCTION(5, "SCP_SPI0_CK"), -+ MTK_FUNCTION(6, "I2S2_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A11") -+ ), -+ MTK_PIN( -+ 25, "GPIO25", -+ MTK_EINT_FUNCTION(0, 25), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO25"), -+ MTK_FUNCTION(1, "SPI1_A_MI"), -+ MTK_FUNCTION(2, "UDI_TMS"), -+ MTK_FUNCTION(3, "IO_JTAG_TMS"), -+ MTK_FUNCTION(4, "SSPM_JTAG_TMS"), -+ MTK_FUNCTION(5, "KPROW3"), -+ MTK_FUNCTION(6, "I2S1_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A12") -+ ), -+ MTK_PIN( -+ 26, "GPIO26", -+ MTK_EINT_FUNCTION(0, 26), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO26"), -+ MTK_FUNCTION(1, "SPI1_A_CSB"), -+ MTK_FUNCTION(2, "UDI_TDI"), -+ MTK_FUNCTION(3, "IO_JTAG_TDI"), -+ MTK_FUNCTION(4, "SSPM_JTAG_TDI"), -+ MTK_FUNCTION(5, "KPROW4"), -+ MTK_FUNCTION(6, "I2S1_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A13") -+ ), -+ MTK_PIN( -+ 27, "GPIO27", -+ MTK_EINT_FUNCTION(0, 27), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO27"), -+ MTK_FUNCTION(1, "SPI1_A_MO"), -+ MTK_FUNCTION(2, "UDI_TDO"), -+ MTK_FUNCTION(3, "IO_JTAG_TDO"), -+ MTK_FUNCTION(4, "SSPM_JTAG_TDO"), -+ MTK_FUNCTION(5, "KPROW5"), -+ MTK_FUNCTION(6, "I2S1_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A14") -+ ), -+ MTK_PIN( -+ 28, "GPIO28", -+ MTK_EINT_FUNCTION(0, 28), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO28"), -+ MTK_FUNCTION(1, "SPI1_A_CLK"), -+ MTK_FUNCTION(2, "UDI_NTRST"), -+ MTK_FUNCTION(3, "IO_JTAG_TRSTN"), -+ MTK_FUNCTION(4, "SSPM_JTAG_TRSTN"), -+ MTK_FUNCTION(5, "KPROW6"), -+ MTK_FUNCTION(6, "I2S1_DO"), -+ MTK_FUNCTION(7, "DBG_MON_A15") -+ ), -+ MTK_PIN( -+ 29, "GPIO29", -+ MTK_EINT_FUNCTION(0, 29), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO29"), -+ MTK_FUNCTION(1, "MSDC1_CLK"), -+ MTK_FUNCTION(2, "IO_JTAG_TCK"), -+ MTK_FUNCTION(3, "UDI_TCK"), -+ MTK_FUNCTION(4, "CONN_DSP_JCK"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TCK"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(7, "DAP_MD32_SWCK") -+ ), -+ MTK_PIN( -+ 30, "GPIO30", -+ MTK_EINT_FUNCTION(0, 30), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO30"), -+ MTK_FUNCTION(1, "MSDC1_CMD"), -+ MTK_FUNCTION(2, "IO_JTAG_TMS"), -+ MTK_FUNCTION(3, "UDI_TMS"), -+ MTK_FUNCTION(4, "CONN_DSP_JMS"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TMS"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(7, "DAP_MD32_SWD") -+ ), -+ MTK_PIN( -+ 31, "GPIO31", -+ MTK_EINT_FUNCTION(0, 31), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO31"), -+ MTK_FUNCTION(1, "MSDC1_DAT3") -+ ), -+ MTK_PIN( -+ 32, "GPIO32", -+ MTK_EINT_FUNCTION(0, 32), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO32"), -+ MTK_FUNCTION(1, "MSDC1_DAT0"), -+ MTK_FUNCTION(2, "IO_JTAG_TDI"), -+ MTK_FUNCTION(3, "UDI_TDI"), -+ MTK_FUNCTION(4, "CONN_DSP_JDI"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TDI") -+ ), -+ MTK_PIN( -+ 33, "GPIO33", -+ MTK_EINT_FUNCTION(0, 33), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO33"), -+ MTK_FUNCTION(1, "MSDC1_DAT2"), -+ MTK_FUNCTION(2, "IO_JTAG_TRSTN"), -+ MTK_FUNCTION(3, "UDI_NTRST"), -+ MTK_FUNCTION(4, "CONN_DSP_JINTP"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TRSTN") -+ ), -+ MTK_PIN( -+ 34, "GPIO34", -+ MTK_EINT_FUNCTION(0, 34), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO34"), -+ MTK_FUNCTION(1, "MSDC1_DAT1"), -+ MTK_FUNCTION(2, "IO_JTAG_TDO"), -+ MTK_FUNCTION(3, "UDI_TDO"), -+ MTK_FUNCTION(4, "CONN_DSP_JDO"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TDO") -+ ), -+ MTK_PIN( -+ 35, "GPIO35", -+ MTK_EINT_FUNCTION(0, 35), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO35"), -+ MTK_FUNCTION(1, "MD1_SIM2_SIO"), -+ MTK_FUNCTION(2, "CCU_JTAG_TDO"), -+ MTK_FUNCTION(3, "MD1_SIM1_SIO"), -+ MTK_FUNCTION(5, "SCP_JTAG_TDO"), -+ MTK_FUNCTION(6, "CONN_DSP_JDO"), -+ MTK_FUNCTION(7, "DBG_MON_A16") -+ ), -+ MTK_PIN( -+ 36, "GPIO36", -+ MTK_EINT_FUNCTION(0, 36), -+ DRV_GRP0, -+ MTK_FUNCTION(0, "GPIO36"), -+ MTK_FUNCTION(1, "MD1_SIM2_SRST"), -+ MTK_FUNCTION(2, "CCU_JTAG_TMS"), -+ MTK_FUNCTION(3, "MD1_SIM1_SRST"), -+ MTK_FUNCTION(4, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(5, "SCP_JTAG_TMS"), -+ MTK_FUNCTION(6, "CONN_DSP_JMS"), -+ MTK_FUNCTION(7, "DBG_MON_A17") -+ ), -+ MTK_PIN( -+ 37, "GPIO37", -+ MTK_EINT_FUNCTION(0, 37), -+ DRV_GRP0, -+ MTK_FUNCTION(0, "GPIO37"), -+ MTK_FUNCTION(1, "MD1_SIM2_SCLK"), -+ MTK_FUNCTION(2, "CCU_JTAG_TDI"), -+ MTK_FUNCTION(3, "MD1_SIM1_SCLK"), -+ MTK_FUNCTION(5, "SCP_JTAG_TDI"), -+ MTK_FUNCTION(6, "CONN_DSP_JDI"), -+ MTK_FUNCTION(7, "DBG_MON_A18") -+ ), -+ MTK_PIN( -+ 38, "GPIO38", -+ MTK_EINT_FUNCTION(0, 38), -+ DRV_GRP0, -+ MTK_FUNCTION(0, "GPIO38"), -+ MTK_FUNCTION(1, "MD1_SIM1_SCLK"), -+ MTK_FUNCTION(3, "MD1_SIM2_SCLK"), -+ MTK_FUNCTION(7, "DBG_MON_A19") -+ ), -+ MTK_PIN( -+ 39, "GPIO39", -+ MTK_EINT_FUNCTION(0, 39), -+ DRV_GRP0, -+ MTK_FUNCTION(0, "GPIO39"), -+ MTK_FUNCTION(1, "MD1_SIM1_SRST"), -+ MTK_FUNCTION(2, "CCU_JTAG_TCK"), -+ MTK_FUNCTION(3, "MD1_SIM2_SRST"), -+ MTK_FUNCTION(4, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(5, "SCP_JTAG_TCK"), -+ MTK_FUNCTION(6, "CONN_DSP_JCK"), -+ MTK_FUNCTION(7, "DBG_MON_A20") -+ ), -+ MTK_PIN( -+ 40, "GPIO40", -+ MTK_EINT_FUNCTION(0, 40), -+ DRV_GRP0, -+ MTK_FUNCTION(0, "GPIO40"), -+ MTK_FUNCTION(1, "MD1_SIM1_SIO"), -+ MTK_FUNCTION(2, "CCU_JTAG_TRST"), -+ MTK_FUNCTION(3, "MD1_SIM2_SIO"), -+ MTK_FUNCTION(5, "SCP_JTAG_TRSTN"), -+ MTK_FUNCTION(6, "CONN_DSP_JINTP"), -+ MTK_FUNCTION(7, "DBG_MON_A21") -+ ), -+ MTK_PIN( -+ 41, "GPIO41", -+ MTK_EINT_FUNCTION(0, 41), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO41"), -+ MTK_FUNCTION(1, "IDDIG"), -+ MTK_FUNCTION(2, "URXD1"), -+ MTK_FUNCTION(3, "UCTS0"), -+ MTK_FUNCTION(4, "KPCOL2"), -+ MTK_FUNCTION(5, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(6, "MD_INT0"), -+ MTK_FUNCTION(7, "DBG_MON_A22") -+ ), -+ MTK_PIN( -+ 42, "GPIO42", -+ MTK_EINT_FUNCTION(0, 42), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO42"), -+ MTK_FUNCTION(1, "USB_DRVVBUS"), -+ MTK_FUNCTION(2, "UTXD1"), -+ MTK_FUNCTION(3, "URTS0"), -+ MTK_FUNCTION(4, "KPROW2"), -+ MTK_FUNCTION(5, "SSPM_URXD_AO"), -+ MTK_FUNCTION(6, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(7, "DBG_MON_A23") -+ ), -+ MTK_PIN( -+ 43, "GPIO43", -+ MTK_EINT_FUNCTION(0, 43), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO43"), -+ MTK_FUNCTION(1, "DISP_PWM"), -+ MTK_FUNCTION(7, "DBG_MON_A24") -+ ), -+ MTK_PIN( -+ 44, "GPIO44", -+ MTK_EINT_FUNCTION(0, 44), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO44"), -+ MTK_FUNCTION(1, "DSI_TE"), -+ MTK_FUNCTION(7, "DBG_MON_A25") -+ ), -+ MTK_PIN( -+ 45, "GPIO45", -+ MTK_EINT_FUNCTION(0, 45), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO45"), -+ MTK_FUNCTION(1, "LCM_RST"), -+ MTK_FUNCTION(7, "DBG_MON_A26") -+ ), -+ MTK_PIN( -+ 46, "GPIO46", -+ MTK_EINT_FUNCTION(0, 46), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO46"), -+ MTK_FUNCTION(1, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(2, "UCTS0"), -+ MTK_FUNCTION(3, "UCTS1"), -+ MTK_FUNCTION(4, "IDDIG"), -+ MTK_FUNCTION(5, "SCL_6306"), -+ MTK_FUNCTION(6, "TP_UCTS1_AO"), -+ MTK_FUNCTION(7, "DBG_MON_A27") -+ ), -+ MTK_PIN( -+ 47, "GPIO47", -+ MTK_EINT_FUNCTION(0, 47), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO47"), -+ MTK_FUNCTION(1, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(2, "URTS0"), -+ MTK_FUNCTION(3, "URTS1"), -+ MTK_FUNCTION(4, "USB_DRVVBUS"), -+ MTK_FUNCTION(5, "SDA_6306"), -+ MTK_FUNCTION(6, "TP_URTS1_AO"), -+ MTK_FUNCTION(7, "DBG_MON_A28") -+ ), -+ MTK_PIN( -+ 48, "GPIO48", -+ MTK_EINT_FUNCTION(0, 48), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO48"), -+ MTK_FUNCTION(1, "SCL5"), -+ MTK_FUNCTION(7, "DBG_MON_A29") -+ ), -+ MTK_PIN( -+ 49, "GPIO49", -+ MTK_EINT_FUNCTION(0, 49), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO49"), -+ MTK_FUNCTION(1, "SDA5"), -+ MTK_FUNCTION(7, "DBG_MON_A30") -+ ), -+ MTK_PIN( -+ 50, "GPIO50", -+ MTK_EINT_FUNCTION(0, 50), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO50"), -+ MTK_FUNCTION(1, "SCL3"), -+ MTK_FUNCTION(2, "URXD1"), -+ MTK_FUNCTION(3, "MD_URXD1"), -+ MTK_FUNCTION(4, "SSPM_URXD_AO"), -+ MTK_FUNCTION(5, "IDDIG"), -+ MTK_FUNCTION(6, "TP_URXD1_AO"), -+ MTK_FUNCTION(7, "DBG_MON_A31") -+ ), -+ MTK_PIN( -+ 51, "GPIO51", -+ MTK_EINT_FUNCTION(0, 51), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO51"), -+ MTK_FUNCTION(1, "SDA3"), -+ MTK_FUNCTION(2, "UTXD1"), -+ MTK_FUNCTION(3, "MD_UTXD1"), -+ MTK_FUNCTION(4, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(5, "USB_DRVVBUS"), -+ MTK_FUNCTION(6, "TP_UTXD1_AO"), -+ MTK_FUNCTION(7, "DBG_MON_A32") -+ ), -+ MTK_PIN( -+ 52, "GPIO52", -+ MTK_EINT_FUNCTION(0, 52), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO52"), -+ MTK_FUNCTION(1, "BPI_BUS15") -+ ), -+ MTK_PIN( -+ 53, "GPIO53", -+ MTK_EINT_FUNCTION(0, 53), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO53"), -+ MTK_FUNCTION(1, "BPI_BUS13") -+ ), -+ MTK_PIN( -+ 54, "GPIO54", -+ MTK_EINT_FUNCTION(0, 54), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO54"), -+ MTK_FUNCTION(1, "BPI_BUS12") -+ ), -+ MTK_PIN( -+ 55, "GPIO55", -+ MTK_EINT_FUNCTION(0, 55), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO55"), -+ MTK_FUNCTION(1, "BPI_BUS8") -+ ), -+ MTK_PIN( -+ 56, "GPIO56", -+ MTK_EINT_FUNCTION(0, 56), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO56"), -+ MTK_FUNCTION(1, "BPI_BUS9"), -+ MTK_FUNCTION(2, "SCL_6306") -+ ), -+ MTK_PIN( -+ 57, "GPIO57", -+ MTK_EINT_FUNCTION(0, 57), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO57"), -+ MTK_FUNCTION(1, "BPI_BUS10"), -+ MTK_FUNCTION(2, "SDA_6306") -+ ), -+ MTK_PIN( -+ 58, "GPIO58", -+ MTK_EINT_FUNCTION(0, 58), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO58"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D2") -+ ), -+ MTK_PIN( -+ 59, "GPIO59", -+ MTK_EINT_FUNCTION(0, 59), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO59"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D1") -+ ), -+ MTK_PIN( -+ 60, "GPIO60", -+ MTK_EINT_FUNCTION(0, 60), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO60"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D0") -+ ), -+ MTK_PIN( -+ 61, "GPIO61", -+ MTK_EINT_FUNCTION(0, 61), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO61"), -+ MTK_FUNCTION(1, "MIPI1_SDATA") -+ ), -+ MTK_PIN( -+ 62, "GPIO62", -+ MTK_EINT_FUNCTION(0, 62), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO62"), -+ MTK_FUNCTION(1, "MIPI1_SCLK") -+ ), -+ MTK_PIN( -+ 63, "GPIO63", -+ MTK_EINT_FUNCTION(0, 63), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO63"), -+ MTK_FUNCTION(1, "MIPI0_SDATA") -+ ), -+ MTK_PIN( -+ 64, "GPIO64", -+ MTK_EINT_FUNCTION(0, 64), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO64"), -+ MTK_FUNCTION(1, "MIPI0_SCLK") -+ ), -+ MTK_PIN( -+ 65, "GPIO65", -+ MTK_EINT_FUNCTION(0, 65), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO65"), -+ MTK_FUNCTION(1, "MIPI3_SDATA"), -+ MTK_FUNCTION(2, "BPI_BUS16") -+ ), -+ MTK_PIN( -+ 66, "GPIO66", -+ MTK_EINT_FUNCTION(0, 66), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO66"), -+ MTK_FUNCTION(1, "MIPI3_SCLK"), -+ MTK_FUNCTION(2, "BPI_BUS17") -+ ), -+ MTK_PIN( -+ 67, "GPIO67", -+ MTK_EINT_FUNCTION(0, 67), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO67"), -+ MTK_FUNCTION(1, "MIPI2_SDATA") -+ ), -+ MTK_PIN( -+ 68, "GPIO68", -+ MTK_EINT_FUNCTION(0, 68), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO68"), -+ MTK_FUNCTION(1, "MIPI2_SCLK") -+ ), -+ MTK_PIN( -+ 69, "GPIO69", -+ MTK_EINT_FUNCTION(0, 69), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO69"), -+ MTK_FUNCTION(1, "BPI_BUS7") -+ ), -+ MTK_PIN( -+ 70, "GPIO70", -+ MTK_EINT_FUNCTION(0, 70), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO70"), -+ MTK_FUNCTION(1, "BPI_BUS6") -+ ), -+ MTK_PIN( -+ 71, "GPIO71", -+ MTK_EINT_FUNCTION(0, 71), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO71"), -+ MTK_FUNCTION(1, "BPI_BUS5") -+ ), -+ MTK_PIN( -+ 72, "GPIO72", -+ MTK_EINT_FUNCTION(0, 72), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO72"), -+ MTK_FUNCTION(1, "BPI_BUS4") -+ ), -+ MTK_PIN( -+ 73, "GPIO73", -+ MTK_EINT_FUNCTION(0, 73), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO73"), -+ MTK_FUNCTION(1, "BPI_BUS3") -+ ), -+ MTK_PIN( -+ 74, "GPIO74", -+ MTK_EINT_FUNCTION(0, 74), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO74"), -+ MTK_FUNCTION(1, "BPI_BUS2") -+ ), -+ MTK_PIN( -+ 75, "GPIO75", -+ MTK_EINT_FUNCTION(0, 75), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO75"), -+ MTK_FUNCTION(1, "BPI_BUS1") -+ ), -+ MTK_PIN( -+ 76, "GPIO76", -+ MTK_EINT_FUNCTION(0, 76), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO76"), -+ MTK_FUNCTION(1, "BPI_BUS0") -+ ), -+ MTK_PIN( -+ 77, "GPIO77", -+ MTK_EINT_FUNCTION(0, 77), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO77"), -+ MTK_FUNCTION(1, "BPI_BUS14") -+ ), -+ MTK_PIN( -+ 78, "GPIO78", -+ MTK_EINT_FUNCTION(0, 78), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO78"), -+ MTK_FUNCTION(1, "BPI_BUS11") -+ ), -+ MTK_PIN( -+ 79, "GPIO79", -+ MTK_EINT_FUNCTION(0, 79), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO79"), -+ MTK_FUNCTION(1, "BPI_PA_VM1"), -+ MTK_FUNCTION(2, "MIPI4_SDATA") -+ ), -+ MTK_PIN( -+ 80, "GPIO80", -+ MTK_EINT_FUNCTION(0, 80), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO80"), -+ MTK_FUNCTION(1, "BPI_PA_VM0"), -+ MTK_FUNCTION(2, "MIPI4_SCLK") -+ ), -+ MTK_PIN( -+ 81, "GPIO81", -+ MTK_EINT_FUNCTION(0, 81), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO81"), -+ MTK_FUNCTION(1, "SDA1"), -+ MTK_FUNCTION(7, "DBG_MON_B0") -+ ), -+ MTK_PIN( -+ 82, "GPIO82", -+ MTK_EINT_FUNCTION(0, 82), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO82"), -+ MTK_FUNCTION(1, "SDA0"), -+ MTK_FUNCTION(7, "DBG_MON_B1") -+ ), -+ MTK_PIN( -+ 83, "GPIO83", -+ MTK_EINT_FUNCTION(0, 83), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO83"), -+ MTK_FUNCTION(1, "SCL0"), -+ MTK_FUNCTION(7, "DBG_MON_B2") -+ ), -+ MTK_PIN( -+ 84, "GPIO84", -+ MTK_EINT_FUNCTION(0, 84), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO84"), -+ MTK_FUNCTION(1, "SCL1"), -+ MTK_FUNCTION(7, "DBG_MON_B3") -+ ), -+ MTK_PIN( -+ 85, "GPIO85", -+ MTK_EINT_FUNCTION(0, 85), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO85"), -+ MTK_FUNCTION(1, "RFIC0_BSI_EN") -+ ), -+ MTK_PIN( -+ 86, "GPIO86", -+ MTK_EINT_FUNCTION(0, 86), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO86"), -+ MTK_FUNCTION(1, "RFIC0_BSI_CK") -+ ), -+ MTK_PIN( -+ 87, "GPIO87", -+ MTK_EINT_FUNCTION(0, 87), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO87"), -+ MTK_FUNCTION(2, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(3, "CMVREF0"), -+ MTK_FUNCTION(4, "MD_URXD0"), -+ MTK_FUNCTION(5, "AGPS_SYNC"), -+ MTK_FUNCTION(6, "EXT_FRAME_SYNC") -+ ), -+ MTK_PIN( -+ 88, "GPIO88", -+ MTK_EINT_FUNCTION(0, 88), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO88"), -+ MTK_FUNCTION(1, "CMMCLK3"), -+ MTK_FUNCTION(2, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(3, "CMVREF1"), -+ MTK_FUNCTION(4, "MD_UTXD0"), -+ MTK_FUNCTION(5, "AGPS_SYNC"), -+ MTK_FUNCTION(6, "DVFSRC_EXT_REQ") -+ ), -+ MTK_PIN( -+ 89, "GPIO89", -+ MTK_EINT_FUNCTION(0, 89), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO89"), -+ MTK_FUNCTION(1, "SRCLKENAI0"), -+ MTK_FUNCTION(2, "PWM2"), -+ MTK_FUNCTION(3, "MD_INT0"), -+ MTK_FUNCTION(4, "USB_DRVVBUS"), -+ MTK_FUNCTION(5, "SCL_6306"), -+ MTK_FUNCTION(6, "TP_GPIO4_AO"), -+ MTK_FUNCTION(7, "DBG_MON_B21") -+ ), -+ MTK_PIN( -+ 90, "GPIO90", -+ MTK_EINT_FUNCTION(0, 90), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO90"), -+ MTK_FUNCTION(1, "URXD1"), -+ MTK_FUNCTION(2, "PWM0"), -+ MTK_FUNCTION(3, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(4, "ANT_SEL4"), -+ MTK_FUNCTION(5, "USB_DRVVBUS"), -+ MTK_FUNCTION(6, "I2S2_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_B4") -+ ), -+ MTK_PIN( -+ 91, "GPIO91", -+ MTK_EINT_FUNCTION(0, 91), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO91"), -+ MTK_FUNCTION(1, "KPROW1"), -+ MTK_FUNCTION(2, "PWM2"), -+ MTK_FUNCTION(3, "MD_INT0"), -+ MTK_FUNCTION(4, "ANT_SEL5"), -+ MTK_FUNCTION(5, "IDDIG"), -+ MTK_FUNCTION(6, "I2S2_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B5") -+ ), -+ MTK_PIN( -+ 92, "GPIO92", -+ MTK_EINT_FUNCTION(0, 92), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO92"), -+ MTK_FUNCTION(1, "KPROW0"), -+ MTK_FUNCTION(5, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(6, "I2S2_DI"), -+ MTK_FUNCTION(7, "DBG_MON_B6") -+ ), -+ MTK_PIN( -+ 93, "GPIO93", -+ MTK_EINT_FUNCTION(0, 93), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO93"), -+ MTK_FUNCTION(1, "KPCOL0"), -+ MTK_FUNCTION(7, "DBG_MON_B7") -+ ), -+ MTK_PIN( -+ 94, "GPIO94", -+ MTK_EINT_FUNCTION(0, 94), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO94"), -+ MTK_FUNCTION(1, "KPCOL1"), -+ MTK_FUNCTION(5, "CMFLASH"), -+ MTK_FUNCTION(6, "CMVREF0"), -+ MTK_FUNCTION(7, "DBG_MON_B8") -+ ), -+ MTK_PIN( -+ 95, "GPIO95", -+ MTK_EINT_FUNCTION(0, 95), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO95"), -+ MTK_FUNCTION(1, "URXD0"), -+ MTK_FUNCTION(2, "UTXD0"), -+ MTK_FUNCTION(3, "MD_URXD0"), -+ MTK_FUNCTION(4, "PTA_RXD"), -+ MTK_FUNCTION(5, "SSPM_URXD_AO"), -+ MTK_FUNCTION(6, "WIFI_RXD") -+ ), -+ MTK_PIN( -+ 96, "GPIO96", -+ MTK_EINT_FUNCTION(0, 96), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO96"), -+ MTK_FUNCTION(1, "UTXD0"), -+ MTK_FUNCTION(2, "URXD0"), -+ MTK_FUNCTION(3, "MD_UTXD0"), -+ MTK_FUNCTION(4, "PTA_TXD"), -+ MTK_FUNCTION(5, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(6, "WIFI_TXD") -+ ), -+ MTK_PIN( -+ 97, "GPIO97", -+ MTK_EINT_FUNCTION(0, 97), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO97"), -+ MTK_FUNCTION(1, "UCTS0"), -+ MTK_FUNCTION(2, "I2S1_MCK"), -+ MTK_FUNCTION(3, "CONN_MCU_TDO"), -+ MTK_FUNCTION(4, "SPI5_MI"), -+ MTK_FUNCTION(5, "SCL_6306"), -+ MTK_FUNCTION(6, "MCUPM_JTAG_TDO"), -+ MTK_FUNCTION(7, "DBG_MON_B15") -+ ), -+ MTK_PIN( -+ 98, "GPIO98", -+ MTK_EINT_FUNCTION(0, 98), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO98"), -+ MTK_FUNCTION(1, "URTS0"), -+ MTK_FUNCTION(2, "I2S1_BCK"), -+ MTK_FUNCTION(3, "CONN_MCU_TMS"), -+ MTK_FUNCTION(4, "SPI5_CSB"), -+ MTK_FUNCTION(6, "MCUPM_JTAG_TMS"), -+ MTK_FUNCTION(7, "DBG_MON_B16") -+ ), -+ MTK_PIN( -+ 99, "GPIO99", -+ MTK_EINT_FUNCTION(0, 99), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO99"), -+ MTK_FUNCTION(1, "CMMCLK0"), -+ MTK_FUNCTION(4, "AUXIF_CLK"), -+ MTK_FUNCTION(5, "PTA_RXD"), -+ MTK_FUNCTION(6, "CONN_UART0_RXD"), -+ MTK_FUNCTION(7, "DBG_MON_B17") -+ ), -+ -+ MTK_PIN( -+ 100, "GPIO100", -+ MTK_EINT_FUNCTION(0, 100), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO100"), -+ MTK_FUNCTION(1, "CMMCLK1"), -+ MTK_FUNCTION(4, "AUXIF_ST"), -+ MTK_FUNCTION(5, "PTA_TXD"), -+ MTK_FUNCTION(6, "CONN_UART0_TXD"), -+ MTK_FUNCTION(7, "DBG_MON_B18") -+ ), -+ MTK_PIN( -+ 101, "GPIO101", -+ MTK_EINT_FUNCTION(0, 101), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO101"), -+ MTK_FUNCTION(1, "CMFLASH"), -+ MTK_FUNCTION(2, "I2S1_LRCK"), -+ MTK_FUNCTION(3, "CONN_MCU_TCK"), -+ MTK_FUNCTION(4, "SPI5_MO"), -+ MTK_FUNCTION(6, "MCUPM_JTAG_TCK"), -+ MTK_FUNCTION(7, "DBG_MON_B19") -+ ), -+ MTK_PIN( -+ 102, "GPIO102", -+ MTK_EINT_FUNCTION(0, 102), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO102"), -+ MTK_FUNCTION(1, "CMVREF0"), -+ MTK_FUNCTION(2, "I2S1_DO"), -+ MTK_FUNCTION(3, "CONN_MCU_TDI"), -+ MTK_FUNCTION(4, "SPI5_CLK"), -+ MTK_FUNCTION(5, "AGPS_SYNC"), -+ MTK_FUNCTION(6, "MCUPM_JTAG_TDI"), -+ MTK_FUNCTION(7, "DBG_MON_B20") -+ ), -+ MTK_PIN( -+ 103, "GPIO103", -+ MTK_EINT_FUNCTION(0, 103), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO103"), -+ MTK_FUNCTION(1, "SCL2"), -+ MTK_FUNCTION(2, "TP_UTXD1_AO"), -+ MTK_FUNCTION(3, "MD_UTXD0"), -+ MTK_FUNCTION(4, "MD_UTXD1"), -+ MTK_FUNCTION(5, "TP_URTS2_AO"), -+ MTK_FUNCTION(6, "WIFI_TXD"), -+ MTK_FUNCTION(7, "DBG_MON_B25") -+ ), -+ MTK_PIN( -+ 104, "GPIO104", -+ MTK_EINT_FUNCTION(0, 104), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO104"), -+ MTK_FUNCTION(1, "SDA2"), -+ MTK_FUNCTION(2, "TP_URXD1_AO"), -+ MTK_FUNCTION(3, "MD_URXD0"), -+ MTK_FUNCTION(4, "MD_URXD1"), -+ MTK_FUNCTION(5, "TP_UCTS2_AO"), -+ MTK_FUNCTION(6, "WIFI_RXD"), -+ MTK_FUNCTION(7, "DBG_MON_B26") -+ ), -+ MTK_PIN( -+ 105, "GPIO105", -+ MTK_EINT_FUNCTION(0, 105), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO105"), -+ MTK_FUNCTION(1, "SCL4"), -+ MTK_FUNCTION(3, "MD_UTXD1"), -+ MTK_FUNCTION(4, "MD_UTXD0"), -+ MTK_FUNCTION(5, "TP_UTXD2_AO"), -+ MTK_FUNCTION(6, "PTA_TXD"), -+ MTK_FUNCTION(7, "DBG_MON_B27") -+ ), -+ MTK_PIN( -+ 106, "GPIO106", -+ MTK_EINT_FUNCTION(0, 106), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO106"), -+ MTK_FUNCTION(1, "SDA4"), -+ MTK_FUNCTION(3, "MD_URXD1"), -+ MTK_FUNCTION(4, "MD_URXD0"), -+ MTK_FUNCTION(5, "TP_URXD2_AO"), -+ MTK_FUNCTION(6, "PTA_RXD"), -+ MTK_FUNCTION(7, "DBG_MON_B28") -+ ), -+ MTK_PIN( -+ 107, "GPIO107", -+ MTK_EINT_FUNCTION(0, 107), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO107"), -+ MTK_FUNCTION(1, "UTXD1"), -+ MTK_FUNCTION(2, "MD_UTXD0"), -+ MTK_FUNCTION(3, "SDA_6306"), -+ MTK_FUNCTION(4, "KPCOL3"), -+ MTK_FUNCTION(5, "CMVREF0"), -+ MTK_FUNCTION(6, "URTS0"), -+ MTK_FUNCTION(7, "DBG_MON_B29") -+ ), -+ MTK_PIN( -+ 108, "GPIO108", -+ MTK_EINT_FUNCTION(0, 108), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO108"), -+ MTK_FUNCTION(1, "CMMCLK2"), -+ MTK_FUNCTION(2, "MD_INT0"), -+ MTK_FUNCTION(3, "CONN_MCU_DBGACK_N"), -+ MTK_FUNCTION(4, "KPCOL4"), -+ MTK_FUNCTION(6, "I2S3_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B30") -+ ), -+ MTK_PIN( -+ 109, "GPIO109", -+ MTK_EINT_FUNCTION(0, 109), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO109"), -+ MTK_FUNCTION(1, "URXD1"), -+ MTK_FUNCTION(2, "MD_URXD0"), -+ MTK_FUNCTION(3, "ANT_SEL7"), -+ MTK_FUNCTION(4, "KPCOL5"), -+ MTK_FUNCTION(5, "CMVREF1"), -+ MTK_FUNCTION(6, "UCTS0"), -+ MTK_FUNCTION(7, "DBG_MON_B31") -+ ), -+ MTK_PIN( -+ 110, "GPIO110", -+ MTK_EINT_FUNCTION(0, 110), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO110"), -+ MTK_FUNCTION(1, "ANT_SEL0"), -+ MTK_FUNCTION(2, "CLKM0"), -+ MTK_FUNCTION(3, "PWM3"), -+ MTK_FUNCTION(4, "MD_INT0"), -+ MTK_FUNCTION(5, "IDDIG"), -+ MTK_FUNCTION(6, "I2S3_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_B13") -+ ), -+ MTK_PIN( -+ 111, "GPIO111", -+ MTK_EINT_FUNCTION(0, 111), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO111"), -+ MTK_FUNCTION(1, "ANT_SEL1"), -+ MTK_FUNCTION(2, "CLKM1"), -+ MTK_FUNCTION(3, "PWM4"), -+ MTK_FUNCTION(4, "PTA_RXD"), -+ MTK_FUNCTION(5, "CMVREF0"), -+ MTK_FUNCTION(6, "I2S3_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B14") -+ ), -+ MTK_PIN( -+ 112, "GPIO112", -+ MTK_EINT_FUNCTION(0, 112), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO112"), -+ MTK_FUNCTION(1, "ANT_SEL2"), -+ MTK_FUNCTION(2, "CLKM2"), -+ MTK_FUNCTION(3, "PWM5"), -+ MTK_FUNCTION(4, "PTA_TXD"), -+ MTK_FUNCTION(5, "CMVREF1"), -+ MTK_FUNCTION(6, "I2S3_DO") -+ ), -+ MTK_PIN( -+ 113, "GPIO113", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO113"), -+ MTK_FUNCTION(1, "CONN_TOP_CLK") -+ ), -+ MTK_PIN( -+ 114, "GPIO114", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO114"), -+ MTK_FUNCTION(1, "CONN_TOP_DATA") -+ ), -+ MTK_PIN( -+ 115, "GPIO115", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO115"), -+ MTK_FUNCTION(1, "CONN_BT_CLK") -+ ), -+ MTK_PIN( -+ 116, "GPIO116", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO116"), -+ MTK_FUNCTION(1, "CONN_BT_DATA") -+ ), -+ MTK_PIN( -+ 117, "GPIO117", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO117"), -+ MTK_FUNCTION(1, "CONN_WF_CTRL0") -+ ), -+ MTK_PIN( -+ 118, "GPIO118", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO118"), -+ MTK_FUNCTION(1, "CONN_WF_CTRL1") -+ ), -+ MTK_PIN( -+ 119, "GPIO119", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO119"), -+ MTK_FUNCTION(1, "CONN_WF_CTRL2") -+ ), -+ MTK_PIN( -+ 120, "GPIO120", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO120"), -+ MTK_FUNCTION(1, "CONN_WB_PTA") -+ ), -+ MTK_PIN( -+ 121, "GPIO121", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO121"), -+ MTK_FUNCTION(1, "CONN_HRST_B") -+ ), -+ MTK_PIN( -+ 122, "GPIO122", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO122"), -+ MTK_FUNCTION(1, "MSDC0_CMD"), -+ MTK_FUNCTION(2, "MSDC0_CMD") -+ ), -+ MTK_PIN( -+ 123, "GPIO123", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO123"), -+ MTK_FUNCTION(1, "MSDC0_DAT0"), -+ MTK_FUNCTION(2, "MSDC0_DAT4") -+ ), -+ MTK_PIN( -+ 124, "GPIO124", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO124"), -+ MTK_FUNCTION(1, "MSDC0_CLK"), -+ MTK_FUNCTION(2, "MSDC0_CLK") -+ ), -+ MTK_PIN( -+ 125, "GPIO125", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO125"), -+ MTK_FUNCTION(1, "MSDC0_DAT2"), -+ MTK_FUNCTION(2, "MSDC0_DAT5") -+ ), -+ MTK_PIN( -+ 126, "GPIO126", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO126"), -+ MTK_FUNCTION(1, "MSDC0_DAT4"), -+ MTK_FUNCTION(2, "MSDC0_DAT2") -+ ), -+ MTK_PIN( -+ 127, "GPIO127", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO127"), -+ MTK_FUNCTION(1, "MSDC0_DAT6"), -+ MTK_FUNCTION(2, "MSDC0_DAT1") -+ ), -+ MTK_PIN( -+ 128, "GPIO128", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO128"), -+ MTK_FUNCTION(1, "MSDC0_DAT1"), -+ MTK_FUNCTION(2, "MSDC0_DAT6") -+ ), -+ MTK_PIN( -+ 129, "GPIO129", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO129"), -+ MTK_FUNCTION(1, "MSDC0_DAT5"), -+ MTK_FUNCTION(2, "MSDC0_DAT0") -+ ), -+ MTK_PIN( -+ 130, "GPIO130", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO130"), -+ MTK_FUNCTION(1, "MSDC0_DAT7"), -+ MTK_FUNCTION(2, "MSDC0_DAT7") -+ ), -+ MTK_PIN( -+ 131, "GPIO131", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO131"), -+ MTK_FUNCTION(1, "MSDC0_DSL"), -+ MTK_FUNCTION(2, "MSDC0_DSL") -+ ), -+ MTK_PIN( -+ 132, "GPIO132", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO132"), -+ MTK_FUNCTION(1, "MSDC0_DAT3"), -+ MTK_FUNCTION(2, "MSDC0_DAT3") -+ ), -+ MTK_PIN( -+ 133, "GPIO133", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO133"), -+ MTK_FUNCTION(1, "MSDC0_RSTB"), -+ MTK_FUNCTION(2, "MSDC0_RSTB") -+ ), -+ MTK_PIN( -+ 134, "GPIO134", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO134"), -+ MTK_FUNCTION(1, "RTC32K_CK") -+ ), -+ MTK_PIN( -+ 135, "GPIO135", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO135"), -+ MTK_FUNCTION(1, "WATCHDOG") -+ ), -+ MTK_PIN( -+ 136, "GPIO136", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO136"), -+ MTK_FUNCTION(1, "AUD_CLK_MOSI"), -+ MTK_FUNCTION(2, "AUD_CLK_MISO"), -+ MTK_FUNCTION(3, "I2S1_MCK") -+ ), -+ MTK_PIN( -+ 137, "GPIO137", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO137"), -+ MTK_FUNCTION(1, "AUD_SYNC_MOSI"), -+ MTK_FUNCTION(2, "AUD_SYNC_MISO"), -+ MTK_FUNCTION(3, "I2S1_BCK") -+ ), -+ MTK_PIN( -+ 138, "GPIO138", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO138"), -+ MTK_FUNCTION(1, "AUD_DAT_MOSI0"), -+ MTK_FUNCTION(2, "AUD_DAT_MISO0"), -+ MTK_FUNCTION(3, "I2S1_LRCK") -+ ), -+ MTK_PIN( -+ 139, "GPIO139", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO139"), -+ MTK_FUNCTION(1, "AUD_DAT_MOSI1"), -+ MTK_FUNCTION(2, "AUD_DAT_MISO1"), -+ MTK_FUNCTION(3, "I2S1_DO") -+ ), -+ MTK_PIN( -+ 140, "GPIO140", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO140"), -+ MTK_FUNCTION(1, "AUD_CLK_MISO"), -+ MTK_FUNCTION(2, "AUD_CLK_MOSI"), -+ MTK_FUNCTION(3, "I2S2_MCK") -+ ), -+ MTK_PIN( -+ 141, "GPIO141", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO141"), -+ MTK_FUNCTION(1, "AUD_SYNC_MISO"), -+ MTK_FUNCTION(2, "AUD_SYNC_MOSI"), -+ MTK_FUNCTION(3, "I2S2_BCK") -+ ), -+ MTK_PIN( -+ 142, "GPIO142", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO142"), -+ MTK_FUNCTION(1, "AUD_DAT_MISO0"), -+ MTK_FUNCTION(2, "AUD_DAT_MOSI0"), -+ MTK_FUNCTION(3, "I2S2_LRCK") -+ ), -+ MTK_PIN( -+ 143, "GPIO143", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO143"), -+ MTK_FUNCTION(1, "AUD_DAT_MISO1"), -+ MTK_FUNCTION(2, "AUD_DAT_MOSI1"), -+ MTK_FUNCTION(3, "I2S2_DI") -+ ), -+ MTK_PIN( -+ 144, "GPIO144", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO144"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MI"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MO") -+ ), -+ MTK_PIN( -+ 145, "GPIO145", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO145"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CSN") -+ ), -+ MTK_PIN( -+ 146, "GPIO146", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO146"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MO"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MI") -+ ), -+ MTK_PIN( -+ 147, "GPIO147", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO147"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CK") -+ ), -+ MTK_PIN( -+ 148, "GPIO148", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO148"), -+ MTK_FUNCTION(1, "SRCLKENA0") -+ ), -+ MTK_PIN( -+ 149, "GPIO149", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO149"), -+ MTK_FUNCTION(1, "SRCLKENA1") -+ ), -+ MTK_PIN( -+ 150, "GPIO150", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO150"), -+ MTK_FUNCTION(1, "PWM0"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "ANT_SEL3"), -+ MTK_FUNCTION(5, "MD_URXD0"), -+ MTK_FUNCTION(6, "TP_URXD2_AO") -+ ), -+ MTK_PIN( -+ 151, "GPIO151", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO151"), -+ MTK_FUNCTION(1, "PWM1"), -+ MTK_FUNCTION(2, "CMVREF0"), -+ MTK_FUNCTION(3, "ANT_SEL4"), -+ MTK_FUNCTION(5, "MD_UTXD0"), -+ MTK_FUNCTION(6, "TP_UTXD2_AO") -+ ), -+ MTK_PIN( -+ 152, "GPIO152", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO152"), -+ MTK_FUNCTION(1, "PWM2"), -+ MTK_FUNCTION(2, "CMVREF1"), -+ MTK_FUNCTION(3, "ANT_SEL5"), -+ MTK_FUNCTION(5, "MD_URXD1"), -+ MTK_FUNCTION(6, "TP_UCTS1_AO") -+ ), -+ MTK_PIN( -+ 153, "GPIO153", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO153"), -+ MTK_FUNCTION(1, "PWM3"), -+ MTK_FUNCTION(2, "CLKM0"), -+ MTK_FUNCTION(3, "ANT_SEL6"), -+ MTK_FUNCTION(5, "MD_UTXD1"), -+ MTK_FUNCTION(6, "TP_URTS1_AO") -+ ), -+ MTK_PIN( -+ 154, "GPIO154", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO154"), -+ MTK_FUNCTION(1, "PWM5"), -+ MTK_FUNCTION(2, "CLKM2"), -+ MTK_FUNCTION(3, "USB_DRVVBUS"), -+ MTK_FUNCTION(5, "PTA_TXD"), -+ MTK_FUNCTION(6, "CONN_UART0_TXD") -+ ), -+ MTK_PIN( -+ 155, "GPIO155", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO155"), -+ MTK_FUNCTION(1, "SPI0_MI"), -+ MTK_FUNCTION(2, "IDDIG"), -+ MTK_FUNCTION(3, "AGPS_SYNC"), -+ MTK_FUNCTION(4, "TP_GPIO0_AO"), -+ MTK_FUNCTION(5, "MFG_JTAG_TDO"), -+ MTK_FUNCTION(6, "DFD_TDO"), -+ MTK_FUNCTION(7, "JTDO_SEL1") -+ ), -+ MTK_PIN( -+ 156, "GPIO156", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO156"), -+ MTK_FUNCTION(1, "SPI0_CSB"), -+ MTK_FUNCTION(2, "USB_DRVVBUS"), -+ MTK_FUNCTION(3, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(4, "TP_GPIO1_AO"), -+ MTK_FUNCTION(5, "MFG_JTAG_TMS"), -+ MTK_FUNCTION(6, "DFD_TMS"), -+ MTK_FUNCTION(7, "JTMS_SEL1") -+ ), -+ MTK_PIN( -+ 157, "GPIO157", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO157"), -+ MTK_FUNCTION(1, "SPI0_MO"), -+ MTK_FUNCTION(2, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(3, "CLKM0"), -+ MTK_FUNCTION(4, "TP_GPIO2_AO"), -+ MTK_FUNCTION(5, "MFG_JTAG_TDI"), -+ MTK_FUNCTION(6, "DFD_TDI"), -+ MTK_FUNCTION(7, "JTDI_SEL1") -+ ), -+ MTK_PIN( -+ 158, "GPIO158", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO158"), -+ MTK_FUNCTION(1, "SPI0_CLK"), -+ MTK_FUNCTION(2, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(3, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(4, "TP_GPIO3_AO"), -+ MTK_FUNCTION(5, "MFG_JTAG_TCK"), -+ MTK_FUNCTION(6, "DFD_TCK_XI"), -+ MTK_FUNCTION(7, "JTCK_SEL1") -+ ), -+ MTK_PIN( -+ 159, "GPIO159", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO159"), -+ MTK_FUNCTION(1, "PWM4"), -+ MTK_FUNCTION(2, "CLKM1"), -+ MTK_FUNCTION(3, "ANT_SEL7"), -+ MTK_FUNCTION(5, "PTA_RXD"), -+ MTK_FUNCTION(6, "CONN_UART0_RXD") -+ ), -+ MTK_PIN( -+ 160, "GPIO160", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO160"), -+ MTK_FUNCTION(1, "CLKM0"), -+ MTK_FUNCTION(2, "PWM2"), -+ MTK_FUNCTION(3, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(4, "TP_GPIO5_AO"), -+ MTK_FUNCTION(5, "AGPS_SYNC"), -+ MTK_FUNCTION(6, "DVFSRC_EXT_REQ") -+ ), -+ MTK_PIN( -+ 161, "GPIO161", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO161"), -+ MTK_FUNCTION(1, "SCL6"), -+ MTK_FUNCTION(2, "SCL_6306"), -+ MTK_FUNCTION(3, "TP_GPIO6_AO"), -+ MTK_FUNCTION(4, "KPCOL6"), -+ MTK_FUNCTION(5, "PTA_RXD"), -+ MTK_FUNCTION(6, "CONN_UART0_RXD") -+ ), -+ MTK_PIN( -+ 162, "GPIO162", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO162"), -+ MTK_FUNCTION(1, "SDA6"), -+ MTK_FUNCTION(2, "SDA_6306"), -+ MTK_FUNCTION(3, "TP_GPIO7_AO"), -+ MTK_FUNCTION(4, "KPCOL7"), -+ MTK_FUNCTION(5, "PTA_TXD"), -+ MTK_FUNCTION(6, "CONN_UART0_TXD") -+ ), -+ MTK_PIN( -+ 163, "GPIO163", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO163") -+ ), -+ MTK_PIN( -+ 164, "GPIO164", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO164") -+ ), -+ MTK_PIN( -+ 165, "GPIO165", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO165") -+ ), -+ MTK_PIN( -+ 166, "GPIO166", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO166") -+ ), -+ MTK_PIN( -+ 167, "GPIO167", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO167") -+ ), -+ MTK_PIN( -+ 168, "GPIO168", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO168") -+ ), -+ MTK_PIN( -+ 169, "GPIO169", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO169") -+ ), -+ MTK_PIN( -+ 170, "GPIO170", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO170") -+ ), -+ MTK_PIN( -+ 171, "GPIO171", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO171") -+ ), -+ MTK_PIN( -+ 172, "GPIO172", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO172") -+ ), -+ MTK_PIN( -+ 173, "GPIO173", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO173") -+ ), -+ MTK_PIN( -+ 174, "GPIO174", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO174") -+ ), -+ MTK_PIN( -+ 175, "GPIO175", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO175") -+ ), -+ MTK_PIN( -+ 176, "GPIO176", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO176") -+ ), -+ MTK_PIN( -+ 177, "GPIO177", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO177") -+ ), -+ MTK_PIN( -+ 178, "GPIO178", -+ MTK_EINT_FUNCTION(0, NO_EINT_SUPPORT), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO178") -+ ), -+ MTK_PIN( -+ 179, "GPIO179", -+ MTK_EINT_FUNCTION(0, 151), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO179") -+ ), -+}; -+ -+#endif /* __PINCTRL_MTK_MT6765_H */ ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6797.h -@@ -0,0 +1,2429 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Based on pinctrl-mtk-mt6765.h -+ * -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: ZH Chen -+ * -+ * Copyright (c) 2018 Manivannan Sadhasivam -+ */ -+ -+#ifndef __PINCTRL_MTK_MT6797_H -+#define __PINCTRL_MTK_MT6797_H -+ -+#include "pinctrl-paris.h" -+ -+static const struct mtk_pin_desc mtk_pins_mt6797[] = { -+ MTK_PIN( -+ 0, "GPIO0", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO0"), -+ MTK_FUNCTION(1, "CSI0A_L0P_T0A") -+ ), -+ MTK_PIN( -+ 1, "GPIO1", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO1"), -+ MTK_FUNCTION(1, "CSI0A_L0N_T0B") -+ ), -+ MTK_PIN( -+ 2, "GPIO2", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO2"), -+ MTK_FUNCTION(1, "CSI0A_L1P_T0C") -+ ), -+ MTK_PIN( -+ 3, "GPIO3", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO3"), -+ MTK_FUNCTION(1, "CSI0A_L1N_T1A") -+ ), -+ MTK_PIN( -+ 4, "GPIO4", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO4"), -+ MTK_FUNCTION(1, "CSI0A_L2P_T1B") -+ ), -+ MTK_PIN( -+ 5, "GPIO5", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO5"), -+ MTK_FUNCTION(1, "CSI0A_L2N_T1C") -+ ), -+ MTK_PIN( -+ 6, "GPIO6", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO6"), -+ MTK_FUNCTION(1, "CSI0B_L0P_T0A") -+ ), -+ MTK_PIN( -+ 7, "GPIO7", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO7"), -+ MTK_FUNCTION(1, "CSI0B_L0N_T0B") -+ ), -+ MTK_PIN( -+ 8, "GPIO8", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO8"), -+ MTK_FUNCTION(1, "CSI0B_L1P_T0C") -+ ), -+ MTK_PIN( -+ 9, "GPIO9", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO9"), -+ MTK_FUNCTION(1, "CSI0B_L1N_T1A") -+ ), -+ MTK_PIN( -+ 10, "GPIO10", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO10"), -+ MTK_FUNCTION(1, "CSI1A_L0P_T0A") -+ ), -+ MTK_PIN( -+ 11, "GPIO11", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO11"), -+ MTK_FUNCTION(1, "CSI1A_L0N_T0B") -+ ), -+ MTK_PIN( -+ 12, "GPIO12", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO12"), -+ MTK_FUNCTION(1, "CSI1A_L1P_T0C") -+ ), -+ MTK_PIN( -+ 13, "GPIO13", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO13"), -+ MTK_FUNCTION(1, "CSI1A_L1N_T1A") -+ ), -+ MTK_PIN( -+ 14, "GPIO14", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO14"), -+ MTK_FUNCTION(1, "CSI1A_L2P_T1B") -+ ), -+ MTK_PIN( -+ 15, "GPIO15", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO15"), -+ MTK_FUNCTION(1, "CSI1A_L2N_T1C") -+ ), -+ MTK_PIN( -+ 16, "GPIO16", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO16"), -+ MTK_FUNCTION(1, "CSI1B_L0P_T0A") -+ ), -+ MTK_PIN( -+ 17, "GPIO17", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO17"), -+ MTK_FUNCTION(1, "CSI1B_L0N_T0B") -+ ), -+ MTK_PIN( -+ 18, "GPIO18", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO18"), -+ MTK_FUNCTION(1, "CSI1B_L1P_T0C") -+ ), -+ MTK_PIN( -+ 19, "GPIO19", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO19"), -+ MTK_FUNCTION(1, "CSI1B_L1N_T1A") -+ ), -+ MTK_PIN( -+ 20, "GPIO20", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO20"), -+ MTK_FUNCTION(1, "CSI1B_L2P_T1B") -+ ), -+ MTK_PIN( -+ 21, "GPIO21", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO21"), -+ MTK_FUNCTION(1, "CSI1B_L2N_T1C") -+ ), -+ MTK_PIN( -+ 22, "GPIO22", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO22"), -+ MTK_FUNCTION(1, "CSI2_L0P_T0A") -+ ), -+ MTK_PIN( -+ 23, "GPIO23", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO23"), -+ MTK_FUNCTION(1, "CSI2_L0N_T0B") -+ ), -+ MTK_PIN( -+ 24, "GPIO24", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO24"), -+ MTK_FUNCTION(1, "CSI2_L1P_T0C") -+ ), -+ MTK_PIN( -+ 25, "GPIO25", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO25"), -+ MTK_FUNCTION(1, "CSI2_L1N_T1A") -+ ), -+ MTK_PIN( -+ 26, "GPIO26", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO26"), -+ MTK_FUNCTION(1, "CSI2_L2P_T1B") -+ ), -+ MTK_PIN( -+ 27, "GPIO27", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO27"), -+ MTK_FUNCTION(1, "CSI2_L2N_T1C") -+ ), -+ MTK_PIN( -+ 28, "GPIO28", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO28"), -+ MTK_FUNCTION(1, "SPI5_CLK_A"), -+ MTK_FUNCTION(2, "IRTX_OUT"), -+ MTK_FUNCTION(3, "UDI_TDO"), -+ MTK_FUNCTION(4, "SCP_JTAG_TDO"), -+ MTK_FUNCTION(5, "CONN_MCU_TDO"), -+ MTK_FUNCTION(6, "PWM_A"), -+ MTK_FUNCTION(7, "C2K_DM_OTDO") -+ ), -+ MTK_PIN( -+ 29, "GPIO29", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO29"), -+ MTK_FUNCTION(1, "SPI5_MI_A"), -+ MTK_FUNCTION(2, "DAP_SIB1_SWD"), -+ MTK_FUNCTION(3, "UDI_TMS"), -+ MTK_FUNCTION(4, "SCP_JTAG_TMS"), -+ MTK_FUNCTION(5, "CONN_MCU_TMS"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(7, "C2K_DM_OTMS") -+ ), -+ MTK_PIN( -+ 30, "GPIO30", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO30"), -+ MTK_FUNCTION(1, "CMMCLK0"), -+ MTK_FUNCTION(7, "MD_CLKM0") -+ ), -+ MTK_PIN( -+ 31, "GPIO31", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO31"), -+ MTK_FUNCTION(1, "CMMCLK1"), -+ MTK_FUNCTION(7, "MD_CLKM1") -+ ), -+ MTK_PIN( -+ 32, "GPIO32", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO32"), -+ MTK_FUNCTION(1, "SPI5_CS_A"), -+ MTK_FUNCTION(2, "DAP_SIB1_SWCK"), -+ MTK_FUNCTION(3, "UDI_TCK_XI"), -+ MTK_FUNCTION(4, "SCP_JTAG_TCK"), -+ MTK_FUNCTION(5, "CONN_MCU_TCK"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(7, "C2K_DM_OTCK") -+ ), -+ MTK_PIN( -+ 33, "GPIO33", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO33"), -+ MTK_FUNCTION(1, "SPI5_MO_A"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "UDI_TDI"), -+ MTK_FUNCTION(4, "SCP_JTAG_TDI"), -+ MTK_FUNCTION(5, "CONN_MCU_TDI"), -+ MTK_FUNCTION(6, "MD_URXD0"), -+ MTK_FUNCTION(7, "C2K_DM_OTDI") -+ ), -+ MTK_PIN( -+ 34, "GPIO34", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO34"), -+ MTK_FUNCTION(1, "CMFLASH"), -+ MTK_FUNCTION(2, "CLKM0"), -+ MTK_FUNCTION(3, "UDI_NTRST"), -+ MTK_FUNCTION(4, "SCP_JTAG_TRSTN"), -+ MTK_FUNCTION(5, "CONN_MCU_TRST_B"), -+ MTK_FUNCTION(6, "MD_UTXD0"), -+ MTK_FUNCTION(7, "C2K_DM_JTINTP") -+ ), -+ MTK_PIN( -+ 35, "GPIO35", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO35"), -+ MTK_FUNCTION(1, "CMMCLK3"), -+ MTK_FUNCTION(2, "CLKM1"), -+ MTK_FUNCTION(3, "MD_URXD1"), -+ MTK_FUNCTION(4, "PTA_RXD"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGACK_N"), -+ MTK_FUNCTION(6, "PWM_B"), -+ MTK_FUNCTION(7, "PCC_PPC_IO") -+ ), -+ MTK_PIN( -+ 36, "GPIO36", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO36"), -+ MTK_FUNCTION(1, "CMMCLK2"), -+ MTK_FUNCTION(2, "CLKM2"), -+ MTK_FUNCTION(3, "MD_UTXD1"), -+ MTK_FUNCTION(4, "PTA_TXD"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGI_N"), -+ MTK_FUNCTION(6, "PWM_C"), -+ MTK_FUNCTION(7, "EXT_FRAME_SYNC") -+ ), -+ MTK_PIN( -+ 37, "GPIO37", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO37"), -+ MTK_FUNCTION(1, "SCL0_0") -+ ), -+ MTK_PIN( -+ 38, "GPIO38", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO38"), -+ MTK_FUNCTION(1, "SDA0_0") -+ ), -+ MTK_PIN( -+ 39, "GPIO39", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO39"), -+ MTK_FUNCTION(1, "DPI_D0"), -+ MTK_FUNCTION(2, "SPI1_CLK_A"), -+ MTK_FUNCTION(3, "PCM0_SYNC"), -+ MTK_FUNCTION(4, "I2S0_LRCK"), -+ MTK_FUNCTION(5, "CONN_MCU_TRST_B"), -+ MTK_FUNCTION(6, "URXD3"), -+ MTK_FUNCTION(7, "C2K_NTRST") -+ ), -+ MTK_PIN( -+ 40, "GPIO40", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO40"), -+ MTK_FUNCTION(1, "DPI_D1"), -+ MTK_FUNCTION(2, "SPI1_MI_A"), -+ MTK_FUNCTION(3, "PCM0_CLK"), -+ MTK_FUNCTION(4, "I2S0_BCK"), -+ MTK_FUNCTION(5, "CONN_MCU_TDO"), -+ MTK_FUNCTION(6, "UTXD3"), -+ MTK_FUNCTION(7, "C2K_TCK") -+ ), -+ MTK_PIN( -+ 41, "GPIO41", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO41"), -+ MTK_FUNCTION(1, "DPI_D2"), -+ MTK_FUNCTION(2, "SPI1_CS_A"), -+ MTK_FUNCTION(3, "PCM0_DO"), -+ MTK_FUNCTION(4, "I2S3_DO"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGACK_N"), -+ MTK_FUNCTION(6, "URTS3"), -+ MTK_FUNCTION(7, "C2K_TDI") -+ ), -+ MTK_PIN( -+ 42, "GPIO42", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO42"), -+ MTK_FUNCTION(1, "DPI_D3"), -+ MTK_FUNCTION(2, "SPI1_MO_A"), -+ MTK_FUNCTION(3, "PCM0_DI"), -+ MTK_FUNCTION(4, "I2S0_DI"), -+ MTK_FUNCTION(5, "CONN_MCU_TDI"), -+ MTK_FUNCTION(6, "UCTS3"), -+ MTK_FUNCTION(7, "C2K_TMS") -+ ), -+ MTK_PIN( -+ 43, "GPIO43", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO43"), -+ MTK_FUNCTION(1, "DPI_D4"), -+ MTK_FUNCTION(2, "SPI2_CLK_A"), -+ MTK_FUNCTION(3, "PCM1_SYNC"), -+ MTK_FUNCTION(4, "I2S2_LRCK"), -+ MTK_FUNCTION(5, "CONN_MCU_TMS"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(7, "C2K_TDO") -+ ), -+ MTK_PIN( -+ 44, "GPIO44", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO44"), -+ MTK_FUNCTION(1, "DPI_D5"), -+ MTK_FUNCTION(2, "SPI2_MI_A"), -+ MTK_FUNCTION(3, "PCM1_CLK"), -+ MTK_FUNCTION(4, "I2S2_BCK"), -+ MTK_FUNCTION(5, "CONN_MCU_TCK"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(7, "C2K_RTCK") -+ ), -+ MTK_PIN( -+ 45, "GPIO45", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO45"), -+ MTK_FUNCTION(1, "DPI_D6"), -+ MTK_FUNCTION(2, "SPI2_CS_A"), -+ MTK_FUNCTION(3, "PCM1_DI"), -+ MTK_FUNCTION(4, "I2S2_DI"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGI_N"), -+ MTK_FUNCTION(6, "MD_URXD0") -+ ), -+ MTK_PIN( -+ 46, "GPIO46", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO46"), -+ MTK_FUNCTION(1, "DPI_D7"), -+ MTK_FUNCTION(2, "SPI2_MO_A"), -+ MTK_FUNCTION(3, "PCM1_DO0"), -+ MTK_FUNCTION(4, "I2S1_DO"), -+ MTK_FUNCTION(5, "ANT_SEL0"), -+ MTK_FUNCTION(6, "MD_UTXD0") -+ ), -+ MTK_PIN( -+ 47, "GPIO47", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO47"), -+ MTK_FUNCTION(1, "DPI_D8"), -+ MTK_FUNCTION(2, "CLKM0"), -+ MTK_FUNCTION(3, "PCM1_DO1"), -+ MTK_FUNCTION(4, "I2S0_MCK"), -+ MTK_FUNCTION(5, "ANT_SEL1"), -+ MTK_FUNCTION(6, "PTA_RXD"), -+ MTK_FUNCTION(7, "C2K_URXD0") -+ ), -+ MTK_PIN( -+ 48, "GPIO48", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO48"), -+ MTK_FUNCTION(1, "DPI_D9"), -+ MTK_FUNCTION(2, "CLKM1"), -+ MTK_FUNCTION(3, "CMFLASH"), -+ MTK_FUNCTION(4, "I2S2_MCK"), -+ MTK_FUNCTION(5, "ANT_SEL2"), -+ MTK_FUNCTION(6, "PTA_TXD"), -+ MTK_FUNCTION(7, "C2K_UTXD0") -+ ), -+ MTK_PIN( -+ 49, "GPIO49", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO49"), -+ MTK_FUNCTION(1, "DPI_D10"), -+ MTK_FUNCTION(2, "MD_INT1_C2K_UIM1_HOT_PLUG_IN"), -+ MTK_FUNCTION(3, "PWM_C"), -+ MTK_FUNCTION(4, "IRTX_OUT"), -+ MTK_FUNCTION(5, "ANT_SEL3"), -+ MTK_FUNCTION(6, "MD_URXD1") -+ ), -+ MTK_PIN( -+ 50, "GPIO50", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO50"), -+ MTK_FUNCTION(1, "DPI_D11"), -+ MTK_FUNCTION(2, "MD_INT2"), -+ MTK_FUNCTION(3, "PWM_D"), -+ MTK_FUNCTION(4, "CLKM2"), -+ MTK_FUNCTION(5, "ANT_SEL4"), -+ MTK_FUNCTION(6, "MD_UTXD1") -+ ), -+ MTK_PIN( -+ 51, "GPIO51", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO51"), -+ MTK_FUNCTION(1, "DPI_DE"), -+ MTK_FUNCTION(2, "SPI4_CLK_A"), -+ MTK_FUNCTION(3, "IRTX_OUT"), -+ MTK_FUNCTION(4, "SCL0_1"), -+ MTK_FUNCTION(5, "ANT_SEL5"), -+ MTK_FUNCTION(7, "C2K_UTXD1") -+ ), -+ MTK_PIN( -+ 52, "GPIO52", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO52"), -+ MTK_FUNCTION(1, "DPI_CK"), -+ MTK_FUNCTION(2, "SPI4_MI_A"), -+ MTK_FUNCTION(3, "SPI4_MO_A"), -+ MTK_FUNCTION(4, "SDA0_1"), -+ MTK_FUNCTION(5, "ANT_SEL6"), -+ MTK_FUNCTION(7, "C2K_URXD1") -+ ), -+ MTK_PIN( -+ 53, "GPIO53", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO53"), -+ MTK_FUNCTION(1, "DPI_HSYNC"), -+ MTK_FUNCTION(2, "SPI4_CS_A"), -+ MTK_FUNCTION(3, "CMFLASH"), -+ MTK_FUNCTION(4, "SCL1_1"), -+ MTK_FUNCTION(5, "ANT_SEL7"), -+ MTK_FUNCTION(6, "MD_URXD2"), -+ MTK_FUNCTION(7, "PCC_PPC_IO") -+ ), -+ MTK_PIN( -+ 54, "GPIO54", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO54"), -+ MTK_FUNCTION(1, "DPI_VSYNC"), -+ MTK_FUNCTION(2, "SPI4_MO_A"), -+ MTK_FUNCTION(3, "SPI4_MI_A"), -+ MTK_FUNCTION(4, "SDA1_1"), -+ MTK_FUNCTION(5, "PWM_A"), -+ MTK_FUNCTION(6, "MD_UTXD2"), -+ MTK_FUNCTION(7, "EXT_FRAME_SYNC") -+ ), -+ MTK_PIN( -+ 55, "GPIO55", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO55"), -+ MTK_FUNCTION(1, "SCL1_0") -+ ), -+ MTK_PIN( -+ 56, "GPIO56", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO56"), -+ MTK_FUNCTION(1, "SDA1_0") -+ ), -+ MTK_PIN( -+ 57, "GPIO57", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO57"), -+ MTK_FUNCTION(1, "SPI0_CLK"), -+ MTK_FUNCTION(2, "SCL0_2"), -+ MTK_FUNCTION(3, "PWM_B"), -+ MTK_FUNCTION(4, "UTXD3"), -+ MTK_FUNCTION(5, "PCM0_SYNC") -+ ), -+ MTK_PIN( -+ 58, "GPIO58", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO58"), -+ MTK_FUNCTION(1, "SPI0_MI"), -+ MTK_FUNCTION(2, "SPI0_MO"), -+ MTK_FUNCTION(3, "SDA1_2"), -+ MTK_FUNCTION(4, "URXD3"), -+ MTK_FUNCTION(5, "PCM0_CLK") -+ ), -+ MTK_PIN( -+ 59, "GPIO59", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO59"), -+ MTK_FUNCTION(1, "SPI0_MO"), -+ MTK_FUNCTION(2, "SPI0_MI"), -+ MTK_FUNCTION(3, "PWM_C"), -+ MTK_FUNCTION(4, "URTS3"), -+ MTK_FUNCTION(5, "PCM0_DO") -+ ), -+ MTK_PIN( -+ 60, "GPIO60", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO60"), -+ MTK_FUNCTION(1, "SPI0_CS"), -+ MTK_FUNCTION(2, "SDA0_2"), -+ MTK_FUNCTION(3, "SCL1_2"), -+ MTK_FUNCTION(4, "UCTS3"), -+ MTK_FUNCTION(5, "PCM0_DI") -+ ), -+ MTK_PIN( -+ 61, "GPIO61", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO61"), -+ MTK_FUNCTION(1, "EINT0"), -+ MTK_FUNCTION(2, "IDDIG"), -+ MTK_FUNCTION(3, "SPI4_CLK_B"), -+ MTK_FUNCTION(4, "I2S0_LRCK"), -+ MTK_FUNCTION(5, "PCM0_SYNC"), -+ MTK_FUNCTION(7, "C2K_EINT0") -+ ), -+ MTK_PIN( -+ 62, "GPIO62", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO62"), -+ MTK_FUNCTION(1, "EINT1"), -+ MTK_FUNCTION(2, "USB_DRVVBUS"), -+ MTK_FUNCTION(3, "SPI4_MI_B"), -+ MTK_FUNCTION(4, "I2S0_BCK"), -+ MTK_FUNCTION(5, "PCM0_CLK"), -+ MTK_FUNCTION(7, "C2K_EINT1") -+ ), -+ MTK_PIN( -+ 63, "GPIO63", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO63"), -+ MTK_FUNCTION(1, "EINT2"), -+ MTK_FUNCTION(2, "IRTX_OUT"), -+ MTK_FUNCTION(3, "SPI4_MO_B"), -+ MTK_FUNCTION(4, "I2S0_MCK"), -+ MTK_FUNCTION(5, "PCM0_DI"), -+ MTK_FUNCTION(7, "C2K_DM_EINT0") -+ ), -+ MTK_PIN( -+ 64, "GPIO64", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO64"), -+ MTK_FUNCTION(1, "EINT3"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "SPI4_CS_B"), -+ MTK_FUNCTION(4, "I2S0_DI"), -+ MTK_FUNCTION(5, "PCM0_DO"), -+ MTK_FUNCTION(7, "C2K_DM_EINT1") -+ ), -+ MTK_PIN( -+ 65, "GPIO65", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO65"), -+ MTK_FUNCTION(1, "EINT4"), -+ MTK_FUNCTION(2, "CLKM0"), -+ MTK_FUNCTION(3, "SPI5_CLK_B"), -+ MTK_FUNCTION(4, "I2S1_LRCK"), -+ MTK_FUNCTION(5, "PWM_A"), -+ MTK_FUNCTION(7, "C2K_DM_EINT2") -+ ), -+ MTK_PIN( -+ 66, "GPIO66", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO66"), -+ MTK_FUNCTION(1, "EINT5"), -+ MTK_FUNCTION(2, "CLKM1"), -+ MTK_FUNCTION(3, "SPI5_MI_B"), -+ MTK_FUNCTION(4, "I2S1_BCK"), -+ MTK_FUNCTION(5, "PWM_B"), -+ MTK_FUNCTION(7, "C2K_DM_EINT3") -+ ), -+ MTK_PIN( -+ 67, "GPIO67", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO67"), -+ MTK_FUNCTION(1, "EINT6"), -+ MTK_FUNCTION(2, "CLKM2"), -+ MTK_FUNCTION(3, "SPI5_MO_B"), -+ MTK_FUNCTION(4, "I2S1_MCK"), -+ MTK_FUNCTION(5, "PWM_C"), -+ MTK_FUNCTION(7, "DBG_MON_A0") -+ ), -+ MTK_PIN( -+ 68, "GPIO68", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO68"), -+ MTK_FUNCTION(1, "EINT7"), -+ MTK_FUNCTION(2, "CLKM3"), -+ MTK_FUNCTION(3, "SPI5_CS_B"), -+ MTK_FUNCTION(4, "I2S1_DO"), -+ MTK_FUNCTION(5, "PWM_D"), -+ MTK_FUNCTION(7, "DBG_MON_A1") -+ ), -+ MTK_PIN( -+ 69, "GPIO69", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO69"), -+ MTK_FUNCTION(1, "I2S0_LRCK"), -+ MTK_FUNCTION(2, "I2S3_LRCK"), -+ MTK_FUNCTION(3, "I2S1_LRCK"), -+ MTK_FUNCTION(4, "I2S2_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A2") -+ ), -+ MTK_PIN( -+ 70, "GPIO70", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO70"), -+ MTK_FUNCTION(1, "I2S0_BCK"), -+ MTK_FUNCTION(2, "I2S3_BCK"), -+ MTK_FUNCTION(3, "I2S1_BCK"), -+ MTK_FUNCTION(4, "I2S2_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A3") -+ ), -+ MTK_PIN( -+ 71, "GPIO71", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO71"), -+ MTK_FUNCTION(1, "I2S0_MCK"), -+ MTK_FUNCTION(2, "I2S3_MCK"), -+ MTK_FUNCTION(3, "I2S1_MCK"), -+ MTK_FUNCTION(4, "I2S2_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A4") -+ ), -+ MTK_PIN( -+ 72, "GPIO72", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO72"), -+ MTK_FUNCTION(1, "I2S0_DI"), -+ MTK_FUNCTION(2, "I2S0_DI"), -+ MTK_FUNCTION(3, "I2S2_DI"), -+ MTK_FUNCTION(4, "I2S2_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A5") -+ ), -+ MTK_PIN( -+ 73, "GPIO73", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO73"), -+ MTK_FUNCTION(1, "I2S3_DO"), -+ MTK_FUNCTION(2, "I2S3_DO"), -+ MTK_FUNCTION(3, "I2S1_DO"), -+ MTK_FUNCTION(4, "I2S1_DO"), -+ MTK_FUNCTION(7, "DBG_MON_A6") -+ ), -+ MTK_PIN( -+ 74, "GPIO74", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO74"), -+ MTK_FUNCTION(1, "SCL3_0"), -+ MTK_FUNCTION(7, "AUXIF_CLK1") -+ ), -+ MTK_PIN( -+ 75, "GPIO75", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO75"), -+ MTK_FUNCTION(1, "SDA3_0"), -+ MTK_FUNCTION(7, "AUXIF_ST1") -+ ), -+ MTK_PIN( -+ 76, "GPIO76", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO76"), -+ MTK_FUNCTION(1, "CONN_HRST_B"), -+ MTK_FUNCTION(7, "C2K_DM_EINT0") -+ ), -+ MTK_PIN( -+ 77, "GPIO77", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO77"), -+ MTK_FUNCTION(1, "CONN_TOP_CLK"), -+ MTK_FUNCTION(7, "C2K_DM_EINT1") -+ ), -+ MTK_PIN( -+ 78, "GPIO78", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO78"), -+ MTK_FUNCTION(1, "CONN_TOP_DATA"), -+ MTK_FUNCTION(7, "C2K_DM_EINT2") -+ ), -+ MTK_PIN( -+ 79, "GPIO79", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO79"), -+ MTK_FUNCTION(1, "CONN_WB_PTA"), -+ MTK_FUNCTION(7, "C2K_DM_EINT3") -+ ), -+ MTK_PIN( -+ 80, "GPIO80", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO80"), -+ MTK_FUNCTION(1, "CONN_WF_HB0"), -+ MTK_FUNCTION(7, "C2K_EINT0") -+ ), -+ MTK_PIN( -+ 81, "GPIO81", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO81"), -+ MTK_FUNCTION(1, "CONN_WF_HB1"), -+ MTK_FUNCTION(7, "C2K_EINT1") -+ ), -+ MTK_PIN( -+ 82, "GPIO82", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO82"), -+ MTK_FUNCTION(1, "CONN_WF_HB2"), -+ MTK_FUNCTION(7, "MD_CLKM0") -+ ), -+ MTK_PIN( -+ 83, "GPIO83", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO83"), -+ MTK_FUNCTION(1, "CONN_BT_CLK"), -+ MTK_FUNCTION(7, "MD_CLKM1") -+ ), -+ MTK_PIN( -+ 84, "GPIO84", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO84"), -+ MTK_FUNCTION(1, "CONN_BT_DATA") -+ ), -+ MTK_PIN( -+ 85, "GPIO85", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO85"), -+ MTK_FUNCTION(1, "EINT8"), -+ MTK_FUNCTION(2, "I2S1_LRCK"), -+ MTK_FUNCTION(3, "I2S2_LRCK"), -+ MTK_FUNCTION(4, "URXD1"), -+ MTK_FUNCTION(5, "MD_URXD0"), -+ MTK_FUNCTION(7, "DBG_MON_A7") -+ ), -+ MTK_PIN( -+ 86, "GPIO86", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO86"), -+ MTK_FUNCTION(1, "EINT9"), -+ MTK_FUNCTION(2, "I2S1_BCK"), -+ MTK_FUNCTION(3, "I2S2_BCK"), -+ MTK_FUNCTION(4, "UTXD1"), -+ MTK_FUNCTION(5, "MD_UTXD0"), -+ MTK_FUNCTION(7, "DBG_MON_A8") -+ ), -+ MTK_PIN( -+ 87, "GPIO87", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO87"), -+ MTK_FUNCTION(1, "EINT10"), -+ MTK_FUNCTION(2, "I2S1_MCK"), -+ MTK_FUNCTION(3, "I2S2_MCK"), -+ MTK_FUNCTION(4, "URTS1"), -+ MTK_FUNCTION(5, "MD_URXD1"), -+ MTK_FUNCTION(7, "DBG_MON_A9") -+ ), -+ MTK_PIN( -+ 88, "GPIO88", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO88"), -+ MTK_FUNCTION(1, "EINT11"), -+ MTK_FUNCTION(2, "I2S1_DO"), -+ MTK_FUNCTION(3, "I2S2_DI"), -+ MTK_FUNCTION(4, "UCTS1"), -+ MTK_FUNCTION(5, "MD_UTXD1"), -+ MTK_FUNCTION(7, "DBG_MON_A10") -+ ), -+ MTK_PIN( -+ 89, "GPIO89", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO89"), -+ MTK_FUNCTION(1, "EINT12"), -+ MTK_FUNCTION(2, "IRTX_OUT"), -+ MTK_FUNCTION(3, "CLKM0"), -+ MTK_FUNCTION(4, "PCM1_SYNC"), -+ MTK_FUNCTION(5, "URTS0"), -+ MTK_FUNCTION(7, "DBG_MON_A11") -+ ), -+ MTK_PIN( -+ 90, "GPIO90", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO90"), -+ MTK_FUNCTION(1, "EINT13"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "CLKM1"), -+ MTK_FUNCTION(4, "PCM1_CLK"), -+ MTK_FUNCTION(5, "UCTS0"), -+ MTK_FUNCTION(7, "C2K_DM_EINT0") -+ ), -+ MTK_PIN( -+ 91, "GPIO91", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO91"), -+ MTK_FUNCTION(1, "EINT14"), -+ MTK_FUNCTION(2, "PWM_A"), -+ MTK_FUNCTION(3, "CLKM2"), -+ MTK_FUNCTION(4, "PCM1_DI"), -+ MTK_FUNCTION(5, "SDA0_3"), -+ MTK_FUNCTION(7, "C2K_DM_EINT1") -+ ), -+ MTK_PIN( -+ 92, "GPIO92", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO92"), -+ MTK_FUNCTION(1, "EINT15"), -+ MTK_FUNCTION(2, "PWM_B"), -+ MTK_FUNCTION(3, "CLKM3"), -+ MTK_FUNCTION(4, "PCM1_DO0"), -+ MTK_FUNCTION(5, "SCL0_3") -+ ), -+ MTK_PIN( -+ 93, "GPIO93", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO93"), -+ MTK_FUNCTION(1, "EINT16"), -+ MTK_FUNCTION(2, "IDDIG"), -+ MTK_FUNCTION(3, "CLKM4"), -+ MTK_FUNCTION(4, "PCM1_DO1"), -+ MTK_FUNCTION(5, "MD_INT2"), -+ MTK_FUNCTION(7, "DROP_ZONE") -+ ), -+ MTK_PIN( -+ 94, "GPIO94", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO94"), -+ MTK_FUNCTION(1, "USB_DRVVBUS"), -+ MTK_FUNCTION(2, "PWM_C"), -+ MTK_FUNCTION(3, "CLKM5") -+ ), -+ MTK_PIN( -+ 95, "GPIO95", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO95"), -+ MTK_FUNCTION(1, "SDA2_0"), -+ MTK_FUNCTION(7, "AUXIF_ST0") -+ ), -+ MTK_PIN( -+ 96, "GPIO96", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO96"), -+ MTK_FUNCTION(1, "SCL2_0"), -+ MTK_FUNCTION(7, "AUXIF_CLK0") -+ ), -+ MTK_PIN( -+ 97, "GPIO97", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO97"), -+ MTK_FUNCTION(1, "URXD0"), -+ MTK_FUNCTION(2, "UTXD0"), -+ MTK_FUNCTION(3, "MD_URXD0"), -+ MTK_FUNCTION(4, "MD_URXD1"), -+ MTK_FUNCTION(5, "MD_URXD2"), -+ MTK_FUNCTION(6, "C2K_URXD0"), -+ MTK_FUNCTION(7, "C2K_URXD1") -+ ), -+ MTK_PIN( -+ 98, "GPIO98", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO98"), -+ MTK_FUNCTION(1, "UTXD0"), -+ MTK_FUNCTION(2, "URXD0"), -+ MTK_FUNCTION(3, "MD_UTXD0"), -+ MTK_FUNCTION(4, "MD_UTXD1"), -+ MTK_FUNCTION(5, "MD_UTXD2"), -+ MTK_FUNCTION(6, "C2K_UTXD0"), -+ MTK_FUNCTION(7, "C2K_UTXD1") -+ ), -+ MTK_PIN( -+ 99, "GPIO99", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO99"), -+ MTK_FUNCTION(1, "RTC32K_CK") -+ ), -+ MTK_PIN( -+ 100, "GPIO100", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO100"), -+ MTK_FUNCTION(1, "SRCLKENAI0") -+ ), -+ MTK_PIN( -+ 101, "GPIO101", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO101"), -+ MTK_FUNCTION(1, "SRCLKENAI1") -+ ), -+ MTK_PIN( -+ 102, "GPIO102", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO102"), -+ MTK_FUNCTION(1, "SRCLKENA0") -+ ), -+ MTK_PIN( -+ 103, "GPIO103", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO103"), -+ MTK_FUNCTION(1, "SRCLKENA1") -+ ), -+ MTK_PIN( -+ 104, "GPIO104", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO104"), -+ MTK_FUNCTION(1, "SYSRSTB") -+ ), -+ MTK_PIN( -+ 105, "GPIO105", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO105"), -+ MTK_FUNCTION(1, "WATCHDOG") -+ ), -+ MTK_PIN( -+ 106, "GPIO106", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO106"), -+ MTK_FUNCTION(1, "KPROW0"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "CLKM4"), -+ MTK_FUNCTION(4, "TP_GPIO0_AO"), -+ MTK_FUNCTION(5, "IRTX_OUT") -+ ), -+ MTK_PIN( -+ 107, "GPIO107", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO107"), -+ MTK_FUNCTION(1, "KPROW1"), -+ MTK_FUNCTION(2, "IDDIG"), -+ MTK_FUNCTION(3, "CLKM5"), -+ MTK_FUNCTION(4, "TP_GPIO1_AO"), -+ MTK_FUNCTION(5, "I2S1_BCK"), -+ MTK_FUNCTION(7, "DAP_SIB1_SWD") -+ ), -+ MTK_PIN( -+ 108, "GPIO108", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO108"), -+ MTK_FUNCTION(1, "KPROW2"), -+ MTK_FUNCTION(2, "USB_DRVVBUS"), -+ MTK_FUNCTION(3, "PWM_A"), -+ MTK_FUNCTION(4, "CMFLASH"), -+ MTK_FUNCTION(5, "I2S1_LRCK"), -+ MTK_FUNCTION(7, "DAP_SIB1_SWCK") -+ ), -+ MTK_PIN( -+ 109, "GPIO109", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO109"), -+ MTK_FUNCTION(1, "KPCOL0") -+ ), -+ MTK_PIN( -+ 110, "GPIO110", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO110"), -+ MTK_FUNCTION(1, "KPCOL1"), -+ MTK_FUNCTION(2, "SDA1_3"), -+ MTK_FUNCTION(3, "PWM_B"), -+ MTK_FUNCTION(4, "CLKM0"), -+ MTK_FUNCTION(5, "I2S1_DO"), -+ MTK_FUNCTION(7, "C2K_DM_EINT3") -+ ), -+ MTK_PIN( -+ 111, "GPIO111", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO111"), -+ MTK_FUNCTION(1, "KPCOL2"), -+ MTK_FUNCTION(2, "SCL1_3"), -+ MTK_FUNCTION(3, "PWM_C"), -+ MTK_FUNCTION(4, "DISP_PWM"), -+ MTK_FUNCTION(5, "I2S1_MCK"), -+ MTK_FUNCTION(7, "C2K_DM_EINT2") -+ ), -+ MTK_PIN( -+ 112, "GPIO112", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO112"), -+ MTK_FUNCTION(1, "MD_INT1_C2K_UIM1_HOT_PLUG_IN"), -+ MTK_FUNCTION(7, "C2K_DM_EINT1") -+ ), -+ MTK_PIN( -+ 113, "GPIO113", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO113"), -+ MTK_FUNCTION(1, "MD_INT0_C2K_UIM0_HOT_PLUG_IN"), -+ MTK_FUNCTION(7, "C2K_DM_EINT0") -+ ), -+ MTK_PIN( -+ 114, "GPIO114", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO114"), -+ MTK_FUNCTION(1, "MSDC0_DAT0") -+ ), -+ MTK_PIN( -+ 115, "GPIO115", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO115"), -+ MTK_FUNCTION(1, "MSDC0_DAT1") -+ ), -+ MTK_PIN( -+ 116, "GPIO116", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO116"), -+ MTK_FUNCTION(1, "MSDC0_DAT2") -+ ), -+ MTK_PIN( -+ 117, "GPIO117", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO117"), -+ MTK_FUNCTION(1, "MSDC0_DAT3") -+ ), -+ MTK_PIN( -+ 118, "GPIO118", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO118"), -+ MTK_FUNCTION(1, "MSDC0_DAT4") -+ ), -+ MTK_PIN( -+ 119, "GPIO119", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO119"), -+ MTK_FUNCTION(1, "MSDC0_DAT5") -+ ), -+ MTK_PIN( -+ 120, "GPIO120", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO120"), -+ MTK_FUNCTION(1, "MSDC0_DAT6") -+ ), -+ MTK_PIN( -+ 121, "GPIO121", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO121"), -+ MTK_FUNCTION(1, "MSDC0_DAT7") -+ ), -+ MTK_PIN( -+ 122, "GPIO122", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO122"), -+ MTK_FUNCTION(1, "MSDC0_CMD") -+ ), -+ MTK_PIN( -+ 123, "GPIO123", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO123"), -+ MTK_FUNCTION(1, "MSDC0_CLK") -+ ), -+ MTK_PIN( -+ 124, "GPIO124", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO124"), -+ MTK_FUNCTION(1, "MSDC0_DSL") -+ ), -+ MTK_PIN( -+ 125, "GPIO125", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO125"), -+ MTK_FUNCTION(1, "MSDC0_RSTB") -+ ), -+ MTK_PIN( -+ 126, "GPIO126", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO126"), -+ MTK_FUNCTION(1, "MD1_SIM1_SCLK"), -+ MTK_FUNCTION(2, "MD1_SIM2_SCLK"), -+ MTK_FUNCTION(3, "C2K_UIM0_CLK"), -+ MTK_FUNCTION(4, "C2K_UIM1_CLK") -+ ), -+ MTK_PIN( -+ 127, "GPIO127", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO127"), -+ MTK_FUNCTION(1, "MD1_SIM1_SRST"), -+ MTK_FUNCTION(2, "MD1_SIM2_SRST"), -+ MTK_FUNCTION(3, "C2K_UIM0_RST"), -+ MTK_FUNCTION(4, "C2K_UIM1_RST") -+ ), -+ MTK_PIN( -+ 128, "GPIO128", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO128"), -+ MTK_FUNCTION(1, "MD1_SIM1_SIO"), -+ MTK_FUNCTION(2, "MD1_SIM2_SIO"), -+ MTK_FUNCTION(3, "C2K_UIM0_IO"), -+ MTK_FUNCTION(4, "C2K_UIM1_IO") -+ ), -+ MTK_PIN( -+ 129, "GPIO129", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO129"), -+ MTK_FUNCTION(1, "MSDC1_CMD"), -+ MTK_FUNCTION(2, "CONN_DSP_JMS"), -+ MTK_FUNCTION(3, "LTE_JTAG_TMS"), -+ MTK_FUNCTION(4, "UDI_TMS"), -+ MTK_FUNCTION(5, "C2K_TMS") -+ ), -+ MTK_PIN( -+ 130, "GPIO130", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO130"), -+ MTK_FUNCTION(1, "MSDC1_DAT0"), -+ MTK_FUNCTION(2, "CONN_DSP_JDI"), -+ MTK_FUNCTION(3, "LTE_JTAG_TDI"), -+ MTK_FUNCTION(4, "UDI_TDI"), -+ MTK_FUNCTION(5, "C2K_TDI") -+ ), -+ MTK_PIN( -+ 131, "GPIO131", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO131"), -+ MTK_FUNCTION(1, "MSDC1_DAT1"), -+ MTK_FUNCTION(2, "CONN_DSP_JDO"), -+ MTK_FUNCTION(3, "LTE_JTAG_TDO"), -+ MTK_FUNCTION(4, "UDI_TDO"), -+ MTK_FUNCTION(5, "C2K_TDO") -+ ), -+ MTK_PIN( -+ 132, "GPIO132", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO132"), -+ MTK_FUNCTION(1, "MSDC1_DAT2"), -+ MTK_FUNCTION(5, "C2K_RTCK") -+ ), -+ MTK_PIN( -+ 133, "GPIO133", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO133"), -+ MTK_FUNCTION(1, "MSDC1_DAT3"), -+ MTK_FUNCTION(2, "CONN_DSP_JINTP"), -+ MTK_FUNCTION(3, "LTE_JTAG_TRSTN"), -+ MTK_FUNCTION(4, "UDI_NTRST"), -+ MTK_FUNCTION(5, "C2K_NTRST") -+ ), -+ MTK_PIN( -+ 134, "GPIO134", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO134"), -+ MTK_FUNCTION(1, "MSDC1_CLK"), -+ MTK_FUNCTION(2, "CONN_DSP_JCK"), -+ MTK_FUNCTION(3, "LTE_JTAG_TCK"), -+ MTK_FUNCTION(4, "UDI_TCK_XI"), -+ MTK_FUNCTION(5, "C2K_TCK") -+ ), -+ MTK_PIN( -+ 135, "GPIO135", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO135"), -+ MTK_FUNCTION(1, "TDM_LRCK"), -+ MTK_FUNCTION(2, "I2S0_LRCK"), -+ MTK_FUNCTION(3, "CLKM0"), -+ MTK_FUNCTION(4, "PCM1_SYNC"), -+ MTK_FUNCTION(5, "PWM_A"), -+ MTK_FUNCTION(7, "DBG_MON_A12") -+ ), -+ MTK_PIN( -+ 136, "GPIO136", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO136"), -+ MTK_FUNCTION(1, "TDM_BCK"), -+ MTK_FUNCTION(2, "I2S0_BCK"), -+ MTK_FUNCTION(3, "CLKM1"), -+ MTK_FUNCTION(4, "PCM1_CLK"), -+ MTK_FUNCTION(5, "PWM_B"), -+ MTK_FUNCTION(7, "DBG_MON_A13") -+ ), -+ MTK_PIN( -+ 137, "GPIO137", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO137"), -+ MTK_FUNCTION(1, "TDM_MCK"), -+ MTK_FUNCTION(2, "I2S0_MCK"), -+ MTK_FUNCTION(3, "CLKM2"), -+ MTK_FUNCTION(4, "PCM1_DI"), -+ MTK_FUNCTION(5, "IRTX_OUT"), -+ MTK_FUNCTION(7, "DBG_MON_A14") -+ ), -+ MTK_PIN( -+ 138, "GPIO138", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO138"), -+ MTK_FUNCTION(1, "TDM_DATA0"), -+ MTK_FUNCTION(2, "I2S0_DI"), -+ MTK_FUNCTION(3, "CLKM3"), -+ MTK_FUNCTION(4, "PCM1_DO0"), -+ MTK_FUNCTION(5, "PWM_C"), -+ MTK_FUNCTION(6, "SDA3_1"), -+ MTK_FUNCTION(7, "DBG_MON_A15") -+ ), -+ MTK_PIN( -+ 139, "GPIO139", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO139"), -+ MTK_FUNCTION(1, "TDM_DATA1"), -+ MTK_FUNCTION(2, "I2S3_DO"), -+ MTK_FUNCTION(3, "CLKM4"), -+ MTK_FUNCTION(4, "PCM1_DO1"), -+ MTK_FUNCTION(5, "ANT_SEL2"), -+ MTK_FUNCTION(6, "SCL3_1"), -+ MTK_FUNCTION(7, "DBG_MON_A16") -+ ), -+ MTK_PIN( -+ 140, "GPIO140", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO140"), -+ MTK_FUNCTION(1, "TDM_DATA2"), -+ MTK_FUNCTION(2, "DISP_PWM"), -+ MTK_FUNCTION(3, "CLKM5"), -+ MTK_FUNCTION(4, "SDA1_4"), -+ MTK_FUNCTION(5, "ANT_SEL1"), -+ MTK_FUNCTION(6, "URXD3"), -+ MTK_FUNCTION(7, "DBG_MON_A17") -+ ), -+ MTK_PIN( -+ 141, "GPIO141", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO141"), -+ MTK_FUNCTION(1, "TDM_DATA3"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "IRTX_OUT"), -+ MTK_FUNCTION(4, "SCL1_4"), -+ MTK_FUNCTION(5, "ANT_SEL0"), -+ MTK_FUNCTION(6, "UTXD3"), -+ MTK_FUNCTION(7, "DBG_MON_A18") -+ ), -+ MTK_PIN( -+ 142, "GPIO142", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO142"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MI"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MO") -+ ), -+ MTK_PIN( -+ 143, "GPIO143", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO143"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MO"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MI") -+ ), -+ MTK_PIN( -+ 144, "GPIO144", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO144"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CK") -+ ), -+ MTK_PIN( -+ 145, "GPIO145", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO145"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CSN") -+ ), -+ MTK_PIN( -+ 146, "GPIO146", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO146"), -+ MTK_FUNCTION(1, "AUD_CLK_MOSI") -+ ), -+ MTK_PIN( -+ 147, "GPIO147", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO147"), -+ MTK_FUNCTION(1, "AUD_DAT_MISO"), -+ MTK_FUNCTION(2, "AUD_DAT_MOSI"), -+ MTK_FUNCTION(3, "VOW_DAT_MISO") -+ ), -+ MTK_PIN( -+ 148, "GPIO148", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO148"), -+ MTK_FUNCTION(1, "AUD_DAT_MOSI"), -+ MTK_FUNCTION(2, "AUD_DAT_MISO") -+ ), -+ MTK_PIN( -+ 149, "GPIO149", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO149"), -+ MTK_FUNCTION(1, "VOW_CLK_MISO") -+ ), -+ MTK_PIN( -+ 150, "GPIO150", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO150"), -+ MTK_FUNCTION(1, "ANC_DAT_MOSI") -+ ), -+ MTK_PIN( -+ 151, "GPIO151", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO151"), -+ MTK_FUNCTION(1, "SCL6_0") -+ ), -+ MTK_PIN( -+ 152, "GPIO152", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO152"), -+ MTK_FUNCTION(1, "SDA6_0") -+ ), -+ MTK_PIN( -+ 153, "GPIO153", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO153"), -+ MTK_FUNCTION(1, "SCL7_0") -+ ), -+ MTK_PIN( -+ 154, "GPIO154", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO154"), -+ MTK_FUNCTION(1, "SDA7_0") -+ ), -+ MTK_PIN( -+ 155, "GPIO155", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO155"), -+ MTK_FUNCTION(1, "MD1_SIM2_SCLK"), -+ MTK_FUNCTION(2, "MD1_SIM1_SCLK"), -+ MTK_FUNCTION(3, "C2K_UIM0_CLK"), -+ MTK_FUNCTION(4, "C2K_UIM1_CLK") -+ ), -+ MTK_PIN( -+ 156, "GPIO156", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO156"), -+ MTK_FUNCTION(1, "MD1_SIM2_SRST"), -+ MTK_FUNCTION(2, "MD1_SIM1_SRST"), -+ MTK_FUNCTION(3, "C2K_UIM0_RST"), -+ MTK_FUNCTION(4, "C2K_UIM1_RST") -+ ), -+ MTK_PIN( -+ 157, "GPIO157", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO157"), -+ MTK_FUNCTION(1, "MD1_SIM2_SIO"), -+ MTK_FUNCTION(2, "MD1_SIM1_SIO"), -+ MTK_FUNCTION(3, "C2K_UIM0_IO"), -+ MTK_FUNCTION(4, "C2K_UIM1_IO") -+ ), -+ MTK_PIN( -+ 158, "GPIO158", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO158"), -+ MTK_FUNCTION(1, "MIPI_TDP0") -+ ), -+ MTK_PIN( -+ 159, "GPIO159", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO159"), -+ MTK_FUNCTION(1, "MIPI_TDN0") -+ ), -+ MTK_PIN( -+ 160, "GPIO160", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO160"), -+ MTK_FUNCTION(1, "MIPI_TDP1") -+ ), -+ MTK_PIN( -+ 161, "GPIO161", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO161"), -+ MTK_FUNCTION(1, "MIPI_TDN1") -+ ), -+ MTK_PIN( -+ 162, "GPIO162", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO162"), -+ MTK_FUNCTION(1, "MIPI_TCP") -+ ), -+ MTK_PIN( -+ 163, "GPIO163", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO163"), -+ MTK_FUNCTION(1, "MIPI_TCN") -+ ), -+ MTK_PIN( -+ 164, "GPIO164", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO164"), -+ MTK_FUNCTION(1, "MIPI_TDP2") -+ ), -+ MTK_PIN( -+ 165, "GPIO165", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO165"), -+ MTK_FUNCTION(1, "MIPI_TDN2") -+ ), -+ MTK_PIN( -+ 166, "GPIO166", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO166"), -+ MTK_FUNCTION(1, "MIPI_TDP3") -+ ), -+ MTK_PIN( -+ 167, "GPIO167", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO167"), -+ MTK_FUNCTION(1, "MIPI_TDN3") -+ ), -+ MTK_PIN( -+ 168, "GPIO168", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO168"), -+ MTK_FUNCTION(1, "MIPI_TDP0_A") -+ ), -+ MTK_PIN( -+ 169, "GPIO169", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO169"), -+ MTK_FUNCTION(1, "MIPI_TDN0_A") -+ ), -+ MTK_PIN( -+ 170, "GPIO170", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO170"), -+ MTK_FUNCTION(1, "MIPI_TDP1_A") -+ ), -+ MTK_PIN( -+ 171, "GPIO171", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO171"), -+ MTK_FUNCTION(1, "MIPI_TDN1_A") -+ ), -+ MTK_PIN( -+ 172, "GPIO172", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO172"), -+ MTK_FUNCTION(1, "MIPI_TCP_A") -+ ), -+ MTK_PIN( -+ 173, "GPIO173", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO173"), -+ MTK_FUNCTION(1, "MIPI_TCN_A") -+ ), -+ MTK_PIN( -+ 174, "GPIO174", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO174"), -+ MTK_FUNCTION(1, "MIPI_TDP2_A") -+ ), -+ MTK_PIN( -+ 175, "GPIO175", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO175"), -+ MTK_FUNCTION(1, "MIPI_TDN2_A") -+ ), -+ MTK_PIN( -+ 176, "GPIO176", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO176"), -+ MTK_FUNCTION(1, "MIPI_TDP3_A") -+ ), -+ MTK_PIN( -+ 177, "GPIO177", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO177"), -+ MTK_FUNCTION(1, "MIPI_TDN3_A") -+ ), -+ MTK_PIN( -+ 178, "GPIO178", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO178"), -+ MTK_FUNCTION(1, "DISP_PWM"), -+ MTK_FUNCTION(2, "PWM_D"), -+ MTK_FUNCTION(3, "CLKM5"), -+ MTK_FUNCTION(7, "DBG_MON_A19") -+ ), -+ MTK_PIN( -+ 179, "GPIO179", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO179"), -+ MTK_FUNCTION(1, "DSI_TE0"), -+ MTK_FUNCTION(7, "DBG_MON_A20") -+ ), -+ MTK_PIN( -+ 180, "GPIO180", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO180"), -+ MTK_FUNCTION(1, "LCM_RST"), -+ MTK_FUNCTION(2, "DSI_TE1"), -+ MTK_FUNCTION(7, "DBG_MON_A21") -+ ), -+ MTK_PIN( -+ 181, "GPIO181", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO181"), -+ MTK_FUNCTION(1, "IDDIG"), -+ MTK_FUNCTION(2, "DSI_TE1"), -+ MTK_FUNCTION(7, "DBG_MON_A22") -+ ), -+ MTK_PIN( -+ 182, "GPIO182", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO182"), -+ MTK_FUNCTION(1, "TESTMODE") -+ ), -+ MTK_PIN( -+ 183, "GPIO183", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO183"), -+ MTK_FUNCTION(1, "RFIC0_BSI_CK"), -+ MTK_FUNCTION(2, "SPM_BSI_CK"), -+ MTK_FUNCTION(7, "DBG_MON_B27") -+ ), -+ MTK_PIN( -+ 184, "GPIO184", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO184"), -+ MTK_FUNCTION(1, "RFIC0_BSI_EN"), -+ MTK_FUNCTION(2, "SPM_BSI_EN"), -+ MTK_FUNCTION(7, "DBG_MON_B28") -+ ), -+ MTK_PIN( -+ 185, "GPIO185", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO185"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D0"), -+ MTK_FUNCTION(2, "SPM_BSI_D0"), -+ MTK_FUNCTION(7, "DBG_MON_B29") -+ ), -+ MTK_PIN( -+ 186, "GPIO186", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO186"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D1"), -+ MTK_FUNCTION(2, "SPM_BSI_D1"), -+ MTK_FUNCTION(7, "DBG_MON_B30") -+ ), -+ MTK_PIN( -+ 187, "GPIO187", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO187"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D2"), -+ MTK_FUNCTION(2, "SPM_BSI_D2"), -+ MTK_FUNCTION(7, "DBG_MON_B31") -+ ), -+ MTK_PIN( -+ 188, "GPIO188", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO188"), -+ MTK_FUNCTION(1, "MIPI0_SCLK"), -+ MTK_FUNCTION(7, "DBG_MON_B32") -+ ), -+ MTK_PIN( -+ 189, "GPIO189", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO189"), -+ MTK_FUNCTION(1, "MIPI0_SDATA") -+ ), -+ MTK_PIN( -+ 190, "GPIO190", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO190"), -+ MTK_FUNCTION(1, "MIPI1_SCLK") -+ ), -+ MTK_PIN( -+ 191, "GPIO191", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO191"), -+ MTK_FUNCTION(1, "MIPI1_SDATA") -+ ), -+ MTK_PIN( -+ 192, "GPIO192", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO192"), -+ MTK_FUNCTION(1, "BPI_BUS4") -+ ), -+ MTK_PIN( -+ 193, "GPIO193", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO193"), -+ MTK_FUNCTION(1, "BPI_BUS5"), -+ MTK_FUNCTION(7, "DBG_MON_B0") -+ ), -+ MTK_PIN( -+ 194, "GPIO194", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO194"), -+ MTK_FUNCTION(1, "BPI_BUS6"), -+ MTK_FUNCTION(7, "DBG_MON_B1") -+ ), -+ MTK_PIN( -+ 195, "GPIO195", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO195"), -+ MTK_FUNCTION(1, "BPI_BUS7"), -+ MTK_FUNCTION(7, "DBG_MON_B2") -+ ), -+ MTK_PIN( -+ 196, "GPIO196", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO196"), -+ MTK_FUNCTION(1, "BPI_BUS8"), -+ MTK_FUNCTION(7, "DBG_MON_B3") -+ ), -+ MTK_PIN( -+ 197, "GPIO197", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO197"), -+ MTK_FUNCTION(1, "BPI_BUS9"), -+ MTK_FUNCTION(7, "DBG_MON_B4") -+ ), -+ MTK_PIN( -+ 198, "GPIO198", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO198"), -+ MTK_FUNCTION(1, "BPI_BUS10"), -+ MTK_FUNCTION(7, "DBG_MON_B5") -+ ), -+ MTK_PIN( -+ 199, "GPIO199", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO199"), -+ MTK_FUNCTION(1, "BPI_BUS11"), -+ MTK_FUNCTION(7, "DBG_MON_B6") -+ ), -+ MTK_PIN( -+ 200, "GPIO200", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO200"), -+ MTK_FUNCTION(1, "BPI_BUS12"), -+ MTK_FUNCTION(7, "DBG_MON_B7") -+ ), -+ MTK_PIN( -+ 201, "GPIO201", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO201"), -+ MTK_FUNCTION(1, "BPI_BUS13"), -+ MTK_FUNCTION(7, "DBG_MON_B8") -+ ), -+ MTK_PIN( -+ 202, "GPIO202", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO202"), -+ MTK_FUNCTION(1, "BPI_BUS14"), -+ MTK_FUNCTION(7, "DBG_MON_B9") -+ ), -+ MTK_PIN( -+ 203, "GPIO203", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO203"), -+ MTK_FUNCTION(1, "BPI_BUS15"), -+ MTK_FUNCTION(7, "DBG_MON_B10") -+ ), -+ MTK_PIN( -+ 204, "GPIO204", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO204"), -+ MTK_FUNCTION(1, "BPI_BUS16"), -+ MTK_FUNCTION(2, "PA_VM0"), -+ MTK_FUNCTION(7, "DBG_MON_B11") -+ ), -+ MTK_PIN( -+ 205, "GPIO205", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO205"), -+ MTK_FUNCTION(1, "BPI_BUS17"), -+ MTK_FUNCTION(2, "PA_VM1"), -+ MTK_FUNCTION(7, "DBG_MON_B12") -+ ), -+ MTK_PIN( -+ 206, "GPIO206", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO206"), -+ MTK_FUNCTION(1, "BPI_BUS18"), -+ MTK_FUNCTION(2, "TX_SWAP0"), -+ MTK_FUNCTION(7, "DBG_MON_B13") -+ ), -+ MTK_PIN( -+ 207, "GPIO207", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO207"), -+ MTK_FUNCTION(1, "BPI_BUS19"), -+ MTK_FUNCTION(2, "TX_SWAP1"), -+ MTK_FUNCTION(7, "DBG_MON_B14") -+ ), -+ MTK_PIN( -+ 208, "GPIO208", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO208"), -+ MTK_FUNCTION(1, "BPI_BUS20"), -+ MTK_FUNCTION(2, "TX_SWAP2"), -+ MTK_FUNCTION(7, "DBG_MON_B15") -+ ), -+ MTK_PIN( -+ 209, "GPIO209", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO209"), -+ MTK_FUNCTION(1, "BPI_BUS21"), -+ MTK_FUNCTION(2, "TX_SWAP3"), -+ MTK_FUNCTION(7, "DBG_MON_B16") -+ ), -+ MTK_PIN( -+ 210, "GPIO210", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO210"), -+ MTK_FUNCTION(1, "BPI_BUS22"), -+ MTK_FUNCTION(2, "DET_BPI0"), -+ MTK_FUNCTION(7, "DBG_MON_B17") -+ ), -+ MTK_PIN( -+ 211, "GPIO211", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO211"), -+ MTK_FUNCTION(1, "BPI_BUS23"), -+ MTK_FUNCTION(2, "DET_BPI1"), -+ MTK_FUNCTION(7, "DBG_MON_B18") -+ ), -+ MTK_PIN( -+ 212, "GPIO212", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO212"), -+ MTK_FUNCTION(1, "BPI_BUS0"), -+ MTK_FUNCTION(7, "DBG_MON_B19") -+ ), -+ MTK_PIN( -+ 213, "GPIO213", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO213"), -+ MTK_FUNCTION(1, "BPI_BUS1"), -+ MTK_FUNCTION(7, "DBG_MON_B20") -+ ), -+ MTK_PIN( -+ 214, "GPIO214", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO214"), -+ MTK_FUNCTION(1, "BPI_BUS2"), -+ MTK_FUNCTION(7, "DBG_MON_B21") -+ ), -+ MTK_PIN( -+ 215, "GPIO215", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO215"), -+ MTK_FUNCTION(1, "BPI_BUS3"), -+ MTK_FUNCTION(7, "DBG_MON_B22") -+ ), -+ MTK_PIN( -+ 216, "GPIO216", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO216"), -+ MTK_FUNCTION(1, "MIPI2_SCLK"), -+ MTK_FUNCTION(7, "DBG_MON_B23") -+ ), -+ MTK_PIN( -+ 217, "GPIO217", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO217"), -+ MTK_FUNCTION(1, "MIPI2_SDATA"), -+ MTK_FUNCTION(7, "DBG_MON_B24") -+ ), -+ MTK_PIN( -+ 218, "GPIO218", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO218"), -+ MTK_FUNCTION(1, "MIPI3_SCLK"), -+ MTK_FUNCTION(7, "DBG_MON_B25") -+ ), -+ MTK_PIN( -+ 219, "GPIO219", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO219"), -+ MTK_FUNCTION(1, "MIPI3_SDATA"), -+ MTK_FUNCTION(7, "DBG_MON_B26") -+ ), -+ MTK_PIN( -+ 220, "GPIO220", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO220"), -+ MTK_FUNCTION(1, "CONN_WF_IP") -+ ), -+ MTK_PIN( -+ 221, "GPIO221", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO221"), -+ MTK_FUNCTION(1, "CONN_WF_IN") -+ ), -+ MTK_PIN( -+ 222, "GPIO222", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO222"), -+ MTK_FUNCTION(1, "CONN_WF_QP") -+ ), -+ MTK_PIN( -+ 223, "GPIO223", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO223"), -+ MTK_FUNCTION(1, "CONN_WF_QN") -+ ), -+ MTK_PIN( -+ 224, "GPIO224", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO224"), -+ MTK_FUNCTION(1, "CONN_BT_IP") -+ ), -+ MTK_PIN( -+ 225, "GPIO225", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO225"), -+ MTK_FUNCTION(1, "CONN_BT_IN") -+ ), -+ MTK_PIN( -+ 226, "GPIO226", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO226"), -+ MTK_FUNCTION(1, "CONN_BT_QP") -+ ), -+ MTK_PIN( -+ 227, "GPIO227", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO227"), -+ MTK_FUNCTION(1, "CONN_BT_QN") -+ ), -+ MTK_PIN( -+ 228, "GPIO228", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO228"), -+ MTK_FUNCTION(1, "CONN_GPS_IP") -+ ), -+ MTK_PIN( -+ 229, "GPIO229", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO229"), -+ MTK_FUNCTION(1, "CONN_GPS_IN") -+ ), -+ MTK_PIN( -+ 230, "GPIO230", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO230"), -+ MTK_FUNCTION(1, "CONN_GPS_QP") -+ ), -+ MTK_PIN( -+ 231, "GPIO231", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO231"), -+ MTK_FUNCTION(1, "CONN_GPS_QN") -+ ), -+ MTK_PIN( -+ 232, "GPIO232", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO232"), -+ MTK_FUNCTION(1, "URXD1"), -+ MTK_FUNCTION(2, "UTXD1"), -+ MTK_FUNCTION(3, "MD_URXD0"), -+ MTK_FUNCTION(4, "MD_URXD1"), -+ MTK_FUNCTION(5, "MD_URXD2"), -+ MTK_FUNCTION(6, "C2K_URXD0"), -+ MTK_FUNCTION(7, "C2K_URXD1") -+ ), -+ MTK_PIN( -+ 233, "GPIO233", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO233"), -+ MTK_FUNCTION(1, "UTXD1"), -+ MTK_FUNCTION(2, "URXD1"), -+ MTK_FUNCTION(3, "MD_UTXD0"), -+ MTK_FUNCTION(4, "MD_UTXD1"), -+ MTK_FUNCTION(5, "MD_UTXD2"), -+ MTK_FUNCTION(6, "C2K_UTXD0"), -+ MTK_FUNCTION(7, "C2K_UTXD1") -+ ), -+ MTK_PIN( -+ 234, "GPIO234", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO234"), -+ MTK_FUNCTION(1, "SPI1_CLK_B"), -+ MTK_FUNCTION(2, "TP_UTXD1_AO"), -+ MTK_FUNCTION(3, "SCL4_1"), -+ MTK_FUNCTION(4, "UTXD0"), -+ MTK_FUNCTION(6, "PWM_A"), -+ MTK_FUNCTION(7, "DBG_MON_A23") -+ ), -+ MTK_PIN( -+ 235, "GPIO235", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO235"), -+ MTK_FUNCTION(1, "SPI1_MI_B"), -+ MTK_FUNCTION(2, "SPI1_MO_B"), -+ MTK_FUNCTION(3, "SDA4_1"), -+ MTK_FUNCTION(4, "URXD0"), -+ MTK_FUNCTION(6, "CLKM0"), -+ MTK_FUNCTION(7, "DBG_MON_A24") -+ ), -+ MTK_PIN( -+ 236, "GPIO236", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO236"), -+ MTK_FUNCTION(1, "SPI1_MO_B"), -+ MTK_FUNCTION(2, "SPI1_MI_B"), -+ MTK_FUNCTION(3, "SCL5_1"), -+ MTK_FUNCTION(4, "URTS0"), -+ MTK_FUNCTION(6, "PWM_B"), -+ MTK_FUNCTION(7, "DBG_MON_A25") -+ ), -+ MTK_PIN( -+ 237, "GPIO237", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO237"), -+ MTK_FUNCTION(1, "SPI1_CS_B"), -+ MTK_FUNCTION(2, "TP_URXD1_AO"), -+ MTK_FUNCTION(3, "SDA5_1"), -+ MTK_FUNCTION(4, "UCTS0"), -+ MTK_FUNCTION(6, "CLKM1"), -+ MTK_FUNCTION(7, "DBG_MON_A26") -+ ), -+ MTK_PIN( -+ 238, "GPIO238", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO238"), -+ MTK_FUNCTION(1, "SDA4_0") -+ ), -+ MTK_PIN( -+ 239, "GPIO239", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO239"), -+ MTK_FUNCTION(1, "SCL4_0") -+ ), -+ MTK_PIN( -+ 240, "GPIO240", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO240"), -+ MTK_FUNCTION(1, "SDA5_0") -+ ), -+ MTK_PIN( -+ 241, "GPIO241", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO241"), -+ MTK_FUNCTION(1, "SCL5_0") -+ ), -+ MTK_PIN( -+ 242, "GPIO242", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO242"), -+ MTK_FUNCTION(1, "SPI2_CLK_B"), -+ MTK_FUNCTION(2, "TP_UTXD2_AO"), -+ MTK_FUNCTION(3, "SCL4_2"), -+ MTK_FUNCTION(4, "UTXD1"), -+ MTK_FUNCTION(5, "URTS3"), -+ MTK_FUNCTION(6, "PWM_C"), -+ MTK_FUNCTION(7, "DBG_MON_A27") -+ ), -+ MTK_PIN( -+ 243, "GPIO243", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO243"), -+ MTK_FUNCTION(1, "SPI2_MI_B"), -+ MTK_FUNCTION(2, "SPI2_MO_B"), -+ MTK_FUNCTION(3, "SDA4_2"), -+ MTK_FUNCTION(4, "URXD1"), -+ MTK_FUNCTION(5, "UCTS3"), -+ MTK_FUNCTION(6, "CLKM2"), -+ MTK_FUNCTION(7, "DBG_MON_A28") -+ ), -+ MTK_PIN( -+ 244, "GPIO244", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO244"), -+ MTK_FUNCTION(1, "SPI2_MO_B"), -+ MTK_FUNCTION(2, "SPI2_MI_B"), -+ MTK_FUNCTION(3, "SCL5_2"), -+ MTK_FUNCTION(4, "URTS1"), -+ MTK_FUNCTION(5, "UTXD3"), -+ MTK_FUNCTION(6, "PWM_D"), -+ MTK_FUNCTION(7, "DBG_MON_A29") -+ ), -+ MTK_PIN( -+ 245, "GPIO245", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO245"), -+ MTK_FUNCTION(1, "SPI2_CS_B"), -+ MTK_FUNCTION(2, "TP_URXD2_AO"), -+ MTK_FUNCTION(3, "SDA5_2"), -+ MTK_FUNCTION(4, "UCTS1"), -+ MTK_FUNCTION(5, "URXD3"), -+ MTK_FUNCTION(6, "CLKM3"), -+ MTK_FUNCTION(7, "DBG_MON_A30") -+ ), -+ MTK_PIN( -+ 246, "GPIO246", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO246"), -+ MTK_FUNCTION(1, "I2S1_LRCK"), -+ MTK_FUNCTION(2, "I2S2_LRCK"), -+ MTK_FUNCTION(3, "I2S0_LRCK"), -+ MTK_FUNCTION(4, "I2S3_LRCK"), -+ MTK_FUNCTION(5, "PCM0_SYNC"), -+ MTK_FUNCTION(6, "SPI5_CLK_C"), -+ MTK_FUNCTION(7, "DBG_MON_A31") -+ ), -+ MTK_PIN( -+ 247, "GPIO247", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO247"), -+ MTK_FUNCTION(1, "I2S1_BCK"), -+ MTK_FUNCTION(2, "I2S2_BCK"), -+ MTK_FUNCTION(3, "I2S0_BCK"), -+ MTK_FUNCTION(4, "I2S3_BCK"), -+ MTK_FUNCTION(5, "PCM0_CLK"), -+ MTK_FUNCTION(6, "SPI5_MI_C"), -+ MTK_FUNCTION(7, "DBG_MON_A32") -+ ), -+ MTK_PIN( -+ 248, "GPIO248", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO248"), -+ MTK_FUNCTION(1, "I2S2_DI"), -+ MTK_FUNCTION(2, "I2S2_DI"), -+ MTK_FUNCTION(3, "I2S0_DI"), -+ MTK_FUNCTION(4, "I2S0_DI"), -+ MTK_FUNCTION(5, "PCM0_DI"), -+ MTK_FUNCTION(6, "SPI5_CS_C") -+ ), -+ MTK_PIN( -+ 249, "GPIO249", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO249"), -+ MTK_FUNCTION(1, "I2S1_DO"), -+ MTK_FUNCTION(2, "I2S1_DO"), -+ MTK_FUNCTION(3, "I2S3_DO"), -+ MTK_FUNCTION(4, "I2S3_DO"), -+ MTK_FUNCTION(5, "PCM0_DO"), -+ MTK_FUNCTION(6, "SPI5_MO_C"), -+ MTK_FUNCTION(7, "TRAP_SRAM_PWR_BYPASS") -+ ), -+ MTK_PIN( -+ 250, "GPIO250", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO250"), -+ MTK_FUNCTION(1, "SPI3_MI"), -+ MTK_FUNCTION(2, "SPI3_MO"), -+ MTK_FUNCTION(3, "IRTX_OUT"), -+ MTK_FUNCTION(6, "TP_URXD1_AO"), -+ MTK_FUNCTION(7, "DROP_ZONE") -+ ), -+ MTK_PIN( -+ 251, "GPIO251", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO251"), -+ MTK_FUNCTION(1, "SPI3_MO"), -+ MTK_FUNCTION(2, "SPI3_MI"), -+ MTK_FUNCTION(3, "CMFLASH"), -+ MTK_FUNCTION(6, "TP_UTXD1_AO"), -+ MTK_FUNCTION(7, "C2K_RTCK") -+ ), -+ MTK_PIN( -+ 252, "GPIO252", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO252"), -+ MTK_FUNCTION(1, "SPI3_CLK"), -+ MTK_FUNCTION(2, "SCL0_4"), -+ MTK_FUNCTION(3, "PWM_D"), -+ MTK_FUNCTION(7, "C2K_TMS") -+ ), -+ MTK_PIN( -+ 253, "GPIO253", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO253"), -+ MTK_FUNCTION(1, "SPI3_CS"), -+ MTK_FUNCTION(2, "SDA0_4"), -+ MTK_FUNCTION(3, "PWM_A"), -+ MTK_FUNCTION(7, "C2K_TCK") -+ ), -+ MTK_PIN( -+ 254, "GPIO254", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO254"), -+ MTK_FUNCTION(1, "I2S1_MCK"), -+ MTK_FUNCTION(2, "I2S2_MCK"), -+ MTK_FUNCTION(3, "I2S0_MCK"), -+ MTK_FUNCTION(4, "I2S3_MCK"), -+ MTK_FUNCTION(5, "CLKM0"), -+ MTK_FUNCTION(7, "C2K_TDI") -+ ), -+ MTK_PIN( -+ 255, "GPIO255", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO255"), -+ MTK_FUNCTION(1, "CLKM1"), -+ MTK_FUNCTION(2, "DISP_PWM"), -+ MTK_FUNCTION(3, "PWM_B"), -+ MTK_FUNCTION(6, "TP_GPIO1_AO"), -+ MTK_FUNCTION(7, "C2K_TDO") -+ ), -+ MTK_PIN( -+ 256, "GPIO256", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO256"), -+ MTK_FUNCTION(1, "CLKM2"), -+ MTK_FUNCTION(2, "IRTX_OUT"), -+ MTK_FUNCTION(3, "PWM_C"), -+ MTK_FUNCTION(6, "TP_GPIO0_AO"), -+ MTK_FUNCTION(7, "C2K_NTRST") -+ ), -+ MTK_PIN( -+ 257, "GPIO257", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO257"), -+ MTK_FUNCTION(1, "IO_JTAG_TMS"), -+ MTK_FUNCTION(2, "LTE_JTAG_TMS"), -+ MTK_FUNCTION(3, "DFD_TMS"), -+ MTK_FUNCTION(4, "DAP_SIB1_SWD"), -+ MTK_FUNCTION(5, "ANC_JTAG_TMS"), -+ MTK_FUNCTION(6, "SCP_JTAG_TMS"), -+ MTK_FUNCTION(7, "C2K_DM_OTMS") -+ ), -+ MTK_PIN( -+ 258, "GPIO258", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO258"), -+ MTK_FUNCTION(1, "IO_JTAG_TCK"), -+ MTK_FUNCTION(2, "LTE_JTAG_TCK"), -+ MTK_FUNCTION(3, "DFD_TCK_XI"), -+ MTK_FUNCTION(4, "DAP_SIB1_SWCK"), -+ MTK_FUNCTION(5, "ANC_JTAG_TCK"), -+ MTK_FUNCTION(6, "SCP_JTAG_TCK"), -+ MTK_FUNCTION(7, "C2K_DM_OTCK") -+ ), -+ MTK_PIN( -+ 259, "GPIO259", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO259"), -+ MTK_FUNCTION(1, "IO_JTAG_TDI"), -+ MTK_FUNCTION(2, "LTE_JTAG_TDI"), -+ MTK_FUNCTION(3, "DFD_TDI"), -+ MTK_FUNCTION(5, "ANC_JTAG_TDI"), -+ MTK_FUNCTION(6, "SCP_JTAG_TDI"), -+ MTK_FUNCTION(7, "C2K_DM_OTDI") -+ ), -+ MTK_PIN( -+ 260, "GPIO260", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO260"), -+ MTK_FUNCTION(1, "IO_JTAG_TDO"), -+ MTK_FUNCTION(2, "LTE_JTAG_TDO"), -+ MTK_FUNCTION(3, "DFD_TDO"), -+ MTK_FUNCTION(5, "ANC_JTAG_TDO"), -+ MTK_FUNCTION(6, "SCP_JTAG_TDO"), -+ MTK_FUNCTION(7, "C2K_DM_OTDO") -+ ), -+ MTK_PIN( -+ 261, "GPIO261", -+ MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), -+ DRV_GRP3, -+ MTK_FUNCTION(0, "GPIO261"), -+ MTK_FUNCTION(2, "LTE_JTAG_TRSTN"), -+ MTK_FUNCTION(3, "DFD_NTRST"), -+ MTK_FUNCTION(5, "ANC_JTAG_TRSTN"), -+ MTK_FUNCTION(6, "SCP_JTAG_TRSTN"), -+ MTK_FUNCTION(7, "C2K_DM_JTINTP") -+ ), -+}; -+ -+#endif /* __PINCTRL_MTK_MT6797_H */ ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8183.h -@@ -0,0 +1,1916 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: Zhiyong Tao -+ * -+ */ -+ -+#ifndef __PINCTRL_MTK_MT8183_H -+#define __PINCTRL_MTK_MT8183_H -+ -+#include "pinctrl-paris.h" -+ -+static struct mtk_pin_desc mtk_pins_mt8183[] = { -+ MTK_PIN( -+ 0, "GPIO0", -+ MTK_EINT_FUNCTION(0, 0), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO0"), -+ MTK_FUNCTION(1, "MRG_SYNC"), -+ MTK_FUNCTION(2, "PCM0_SYNC"), -+ MTK_FUNCTION(3, "TP_GPIO0_AO"), -+ MTK_FUNCTION(4, "SRCLKENAI0"), -+ MTK_FUNCTION(5, "SCP_SPI2_CS"), -+ MTK_FUNCTION(6, "I2S3_MCK"), -+ MTK_FUNCTION(7, "SPI2_CSB") -+ ), -+ MTK_PIN( -+ 1, "GPIO1", -+ MTK_EINT_FUNCTION(0, 1), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO1"), -+ MTK_FUNCTION(1, "MRG_CLK"), -+ MTK_FUNCTION(2, "PCM0_CLK"), -+ MTK_FUNCTION(3, "TP_GPIO1_AO"), -+ MTK_FUNCTION(4, "CLKM3"), -+ MTK_FUNCTION(5, "SCP_SPI2_MO"), -+ MTK_FUNCTION(6, "I2S3_BCK"), -+ MTK_FUNCTION(7, "SPI2_MO") -+ ), -+ MTK_PIN( -+ 2, "GPIO2", -+ MTK_EINT_FUNCTION(0, 2), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO2"), -+ MTK_FUNCTION(1, "MRG_DO"), -+ MTK_FUNCTION(2, "PCM0_DO"), -+ MTK_FUNCTION(3, "TP_GPIO2_AO"), -+ MTK_FUNCTION(4, "SCL6"), -+ MTK_FUNCTION(5, "SCP_SPI2_CK"), -+ MTK_FUNCTION(6, "I2S3_LRCK"), -+ MTK_FUNCTION(7, "SPI2_CLK") -+ ), -+ MTK_PIN( -+ 3, "GPIO3", -+ MTK_EINT_FUNCTION(0, 3), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO3"), -+ MTK_FUNCTION(1, "MRG_DI"), -+ MTK_FUNCTION(2, "PCM0_DI"), -+ MTK_FUNCTION(3, "TP_GPIO3_AO"), -+ MTK_FUNCTION(4, "SDA6"), -+ MTK_FUNCTION(5, "TDM_MCK"), -+ MTK_FUNCTION(6, "I2S3_DO"), -+ MTK_FUNCTION(7, "SCP_VREQ_VAO") -+ ), -+ MTK_PIN( -+ 4, "GPIO4", -+ MTK_EINT_FUNCTION(0, 4), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO4"), -+ MTK_FUNCTION(1, "PWM_B"), -+ MTK_FUNCTION(2, "I2S0_MCK"), -+ MTK_FUNCTION(3, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(4, "MD_URXD1"), -+ MTK_FUNCTION(5, "TDM_BCK"), -+ MTK_FUNCTION(6, "TP_GPIO4_AO"), -+ MTK_FUNCTION(7, "DAP_MD32_SWD") -+ ), -+ MTK_PIN( -+ 5, "GPIO5", -+ MTK_EINT_FUNCTION(0, 5), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO5"), -+ MTK_FUNCTION(1, "PWM_C"), -+ MTK_FUNCTION(2, "I2S0_BCK"), -+ MTK_FUNCTION(3, "SSPM_URXD_AO"), -+ MTK_FUNCTION(4, "MD_UTXD1"), -+ MTK_FUNCTION(5, "TDM_LRCK"), -+ MTK_FUNCTION(6, "TP_GPIO5_AO"), -+ MTK_FUNCTION(7, "DAP_MD32_SWCK") -+ ), -+ MTK_PIN( -+ 6, "GPIO6", -+ MTK_EINT_FUNCTION(0, 6), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO6"), -+ MTK_FUNCTION(1, "PWM_A"), -+ MTK_FUNCTION(2, "I2S0_LRCK"), -+ MTK_FUNCTION(3, "IDDIG"), -+ MTK_FUNCTION(4, "MD_URXD0"), -+ MTK_FUNCTION(5, "TDM_DATA0"), -+ MTK_FUNCTION(6, "TP_GPIO6_AO"), -+ MTK_FUNCTION(7, "CMFLASH") -+ ), -+ MTK_PIN( -+ 7, "GPIO7", -+ MTK_EINT_FUNCTION(0, 7), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO7"), -+ MTK_FUNCTION(1, "SPI1_B_MI"), -+ MTK_FUNCTION(2, "I2S0_DI"), -+ MTK_FUNCTION(3, "USB_DRVVBUS"), -+ MTK_FUNCTION(4, "MD_UTXD0"), -+ MTK_FUNCTION(5, "TDM_DATA1"), -+ MTK_FUNCTION(6, "TP_GPIO7_AO"), -+ MTK_FUNCTION(7, "DVFSRC_EXT_REQ") -+ ), -+ MTK_PIN( -+ 8, "GPIO8", -+ MTK_EINT_FUNCTION(0, 8), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO8"), -+ MTK_FUNCTION(1, "SPI1_B_CSB"), -+ MTK_FUNCTION(2, "ANT_SEL3"), -+ MTK_FUNCTION(3, "SCL7"), -+ MTK_FUNCTION(4, "CONN_MCU_TRST_B"), -+ MTK_FUNCTION(5, "TDM_DATA2"), -+ MTK_FUNCTION(6, "MD_INT0"), -+ MTK_FUNCTION(7, "JTRSTN_SEL1") -+ ), -+ MTK_PIN( -+ 9, "GPIO9", -+ MTK_EINT_FUNCTION(0, 9), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO9"), -+ MTK_FUNCTION(1, "SPI1_B_MO"), -+ MTK_FUNCTION(2, "ANT_SEL4"), -+ MTK_FUNCTION(3, "CMMCLK2"), -+ MTK_FUNCTION(4, "CONN_MCU_DBGACK_N"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TRSTN"), -+ MTK_FUNCTION(6, "IO_JTAG_TRSTN"), -+ MTK_FUNCTION(7, "DBG_MON_B10") -+ ), -+ MTK_PIN( -+ 10, "GPIO10", -+ MTK_EINT_FUNCTION(0, 10), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO10"), -+ MTK_FUNCTION(1, "SPI1_B_CLK"), -+ MTK_FUNCTION(2, "ANT_SEL5"), -+ MTK_FUNCTION(3, "CMMCLK3"), -+ MTK_FUNCTION(4, "CONN_MCU_DBGI_N"), -+ MTK_FUNCTION(5, "TDM_DATA3"), -+ MTK_FUNCTION(6, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(7, "DBG_MON_B11") -+ ), -+ MTK_PIN( -+ 11, "GPIO11", -+ MTK_EINT_FUNCTION(0, 11), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO11"), -+ MTK_FUNCTION(1, "TP_URXD1_AO"), -+ MTK_FUNCTION(2, "IDDIG"), -+ MTK_FUNCTION(3, "SCL6"), -+ MTK_FUNCTION(4, "UCTS1"), -+ MTK_FUNCTION(5, "UCTS0"), -+ MTK_FUNCTION(6, "SRCLKENAI1"), -+ MTK_FUNCTION(7, "I2S5_MCK") -+ ), -+ MTK_PIN( -+ 12, "GPIO12", -+ MTK_EINT_FUNCTION(0, 12), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO12"), -+ MTK_FUNCTION(1, "TP_UTXD1_AO"), -+ MTK_FUNCTION(2, "USB_DRVVBUS"), -+ MTK_FUNCTION(3, "SDA6"), -+ MTK_FUNCTION(4, "URTS1"), -+ MTK_FUNCTION(5, "URTS0"), -+ MTK_FUNCTION(6, "I2S2_DI2"), -+ MTK_FUNCTION(7, "I2S5_BCK") -+ ), -+ MTK_PIN( -+ 13, "GPIO13", -+ MTK_EINT_FUNCTION(0, 13), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO13"), -+ MTK_FUNCTION(1, "DBPI_D0"), -+ MTK_FUNCTION(2, "SPI5_MI"), -+ MTK_FUNCTION(3, "PCM0_SYNC"), -+ MTK_FUNCTION(4, "MD_URXD0"), -+ MTK_FUNCTION(5, "ANT_SEL3"), -+ MTK_FUNCTION(6, "I2S0_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B15") -+ ), -+ MTK_PIN( -+ 14, "GPIO14", -+ MTK_EINT_FUNCTION(0, 14), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO14"), -+ MTK_FUNCTION(1, "DBPI_D1"), -+ MTK_FUNCTION(2, "SPI5_CSB"), -+ MTK_FUNCTION(3, "PCM0_CLK"), -+ MTK_FUNCTION(4, "MD_UTXD0"), -+ MTK_FUNCTION(5, "ANT_SEL4"), -+ MTK_FUNCTION(6, "I2S0_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_B16") -+ ), -+ MTK_PIN( -+ 15, "GPIO15", -+ MTK_EINT_FUNCTION(0, 15), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO15"), -+ MTK_FUNCTION(1, "DBPI_D2"), -+ MTK_FUNCTION(2, "SPI5_MO"), -+ MTK_FUNCTION(3, "PCM0_DO"), -+ MTK_FUNCTION(4, "MD_URXD1"), -+ MTK_FUNCTION(5, "ANT_SEL5"), -+ MTK_FUNCTION(6, "I2S0_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B17") -+ ), -+ MTK_PIN( -+ 16, "GPIO16", -+ MTK_EINT_FUNCTION(0, 16), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO16"), -+ MTK_FUNCTION(1, "DBPI_D3"), -+ MTK_FUNCTION(2, "SPI5_CLK"), -+ MTK_FUNCTION(3, "PCM0_DI"), -+ MTK_FUNCTION(4, "MD_UTXD1"), -+ MTK_FUNCTION(5, "ANT_SEL6"), -+ MTK_FUNCTION(6, "I2S0_DI"), -+ MTK_FUNCTION(7, "DBG_MON_B23") -+ ), -+ MTK_PIN( -+ 17, "GPIO17", -+ MTK_EINT_FUNCTION(0, 17), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO17"), -+ MTK_FUNCTION(1, "DBPI_D4"), -+ MTK_FUNCTION(2, "SPI4_MI"), -+ MTK_FUNCTION(3, "CONN_MCU_TRST_B"), -+ MTK_FUNCTION(4, "MD_INT0"), -+ MTK_FUNCTION(5, "ANT_SEL7"), -+ MTK_FUNCTION(6, "I2S3_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A1") -+ ), -+ MTK_PIN( -+ 18, "GPIO18", -+ MTK_EINT_FUNCTION(0, 18), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO18"), -+ MTK_FUNCTION(1, "DBPI_D5"), -+ MTK_FUNCTION(2, "SPI4_CSB"), -+ MTK_FUNCTION(3, "CONN_MCU_DBGI_N"), -+ MTK_FUNCTION(4, "MD_INT0"), -+ MTK_FUNCTION(5, "SCP_VREQ_VAO"), -+ MTK_FUNCTION(6, "I2S3_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A2") -+ ), -+ MTK_PIN( -+ 19, "GPIO19", -+ MTK_EINT_FUNCTION(0, 19), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO19"), -+ MTK_FUNCTION(1, "DBPI_D6"), -+ MTK_FUNCTION(2, "SPI4_MO"), -+ MTK_FUNCTION(3, "CONN_MCU_TDO"), -+ MTK_FUNCTION(4, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(5, "URXD1"), -+ MTK_FUNCTION(6, "I2S3_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A3") -+ ), -+ MTK_PIN( -+ 20, "GPIO20", -+ MTK_EINT_FUNCTION(0, 20), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO20"), -+ MTK_FUNCTION(1, "DBPI_D7"), -+ MTK_FUNCTION(2, "SPI4_CLK"), -+ MTK_FUNCTION(3, "CONN_MCU_DBGACK_N"), -+ MTK_FUNCTION(4, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(5, "UTXD1"), -+ MTK_FUNCTION(6, "I2S3_DO"), -+ MTK_FUNCTION(7, "DBG_MON_A19") -+ ), -+ MTK_PIN( -+ 21, "GPIO21", -+ MTK_EINT_FUNCTION(0, 21), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO21"), -+ MTK_FUNCTION(1, "DBPI_D8"), -+ MTK_FUNCTION(2, "SPI3_MI"), -+ MTK_FUNCTION(3, "CONN_MCU_TMS"), -+ MTK_FUNCTION(4, "DAP_MD32_SWD"), -+ MTK_FUNCTION(5, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(6, "I2S2_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B5") -+ ), -+ MTK_PIN( -+ 22, "GPIO22", -+ MTK_EINT_FUNCTION(0, 22), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO22"), -+ MTK_FUNCTION(1, "DBPI_D9"), -+ MTK_FUNCTION(2, "SPI3_CSB"), -+ MTK_FUNCTION(3, "CONN_MCU_TCK"), -+ MTK_FUNCTION(4, "DAP_MD32_SWCK"), -+ MTK_FUNCTION(5, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(6, "I2S2_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_B6") -+ ), -+ MTK_PIN( -+ 23, "GPIO23", -+ MTK_EINT_FUNCTION(0, 23), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO23"), -+ MTK_FUNCTION(1, "DBPI_D10"), -+ MTK_FUNCTION(2, "SPI3_MO"), -+ MTK_FUNCTION(3, "CONN_MCU_TDI"), -+ MTK_FUNCTION(4, "UCTS1"), -+ MTK_FUNCTION(5, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(6, "I2S2_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B7") -+ ), -+ MTK_PIN( -+ 24, "GPIO24", -+ MTK_EINT_FUNCTION(0, 24), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO24"), -+ MTK_FUNCTION(1, "DBPI_D11"), -+ MTK_FUNCTION(2, "SPI3_CLK"), -+ MTK_FUNCTION(3, "SRCLKENAI0"), -+ MTK_FUNCTION(4, "URTS1"), -+ MTK_FUNCTION(5, "IO_JTAG_TCK"), -+ MTK_FUNCTION(6, "I2S2_DI"), -+ MTK_FUNCTION(7, "DBG_MON_B31") -+ ), -+ MTK_PIN( -+ 25, "GPIO25", -+ MTK_EINT_FUNCTION(0, 25), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO25"), -+ MTK_FUNCTION(1, "DBPI_HSYNC"), -+ MTK_FUNCTION(2, "ANT_SEL0"), -+ MTK_FUNCTION(3, "SCL6"), -+ MTK_FUNCTION(4, "KPCOL2"), -+ MTK_FUNCTION(5, "IO_JTAG_TMS"), -+ MTK_FUNCTION(6, "I2S1_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B0") -+ ), -+ MTK_PIN( -+ 26, "GPIO26", -+ MTK_EINT_FUNCTION(0, 26), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO26"), -+ MTK_FUNCTION(1, "DBPI_VSYNC"), -+ MTK_FUNCTION(2, "ANT_SEL1"), -+ MTK_FUNCTION(3, "SDA6"), -+ MTK_FUNCTION(4, "KPROW2"), -+ MTK_FUNCTION(5, "IO_JTAG_TDI"), -+ MTK_FUNCTION(6, "I2S1_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_B1") -+ ), -+ MTK_PIN( -+ 27, "GPIO27", -+ MTK_EINT_FUNCTION(0, 27), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO27"), -+ MTK_FUNCTION(1, "DBPI_DE"), -+ MTK_FUNCTION(2, "ANT_SEL2"), -+ MTK_FUNCTION(3, "SCL7"), -+ MTK_FUNCTION(4, "DMIC_CLK"), -+ MTK_FUNCTION(5, "IO_JTAG_TDO"), -+ MTK_FUNCTION(6, "I2S1_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B9") -+ ), -+ MTK_PIN( -+ 28, "GPIO28", -+ MTK_EINT_FUNCTION(0, 28), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO28"), -+ MTK_FUNCTION(1, "DBPI_CK"), -+ MTK_FUNCTION(2, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(3, "SDA7"), -+ MTK_FUNCTION(4, "DMIC_DAT"), -+ MTK_FUNCTION(5, "IO_JTAG_TRSTN"), -+ MTK_FUNCTION(6, "I2S1_DO"), -+ MTK_FUNCTION(7, "DBG_MON_B32") -+ ), -+ MTK_PIN( -+ 29, "GPIO29", -+ MTK_EINT_FUNCTION(0, 29), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO29"), -+ MTK_FUNCTION(1, "MSDC1_CLK"), -+ MTK_FUNCTION(2, "IO_JTAG_TCK"), -+ MTK_FUNCTION(3, "UDI_TCK"), -+ MTK_FUNCTION(4, "CONN_DSP_JCK"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TCK"), -+ MTK_FUNCTION(6, "PCM1_CLK"), -+ MTK_FUNCTION(7, "DBG_MON_A6") -+ ), -+ MTK_PIN( -+ 30, "GPIO30", -+ MTK_EINT_FUNCTION(0, 30), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO30"), -+ MTK_FUNCTION(1, "MSDC1_DAT3"), -+ MTK_FUNCTION(2, "DAP_MD32_SWD"), -+ MTK_FUNCTION(3, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(4, "CONN_DSP_JINTP"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TRSTN"), -+ MTK_FUNCTION(6, "PCM1_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A7") -+ ), -+ MTK_PIN( -+ 31, "GPIO31", -+ MTK_EINT_FUNCTION(0, 31), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO31"), -+ MTK_FUNCTION(1, "MSDC1_CMD"), -+ MTK_FUNCTION(2, "IO_JTAG_TMS"), -+ MTK_FUNCTION(3, "UDI_TMS"), -+ MTK_FUNCTION(4, "CONN_DSP_JMS"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TMS"), -+ MTK_FUNCTION(6, "PCM1_SYNC"), -+ MTK_FUNCTION(7, "DBG_MON_A8") -+ ), -+ MTK_PIN( -+ 32, "GPIO32", -+ MTK_EINT_FUNCTION(0, 32), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO32"), -+ MTK_FUNCTION(1, "MSDC1_DAT0"), -+ MTK_FUNCTION(2, "IO_JTAG_TDI"), -+ MTK_FUNCTION(3, "UDI_TDI"), -+ MTK_FUNCTION(4, "CONN_DSP_JDI"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TDI"), -+ MTK_FUNCTION(6, "PCM1_DO0"), -+ MTK_FUNCTION(7, "DBG_MON_A9") -+ ), -+ MTK_PIN( -+ 33, "GPIO33", -+ MTK_EINT_FUNCTION(0, 33), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO33"), -+ MTK_FUNCTION(1, "MSDC1_DAT2"), -+ MTK_FUNCTION(2, "IO_JTAG_TRSTN"), -+ MTK_FUNCTION(3, "UDI_NTRST"), -+ MTK_FUNCTION(4, "DAP_MD32_SWCK"), -+ MTK_FUNCTION(5, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(6, "PCM1_DO2"), -+ MTK_FUNCTION(7, "DBG_MON_A10") -+ ), -+ MTK_PIN( -+ 34, "GPIO34", -+ MTK_EINT_FUNCTION(0, 34), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO34"), -+ MTK_FUNCTION(1, "MSDC1_DAT1"), -+ MTK_FUNCTION(2, "IO_JTAG_TDO"), -+ MTK_FUNCTION(3, "UDI_TDO"), -+ MTK_FUNCTION(4, "CONN_DSP_JDO"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TDO"), -+ MTK_FUNCTION(6, "PCM1_DO1"), -+ MTK_FUNCTION(7, "DBG_MON_A11") -+ ), -+ MTK_PIN( -+ 35, "GPIO35", -+ MTK_EINT_FUNCTION(0, 35), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO35"), -+ MTK_FUNCTION(1, "MD1_SIM2_SIO"), -+ MTK_FUNCTION(2, "CCU_JTAG_TDO"), -+ MTK_FUNCTION(3, "MD1_SIM1_SIO"), -+ MTK_FUNCTION(5, "SCP_JTAG_TDO"), -+ MTK_FUNCTION(6, "CONN_DSP_JMS"), -+ MTK_FUNCTION(7, "DBG_MON_A28") -+ ), -+ MTK_PIN( -+ 36, "GPIO36", -+ MTK_EINT_FUNCTION(0, 36), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO36"), -+ MTK_FUNCTION(1, "MD1_SIM2_SRST"), -+ MTK_FUNCTION(2, "CCU_JTAG_TMS"), -+ MTK_FUNCTION(3, "MD1_SIM1_SRST"), -+ MTK_FUNCTION(4, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(5, "SCP_JTAG_TMS"), -+ MTK_FUNCTION(6, "CONN_DSP_JINTP"), -+ MTK_FUNCTION(7, "DBG_MON_A29") -+ ), -+ MTK_PIN( -+ 37, "GPIO37", -+ MTK_EINT_FUNCTION(0, 37), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO37"), -+ MTK_FUNCTION(1, "MD1_SIM2_SCLK"), -+ MTK_FUNCTION(2, "CCU_JTAG_TDI"), -+ MTK_FUNCTION(3, "MD1_SIM1_SCLK"), -+ MTK_FUNCTION(5, "SCP_JTAG_TDI"), -+ MTK_FUNCTION(6, "CONN_DSP_JDO"), -+ MTK_FUNCTION(7, "DBG_MON_A30") -+ ), -+ MTK_PIN( -+ 38, "GPIO38", -+ MTK_EINT_FUNCTION(0, 38), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO38"), -+ MTK_FUNCTION(1, "MD1_SIM1_SCLK"), -+ MTK_FUNCTION(3, "MD1_SIM2_SCLK"), -+ MTK_FUNCTION(4, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(7, "DBG_MON_A20") -+ ), -+ MTK_PIN( -+ 39, "GPIO39", -+ MTK_EINT_FUNCTION(0, 39), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO39"), -+ MTK_FUNCTION(1, "MD1_SIM1_SRST"), -+ MTK_FUNCTION(2, "CCU_JTAG_TCK"), -+ MTK_FUNCTION(3, "MD1_SIM2_SRST"), -+ MTK_FUNCTION(5, "SCP_JTAG_TCK"), -+ MTK_FUNCTION(6, "CONN_DSP_JCK"), -+ MTK_FUNCTION(7, "DBG_MON_A31") -+ ), -+ MTK_PIN( -+ 40, "GPIO40", -+ MTK_EINT_FUNCTION(0, 40), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO40"), -+ MTK_FUNCTION(1, "MD1_SIM1_SIO"), -+ MTK_FUNCTION(2, "CCU_JTAG_TRST"), -+ MTK_FUNCTION(3, "MD1_SIM2_SIO"), -+ MTK_FUNCTION(5, "SCP_JTAG_TRSTN"), -+ MTK_FUNCTION(6, "CONN_DSP_JDI"), -+ MTK_FUNCTION(7, "DBG_MON_A32") -+ ), -+ MTK_PIN( -+ 41, "GPIO41", -+ MTK_EINT_FUNCTION(0, 41), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO41"), -+ MTK_FUNCTION(1, "IDDIG"), -+ MTK_FUNCTION(2, "URXD1"), -+ MTK_FUNCTION(3, "UCTS0"), -+ MTK_FUNCTION(4, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(5, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(6, "DMIC_CLK") -+ ), -+ MTK_PIN( -+ 42, "GPIO42", -+ MTK_EINT_FUNCTION(0, 42), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO42"), -+ MTK_FUNCTION(1, "USB_DRVVBUS"), -+ MTK_FUNCTION(2, "UTXD1"), -+ MTK_FUNCTION(3, "URTS0"), -+ MTK_FUNCTION(4, "SSPM_URXD_AO"), -+ MTK_FUNCTION(5, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(6, "DMIC_DAT") -+ ), -+ MTK_PIN( -+ 43, "GPIO43", -+ MTK_EINT_FUNCTION(0, 43), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO43"), -+ MTK_FUNCTION(1, "DISP_PWM") -+ ), -+ MTK_PIN( -+ 44, "GPIO44", -+ MTK_EINT_FUNCTION(0, 44), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO44"), -+ MTK_FUNCTION(1, "DSI_TE") -+ ), -+ MTK_PIN( -+ 45, "GPIO45", -+ MTK_EINT_FUNCTION(0, 45), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO45"), -+ MTK_FUNCTION(1, "LCM_RST") -+ ), -+ MTK_PIN( -+ 46, "GPIO46", -+ MTK_EINT_FUNCTION(0, 46), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO46"), -+ MTK_FUNCTION(1, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(2, "URXD1"), -+ MTK_FUNCTION(3, "UCTS1"), -+ MTK_FUNCTION(4, "CCU_UTXD_AO"), -+ MTK_FUNCTION(5, "TP_UCTS1_AO"), -+ MTK_FUNCTION(6, "IDDIG"), -+ MTK_FUNCTION(7, "I2S5_LRCK") -+ ), -+ MTK_PIN( -+ 47, "GPIO47", -+ MTK_EINT_FUNCTION(0, 47), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO47"), -+ MTK_FUNCTION(1, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(2, "UTXD1"), -+ MTK_FUNCTION(3, "URTS1"), -+ MTK_FUNCTION(4, "CCU_URXD_AO"), -+ MTK_FUNCTION(5, "TP_URTS1_AO"), -+ MTK_FUNCTION(6, "USB_DRVVBUS"), -+ MTK_FUNCTION(7, "I2S5_DO") -+ ), -+ MTK_PIN( -+ 48, "GPIO48", -+ MTK_EINT_FUNCTION(0, 48), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO48"), -+ MTK_FUNCTION(1, "SCL5") -+ ), -+ MTK_PIN( -+ 49, "GPIO49", -+ MTK_EINT_FUNCTION(0, 49), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO49"), -+ MTK_FUNCTION(1, "SDA5") -+ ), -+ MTK_PIN( -+ 50, "GPIO50", -+ MTK_EINT_FUNCTION(0, 50), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO50"), -+ MTK_FUNCTION(1, "SCL3") -+ ), -+ MTK_PIN( -+ 51, "GPIO51", -+ MTK_EINT_FUNCTION(0, 51), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO51"), -+ MTK_FUNCTION(1, "SDA3") -+ ), -+ MTK_PIN( -+ 52, "GPIO52", -+ MTK_EINT_FUNCTION(0, 52), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO52"), -+ MTK_FUNCTION(1, "BPI_ANT2") -+ ), -+ MTK_PIN( -+ 53, "GPIO53", -+ MTK_EINT_FUNCTION(0, 53), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO53"), -+ MTK_FUNCTION(1, "BPI_ANT0") -+ ), -+ MTK_PIN( -+ 54, "GPIO54", -+ MTK_EINT_FUNCTION(0, 54), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO54"), -+ MTK_FUNCTION(1, "BPI_OLAT1") -+ ), -+ MTK_PIN( -+ 55, "GPIO55", -+ MTK_EINT_FUNCTION(0, 55), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO55"), -+ MTK_FUNCTION(1, "BPI_BUS8") -+ ), -+ MTK_PIN( -+ 56, "GPIO56", -+ MTK_EINT_FUNCTION(0, 56), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO56"), -+ MTK_FUNCTION(1, "BPI_BUS9"), -+ MTK_FUNCTION(2, "SCL_6306") -+ ), -+ MTK_PIN( -+ 57, "GPIO57", -+ MTK_EINT_FUNCTION(0, 57), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO57"), -+ MTK_FUNCTION(1, "BPI_BUS10"), -+ MTK_FUNCTION(2, "SDA_6306") -+ ), -+ MTK_PIN( -+ 58, "GPIO58", -+ MTK_EINT_FUNCTION(0, 58), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO58"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D2"), -+ MTK_FUNCTION(2, "SPM_BSI_D2"), -+ MTK_FUNCTION(3, "PWM_B") -+ ), -+ MTK_PIN( -+ 59, "GPIO59", -+ MTK_EINT_FUNCTION(0, 59), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO59"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D1"), -+ MTK_FUNCTION(2, "SPM_BSI_D1") -+ ), -+ MTK_PIN( -+ 60, "GPIO60", -+ MTK_EINT_FUNCTION(0, 60), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO60"), -+ MTK_FUNCTION(1, "RFIC0_BSI_D0"), -+ MTK_FUNCTION(2, "SPM_BSI_D0") -+ ), -+ MTK_PIN( -+ 61, "GPIO61", -+ MTK_EINT_FUNCTION(0, 61), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO61"), -+ MTK_FUNCTION(1, "MIPI1_SDATA") -+ ), -+ MTK_PIN( -+ 62, "GPIO62", -+ MTK_EINT_FUNCTION(0, 62), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO62"), -+ MTK_FUNCTION(1, "MIPI1_SCLK") -+ ), -+ MTK_PIN( -+ 63, "GPIO63", -+ MTK_EINT_FUNCTION(0, 63), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO63"), -+ MTK_FUNCTION(1, "MIPI0_SDATA") -+ ), -+ MTK_PIN( -+ 64, "GPIO64", -+ MTK_EINT_FUNCTION(0, 64), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO64"), -+ MTK_FUNCTION(1, "MIPI0_SCLK") -+ ), -+ MTK_PIN( -+ 65, "GPIO65", -+ MTK_EINT_FUNCTION(0, 65), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO65"), -+ MTK_FUNCTION(1, "MIPI3_SDATA"), -+ MTK_FUNCTION(2, "BPI_OLAT2") -+ ), -+ MTK_PIN( -+ 66, "GPIO66", -+ MTK_EINT_FUNCTION(0, 66), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO66"), -+ MTK_FUNCTION(1, "MIPI3_SCLK"), -+ MTK_FUNCTION(2, "BPI_OLAT3") -+ ), -+ MTK_PIN( -+ 67, "GPIO67", -+ MTK_EINT_FUNCTION(0, 67), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO67"), -+ MTK_FUNCTION(1, "MIPI2_SDATA") -+ ), -+ MTK_PIN( -+ 68, "GPIO68", -+ MTK_EINT_FUNCTION(0, 68), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO68"), -+ MTK_FUNCTION(1, "MIPI2_SCLK") -+ ), -+ MTK_PIN( -+ 69, "GPIO69", -+ MTK_EINT_FUNCTION(0, 69), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO69"), -+ MTK_FUNCTION(1, "BPI_BUS7") -+ ), -+ MTK_PIN( -+ 70, "GPIO70", -+ MTK_EINT_FUNCTION(0, 70), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO70"), -+ MTK_FUNCTION(1, "BPI_BUS6") -+ ), -+ MTK_PIN( -+ 71, "GPIO71", -+ MTK_EINT_FUNCTION(0, 71), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO71"), -+ MTK_FUNCTION(1, "BPI_BUS5") -+ ), -+ MTK_PIN( -+ 72, "GPIO72", -+ MTK_EINT_FUNCTION(0, 72), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO72"), -+ MTK_FUNCTION(1, "BPI_BUS4") -+ ), -+ MTK_PIN( -+ 73, "GPIO73", -+ MTK_EINT_FUNCTION(0, 73), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO73"), -+ MTK_FUNCTION(1, "BPI_BUS3") -+ ), -+ MTK_PIN( -+ 74, "GPIO74", -+ MTK_EINT_FUNCTION(0, 74), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO74"), -+ MTK_FUNCTION(1, "BPI_BUS2") -+ ), -+ MTK_PIN( -+ 75, "GPIO75", -+ MTK_EINT_FUNCTION(0, 75), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO75"), -+ MTK_FUNCTION(1, "BPI_BUS1") -+ ), -+ MTK_PIN( -+ 76, "GPIO76", -+ MTK_EINT_FUNCTION(0, 76), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO76"), -+ MTK_FUNCTION(1, "BPI_BUS0") -+ ), -+ MTK_PIN( -+ 77, "GPIO77", -+ MTK_EINT_FUNCTION(0, 77), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO77"), -+ MTK_FUNCTION(1, "BPI_ANT1") -+ ), -+ MTK_PIN( -+ 78, "GPIO78", -+ MTK_EINT_FUNCTION(0, 78), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO78"), -+ MTK_FUNCTION(1, "BPI_OLAT0") -+ ), -+ MTK_PIN( -+ 79, "GPIO79", -+ MTK_EINT_FUNCTION(0, 79), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO79"), -+ MTK_FUNCTION(1, "BPI_PA_VM1"), -+ MTK_FUNCTION(2, "MIPI4_SDATA") -+ ), -+ MTK_PIN( -+ 80, "GPIO80", -+ MTK_EINT_FUNCTION(0, 80), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO80"), -+ MTK_FUNCTION(1, "BPI_PA_VM0"), -+ MTK_FUNCTION(2, "MIPI4_SCLK") -+ ), -+ MTK_PIN( -+ 81, "GPIO81", -+ MTK_EINT_FUNCTION(0, 81), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO81"), -+ MTK_FUNCTION(1, "SDA1") -+ ), -+ MTK_PIN( -+ 82, "GPIO82", -+ MTK_EINT_FUNCTION(0, 82), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO82"), -+ MTK_FUNCTION(1, "SDA0") -+ ), -+ MTK_PIN( -+ 83, "GPIO83", -+ MTK_EINT_FUNCTION(0, 83), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO83"), -+ MTK_FUNCTION(1, "SCL0") -+ ), -+ MTK_PIN( -+ 84, "GPIO84", -+ MTK_EINT_FUNCTION(0, 84), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO84"), -+ MTK_FUNCTION(1, "SCL1") -+ ), -+ MTK_PIN( -+ 85, "GPIO85", -+ MTK_EINT_FUNCTION(0, 85), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO85"), -+ MTK_FUNCTION(1, "SPI0_MI"), -+ MTK_FUNCTION(2, "SCP_SPI0_MI"), -+ MTK_FUNCTION(3, "CLKM3"), -+ MTK_FUNCTION(4, "I2S1_BCK"), -+ MTK_FUNCTION(5, "MFG_DFD_JTAG_TDO"), -+ MTK_FUNCTION(6, "DFD_TDO"), -+ MTK_FUNCTION(7, "JTDO_SEL1") -+ ), -+ MTK_PIN( -+ 86, "GPIO86", -+ MTK_EINT_FUNCTION(0, 86), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO86"), -+ MTK_FUNCTION(1, "SPI0_CSB"), -+ MTK_FUNCTION(2, "SCP_SPI0_CS"), -+ MTK_FUNCTION(3, "CLKM0"), -+ MTK_FUNCTION(4, "I2S1_LRCK"), -+ MTK_FUNCTION(5, "MFG_DFD_JTAG_TMS"), -+ MTK_FUNCTION(6, "DFD_TMS"), -+ MTK_FUNCTION(7, "JTMS_SEL1") -+ ), -+ MTK_PIN( -+ 87, "GPIO87", -+ MTK_EINT_FUNCTION(0, 87), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO87"), -+ MTK_FUNCTION(1, "SPI0_MO"), -+ MTK_FUNCTION(2, "SCP_SPI0_MO"), -+ MTK_FUNCTION(3, "SDA1"), -+ MTK_FUNCTION(4, "I2S1_DO"), -+ MTK_FUNCTION(5, "MFG_DFD_JTAG_TDI"), -+ MTK_FUNCTION(6, "DFD_TDI"), -+ MTK_FUNCTION(7, "JTDI_SEL1") -+ ), -+ MTK_PIN( -+ 88, "GPIO88", -+ MTK_EINT_FUNCTION(0, 88), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO88"), -+ MTK_FUNCTION(1, "SPI0_CLK"), -+ MTK_FUNCTION(2, "SCP_SPI0_CK"), -+ MTK_FUNCTION(3, "SCL1"), -+ MTK_FUNCTION(4, "I2S1_MCK"), -+ MTK_FUNCTION(5, "MFG_DFD_JTAG_TCK"), -+ MTK_FUNCTION(6, "DFD_TCK_XI"), -+ MTK_FUNCTION(7, "JTCK_SEL1") -+ ), -+ MTK_PIN( -+ 89, "GPIO89", -+ MTK_EINT_FUNCTION(0, 89), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO89"), -+ MTK_FUNCTION(1, "SRCLKENAI0"), -+ MTK_FUNCTION(2, "PWM_C"), -+ MTK_FUNCTION(3, "I2S5_BCK"), -+ MTK_FUNCTION(4, "ANT_SEL6"), -+ MTK_FUNCTION(5, "SDA8"), -+ MTK_FUNCTION(6, "CMVREF0"), -+ MTK_FUNCTION(7, "DBG_MON_A21") -+ ), -+ MTK_PIN( -+ 90, "GPIO90", -+ MTK_EINT_FUNCTION(0, 90), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO90"), -+ MTK_FUNCTION(1, "PWM_A"), -+ MTK_FUNCTION(2, "CMMCLK2"), -+ MTK_FUNCTION(3, "I2S5_LRCK"), -+ MTK_FUNCTION(4, "SCP_VREQ_VAO"), -+ MTK_FUNCTION(5, "SCL8"), -+ MTK_FUNCTION(6, "PTA_RXD"), -+ MTK_FUNCTION(7, "DBG_MON_A22") -+ ), -+ MTK_PIN( -+ 91, "GPIO91", -+ MTK_EINT_FUNCTION(0, 91), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO91"), -+ MTK_FUNCTION(1, "KPROW1"), -+ MTK_FUNCTION(2, "PWM_B"), -+ MTK_FUNCTION(3, "I2S5_DO"), -+ MTK_FUNCTION(4, "ANT_SEL7"), -+ MTK_FUNCTION(5, "CMMCLK3"), -+ MTK_FUNCTION(6, "PTA_TXD") -+ ), -+ MTK_PIN( -+ 92, "GPIO92", -+ MTK_EINT_FUNCTION(0, 92), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO92"), -+ MTK_FUNCTION(1, "KPROW0") -+ ), -+ MTK_PIN( -+ 93, "GPIO93", -+ MTK_EINT_FUNCTION(0, 93), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO93"), -+ MTK_FUNCTION(1, "KPCOL0"), -+ MTK_FUNCTION(7, "DBG_MON_B27") -+ ), -+ MTK_PIN( -+ 94, "GPIO94", -+ MTK_EINT_FUNCTION(0, 94), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO94"), -+ MTK_FUNCTION(1, "KPCOL1"), -+ MTK_FUNCTION(2, "I2S2_DI2"), -+ MTK_FUNCTION(3, "I2S5_MCK"), -+ MTK_FUNCTION(4, "CMMCLK2"), -+ MTK_FUNCTION(5, "SCP_SPI2_MI"), -+ MTK_FUNCTION(6, "SRCLKENAI1"), -+ MTK_FUNCTION(7, "SPI2_MI") -+ ), -+ MTK_PIN( -+ 95, "GPIO95", -+ MTK_EINT_FUNCTION(0, 95), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO95"), -+ MTK_FUNCTION(1, "URXD0"), -+ MTK_FUNCTION(2, "UTXD0"), -+ MTK_FUNCTION(3, "MD_URXD0"), -+ MTK_FUNCTION(4, "MD_URXD1"), -+ MTK_FUNCTION(5, "SSPM_URXD_AO"), -+ MTK_FUNCTION(6, "CCU_URXD_AO") -+ ), -+ MTK_PIN( -+ 96, "GPIO96", -+ MTK_EINT_FUNCTION(0, 96), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO96"), -+ MTK_FUNCTION(1, "UTXD0"), -+ MTK_FUNCTION(2, "URXD0"), -+ MTK_FUNCTION(3, "MD_UTXD0"), -+ MTK_FUNCTION(4, "MD_UTXD1"), -+ MTK_FUNCTION(5, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(6, "CCU_UTXD_AO"), -+ MTK_FUNCTION(7, "DBG_MON_B2") -+ ), -+ MTK_PIN( -+ 97, "GPIO97", -+ MTK_EINT_FUNCTION(0, 97), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO97"), -+ MTK_FUNCTION(1, "UCTS0"), -+ MTK_FUNCTION(2, "I2S2_MCK"), -+ MTK_FUNCTION(3, "IDDIG"), -+ MTK_FUNCTION(4, "CONN_MCU_TDO"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TDO"), -+ MTK_FUNCTION(6, "IO_JTAG_TDO"), -+ MTK_FUNCTION(7, "DBG_MON_B3") -+ ), -+ MTK_PIN( -+ 98, "GPIO98", -+ MTK_EINT_FUNCTION(0, 98), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO98"), -+ MTK_FUNCTION(1, "URTS0"), -+ MTK_FUNCTION(2, "I2S2_BCK"), -+ MTK_FUNCTION(3, "USB_DRVVBUS"), -+ MTK_FUNCTION(4, "CONN_MCU_TMS"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TMS"), -+ MTK_FUNCTION(6, "IO_JTAG_TMS"), -+ MTK_FUNCTION(7, "DBG_MON_B4") -+ ), -+ MTK_PIN( -+ 99, "GPIO99", -+ MTK_EINT_FUNCTION(0, 99), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO99"), -+ MTK_FUNCTION(1, "CMMCLK0"), -+ MTK_FUNCTION(4, "CONN_MCU_AICE_TMSC"), -+ MTK_FUNCTION(7, "DBG_MON_B28") -+ ), -+ MTK_PIN( -+ 100, "GPIO100", -+ MTK_EINT_FUNCTION(0, 100), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO100"), -+ MTK_FUNCTION(1, "CMMCLK1"), -+ MTK_FUNCTION(2, "PWM_C"), -+ MTK_FUNCTION(3, "MD_INT1_C2K_UIM0_HOT_PLUG"), -+ MTK_FUNCTION(4, "CONN_MCU_AICE_TCKC"), -+ MTK_FUNCTION(7, "DBG_MON_B29") -+ ), -+ MTK_PIN( -+ 101, "GPIO101", -+ MTK_EINT_FUNCTION(0, 101), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO101"), -+ MTK_FUNCTION(1, "CLKM2"), -+ MTK_FUNCTION(2, "I2S2_LRCK"), -+ MTK_FUNCTION(3, "CMVREF1"), -+ MTK_FUNCTION(4, "CONN_MCU_TCK"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TCK"), -+ MTK_FUNCTION(6, "IO_JTAG_TCK") -+ ), -+ MTK_PIN( -+ 102, "GPIO102", -+ MTK_EINT_FUNCTION(0, 102), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO102"), -+ MTK_FUNCTION(1, "CLKM1"), -+ MTK_FUNCTION(2, "I2S2_DI"), -+ MTK_FUNCTION(3, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(4, "CONN_MCU_TDI"), -+ MTK_FUNCTION(5, "SSPM_JTAG_TDI"), -+ MTK_FUNCTION(6, "IO_JTAG_TDI"), -+ MTK_FUNCTION(7, "DBG_MON_B8") -+ ), -+ MTK_PIN( -+ 103, "GPIO103", -+ MTK_EINT_FUNCTION(0, 103), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO103"), -+ MTK_FUNCTION(1, "SCL2") -+ ), -+ MTK_PIN( -+ 104, "GPIO104", -+ MTK_EINT_FUNCTION(0, 104), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO104"), -+ MTK_FUNCTION(1, "SDA2") -+ ), -+ MTK_PIN( -+ 105, "GPIO105", -+ MTK_EINT_FUNCTION(0, 105), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO105"), -+ MTK_FUNCTION(1, "SCL4") -+ ), -+ MTK_PIN( -+ 106, "GPIO106", -+ MTK_EINT_FUNCTION(0, 106), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO106"), -+ MTK_FUNCTION(1, "SDA4") -+ ), -+ MTK_PIN( -+ 107, "GPIO107", -+ MTK_EINT_FUNCTION(0, 107), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO107"), -+ MTK_FUNCTION(1, "DMIC_CLK"), -+ MTK_FUNCTION(2, "ANT_SEL0"), -+ MTK_FUNCTION(3, "CLKM0"), -+ MTK_FUNCTION(4, "SDA7"), -+ MTK_FUNCTION(5, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(6, "PWM_A"), -+ MTK_FUNCTION(7, "DBG_MON_B12") -+ ), -+ MTK_PIN( -+ 108, "GPIO108", -+ MTK_EINT_FUNCTION(0, 108), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO108"), -+ MTK_FUNCTION(1, "CMMCLK2"), -+ MTK_FUNCTION(2, "ANT_SEL1"), -+ MTK_FUNCTION(3, "CLKM1"), -+ MTK_FUNCTION(4, "SCL8"), -+ MTK_FUNCTION(5, "DAP_MD32_SWD"), -+ MTK_FUNCTION(6, "PWM_B"), -+ MTK_FUNCTION(7, "DBG_MON_B13") -+ ), -+ MTK_PIN( -+ 109, "GPIO109", -+ MTK_EINT_FUNCTION(0, 109), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO109"), -+ MTK_FUNCTION(1, "DMIC_DAT"), -+ MTK_FUNCTION(2, "ANT_SEL2"), -+ MTK_FUNCTION(3, "CLKM2"), -+ MTK_FUNCTION(4, "SDA8"), -+ MTK_FUNCTION(5, "DAP_MD32_SWCK"), -+ MTK_FUNCTION(6, "PWM_C"), -+ MTK_FUNCTION(7, "DBG_MON_B14") -+ ), -+ MTK_PIN( -+ 110, "GPIO110", -+ MTK_EINT_FUNCTION(0, 110), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO110"), -+ MTK_FUNCTION(1, "SCL7"), -+ MTK_FUNCTION(2, "ANT_SEL0"), -+ MTK_FUNCTION(3, "TP_URXD1_AO"), -+ MTK_FUNCTION(4, "USB_DRVVBUS"), -+ MTK_FUNCTION(5, "SRCLKENAI1"), -+ MTK_FUNCTION(6, "KPCOL2"), -+ MTK_FUNCTION(7, "URXD1") -+ ), -+ MTK_PIN( -+ 111, "GPIO111", -+ MTK_EINT_FUNCTION(0, 111), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO111"), -+ MTK_FUNCTION(1, "CMMCLK3"), -+ MTK_FUNCTION(2, "ANT_SEL1"), -+ MTK_FUNCTION(3, "SRCLKENAI0"), -+ MTK_FUNCTION(4, "SCP_VREQ_VAO"), -+ MTK_FUNCTION(5, "MD_INT2_C2K_UIM1_HOT_PLUG"), -+ MTK_FUNCTION(7, "DVFSRC_EXT_REQ") -+ ), -+ MTK_PIN( -+ 112, "GPIO112", -+ MTK_EINT_FUNCTION(0, 112), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO112"), -+ MTK_FUNCTION(1, "SDA7"), -+ MTK_FUNCTION(2, "ANT_SEL2"), -+ MTK_FUNCTION(3, "TP_UTXD1_AO"), -+ MTK_FUNCTION(4, "IDDIG"), -+ MTK_FUNCTION(5, "AGPS_SYNC"), -+ MTK_FUNCTION(6, "KPROW2"), -+ MTK_FUNCTION(7, "UTXD1") -+ ), -+ MTK_PIN( -+ 113, "GPIO113", -+ MTK_EINT_FUNCTION(0, 113), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO113"), -+ MTK_FUNCTION(1, "CONN_TOP_CLK"), -+ MTK_FUNCTION(3, "SCL6"), -+ MTK_FUNCTION(4, "AUXIF_CLK0"), -+ MTK_FUNCTION(6, "TP_UCTS1_AO") -+ ), -+ MTK_PIN( -+ 114, "GPIO114", -+ MTK_EINT_FUNCTION(0, 114), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO114"), -+ MTK_FUNCTION(1, "CONN_TOP_DATA"), -+ MTK_FUNCTION(3, "SDA6"), -+ MTK_FUNCTION(4, "AUXIF_ST0"), -+ MTK_FUNCTION(6, "TP_URTS1_AO") -+ ), -+ MTK_PIN( -+ 115, "GPIO115", -+ MTK_EINT_FUNCTION(0, 115), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO115"), -+ MTK_FUNCTION(1, "CONN_BT_CLK"), -+ MTK_FUNCTION(2, "UTXD1"), -+ MTK_FUNCTION(3, "PTA_TXD"), -+ MTK_FUNCTION(4, "AUXIF_CLK1"), -+ MTK_FUNCTION(5, "DAP_MD32_SWD"), -+ MTK_FUNCTION(6, "TP_UTXD1_AO") -+ ), -+ MTK_PIN( -+ 116, "GPIO116", -+ MTK_EINT_FUNCTION(0, 116), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO116"), -+ MTK_FUNCTION(1, "CONN_BT_DATA"), -+ MTK_FUNCTION(2, "IPU_JTAG_TRST"), -+ MTK_FUNCTION(4, "AUXIF_ST1"), -+ MTK_FUNCTION(5, "DAP_MD32_SWCK"), -+ MTK_FUNCTION(6, "TP_URXD2_AO"), -+ MTK_FUNCTION(7, "DBG_MON_A0") -+ ), -+ MTK_PIN( -+ 117, "GPIO117", -+ MTK_EINT_FUNCTION(0, 117), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO117"), -+ MTK_FUNCTION(1, "CONN_WF_HB0"), -+ MTK_FUNCTION(2, "IPU_JTAG_TDO"), -+ MTK_FUNCTION(6, "TP_UTXD2_AO"), -+ MTK_FUNCTION(7, "DBG_MON_A4") -+ ), -+ MTK_PIN( -+ 118, "GPIO118", -+ MTK_EINT_FUNCTION(0, 118), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO118"), -+ MTK_FUNCTION(1, "CONN_WF_HB1"), -+ MTK_FUNCTION(2, "IPU_JTAG_TDI"), -+ MTK_FUNCTION(5, "SSPM_URXD_AO"), -+ MTK_FUNCTION(6, "TP_UCTS2_AO"), -+ MTK_FUNCTION(7, "DBG_MON_A5") -+ ), -+ MTK_PIN( -+ 119, "GPIO119", -+ MTK_EINT_FUNCTION(0, 119), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO119"), -+ MTK_FUNCTION(1, "CONN_WF_HB2"), -+ MTK_FUNCTION(2, "IPU_JTAG_TCK"), -+ MTK_FUNCTION(5, "SSPM_UTXD_AO"), -+ MTK_FUNCTION(6, "TP_URTS2_AO") -+ ), -+ MTK_PIN( -+ 120, "GPIO120", -+ MTK_EINT_FUNCTION(0, 120), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO120"), -+ MTK_FUNCTION(1, "CONN_WB_PTA"), -+ MTK_FUNCTION(2, "IPU_JTAG_TMS"), -+ MTK_FUNCTION(5, "CCU_URXD_AO") -+ ), -+ MTK_PIN( -+ 121, "GPIO121", -+ MTK_EINT_FUNCTION(0, 121), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO121"), -+ MTK_FUNCTION(1, "CONN_HRST_B"), -+ MTK_FUNCTION(2, "URXD1"), -+ MTK_FUNCTION(3, "PTA_RXD"), -+ MTK_FUNCTION(5, "CCU_UTXD_AO"), -+ MTK_FUNCTION(6, "TP_URXD1_AO") -+ ), -+ MTK_PIN( -+ 122, "GPIO122", -+ MTK_EINT_FUNCTION(0, 122), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO122"), -+ MTK_FUNCTION(1, "MSDC0_CMD"), -+ MTK_FUNCTION(2, "SSPM_URXD2_AO"), -+ MTK_FUNCTION(3, "ANT_SEL1"), -+ MTK_FUNCTION(7, "DBG_MON_A12") -+ ), -+ MTK_PIN( -+ 123, "GPIO123", -+ MTK_EINT_FUNCTION(0, 123), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO123"), -+ MTK_FUNCTION(1, "MSDC0_DAT0"), -+ MTK_FUNCTION(3, "ANT_SEL0"), -+ MTK_FUNCTION(7, "DBG_MON_A13") -+ ), -+ MTK_PIN( -+ 124, "GPIO124", -+ MTK_EINT_FUNCTION(0, 124), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO124"), -+ MTK_FUNCTION(1, "MSDC0_CLK"), -+ MTK_FUNCTION(7, "DBG_MON_A14") -+ ), -+ MTK_PIN( -+ 125, "GPIO125", -+ MTK_EINT_FUNCTION(0, 125), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO125"), -+ MTK_FUNCTION(1, "MSDC0_DAT2"), -+ MTK_FUNCTION(3, "MRG_CLK"), -+ MTK_FUNCTION(7, "DBG_MON_A15") -+ ), -+ MTK_PIN( -+ 126, "GPIO126", -+ MTK_EINT_FUNCTION(0, 126), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO126"), -+ MTK_FUNCTION(1, "MSDC0_DAT4"), -+ MTK_FUNCTION(3, "ANT_SEL5"), -+ MTK_FUNCTION(6, "UFS_MPHY_SCL"), -+ MTK_FUNCTION(7, "DBG_MON_A16") -+ ), -+ MTK_PIN( -+ 127, "GPIO127", -+ MTK_EINT_FUNCTION(0, 127), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO127"), -+ MTK_FUNCTION(1, "MSDC0_DAT6"), -+ MTK_FUNCTION(3, "ANT_SEL4"), -+ MTK_FUNCTION(6, "UFS_MPHY_SDA"), -+ MTK_FUNCTION(7, "DBG_MON_A17") -+ ), -+ MTK_PIN( -+ 128, "GPIO128", -+ MTK_EINT_FUNCTION(0, 128), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO128"), -+ MTK_FUNCTION(1, "MSDC0_DAT1"), -+ MTK_FUNCTION(3, "ANT_SEL2"), -+ MTK_FUNCTION(6, "UFS_UNIPRO_SDA"), -+ MTK_FUNCTION(7, "DBG_MON_A18") -+ ), -+ MTK_PIN( -+ 129, "GPIO129", -+ MTK_EINT_FUNCTION(0, 129), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO129"), -+ MTK_FUNCTION(1, "MSDC0_DAT5"), -+ MTK_FUNCTION(3, "ANT_SEL3"), -+ MTK_FUNCTION(6, "UFS_UNIPRO_SCL"), -+ MTK_FUNCTION(7, "DBG_MON_A23") -+ ), -+ MTK_PIN( -+ 130, "GPIO130", -+ MTK_EINT_FUNCTION(0, 130), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO130"), -+ MTK_FUNCTION(1, "MSDC0_DAT7"), -+ MTK_FUNCTION(3, "MRG_DO"), -+ MTK_FUNCTION(7, "DBG_MON_A24") -+ ), -+ MTK_PIN( -+ 131, "GPIO131", -+ MTK_EINT_FUNCTION(0, 131), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO131"), -+ MTK_FUNCTION(1, "MSDC0_DSL"), -+ MTK_FUNCTION(3, "MRG_SYNC"), -+ MTK_FUNCTION(7, "DBG_MON_A25") -+ ), -+ MTK_PIN( -+ 132, "GPIO132", -+ MTK_EINT_FUNCTION(0, 132), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO132"), -+ MTK_FUNCTION(1, "MSDC0_DAT3"), -+ MTK_FUNCTION(3, "MRG_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A26") -+ ), -+ MTK_PIN( -+ 133, "GPIO133", -+ MTK_EINT_FUNCTION(0, 133), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO133"), -+ MTK_FUNCTION(1, "MSDC0_RSTB"), -+ MTK_FUNCTION(3, "AGPS_SYNC"), -+ MTK_FUNCTION(7, "DBG_MON_A27") -+ ), -+ MTK_PIN( -+ 134, "GPIO134", -+ MTK_EINT_FUNCTION(0, 134), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO134"), -+ MTK_FUNCTION(1, "RTC32K_CK") -+ ), -+ MTK_PIN( -+ 135, "GPIO135", -+ MTK_EINT_FUNCTION(0, 135), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO135"), -+ MTK_FUNCTION(1, "WATCHDOG") -+ ), -+ MTK_PIN( -+ 136, "GPIO136", -+ MTK_EINT_FUNCTION(0, 136), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO136"), -+ MTK_FUNCTION(1, "AUD_CLK_MOSI"), -+ MTK_FUNCTION(2, "AUD_CLK_MISO"), -+ MTK_FUNCTION(3, "I2S1_MCK"), -+ MTK_FUNCTION(6, "UFS_UNIPRO_SCL") -+ ), -+ MTK_PIN( -+ 137, "GPIO137", -+ MTK_EINT_FUNCTION(0, 137), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO137"), -+ MTK_FUNCTION(1, "AUD_SYNC_MOSI"), -+ MTK_FUNCTION(2, "AUD_SYNC_MISO"), -+ MTK_FUNCTION(3, "I2S1_BCK") -+ ), -+ MTK_PIN( -+ 138, "GPIO138", -+ MTK_EINT_FUNCTION(0, 138), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO138"), -+ MTK_FUNCTION(1, "AUD_DAT_MOSI0"), -+ MTK_FUNCTION(2, "AUD_DAT_MISO0"), -+ MTK_FUNCTION(3, "I2S1_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B24") -+ ), -+ MTK_PIN( -+ 139, "GPIO139", -+ MTK_EINT_FUNCTION(0, 139), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO139"), -+ MTK_FUNCTION(1, "AUD_DAT_MOSI1"), -+ MTK_FUNCTION(2, "AUD_DAT_MISO1"), -+ MTK_FUNCTION(3, "I2S1_DO"), -+ MTK_FUNCTION(6, "UFS_MPHY_SDA") -+ ), -+ MTK_PIN( -+ 140, "GPIO140", -+ MTK_EINT_FUNCTION(0, 140), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO140"), -+ MTK_FUNCTION(1, "AUD_CLK_MISO"), -+ MTK_FUNCTION(2, "AUD_CLK_MOSI"), -+ MTK_FUNCTION(3, "I2S0_MCK"), -+ MTK_FUNCTION(6, "UFS_UNIPRO_SDA") -+ ), -+ MTK_PIN( -+ 141, "GPIO141", -+ MTK_EINT_FUNCTION(0, 141), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO141"), -+ MTK_FUNCTION(1, "AUD_SYNC_MISO"), -+ MTK_FUNCTION(2, "AUD_SYNC_MOSI"), -+ MTK_FUNCTION(3, "I2S0_BCK") -+ ), -+ MTK_PIN( -+ 142, "GPIO142", -+ MTK_EINT_FUNCTION(0, 142), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO142"), -+ MTK_FUNCTION(1, "AUD_DAT_MISO0"), -+ MTK_FUNCTION(2, "AUD_DAT_MOSI0"), -+ MTK_FUNCTION(3, "I2S0_LRCK"), -+ MTK_FUNCTION(4, "VOW_DAT_MISO"), -+ MTK_FUNCTION(7, "DBG_MON_B25") -+ ), -+ MTK_PIN( -+ 143, "GPIO143", -+ MTK_EINT_FUNCTION(0, 143), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO143"), -+ MTK_FUNCTION(1, "AUD_DAT_MISO1"), -+ MTK_FUNCTION(2, "AUD_DAT_MOSI1"), -+ MTK_FUNCTION(3, "I2S0_DI"), -+ MTK_FUNCTION(4, "VOW_CLK_MISO"), -+ MTK_FUNCTION(6, "UFS_MPHY_SCL"), -+ MTK_FUNCTION(7, "DBG_MON_B26") -+ ), -+ MTK_PIN( -+ 144, "GPIO144", -+ MTK_EINT_FUNCTION(0, 144), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO144"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MI"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MO") -+ ), -+ MTK_PIN( -+ 145, "GPIO145", -+ MTK_EINT_FUNCTION(0, 145), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO145"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CSN") -+ ), -+ MTK_PIN( -+ 146, "GPIO146", -+ MTK_EINT_FUNCTION(0, 146), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO146"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MO"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MI") -+ ), -+ MTK_PIN( -+ 147, "GPIO147", -+ MTK_EINT_FUNCTION(0, 147), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO147"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CK") -+ ), -+ MTK_PIN( -+ 148, "GPIO148", -+ MTK_EINT_FUNCTION(0, 148), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO148"), -+ MTK_FUNCTION(1, "SRCLKENA0") -+ ), -+ MTK_PIN( -+ 149, "GPIO149", -+ MTK_EINT_FUNCTION(0, 149), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO149"), -+ MTK_FUNCTION(1, "SRCLKENA1") -+ ), -+ MTK_PIN( -+ 150, "GPIO150", -+ MTK_EINT_FUNCTION(0, 150), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO150"), -+ MTK_FUNCTION(1, "PWM_A"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "CLKM0"), -+ MTK_FUNCTION(7, "DBG_MON_B30") -+ ), -+ MTK_PIN( -+ 151, "GPIO151", -+ MTK_EINT_FUNCTION(0, 151), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO151"), -+ MTK_FUNCTION(1, "PWM_B"), -+ MTK_FUNCTION(2, "CMVREF0"), -+ MTK_FUNCTION(3, "CLKM1"), -+ MTK_FUNCTION(7, "DBG_MON_B20") -+ ), -+ MTK_PIN( -+ 152, "GPIO152", -+ MTK_EINT_FUNCTION(0, 152), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO152"), -+ MTK_FUNCTION(1, "PWM_C"), -+ MTK_FUNCTION(2, "CMFLASH"), -+ MTK_FUNCTION(3, "CLKM2"), -+ MTK_FUNCTION(7, "DBG_MON_B21") -+ ), -+ MTK_PIN( -+ 153, "GPIO153", -+ MTK_EINT_FUNCTION(0, 153), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO153"), -+ MTK_FUNCTION(1, "PWM_A"), -+ MTK_FUNCTION(2, "CMVREF0"), -+ MTK_FUNCTION(3, "CLKM3"), -+ MTK_FUNCTION(7, "DBG_MON_B22") -+ ), -+ MTK_PIN( -+ 154, "GPIO154", -+ MTK_EINT_FUNCTION(0, 154), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO154"), -+ MTK_FUNCTION(1, "SCP_VREQ_VAO"), -+ MTK_FUNCTION(2, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(7, "DBG_MON_B18") -+ ), -+ MTK_PIN( -+ 155, "GPIO155", -+ MTK_EINT_FUNCTION(0, 155), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO155"), -+ MTK_FUNCTION(1, "ANT_SEL0"), -+ MTK_FUNCTION(2, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(3, "CMVREF1"), -+ MTK_FUNCTION(7, "SCP_JTAG_TDI") -+ ), -+ MTK_PIN( -+ 156, "GPIO156", -+ MTK_EINT_FUNCTION(0, 156), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO156"), -+ MTK_FUNCTION(1, "ANT_SEL1"), -+ MTK_FUNCTION(2, "SRCLKENAI0"), -+ MTK_FUNCTION(3, "SCL6"), -+ MTK_FUNCTION(4, "KPCOL2"), -+ MTK_FUNCTION(5, "IDDIG"), -+ MTK_FUNCTION(7, "SCP_JTAG_TCK") -+ ), -+ MTK_PIN( -+ 157, "GPIO157", -+ MTK_EINT_FUNCTION(0, 157), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO157"), -+ MTK_FUNCTION(1, "ANT_SEL2"), -+ MTK_FUNCTION(2, "SRCLKENAI1"), -+ MTK_FUNCTION(3, "SDA6"), -+ MTK_FUNCTION(4, "KPROW2"), -+ MTK_FUNCTION(5, "USB_DRVVBUS"), -+ MTK_FUNCTION(7, "SCP_JTAG_TRSTN") -+ ), -+ MTK_PIN( -+ 158, "GPIO158", -+ MTK_EINT_FUNCTION(0, 158), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO158"), -+ MTK_FUNCTION(1, "ANT_SEL3") -+ ), -+ MTK_PIN( -+ 159, "GPIO159", -+ MTK_EINT_FUNCTION(0, 159), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO159"), -+ MTK_FUNCTION(1, "ANT_SEL4") -+ ), -+ MTK_PIN( -+ 160, "GPIO160", -+ MTK_EINT_FUNCTION(0, 160), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO160"), -+ MTK_FUNCTION(1, "ANT_SEL5") -+ ), -+ MTK_PIN( -+ 161, "GPIO161", -+ MTK_EINT_FUNCTION(0, 161), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO161"), -+ MTK_FUNCTION(1, "SPI1_A_MI"), -+ MTK_FUNCTION(2, "SCP_SPI1_MI"), -+ MTK_FUNCTION(3, "IDDIG"), -+ MTK_FUNCTION(4, "ANT_SEL6"), -+ MTK_FUNCTION(5, "KPCOL2"), -+ MTK_FUNCTION(6, "PTA_RXD"), -+ MTK_FUNCTION(7, "DBG_MON_B19") -+ ), -+ MTK_PIN( -+ 162, "GPIO162", -+ MTK_EINT_FUNCTION(0, 162), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO162"), -+ MTK_FUNCTION(1, "SPI1_A_CSB"), -+ MTK_FUNCTION(2, "SCP_SPI1_CS"), -+ MTK_FUNCTION(3, "USB_DRVVBUS"), -+ MTK_FUNCTION(4, "ANT_SEL5"), -+ MTK_FUNCTION(5, "KPROW2"), -+ MTK_FUNCTION(6, "PTA_TXD") -+ ), -+ MTK_PIN( -+ 163, "GPIO163", -+ MTK_EINT_FUNCTION(0, 163), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO163"), -+ MTK_FUNCTION(1, "SPI1_A_MO"), -+ MTK_FUNCTION(2, "SCP_SPI1_MO"), -+ MTK_FUNCTION(3, "SDA1"), -+ MTK_FUNCTION(4, "ANT_SEL4"), -+ MTK_FUNCTION(5, "CMMCLK2"), -+ MTK_FUNCTION(6, "DMIC_CLK") -+ ), -+ MTK_PIN( -+ 164, "GPIO164", -+ MTK_EINT_FUNCTION(0, 164), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO164"), -+ MTK_FUNCTION(1, "SPI1_A_CLK"), -+ MTK_FUNCTION(2, "SCP_SPI1_CK"), -+ MTK_FUNCTION(3, "SCL1"), -+ MTK_FUNCTION(4, "ANT_SEL3"), -+ MTK_FUNCTION(5, "CMMCLK3"), -+ MTK_FUNCTION(6, "DMIC_DAT") -+ ), -+ MTK_PIN( -+ 165, "GPIO165", -+ MTK_EINT_FUNCTION(0, 165), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO165"), -+ MTK_FUNCTION(1, "PWM_B"), -+ MTK_FUNCTION(2, "CMMCLK2"), -+ MTK_FUNCTION(3, "SCP_VREQ_VAO"), -+ MTK_FUNCTION(6, "TDM_MCK_2ND"), -+ MTK_FUNCTION(7, "SCP_JTAG_TDO") -+ ), -+ MTK_PIN( -+ 166, "GPIO166", -+ MTK_EINT_FUNCTION(0, 166), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO166"), -+ MTK_FUNCTION(1, "ANT_SEL6") -+ ), -+ MTK_PIN( -+ 167, "GPIO167", -+ MTK_EINT_FUNCTION(0, 167), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO167"), -+ MTK_FUNCTION(1, "RFIC0_BSI_EN"), -+ MTK_FUNCTION(2, "SPM_BSI_EN") -+ ), -+ MTK_PIN( -+ 168, "GPIO168", -+ MTK_EINT_FUNCTION(0, 168), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO168"), -+ MTK_FUNCTION(1, "RFIC0_BSI_CK"), -+ MTK_FUNCTION(2, "SPM_BSI_CK") -+ ), -+ MTK_PIN( -+ 169, "GPIO169", -+ MTK_EINT_FUNCTION(0, 169), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO169"), -+ MTK_FUNCTION(1, "PWM_C"), -+ MTK_FUNCTION(2, "CMMCLK3"), -+ MTK_FUNCTION(3, "CMVREF1"), -+ MTK_FUNCTION(4, "ANT_SEL7"), -+ MTK_FUNCTION(5, "AGPS_SYNC"), -+ MTK_FUNCTION(6, "TDM_BCK_2ND"), -+ MTK_FUNCTION(7, "SCP_JTAG_TMS") -+ ), -+ MTK_PIN( -+ 170, "GPIO170", -+ MTK_EINT_FUNCTION(0, 170), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO170"), -+ MTK_FUNCTION(1, "I2S1_BCK"), -+ MTK_FUNCTION(2, "I2S3_BCK"), -+ MTK_FUNCTION(3, "SCL7"), -+ MTK_FUNCTION(4, "I2S5_BCK"), -+ MTK_FUNCTION(5, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(6, "TDM_LRCK_2ND"), -+ MTK_FUNCTION(7, "ANT_SEL3") -+ ), -+ MTK_PIN( -+ 171, "GPIO171", -+ MTK_EINT_FUNCTION(0, 184), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO171"), -+ MTK_FUNCTION(1, "I2S1_LRCK"), -+ MTK_FUNCTION(2, "I2S3_LRCK"), -+ MTK_FUNCTION(3, "SDA7"), -+ MTK_FUNCTION(4, "I2S5_LRCK"), -+ MTK_FUNCTION(5, "URXD1"), -+ MTK_FUNCTION(6, "TDM_DATA0_2ND"), -+ MTK_FUNCTION(7, "ANT_SEL4") -+ ), -+ MTK_PIN( -+ 172, "GPIO172", -+ MTK_EINT_FUNCTION(0, 185), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO172"), -+ MTK_FUNCTION(1, "I2S1_DO"), -+ MTK_FUNCTION(2, "I2S3_DO"), -+ MTK_FUNCTION(3, "SCL8"), -+ MTK_FUNCTION(4, "I2S5_DO"), -+ MTK_FUNCTION(5, "UTXD1"), -+ MTK_FUNCTION(6, "TDM_DATA1_2ND"), -+ MTK_FUNCTION(7, "ANT_SEL5") -+ ), -+ MTK_PIN( -+ 173, "GPIO173", -+ MTK_EINT_FUNCTION(0, 186), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO173"), -+ MTK_FUNCTION(1, "I2S1_MCK"), -+ MTK_FUNCTION(2, "I2S3_MCK"), -+ MTK_FUNCTION(3, "SDA8"), -+ MTK_FUNCTION(4, "I2S5_MCK"), -+ MTK_FUNCTION(5, "UCTS0"), -+ MTK_FUNCTION(6, "TDM_DATA2_2ND"), -+ MTK_FUNCTION(7, "ANT_SEL6") -+ ), -+ MTK_PIN( -+ 174, "GPIO174", -+ MTK_EINT_FUNCTION(0, 187), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO174"), -+ MTK_FUNCTION(1, "I2S2_DI"), -+ MTK_FUNCTION(2, "I2S0_DI"), -+ MTK_FUNCTION(3, "DVFSRC_EXT_REQ"), -+ MTK_FUNCTION(4, "I2S2_DI2"), -+ MTK_FUNCTION(5, "URTS0"), -+ MTK_FUNCTION(6, "TDM_DATA3_2ND"), -+ MTK_FUNCTION(7, "ANT_SEL7") -+ ), -+ MTK_PIN( -+ 175, "GPIO175", -+ MTK_EINT_FUNCTION(0, 188), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO175"), -+ MTK_FUNCTION(1, "ANT_SEL7") -+ ), -+ MTK_PIN( -+ 176, "GPIO176", -+ MTK_EINT_FUNCTION(0, 189), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO176") -+ ), -+ MTK_PIN( -+ 177, "GPIO177", -+ MTK_EINT_FUNCTION(0, 190), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO177") -+ ), -+ MTK_PIN( -+ 178, "GPIO178", -+ MTK_EINT_FUNCTION(0, 191), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO178") -+ ), -+ MTK_PIN( -+ 179, "GPIO179", -+ MTK_EINT_FUNCTION(0, 192), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO179") -+ ), -+ MTK_PIN( -+ 180, "GPIO180", -+ MTK_EINT_FUNCTION(0, 171), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO180") -+ ), -+ MTK_PIN( -+ 181, "GPIO181", -+ MTK_EINT_FUNCTION(0, 172), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO181") -+ ), -+ MTK_PIN( -+ 182, "GPIO182", -+ MTK_EINT_FUNCTION(0, 173), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO182") -+ ), -+ MTK_PIN( -+ 183, "GPIO183", -+ MTK_EINT_FUNCTION(0, 174), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO183") -+ ), -+ MTK_PIN( -+ 184, "GPIO184", -+ MTK_EINT_FUNCTION(0, 175), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO184") -+ ), -+ MTK_PIN( -+ 185, "GPIO185", -+ MTK_EINT_FUNCTION(0, 177), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO185") -+ ), -+ MTK_PIN( -+ 186, "GPIO186", -+ MTK_EINT_FUNCTION(0, 178), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO186") -+ ), -+ MTK_PIN( -+ 187, "GPIO187", -+ MTK_EINT_FUNCTION(0, 179), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO187") -+ ), -+ MTK_PIN( -+ 188, "GPIO188", -+ MTK_EINT_FUNCTION(0, 180), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO188") -+ ), -+ MTK_PIN( -+ 189, "GPIO189", -+ MTK_EINT_FUNCTION(0, 181), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO189") -+ ), -+ MTK_PIN( -+ 190, "GPIO190", -+ MTK_EINT_FUNCTION(0, 182), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO190") -+ ), -+ MTK_PIN( -+ 191, "GPIO191", -+ MTK_EINT_FUNCTION(0, 183), -+ DRV_GRP4, -+ MTK_FUNCTION(0, "GPIO191") -+ ), -+}; -+ -+#endif /* __PINCTRL_MTK_MT8183_H */ ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8516.h -@@ -0,0 +1,1182 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2019 MediaTek Inc. -+ */ -+#ifndef __PINCTRL_MTK_MT8516_H -+#define __PINCTRL_MTK_MT8516_H -+ -+#include -+#include "pinctrl-mtk-common.h" -+ -+static const struct mtk_desc_pin mtk_pins_mt8516[] = { -+ MTK_PIN( -+ PINCTRL_PIN(0, "EINT0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 0), -+ MTK_FUNCTION(0, "GPIO0"), -+ MTK_FUNCTION(1, "PWM_B"), -+ MTK_FUNCTION(3, "I2S2_BCK"), -+ MTK_FUNCTION(4, "EXT_TXD0"), -+ MTK_FUNCTION(6, "SQICS"), -+ MTK_FUNCTION(7, "DBG_MON_A[6]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(1, "EINT1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 1), -+ MTK_FUNCTION(0, "GPIO1"), -+ MTK_FUNCTION(1, "PWM_C"), -+ MTK_FUNCTION(3, "I2S2_DI"), -+ MTK_FUNCTION(4, "EXT_TXD1"), -+ MTK_FUNCTION(5, "CONN_MCU_TDO"), -+ MTK_FUNCTION(6, "SQISO"), -+ MTK_FUNCTION(7, "DBG_MON_A[7]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(2, "EINT2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 2), -+ MTK_FUNCTION(0, "GPIO2"), -+ MTK_FUNCTION(1, "CLKM0"), -+ MTK_FUNCTION(3, "I2S2_LRCK"), -+ MTK_FUNCTION(4, "EXT_TXD2"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGACK_N"), -+ MTK_FUNCTION(6, "SQISI"), -+ MTK_FUNCTION(7, "DBG_MON_A[8]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(3, "EINT3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 3), -+ MTK_FUNCTION(0, "GPIO3"), -+ MTK_FUNCTION(1, "CLKM1"), -+ MTK_FUNCTION(3, "SPI_MI"), -+ MTK_FUNCTION(4, "EXT_TXD3"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGI_N"), -+ MTK_FUNCTION(6, "SQIWP"), -+ MTK_FUNCTION(7, "DBG_MON_A[9]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(4, "EINT4"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 4), -+ MTK_FUNCTION(0, "GPIO4"), -+ MTK_FUNCTION(1, "CLKM2"), -+ MTK_FUNCTION(3, "SPI_MO"), -+ MTK_FUNCTION(4, "EXT_TXC"), -+ MTK_FUNCTION(5, "CONN_MCU_TCK"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_JCKC"), -+ MTK_FUNCTION(7, "DBG_MON_A[10]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(5, "EINT5"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 5), -+ MTK_FUNCTION(0, "GPIO5"), -+ MTK_FUNCTION(1, "UCTS2"), -+ MTK_FUNCTION(3, "SPI_CSB"), -+ MTK_FUNCTION(4, "EXT_RXER"), -+ MTK_FUNCTION(5, "CONN_MCU_TDI"), -+ MTK_FUNCTION(6, "CONN_TEST_CK"), -+ MTK_FUNCTION(7, "DBG_MON_A[11]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(6, "EINT6"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 6), -+ MTK_FUNCTION(0, "GPIO6"), -+ MTK_FUNCTION(1, "URTS2"), -+ MTK_FUNCTION(3, "SPI_CLK"), -+ MTK_FUNCTION(4, "EXT_RXC"), -+ MTK_FUNCTION(5, "CONN_MCU_TRST_B"), -+ MTK_FUNCTION(7, "DBG_MON_A[12]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(7, "EINT7"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 7), -+ MTK_FUNCTION(0, "GPIO7"), -+ MTK_FUNCTION(1, "SQIRST"), -+ MTK_FUNCTION(3, "SDA1_0"), -+ MTK_FUNCTION(4, "EXT_RXDV"), -+ MTK_FUNCTION(5, "CONN_MCU_TMS"), -+ MTK_FUNCTION(6, "CONN_MCU_AICE_JMSC"), -+ MTK_FUNCTION(7, "DBG_MON_A[13]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(8, "EINT8"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 8), -+ MTK_FUNCTION(0, "GPIO8"), -+ MTK_FUNCTION(1, "SQICK"), -+ MTK_FUNCTION(2, "CLKM3"), -+ MTK_FUNCTION(3, "SCL1_0"), -+ MTK_FUNCTION(4, "EXT_RXD0"), -+ MTK_FUNCTION(5, "ANT_SEL0"), -+ MTK_FUNCTION(7, "DBG_MON_A[14]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(9, "EINT9"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 9), -+ MTK_FUNCTION(0, "GPIO9"), -+ MTK_FUNCTION(1, "CLKM4"), -+ MTK_FUNCTION(2, "SDA2_0"), -+ MTK_FUNCTION(3, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(4, "EXT_RXD1"), -+ MTK_FUNCTION(5, "ANT_SEL1"), -+ MTK_FUNCTION(7, "DBG_MON_A[15]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(10, "EINT10"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 10), -+ MTK_FUNCTION(0, "GPIO10"), -+ MTK_FUNCTION(1, "CLKM5"), -+ MTK_FUNCTION(2, "SCL2_0"), -+ MTK_FUNCTION(3, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(4, "EXT_RXD2"), -+ MTK_FUNCTION(5, "ANT_SEL2"), -+ MTK_FUNCTION(7, "DBG_MON_A[16]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(11, "EINT11"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 11), -+ MTK_FUNCTION(0, "GPIO11"), -+ MTK_FUNCTION(1, "CLKM4"), -+ MTK_FUNCTION(2, "PWM_C"), -+ MTK_FUNCTION(3, "CONN_TEST_CK"), -+ MTK_FUNCTION(4, "ANT_SEL3"), -+ MTK_FUNCTION(6, "EXT_RXD3"), -+ MTK_FUNCTION(7, "DBG_MON_A[17]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(12, "EINT12"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 12), -+ MTK_FUNCTION(0, "GPIO12"), -+ MTK_FUNCTION(1, "CLKM5"), -+ MTK_FUNCTION(2, "PWM_A"), -+ MTK_FUNCTION(3, "SPDIF_OUT"), -+ MTK_FUNCTION(4, "ANT_SEL4"), -+ MTK_FUNCTION(6, "EXT_TXEN"), -+ MTK_FUNCTION(7, "DBG_MON_A[18]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(13, "EINT13"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 13), -+ MTK_FUNCTION(0, "GPIO13"), -+ MTK_FUNCTION(3, "TSF_IN"), -+ MTK_FUNCTION(4, "ANT_SEL5"), -+ MTK_FUNCTION(6, "SPDIF_IN"), -+ MTK_FUNCTION(7, "DBG_MON_A[19]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(14, "EINT14"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 14), -+ MTK_FUNCTION(0, "GPIO14"), -+ MTK_FUNCTION(2, "I2S_8CH_DO1"), -+ MTK_FUNCTION(3, "TDM_RX_MCK"), -+ MTK_FUNCTION(4, "ANT_SEL1"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGACK_N"), -+ MTK_FUNCTION(6, "NCLE"), -+ MTK_FUNCTION(7, "DBG_MON_B[8]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(15, "EINT15"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 15), -+ MTK_FUNCTION(0, "GPIO15"), -+ MTK_FUNCTION(2, "I2S_8CH_LRCK"), -+ MTK_FUNCTION(3, "TDM_RX_BCK"), -+ MTK_FUNCTION(4, "ANT_SEL2"), -+ MTK_FUNCTION(5, "CONN_MCU_DBGI_N"), -+ MTK_FUNCTION(6, "NCEB1"), -+ MTK_FUNCTION(7, "DBG_MON_B[9]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(16, "EINT16"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 16), -+ MTK_FUNCTION(0, "GPIO16"), -+ MTK_FUNCTION(2, "I2S_8CH_BCK"), -+ MTK_FUNCTION(3, "TDM_RX_LRCK"), -+ MTK_FUNCTION(4, "ANT_SEL3"), -+ MTK_FUNCTION(5, "CONN_MCU_TRST_B"), -+ MTK_FUNCTION(6, "NCEB0"), -+ MTK_FUNCTION(7, "DBG_MON_B[10]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(17, "EINT17"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 17), -+ MTK_FUNCTION(0, "GPIO17"), -+ MTK_FUNCTION(2, "I2S_8CH_MCK"), -+ MTK_FUNCTION(3, "TDM_RX_DI"), -+ MTK_FUNCTION(4, "IDDIG"), -+ MTK_FUNCTION(5, "ANT_SEL4"), -+ MTK_FUNCTION(6, "NREB"), -+ MTK_FUNCTION(7, "DBG_MON_B[11]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(18, "EINT18"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 18), -+ MTK_FUNCTION(0, "GPIO18"), -+ MTK_FUNCTION(2, "USB_DRVVBUS"), -+ MTK_FUNCTION(3, "I2S3_LRCK"), -+ MTK_FUNCTION(4, "CLKM1"), -+ MTK_FUNCTION(5, "ANT_SEL3"), -+ MTK_FUNCTION(6, "I2S2_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[20]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(19, "EINT19"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 19), -+ MTK_FUNCTION(0, "GPIO19"), -+ MTK_FUNCTION(1, "UCTS1"), -+ MTK_FUNCTION(2, "IDDIG"), -+ MTK_FUNCTION(3, "I2S3_BCK"), -+ MTK_FUNCTION(4, "CLKM2"), -+ MTK_FUNCTION(5, "ANT_SEL4"), -+ MTK_FUNCTION(6, "I2S2_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A[21]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(20, "EINT20"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 20), -+ MTK_FUNCTION(0, "GPIO20"), -+ MTK_FUNCTION(1, "URTS1"), -+ MTK_FUNCTION(3, "I2S3_DO"), -+ MTK_FUNCTION(4, "CLKM3"), -+ MTK_FUNCTION(5, "ANT_SEL5"), -+ MTK_FUNCTION(6, "I2S2_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[22]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(21, "EINT21"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 21), -+ MTK_FUNCTION(0, "GPIO21"), -+ MTK_FUNCTION(1, "NRNB"), -+ MTK_FUNCTION(2, "ANT_SEL0"), -+ MTK_FUNCTION(3, "I2S_8CH_DO4"), -+ MTK_FUNCTION(7, "DBG_MON_B[31]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(22, "EINT22"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 22), -+ MTK_FUNCTION(0, "GPIO22"), -+ MTK_FUNCTION(2, "I2S_8CH_DO2"), -+ MTK_FUNCTION(3, "TSF_IN"), -+ MTK_FUNCTION(4, "USB_DRVVBUS"), -+ MTK_FUNCTION(5, "SPDIF_OUT"), -+ MTK_FUNCTION(6, "NRE_C"), -+ MTK_FUNCTION(7, "DBG_MON_B[12]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(23, "EINT23"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 23), -+ MTK_FUNCTION(0, "GPIO23"), -+ MTK_FUNCTION(2, "I2S_8CH_DO3"), -+ MTK_FUNCTION(3, "CLKM0"), -+ MTK_FUNCTION(4, "IR"), -+ MTK_FUNCTION(5, "SPDIF_IN"), -+ MTK_FUNCTION(6, "NDQS_C"), -+ MTK_FUNCTION(7, "DBG_MON_B[13]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(24, "EINT24"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 24), -+ MTK_FUNCTION(0, "GPIO24"), -+ MTK_FUNCTION(3, "ANT_SEL1"), -+ MTK_FUNCTION(4, "UCTS2"), -+ MTK_FUNCTION(5, "PWM_A"), -+ MTK_FUNCTION(6, "I2S0_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[0]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(25, "EINT25"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 25), -+ MTK_FUNCTION(0, "GPIO25"), -+ MTK_FUNCTION(3, "ANT_SEL0"), -+ MTK_FUNCTION(4, "URTS2"), -+ MTK_FUNCTION(5, "PWM_B"), -+ MTK_FUNCTION(6, "I2S_8CH_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[1]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(26, "PWRAP_SPI0_MI"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 26), -+ MTK_FUNCTION(0, "GPIO26"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MO"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MI") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(27, "PWRAP_SPI0_MO"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 27), -+ MTK_FUNCTION(0, "GPIO27"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_MI"), -+ MTK_FUNCTION(2, "PWRAP_SPI0_MO") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(28, "PWRAP_INT"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 28), -+ MTK_FUNCTION(0, "GPIO28"), -+ MTK_FUNCTION(1, "I2S0_MCK"), -+ MTK_FUNCTION(4, "I2S_8CH_MCK"), -+ MTK_FUNCTION(5, "I2S2_MCK"), -+ MTK_FUNCTION(6, "I2S3_MCK") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(29, "PWRAP_SPI0_CK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 29), -+ MTK_FUNCTION(0, "GPIO29"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CK") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(30, "PWRAP_SPI0_CSN"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 30), -+ MTK_FUNCTION(0, "GPIO30"), -+ MTK_FUNCTION(1, "PWRAP_SPI0_CSN") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(31, "RTC32K_CK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 31), -+ MTK_FUNCTION(0, "GPIO31"), -+ MTK_FUNCTION(1, "RTC32K_CK") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(32, "WATCHDOG"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 32), -+ MTK_FUNCTION(0, "GPIO32"), -+ MTK_FUNCTION(1, "WATCHDOG") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(33, "SRCLKENA"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 33), -+ MTK_FUNCTION(0, "GPIO33"), -+ MTK_FUNCTION(1, "SRCLKENA0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(34, "URXD2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 34), -+ MTK_FUNCTION(0, "GPIO34"), -+ MTK_FUNCTION(1, "URXD2"), -+ MTK_FUNCTION(3, "UTXD2"), -+ MTK_FUNCTION(4, "DBG_SCL"), -+ MTK_FUNCTION(6, "I2S2_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[0]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(35, "UTXD2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 35), -+ MTK_FUNCTION(0, "GPIO35"), -+ MTK_FUNCTION(1, "UTXD2"), -+ MTK_FUNCTION(3, "URXD2"), -+ MTK_FUNCTION(4, "DBG_SDA"), -+ MTK_FUNCTION(6, "I2S3_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[1]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(36, "MRG_CLK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 36), -+ MTK_FUNCTION(0, "GPIO36"), -+ MTK_FUNCTION(1, "MRG_CLK"), -+ MTK_FUNCTION(3, "I2S0_BCK"), -+ MTK_FUNCTION(4, "I2S3_BCK"), -+ MTK_FUNCTION(5, "PCM0_CLK"), -+ MTK_FUNCTION(6, "IR"), -+ MTK_FUNCTION(7, "DBG_MON_A[2]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(37, "MRG_SYNC"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 37), -+ MTK_FUNCTION(0, "GPIO37"), -+ MTK_FUNCTION(1, "MRG_SYNC"), -+ MTK_FUNCTION(3, "I2S0_LRCK"), -+ MTK_FUNCTION(4, "I2S3_LRCK"), -+ MTK_FUNCTION(5, "PCM0_SYNC"), -+ MTK_FUNCTION(6, "EXT_COL"), -+ MTK_FUNCTION(7, "DBG_MON_A[3]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(38, "MRG_DI"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 38), -+ MTK_FUNCTION(0, "GPIO38"), -+ MTK_FUNCTION(1, "MRG_DI"), -+ MTK_FUNCTION(3, "I2S0_DI"), -+ MTK_FUNCTION(4, "I2S3_DO"), -+ MTK_FUNCTION(5, "PCM0_DI"), -+ MTK_FUNCTION(6, "EXT_MDIO"), -+ MTK_FUNCTION(7, "DBG_MON_A[4]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(39, "MRG_DO"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 39), -+ MTK_FUNCTION(0, "GPIO39"), -+ MTK_FUNCTION(1, "MRG_DO"), -+ MTK_FUNCTION(3, "I2S0_MCK"), -+ MTK_FUNCTION(4, "I2S3_MCK"), -+ MTK_FUNCTION(5, "PCM0_DO"), -+ MTK_FUNCTION(6, "EXT_MDC"), -+ MTK_FUNCTION(7, "DBG_MON_A[5]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(40, "KPROW0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 40), -+ MTK_FUNCTION(0, "GPIO40"), -+ MTK_FUNCTION(1, "KPROW0"), -+ MTK_FUNCTION(7, "DBG_MON_B[4]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(41, "KPROW1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 41), -+ MTK_FUNCTION(0, "GPIO41"), -+ MTK_FUNCTION(1, "KPROW1"), -+ MTK_FUNCTION(2, "IDDIG"), -+ MTK_FUNCTION(3, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(7, "DBG_MON_B[5]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(42, "KPCOL0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 42), -+ MTK_FUNCTION(0, "GPIO42"), -+ MTK_FUNCTION(1, "KPCOL0"), -+ MTK_FUNCTION(7, "DBG_MON_B[6]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(43, "KPCOL1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 43), -+ MTK_FUNCTION(0, "GPIO43"), -+ MTK_FUNCTION(1, "KPCOL1"), -+ MTK_FUNCTION(2, "USB_DRVVBUS"), -+ MTK_FUNCTION(3, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(4, "TSF_IN"), -+ MTK_FUNCTION(7, "DBG_MON_B[7]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(44, "JTMS"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 44), -+ MTK_FUNCTION(0, "GPIO44"), -+ MTK_FUNCTION(1, "JTMS"), -+ MTK_FUNCTION(2, "CONN_MCU_TMS"), -+ MTK_FUNCTION(3, "CONN_MCU_AICE_JMSC") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(45, "JTCK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 45), -+ MTK_FUNCTION(0, "GPIO45"), -+ MTK_FUNCTION(1, "JTCK"), -+ MTK_FUNCTION(2, "CONN_MCU_TCK"), -+ MTK_FUNCTION(3, "CONN_MCU_AICE_JCKC") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(46, "JTDI"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 46), -+ MTK_FUNCTION(0, "GPIO46"), -+ MTK_FUNCTION(1, "JTDI"), -+ MTK_FUNCTION(2, "CONN_MCU_TDI") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(47, "JTDO"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 47), -+ MTK_FUNCTION(0, "GPIO47"), -+ MTK_FUNCTION(1, "JTDO"), -+ MTK_FUNCTION(2, "CONN_MCU_TDO") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(48, "SPI_CS"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 48), -+ MTK_FUNCTION(0, "GPIO48"), -+ MTK_FUNCTION(1, "SPI_CSB"), -+ MTK_FUNCTION(3, "I2S0_DI"), -+ MTK_FUNCTION(4, "I2S2_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[23]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(49, "SPI_CK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 49), -+ MTK_FUNCTION(0, "GPIO49"), -+ MTK_FUNCTION(1, "SPI_CLK"), -+ MTK_FUNCTION(3, "I2S0_LRCK"), -+ MTK_FUNCTION(4, "I2S2_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A[24]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(50, "SPI_MI"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 50), -+ MTK_FUNCTION(0, "GPIO50"), -+ MTK_FUNCTION(1, "SPI_MI"), -+ MTK_FUNCTION(2, "SPI_MO"), -+ MTK_FUNCTION(3, "I2S0_BCK"), -+ MTK_FUNCTION(4, "I2S2_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[25]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(51, "SPI_MO"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 51), -+ MTK_FUNCTION(0, "GPIO51"), -+ MTK_FUNCTION(1, "SPI_MO"), -+ MTK_FUNCTION(2, "SPI_MI"), -+ MTK_FUNCTION(3, "I2S0_MCK"), -+ MTK_FUNCTION(4, "I2S2_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[26]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(52, "SDA1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 52), -+ MTK_FUNCTION(0, "GPIO52"), -+ MTK_FUNCTION(1, "SDA1_0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(53, "SCL1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 53), -+ MTK_FUNCTION(0, "GPIO53"), -+ MTK_FUNCTION(1, "SCL1_0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(54, "GPIO54"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 54), -+ MTK_FUNCTION(0, "GPIO54"), -+ MTK_FUNCTION(2, "PWM_B"), -+ MTK_FUNCTION(7, "DBG_MON_B[2]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(55, "I2S_DATA_IN"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 55), -+ MTK_FUNCTION(0, "GPIO55"), -+ MTK_FUNCTION(1, "I2S0_DI"), -+ MTK_FUNCTION(2, "UCTS0"), -+ MTK_FUNCTION(3, "I2S3_DO"), -+ MTK_FUNCTION(4, "I2S_8CH_DO1"), -+ MTK_FUNCTION(5, "PWM_A"), -+ MTK_FUNCTION(6, "I2S2_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[28]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(56, "I2S_LRCK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 56), -+ MTK_FUNCTION(0, "GPIO56"), -+ MTK_FUNCTION(1, "I2S0_LRCK"), -+ MTK_FUNCTION(3, "I2S3_LRCK"), -+ MTK_FUNCTION(4, "I2S_8CH_LRCK"), -+ MTK_FUNCTION(5, "PWM_B"), -+ MTK_FUNCTION(6, "I2S2_DI"), -+ MTK_FUNCTION(7, "DBG_MON_A[29]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(57, "I2S_BCK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 57), -+ MTK_FUNCTION(0, "GPIO57"), -+ MTK_FUNCTION(1, "I2S0_BCK"), -+ MTK_FUNCTION(2, "URTS0"), -+ MTK_FUNCTION(3, "I2S3_BCK"), -+ MTK_FUNCTION(4, "I2S_8CH_BCK"), -+ MTK_FUNCTION(5, "PWM_C"), -+ MTK_FUNCTION(6, "I2S2_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_A[30]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(58, "SDA0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 58), -+ MTK_FUNCTION(0, "GPIO58"), -+ MTK_FUNCTION(1, "SDA0_0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(59, "SCL0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 59), -+ MTK_FUNCTION(0, "GPIO59"), -+ MTK_FUNCTION(1, "SCL0_0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(60, "SDA2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 60), -+ MTK_FUNCTION(0, "GPIO60"), -+ MTK_FUNCTION(1, "SDA2_0"), -+ MTK_FUNCTION(2, "PWM_B") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(61, "SCL2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 61), -+ MTK_FUNCTION(0, "GPIO61"), -+ MTK_FUNCTION(1, "SCL2_0"), -+ MTK_FUNCTION(2, "PWM_C") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(62, "URXD0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 62), -+ MTK_FUNCTION(0, "GPIO62"), -+ MTK_FUNCTION(1, "URXD0"), -+ MTK_FUNCTION(2, "UTXD0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(63, "UTXD0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 63), -+ MTK_FUNCTION(0, "GPIO63"), -+ MTK_FUNCTION(1, "UTXD0"), -+ MTK_FUNCTION(2, "URXD0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(64, "URXD1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 64), -+ MTK_FUNCTION(0, "GPIO64"), -+ MTK_FUNCTION(1, "URXD1"), -+ MTK_FUNCTION(2, "UTXD1"), -+ MTK_FUNCTION(7, "DBG_MON_A[27]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(65, "UTXD1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 65), -+ MTK_FUNCTION(0, "GPIO65"), -+ MTK_FUNCTION(1, "UTXD1"), -+ MTK_FUNCTION(2, "URXD1"), -+ MTK_FUNCTION(7, "DBG_MON_A[31]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(66, "LCM_RST"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 66), -+ MTK_FUNCTION(0, "GPIO66"), -+ MTK_FUNCTION(1, "LCM_RST"), -+ MTK_FUNCTION(3, "I2S0_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[3]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(67, "GPIO67"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 67), -+ MTK_FUNCTION(0, "GPIO67"), -+ MTK_FUNCTION(3, "I2S_8CH_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[14]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(68, "MSDC2_CMD"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 68), -+ MTK_FUNCTION(0, "GPIO68"), -+ MTK_FUNCTION(1, "MSDC2_CMD"), -+ MTK_FUNCTION(2, "I2S_8CH_DO4"), -+ MTK_FUNCTION(3, "SDA1_0"), -+ MTK_FUNCTION(5, "USB_SDA"), -+ MTK_FUNCTION(6, "I2S3_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[15]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(69, "MSDC2_CLK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 69), -+ MTK_FUNCTION(0, "GPIO69"), -+ MTK_FUNCTION(1, "MSDC2_CLK"), -+ MTK_FUNCTION(2, "I2S_8CH_DO3"), -+ MTK_FUNCTION(3, "SCL1_0"), -+ MTK_FUNCTION(5, "USB_SCL"), -+ MTK_FUNCTION(6, "I2S3_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[16]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(70, "MSDC2_DAT0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 70), -+ MTK_FUNCTION(0, "GPIO70"), -+ MTK_FUNCTION(1, "MSDC2_DAT0"), -+ MTK_FUNCTION(2, "I2S_8CH_DO2"), -+ MTK_FUNCTION(5, "UTXD0"), -+ MTK_FUNCTION(6, "I2S3_DO"), -+ MTK_FUNCTION(7, "DBG_MON_B[17]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(71, "MSDC2_DAT1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 71), -+ MTK_FUNCTION(0, "GPIO71"), -+ MTK_FUNCTION(1, "MSDC2_DAT1"), -+ MTK_FUNCTION(2, "I2S_8CH_DO1"), -+ MTK_FUNCTION(3, "PWM_A"), -+ MTK_FUNCTION(4, "I2S3_MCK"), -+ MTK_FUNCTION(5, "URXD0"), -+ MTK_FUNCTION(6, "PWM_B"), -+ MTK_FUNCTION(7, "DBG_MON_B[18]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(72, "MSDC2_DAT2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 72), -+ MTK_FUNCTION(0, "GPIO72"), -+ MTK_FUNCTION(1, "MSDC2_DAT2"), -+ MTK_FUNCTION(2, "I2S_8CH_LRCK"), -+ MTK_FUNCTION(3, "SDA2_0"), -+ MTK_FUNCTION(5, "UTXD1"), -+ MTK_FUNCTION(6, "PWM_C"), -+ MTK_FUNCTION(7, "DBG_MON_B[19]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(73, "MSDC2_DAT3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 73), -+ MTK_FUNCTION(0, "GPIO73"), -+ MTK_FUNCTION(1, "MSDC2_DAT3"), -+ MTK_FUNCTION(2, "I2S_8CH_BCK"), -+ MTK_FUNCTION(3, "SCL2_0"), -+ MTK_FUNCTION(4, "EXT_FRAME_SYNC"), -+ MTK_FUNCTION(5, "URXD1"), -+ MTK_FUNCTION(6, "PWM_A"), -+ MTK_FUNCTION(7, "DBG_MON_B[20]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(74, "TDN3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 74), -+ MTK_FUNCTION(0, "GPIO74"), -+ MTK_FUNCTION(1, "TDN3") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(75, "TDP3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 75), -+ MTK_FUNCTION(0, "GPIO75"), -+ MTK_FUNCTION(1, "TDP3") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(76, "TDN2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 76), -+ MTK_FUNCTION(0, "GPIO76"), -+ MTK_FUNCTION(1, "TDN2") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(77, "TDP2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 77), -+ MTK_FUNCTION(0, "GPIO77"), -+ MTK_FUNCTION(1, "TDP2") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(78, "TCN"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 78), -+ MTK_FUNCTION(0, "GPIO78"), -+ MTK_FUNCTION(1, "TCN") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(79, "TCP"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 79), -+ MTK_FUNCTION(0, "GPIO79"), -+ MTK_FUNCTION(1, "TCP") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(80, "TDN1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 80), -+ MTK_FUNCTION(0, "GPIO80"), -+ MTK_FUNCTION(1, "TDN1") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(81, "TDP1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 81), -+ MTK_FUNCTION(0, "GPIO81"), -+ MTK_FUNCTION(1, "TDP1") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(82, "TDN0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 82), -+ MTK_FUNCTION(0, "GPIO82"), -+ MTK_FUNCTION(1, "TDN0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(83, "TDP0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 83), -+ MTK_FUNCTION(0, "GPIO83"), -+ MTK_FUNCTION(1, "TDP0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(84, "RDN0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 84), -+ MTK_FUNCTION(0, "GPIO84"), -+ MTK_FUNCTION(1, "RDN0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(85, "RDP0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 85), -+ MTK_FUNCTION(0, "GPIO85"), -+ MTK_FUNCTION(1, "RDP0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(86, "RDN1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 86), -+ MTK_FUNCTION(0, "GPIO86"), -+ MTK_FUNCTION(1, "RDN1") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(87, "RDP1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 87), -+ MTK_FUNCTION(0, "GPIO87"), -+ MTK_FUNCTION(1, "RDP1") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(88, "RCN"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 88), -+ MTK_FUNCTION(0, "GPIO88"), -+ MTK_FUNCTION(1, "RCN") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(89, "RCP"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 89), -+ MTK_FUNCTION(0, "GPIO89"), -+ MTK_FUNCTION(1, "RCP") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(90, "RDN2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 90), -+ MTK_FUNCTION(0, "GPIO90"), -+ MTK_FUNCTION(1, "RDN2"), -+ MTK_FUNCTION(2, "CMDAT8") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(91, "RDP2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 91), -+ MTK_FUNCTION(0, "GPIO91"), -+ MTK_FUNCTION(1, "RDP2"), -+ MTK_FUNCTION(2, "CMDAT9") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(92, "RDN3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 92), -+ MTK_FUNCTION(0, "GPIO92"), -+ MTK_FUNCTION(1, "RDN3"), -+ MTK_FUNCTION(2, "CMDAT4") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(93, "RDP3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 93), -+ MTK_FUNCTION(0, "GPIO93"), -+ MTK_FUNCTION(1, "RDP3"), -+ MTK_FUNCTION(2, "CMDAT5") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(94, "RCN_A"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 94), -+ MTK_FUNCTION(0, "GPIO94"), -+ MTK_FUNCTION(1, "RCN_A"), -+ MTK_FUNCTION(2, "CMDAT6") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(95, "RCP_A"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 95), -+ MTK_FUNCTION(0, "GPIO95"), -+ MTK_FUNCTION(1, "RCP_A"), -+ MTK_FUNCTION(2, "CMDAT7") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(96, "RDN1_A"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 96), -+ MTK_FUNCTION(0, "GPIO96"), -+ MTK_FUNCTION(1, "RDN1_A"), -+ MTK_FUNCTION(2, "CMDAT2"), -+ MTK_FUNCTION(3, "CMCSD2") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(97, "RDP1_A"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 97), -+ MTK_FUNCTION(0, "GPIO97"), -+ MTK_FUNCTION(1, "RDP1_A"), -+ MTK_FUNCTION(2, "CMDAT3"), -+ MTK_FUNCTION(3, "CMCSD3") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(98, "RDN0_A"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 98), -+ MTK_FUNCTION(0, "GPIO98"), -+ MTK_FUNCTION(1, "RDN0_A"), -+ MTK_FUNCTION(2, "CMHSYNC") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(99, "RDP0_A"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 99), -+ MTK_FUNCTION(0, "GPIO99"), -+ MTK_FUNCTION(1, "RDP0_A"), -+ MTK_FUNCTION(2, "CMVSYNC") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(100, "CMDAT0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 100), -+ MTK_FUNCTION(0, "GPIO100"), -+ MTK_FUNCTION(1, "CMDAT0"), -+ MTK_FUNCTION(2, "CMCSD0"), -+ MTK_FUNCTION(3, "ANT_SEL2"), -+ MTK_FUNCTION(5, "TDM_RX_MCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[21]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(101, "CMDAT1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 101), -+ MTK_FUNCTION(0, "GPIO101"), -+ MTK_FUNCTION(1, "CMDAT1"), -+ MTK_FUNCTION(2, "CMCSD1"), -+ MTK_FUNCTION(3, "ANT_SEL3"), -+ MTK_FUNCTION(4, "CMFLASH"), -+ MTK_FUNCTION(5, "TDM_RX_BCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[22]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(102, "CMMCLK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 102), -+ MTK_FUNCTION(0, "GPIO102"), -+ MTK_FUNCTION(1, "CMMCLK"), -+ MTK_FUNCTION(3, "ANT_SEL4"), -+ MTK_FUNCTION(5, "TDM_RX_LRCK"), -+ MTK_FUNCTION(7, "DBG_MON_B[23]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(103, "CMPCLK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 103), -+ MTK_FUNCTION(0, "GPIO103"), -+ MTK_FUNCTION(1, "CMPCLK"), -+ MTK_FUNCTION(2, "CMCSK"), -+ MTK_FUNCTION(3, "ANT_SEL5"), -+ MTK_FUNCTION(5, " TDM_RX_DI"), -+ MTK_FUNCTION(7, "DBG_MON_B[24]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(104, "MSDC1_CMD"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 104), -+ MTK_FUNCTION(0, "GPIO104"), -+ MTK_FUNCTION(1, "MSDC1_CMD"), -+ MTK_FUNCTION(4, "SQICS"), -+ MTK_FUNCTION(7, "DBG_MON_B[25]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(105, "MSDC1_CLK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 105), -+ MTK_FUNCTION(0, "GPIO105"), -+ MTK_FUNCTION(1, "MSDC1_CLK"), -+ MTK_FUNCTION(4, "SQISO"), -+ MTK_FUNCTION(7, "DBG_MON_B[26]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(106, "MSDC1_DAT0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 106), -+ MTK_FUNCTION(0, "GPIO106"), -+ MTK_FUNCTION(1, "MSDC1_DAT0"), -+ MTK_FUNCTION(4, "SQISI"), -+ MTK_FUNCTION(7, "DBG_MON_B[27]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(107, "MSDC1_DAT1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 107), -+ MTK_FUNCTION(0, "GPIO107"), -+ MTK_FUNCTION(1, "MSDC1_DAT1"), -+ MTK_FUNCTION(4, "SQIWP"), -+ MTK_FUNCTION(7, "DBG_MON_B[28]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(108, "MSDC1_DAT2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 108), -+ MTK_FUNCTION(0, "GPIO108"), -+ MTK_FUNCTION(1, "MSDC1_DAT2"), -+ MTK_FUNCTION(4, "SQIRST"), -+ MTK_FUNCTION(7, "DBG_MON_B[29]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(109, "MSDC1_DAT3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 109), -+ MTK_FUNCTION(0, "GPIO109"), -+ MTK_FUNCTION(1, "MSDC1_DAT3"), -+ MTK_FUNCTION(4, "SQICK"), /* WIP */ -+ MTK_FUNCTION(7, "DBG_MON_B[30]") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(110, "MSDC0_DAT7"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 110), -+ MTK_FUNCTION(0, "GPIO110"), -+ MTK_FUNCTION(1, "MSDC0_DAT7"), -+ MTK_FUNCTION(4, "NLD7") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(111, "MSDC0_DAT6"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 111), -+ MTK_FUNCTION(0, "GPIO111"), -+ MTK_FUNCTION(1, "MSDC0_DAT6"), -+ MTK_FUNCTION(4, "NLD6") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(112, "MSDC0_DAT5"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 112), -+ MTK_FUNCTION(0, "GPIO112"), -+ MTK_FUNCTION(1, "MSDC0_DAT5"), -+ MTK_FUNCTION(4, "NLD4") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(113, "MSDC0_DAT4"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 113), -+ MTK_FUNCTION(0, "GPIO113"), -+ MTK_FUNCTION(1, "MSDC0_DAT4"), -+ MTK_FUNCTION(4, "NLD3") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(114, "MSDC0_RSTB"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 114), -+ MTK_FUNCTION(0, "GPIO114"), -+ MTK_FUNCTION(1, "MSDC0_RSTB"), -+ MTK_FUNCTION(4, "NLD0") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(115, "MSDC0_CMD"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 115), -+ MTK_FUNCTION(0, "GPIO115"), -+ MTK_FUNCTION(1, "MSDC0_CMD"), -+ MTK_FUNCTION(4, "NALE") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(116, "MSDC0_CLK"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 116), -+ MTK_FUNCTION(0, "GPIO116"), -+ MTK_FUNCTION(1, "MSDC0_CLK"), -+ MTK_FUNCTION(4, "NWEB") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(117, "MSDC0_DAT3"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 117), -+ MTK_FUNCTION(0, "GPIO117"), -+ MTK_FUNCTION(1, "MSDC0_DAT3"), -+ MTK_FUNCTION(4, "NLD1") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(118, "MSDC0_DAT2"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 118), -+ MTK_FUNCTION(0, "GPIO118"), -+ MTK_FUNCTION(1, "MSDC0_DAT2"), -+ MTK_FUNCTION(4, "NLD5") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(119, "MSDC0_DAT1"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 119), -+ MTK_FUNCTION(0, "GPIO119"), -+ MTK_FUNCTION(1, "MSDC0_DAT1"), -+ MTK_FUNCTION(4, "NLD8") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(120, "MSDC0_DAT0"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 120), -+ MTK_FUNCTION(0, "GPIO120"), -+ MTK_FUNCTION(1, "MSDC0_DAT0"), -+ MTK_FUNCTION(4, "WATCHDOG"), -+ MTK_FUNCTION(5, "NLD2") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(121, "GPIO121"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 121), -+ MTK_FUNCTION(0, "GPIO121") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(122, "GPIO122"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 122), -+ MTK_FUNCTION(0, "GPIO122") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(123, "GPIO123"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 123), -+ MTK_FUNCTION(0, "GPIO123") -+ ), -+ MTK_PIN( -+ PINCTRL_PIN(124, "GPIO124"), -+ NULL, "mt8516", -+ MTK_EINT_FUNCTION(0, 124), -+ MTK_FUNCTION(0, "GPIO124") -+ ), -+}; -+ -+#endif /* __PINCTRL_MTK_MT8516_H */ ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c -@@ -0,0 +1,947 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin -+ * bindings for MediaTek SoC. -+ * -+ * Copyright (C) 2018 MediaTek Inc. -+ * Author: Sean Wang -+ * Zhiyong Tao -+ * Hongzhou.Yang -+ */ -+ -+#include -+#include -+#include "pinctrl-paris.h" -+ -+#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME -+ -+/* Custom pinconf parameters */ -+#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) -+#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) -+#define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) -+#define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) -+#define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5) -+ -+static const struct pinconf_generic_params mtk_custom_bindings[] = { -+ {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, -+ {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, -+ {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, -+ {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, -+ {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2}, -+}; -+ -+#ifdef CONFIG_DEBUG_FS -+static const struct pin_config_item mtk_conf_items[] = { -+ PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), -+ PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), -+ PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), -+ PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), -+ PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true), -+}; -+#endif -+ -+static const char * const mtk_gpio_functions[] = { -+ "func0", "func1", "func2", "func3", -+ "func4", "func5", "func6", "func7", -+ "func8", "func9", "func10", "func11", -+ "func12", "func13", "func14", "func15", -+}; -+ -+static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, -+ struct pinctrl_gpio_range *range, -+ unsigned int pin) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, -+ hw->soc->gpio_m); -+} -+ -+static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, -+ struct pinctrl_gpio_range *range, -+ unsigned int pin, bool input) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ /* hardware would take 0 as input direction */ -+ return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); -+} -+ -+static int mtk_pinconf_get(struct pinctrl_dev *pctldev, -+ unsigned int pin, unsigned long *config) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ u32 param = pinconf_to_config_param(*config); -+ int val, val2, err, reg, ret = 1; -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ switch (param) { -+ case PIN_CONFIG_BIAS_DISABLE: -+ if (hw->soc->bias_disable_get) { -+ err = hw->soc->bias_disable_get(hw, desc, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_UP: -+ if (hw->soc->bias_get) { -+ err = hw->soc->bias_get(hw, desc, 1, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_DOWN: -+ if (hw->soc->bias_get) { -+ err = hw->soc->bias_get(hw, desc, 0, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_SLEW_RATE: -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val); -+ if (err) -+ return err; -+ -+ if (!val) -+ return -EINVAL; -+ -+ break; -+ case PIN_CONFIG_INPUT_ENABLE: -+ case PIN_CONFIG_OUTPUT_ENABLE: -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); -+ if (err) -+ return err; -+ -+ /* HW takes input mode as zero; output mode as non-zero */ -+ if ((val && param == PIN_CONFIG_INPUT_ENABLE) || -+ (!val && param == PIN_CONFIG_OUTPUT_ENABLE)) -+ return -EINVAL; -+ -+ break; -+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE: -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); -+ if (err) -+ return err; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2); -+ if (err) -+ return err; -+ -+ if (val || !val2) -+ return -EINVAL; -+ -+ break; -+ case PIN_CONFIG_DRIVE_STRENGTH: -+ if (hw->soc->drive_get) { -+ err = hw->soc->drive_get(hw, desc, &ret); -+ if (err) -+ return err; -+ } else { -+ err = -ENOTSUPP; -+ } -+ break; -+ case MTK_PIN_CONFIG_TDSEL: -+ case MTK_PIN_CONFIG_RDSEL: -+ reg = (param == MTK_PIN_CONFIG_TDSEL) ? -+ PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; -+ -+ err = mtk_hw_get_value(hw, desc, reg, &val); -+ if (err) -+ return err; -+ -+ ret = val; -+ -+ break; -+ case MTK_PIN_CONFIG_PU_ADV: -+ case MTK_PIN_CONFIG_PD_ADV: -+ if (hw->soc->adv_pull_get) { -+ bool pullup; -+ -+ pullup = param == MTK_PIN_CONFIG_PU_ADV; -+ err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case MTK_PIN_CONFIG_DRV_ADV: -+ if (hw->soc->adv_drive_get) { -+ err = hw->soc->adv_drive_get(hw, desc, &ret); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ default: -+ return -ENOTSUPP; -+ } -+ -+ *config = pinconf_to_config_packed(param, ret); -+ -+ return 0; -+} -+ -+static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, -+ enum pin_config_param param, -+ enum pin_config_param arg) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ const struct mtk_pin_desc *desc; -+ int err = 0; -+ u32 reg; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; -+ -+ switch ((u32)param) { -+ case PIN_CONFIG_BIAS_DISABLE: -+ if (hw->soc->bias_disable_set) { -+ err = hw->soc->bias_disable_set(hw, desc); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_UP: -+ if (hw->soc->bias_set) { -+ err = hw->soc->bias_set(hw, desc, 1); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_BIAS_PULL_DOWN: -+ if (hw->soc->bias_set) { -+ err = hw->soc->bias_set(hw, desc, 0); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case PIN_CONFIG_OUTPUT_ENABLE: -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, -+ MTK_DISABLE); -+ if (err) -+ goto err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ MTK_OUTPUT); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_INPUT_ENABLE: -+ if (hw->soc->ies_present) { -+ mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, -+ MTK_ENABLE); -+ } -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ MTK_INPUT); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_SLEW_RATE: -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, -+ arg); -+ if (err) -+ goto err; -+ -+ break; -+ case PIN_CONFIG_OUTPUT: -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ MTK_OUTPUT); -+ if (err) -+ goto err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, -+ arg); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_INPUT_SCHMITT_ENABLE: -+ /* arg = 1: Input mode & SMT enable ; -+ * arg = 0: Output mode & SMT disable -+ */ -+ arg = arg ? 2 : 1; -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, -+ arg & 1); -+ if (err) -+ goto err; -+ -+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, -+ !!(arg & 2)); -+ if (err) -+ goto err; -+ break; -+ case PIN_CONFIG_DRIVE_STRENGTH: -+ if (hw->soc->drive_set) { -+ err = hw->soc->drive_set(hw, desc, arg); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case MTK_PIN_CONFIG_TDSEL: -+ case MTK_PIN_CONFIG_RDSEL: -+ reg = (param == MTK_PIN_CONFIG_TDSEL) ? -+ PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; -+ -+ err = mtk_hw_set_value(hw, desc, reg, arg); -+ if (err) -+ goto err; -+ break; -+ case MTK_PIN_CONFIG_PU_ADV: -+ case MTK_PIN_CONFIG_PD_ADV: -+ if (hw->soc->adv_pull_set) { -+ bool pullup; -+ -+ pullup = param == MTK_PIN_CONFIG_PU_ADV; -+ err = hw->soc->adv_pull_set(hw, desc, pullup, -+ arg); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ case MTK_PIN_CONFIG_DRV_ADV: -+ if (hw->soc->adv_drive_set) { -+ err = hw->soc->adv_drive_set(hw, desc, arg); -+ if (err) -+ return err; -+ } else { -+ return -ENOTSUPP; -+ } -+ break; -+ default: -+ err = -ENOTSUPP; -+ } -+ -+err: -+ return err; -+} -+ -+static struct mtk_pinctrl_group * -+mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin) -+{ -+ int i; -+ -+ for (i = 0; i < hw->soc->ngrps; i++) { -+ struct mtk_pinctrl_group *grp = hw->groups + i; -+ -+ if (grp->pin == pin) -+ return grp; -+ } -+ -+ return NULL; -+} -+ -+static const struct mtk_func_desc * -+mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum) -+{ -+ const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; -+ const struct mtk_func_desc *func = pin->funcs; -+ -+ while (func && func->name) { -+ if (func->muxval == fnum) -+ return func; -+ func++; -+ } -+ -+ return NULL; -+} -+ -+static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num, -+ u32 fnum) -+{ -+ int i; -+ -+ for (i = 0; i < hw->soc->npins; i++) { -+ const struct mtk_pin_desc *pin = hw->soc->pins + i; -+ -+ if (pin->number == pin_num) { -+ const struct mtk_func_desc *func = pin->funcs; -+ -+ while (func && func->name) { -+ if (func->muxval == fnum) -+ return true; -+ func++; -+ } -+ -+ break; -+ } -+ } -+ -+ return false; -+} -+ -+static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl, -+ u32 pin, u32 fnum, -+ struct mtk_pinctrl_group *grp, -+ struct pinctrl_map **map, -+ unsigned *reserved_maps, -+ unsigned *num_maps) -+{ -+ bool ret; -+ -+ if (*num_maps == *reserved_maps) -+ return -ENOSPC; -+ -+ (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; -+ (*map)[*num_maps].data.mux.group = grp->name; -+ -+ ret = mtk_pctrl_is_function_valid(pctl, pin, fnum); -+ if (!ret) { -+ dev_err(pctl->dev, "invalid function %d on pin %d .\n", -+ fnum, pin); -+ return -EINVAL; -+ } -+ -+ (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum]; -+ (*num_maps)++; -+ -+ return 0; -+} -+ -+static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, -+ struct device_node *node, -+ struct pinctrl_map **map, -+ unsigned *reserved_maps, -+ unsigned *num_maps) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ int num_pins, num_funcs, maps_per_pin, i, err; -+ struct mtk_pinctrl_group *grp; -+ unsigned int num_configs; -+ bool has_config = false; -+ unsigned long *configs; -+ u32 pinfunc, pin, func; -+ struct property *pins; -+ unsigned reserve = 0; -+ -+ pins = of_find_property(node, "pinmux", NULL); -+ if (!pins) { -+ dev_err(hw->dev, "missing pins property in node %pOFn .\n", -+ node); -+ return -EINVAL; -+ } -+ -+ err = pinconf_generic_parse_dt_config(node, pctldev, &configs, -+ &num_configs); -+ if (err) -+ return err; -+ -+ if (num_configs) -+ has_config = true; -+ -+ num_pins = pins->length / sizeof(u32); -+ num_funcs = num_pins; -+ maps_per_pin = 0; -+ if (num_funcs) -+ maps_per_pin++; -+ if (has_config && num_pins >= 1) -+ maps_per_pin++; -+ -+ if (!num_pins || !maps_per_pin) { -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ reserve = num_pins * maps_per_pin; -+ -+ err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps, -+ reserve); -+ if (err < 0) -+ goto exit; -+ -+ for (i = 0; i < num_pins; i++) { -+ err = of_property_read_u32_index(node, "pinmux", i, &pinfunc); -+ if (err) -+ goto exit; -+ -+ pin = MTK_GET_PIN_NO(pinfunc); -+ func = MTK_GET_PIN_FUNC(pinfunc); -+ -+ if (pin >= hw->soc->npins || -+ func >= ARRAY_SIZE(mtk_gpio_functions)) { -+ dev_err(hw->dev, "invalid pins value.\n"); -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ grp = mtk_pctrl_find_group_by_pin(hw, pin); -+ if (!grp) { -+ dev_err(hw->dev, "unable to match pin %d to group\n", -+ pin); -+ err = -EINVAL; -+ goto exit; -+ } -+ -+ err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map, -+ reserved_maps, num_maps); -+ if (err < 0) -+ goto exit; -+ -+ if (has_config) { -+ err = pinctrl_utils_add_map_configs(pctldev, map, -+ reserved_maps, -+ num_maps, -+ grp->name, -+ configs, -+ num_configs, -+ PIN_MAP_TYPE_CONFIGS_GROUP); -+ if (err < 0) -+ goto exit; -+ } -+ } -+ -+ err = 0; -+ -+exit: -+ kfree(configs); -+ return err; -+} -+ -+static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev, -+ struct device_node *np_config, -+ struct pinctrl_map **map, -+ unsigned *num_maps) -+{ -+ struct device_node *np; -+ unsigned reserved_maps; -+ int ret; -+ -+ *map = NULL; -+ *num_maps = 0; -+ reserved_maps = 0; -+ -+ for_each_child_of_node(np_config, np) { -+ ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map, -+ &reserved_maps, -+ num_maps); -+ if (ret < 0) { -+ pinctrl_utils_free_map(pctldev, *map, *num_maps); -+ of_node_put(np); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ -+ return hw->soc->ngrps; -+} -+ -+static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev, -+ unsigned group) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ -+ return hw->groups[group].name; -+} -+ -+static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev, -+ unsigned group, const unsigned **pins, -+ unsigned *num_pins) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ -+ *pins = (unsigned *)&hw->groups[group].pin; -+ *num_pins = 1; -+ -+ return 0; -+} -+ -+static const struct pinctrl_ops mtk_pctlops = { -+ .dt_node_to_map = mtk_pctrl_dt_node_to_map, -+ .dt_free_map = pinctrl_utils_free_map, -+ .get_groups_count = mtk_pctrl_get_groups_count, -+ .get_group_name = mtk_pctrl_get_group_name, -+ .get_group_pins = mtk_pctrl_get_group_pins, -+}; -+ -+static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) -+{ -+ return ARRAY_SIZE(mtk_gpio_functions); -+} -+ -+static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev, -+ unsigned selector) -+{ -+ return mtk_gpio_functions[selector]; -+} -+ -+static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev, -+ unsigned function, -+ const char * const **groups, -+ unsigned * const num_groups) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ -+ *groups = hw->grp_names; -+ *num_groups = hw->soc->ngrps; -+ -+ return 0; -+} -+ -+static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev, -+ unsigned function, -+ unsigned group) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ struct mtk_pinctrl_group *grp = hw->groups + group; -+ const struct mtk_func_desc *desc_func; -+ const struct mtk_pin_desc *desc; -+ bool ret; -+ -+ ret = mtk_pctrl_is_function_valid(hw, grp->pin, function); -+ if (!ret) { -+ dev_err(hw->dev, "invalid function %d on group %d .\n", -+ function, group); -+ return -EINVAL; -+ } -+ -+ desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function); -+ if (!desc_func) -+ return -EINVAL; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin]; -+ mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval); -+ -+ return 0; -+} -+ -+static const struct pinmux_ops mtk_pmxops = { -+ .get_functions_count = mtk_pmx_get_funcs_cnt, -+ .get_function_name = mtk_pmx_get_func_name, -+ .get_function_groups = mtk_pmx_get_func_groups, -+ .set_mux = mtk_pmx_set_mux, -+ .gpio_set_direction = mtk_pinmux_gpio_set_direction, -+ .gpio_request_enable = mtk_pinmux_gpio_request_enable, -+}; -+ -+static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group, -+ unsigned long *config) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ -+ *config = hw->groups[group].config; -+ -+ return 0; -+} -+ -+static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, -+ unsigned long *configs, unsigned num_configs) -+{ -+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); -+ struct mtk_pinctrl_group *grp = &hw->groups[group]; -+ int i, ret; -+ -+ for (i = 0; i < num_configs; i++) { -+ ret = mtk_pinconf_set(pctldev, grp->pin, -+ pinconf_to_config_param(configs[i]), -+ pinconf_to_config_argument(configs[i])); -+ if (ret < 0) -+ return ret; -+ -+ grp->config = configs[i]; -+ } -+ -+ return 0; -+} -+ -+static const struct pinconf_ops mtk_confops = { -+ .pin_config_get = mtk_pinconf_get, -+ .pin_config_group_get = mtk_pconf_group_get, -+ .pin_config_group_set = mtk_pconf_group_set, -+}; -+ -+static struct pinctrl_desc mtk_desc = { -+ .name = PINCTRL_PINCTRL_DEV, -+ .pctlops = &mtk_pctlops, -+ .pmxops = &mtk_pmxops, -+ .confops = &mtk_confops, -+ .owner = THIS_MODULE, -+}; -+ -+static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ int value, err; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value); -+ if (err) -+ return err; -+ -+ return !value; -+} -+ -+static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ int value, err; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; -+ -+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); -+ if (err) -+ return err; -+ -+ return !!value; -+} -+ -+static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; -+ -+ mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); -+} -+ -+static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) -+{ -+ return pinctrl_gpio_direction_input(chip->base + gpio); -+} -+ -+static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, -+ int value) -+{ -+ mtk_gpio_set(chip, gpio, value); -+ -+ return pinctrl_gpio_direction_output(chip->base + gpio); -+} -+ -+static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ -+ if (!hw->eint) -+ return -ENOTSUPP; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; -+ -+ if (desc->eint.eint_n == EINT_NA) -+ return -ENOTSUPP; -+ -+ return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); -+} -+ -+static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, -+ unsigned long config) -+{ -+ struct mtk_pinctrl *hw = gpiochip_get_data(chip); -+ const struct mtk_pin_desc *desc; -+ u32 debounce; -+ -+ desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; -+ -+ if (!hw->eint || -+ pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || -+ desc->eint.eint_n == EINT_NA) -+ return -ENOTSUPP; -+ -+ debounce = pinconf_to_config_argument(config); -+ -+ return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); -+} -+ -+static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) -+{ -+ struct gpio_chip *chip = &hw->chip; -+ int ret; -+ -+ chip->label = PINCTRL_PINCTRL_DEV; -+ chip->parent = hw->dev; -+ chip->request = gpiochip_generic_request; -+ chip->free = gpiochip_generic_free; -+ chip->get_direction = mtk_gpio_get_direction; -+ chip->direction_input = mtk_gpio_direction_input; -+ chip->direction_output = mtk_gpio_direction_output; -+ chip->get = mtk_gpio_get; -+ chip->set = mtk_gpio_set; -+ chip->to_irq = mtk_gpio_to_irq, -+ chip->set_config = mtk_gpio_set_config, -+ chip->base = -1; -+ chip->ngpio = hw->soc->npins; -+ chip->of_node = np; -+ chip->of_gpio_n_cells = 2; -+ -+ ret = gpiochip_add_data(chip, hw); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static int mtk_pctrl_build_state(struct platform_device *pdev) -+{ -+ struct mtk_pinctrl *hw = platform_get_drvdata(pdev); -+ int i; -+ -+ /* Allocate groups */ -+ hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, -+ sizeof(*hw->groups), GFP_KERNEL); -+ if (!hw->groups) -+ return -ENOMEM; -+ -+ /* We assume that one pin is one group, use pin name as group name. */ -+ hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, -+ sizeof(*hw->grp_names), GFP_KERNEL); -+ if (!hw->grp_names) -+ return -ENOMEM; -+ -+ for (i = 0; i < hw->soc->npins; i++) { -+ const struct mtk_pin_desc *pin = hw->soc->pins + i; -+ struct mtk_pinctrl_group *group = hw->groups + i; -+ -+ group->name = pin->name; -+ group->pin = pin->number; -+ -+ hw->grp_names[i] = pin->name; -+ } -+ -+ return 0; -+} -+ -+int mtk_paris_pinctrl_probe(struct platform_device *pdev, -+ const struct mtk_pin_soc *soc) -+{ -+ struct pinctrl_pin_desc *pins; -+ struct mtk_pinctrl *hw; -+ struct resource *res; -+ int err, i; -+ -+ hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); -+ if (!hw) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, hw); -+ hw->soc = soc; -+ hw->dev = &pdev->dev; -+ -+ if (!hw->soc->nbase_names) { -+ dev_err(&pdev->dev, -+ "SoC should be assigned at least one register base\n"); -+ return -EINVAL; -+ } -+ -+ hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, -+ sizeof(*hw->base), GFP_KERNEL); -+ if (!hw->base) -+ return -ENOMEM; -+ -+ for (i = 0; i < hw->soc->nbase_names; i++) { -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -+ hw->soc->base_names[i]); -+ if (!res) { -+ dev_err(&pdev->dev, "missing IO resource\n"); -+ return -ENXIO; -+ } -+ -+ hw->base[i] = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(hw->base[i])) -+ return PTR_ERR(hw->base[i]); -+ } -+ -+ hw->nbase = hw->soc->nbase_names; -+ -+ err = mtk_pctrl_build_state(pdev); -+ if (err) { -+ dev_err(&pdev->dev, "build state failed: %d\n", err); -+ return -EINVAL; -+ } -+ -+ /* Copy from internal struct mtk_pin_desc to register to the core */ -+ pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), -+ GFP_KERNEL); -+ if (!pins) -+ return -ENOMEM; -+ -+ for (i = 0; i < hw->soc->npins; i++) { -+ pins[i].number = hw->soc->pins[i].number; -+ pins[i].name = hw->soc->pins[i].name; -+ } -+ -+ /* Setup pins descriptions per SoC types */ -+ mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; -+ mtk_desc.npins = hw->soc->npins; -+ mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); -+ mtk_desc.custom_params = mtk_custom_bindings; -+#ifdef CONFIG_DEBUG_FS -+ mtk_desc.custom_conf_items = mtk_conf_items; -+#endif -+ -+ err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, -+ &hw->pctrl); -+ if (err) -+ return err; -+ -+ err = pinctrl_enable(hw->pctrl); -+ if (err) -+ return err; -+ -+ err = mtk_build_eint(hw, pdev); -+ if (err) -+ dev_warn(&pdev->dev, -+ "Failed to add EINT, but pinctrl still can work\n"); -+ -+ /* Build gpiochip should be after pinctrl_enable is done */ -+ err = mtk_build_gpiochip(hw, pdev->dev.of_node); -+ if (err) { -+ dev_err(&pdev->dev, "Failed to add gpio_chip\n"); -+ return err; -+ } -+ -+ platform_set_drvdata(pdev, hw); -+ -+ return 0; -+} -+ -+static int mtk_paris_pinctrl_suspend(struct device *device) -+{ -+ struct mtk_pinctrl *pctl = dev_get_drvdata(device); -+ -+ return mtk_eint_do_suspend(pctl->eint); -+} -+ -+static int mtk_paris_pinctrl_resume(struct device *device) -+{ -+ struct mtk_pinctrl *pctl = dev_get_drvdata(device); -+ -+ return mtk_eint_do_resume(pctl->eint); -+} -+ -+const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = { -+ .suspend_noirq = mtk_paris_pinctrl_suspend, -+ .resume_noirq = mtk_paris_pinctrl_resume, -+}; ---- /dev/null -+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h -@@ -0,0 +1,65 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (C) 2018 MediaTek Inc. -+ * -+ * Author: Sean Wang -+ * Zhiyong Tao -+ * Hongzhou.Yang -+ */ -+#ifndef __PINCTRL_PARIS_H -+#define __PINCTRL_PARIS_H -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../core.h" -+#include "../pinconf.h" -+#include "../pinctrl-utils.h" -+#include "../pinmux.h" -+#include "mtk-eint.h" -+#include "pinctrl-mtk-common-v2.h" -+ -+#define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), } -+ -+#define MTK_EINT_FUNCTION(_eintmux, _eintnum) \ -+ { \ -+ .eint_m = _eintmux, \ -+ .eint_n = _eintnum, \ -+ } -+ -+#define MTK_FUNCTION(_val, _name) \ -+ { \ -+ .muxval = _val, \ -+ .name = _name, \ -+ } -+ -+#define MTK_PIN(_number, _name, _eint, _drv_n, ...) { \ -+ .number = _number, \ -+ .name = _name, \ -+ .eint = _eint, \ -+ .drv_n = _drv_n, \ -+ .funcs = (struct mtk_func_desc[]){ \ -+ __VA_ARGS__, { } }, \ -+ } -+ -+#define PINCTRL_PIN_GROUP(name, id) \ -+ { \ -+ name, \ -+ id##_pins, \ -+ ARRAY_SIZE(id##_pins), \ -+ id##_funcs, \ -+ } -+ -+int mtk_paris_pinctrl_probe(struct platform_device *pdev, -+ const struct mtk_pin_soc *soc); -+ -+extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops; -+ -+#endif /* __PINCTRL_PARIS_H */ diff --git a/target/linux/mediatek/patches-4.19/0006-mtd-spi-nor-mtk-quadspi-add-SNOR_HWCAPS_READ-to-spi_.patch b/target/linux/mediatek/patches-4.19/0006-mtd-spi-nor-mtk-quadspi-add-SNOR_HWCAPS_READ-to-spi_.patch deleted file mode 100644 index d0f74f3dcb..0000000000 --- a/target/linux/mediatek/patches-4.19/0006-mtd-spi-nor-mtk-quadspi-add-SNOR_HWCAPS_READ-to-spi_.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 9cca9b3e55989f8b227d05897877648d67910a6d Mon Sep 17 00:00:00 2001 -From: Guochun Mao -Date: Wed, 16 Jan 2019 10:12:04 +0800 -Subject: [PATCH] mtd: spi-nor: mtk-quadspi: add SNOR_HWCAPS_READ to - spi_nor_hwcaps mask - -SNOR_HWCAPS_READ should be supported by this controller, so add this -flag to spi_nor_hwcaps mask. - -Signed-off-by: Guochun Mao -Signed-off-by: Ryder Lee -Reviewed-by: Tudor Ambarus -Signed-off-by: Boris Brezillon ---- - drivers/mtd/spi-nor/mtk-quadspi.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/mtd/spi-nor/mtk-quadspi.c -+++ b/drivers/mtd/spi-nor/mtk-quadspi.c -@@ -431,7 +431,8 @@ static int mtk_nor_init(struct mtk_nor * - struct device_node *flash_node) - { - const struct spi_nor_hwcaps hwcaps = { -- .mask = SNOR_HWCAPS_READ_FAST | -+ .mask = SNOR_HWCAPS_READ | -+ SNOR_HWCAPS_READ_FAST | - SNOR_HWCAPS_READ_1_1_2 | - SNOR_HWCAPS_PP, - }; diff --git a/target/linux/mediatek/patches-4.19/0101-pci-mediatek-backport-fix-pcie.patch b/target/linux/mediatek/patches-4.19/0101-pci-mediatek-backport-fix-pcie.patch deleted file mode 100644 index f350564977..0000000000 --- a/target/linux/mediatek/patches-4.19/0101-pci-mediatek-backport-fix-pcie.patch +++ /dev/null @@ -1,376 +0,0 @@ ---- a/drivers/clk/clk-devres.c -+++ b/drivers/clk/clk-devres.c -@@ -34,6 +34,17 @@ struct clk *devm_clk_get(struct device * - } - EXPORT_SYMBOL(devm_clk_get); - -+struct clk *devm_clk_get_optional(struct device *dev, const char *id) -+{ -+ struct clk *clk = devm_clk_get(dev, id); -+ -+ if (clk == ERR_PTR(-ENOENT)) -+ return NULL; -+ -+ return clk; -+} -+EXPORT_SYMBOL(devm_clk_get_optional); -+ - struct clk_bulk_devres { - struct clk_bulk_data *clks; - int num_clks; ---- a/drivers/pci/controller/pcie-mediatek.c -+++ b/drivers/pci/controller/pcie-mediatek.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -167,6 +168,7 @@ struct mtk_pcie_soc { - * @phy: pointer to PHY control block - * @lane: lane count - * @slot: port slot -+ * @irq: GIC irq - * @irq_domain: legacy INTx IRQ domain - * @inner_domain: inner IRQ domain - * @msi_domain: MSI IRQ domain -@@ -187,6 +189,7 @@ struct mtk_pcie_port { - struct phy *phy; - u32 lane; - u32 slot; -+ int irq; - struct irq_domain *irq_domain; - struct irq_domain *inner_domain; - struct irq_domain *msi_domain; -@@ -230,10 +233,8 @@ static void mtk_pcie_subsys_powerdown(st - - clk_disable_unprepare(pcie->free_ck); - -- if (dev->pm_domain) { -- pm_runtime_put_sync(dev); -- pm_runtime_disable(dev); -- } -+ pm_runtime_put_sync(dev); -+ pm_runtime_disable(dev); - } - - static void mtk_pcie_port_free(struct mtk_pcie_port *port) -@@ -537,6 +538,27 @@ static void mtk_pcie_enable_msi(struct m - writel(val, port->base + PCIE_INT_MASK); - } - -+static void mtk_pcie_irq_teardown(struct mtk_pcie *pcie) -+{ -+ struct mtk_pcie_port *port, *tmp; -+ -+ list_for_each_entry_safe(port, tmp, &pcie->ports, list) { -+ irq_set_chained_handler_and_data(port->irq, NULL, NULL); -+ -+ if (port->irq_domain) -+ irq_domain_remove(port->irq_domain); -+ -+ if (IS_ENABLED(CONFIG_PCI_MSI)) { -+ if (port->msi_domain) -+ irq_domain_remove(port->msi_domain); -+ if (port->inner_domain) -+ irq_domain_remove(port->inner_domain); -+ } -+ -+ irq_dispose_mapping(port->irq); -+ } -+} -+ - static int mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq, - irq_hw_number_t hwirq) - { -@@ -566,6 +588,7 @@ static int mtk_pcie_init_irq_domain(stru - - port->irq_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX, - &intx_domain_ops, port); -+ of_node_put(pcie_intc_node); - if (!port->irq_domain) { - dev_err(dev, "failed to get INTx IRQ domain\n"); - return -ENODEV; -@@ -627,7 +650,7 @@ static int mtk_pcie_setup_irq(struct mtk - struct mtk_pcie *pcie = port->pcie; - struct device *dev = pcie->dev; - struct platform_device *pdev = to_platform_device(dev); -- int err, irq; -+ int err; - - err = mtk_pcie_init_irq_domain(port, node); - if (err) { -@@ -635,8 +658,9 @@ static int mtk_pcie_setup_irq(struct mtk - return err; - } - -- irq = platform_get_irq(pdev, port->slot); -- irq_set_chained_handler_and_data(irq, mtk_pcie_intr_handler, port); -+ port->irq = platform_get_irq(pdev, port->slot); -+ irq_set_chained_handler_and_data(port->irq, -+ mtk_pcie_intr_handler, port); - - return 0; - } -@@ -912,49 +936,29 @@ static int mtk_pcie_parse_port(struct mt - - /* sys_ck might be divided into the following parts in some chips */ - snprintf(name, sizeof(name), "ahb_ck%d", slot); -- port->ahb_ck = devm_clk_get(dev, name); -- if (IS_ERR(port->ahb_ck)) { -- if (PTR_ERR(port->ahb_ck) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- -- port->ahb_ck = NULL; -- } -+ port->ahb_ck = devm_clk_get_optional(dev, name); -+ if (IS_ERR(port->ahb_ck)) -+ return PTR_ERR(port->ahb_ck); - - snprintf(name, sizeof(name), "axi_ck%d", slot); -- port->axi_ck = devm_clk_get(dev, name); -- if (IS_ERR(port->axi_ck)) { -- if (PTR_ERR(port->axi_ck) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- -- port->axi_ck = NULL; -- } -+ port->axi_ck = devm_clk_get_optional(dev, name); -+ if (IS_ERR(port->axi_ck)) -+ return PTR_ERR(port->axi_ck); - - snprintf(name, sizeof(name), "aux_ck%d", slot); -- port->aux_ck = devm_clk_get(dev, name); -- if (IS_ERR(port->aux_ck)) { -- if (PTR_ERR(port->aux_ck) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- -- port->aux_ck = NULL; -- } -+ port->aux_ck = devm_clk_get_optional(dev, name); -+ if (IS_ERR(port->aux_ck)) -+ return PTR_ERR(port->aux_ck); - - snprintf(name, sizeof(name), "obff_ck%d", slot); -- port->obff_ck = devm_clk_get(dev, name); -- if (IS_ERR(port->obff_ck)) { -- if (PTR_ERR(port->obff_ck) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- -- port->obff_ck = NULL; -- } -+ port->obff_ck = devm_clk_get_optional(dev, name); -+ if (IS_ERR(port->obff_ck)) -+ return PTR_ERR(port->obff_ck); - - snprintf(name, sizeof(name), "pipe_ck%d", slot); -- port->pipe_ck = devm_clk_get(dev, name); -- if (IS_ERR(port->pipe_ck)) { -- if (PTR_ERR(port->pipe_ck) == -EPROBE_DEFER) -- return -EPROBE_DEFER; -- -- port->pipe_ck = NULL; -- } -+ port->pipe_ck = devm_clk_get_optional(dev, name); -+ if (IS_ERR(port->pipe_ck)) -+ return PTR_ERR(port->pipe_ck); - - snprintf(name, sizeof(name), "pcie-rst%d", slot); - port->reset = devm_reset_control_get_optional_exclusive(dev, name); -@@ -1007,10 +1011,8 @@ static int mtk_pcie_subsys_powerup(struc - pcie->free_ck = NULL; - } - -- if (dev->pm_domain) { -- pm_runtime_enable(dev); -- pm_runtime_get_sync(dev); -- } -+ pm_runtime_enable(dev); -+ pm_runtime_get_sync(dev); - - /* enable top level clock */ - err = clk_prepare_enable(pcie->free_ck); -@@ -1022,10 +1024,8 @@ static int mtk_pcie_subsys_powerup(struc - return 0; - - err_free_ck: -- if (dev->pm_domain) { -- pm_runtime_put_sync(dev); -- pm_runtime_disable(dev); -- } -+ pm_runtime_put_sync(dev); -+ pm_runtime_disable(dev); - - return err; - } -@@ -1130,36 +1130,6 @@ static int mtk_pcie_request_resources(st - return err; - - err = devm_pci_remap_iospace(dev, &pcie->pio, pcie->io.start); -- if (err) -- return err; -- -- return 0; --} -- --static int mtk_pcie_register_host(struct pci_host_bridge *host) --{ -- struct mtk_pcie *pcie = pci_host_bridge_priv(host); -- struct pci_bus *child; -- int err; -- -- host->busnr = pcie->busn.start; -- host->dev.parent = pcie->dev; -- host->ops = pcie->soc->ops; -- host->map_irq = of_irq_parse_and_map_pci; -- host->swizzle_irq = pci_common_swizzle; -- host->sysdata = pcie; -- -- err = pci_scan_root_bus_bridge(host); -- if (err < 0) -- return err; -- -- pci_bus_size_bridges(host->bus); -- pci_bus_assign_resources(host->bus); -- -- list_for_each_entry(child, &host->bus->children, node) -- pcie_bus_configure_settings(child); -- -- pci_bus_add_devices(host->bus); - - return 0; - } -@@ -1190,7 +1160,14 @@ static int mtk_pcie_probe(struct platfor - if (err) - goto put_resources; - -- err = mtk_pcie_register_host(host); -+ host->busnr = pcie->busn.start; -+ host->dev.parent = pcie->dev; -+ host->ops = pcie->soc->ops; -+ host->map_irq = of_irq_parse_and_map_pci; -+ host->swizzle_irq = pci_common_swizzle; -+ host->sysdata = pcie; -+ -+ err = pci_host_probe(host); - if (err) - goto put_resources; - -@@ -1203,6 +1180,80 @@ put_resources: - return err; - } - -+ -+static void mtk_pcie_free_resources(struct mtk_pcie *pcie) -+{ -+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); -+ struct list_head *windows = &host->windows; -+ -+ pci_free_resource_list(windows); -+} -+ -+static int mtk_pcie_remove(struct platform_device *pdev) -+{ -+ struct mtk_pcie *pcie = platform_get_drvdata(pdev); -+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); -+ -+ pci_stop_root_bus(host->bus); -+ pci_remove_root_bus(host->bus); -+ mtk_pcie_free_resources(pcie); -+ -+ mtk_pcie_irq_teardown(pcie); -+ -+ mtk_pcie_put_resources(pcie); -+ -+ return 0; -+} -+ -+static int __maybe_unused mtk_pcie_suspend_noirq(struct device *dev) -+{ -+ struct mtk_pcie *pcie = dev_get_drvdata(dev); -+ struct mtk_pcie_port *port; -+ -+ if (list_empty(&pcie->ports)) -+ return 0; -+ -+ list_for_each_entry(port, &pcie->ports, list) { -+ clk_disable_unprepare(port->pipe_ck); -+ clk_disable_unprepare(port->obff_ck); -+ clk_disable_unprepare(port->axi_ck); -+ clk_disable_unprepare(port->aux_ck); -+ clk_disable_unprepare(port->ahb_ck); -+ clk_disable_unprepare(port->sys_ck); -+ phy_power_off(port->phy); -+ phy_exit(port->phy); -+ } -+ -+ clk_disable_unprepare(pcie->free_ck); -+ -+ return 0; -+} -+ -+static int __maybe_unused mtk_pcie_resume_noirq(struct device *dev) -+{ -+ struct mtk_pcie *pcie = dev_get_drvdata(dev); -+ struct mtk_pcie_port *port, *tmp; -+ -+ if (list_empty(&pcie->ports)) -+ return 0; -+ -+ clk_prepare_enable(pcie->free_ck); -+ -+ list_for_each_entry_safe(port, tmp, &pcie->ports, list) -+ mtk_pcie_enable_port(port); -+ -+ /* In case of EP was removed while system suspend. */ -+ if (list_empty(&pcie->ports)) -+ clk_disable_unprepare(pcie->free_ck); -+ -+ return 0; -+} -+ -+static const struct dev_pm_ops mtk_pcie_pm_ops = { -+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mtk_pcie_suspend_noirq, -+ mtk_pcie_resume_noirq) -+}; -+ - static const struct mtk_pcie_soc mtk_pcie_soc_v1 = { - .ops = &mtk_pcie_ops, - .startup = mtk_pcie_startup_port, -@@ -1241,10 +1292,13 @@ static const struct of_device_id mtk_pci - - static struct platform_driver mtk_pcie_driver = { - .probe = mtk_pcie_probe, -+ .remove = mtk_pcie_remove, - .driver = { - .name = "mtk-pcie", - .of_match_table = mtk_pcie_ids, - .suppress_bind_attrs = true, -+ .pm = &mtk_pcie_pm_ops, - }, - }; --builtin_platform_driver(mtk_pcie_driver); -+module_platform_driver(mtk_pcie_driver); -+MODULE_LICENSE("GPL v2"); ---- a/include/linux/clk.h -+++ b/include/linux/clk.h -@@ -349,6 +349,17 @@ int __must_check devm_clk_bulk_get(struc - struct clk *devm_clk_get(struct device *dev, const char *id); - - /** -+ * devm_clk_get_optional - lookup and obtain a managed reference to an optional -+ * clock producer. -+ * @dev: device for clock "consumer" -+ * @id: clock consumer ID -+ * -+ * Behaves the same as devm_clk_get() except where there is no clock producer. -+ * In this case, instead of returning -ENOENT, the function returns NULL. -+ */ -+struct clk *devm_clk_get_optional(struct device *dev, const char *id); -+ -+/** - * devm_get_clk_from_child - lookup and obtain a managed reference to a - * clock producer from child node. - * @dev: device for clock "consumer" diff --git a/target/linux/mediatek/patches-4.19/0227-arm-dts-Add-Unielec-U7623-DTS.patch b/target/linux/mediatek/patches-4.19/0227-arm-dts-Add-Unielec-U7623-DTS.patch deleted file mode 100644 index 7b92141c5f..0000000000 --- a/target/linux/mediatek/patches-4.19/0227-arm-dts-Add-Unielec-U7623-DTS.patch +++ /dev/null @@ -1,396 +0,0 @@ -From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001 -From: Kristian Evensen -Date: Sun, 17 Jun 2018 14:41:47 +0200 -Subject: [PATCH] arm: dts: Add Unielec U7623 DTS - ---- - arch/arm/boot/dts/Makefile | 1 + - .../dts/mt7623a-unielec-u7623-02-emmc-512m.dts | 18 + - .../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 366 +++++++++++++++++++++ - 3 files changed, 385 insertions(+) - create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts - create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -1193,6 +1193,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ - mt7623a-rfb-nand.dtb \ - mt7623n-rfb-emmc.dtb \ - mt7623n-bananapi-bpi-r2.dtb \ -+ mt7623a-unielec-u7623-02-emmc-512m.dtb \ - mt8127-moose.dtb \ - mt8135-evbp1.dtb - dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts -@@ -0,0 +1,18 @@ -+/* -+ * Copyright 2018 Kristian Evensen -+ * -+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ */ -+ -+/dts-v1/; -+#include "mt7623a-unielec-u7623-02-emmc.dtsi" -+ -+/ { -+ model = "UniElec U7623-02 eMMC (512M RAM)"; -+ compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623"; -+ -+ memory@80000000 { -+ device_type = "memory"; -+ reg = <0 0x80000000 0 0x20000000>; -+ }; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi -@@ -0,0 +1,349 @@ -+/* -+ * Copyright 2018 Kristian Evensen -+ * -+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ */ -+ -+#include -+#include "mt7623.dtsi" -+#include "mt6323.dtsi" -+ -+/ { -+ compatible = "unielec,u7623-02-emmc", "mediatek,mt7623"; -+ -+ aliases { -+ serial2 = &uart2; -+ }; -+ -+ chosen { -+ bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs"; -+ stdout-path = "serial2:115200n8"; -+ }; -+ -+ cpus { -+ cpu@0 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ -+ cpu@1 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ -+ cpu@2 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ -+ cpu@3 { -+ proc-supply = <&mt6323_vproc_reg>; -+ }; -+ }; -+ -+ reg_1p8v: regulator-1p8v { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-1.8V"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-3.3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ reg_5v: regulator-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-5V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&key_pins_a>; -+ -+ factory { -+ label = "factory"; -+ linux,code = ; -+ gpios = <&pio 256 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&led_pins_unielec>; -+ -+ led3 { -+ label = "u7623-01:green:led3"; -+ gpios = <&pio 14 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ }; -+ -+ led4 { -+ label = "u7623-01:green:led4"; -+ gpios = <&pio 15 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ }; -+ }; -+ -+ mt7530: switch@0 { -+ compatible = "mediatek,mt7530"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+}; -+ -+&crypto { -+ status = "okay"; -+}; -+ -+ð { -+ status = "okay"; -+ -+ gmac0: mac@0 { -+ compatible = "mediatek,eth-mac"; -+ reg = <0>; -+ phy-mode = "trgmii"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ pause; -+ }; -+ }; -+ -+ mdio: mdio-bus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ phy5: ethernet-phy@5 { -+ reg = <5>; -+ phy-mode = "rgmii-rxid"; -+ }; -+ }; -+}; -+ -+&mt7530 { -+ compatible = "mediatek,mt7530"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0>; -+ pinctrl-names = "default"; -+ mediatek,mcm; -+ resets = <ðsys 2>; -+ reset-names = "mcm"; -+ core-supply = <&mt6323_vpa_reg>; -+ io-supply = <&mt6323_vemc3v3_reg>; -+ -+ dsa,mii-bus = <&mdio>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0>; -+ -+ port@0 { -+ reg = <0>; -+ label = "lan0"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ label = "lan1"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ label = "lan2"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ label = "lan3"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ port@4 { -+ reg = <4>; -+ label = "wan"; -+ cpu = <&cpu_port0>; -+ }; -+ -+ cpu_port0: port@6 { -+ reg = <6>; -+ label = "cpu"; -+ ethernet = <&gmac0>; -+ phy-mode = "trgmii"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+ }; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default", "state_uhs"; -+ pinctrl-0 = <&mmc0_pins_default>; -+ pinctrl-1 = <&mmc0_pins_uhs>; -+ status = "okay"; -+ bus-width = <8>; -+ max-frequency = <50000000>; -+ cap-mmc-highspeed; -+ vmmc-supply = <®_3p3v>; -+ vqmmc-supply = <®_1p8v>; -+ non-removable; -+}; -+ -+&pio { -+ key_pins_a: keys-alt { -+ pins-keys { -+ pinmux = , -+ ; -+ input-enable; -+ }; -+ }; -+ -+ led_pins_unielec: leds-unielec { -+ pins-leds { -+ pinmux = , -+ ; -+ }; -+ }; -+ -+ mmc0_pins_default: mmc0default { -+ pins_cmd_dat { -+ pinmux = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ input-enable; -+ bias-pull-up; -+ }; -+ -+ pins_clk { -+ pinmux = ; -+ bias-pull-down; -+ }; -+ -+ pins_rst { -+ pinmux = ; -+ bias-pull-up; -+ }; -+ }; -+ -+ mmc0_pins_uhs: mmc0 { -+ pins_cmd_dat { -+ pinmux = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ input-enable; -+ drive-strength = ; -+ bias-pull-up = ; -+ }; -+ -+ pins_clk { -+ pinmux = ; -+ drive-strength = ; -+ bias-pull-down = ; -+ }; -+ -+ pins_rst { -+ pinmux = ; -+ bias-pull-up; -+ }; -+ }; -+ -+ pcie_default: pcie_pin_default { -+ pins_cmd_dat { -+ pinmux = , -+ ; -+ bias-disable; -+ }; -+ }; -+}; -+ -+&pwm { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm_pins_a>; -+ status = "okay"; -+}; -+ -+&pwrap { -+ mt6323 { -+ mt6323led: led { -+ compatible = "mediatek,mt6323-led"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ led@0 { -+ reg = <0>; -+ label = "led0"; -+ default-state = "off"; -+ }; -+ }; -+ }; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2_pins_b>; -+ status = "okay"; -+}; -+ -+&usb1 { -+ vusb33-supply = <®_3p3v>; -+ vbus-supply = <®_3p3v>; -+ status = "okay"; -+}; -+ -+&u3phy1 { -+ status = "okay"; -+}; -+ -+&u3phy2 { -+ status = "okay"; -+ mediatek,phy-switch = <&hifsys>; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_default>; -+ status = "okay"; -+ -+ pcie@1,0 { -+ status = "okay"; -+ }; -+ -+ pcie@2,0 { -+ status = "okay"; -+ }; -+}; -+ -+&pcie1_phy { -+ status = "okay"; -+}; -+ diff --git a/target/linux/mediatek/patches-4.19/0228-arm-dts-bpir2-fix-console.patch b/target/linux/mediatek/patches-4.19/0228-arm-dts-bpir2-fix-console.patch deleted file mode 100644 index b7251177f2..0000000000 --- a/target/linux/mediatek/patches-4.19/0228-arm-dts-bpir2-fix-console.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts -+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts -@@ -19,6 +19,7 @@ - - chosen { - stdout-path = "serial2:115200n8"; -+ bootargs = "console=ttyS2,115200n8"; - }; - - cpus { diff --git a/target/linux/mediatek/patches-4.19/0301-mtd-mtk-ecc-move-mtk-ecc-header-file-to-include-mtd.patch b/target/linux/mediatek/patches-4.19/0301-mtd-mtk-ecc-move-mtk-ecc-header-file-to-include-mtd.patch deleted file mode 100644 index 2f82a130c3..0000000000 --- a/target/linux/mediatek/patches-4.19/0301-mtd-mtk-ecc-move-mtk-ecc-header-file-to-include-mtd.patch +++ /dev/null @@ -1,141 +0,0 @@ -From a2479dc254ebe31c84fbcfda73f35e2321576494 Mon Sep 17 00:00:00 2001 -From: Xiangsheng Hou -Date: Tue, 19 Mar 2019 13:57:38 +0800 -Subject: [PATCH 1/6] mtd: mtk ecc: move mtk ecc header file to include/mtd - -Change-Id: I8dc1d30e21b40d68ef5efd9587012f82970156a5 -Signed-off-by: Xiangsheng Hou ---- - drivers/mtd/nand/raw/mtk_ecc.c | 3 +-- - drivers/mtd/nand/raw/mtk_nand.c | 2 +- - {drivers/mtd/nand/raw => include/linux/mtd}/mtk_ecc.h | 0 - 3 files changed, 2 insertions(+), 3 deletions(-) - rename {drivers/mtd/nand/raw => include/linux/mtd}/mtk_ecc.h (100%) - ---- a/drivers/mtd/nand/raw/mtk_ecc.c -+++ b/drivers/mtd/nand/raw/mtk_ecc.c -@@ -23,8 +23,7 @@ - #include - #include - #include -- --#include "mtk_ecc.h" -+#include - - #define ECC_IDLE_MASK BIT(0) - #define ECC_IRQ_EN BIT(0) ---- a/drivers/mtd/nand/raw/mtk_nand.c -+++ b/drivers/mtd/nand/raw/mtk_nand.c -@@ -25,7 +25,7 @@ - #include - #include - #include --#include "mtk_ecc.h" -+#include - - /* NAND controller register definition */ - #define NFI_CNFG (0x00) ---- a/drivers/mtd/nand/raw/mtk_ecc.h -+++ /dev/null -@@ -1,49 +0,0 @@ --/* -- * MTK SDG1 ECC controller -- * -- * Copyright (c) 2016 Mediatek -- * Authors: Xiaolei Li -- * Jorge Ramirez-Ortiz -- * This program is free software; you can redistribute it and/or modify it -- * under the terms of the GNU General Public License version 2 as published -- * by the Free Software Foundation. -- */ -- --#ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__ --#define __DRIVERS_MTD_NAND_MTK_ECC_H__ -- --#include -- --enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1}; --enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE}; -- --struct device_node; --struct mtk_ecc; -- --struct mtk_ecc_stats { -- u32 corrected; -- u32 bitflips; -- u32 failed; --}; -- --struct mtk_ecc_config { -- enum mtk_ecc_operation op; -- enum mtk_ecc_mode mode; -- dma_addr_t addr; -- u32 strength; -- u32 sectors; -- u32 len; --}; -- --int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32); --void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int); --int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation); --int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *); --void mtk_ecc_disable(struct mtk_ecc *); --void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p); --unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc); -- --struct mtk_ecc *of_mtk_ecc_get(struct device_node *); --void mtk_ecc_release(struct mtk_ecc *); -- --#endif ---- /dev/null -+++ b/include/linux/mtd/mtk_ecc.h -@@ -0,0 +1,49 @@ -+/* -+ * MTK SDG1 ECC controller -+ * -+ * Copyright (c) 2016 Mediatek -+ * Authors: Xiaolei Li -+ * Jorge Ramirez-Ortiz -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__ -+#define __DRIVERS_MTD_NAND_MTK_ECC_H__ -+ -+#include -+ -+enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1}; -+enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE}; -+ -+struct device_node; -+struct mtk_ecc; -+ -+struct mtk_ecc_stats { -+ u32 corrected; -+ u32 bitflips; -+ u32 failed; -+}; -+ -+struct mtk_ecc_config { -+ enum mtk_ecc_operation op; -+ enum mtk_ecc_mode mode; -+ dma_addr_t addr; -+ u32 strength; -+ u32 sectors; -+ u32 len; -+}; -+ -+int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32); -+void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int); -+int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation); -+int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *); -+void mtk_ecc_disable(struct mtk_ecc *); -+void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p); -+unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc); -+ -+struct mtk_ecc *of_mtk_ecc_get(struct device_node *); -+void mtk_ecc_release(struct mtk_ecc *); -+ -+#endif diff --git a/target/linux/mediatek/patches-4.19/0303-mtd-spinand-disable-on-die-ECC.patch b/target/linux/mediatek/patches-4.19/0303-mtd-spinand-disable-on-die-ECC.patch deleted file mode 100644 index cdf214688c..0000000000 --- a/target/linux/mediatek/patches-4.19/0303-mtd-spinand-disable-on-die-ECC.patch +++ /dev/null @@ -1,31 +0,0 @@ -From b341f120cfc9ca1dfd48364b7f36ac2c1fbdea43 Mon Sep 17 00:00:00 2001 -From: Xiangsheng Hou -Date: Wed, 3 Apr 2019 16:30:01 +0800 -Subject: [PATCH 3/6] mtd: spinand: disable on-die ECC - -Change-Id: I9745adaed5295202fabbe8ab8947885c57a5b847 -Signed-off-by: Xiangsheng Hou ---- - drivers/mtd/nand/spi/core.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/mtd/nand/spi/core.c -+++ b/drivers/mtd/nand/spi/core.c -@@ -552,7 +552,7 @@ static int spinand_mtd_read(struct mtd_i - int ret = 0; - - if (ops->mode != MTD_OPS_RAW && spinand->eccinfo.ooblayout) -- enable_ecc = true; -+ enable_ecc = false; - - mutex_lock(&spinand->lock); - -@@ -600,7 +600,7 @@ static int spinand_mtd_write(struct mtd_ - int ret = 0; - - if (ops->mode != MTD_OPS_RAW && mtd->ooblayout) -- enable_ecc = true; -+ enable_ecc = false; - - mutex_lock(&spinand->lock); - diff --git a/target/linux/mediatek/patches-4.19/0304-dt-bindings-ARM-MediaTek-Document-devicetree-binding.patch b/target/linux/mediatek/patches-4.19/0304-dt-bindings-ARM-MediaTek-Document-devicetree-binding.patch deleted file mode 100644 index 29c4b951e6..0000000000 --- a/target/linux/mediatek/patches-4.19/0304-dt-bindings-ARM-MediaTek-Document-devicetree-binding.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 28ec0b7e48bb27435a8b3134019b88628faf497f Mon Sep 17 00:00:00 2001 -From: Xiangsheng Hou -Date: Tue, 11 Dec 2018 17:37:28 +0800 -Subject: [PATCH 4/6] dt-bindings: ARM: MediaTek: Document devicetree bindings - for SPI NAND interface - -Change-Id: I9ece142055ae27100da95826fb3ea1960c2994e6 -Signed-off-by: Xiangsheng Hou ---- - .../devicetree/bindings/spi/spi-mtk-snfi.txt | 44 +++++++++++++++++++ - 1 file changed, 44 insertions(+) - create mode 100644 Documentation/devicetree/bindings/spi/spi-mtk-snfi.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/spi/spi-mtk-snfi.txt -@@ -0,0 +1,44 @@ -+MediaTek SoCs SPI NAND FLASH interface (SNFI) DT binding -+ -+This file documents the device tree bindings for MTK SoCs SPI NAND controller. -+Note that Parallel Nand and SPI NAND is alternative on MTK SoCs. -+ -+Required properties: -+- compatible: should be "mediatek,mt7622-snfi" -+- reg: base physical address and size of SNFI. -+- interrupts: interrupts of SNFI. -+- clocks: SNFI required clocks. -+- clock-names: SNFI clocks internal names. -+- #address-cells: NAND chip index, should be 1. -+- #size-cells: Should be 0. -+ -+Example: -+ snfi: spi@1100d000 { -+ compatible = "mediatek,mt7622-snfi"; -+ reg = <0 0x1100d000 0 0x1000>; -+ interrupts = ; -+ clocks = <&pericfg CLK_PERI_NFI_PD>, -+ <&pericfg CLK_PERI_SNFI_PD>; -+ clock-names = "nfi_clk", "spi_clk"; -+ ecc-engine = <&bch>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+Subnodes properties: -+- Should use spi-nand framework, see Documentation/devicetree/bindings/mtd/spi-nand.txt -+ -+Example: -+&snfi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&serial_nand_pins>; -+ status = "okay"; -+ -+ spi_nand@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "spi-nand"; -+ spi-max-frequency = <104000000>; -+ reg = <0>; -+ }; -+}; diff --git a/target/linux/mediatek/patches-4.19/0306-spi-spi-mem-MediaTek-Add-SPI-NAND-Flash-interface-dr.patch b/target/linux/mediatek/patches-4.19/0306-spi-spi-mem-MediaTek-Add-SPI-NAND-Flash-interface-dr.patch deleted file mode 100644 index 2370925372..0000000000 --- a/target/linux/mediatek/patches-4.19/0306-spi-spi-mem-MediaTek-Add-SPI-NAND-Flash-interface-dr.patch +++ /dev/null @@ -1,1229 +0,0 @@ -From 1ecb38eabd90efe93957d0a822a167560c39308a Mon Sep 17 00:00:00 2001 -From: Xiangsheng Hou -Date: Wed, 20 Mar 2019 16:19:51 +0800 -Subject: [PATCH 6/6] spi: spi-mem: MediaTek: Add SPI NAND Flash interface - driver for MediaTek MT7622 - -Change-Id: I3e78406bb9b46b0049d3988a5c71c7069e4f809c -Signed-off-by: Xiangsheng Hou ---- - drivers/spi/Kconfig | 9 + - drivers/spi/Makefile | 1 + - drivers/spi/spi-mtk-snfi.c | 1183 ++++++++++++++++++++++++++++++++++++ - 3 files changed, 1193 insertions(+) - create mode 100644 drivers/spi/spi-mtk-snfi.c - ---- /dev/null -+++ b/drivers/spi/spi-mtk-snfi.c -@@ -0,0 +1,1183 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Driver for MediaTek SPI Nand interface -+ * -+ * Copyright (C) 2018 MediaTek Inc. -+ * Authors: Xiangsheng Hou -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* NAND controller register definition */ -+/* NFI control */ -+#define NFI_CNFG 0x00 -+#define CNFG_DMA BIT(0) -+#define CNFG_READ_EN BIT(1) -+#define CNFG_DMA_BURST_EN BIT(2) -+#define CNFG_BYTE_RW BIT(6) -+#define CNFG_HW_ECC_EN BIT(8) -+#define CNFG_AUTO_FMT_EN BIT(9) -+#define CNFG_OP_PROGRAM (3UL << 12) -+#define CNFG_OP_CUST (6UL << 12) -+#define NFI_PAGEFMT 0x04 -+#define PAGEFMT_512 0 -+#define PAGEFMT_2K 1 -+#define PAGEFMT_4K 2 -+#define PAGEFMT_FDM_SHIFT 8 -+#define PAGEFMT_FDM_ECC_SHIFT 12 -+#define NFI_CON 0x08 -+#define CON_FIFO_FLUSH BIT(0) -+#define CON_NFI_RST BIT(1) -+#define CON_BRD BIT(8) -+#define CON_BWR BIT(9) -+#define CON_SEC_SHIFT 12 -+#define NFI_INTR_EN 0x10 -+#define INTR_AHB_DONE_EN BIT(6) -+#define NFI_INTR_STA 0x14 -+#define NFI_CMD 0x20 -+#define NFI_STA 0x60 -+#define STA_EMP_PAGE BIT(12) -+#define NAND_FSM_MASK (0x1f << 24) -+#define NFI_FSM_MASK (0xf << 16) -+#define NFI_ADDRCNTR 0x70 -+#define CNTR_MASK GENMASK(16, 12) -+#define ADDRCNTR_SEC_SHIFT 12 -+#define ADDRCNTR_SEC(val) \ -+ (((val) & CNTR_MASK) >> ADDRCNTR_SEC_SHIFT) -+#define NFI_STRADDR 0x80 -+#define NFI_BYTELEN 0x84 -+#define NFI_CSEL 0x90 -+#define NFI_FDML(x) (0xa0 + (x) * sizeof(u32) * 2) -+#define NFI_FDMM(x) (0xa4 + (x) * sizeof(u32) * 2) -+#define NFI_MASTER_STA 0x224 -+#define MASTER_STA_MASK 0x0fff -+/* NFI_SPI control */ -+#define SNFI_MAC_OUTL 0x504 -+#define SNFI_MAC_INL 0x508 -+#define SNFI_RD_CTL2 0x510 -+#define RD_CMD_MASK 0x00ff -+#define RD_DUMMY_SHIFT 8 -+#define SNFI_RD_CTL3 0x514 -+#define RD_ADDR_MASK 0xffff -+#define SNFI_MISC_CTL 0x538 -+#define RD_MODE_X2 BIT(16) -+#define RD_MODE_X4 (2UL << 16) -+#define RD_QDUAL_IO (4UL << 16) -+#define RD_MODE_MASK (7UL << 16) -+#define RD_CUSTOM_EN BIT(6) -+#define WR_CUSTOM_EN BIT(7) -+#define WR_X4_EN BIT(20) -+#define SW_RST BIT(28) -+#define SNFI_MISC_CTL2 0x53c -+#define WR_LEN_SHIFT 16 -+#define SNFI_PG_CTL1 0x524 -+#define WR_LOAD_CMD_SHIFT 8 -+#define SNFI_PG_CTL2 0x528 -+#define WR_LOAD_ADDR_MASK 0xffff -+#define SNFI_MAC_CTL 0x500 -+#define MAC_WIP BIT(0) -+#define MAC_WIP_READY BIT(1) -+#define MAC_TRIG BIT(2) -+#define MAC_EN BIT(3) -+#define MAC_SIO_SEL BIT(4) -+#define SNFI_STA_CTL1 0x550 -+#define SPI_STATE_IDLE 0xf -+#define SNFI_CNFG 0x55c -+#define SNFI_MODE_EN BIT(0) -+#define SNFI_GPRAM_DATA 0x800 -+#define SNFI_GPRAM_MAX_LEN 16 -+ -+/* Dummy command trigger NFI to spi mode */ -+#define NAND_CMD_DUMMYREAD 0x00 -+#define NAND_CMD_DUMMYPROG 0x80 -+ -+#define MTK_TIMEOUT 500000 -+#define MTK_RESET_TIMEOUT 1000000 -+#define MTK_SNFC_MIN_SPARE 16 -+#define KB(x) ((x) * 1024UL) -+ -+/* -+ * supported spare size of each IP. -+ * order should be the same with the spare size bitfiled defination of -+ * register NFI_PAGEFMT. -+ */ -+static const u8 spare_size_mt7622[] = { -+ 16, 26, 27, 28 -+}; -+ -+struct mtk_snfi_caps { -+ const u8 *spare_size; -+ u8 num_spare_size; -+ u32 nand_sec_size; -+ u8 nand_fdm_size; -+ u8 nand_fdm_ecc_size; -+ u8 ecc_parity_bits; -+ u8 pageformat_spare_shift; -+ u8 bad_mark_swap; -+}; -+ -+struct mtk_snfi_bad_mark_ctl { -+ void (*bm_swap)(struct spi_mem *mem, u8 *buf, int raw); -+ u32 sec; -+ u32 pos; -+}; -+ -+struct mtk_snfi_nand_chip { -+ struct mtk_snfi_bad_mark_ctl bad_mark; -+ u32 spare_per_sector; -+}; -+ -+struct mtk_snfi_clk { -+ struct clk *nfi_clk; -+ struct clk *spi_clk; -+}; -+ -+struct mtk_snfi { -+ const struct mtk_snfi_caps *caps; -+ struct mtk_snfi_nand_chip snfi_nand; -+ struct mtk_snfi_clk clk; -+ struct mtk_ecc_config ecc_cfg; -+ struct mtk_ecc *ecc; -+ struct completion done; -+ struct device *dev; -+ -+ void __iomem *regs; -+ -+ u8 *buffer; -+}; -+ -+static inline u8 *oob_ptr(struct spi_mem *mem, int i) -+{ -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ u8 *poi; -+ -+ /* map the sector's FDM data to free oob: -+ * the beginning of the oob area stores the FDM data of bad mark -+ */ -+ -+ if (i < snfi_nand->bad_mark.sec) -+ poi = spinand->oobbuf + (i + 1) * snfi->caps->nand_fdm_size; -+ else if (i == snfi_nand->bad_mark.sec) -+ poi = spinand->oobbuf; -+ else -+ poi = spinand->oobbuf + i * snfi->caps->nand_fdm_size; -+ -+ return poi; -+} -+ -+static inline int mtk_data_len(struct spi_mem *mem) -+{ -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ -+ return snfi->caps->nand_sec_size + snfi_nand->spare_per_sector; -+} -+ -+static inline u8 *mtk_oob_ptr(struct spi_mem *mem, -+ const u8 *p, int i) -+{ -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ -+ return (u8 *)p + i * mtk_data_len(mem) + snfi->caps->nand_sec_size; -+} -+ -+static void mtk_snfi_bad_mark_swap(struct spi_mem *mem, -+ u8 *buf, int raw) -+{ -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ u32 bad_pos = snfi_nand->bad_mark.pos; -+ -+ if (raw) -+ bad_pos += snfi_nand->bad_mark.sec * mtk_data_len(mem); -+ else -+ bad_pos += snfi_nand->bad_mark.sec * snfi->caps->nand_sec_size; -+ -+ swap(spinand->oobbuf[0], buf[bad_pos]); -+} -+ -+static void mtk_snfi_set_bad_mark_ctl(struct mtk_snfi_bad_mark_ctl *bm_ctl, -+ struct spi_mem *mem) -+{ -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ -+ bm_ctl->bm_swap = mtk_snfi_bad_mark_swap; -+ bm_ctl->sec = mtd->writesize / mtk_data_len(mem); -+ bm_ctl->pos = mtd->writesize % mtk_data_len(mem); -+} -+ -+static void mtk_snfi_mac_enable(struct mtk_snfi *snfi) -+{ -+ u32 mac; -+ -+ mac = readl(snfi->regs + SNFI_MAC_CTL); -+ mac &= ~MAC_SIO_SEL; -+ mac |= MAC_EN; -+ -+ writel(mac, snfi->regs + SNFI_MAC_CTL); -+} -+ -+static int mtk_snfi_mac_trigger(struct mtk_snfi *snfi) -+{ -+ u32 mac, reg; -+ int ret = 0; -+ -+ mac = readl(snfi->regs + SNFI_MAC_CTL); -+ mac |= MAC_TRIG; -+ writel(mac, snfi->regs + SNFI_MAC_CTL); -+ -+ ret = readl_poll_timeout_atomic(snfi->regs + SNFI_MAC_CTL, reg, -+ reg & MAC_WIP_READY, 10, -+ MTK_TIMEOUT); -+ if (ret < 0) { -+ dev_err(snfi->dev, "polling wip ready for read timeout\n"); -+ return -EIO; -+ } -+ -+ ret = readl_poll_timeout_atomic(snfi->regs + SNFI_MAC_CTL, reg, -+ !(reg & MAC_WIP), 10, -+ MTK_TIMEOUT); -+ if (ret < 0) { -+ dev_err(snfi->dev, "polling flash update timeout\n"); -+ return -EIO; -+ } -+ -+ return ret; -+} -+ -+static void mtk_snfi_mac_leave(struct mtk_snfi *snfi) -+{ -+ u32 mac; -+ -+ mac = readl(snfi->regs + SNFI_MAC_CTL); -+ mac &= ~(MAC_TRIG | MAC_EN | MAC_SIO_SEL); -+ writel(mac, snfi->regs + SNFI_MAC_CTL); -+} -+ -+static int mtk_snfi_mac_op(struct mtk_snfi *snfi) -+{ -+ int ret = 0; -+ -+ mtk_snfi_mac_enable(snfi); -+ -+ ret = mtk_snfi_mac_trigger(snfi); -+ if (ret) -+ return ret; -+ -+ mtk_snfi_mac_leave(snfi); -+ -+ return ret; -+} -+ -+static irqreturn_t mtk_snfi_irq(int irq, void *id) -+{ -+ struct mtk_snfi *snfi = id; -+ u16 sta, ien; -+ -+ sta = readw(snfi->regs + NFI_INTR_STA); -+ ien = readw(snfi->regs + NFI_INTR_EN); -+ -+ if (!(sta & ien)) -+ return IRQ_NONE; -+ -+ writew(~sta & ien, snfi->regs + NFI_INTR_EN); -+ complete(&snfi->done); -+ -+ return IRQ_HANDLED; -+} -+ -+static int mtk_snfi_enable_clk(struct device *dev, struct mtk_snfi_clk *clk) -+{ -+ int ret; -+ -+ ret = clk_prepare_enable(clk->nfi_clk); -+ if (ret) { -+ dev_err(dev, "failed to enable nfi clk\n"); -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(clk->spi_clk); -+ if (ret) { -+ dev_err(dev, "failed to enable spi clk\n"); -+ clk_disable_unprepare(clk->nfi_clk); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void mtk_snfi_disable_clk(struct mtk_snfi_clk *clk) -+{ -+ clk_disable_unprepare(clk->nfi_clk); -+ clk_disable_unprepare(clk->spi_clk); -+} -+ -+static int mtk_snfi_reset(struct mtk_snfi *snfi) -+{ -+ u32 val; -+ int ret; -+ -+ /* SW reset controller */ -+ val = readl(snfi->regs + SNFI_MISC_CTL) | SW_RST; -+ writel(val, snfi->regs + SNFI_MISC_CTL); -+ -+ ret = readw_poll_timeout(snfi->regs + SNFI_STA_CTL1, val, -+ !(val & SPI_STATE_IDLE), 50, -+ MTK_RESET_TIMEOUT); -+ if (ret) { -+ dev_warn(snfi->dev, "spi state active in reset [0x%x] = 0x%x\n", -+ SNFI_STA_CTL1, val); -+ return ret; -+ } -+ -+ val = readl(snfi->regs + SNFI_MISC_CTL); -+ val &= ~SW_RST; -+ writel(val, snfi->regs + SNFI_MISC_CTL); -+ -+ /* reset all registers and force the NFI master to terminate */ -+ writew(CON_FIFO_FLUSH | CON_NFI_RST, snfi->regs + NFI_CON); -+ ret = readw_poll_timeout(snfi->regs + NFI_STA, val, -+ !(val & (NFI_FSM_MASK | NAND_FSM_MASK)), 50, -+ MTK_RESET_TIMEOUT); -+ if (ret) { -+ dev_warn(snfi->dev, "nfi active in reset [0x%x] = 0x%x\n", -+ NFI_STA, val); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int mtk_snfi_set_spare_per_sector(struct spinand_device *spinand, -+ const struct mtk_snfi_caps *caps, -+ u32 *sps) -+{ -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ const u8 *spare = caps->spare_size; -+ u32 sectors, i, closest_spare = 0; -+ -+ sectors = mtd->writesize / caps->nand_sec_size; -+ *sps = mtd->oobsize / sectors; -+ -+ if (*sps < MTK_SNFC_MIN_SPARE) -+ return -EINVAL; -+ -+ for (i = 0; i < caps->num_spare_size; i++) { -+ if (*sps >= spare[i] && spare[i] >= spare[closest_spare]) { -+ closest_spare = i; -+ if (*sps == spare[i]) -+ break; -+ } -+ } -+ -+ *sps = spare[closest_spare]; -+ -+ return 0; -+} -+ -+static void mtk_snfi_read_fdm_data(struct spi_mem *mem, -+ u32 sectors) -+{ -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ const struct mtk_snfi_caps *caps = snfi->caps; -+ u32 vall, valm; -+ int i, j; -+ u8 *oobptr; -+ -+ for (i = 0; i < sectors; i++) { -+ oobptr = oob_ptr(mem, i); -+ vall = readl(snfi->regs + NFI_FDML(i)); -+ valm = readl(snfi->regs + NFI_FDMM(i)); -+ -+ for (j = 0; j < caps->nand_fdm_size; j++) -+ oobptr[j] = (j >= 4 ? valm : vall) >> ((j % 4) * 8); -+ } -+} -+ -+static void mtk_snfi_write_fdm_data(struct spi_mem *mem, -+ u32 sectors) -+{ -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ const struct mtk_snfi_caps *caps = snfi->caps; -+ u32 vall, valm; -+ int i, j; -+ u8 *oobptr; -+ -+ for (i = 0; i < sectors; i++) { -+ oobptr = oob_ptr(mem, i); -+ vall = 0; -+ valm = 0; -+ for (j = 0; j < 8; j++) { -+ if (j < 4) -+ vall |= (j < caps->nand_fdm_size ? oobptr[j] : -+ 0xff) << (j * 8); -+ else -+ valm |= (j < caps->nand_fdm_size ? oobptr[j] : -+ 0xff) << ((j - 4) * 8); -+ } -+ writel(vall, snfi->regs + NFI_FDML(i)); -+ writel(valm, snfi->regs + NFI_FDMM(i)); -+ } -+} -+ -+static int mtk_snfi_update_ecc_stats(struct spi_mem *mem, -+ u8 *buf, u32 sectors) -+{ -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct mtk_ecc_stats stats; -+ int rc, i; -+ -+ rc = readl(snfi->regs + NFI_STA) & STA_EMP_PAGE; -+ if (rc) { -+ memset(buf, 0xff, sectors * snfi->caps->nand_sec_size); -+ for (i = 0; i < sectors; i++) -+ memset(spinand->oobbuf, 0xff, -+ snfi->caps->nand_fdm_size); -+ return 0; -+ } -+ -+ mtk_ecc_get_stats(snfi->ecc, &stats, sectors); -+ mtd->ecc_stats.corrected += stats.corrected; -+ mtd->ecc_stats.failed += stats.failed; -+ -+ return 0; -+} -+ -+static int mtk_snfi_hw_runtime_config(struct spi_mem *mem) -+{ -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ struct nand_device *nand = mtd_to_nanddev(mtd); -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ const struct mtk_snfi_caps *caps = snfi->caps; -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ u32 fmt, spare, i = 0; -+ int ret; -+ -+ ret = mtk_snfi_set_spare_per_sector(spinand, caps, &spare); -+ if (ret) -+ return ret; -+ -+ /* calculate usable oob bytes for ecc parity data */ -+ snfi_nand->spare_per_sector = spare; -+ spare -= caps->nand_fdm_size; -+ -+ nand->memorg.oobsize = snfi_nand->spare_per_sector -+ * (mtd->writesize / caps->nand_sec_size); -+ mtd->oobsize = nanddev_per_page_oobsize(nand); -+ -+ snfi->ecc_cfg.strength = (spare << 3) / caps->ecc_parity_bits; -+ mtk_ecc_adjust_strength(snfi->ecc, &snfi->ecc_cfg.strength); -+ -+ switch (mtd->writesize) { -+ case 512: -+ fmt = PAGEFMT_512; -+ break; -+ case KB(2): -+ fmt = PAGEFMT_2K; -+ break; -+ case KB(4): -+ fmt = PAGEFMT_4K; -+ break; -+ default: -+ dev_err(snfi->dev, "invalid page len: %d\n", mtd->writesize); -+ return -EINVAL; -+ } -+ -+ /* Setup PageFormat */ -+ while (caps->spare_size[i] != snfi_nand->spare_per_sector) { -+ i++; -+ if (i == (caps->num_spare_size - 1)) { -+ dev_err(snfi->dev, "invalid spare size %d\n", -+ snfi_nand->spare_per_sector); -+ return -EINVAL; -+ } -+ } -+ -+ fmt |= i << caps->pageformat_spare_shift; -+ fmt |= caps->nand_fdm_size << PAGEFMT_FDM_SHIFT; -+ fmt |= caps->nand_fdm_ecc_size << PAGEFMT_FDM_ECC_SHIFT; -+ writel(fmt, snfi->regs + NFI_PAGEFMT); -+ -+ snfi->ecc_cfg.len = caps->nand_sec_size + caps->nand_fdm_ecc_size; -+ -+ mtk_snfi_set_bad_mark_ctl(&snfi_nand->bad_mark, mem); -+ -+ return 0; -+} -+ -+static int mtk_snfi_read_from_cache(struct spi_mem *mem, -+ const struct spi_mem_op *op, int oob_on) -+{ -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ u32 sectors = mtd->writesize / snfi->caps->nand_sec_size; -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ u32 reg, len, col_addr = 0; -+ int dummy_cycle, ret; -+ dma_addr_t dma_addr; -+ -+ len = sectors * (snfi->caps->nand_sec_size -+ + snfi_nand->spare_per_sector); -+ -+ dma_addr = dma_map_single(snfi->dev, snfi->buffer, -+ len, DMA_FROM_DEVICE); -+ ret = dma_mapping_error(snfi->dev, dma_addr); -+ if (ret) { -+ dev_err(snfi->dev, "dma mapping error\n"); -+ return -EINVAL; -+ } -+ -+ /* set Read cache command and dummy cycle */ -+ dummy_cycle = (op->dummy.nbytes << 3) >> (ffs(op->dummy.buswidth) - 1); -+ reg = ((op->cmd.opcode & RD_CMD_MASK) | -+ (dummy_cycle << RD_DUMMY_SHIFT)); -+ writel(reg, snfi->regs + SNFI_RD_CTL2); -+ -+ writel((col_addr & RD_ADDR_MASK), snfi->regs + SNFI_RD_CTL3); -+ -+ reg = readl(snfi->regs + SNFI_MISC_CTL); -+ reg |= RD_CUSTOM_EN; -+ reg &= ~(RD_MODE_MASK | WR_X4_EN); -+ -+ /* set data and addr buswidth */ -+ if (op->data.buswidth == 4) -+ reg |= RD_MODE_X4; -+ else if (op->data.buswidth == 2) -+ reg |= RD_MODE_X2; -+ -+ if (op->addr.buswidth == 4 || op->addr.buswidth == 2) -+ reg |= RD_QDUAL_IO; -+ writel(reg, snfi->regs + SNFI_MISC_CTL); -+ -+ writel(len, snfi->regs + SNFI_MISC_CTL2); -+ writew(sectors << CON_SEC_SHIFT, snfi->regs + NFI_CON); -+ reg = readw(snfi->regs + NFI_CNFG); -+ reg |= CNFG_READ_EN | CNFG_DMA_BURST_EN | CNFG_DMA | CNFG_OP_CUST; -+ -+ if (!oob_on) { -+ reg |= CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN; -+ writew(reg, snfi->regs + NFI_CNFG); -+ -+ snfi->ecc_cfg.mode = ECC_NFI_MODE; -+ snfi->ecc_cfg.sectors = sectors; -+ snfi->ecc_cfg.op = ECC_DECODE; -+ ret = mtk_ecc_enable(snfi->ecc, &snfi->ecc_cfg); -+ if (ret) { -+ dev_err(snfi->dev, "ecc enable failed\n"); -+ /* clear NFI_CNFG */ -+ reg &= ~(CNFG_READ_EN | CNFG_DMA_BURST_EN | CNFG_DMA | -+ CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN); -+ writew(reg, snfi->regs + NFI_CNFG); -+ goto out; -+ } -+ } else { -+ writew(reg, snfi->regs + NFI_CNFG); -+ } -+ -+ writel(lower_32_bits(dma_addr), snfi->regs + NFI_STRADDR); -+ readw(snfi->regs + NFI_INTR_STA); -+ writew(INTR_AHB_DONE_EN, snfi->regs + NFI_INTR_EN); -+ -+ init_completion(&snfi->done); -+ -+ /* set dummy command to trigger NFI enter SPI mode */ -+ writew(NAND_CMD_DUMMYREAD, snfi->regs + NFI_CMD); -+ reg = readl(snfi->regs + NFI_CON) | CON_BRD; -+ writew(reg, snfi->regs + NFI_CON); -+ -+ ret = wait_for_completion_timeout(&snfi->done, msecs_to_jiffies(500)); -+ if (!ret) { -+ dev_err(snfi->dev, "read ahb done timeout\n"); -+ writew(0, snfi->regs + NFI_INTR_EN); -+ ret = -ETIMEDOUT; -+ goto out; -+ } -+ -+ ret = readl_poll_timeout_atomic(snfi->regs + NFI_BYTELEN, reg, -+ ADDRCNTR_SEC(reg) >= sectors, 10, -+ MTK_TIMEOUT); -+ if (ret < 0) { -+ dev_err(snfi->dev, "polling read byte len timeout\n"); -+ ret = -EIO; -+ } else { -+ if (!oob_on) { -+ ret = mtk_ecc_wait_done(snfi->ecc, ECC_DECODE); -+ if (ret) { -+ dev_warn(snfi->dev, "wait ecc done timeout\n"); -+ } else { -+ mtk_snfi_update_ecc_stats(mem, snfi->buffer, -+ sectors); -+ mtk_snfi_read_fdm_data(mem, sectors); -+ } -+ } -+ } -+ -+ if (oob_on) -+ goto out; -+ -+ mtk_ecc_disable(snfi->ecc); -+out: -+ dma_unmap_single(snfi->dev, dma_addr, len, DMA_FROM_DEVICE); -+ writel(0, snfi->regs + NFI_CON); -+ writel(0, snfi->regs + NFI_CNFG); -+ reg = readl(snfi->regs + SNFI_MISC_CTL); -+ reg &= ~RD_CUSTOM_EN; -+ writel(reg, snfi->regs + SNFI_MISC_CTL); -+ -+ return ret; -+} -+ -+static int mtk_snfi_write_to_cache(struct spi_mem *mem, -+ const struct spi_mem_op *op, -+ int oob_on) -+{ -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ u32 sectors = mtd->writesize / snfi->caps->nand_sec_size; -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ u32 reg, len, col_addr = 0; -+ dma_addr_t dma_addr; -+ int ret; -+ -+ len = sectors * (snfi->caps->nand_sec_size -+ + snfi_nand->spare_per_sector); -+ -+ dma_addr = dma_map_single(snfi->dev, snfi->buffer, len, -+ DMA_TO_DEVICE); -+ ret = dma_mapping_error(snfi->dev, dma_addr); -+ if (ret) { -+ dev_err(snfi->dev, "dma mapping error\n"); -+ return -EINVAL; -+ } -+ -+ /* set program load cmd and address */ -+ reg = (op->cmd.opcode << WR_LOAD_CMD_SHIFT); -+ writel(reg, snfi->regs + SNFI_PG_CTL1); -+ writel(col_addr & WR_LOAD_ADDR_MASK, snfi->regs + SNFI_PG_CTL2); -+ -+ reg = readl(snfi->regs + SNFI_MISC_CTL); -+ reg |= WR_CUSTOM_EN; -+ reg &= ~(RD_MODE_MASK | WR_X4_EN); -+ -+ if (op->data.buswidth == 4) -+ reg |= WR_X4_EN; -+ writel(reg, snfi->regs + SNFI_MISC_CTL); -+ -+ writel(len << WR_LEN_SHIFT, snfi->regs + SNFI_MISC_CTL2); -+ writew(sectors << CON_SEC_SHIFT, snfi->regs + NFI_CON); -+ -+ reg = readw(snfi->regs + NFI_CNFG); -+ reg &= ~(CNFG_READ_EN | CNFG_BYTE_RW); -+ reg |= CNFG_DMA | CNFG_DMA_BURST_EN | CNFG_OP_PROGRAM; -+ -+ if (!oob_on) { -+ reg |= CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN; -+ writew(reg, snfi->regs + NFI_CNFG); -+ -+ snfi->ecc_cfg.mode = ECC_NFI_MODE; -+ snfi->ecc_cfg.op = ECC_ENCODE; -+ ret = mtk_ecc_enable(snfi->ecc, &snfi->ecc_cfg); -+ if (ret) { -+ dev_err(snfi->dev, "ecc enable failed\n"); -+ /* clear NFI_CNFG */ -+ reg &= ~(CNFG_DMA_BURST_EN | CNFG_DMA | -+ CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN); -+ writew(reg, snfi->regs + NFI_CNFG); -+ dma_unmap_single(snfi->dev, dma_addr, len, -+ DMA_FROM_DEVICE); -+ goto out; -+ } -+ /* write OOB into the FDM registers (OOB area in MTK NAND) */ -+ mtk_snfi_write_fdm_data(mem, sectors); -+ } else { -+ writew(reg, snfi->regs + NFI_CNFG); -+ } -+ writel(lower_32_bits(dma_addr), snfi->regs + NFI_STRADDR); -+ readw(snfi->regs + NFI_INTR_STA); -+ writew(INTR_AHB_DONE_EN, snfi->regs + NFI_INTR_EN); -+ -+ init_completion(&snfi->done); -+ -+ /* set dummy command to trigger NFI enter SPI mode */ -+ writew(NAND_CMD_DUMMYPROG, snfi->regs + NFI_CMD); -+ reg = readl(snfi->regs + NFI_CON) | CON_BWR; -+ writew(reg, snfi->regs + NFI_CON); -+ -+ ret = wait_for_completion_timeout(&snfi->done, msecs_to_jiffies(500)); -+ if (!ret) { -+ dev_err(snfi->dev, "custom program done timeout\n"); -+ writew(0, snfi->regs + NFI_INTR_EN); -+ ret = -ETIMEDOUT; -+ goto ecc_disable; -+ } -+ -+ ret = readl_poll_timeout_atomic(snfi->regs + NFI_ADDRCNTR, reg, -+ ADDRCNTR_SEC(reg) >= sectors, -+ 10, MTK_TIMEOUT); -+ if (ret) -+ dev_err(snfi->dev, "hwecc write timeout\n"); -+ -+ecc_disable: -+ mtk_ecc_disable(snfi->ecc); -+ -+out: -+ dma_unmap_single(snfi->dev, dma_addr, len, DMA_TO_DEVICE); -+ writel(0, snfi->regs + NFI_CON); -+ writel(0, snfi->regs + NFI_CNFG); -+ reg = readl(snfi->regs + SNFI_MISC_CTL); -+ reg &= ~WR_CUSTOM_EN; -+ writel(reg, snfi->regs + SNFI_MISC_CTL); -+ -+ return ret; -+} -+ -+static int mtk_snfi_read(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+{ -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ u32 col_addr = op->addr.val; -+ int i, ret, sectors, oob_on = false; -+ -+ if (col_addr == mtd->writesize) -+ oob_on = true; -+ -+ ret = mtk_snfi_read_from_cache(mem, op, oob_on); -+ if (ret) { -+ dev_warn(snfi->dev, "read from cache fail\n"); -+ return ret; -+ } -+ -+ sectors = mtd->writesize / snfi->caps->nand_sec_size; -+ for (i = 0; i < sectors; i++) { -+ if (oob_on) -+ memcpy(oob_ptr(mem, i), -+ mtk_oob_ptr(mem, snfi->buffer, i), -+ snfi->caps->nand_fdm_size); -+ -+ if (i == snfi_nand->bad_mark.sec && snfi->caps->bad_mark_swap) -+ snfi_nand->bad_mark.bm_swap(mem, snfi->buffer, -+ oob_on); -+ } -+ -+ if (!oob_on) -+ memcpy(spinand->databuf, snfi->buffer, mtd->writesize); -+ -+ return ret; -+} -+ -+static int mtk_snfi_write(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+{ -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ struct mtk_snfi_nand_chip *snfi_nand = &snfi->snfi_nand; -+ u32 ret, i, sectors, col_addr = op->addr.val; -+ int oob_on = false; -+ -+ if (col_addr == mtd->writesize) -+ oob_on = true; -+ -+ sectors = mtd->writesize / snfi->caps->nand_sec_size; -+ memset(snfi->buffer, 0xff, mtd->writesize + mtd->oobsize); -+ -+ if (!oob_on) -+ memcpy(snfi->buffer, spinand->databuf, mtd->writesize); -+ -+ for (i = 0; i < sectors; i++) { -+ if (i == snfi_nand->bad_mark.sec && snfi->caps->bad_mark_swap) -+ snfi_nand->bad_mark.bm_swap(mem, snfi->buffer, oob_on); -+ -+ if (oob_on) -+ memcpy(mtk_oob_ptr(mem, snfi->buffer, i), -+ oob_ptr(mem, i), -+ snfi->caps->nand_fdm_size); -+ } -+ -+ ret = mtk_snfi_write_to_cache(mem, op, oob_on); -+ if (ret) -+ dev_warn(snfi->dev, "write to cache fail\n"); -+ -+ return ret; -+} -+ -+static int mtk_snfi_command_exec(struct mtk_snfi *snfi, -+ const u8 *txbuf, u8 *rxbuf, -+ const u32 txlen, const u32 rxlen) -+{ -+ u32 tmp, i, j, reg, m; -+ u8 *p_tmp = (u8 *)(&tmp); -+ int ret = 0; -+ -+ /* Moving tx data to NFI_SPI GPRAM */ -+ for (i = 0, m = 0; i < txlen; ) { -+ for (j = 0, tmp = 0; i < txlen && j < 4; i++, j++) -+ p_tmp[j] = txbuf[i]; -+ -+ writel(tmp, snfi->regs + SNFI_GPRAM_DATA + m); -+ m += 4; -+ } -+ -+ writel(txlen, snfi->regs + SNFI_MAC_OUTL); -+ writel(rxlen, snfi->regs + SNFI_MAC_INL); -+ ret = mtk_snfi_mac_op(snfi); -+ if (ret) -+ return ret; -+ -+ /* For NULL input data, this loop will be skipped */ -+ if (rxlen) -+ for (i = 0, m = 0; i < rxlen; ) { -+ reg = readl(snfi->regs + -+ SNFI_GPRAM_DATA + m); -+ for (j = 0; i < rxlen && j < 4; i++, j++, rxbuf++) { -+ if (m == 0 && i == 0) -+ j = i + txlen; -+ *rxbuf = (reg >> (j * 8)) & 0xFF; -+ } -+ m += 4; -+ } -+ -+ return ret; -+} -+ -+/* -+ * mtk_snfi_exec_op - to process command/data to send to the -+ * SPI NAND by mtk controller -+ */ -+static int mtk_snfi_exec_op(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+ -+{ -+ struct mtk_snfi *snfi = spi_controller_get_devdata(mem->spi->master); -+ struct spinand_device *spinand = spi_mem_get_drvdata(mem); -+ struct mtd_info *mtd = spinand_to_mtd(spinand); -+ struct nand_device *nand = mtd_to_nanddev(mtd); -+ const struct spi_mem_op *read_cache; -+ const struct spi_mem_op *write_cache; -+ u32 tmpbufsize, txlen = 0, rxlen = 0; -+ u8 *txbuf, *rxbuf = NULL, *buf; -+ int i, ret = 0; -+ -+ ret = mtk_snfi_reset(snfi); -+ if (ret) { -+ dev_warn(snfi->dev, "reset spi memory controller fail\n"); -+ return ret; -+ } -+ -+ /*if bbt initial, framework have detect nand information */ -+ if (nand->bbt.cache) { -+ read_cache = spinand->op_templates.read_cache; -+ write_cache = spinand->op_templates.write_cache; -+ -+ ret = mtk_snfi_hw_runtime_config(mem); -+ if (ret) -+ return ret; -+ -+ /* For Read/Write with cache, Erase use framework flow */ -+ if (op->cmd.opcode == read_cache->cmd.opcode) { -+ ret = mtk_snfi_read(mem, op); -+ if (ret) -+ dev_warn(snfi->dev, "snfi read fail\n"); -+ return ret; -+ } else if (op->cmd.opcode == write_cache->cmd.opcode) { -+ ret = mtk_snfi_write(mem, op); -+ if (ret) -+ dev_warn(snfi->dev, "snfi write fail\n"); -+ return ret; -+ } -+ } -+ -+ tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes + -+ op->dummy.nbytes + op->data.nbytes; -+ -+ txbuf = kzalloc(tmpbufsize, GFP_KERNEL); -+ if (!txbuf) -+ return -ENOMEM; -+ -+ txbuf[txlen++] = op->cmd.opcode; -+ -+ if (op->addr.nbytes) -+ for (i = 0; i < op->addr.nbytes; i++) -+ txbuf[txlen++] = op->addr.val >> -+ (8 * (op->addr.nbytes - i - 1)); -+ -+ txlen += op->dummy.nbytes; -+ -+ if (op->data.dir == SPI_MEM_DATA_OUT) -+ for (i = 0; i < op->data.nbytes; i++) { -+ buf = (u8 *)op->data.buf.out; -+ txbuf[txlen++] = buf[i]; -+ } -+ -+ if (op->data.dir == SPI_MEM_DATA_IN) { -+ rxbuf = (u8 *)op->data.buf.in; -+ rxlen += op->data.nbytes; -+ } -+ -+ ret = mtk_snfi_command_exec(snfi, txbuf, rxbuf, txlen, rxlen); -+ kfree(txbuf); -+ -+ return ret; -+} -+ -+static int mtk_snfi_init(struct mtk_snfi *snfi) -+{ -+ int ret; -+ -+ /* Reset the state machine and data FIFO */ -+ ret = mtk_snfi_reset(snfi); -+ if (ret) { -+ dev_warn(snfi->dev, "MTK reset controller fail\n"); -+ return ret; -+ } -+ -+ snfi->buffer = devm_kzalloc(snfi->dev, 4096 + 256, GFP_KERNEL); -+ if (!snfi->buffer) -+ return -ENOMEM; -+ -+ /* Clear interrupt, read clear. */ -+ readw(snfi->regs + NFI_INTR_STA); -+ writew(0, snfi->regs + NFI_INTR_EN); -+ -+ writel(0, snfi->regs + NFI_CON); -+ writel(0, snfi->regs + NFI_CNFG); -+ -+ /* Change to NFI_SPI mode. */ -+ writel(SNFI_MODE_EN, snfi->regs + SNFI_CNFG); -+ -+ return 0; -+} -+ -+static int mtk_snfi_check_buswidth(u8 width) -+{ -+ switch (width) { -+ case 1: -+ case 2: -+ case 4: -+ return 0; -+ -+ default: -+ break; -+ } -+ -+ return -ENOTSUPP; -+} -+ -+static bool mtk_snfi_supports_op(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+{ -+ int ret = 0; -+ -+ /* For MTK Spi Nand controller, cmd buswidth just support 1 bit*/ -+ if (op->cmd.buswidth != 1) -+ ret = -ENOTSUPP; -+ -+ if (op->addr.nbytes) -+ ret |= mtk_snfi_check_buswidth(op->addr.buswidth); -+ -+ if (op->dummy.nbytes) -+ ret |= mtk_snfi_check_buswidth(op->dummy.buswidth); -+ -+ if (op->data.nbytes) -+ ret |= mtk_snfi_check_buswidth(op->data.buswidth); -+ -+ if (ret) -+ return false; -+ -+ return true; -+} -+ -+static const struct spi_controller_mem_ops mtk_snfi_ops = { -+ .supports_op = mtk_snfi_supports_op, -+ .exec_op = mtk_snfi_exec_op, -+}; -+ -+static const struct mtk_snfi_caps snfi_mt7622 = { -+ .spare_size = spare_size_mt7622, -+ .num_spare_size = 4, -+ .nand_sec_size = 512, -+ .nand_fdm_size = 8, -+ .nand_fdm_ecc_size = 1, -+ .ecc_parity_bits = 13, -+ .pageformat_spare_shift = 4, -+ .bad_mark_swap = 0, -+}; -+ -+static const struct of_device_id mtk_snfi_id_table[] = { -+ { .compatible = "mediatek,mt7622-snfi", .data = &snfi_mt7622, }, -+ { /* sentinel */ } -+}; -+ -+static int mtk_snfi_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct device_node *np = dev->of_node; -+ struct spi_controller *ctlr; -+ struct mtk_snfi *snfi; -+ struct resource *res; -+ int ret = 0, irq; -+ -+ ctlr = spi_alloc_master(&pdev->dev, sizeof(*snfi)); -+ if (!ctlr) -+ return -ENOMEM; -+ -+ snfi = spi_controller_get_devdata(ctlr); -+ snfi->caps = of_device_get_match_data(dev); -+ snfi->dev = dev; -+ -+ snfi->ecc = of_mtk_ecc_get(np); -+ if (IS_ERR_OR_NULL(snfi->ecc)) -+ goto err_put_master; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ snfi->regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(snfi->regs)) { -+ ret = PTR_ERR(snfi->regs); -+ goto release_ecc; -+ } -+ -+ /* find the clocks */ -+ snfi->clk.nfi_clk = devm_clk_get(dev, "nfi_clk"); -+ if (IS_ERR(snfi->clk.nfi_clk)) { -+ dev_err(dev, "no nfi clk\n"); -+ ret = PTR_ERR(snfi->clk.nfi_clk); -+ goto release_ecc; -+ } -+ -+ snfi->clk.spi_clk = devm_clk_get(dev, "spi_clk"); -+ if (IS_ERR(snfi->clk.spi_clk)) { -+ dev_err(dev, "no spi clk\n"); -+ ret = PTR_ERR(snfi->clk.spi_clk); -+ goto release_ecc; -+ } -+ -+ ret = mtk_snfi_enable_clk(dev, &snfi->clk); -+ if (ret) -+ goto release_ecc; -+ -+ /* find the irq */ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) { -+ dev_err(dev, "no snfi irq resource\n"); -+ ret = -EINVAL; -+ goto clk_disable; -+ } -+ -+ ret = devm_request_irq(dev, irq, mtk_snfi_irq, 0, "mtk-snfi", snfi); -+ if (ret) { -+ dev_err(dev, "failed to request snfi irq\n"); -+ goto clk_disable; -+ } -+ -+ ret = dma_set_mask(dev, DMA_BIT_MASK(32)); -+ if (ret) { -+ dev_err(dev, "failed to set dma mask\n"); -+ goto clk_disable; -+ } -+ -+ ctlr->dev.of_node = np; -+ ctlr->mem_ops = &mtk_snfi_ops; -+ -+ platform_set_drvdata(pdev, snfi); -+ ret = mtk_snfi_init(snfi); -+ if (ret) { -+ dev_err(dev, "failed to init snfi\n"); -+ goto clk_disable; -+ } -+ -+ ret = devm_spi_register_master(dev, ctlr); -+ if (ret) -+ goto clk_disable; -+ -+ return 0; -+ -+clk_disable: -+ mtk_snfi_disable_clk(&snfi->clk); -+ -+release_ecc: -+ mtk_ecc_release(snfi->ecc); -+ -+err_put_master: -+ spi_master_put(ctlr); -+ -+ dev_err(dev, "MediaTek SPI NAND interface probe failed %d\n", ret); -+ return ret; -+} -+ -+static int mtk_snfi_remove(struct platform_device *pdev) -+{ -+ struct mtk_snfi *snfi = platform_get_drvdata(pdev); -+ -+ mtk_snfi_disable_clk(&snfi->clk); -+ -+ return 0; -+} -+ -+static int mtk_snfi_suspend(struct platform_device *pdev, pm_message_t state) -+{ -+ struct mtk_snfi *snfi = platform_get_drvdata(pdev); -+ -+ mtk_snfi_disable_clk(&snfi->clk); -+ -+ return 0; -+} -+ -+static int mtk_snfi_resume(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct mtk_snfi *snfi = dev_get_drvdata(dev); -+ int ret; -+ -+ ret = mtk_snfi_enable_clk(dev, &snfi->clk); -+ if (ret) -+ return ret; -+ -+ ret = mtk_snfi_init(snfi); -+ if (ret) -+ dev_err(dev, "failed to init snfi controller\n"); -+ -+ return ret; -+} -+ -+static struct platform_driver mtk_snfi_driver = { -+ .driver = { -+ .name = "mtk-snfi", -+ .of_match_table = mtk_snfi_id_table, -+ }, -+ .probe = mtk_snfi_probe, -+ .remove = mtk_snfi_remove, -+ .suspend = mtk_snfi_suspend, -+ .resume = mtk_snfi_resume, -+}; -+ -+module_platform_driver(mtk_snfi_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Xiangsheng Hou "); -+MODULE_DESCRIPTION("Mediatek SPI Memory Interface Driver"); ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -389,6 +389,15 @@ config SPI_MT65XX - say Y or M here.If you are not sure, say N. - SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs. - -+config SPI_MTK_SNFI -+ tristate "MediaTek SPI NAND interface" -+ select MTD_SPI_NAND -+ help -+ This selects the SPI NAND FLASH interface(SNFI), -+ which could be found on MediaTek Soc. -+ Say Y or M here.If you are not sure, say N. -+ Note Parallel Nand and SPI NAND is alternative on MediaTek SoCs. -+ - config SPI_NUC900 - tristate "Nuvoton NUC900 series SPI" - depends on ARCH_W90X900 ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -57,6 +57,7 @@ obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mp - obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o - obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o - obj-$(CONFIG_SPI_MT65XX) += spi-mt65xx.o -+obj-$(CONFIG_SPI_MTK_SNFI) += spi-mtk-snfi.o - obj-$(CONFIG_SPI_MXS) += spi-mxs.o - obj-$(CONFIG_SPI_NUC900) += spi-nuc900.o - obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o diff --git a/target/linux/mediatek/patches-4.19/0307-spi-mem-Mediatek-Add-SPI-Nand-support-for-MT7629.patch b/target/linux/mediatek/patches-4.19/0307-spi-mem-Mediatek-Add-SPI-Nand-support-for-MT7629.patch deleted file mode 100644 index b8cb416b3e..0000000000 --- a/target/linux/mediatek/patches-4.19/0307-spi-mem-Mediatek-Add-SPI-Nand-support-for-MT7629.patch +++ /dev/null @@ -1,121 +0,0 @@ -From c813fbe806257c574240770ef716fbee19f7dbfa Mon Sep 17 00:00:00 2001 -From: Xiangsheng Hou -Date: Thu, 6 Jun 2019 16:29:04 +0800 -Subject: [PATCH] spi: spi-mem: Mediatek: Add SPI Nand support for MT7629 - -Signed-off-by: Xiangsheng Hou ---- - arch/arm/boot/dts/mt7629-rfb.dts | 45 ++++++++++++++++++++++++++++++++ - arch/arm/boot/dts/mt7629.dtsi | 22 ++++++++++++++++ - drivers/spi/spi-mtk-snfi.c | 12 +++++++++ - 3 files changed, 79 insertions(+) - ---- a/arch/arm/boot/dts/mt7629.dtsi -+++ b/arch/arm/boot/dts/mt7629.dtsi -@@ -259,6 +259,28 @@ - status = "disabled"; - }; - -+ bch: ecc@1100e000 { -+ compatible = "mediatek,mt7622-ecc"; -+ reg = <0x1100e000 0x1000>; -+ interrupts = ; -+ clocks = <&pericfg CLK_PERI_NFIECC_PD>; -+ clock-names = "nfiecc_clk"; -+ status = "disabled"; -+ }; -+ -+ snfi: spi@1100d000 { -+ compatible = "mediatek,mt7629-snfi"; -+ reg = <0x1100d000 0x1000>; -+ interrupts = ; -+ clocks = <&pericfg CLK_PERI_NFI_PD>, -+ <&pericfg CLK_PERI_SNFI_PD>; -+ clock-names = "nfi_clk", "spi_clk"; -+ ecc-engine = <&bch>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ - spi: spi@1100a000 { - compatible = "mediatek,mt7629-spi", - "mediatek,mt7622-spi"; ---- a/drivers/spi/spi-mtk-snfi.c -+++ b/drivers/spi/spi-mtk-snfi.c -@@ -1029,8 +1029,20 @@ static const struct mtk_snfi_caps snfi_m - .bad_mark_swap = 0, - }; - -+static const struct mtk_snfi_caps snfi_mt7629 = { -+ .spare_size = spare_size_mt7622, -+ .num_spare_size = 4, -+ .nand_sec_size = 512, -+ .nand_fdm_size = 8, -+ .nand_fdm_ecc_size = 1, -+ .ecc_parity_bits = 13, -+ .pageformat_spare_shift = 4, -+ .bad_mark_swap = 1, -+}; -+ - static const struct of_device_id mtk_snfi_id_table[] = { - { .compatible = "mediatek,mt7622-snfi", .data = &snfi_mt7622, }, -+ { .compatible = "mediatek,mt7629-snfi", .data = &snfi_mt7629, }, - { /* sentinel */ } - }; - ---- a/arch/arm/boot/dts/mt7629-rfb.dts -+++ b/arch/arm/boot/dts/mt7629-rfb.dts -@@ -281,6 +281,52 @@ - }; - }; - -+&bch { -+ status = "okay"; -+}; -+ -+&snfi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&serial_nand_pins>; -+ status = "okay"; -+ -+ spi_nand@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "spi-nand"; -+ spi-max-frequency = <104000000>; -+ reg = <0>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "Bootloader"; -+ reg = <0x00000 0x0100000>; -+ read-only; -+ }; -+ -+ partition@100000 { -+ label = "Config"; -+ reg = <0x100000 0x0040000>; -+ }; -+ -+ partition@140000 { -+ label = "factory"; -+ reg = <0x140000 0x0080000>; -+ }; -+ -+ partition@1c0000 { -+ label = "firmware"; -+ reg = <0x1c0000 0x1000000>; -+ }; -+ -+ }; -+ }; -+}; -+ - &spi { - pinctrl-names = "default"; - pinctrl-0 = <&spi_pins>; diff --git a/target/linux/mediatek/patches-4.19/0900-bt-mtk-serial-fix.patch b/target/linux/mediatek/patches-4.19/0900-bt-mtk-serial-fix.patch deleted file mode 100644 index 1c3c1d9497..0000000000 --- a/target/linux/mediatek/patches-4.19/0900-bt-mtk-serial-fix.patch +++ /dev/null @@ -1,33 +0,0 @@ ---- a/drivers/tty/serial/8250/8250.h -+++ b/drivers/tty/serial/8250/8250.h -@@ -80,6 +80,7 @@ struct serial8250_config { - #define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks: - * STOP PARITY EPAR SPAR WLEN5 WLEN6 - */ -+#define UART_CAP_NMOD (1 << 18) /* UART doesn't do termios */ - - #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */ - #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */ ---- a/drivers/tty/serial/8250/8250_port.c -+++ b/drivers/tty/serial/8250/8250_port.c -@@ -297,7 +297,7 @@ static const struct serial8250_config ua - .tx_loadsz = 16, - .fcr = UART_FCR_ENABLE_FIFO | - UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, -- .flags = UART_CAP_FIFO, -+ .flags = UART_CAP_FIFO | UART_CAP_NMOD, - }, - [PORT_NPCM] = { - .name = "Nuvoton 16550", -@@ -2650,6 +2650,11 @@ serial8250_do_set_termios(struct uart_po - unsigned long flags; - unsigned int baud, quot, frac = 0; - -+ if (up->capabilities & UART_CAP_NMOD) { -+ termios->c_cflag = 0; -+ return; -+ } -+ - if (up->capabilities & UART_CAP_MINI) { - termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CMSPAR); - if ((termios->c_cflag & CSIZE) == CS5 || diff --git a/target/linux/mpc85xx/config-4.19 b/target/linux/mpc85xx/config-4.19 deleted file mode 100644 index e999417d1e..0000000000 --- a/target/linux/mpc85xx/config-4.19 +++ /dev/null @@ -1,323 +0,0 @@ -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_ADVANCED_OPTIONS is not set -CONFIG_AR8216_PHY=y -CONFIG_AR8216_PHY_LEDS=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_WALK_MEMORY=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_MMAP_RND_BITS=11 -CONFIG_ARCH_MMAP_RND_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y -CONFIG_ASN1=y -CONFIG_AUDIT_ARCH=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BOOKE=y -CONFIG_BOOKE_WDT=y -CONFIG_BOUNCE=y -# CONFIG_BSC9131_RDB is not set -# CONFIG_BSC9132_QDS is not set -# CONFIG_C293_PCIE is not set -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_CMDLINE="console=ttyS0,115200" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -# CONFIG_CORENET_GENERIC is not set -# CONFIG_CPM2 is not set -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -# CONFIG_CRYPTO_AES_PPC_SPE is not set -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_MD5_PPC is not set -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_SHA1_PPC is not set -# CONFIG_CRYPTO_SHA1_PPC_SPE is not set -# CONFIG_CRYPTO_SHA256_PPC_SPE is not set -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -# CONFIG_E200 is not set -CONFIG_E500=y -# CONFIG_E5500_CPU is not set -# CONFIG_E6500_CPU is not set -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_ETHERNET_PACKET_MANGLE=y -# CONFIG_FHCI_DEBUG is not set -CONFIG_FIXED_PHY=y -CONFIG_FSL_BOOKE=y -# CONFIG_FSL_DPAA is not set -CONFIG_FSL_EMB_PERFMON=y -# CONFIG_FSL_FMAN is not set -CONFIG_FSL_GTM=y -CONFIG_FSL_LBC=y -CONFIG_FSL_PCI=y -CONFIG_FSL_PQ_MDIO=y -CONFIG_FSL_SOC=y -CONFIG_FSL_SOC_BOOKE=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_NVRAM=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GEN_RTC=y -# CONFIG_GE_IMP3A is not set -CONFIG_GIANFAR=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MPC8XXX=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KPROBES_ON_FTRACE=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y -# CONFIG_HIVEAP_330 is not set -CONFIG_HW_RANDOM=y -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_MPC=y -CONFIG_ILLEGAL_POINTER_VALUE=0 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_ISA_DMA_API=y -CONFIG_KERNEL_GZIP=y -CONFIG_KERNEL_START=0xc0000000 -# CONFIG_KSI8560 is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOWMEM_CAM_NUM=3 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_LXT_PHY=y -# CONFIG_MATH_EMULATION is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MIGRATION=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MPC8536_DS is not set -# CONFIG_MPC8540_ADS is not set -# CONFIG_MPC8560_ADS is not set -# CONFIG_MPC85xx_CDS is not set -# CONFIG_MPC85xx_DS is not set -# CONFIG_MPC85xx_MDS is not set -# CONFIG_MPC85xx_RDB is not set -CONFIG_MPIC=y -# CONFIG_MPIC_MSGR is not set -CONFIG_MPIC_TIMER=y -CONFIG_MPILIB=y -# CONFIG_MTD_CFI is not set -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_SPI_NOR=y -# CONFIG_MVME2500 is not set -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NLS=y -CONFIG_NO_BOOTMEM=y -CONFIG_NR_IRQS=512 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND=y -# CONFIG_P1010_RDB is not set -# CONFIG_P1022_DS is not set -# CONFIG_P1022_RDK is not set -# CONFIG_P1023_RDB is not set -CONFIG_PAGE_OFFSET=0xc0000000 -# CONFIG_PANDA is not set -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEASPM=y -# CONFIG_PCIEASPM_DEBUG is not set -CONFIG_PCIEASPM_DEFAULT=y -# CONFIG_PCIEASPM_PERFORMANCE is not set -# CONFIG_PCIEASPM_POWERSAVE is not set -# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set -CONFIG_PCIEPORTBUS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYSICAL_ALIGN=0x04000000 -CONFIG_PHYSICAL_START=0x00000000 -# CONFIG_PHYS_64BIT is not set -# CONFIG_PPA8548 is not set -CONFIG_PPC=y -CONFIG_PPC32=y -# CONFIG_PPC64 is not set -CONFIG_PPC_85xx=y -# CONFIG_PPC_8xx is not set -CONFIG_PPC_ADV_DEBUG_DACS=2 -CONFIG_PPC_ADV_DEBUG_DVCS=0 -CONFIG_PPC_ADV_DEBUG_IACS=2 -CONFIG_PPC_ADV_DEBUG_REGS=y -CONFIG_PPC_BARRIER_NOSPEC=y -CONFIG_PPC_BOOK3E_MMU=y -# CONFIG_PPC_BOOK3S_32 is not set -CONFIG_PPC_DOORBELL=y -# CONFIG_PPC_E500MC is not set -# CONFIG_PPC_EARLY_DEBUG is not set -CONFIG_PPC_FSL_BOOK3E=y -CONFIG_PPC_INDIRECT_PCI=y -# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set -CONFIG_PPC_MMU_NOHASH=y -CONFIG_PPC_PCI_CHOICE=y -# CONFIG_PPC_PTDUMP is not set -# CONFIG_PPC_QEMU_E500 is not set -CONFIG_PPC_SMP_MUXED_IPI=y -CONFIG_PPC_UDBG_16550=y -CONFIG_PPC_WERROR=y -CONFIG_QE_GPIO=y -CONFIG_QE_USB=y -CONFIG_QUICC_ENGINE=y -CONFIG_RAS=y -# CONFIG_RED_15W_REV1 is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_SPI=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_GENERIC=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SBC8548 is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_SERIAL_QE is not set -CONFIG_SIMPLE_GPIO=y -# CONFIG_SOCRATES is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPE=y -CONFIG_SPE_POSSIBLE=y -CONFIG_SPI=y -CONFIG_SPI_FSL_ESPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_STX_GP3 is not set -CONFIG_SWCONFIG=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_TASK_SIZE=0xc0000000 -CONFIG_THREAD_SHIFT=13 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -# CONFIG_TL_WDR4900_V1 is not set -# CONFIG_TQM8540 is not set -# CONFIG_TQM8541 is not set -# CONFIG_TQM8548 is not set -# CONFIG_TQM8555 is not set -# CONFIG_TQM8560 is not set -# CONFIG_TWR_P102x is not set -CONFIG_UCC=y -CONFIG_UCC_FAST=y -CONFIG_UCC_GETH=y -# CONFIG_UGETH_TX_ON_DEMAND is not set -CONFIG_USB_SUPPORT=y -CONFIG_VDSO32=y -# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WS_AP3710I is not set -# CONFIG_XES_MPC85xx is not set -# CONFIG_XPS_USB_HCD_XILINX is not set -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_POWERPC=y diff --git a/target/linux/mpc85xx/patches-4.19/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch b/target/linux/mpc85xx/patches-4.19/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch deleted file mode 100644 index 58c4be6007..0000000000 --- a/target/linux/mpc85xx/patches-4.19/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/common.c -+++ b/arch/powerpc/platforms/85xx/common.c -@@ -33,6 +33,7 @@ static const struct of_device_id mpc85xx - { .compatible = "fsl,mpc8548-guts", }, - /* Probably unnecessary? */ - { .compatible = "gpio-leds", }, -+ { .compatible = "gpio-keys", }, - /* For all PCI controllers */ - { .compatible = "fsl,mpc8540-pci", }, - { .compatible = "fsl,mpc8548-pcie", }, diff --git a/target/linux/mpc85xx/patches-4.19/100-powerpc-85xx-tl-wdr4900-v1-support.patch b/target/linux/mpc85xx/patches-4.19/100-powerpc-85xx-tl-wdr4900-v1-support.patch deleted file mode 100644 index c9256900d8..0000000000 --- a/target/linux/mpc85xx/patches-4.19/100-powerpc-85xx-tl-wdr4900-v1-support.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 1d9f596e572917772b87a2a37e1680902964782f Mon Sep 17 00:00:00 2001 -From: Gabor Juhos -Date: Wed, 20 Feb 2013 08:40:33 +0100 -Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1 - board - -This patch adds support for the TP-Link TL-WDR4900 v1 -concurrent dual-band wireless router. The devices uses -the Freescale P1014 SoC. - -Signed-off-by: Gabor Juhos -Signed-off-by: Pawel Dembicki ---- - arch/powerpc/boot/Makefile | 3 ++- - arch/powerpc/boot/wrapper | 5 +++++ - arch/powerpc/platforms/85xx/Kconfig | 12 ++++++++++++ - arch/powerpc/platforms/85xx/Makefile | 1 + - 4 files changed, 20 insertions(+), 1 deletion(-) - ---- a/arch/powerpc/boot/Makefile -+++ b/arch/powerpc/boot/Makefile -@@ -164,6 +164,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie - src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S - src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S - src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c -+src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S - - src-wlib := $(sort $(src-wlib-y)) - src-plat := $(sort $(src-plat-y)) -@@ -343,7 +344,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm - image-$(CONFIG_TQM8560) += cuImage.tqm8560 - image-$(CONFIG_SBC8548) += cuImage.sbc8548 - image-$(CONFIG_KSI8560) += cuImage.ksi8560 -- -+image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1 - # Board ports in arch/powerpc/platform/86xx/Kconfig - image-$(CONFIG_MVME7100) += dtbImage.mvme7100 - ---- a/arch/powerpc/boot/wrapper -+++ b/arch/powerpc/boot/wrapper -@@ -302,6 +302,11 @@ adder875-redboot) - platformo="$object/fixed-head.o $object/redboot-8xx.o" - binary=y - ;; -+simpleboot-tl-wdr4900-v1) -+ platformo="$object/fixed-head.o $object/simpleboot.o" -+ link_address='0x1000000' -+ binary=y -+ ;; - simpleboot-virtex405-*) - platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o" - binary=y ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -170,6 +170,18 @@ config STX_GP3 - select CPM2 - select DEFAULT_UIMAGE - -+config TL_WDR4900_V1 -+ bool "TP-Link TL-WDR4900 v1" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ select SWIOTLB -+ help -+ This option enables support for the TP-Link TL-WDR4900 v1 board. -+ -+ This board is a Concurrent Dual-Band wireless router with a -+ Freescale P1014 SoC. -+ - config TQM8540 - bool "TQ Components TQM8540" - help ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -26,6 +26,7 @@ obj-$(CONFIG_CORENET_GENERIC) += coren - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o - obj-$(CONFIG_STX_GP3) += stx_gp3.o - obj-$(CONFIG_TQM85xx) += tqm85xx.o -+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o - obj-$(CONFIG_SBC8548) += sbc8548.o - obj-$(CONFIG_PPA8548) += ppa8548.o - obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o diff --git a/target/linux/mpc85xx/patches-4.19/101-powerpc-85xx-hiveap-330-support.patch b/target/linux/mpc85xx/patches-4.19/101-powerpc-85xx-hiveap-330-support.patch deleted file mode 100644 index 34568398c2..0000000000 --- a/target/linux/mpc85xx/patches-4.19/101-powerpc-85xx-hiveap-330-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -49,6 +49,17 @@ config BSC9132_QDS - and dual StarCore SC3850 DSP cores. - Manufacturer : Freescale Semiconductor, Inc - -+config HIVEAP_330 -+ bool "Aerohive HiveAP-330" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the Aerohive HiveAP-330 board. -+ -+ This board is a Concurrent Dual-Band wireless access point with a -+ Freescale P1020 SoC. -+ - config MPC8540_ADS - bool "Freescale MPC8540 ADS" - select DEFAULT_UIMAGE ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -10,6 +10,7 @@ obj-y += common.o - obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o - obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o - obj-$(CONFIG_C293_PCIE) += c293pcie.o -+obj-$(CONFIG_HIVEAP_330) += hiveap-330.o - obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o - obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o - obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o diff --git a/target/linux/mpc85xx/patches-4.19/102-powerpc-add-cmdline-override.patch b/target/linux/mpc85xx/patches-4.19/102-powerpc-add-cmdline-override.patch deleted file mode 100644 index 7bdbd79538..0000000000 --- a/target/linux/mpc85xx/patches-4.19/102-powerpc-add-cmdline-override.patch +++ /dev/null @@ -1,37 +0,0 @@ ---- a/arch/powerpc/Kconfig -+++ b/arch/powerpc/Kconfig -@@ -810,6 +810,14 @@ config CMDLINE_FORCE - This is useful if you cannot or don't want to change the - command-line options your boot loader passes to the kernel. - -+config CMDLINE_OVERRIDE -+ bool "Use alternative cmdline from device tree" -+ help -+ Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can -+ be used, this is not a good option for kernels that are shared across -+ devices. This setting enables using "chosen/cmdline-override" as the -+ cmdline if it exists in the device tree. -+ - config EXTRA_TARGETS - string "Additional default image types" - help ---- a/drivers/of/fdt.c -+++ b/drivers/of/fdt.c -@@ -1091,6 +1091,17 @@ int __init early_init_dt_scan_chosen(uns - if (p != NULL && l > 0) - strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE)); - -+ /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different -+ * device tree option of chosen/bootargs-override. This is -+ * helpful on boards where u-boot sets bootargs, and is unable -+ * to be modified. -+ */ -+#ifdef CONFIG_CMDLINE_OVERRIDE -+ p = of_get_flat_dt_prop(node, "bootargs-override", &l); -+ if (p != NULL && l > 0) -+ strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE)); -+#endif -+ - /* - * CONFIG_CMDLINE is meant to be a default in case nothing else - * managed to set the command line, unless CONFIG_CMDLINE_FORCE diff --git a/target/linux/mpc85xx/patches-4.19/103-powerpc-85xx-red-15w-rev1.patch b/target/linux/mpc85xx/patches-4.19/103-powerpc-85xx-red-15w-rev1.patch deleted file mode 100644 index b84a56659c..0000000000 --- a/target/linux/mpc85xx/patches-4.19/103-powerpc-85xx-red-15w-rev1.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -173,6 +173,16 @@ config XES_MPC85xx - Manufacturer: Extreme Engineering Solutions, Inc. - URL: - -+config RED_15W_REV1 -+ bool "Sophos RED 15w Rev.1" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the Sophos RED 15w Rev.1 board. -+ -+ This board is a wireless VPN router with a Freescale P1010 SoC. -+ - config STX_GP3 - bool "Silicon Turnkey Express GP3" - help ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -25,6 +25,7 @@ obj-$(CONFIG_P1023_RDB) += p1023_rdb.o - obj-$(CONFIG_TWR_P102x) += twr_p102x.o - obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o -+obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o - obj-$(CONFIG_STX_GP3) += stx_gp3.o - obj-$(CONFIG_TQM85xx) += tqm85xx.o - obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o diff --git a/target/linux/mpc85xx/patches-4.19/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch b/target/linux/mpc85xx/patches-4.19/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch deleted file mode 100644 index 39c72314b8..0000000000 --- a/target/linux/mpc85xx/patches-4.19/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch +++ /dev/null @@ -1,170 +0,0 @@ -From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001 -From: Pawel Dembicki -Date: Sun, 30 Dec 2018 23:24:41 +0100 -Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT - -This patch apply chages for OpenWRT in P2020RDB -dts file. - -Signed-off-by: Pawel Dembicki ---- - arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++--------- - 1 file changed, 63 insertions(+), 35 deletions(-) - ---- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts -+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts -@@ -2,6 +2,7 @@ - * P2020 RDB Device Tree Source - * - * Copyright 2009-2012 Freescale Semiconductor Inc. -+ * Copyright 2018 Pawel Dembicki - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the -@@ -9,10 +10,15 @@ - * option) any later version. - */ - -+/dts-v1/; -+ - /include/ "p2020si-pre.dtsi" - -+#include -+#include -+ - / { -- model = "fsl,P2020RDB"; -+ model = "Freescale P2020RDB"; - compatible = "fsl,P2020RDB"; - - aliases { -@@ -38,48 +44,38 @@ - 0x2 0x0 0x0 0xffb00000 0x00020000>; - - nor@0,0 { -- #address-cells = <1>; -- #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - -- partition@0 { -- /* This location must not be altered */ -- /* 256KB for Vitesse 7385 Switch firmware */ -- reg = <0x0 0x00040000>; -- label = "NOR (RO) Vitesse-7385 Firmware"; -- read-only; -- }; -- -- partition@40000 { -- /* 256KB for DTB Image */ -- reg = <0x00040000 0x00040000>; -- label = "NOR (RO) DTB Image"; -- read-only; -- }; -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; - -- partition@80000 { -- /* 3.5 MB for Linux Kernel Image */ -- reg = <0x00080000 0x00380000>; -- label = "NOR (RO) Linux Kernel Image"; -- read-only; -- }; -+ partition@0 { -+ /* This location must not be altered */ -+ /* 256KB for Vitesse 7385 Switch firmware */ -+ reg = <0x0 0x00040000>; -+ label = "NOR (RO) Vitesse-7385 Firmware"; -+ read-only; -+ }; - -- partition@400000 { -- /* 11MB for JFFS2 based Root file System */ -- reg = <0x00400000 0x00b00000>; -- label = "NOR (RW) JFFS2 Root File System"; -- }; -+ partition@40000 { -+ compatible = "denx,fit"; -+ reg = <0x00040000 0x00ec0000>; -+ label = "firmware"; -+ }; - -- partition@f00000 { -- /* This location must not be altered */ -- /* 512KB for u-boot Bootloader Image */ -- /* 512KB for u-boot Environment Variables */ -- reg = <0x00f00000 0x00100000>; -- label = "NOR (RO) U-Boot Image"; -- read-only; -+ partition@f00000 { -+ /* This location must not be altered */ -+ /* 512KB for u-boot Bootloader Image */ -+ /* 512KB for u-boot Environment Variables */ -+ reg = <0x00f00000 0x00100000>; -+ label = "u-boot"; -+ read-only; -+ }; - }; - }; - -@@ -144,13 +140,43 @@ - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - -+ gpio0: gpio-controller@fc00 { -+ }; -+ - i2c@3000 { -+ temperature-sensor@4c { -+ compatible = "adi,adt7461"; -+ reg = <0x4c>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c256"; -+ reg = <0x50>; -+ }; -+ - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - -+ i2c@3100 { -+ pmic@11 { -+ compatible = "zl2006"; -+ reg = <0x11>; -+ }; -+ -+ gpio@18 { -+ compatible = "nxp,pca9557"; -+ reg = <0x18>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c01"; -+ reg = <0x52>; -+ }; -+ }; -+ - spi@7000 { - flash@0 { - #address-cells = <1>; -@@ -204,10 +230,12 @@ - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; -+ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; - }; - phy1: ethernet-phy@1 { - interrupts = <3 1 0 0>; - reg = <0x1>; -+ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - }; - tbi-phy@2 { - device_type = "tbi-phy"; diff --git a/target/linux/mpc85xx/patches-4.19/105-powerpc-85xx-panda-support.patch b/target/linux/mpc85xx/patches-4.19/105-powerpc-85xx-panda-support.patch deleted file mode 100644 index a08bc302f2..0000000000 --- a/target/linux/mpc85xx/patches-4.19/105-powerpc-85xx-panda-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -60,6 +60,17 @@ config HIVEAP_330 - This board is a Concurrent Dual-Band wireless access point with a - Freescale P1020 SoC. - -+config PANDA -+ bool "OCEDO PANDA" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the OCEDO PANDA board. -+ -+ This board is a Concurrent Dual-Band wireless access point with a -+ Freescale P1020 SoC. -+ - config MPC8540_ADS - bool "Freescale MPC8540 ADS" - select DEFAULT_UIMAGE ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -22,6 +22,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o - obj-$(CONFIG_P1022_DS) += p1022_ds.o - obj-$(CONFIG_P1022_RDK) += p1022_rdk.o - obj-$(CONFIG_P1023_RDB) += p1023_rdb.o -+obj-$(CONFIG_PANDA) += panda.o - obj-$(CONFIG_TWR_P102x) += twr_p102x.o - obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o diff --git a/target/linux/mpc85xx/patches-4.19/106-powerpc-85xx-ws-ap3710i-support.patch b/target/linux/mpc85xx/patches-4.19/106-powerpc-85xx-ws-ap3710i-support.patch deleted file mode 100644 index 4bacedbcd7..0000000000 --- a/target/linux/mpc85xx/patches-4.19/106-powerpc-85xx-ws-ap3710i-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -71,6 +71,17 @@ config PANDA - This board is a Concurrent Dual-Band wireless access point with a - Freescale P1020 SoC. - -+config WS_AP3710I -+ bool "Enterasys WS-AP3710i" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the Enterasys WS-AP3710i board. -+ -+ This board is a Concurrent Dual-Band wireless access point with a -+ Freescale P1020 SoC. -+ - config MPC8540_ADS - bool "Freescale MPC8540 ADS" - select DEFAULT_UIMAGE ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -24,6 +24,7 @@ obj-$(CONFIG_P1022_RDK) += p1022_rdk.o - obj-$(CONFIG_P1023_RDB) += p1023_rdb.o - obj-$(CONFIG_PANDA) += panda.o - obj-$(CONFIG_TWR_P102x) += twr_p102x.o -+obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o - obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o - obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o diff --git a/target/linux/mvebu/config-4.19 b/target/linux/mvebu/config-4.19 deleted file mode 100644 index 7a13cd50c9..0000000000 --- a/target/linux/mvebu/config-4.19 +++ /dev/null @@ -1,493 +0,0 @@ -CONFIG_AHCI_MVEBU=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MVEBU=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_LIBATA_LEDS=y -CONFIG_ARM=y -CONFIG_ARMADA_370_CLK=y -CONFIG_ARMADA_370_XP_IRQ=y -CONFIG_ARMADA_370_XP_TIMER=y -CONFIG_ARMADA_38X_CLK=y -CONFIG_ARMADA_THERMAL=y -CONFIG_ARMADA_XP_CLK=y -CONFIG_ARM_APPENDED_DTB=y -# CONFIG_ARM_ARMADA_37XX_CPUFREQ is not set -CONFIG_ARM_ATAG_DTB_COMPAT=y -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GLOBAL_TIMER=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_MVEBU_V7_CPUIDLE=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y -CONFIG_ATA=y -CONFIG_ATA_LEDS=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BOUNCE=y -# CONFIG_CACHE_FEROCEON_L2 is not set -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PJ4B=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -# CONFIG_CRYPTO_AES_ARM_CE is not set -# CONFIG_CRYPTO_CHACHA20_NEON is not set -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_CRC32_ARM_CE is not set -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_MARVELL_CESA=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -# CONFIG_CRYPTO_SHA1_ARM_CE is not set -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256_ARM=y -# CONFIG_CRYPTO_SHA2_ARM_CE is not set -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_ALIGN_RODATA=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_MVEBU_UART0=y -# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set -# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set -CONFIG_DEBUG_UART_8250=y -# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set -CONFIG_DEBUG_UART_8250_SHIFT=2 -# CONFIG_DEBUG_UART_8250_WORD is not set -CONFIG_DEBUG_UART_PHYS=0xd0012000 -CONFIG_DEBUG_UART_VIRT=0xfec12000 -CONFIG_DEBUG_UNCOMPRESS=y -CONFIG_DEBUG_USER=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_ENGINE_RAID=y -CONFIG_DMA_OF=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_MVEBU=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HOTPLUG_CPU=y -CONFIG_HWBM=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MV64XXX=y -# CONFIG_I2C_PXA is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_IWMMXT is not set -CONFIG_JBD2=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PCA963X=y -CONFIG_LEDS_TLC591XX=y -CONFIG_LEDS_TRIGGER_DISK=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MACH_ARMADA_370=y -# CONFIG_MACH_ARMADA_375 is not set -CONFIG_MACH_ARMADA_38X=y -# CONFIG_MACH_ARMADA_39X is not set -CONFIG_MACH_ARMADA_XP=y -# CONFIG_MACH_DOVE is not set -CONFIG_MACH_MVEBU_ANY=y -CONFIG_MACH_MVEBU_V7=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MANGLE_BOOTARGS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_I2C=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_MVSDIO=y -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_PXAV3=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_MARVELL=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_MVEBU_CLK_COMMON=y -CONFIG_MVEBU_CLK_COREDIV=y -CONFIG_MVEBU_CLK_CPU=y -CONFIG_MVEBU_DEVBUS=y -CONFIG_MVEBU_MBUS=y -CONFIG_MVMDIO=y -CONFIG_MVNETA=y -CONFIG_MVNETA_BM=y -CONFIG_MVNETA_BM_ENABLE=y -CONFIG_MVPP2=y -CONFIG_MV_XOR=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y -# CONFIG_NET_DSA_MV88E6XXX_PTP is not set -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_EDSA=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_ORION_WATCHDOG=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCI_MVEBU=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -# CONFIG_PHY_MVEBU_A3700_COMPHY is not set -# CONFIG_PHY_MVEBU_CP110_COMPHY is not set -CONFIG_PINCTRL=y -CONFIG_PINCTRL_ARMADA_370=y -CONFIG_PINCTRL_ARMADA_38X=y -CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_MVEBU=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PJ4B_ERRATA_4742=y -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -CONFIG_PL310_ERRATA_753970=y -# CONFIG_PL310_ERRATA_769419 is not set -CONFIG_PLAT_ORION=y -CONFIG_PM_OPP=y -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=11 -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_ARMADA38X=y -CONFIG_RTC_DRV_MV=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_SATA_MV=y -CONFIG_SATA_PMP=y -CONFIG_SCSI=y -CONFIG_SENSORS_PWM_FAN=y -CONFIG_SENSORS_TMP421=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_MVEBU_CONSOLE=y -CONFIG_SERIAL_MVEBU_UART=y -CONFIG_SFP=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -# CONFIG_SPI_ARMADA_3700 is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_ORION=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_ORION=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_LEDS_TRIGGER_USBPORT=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_MVEBU=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/mvebu/cortexa53/config-4.19 b/target/linux/mvebu/cortexa53/config-4.19 deleted file mode 100644 index 7f3c2b21de..0000000000 --- a/target/linux/mvebu/cortexa53/config-4.19 +++ /dev/null @@ -1,169 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARM64=y -# CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_64K_PAGES is not set -CONFIG_ARM64_CONT_SHIFT=4 -# CONFIG_ARM64_CRYPTO is not set -# CONFIG_ARM64_HW_AFDBM is not set -# CONFIG_ARM64_LSE_ATOMICS is not set -CONFIG_ARM64_PAGE_SHIFT=12 -# CONFIG_ARM64_PAN is not set -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -# CONFIG_ARM64_PMEM is not set -# CONFIG_ARM64_PTDUMP_DEBUGFS is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -CONFIG_ARM64_SSBD=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_UAO is not set -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -# CONFIG_ARM64_VA_BITS_48 is not set -# CONFIG_ARM64_VHE is not set -CONFIG_ARMADA_37XX_CLK=y -CONFIG_ARMADA_AP806_SYSCON=y -CONFIG_ARMADA_CP110_SYSCON=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARMADA_37XX_CPUFREQ=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_DEBUG_ALIGN_RODATA is not set -CONFIG_DMA_DIRECT_OPS=y -# CONFIG_FLATMEM_MANUAL is not set -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HUGETLBFS is not set -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_MFD_SYSCON=y -CONFIG_MMC_SDHCI_XENON=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MVEBU_GICP=y -CONFIG_MVEBU_ICU=y -CONFIG_MVEBU_ODMI=y -CONFIG_MVEBU_PIC=y -CONFIG_NEED_SG_DMA_LENGTH=y -# CONFIG_NUMA is not set -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI_AARDVARK=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_MVEBU_A3700_COMPHY=y -CONFIG_PINCTRL_ARMADA_37XX=y -CONFIG_PINCTRL_ARMADA_AP806=y -CONFIG_PINCTRL_ARMADA_CP110=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_REGULATOR_GPIO=y -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPI_ARMADA_3700=y -CONFIG_SWIOTLB=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VMAP_STACK=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa72/config-4.19 b/target/linux/mvebu/cortexa72/config-4.19 deleted file mode 100644 index c78eb84372..0000000000 --- a/target/linux/mvebu/cortexa72/config-4.19 +++ /dev/null @@ -1,176 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_INLINE_READ_LOCK=y -CONFIG_ARCH_INLINE_READ_LOCK_BH=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_READ_UNLOCK=y -CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_SPIN_LOCK=y -CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y -CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_INLINE_WRITE_LOCK=y -CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y -CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARM64=y -# CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_64K_PAGES is not set -CONFIG_ARM64_CONT_SHIFT=4 -# CONFIG_ARM64_CRYPTO is not set -# CONFIG_ARM64_HW_AFDBM is not set -# CONFIG_ARM64_LSE_ATOMICS is not set -CONFIG_ARM64_PAGE_SHIFT=12 -# CONFIG_ARM64_PAN is not set -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -# CONFIG_ARM64_PMEM is not set -# CONFIG_ARM64_PTDUMP_DEBUGFS is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -CONFIG_ARM64_SSBD=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_UAO is not set -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -# CONFIG_ARM64_VA_BITS_48 is not set -# CONFIG_ARM64_VHE is not set -CONFIG_ARMADA_37XX_CLK=y -CONFIG_ARMADA_AP806_SYSCON=y -CONFIG_ARMADA_CP110_SYSCON=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_DEBUG_ALIGN_RODATA is not set -CONFIG_DMA_DIRECT_OPS=y -# CONFIG_FLATMEM_MANUAL is not set -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HUGETLBFS is not set -CONFIG_HW_RANDOM_OMAP=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INLINE_READ_LOCK=y -CONFIG_INLINE_READ_LOCK_BH=y -CONFIG_INLINE_READ_LOCK_IRQ=y -CONFIG_INLINE_READ_LOCK_IRQSAVE=y -CONFIG_INLINE_READ_UNLOCK_BH=y -CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_SPIN_LOCK=y -CONFIG_INLINE_SPIN_LOCK_BH=y -CONFIG_INLINE_SPIN_LOCK_IRQ=y -CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y -CONFIG_INLINE_SPIN_TRYLOCK=y -CONFIG_INLINE_SPIN_TRYLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_BH=y -CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y -CONFIG_INLINE_WRITE_LOCK=y -CONFIG_INLINE_WRITE_LOCK_BH=y -CONFIG_INLINE_WRITE_LOCK_IRQ=y -CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y -CONFIG_INLINE_WRITE_UNLOCK_BH=y -CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y -CONFIG_MARVELL_10G_PHY=y -CONFIG_MFD_SYSCON=y -CONFIG_MMC_SDHCI_XENON=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MVEBU_GICP=y -CONFIG_MVEBU_ICU=y -CONFIG_MVEBU_ODMI=y -CONFIG_MVEBU_PIC=y -CONFIG_MV_XOR_V2=y -CONFIG_NEED_SG_DMA_LENGTH=y -# CONFIG_NUMA is not set -CONFIG_PARTITION_PERCPU=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_ARMADA_8K=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -# CONFIG_PCI_AARDVARK is not set -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_MVEBU_CP110_COMPHY=y -CONFIG_PINCTRL_ARMADA_37XX=y -CONFIG_PINCTRL_ARMADA_AP806=y -CONFIG_PINCTRL_ARMADA_CP110=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_RAS=y -CONFIG_REGULATOR_GPIO=y -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SWIOTLB=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VMAP_STACK=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/files-4.19/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/target/linux/mvebu/files-4.19/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts deleted file mode 100644 index 5649c4cba4..0000000000 --- a/target/linux/mvebu/files-4.19/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) -/* - * Device tree for the uDPU board. - * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) - * Copyright (C) 2016 Marvell - * Copyright (C) 2019 Methode Electronics - * Copyright (C) 2019 Telus - * - * Vladimir Vid - */ - -/dts-v1/; - -#include -#include "armada-372x.dtsi" - -/ { - model = "Methode uDPU Board"; - compatible = "methode,udpu", "marvell,armada3720"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x20000000>; - }; - - leds { - pinctrl-names = "default"; - compatible = "gpio-leds"; - - power1 { - label = "udpu:green:power"; - gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; - }; - - power2 { - label = "udpu:red:power"; - gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; - }; - - network1 { - label = "udpu:green:network"; - gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; - }; - - network2 { - label = "udpu:red:network"; - gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; - }; - - alarm1 { - label = "udpu:green:alarm"; - gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; - }; - - alarm2 { - label = "udpu:red:alarm"; - gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; - }; - }; - - sfp_eth0: sfp-eth0 { - compatible = "sff,sfp"; - i2c-bus = <&i2c0>; - los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; - }; - - sfp_eth1: sfp-eth1 { - compatible = "sff,sfp"; - i2c-bus = <&i2c1>; - los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; - }; -}; - -&sdhci0 { - status = "okay"; - bus-width = <8>; - mmc-ddr-1_8v; - mmc-hs400-1_8v; - marvell,pad-type = "fixed-1-8v"; - non-removable; - no-sd; - no-sdio; -}; - -&spi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi_quad_pins>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <54000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - /* only bootloader is located on the SPI */ - partition@0 { - label = "uboot"; - reg = <0 0x400000>; - }; - }; - }; -}; - -&i2c0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; -}; - -&i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - - lm75@48 { - status = "okay"; - compatible = "lm75"; - reg = <0x48>; - }; - - lm75@49 { - status = "okay"; - compatible = "lm75"; - reg = <0x49>; - }; -}; - -ð0 { - status = "okay"; - phy-mode = "sgmii"; - managed = "in-band-status"; - sfp = <&sfp_eth0>; -}; - -ð1 { - status = "okay"; - phy-mode = "sgmii"; - managed = "in-band-status"; - sfp = <&sfp_eth1>; -}; - -&usb3 { - status = "okay"; -}; - -&uart0 { - status = "okay"; -}; diff --git a/target/linux/mvebu/patches-4.19/002-add_powertables.patch b/target/linux/mvebu/patches-4.19/002-add_powertables.patch deleted file mode 100644 index c2fb748d5d..0000000000 --- a/target/linux/mvebu/patches-4.19/002-add_powertables.patch +++ /dev/null @@ -1,770 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -212,11 +212,19 @@ - &pcie1 { - /* Marvell 88W8864, 5GHz-only */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,2ghz = <0>; -+ }; - }; - - &pcie2 { - /* Marvell 88W8864, 2GHz-only */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,5ghz = <0>; -+ }; - }; - - &pinctrl { ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -142,3 +142,205 @@ - }; - }; - }; -+ -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 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0x14 0x15 0x15 0x15 0x14 0 0xf>; -+ }; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>; -+ CN = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -142,3 +142,205 @@ - }; - }; - }; -+ -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; -+ CA = -+ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 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0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 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0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts -@@ -142,3 +142,205 @@ - }; - }; - }; -+ -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 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0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/armada-385-linksys-rango.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts -@@ -157,6 +157,18 @@ - }; - }; - -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ }; -+}; -+ - &sdhci { - pinctrl-names = "default"; - pinctrl-0 = <&sdhci_pins>; ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -272,12 +272,100 @@ - pcie@2,0 { - /* Port 0, Lane 1 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>; -+ -+ ETSI = -+ <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; - }; - - /* Second mini-PCIe port */ - pcie@3,0 { - /* Port 0, Lane 3 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>; -+ -+ ETSI = -+ <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>; -+ }; -+ }; - }; - }; - diff --git a/target/linux/mvebu/patches-4.19/004-add_sata_disk_activity_trigger.patch b/target/linux/mvebu/patches-4.19/004-add_sata_disk_activity_trigger.patch deleted file mode 100644 index 2cb8f25490..0000000000 --- a/target/linux/mvebu/patches-4.19/004-add_sata_disk_activity_trigger.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 172230195068703b78ad5733a09492f5d6814c09 Mon Sep 17 00:00:00 2001 -From: Ansuel Smith -Date: Tue, 28 Feb 2017 14:15:50 +0100 -Subject: [PATCH] ARM: dts: armada: Add default trigger for sata led - -In others board we have the sata led set to function -with the sata led trigger by default. -This patch makes the same for these board that have sata -led but get disabled by not associating it to any trigger. - -Signed-off-by: Ansuel Smith -Acked-by: Jason Cooper -Signed-off-by: Gregory CLEMENT ---- - arch/arm/boot/dts/armada-385-linksys-caiman.dts | 1 + - arch/arm/boot/dts/armada-385-linksys-cobra.dts | 1 + - arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 1 + - 3 files changed, 3 insertions(+) - ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -68,6 +68,7 @@ - - sata { - label = "caiman:white:sata"; -+ linux,default-trigger = "disk-activity"; - }; - }; - ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -68,6 +68,7 @@ - - sata { - label = "cobra:white:sata"; -+ linux,default-trigger = "disk-activity"; - }; - }; - diff --git a/target/linux/mvebu/patches-4.19/005-linksys_hardcode_nand_ecc_settings.patch b/target/linux/mvebu/patches-4.19/005-linksys_hardcode_nand_ecc_settings.patch deleted file mode 100644 index 89a5e19803..0000000000 --- a/target/linux/mvebu/patches-4.19/005-linksys_hardcode_nand_ecc_settings.patch +++ /dev/null @@ -1,17 +0,0 @@ -Newer Linksys boards might come with a Winbond W29N02GV which can be -configured in different ways. Make sure we configure it the same way -as the older chips so everything keeps working. - -Signed-off-by: Imre Kaloz - ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -148,6 +148,8 @@ - reg = <0>; - label = "pxa3xx_nand-0"; - nand-rb = <0>; -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; - marvell,nand-keep-config; - nand-on-flash-bbt; - }; diff --git a/target/linux/mvebu/patches-4.19/006-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-4.19/006-mvebu-Mangle-bootloader-s-kernel-arguments.patch deleted file mode 100644 index 0cb9e99602..0000000000 --- a/target/linux/mvebu/patches-4.19/006-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ /dev/null @@ -1,201 +0,0 @@ -From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001 -From: Adrian Panella -Date: Thu, 9 Mar 2017 09:37:17 +0100 -Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments - -The command-line arguments provided by the boot loader will be -appended to a new device tree property: bootloader-args. -If there is a property "append-rootblock" in DT under /chosen -and a root= option in bootloaders command line it will be parsed -and added to DT bootargs with the form: XX. -Only command line ATAG will be processed, the rest of the ATAGs -sent by bootloader will be ignored. -This is usefull in dual boot systems, to get the current root partition -without afecting the rest of the system. - -Signed-off-by: Adrian Panella - -This patch has been modified to be mvebu specific. The original patch -did not pass the bootloader cmdline on if no append-rootblock stanza -was found, resulting in blank cmdline and failure to boot. - -Signed-off-by: Michael Gray ---- - arch/arm/Kconfig | 11 +++++ - arch/arm/boot/compressed/atags_to_fdt.c | 72 ++++++++++++++++++++++++++++++++- - init/main.c | 16 ++++++++ - 3 files changed, 98 insertions(+), 1 deletion(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1926,6 +1926,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN - The command-line arguments provided by the boot loader will be - appended to the the device tree bootargs property. - -+config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE -+ bool "Append rootblock parsing bootloader's kernel arguments" -+ help -+ The command-line arguments provided by the boot loader will be -+ appended to a new device tree property: bootloader-args. -+ If there is a property "append-rootblock" in DT under /chosen -+ and a root= option in bootloaders command line it will be parsed -+ and added to DT bootargs with the form: XX. -+ Only command line ATAG will be processed, the rest of the ATAGs -+ sent by bootloader will be ignored. -+ - endchoice - - config CMDLINE ---- a/arch/arm/boot/compressed/atags_to_fdt.c -+++ b/arch/arm/boot/compressed/atags_to_fdt.c -@@ -4,6 +4,8 @@ - - #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) - #define do_extend_cmdline 1 -+#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+#define do_extend_cmdline 1 - #else - #define do_extend_cmdline 0 - #endif -@@ -67,6 +69,65 @@ static uint32_t get_cell_size(const void - return cell_size; - } - -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ -+static char *append_rootblock(char *dest, const char *str, int len, void *fdt) -+{ -+ char *ptr, *end; -+ char *root="root="; -+ int i, l; -+ const char *rootblock; -+ -+ //ARM doesn't have __HAVE_ARCH_STRSTR, so search manually -+ ptr = str - 1; -+ -+ do { -+ //first find an 'r' at the begining or after a space -+ do { -+ ptr++; -+ ptr = strchr(ptr, 'r'); -+ if(!ptr) return dest; -+ -+ } while (ptr != str && *(ptr-1) != ' '); -+ -+ //then check for the rest -+ for(i = 1; i <= 4; i++) -+ if(*(ptr+i) != *(root+i)) break; -+ -+ } while (i != 5); -+ -+ end = strchr(ptr, ' '); -+ end = end ? (end - 1) : (strchr(ptr, 0) - 1); -+ -+ //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX ) -+ for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++); -+ ptr = end + 1; -+ -+ /* if append-rootblock property is set use it to append to command line */ -+ rootblock = getprop(fdt, "/chosen", "append-rootblock", &l); -+ if(rootblock != NULL) { -+ if(*dest != ' ') { -+ *dest = ' '; -+ dest++; -+ len++; -+ } -+ if (len + l + i <= COMMAND_LINE_SIZE) { -+ memcpy(dest, rootblock, l); -+ dest += l - 1; -+ memcpy(dest, ptr, i); -+ dest += i; -+ } -+ } else { -+ len = strlen(str); -+ if (len + 1 < COMMAND_LINE_SIZE) { -+ memcpy(dest, str, len); -+ dest += len; -+ } -+ } -+ return dest; -+} -+#endif -+ - static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) - { - char cmdline[COMMAND_LINE_SIZE]; -@@ -86,12 +147,21 @@ static void merge_fdt_bootargs(void *fdt - - /* and append the ATAG_CMDLINE */ - if (fdt_cmdline) { -+ -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ //save original bootloader args -+ //and append ubi.mtd with root partition number to current cmdline -+ setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline); -+ ptr = append_rootblock(ptr, fdt_cmdline, len, fdt); -+ -+#else - len = strlen(fdt_cmdline); - if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { - *ptr++ = ' '; - memcpy(ptr, fdt_cmdline, len); - ptr += len; - } -+#endif - } - *ptr = '\0'; - -@@ -148,7 +218,9 @@ int atags_to_fdt(void *atag_list, void * - else - setprop_string(fdt, "/chosen", "bootargs", - atag->u.cmdline.cmdline); -- } else if (atag->hdr.tag == ATAG_MEM) { -+ } -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE -+ else if (atag->hdr.tag == ATAG_MEM) { - if (memcount >= sizeof(mem_reg_property)/4) - continue; - if (!atag->u.mem.size) -@@ -187,6 +259,10 @@ int atags_to_fdt(void *atag_list, void * - setprop(fdt, "/memory", "reg", mem_reg_property, - 4 * memcount * memsize); - } -+#else -+ -+ } -+#endif - - return fdt_pack(fdt); - } ---- a/init/main.c -+++ b/init/main.c -@@ -102,6 +102,10 @@ - #define CREATE_TRACE_POINTS - #include - -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+#include -+#endif -+ - static int kernel_init(void *); - - extern void init_IRQ(void); -@@ -591,6 +595,18 @@ asmlinkage __visible void __init start_k - page_alloc_init(); - - pr_notice("Kernel command line: %s\n", boot_command_line); -+ -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ //Show bootloader's original command line for reference -+ if(of_chosen) { -+ const char *prop = of_get_property(of_chosen, "bootloader-args", NULL); -+ if(prop) -+ pr_notice("Bootloader command line (ignored): %s\n", prop); -+ else -+ pr_notice("Bootloader command line not present\n"); -+ } -+#endif -+ - /* parameters may set static keys */ - jump_label_init(); - parse_early_param(); diff --git a/target/linux/mvebu/patches-4.19/100-find_active_root.patch b/target/linux/mvebu/patches-4.19/100-find_active_root.patch deleted file mode 100644 index f52a5108b8..0000000000 --- a/target/linux/mvebu/patches-4.19/100-find_active_root.patch +++ /dev/null @@ -1,60 +0,0 @@ -The WRT1900AC among other Linksys routers uses a dual-firmware layout. -Dynamically rename the active partition to "ubi". - -Signed-off-by: Imre Kaloz - ---- a/drivers/mtd/ofpart.c -+++ b/drivers/mtd/ofpart.c -@@ -25,6 +25,8 @@ static bool node_has_compatible(struct d - return of_get_property(pp, "compatible", NULL); - } - -+static int mangled_rootblock; -+ - static int parse_fixed_partitions(struct mtd_info *master, - const struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -@@ -33,6 +35,7 @@ static int parse_fixed_partitions(struct - struct device_node *mtd_node; - struct device_node *ofpart_node; - const char *partname; -+ const char *owrtpart = "ubi"; - struct device_node *pp; - int nr_parts, i, ret = 0; - bool dedicated = true; -@@ -110,9 +113,13 @@ static int parse_fixed_partitions(struct - parts[i].size = of_read_number(reg + a_cells, s_cells); - parts[i].of_node = pp; - -- partname = of_get_property(pp, "label", &len); -- if (!partname) -- partname = of_get_property(pp, "name", &len); -+ if (mangled_rootblock && (i == mangled_rootblock)) { -+ partname = owrtpart; -+ } else { -+ partname = of_get_property(pp, "label", &len); -+ if (!partname) -+ partname = of_get_property(pp, "name", &len); -+ } - parts[i].name = partname; - - if (of_get_property(pp, "read-only", &len)) -@@ -219,6 +226,18 @@ static int __init ofpart_parser_init(voi - return 0; - } - -+static int __init active_root(char *str) -+{ -+ get_option(&str, &mangled_rootblock); -+ -+ if (!mangled_rootblock) -+ return 1; -+ -+ return 1; -+} -+ -+__setup("mangled_rootblock=", active_root); -+ - static void __exit ofpart_parser_exit(void) - { - deregister_mtd_parser(&ofpart_parser); diff --git a/target/linux/mvebu/patches-4.19/102-revert_i2c_delay.patch b/target/linux/mvebu/patches-4.19/102-revert_i2c_delay.patch deleted file mode 100644 index 930c0f9494..0000000000 --- a/target/linux/mvebu/patches-4.19/102-revert_i2c_delay.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp.dtsi -+++ b/arch/arm/boot/dts/armada-xp.dtsi -@@ -237,12 +237,10 @@ - }; - - &i2c0 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11000 0x100>; - }; - - &i2c1 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11100 0x100>; - }; - diff --git a/target/linux/mvebu/patches-4.19/205-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-4.19/205-armada-385-rd-mtd-partitions.patch deleted file mode 100644 index 31bd53b1f3..0000000000 --- a/target/linux/mvebu/patches-4.19/205-armada-385-rd-mtd-partitions.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-rd.dts -+++ b/arch/arm/boot/dts/armada-388-rd.dts -@@ -103,6 +103,16 @@ - compatible = "st,m25p128", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0 0x400000>; -+ }; -+ -+ partition@1 { -+ label = "firmware"; -+ reg = <0x400000 0xc00000>; -+ }; - }; - }; - diff --git a/target/linux/mvebu/patches-4.19/206-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-4.19/206-ARM-mvebu-385-ap-Add-partitions.patch deleted file mode 100644 index 2057e31c7e..0000000000 --- a/target/linux/mvebu/patches-4.19/206-ARM-mvebu-385-ap-Add-partitions.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Tue, 13 Jan 2015 11:14:09 +0100 -Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions - -Signed-off-by: Maxime Ripard ---- - arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - ---- a/arch/arm/boot/dts/armada-385-db-ap.dts -+++ b/arch/arm/boot/dts/armada-385-db-ap.dts -@@ -218,19 +218,19 @@ - #size-cells = <1>; - - partition@0 { -- label = "U-Boot"; -+ label = "u-boot"; - reg = <0x00000000 0x00800000>; - read-only; - }; - - partition@800000 { -- label = "uImage"; -+ label = "kernel"; - reg = <0x00800000 0x00400000>; - read-only; - }; - - partition@c00000 { -- label = "Root"; -+ label = "ubi"; - reg = <0x00c00000 0x3f400000>; - }; - }; diff --git a/target/linux/mvebu/patches-4.19/230-armada-xp-linksys-mamba-broken-idle.patch b/target/linux/mvebu/patches-4.19/230-armada-xp-linksys-mamba-broken-idle.patch deleted file mode 100644 index 6f36d09966..0000000000 --- a/target/linux/mvebu/patches-4.19/230-armada-xp-linksys-mamba-broken-idle.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -532,3 +532,7 @@ - }; - }; - }; -+ -+&coherencyfab { -+ broken-idle; -+}; diff --git a/target/linux/mvebu/patches-4.19/231-armada-xp-linksys-mamba-wan.patch b/target/linux/mvebu/patches-4.19/231-armada-xp-linksys-mamba-wan.patch deleted file mode 100644 index 9404d55d37..0000000000 --- a/target/linux/mvebu/patches-4.19/231-armada-xp-linksys-mamba-wan.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -248,7 +248,7 @@ - - port@4 { - reg = <4>; -- label = "internet"; -+ label = "wan"; - }; - - port@5 { diff --git a/target/linux/mvebu/patches-4.19/240-linksys-status-led.patch b/target/linux/mvebu/patches-4.19/240-linksys-status-led.patch deleted file mode 100644 index e5e83572c9..0000000000 --- a/target/linux/mvebu/patches-4.19/240-linksys-status-led.patch +++ /dev/null @@ -1,50 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -14,6 +14,13 @@ - compatible = "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - -+ aliases { -+ led-boot = &led_power; -+ led-failsafe = &led_power; -+ led-running = &led_power; -+ led-upgrade = &led_power; -+ }; -+ - chosen { - stdout-path = "serial0:115200n8"; - }; -@@ -71,7 +78,7 @@ - pinctrl-0 = <&gpio_leds_pins>; - pinctrl-names = "default"; - -- power { -+ led_power: power { - gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -26,6 +26,13 @@ - compatible = "linksys,mamba", "marvell,armadaxp-mv78230", - "marvell,armadaxp", "marvell,armada-370-xp"; - -+ aliases { -+ led-boot = &led_power; -+ led-failsafe = &led_power; -+ led-running = &led_power; -+ led-upgrade = &led_power; -+ }; -+ - chosen { - bootargs = "console=ttyS0,115200"; - stdout-path = &uart0; -@@ -197,7 +204,7 @@ - pinctrl-0 = <&power_led_pin>; - pinctrl-names = "default"; - -- power { -+ led_power: power { - label = "mamba:white:power"; - gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; - default-state = "on"; diff --git a/target/linux/mvebu/patches-4.19/241-linksys-use-eth0-as-cpu-port.patch b/target/linux/mvebu/patches-4.19/241-linksys-use-eth0-as-cpu-port.patch deleted file mode 100644 index 84d49a004b..0000000000 --- a/target/linux/mvebu/patches-4.19/241-linksys-use-eth0-as-cpu-port.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -116,7 +116,7 @@ - }; - - ð2 { -- status = "okay"; -+ status = "disabled"; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <2>; -@@ -200,10 +200,10 @@ - label = "wan"; - }; - -- port@5 { -- reg = <5>; -+ port@6 { -+ reg = <6>; - label = "cpu"; -- ethernet = <ð2>; -+ ethernet = <ð0>; - - fixed-link { - speed = <1000>; diff --git a/target/linux/mvebu/patches-4.19/250-adjust-compatible-for-linksys.patch b/target/linux/mvebu/patches-4.19/250-adjust-compatible-for-linksys.patch deleted file mode 100644 index a5d3e63810..0000000000 --- a/target/linux/mvebu/patches-4.19/250-adjust-compatible-for-linksys.patch +++ /dev/null @@ -1,68 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys-rango.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts -@@ -12,8 +12,8 @@ - - / { - model = "Linksys WRT3200ACM"; -- compatible = "linksys,rango", "linksys,armada385", "marvell,armada385", -- "marvell,armada380"; -+ compatible = "linksys,wrt3200acm", "linksys,rango", "linksys,armada385", -+ "marvell,armada385", "marvell,armada380"; - }; - - &expander0 { ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -22,9 +22,10 @@ - #include "armada-xp-mv78230.dtsi" - - / { -- model = "Linksys WRT1900AC"; -- compatible = "linksys,mamba", "marvell,armadaxp-mv78230", -- "marvell,armadaxp", "marvell,armada-370-xp"; -+ model = "Linksys WRT1900AC v1"; -+ compatible = "linksys,wrt1900ac-v1", "linksys,mamba", -+ "marvell,armadaxp-mv78230", "marvell,armadaxp", -+ "marvell,armada-370-xp"; - - aliases { - led-boot = &led_power; ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -9,8 +9,9 @@ - #include "armada-385-linksys.dtsi" - - / { -- model = "Linksys WRT1900ACv2"; -- compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385", -+ model = "Linksys WRT1900AC v2"; -+ compatible = "linksys,wrt1900ac-v2", "linksys,cobra", -+ "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - }; - ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -10,8 +10,8 @@ - - / { - model = "Linksys WRT1200AC"; -- compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385", -- "marvell,armada380"; -+ compatible = "linksys,wrt1200ac", "linksys,caiman", "linksys,armada385", -+ "marvell,armada385", "marvell,armada380"; - }; - - &expander0 { ---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts -@@ -10,7 +10,8 @@ - - / { - model = "Linksys WRT1900ACS"; -- compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385", -+ compatible = "linksys,wrt1900acs", "linksys,shelby", -+ "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - }; - diff --git a/target/linux/mvebu/patches-4.19/260-align-mcbin-compatible-with-5.4.patch b/target/linux/mvebu/patches-4.19/260-align-mcbin-compatible-with-5.4.patch deleted file mode 100644 index 53e34300db..0000000000 --- a/target/linux/mvebu/patches-4.19/260-align-mcbin-compatible-with-5.4.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts -+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts -@@ -10,8 +10,9 @@ - #include - - / { -- model = "Marvell 8040 MACCHIATOBin"; -- compatible = "marvell,armada8040-mcbin", "marvell,armada8040", -+ model = "Marvell 8040 MACCHIATOBin Double-shot"; -+ compatible = "marvell,armada8040-mcbin-doubleshot", -+ "marvell,armada8040-mcbin", "marvell,armada8040", - "marvell,armada-ap806-quad", "marvell,armada-ap806"; - - chosen { diff --git a/target/linux/mvebu/patches-4.19/300-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-4.19/300-mvneta-tx-queue-workaround.patch deleted file mode 100644 index 5d7e769246..0000000000 --- a/target/linux/mvebu/patches-4.19/300-mvneta-tx-queue-workaround.patch +++ /dev/null @@ -1,35 +0,0 @@ -The hardware queue scheduling is apparently configured with fixed -priorities, which creates a nasty fairness issue where traffic from one -CPU can starve traffic from all other CPUs. - -Work around this issue by forcing all tx packets to go through one CPU, -until this issue is fixed properly. - -Signed-off-by: Felix Fietkau ---- ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -4271,6 +4271,15 @@ static int mvneta_ethtool_set_eee(struct - return phylink_ethtool_set_eee(pp->phylink, eee); - } - -+static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb, -+ struct net_device *sb_dev, -+ select_queue_fallback_t fallback) -+{ -+ /* XXX: hardware queue scheduling is broken, -+ * use only one queue until it is fixed */ -+ return 0; -+} -+ - static const struct net_device_ops mvneta_netdev_ops = { - .ndo_open = mvneta_open, - .ndo_stop = mvneta_stop, -@@ -4281,6 +4290,7 @@ static const struct net_device_ops mvnet - .ndo_fix_features = mvneta_fix_features, - .ndo_get_stats64 = mvneta_get_stats64, - .ndo_do_ioctl = mvneta_ioctl, -+ .ndo_select_queue = mvneta_select_queue, - }; - - static const struct ethtool_ops mvneta_eth_tool_ops = { diff --git a/target/linux/mvebu/patches-4.19/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch b/target/linux/mvebu/patches-4.19/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch deleted file mode 100644 index 29f36be460..0000000000 --- a/target/linux/mvebu/patches-4.19/400-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch +++ /dev/null @@ -1,40 +0,0 @@ -From c28b2d367da8a471482e6a4aa8337ab6369a80c2 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 3 Oct 2015 09:13:05 +0100 -Subject: cpuidle: mvebu: indicate failure to enter deeper sleep states - -The cpuidle ->enter method expects the return value to be the sleep -state we entered. Returning negative numbers or other codes is not -permissible since coupled CPU idle was merged. - -At least some of the mvebu_v7_cpu_suspend() implementations return the -value from cpu_suspend(), which returns zero if the CPU vectors back -into the kernel via cpu_resume() (the success case), or the non-zero -return value of the suspend actor, or one (failure cases). - -We do not want to be returning the failure case value back to CPU idle -as that indicates that we successfully entered one of the deeper idle -states. Always return zero instead, indicating that we slept for the -shortest amount of time. - -Signed-off-by: Russell King ---- - drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/drivers/cpuidle/cpuidle-mvebu-v7.c -+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c -@@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cp - ret = mvebu_v7_cpu_suspend(deepidle); - cpu_pm_exit(); - -+ /* -+ * If we failed to enter the desired state, indicate that we -+ * slept lightly. -+ */ - if (ret) -- return ret; -+ return 0; - - return index; - } diff --git a/target/linux/mvebu/patches-4.19/401-pci-mvebu-time-out-reset-on-link-up.patch b/target/linux/mvebu/patches-4.19/401-pci-mvebu-time-out-reset-on-link-up.patch deleted file mode 100644 index 2bbb647153..0000000000 --- a/target/linux/mvebu/patches-4.19/401-pci-mvebu-time-out-reset-on-link-up.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 9 Jul 2016 10:58:16 +0100 -Subject: pci: mvebu: time out reset on link up - -If the port reports that the link is up while we are resetting, there's -little point in waiting for the full duration. - -Signed-off-by: Russell King ---- - drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++------ - 1 file changed, 14 insertions(+), 6 deletions(-) - ---- a/drivers/pci/controller/pci-mvebu.c -+++ b/drivers/pci/controller/pci-mvebu.c -@@ -1112,6 +1112,7 @@ static int mvebu_pcie_powerup(struct mve - - if (port->reset_gpio) { - u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000; -+ unsigned int i; - - of_property_read_u32(port->dn, "reset-delay-us", - &reset_udelay); -@@ -1119,7 +1120,13 @@ static int mvebu_pcie_powerup(struct mve - udelay(100); - - gpiod_set_value_cansleep(port->reset_gpio, 0); -- msleep(reset_udelay / 1000); -+ for (i = 0; i < reset_udelay; i += 1000) { -+ if (mvebu_pcie_link_up(port)) -+ break; -+ msleep(1); -+ } -+ -+ printk("%s: reset completed in %dus\n", port->name, i); - } - - return 0; -@@ -1283,15 +1290,16 @@ static int mvebu_pcie_probe(struct platf - if (!child) - continue; - -- ret = mvebu_pcie_powerup(port); -- if (ret < 0) -- continue; -- - port->base = mvebu_pcie_map_registers(pdev, child, port); - if (IS_ERR(port->base)) { - dev_err(dev, "%s: cannot map registers\n", port->name); - port->base = NULL; -- mvebu_pcie_powerdown(port); -+ continue; -+ } -+ -+ ret = mvebu_pcie_powerup(port); -+ if (ret < 0) { -+ port->base = NULL; - continue; - } - diff --git a/target/linux/mvebu/patches-4.19/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch b/target/linux/mvebu/patches-4.19/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch deleted file mode 100644 index dd2bef7f63..0000000000 --- a/target/linux/mvebu/patches-4.19/412-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 8137da20701c776ad3481115305a5e8e410871ba Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 29 Nov 2016 10:15:45 +0000 -Subject: ARM: dts: armada388-clearfog: emmc on clearfog base - -Signed-off-by: Russell King ---- - arch/arm/boot/dts/armada-388-clearfog-base.dts | 1 + - .../dts/armada-38x-solidrun-microsom-emmc.dtsi | 62 ++++++++++++++++++++++ - 2 files changed, 63 insertions(+) - create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi - ---- a/arch/arm/boot/dts/armada-388-clearfog-base.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts -@@ -7,6 +7,7 @@ - - /dts-v1/; - #include "armada-388-clearfog.dtsi" -+#include "armada-38x-solidrun-microsom-emmc.dtsi" - - / { - model = "SolidRun Clearfog Base A1"; ---- /dev/null -+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi -@@ -0,0 +1,62 @@ -+/* -+ * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This file is distributed in the hope that it will be useful -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+/ { -+ soc { -+ internal-regs { -+ sdhci@d8000 { -+ bus-width = <4>; -+ no-1-8-v; -+ non-removable; -+ pinctrl-0 = <µsom_sdhci_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ wp-inverted; -+ }; -+ }; -+ }; -+}; diff --git a/target/linux/mvebu/patches-4.19/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch b/target/linux/mvebu/patches-4.19/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch deleted file mode 100644 index b6890318f8..0000000000 --- a/target/linux/mvebu/patches-4.19/415-ARM-dts-armada388-clearfog-document-MPP-usage.patch +++ /dev/null @@ -1,124 +0,0 @@ -From 09a0122c74ec076e08512f1b00b7ccb8a450282f Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 29 Nov 2016 10:15:43 +0000 -Subject: ARM: dts: armada388-clearfog: document MPP usage - -Signed-off-by: Russell King ---- - arch/arm/boot/dts/armada-388-clearfog-base.dts | 51 ++++++++++++++++++++++++++ - arch/arm/boot/dts/armada-388-clearfog.dts | 50 +++++++++++++++++++++++++ - 2 files changed, 101 insertions(+) - ---- a/arch/arm/boot/dts/armada-388-clearfog-base.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts -@@ -67,3 +67,54 @@ - marvell,function = "gpio"; - }; - }; -+ -+/* -+MPP -+18: pu gpio pca9655 int -+19: gpio phy reset -+20: pu gpio sd0 detect -+21: sd0:cmd -+22: pd gpio mikro int -+23: -+ -+24: ua1:rxd mikro rx -+25: ua1:txd mikro tx -+26: pu i2c1:sck -+27: pu i2c1:sda -+28: sd0:clk -+29: pd gpio mikro rst -+30: -+31: -+ -+32: -+33: -+34: -+35: -+36: -+37: sd0:d3 -+38: sd0:d0 -+39: sd0:d1 -+ -+40: sd0:d2 -+41: -+42: -+43: spi1:cs2 mikro cs -+44: gpio rear button sw3 -+45: ref:clk_out0 phy#0 clock -+46: ref:clk_out1 phy#1 clock -+47: -+ -+48: gpio J18 spare gpio -+49: gpio U10 I2C_IRQ(GNSS) -+50: gpio board id? -+51: -+52: -+53: -+54: gpio mikro pwm -+55: -+ -+56: pu spi1:mosi mikro mosi -+57: pd spi1:sck mikro sck -+58: spi1:miso mikro miso -+59: -+*/ ---- a/arch/arm/boot/dts/armada-388-clearfog.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -236,3 +236,53 @@ - */ - pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>; - }; -+/* -++#define A38x_CUSTOMER_BOARD_1_MPP16_23 0x00400011 -+MPP18: gpio ? (pca9655 int?) -+MPP19: gpio ? (clkreq?) -+MPP20: gpio ? (sd0 detect) -+MPP21: sd0:cmd x sd0 -+MPP22: gpio x mikro int -+MPP23: gpio x switch irq -++#define A38x_CUSTOMER_BOARD_1_MPP24_31 0x22043333 -+MPP24: ua1:rxd x mikro rx -+MPP25: ua1:txd x mikro tx -+MPP26: i2c1:sck x mikro sck -+MPP27: i2c1:sda x mikro sda -+MPP28: sd0:clk x sd0 -+MPP29: gpio x mikro rst -+MPP30: ge1:txd2 ? (config) -+MPP31: ge1:txd3 ? (config) -++#define A38x_CUSTOMER_BOARD_1_MPP32_39 0x44400002 -+MPP32: ge1:txctl ? (unused) -+MPP33: gpio ? (pic_com0) -+MPP34: gpio x rear button (pic_com1) -+MPP35: gpio ? (pic_com2) -+MPP36: gpio ? (unused) -+MPP37: sd0:d3 x sd0 -+MPP38: sd0:d0 x sd0 -+MPP39: sd0:d1 x sd0 -++#define A38x_CUSTOMER_BOARD_1_MPP40_47 0x41144004 -+MPP40: sd0:d2 x sd0 -+MPP41: gpio x switch reset -+MPP42: gpio ? sw1-1 -+MPP43: spi1:cs2 x mikro cs -+MPP44: sata3:prsnt ? (unused) -+MPP45: ref:clk_out0 ? -+MPP46: ref:clk_out1 x switch clk -+MPP47: 4 ? (unused) -++#define A38x_CUSTOMER_BOARD_1_MPP48_55 0x40333333 -+MPP48: tdm:pclk -+MPP49: tdm:fsync -+MPP50: tdm:drx -+MPP51: tdm:dtx -+MPP52: tdm:int -+MPP53: tdm:rst -+MPP54: gpio ? (pwm) -+MPP55: spi1:cs1 x slic -++#define A38x_CUSTOMER_BOARD_1_MPP56_63 0x00004444 -+MPP56: spi1:mosi x mikro mosi -+MPP57: spi1:sck x mikro sck -+MPP58: spi1:miso x mikro miso -+MPP59: spi1:cs0 x w25q32 -+*/ diff --git a/target/linux/mvebu/patches-4.19/513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch b/target/linux/mvebu/patches-4.19/513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch deleted file mode 100644 index 880b0d9241..0000000000 --- a/target/linux/mvebu/patches-4.19/513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch +++ /dev/null @@ -1,40 +0,0 @@ -From eefe328439642101774f0f5c4ea0dc6ba1cfb687 Mon Sep 17 00:00:00 2001 -From: Ding Tao -Date: Fri, 26 Oct 2018 11:50:27 +0000 -Subject: [PATCH] arm64: dts: marvell: armada37xx: Add emmc/sdio pinctrl - definition - -Add emmc/sdio pinctrl definition for marvell armada37xx SoCs. - -Signed-off-by: Ding Tao -Signed-off-by: Gregory CLEMENT ---- - arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi -+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi -@@ -221,6 +221,11 @@ - groups = "uart2"; - function = "uart"; - }; -+ -+ mmc_pins: mmc-pins { -+ groups = "emmc_nb"; -+ function = "emmc"; -+ }; - }; - - nb_pm: syscon@14000 { -@@ -253,6 +258,11 @@ - function = "mii"; - }; - -+ sdio_pins: sdio-pins { -+ groups = "sdio_sb"; -+ function = "sdio"; -+ }; -+ - }; - - eth0: ethernet@30000 { diff --git a/target/linux/mvebu/patches-4.19/514-arm64-dts-marvell-armada-37xx-Enable-emmc-on-espress.patch b/target/linux/mvebu/patches-4.19/514-arm64-dts-marvell-armada-37xx-Enable-emmc-on-espress.patch deleted file mode 100644 index 77af3d1219..0000000000 --- a/target/linux/mvebu/patches-4.19/514-arm64-dts-marvell-armada-37xx-Enable-emmc-on-espress.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 43ebc7c1b3ed8198b9acf3019eca16e722f7331c Mon Sep 17 00:00:00 2001 -From: Ding Tao -Date: Fri, 26 Oct 2018 11:50:28 +0000 -Subject: [PATCH] arm64: dts: marvell: armada-37xx: Enable emmc on espressobin - -The ESPRESSObin board has a emmc interface available on U11: declare it -and let the bootloader enable it if the emmc is present. - -[gregory.clement@bootlin.com: disable the emmc by default] -Signed-off-by: Ding Tao -Signed-off-by: Gregory CLEMENT ---- - .../dts/marvell/armada-3720-espressobin.dts | 22 +++++++++++++++++++ - 1 file changed, 22 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -60,9 +60,31 @@ - cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>; - marvell,pad-type = "sd"; - vqmmc-supply = <&vcc_sd_reg1>; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; - status = "okay"; - }; - -+/* U11 */ -+&sdhci0 { -+ non-removable; -+ bus-width = <8>; -+ mmc-ddr-1_8v; -+ mmc-hs400-1_8v; -+ marvell,xenon-emmc; -+ marvell,xenon-tun-count = <9>; -+ marvell,pad-type = "fixed-1-8v"; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc_pins>; -+/* -+ * This eMMC is not populated on all boards, so disable it by -+ * default and let the bootloader enable it, if it is present -+ */ -+ status = "disabled"; -+}; -+ - &spi0 { - status = "okay"; - diff --git a/target/linux/mvebu/patches-4.19/520-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch b/target/linux/mvebu/patches-4.19/520-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch deleted file mode 100644 index e989f59d5c..0000000000 --- a/target/linux/mvebu/patches-4.19/520-arm64-dts-marvell-armada37xx-Add-eth0-alias.patch +++ /dev/null @@ -1,20 +0,0 @@ -From be893f672e340b56ca60f2f6c32fdd713a5852f5 Mon Sep 17 00:00:00 2001 -From: Kevin Mihelich -Date: Tue, 4 Jul 2017 19:25:28 -0600 -Subject: arm64: dts: marvell: armada37xx: Add eth0 alias - -Signed-off-by: Kevin Mihelich ---- - arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi -+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi -@@ -18,6 +18,7 @@ - #size-cells = <2>; - - aliases { -+ ethernet0 = ð0; - serial0 = &uart0; - serial1 = &uart1; - }; diff --git a/target/linux/mvebu/patches-4.19/521-arm64-dts-armada-3720-espressobin-correct-spi-node.patch b/target/linux/mvebu/patches-4.19/521-arm64-dts-armada-3720-espressobin-correct-spi-node.patch deleted file mode 100644 index 0f39b2a3c2..0000000000 --- a/target/linux/mvebu/patches-4.19/521-arm64-dts-armada-3720-espressobin-correct-spi-node.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 3217cdfe8a3eae76fafbebbe407be5985a7fd4c2 Mon Sep 17 00:00:00 2001 -From: Tomasz Maciej Nowak -Date: Mon, 31 Dec 2018 14:18:50 +0100 -Subject: [PATCH] arm64: dts: armada-3720-espressobin: correct spi node - -The manufacturer of this board, ships it with various SPI NOR chips and -increments U-Boot bootloader version along the time. There is no way to -tell which is placed on the board since no revision bump takes place. -This creates two issues. - -The first, cosmetic. Since the SPI chip may differ, there's message on -boot stating that kernel expected w25q32dw and found different one. To -correct this, remove optional device-specific compatible string. Being -here lets replace bogus "spi-flash" string with proper one. - -The second is linked to partitions layout, it changed after commit [1] -in Marvells downstream U-Boot fork, shifting environment location to the -end of boot device. Since the new boards can have U-Boot with this -change it can lead to improper results writing or reading from these -partitions. We can't tell if users will update bootloader to recent -version, so let's drop current layout. - -1. https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/81e7251252aefe1a6b829ed05f3586320cb45372 - -Signed-off-by: Tomasz Maciej Nowak ---- - .../dts/marvell/armada-3720-espressobin.dts | 18 +----------------- - 1 file changed, 1 insertion(+), 17 deletions(-) - ---- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -90,25 +90,9 @@ - - flash@0 { - reg = <0>; -- compatible = "winbond,w25q32dw", "jedec,spi-flash"; -+ compatible = "jedec,spi-nor"; - spi-max-frequency = <104000000>; - m25p,fast-read; -- -- partitions { -- compatible = "fixed-partitions"; -- #address-cells = <1>; -- #size-cells = <1>; -- -- partition@0 { -- label = "uboot"; -- reg = <0 0x180000>; -- }; -- -- partition@180000 { -- label = "ubootenv"; -- reg = <0x180000 0x10000>; -- }; -- }; - }; - }; - diff --git a/target/linux/mvebu/patches-4.19/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch b/target/linux/mvebu/patches-4.19/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch deleted file mode 100644 index cea0d1db44..0000000000 --- a/target/linux/mvebu/patches-4.19/522-arm64-dts-marvell-armada-3720-espressobin-add-ports-.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 6ea9a1ee9367fb35acff1c08a0dc4213ff4687a0 Mon Sep 17 00:00:00 2001 -From: Tomasz Maciej Nowak -Date: Tue, 9 Apr 2019 15:53:42 +0200 -Subject: [PATCH] arm64: dts: marvell: armada-3720-espressobin: add ports - phandle - -Instead of referencing the whole mdio node, add ports phandle to adjust -port labels in dts for different hardware iterations of ESPRESSObin -boards. - -Signed-off-by: Tomasz Maciej Nowak ---- - arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -132,7 +132,7 @@ - - dsa,member = <0 0>; - -- ports { -+ ports: ports { - #address-cells = <1>; - #size-cells = <0>; - diff --git a/target/linux/mvebu/patches-4.19/523-Revert-PCI-aardvark-Convert-to-use-pci_host_probe.patch b/target/linux/mvebu/patches-4.19/523-Revert-PCI-aardvark-Convert-to-use-pci_host_probe.patch deleted file mode 100644 index 4cadd791ea..0000000000 --- a/target/linux/mvebu/patches-4.19/523-Revert-PCI-aardvark-Convert-to-use-pci_host_probe.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 5e79c0c381eb085a2aa2da175eedea1950f07520 Mon Sep 17 00:00:00 2001 -From: Tomasz Maciej Nowak -Date: Tue, 30 Apr 2019 15:37:34 +0200 -Subject: [PATCH] Revert "PCI: aardvark: Convert to use pci_host_probe()" - -This reverts commit c8e144f8ab00e6c4a070a932ef9c57db09aa41cf. ---- - drivers/pci/controller/pci-aardvark.c | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) - ---- a/drivers/pci/controller/pci-aardvark.c -+++ b/drivers/pci/controller/pci-aardvark.c -@@ -839,6 +839,7 @@ static int advk_pcie_probe(struct platfo - struct device *dev = &pdev->dev; - struct advk_pcie *pcie; - struct resource *res; -+ struct pci_bus *bus, *child; - struct pci_host_bridge *bridge; - int ret, irq; - -@@ -892,13 +893,22 @@ static int advk_pcie_probe(struct platfo - bridge->map_irq = of_irq_parse_and_map_pci; - bridge->swizzle_irq = pci_common_swizzle; - -- ret = pci_host_probe(bridge); -+ ret = pci_scan_root_bus_bridge(bridge); - if (ret < 0) { - advk_pcie_remove_msi_irq_domain(pcie); - advk_pcie_remove_irq_domain(pcie); - return ret; - } - -+ bus = bridge->bus; -+ -+ pci_bus_size_bridges(bus); -+ pci_bus_assign_resources(bus); -+ -+ list_for_each_entry(child, &bus->children, node) -+ pcie_bus_configure_settings(child); -+ -+ pci_bus_add_devices(bus); - return 0; - } - diff --git a/target/linux/mvebu/patches-4.19/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch b/target/linux/mvebu/patches-4.19/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch deleted file mode 100644 index af221499a8..0000000000 --- a/target/linux/mvebu/patches-4.19/524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch +++ /dev/null @@ -1,138 +0,0 @@ -From patchwork Thu Sep 28 12:58:34 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2, - 3/7] PCI: aardvark: set host and device to the same MAX payload size -X-Patchwork-Submitter: Thomas Petazzoni -X-Patchwork-Id: 819587 -Message-Id: <20170928125838.11887-4-thomas.petazzoni@free-electrons.com> -To: Bjorn Helgaas , linux-pci@vger.kernel.org -Cc: Jason Cooper , Andrew Lunn , - Sebastian Hesselbarth , Gregory Clement - , - Nadav Haklai , Hanna Hawa , - Yehuda Yitschak , - linux-arm-kernel@lists.infradead.org, Antoine Tenart - , =?utf-8?q?Miqu=C3=A8l_Raynal?= - , Victor Gu , - Thomas Petazzoni -Date: Thu, 28 Sep 2017 14:58:34 +0200 -From: Thomas Petazzoni -List-Id: - -From: Victor Gu - -Since the Aardvark does not implement a PCIe root bus, the Linux PCIe -subsystem will not align the MAX payload size between the host and the -device. This patch ensures that the host and device have the same MAX -payload size, fixing a number of problems with various PCIe devices. - -This is part of fixing bug -https://bugzilla.kernel.org/show_bug.cgi?id=196339, this commit was -reported as the user to be important to get a Intel 7260 mini-PCIe -WiFi card working. - -Fixes: Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver") -Signed-off-by: Victor Gu -Reviewed-by: Evan Wang -Reviewed-by: Nadav Haklai -[Thomas: tweak commit log.] -Signed-off-by: Thomas Petazzoni ---- - drivers/pci/controller/pci-aardvark.c | 60 ++++++++++++++++++++++++++++++++++++++++- - 1 file changed, 59 insertions(+), 1 deletion(-) - ---- a/drivers/pci/controller/pci-aardvark.c -+++ b/drivers/pci/controller/pci-aardvark.c -@@ -29,9 +29,11 @@ - #define PCIE_CORE_DEV_CTRL_STATS_REG 0xc8 - #define PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE (0 << 4) - #define PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT 5 -+#define PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ 0x2 - #define PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE (0 << 11) - #define PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT 12 - #define PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ 0x2 -+#define PCIE_CORE_MPS_UNIT_BYTE 128 - #define PCIE_CORE_LINK_CTRL_STAT_REG 0xd0 - #define PCIE_CORE_LINK_L0S_ENTRY BIT(0) - #define PCIE_CORE_LINK_TRAINING BIT(5) -@@ -253,7 +255,8 @@ static void advk_pcie_setup_hw(struct ad - - /* Set PCIe Device Control and Status 1 PF0 register */ - reg = PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE | -- (7 << PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) | -+ (PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ << -+ PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) | - PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE | - (PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ << - PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT); -@@ -834,6 +837,58 @@ out_release_res: - return err; - } - -+static int advk_pcie_find_smpss(struct pci_dev *dev, void *data) -+{ -+ u8 *smpss = data; -+ -+ if (!dev) -+ return 0; -+ -+ if (!pci_is_pcie(dev)) -+ return 0; -+ -+ if (*smpss > dev->pcie_mpss) -+ *smpss = dev->pcie_mpss; -+ -+ return 0; -+} -+ -+static int advk_pcie_bus_configure_mps(struct pci_dev *dev, void *data) -+{ -+ int mps; -+ -+ if (!dev) -+ return 0; -+ -+ if (!pci_is_pcie(dev)) -+ return 0; -+ -+ mps = PCIE_CORE_MPS_UNIT_BYTE << *(u8 *)data; -+ pcie_set_mps(dev, mps); -+ -+ return 0; -+} -+ -+static void advk_pcie_configure_mps(struct pci_bus *bus, struct advk_pcie *pcie) -+{ -+ u8 smpss = PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ; -+ u32 reg; -+ -+ /* Find the minimal supported MAX payload size */ -+ advk_pcie_find_smpss(bus->self, &smpss); -+ pci_walk_bus(bus, advk_pcie_find_smpss, &smpss); -+ -+ /* Configure RC MAX payload size */ -+ reg = advk_readl(pcie, PCIE_CORE_DEV_CTRL_STATS_REG); -+ reg &= ~PCI_EXP_DEVCTL_PAYLOAD; -+ reg |= smpss << PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT; -+ advk_writel(pcie, reg, PCIE_CORE_DEV_CTRL_STATS_REG); -+ -+ /* Configure device MAX payload size */ -+ advk_pcie_bus_configure_mps(bus->self, &smpss); -+ pci_walk_bus(bus, advk_pcie_bus_configure_mps, &smpss); -+} -+ - static int advk_pcie_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -@@ -908,6 +963,9 @@ static int advk_pcie_probe(struct platfo - list_for_each_entry(child, &bus->children, node) - pcie_bus_configure_settings(child); - -+ /* Configure the MAX pay load size */ -+ advk_pcie_configure_mps(bus, pcie); -+ - pci_bus_add_devices(bus); - return 0; - } diff --git a/target/linux/mvebu/patches-4.19/527-PCI-aardvark-allow-to-specify-link-capability.patch b/target/linux/mvebu/patches-4.19/527-PCI-aardvark-allow-to-specify-link-capability.patch deleted file mode 100644 index 0ac3476147..0000000000 --- a/target/linux/mvebu/patches-4.19/527-PCI-aardvark-allow-to-specify-link-capability.patch +++ /dev/null @@ -1,43 +0,0 @@ -From f70b629e488cc3f2a325ac35476f4f7ae502c5d0 Mon Sep 17 00:00:00 2001 -From: Tomasz Maciej Nowak -Date: Thu, 14 Jun 2018 14:24:40 +0200 -Subject: [PATCH 1/2] PCI: aardvark: allow to specify link capability - -Use DT of_pci_get_max_link_speed() facility to allow specifying link -capability. If none or unspecified value is given it falls back to gen2, -which is default for Armada 3700 SoC. - -Signed-off-by: Tomasz Maciej Nowak ---- - drivers/pci/controller/pci-aardvark.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - ---- a/drivers/pci/controller/pci-aardvark.c -+++ b/drivers/pci/controller/pci-aardvark.c -@@ -233,6 +233,8 @@ static int advk_pcie_wait_for_link(struc - - static void advk_pcie_setup_hw(struct advk_pcie *pcie) - { -+ struct device *dev = &pcie->pdev->dev; -+ struct device_node *node = dev->of_node; - u32 reg; - - /* Set to Direct mode */ -@@ -267,10 +269,15 @@ static void advk_pcie_setup_hw(struct ad - PCIE_CORE_CTRL2_TD_ENABLE; - advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); - -- /* Set GEN2 */ -+ /* Set GEN */ - reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); - reg &= ~PCIE_GEN_SEL_MSK; -- reg |= SPEED_GEN_2; -+ if (of_pci_get_max_link_speed(node) == 1) -+ reg |= SPEED_GEN_1; -+ else if (of_pci_get_max_link_speed(node) == 3) -+ reg |= SPEED_GEN_3; -+ else -+ reg |= SPEED_GEN_2; - advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); - - /* Set lane X1 */ diff --git a/target/linux/mvebu/patches-4.19/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch b/target/linux/mvebu/patches-4.19/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch deleted file mode 100644 index 88080d64ca..0000000000 --- a/target/linux/mvebu/patches-4.19/528-arm64-dts-armada-3720-espressobin-set-max-link-to-ge.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 33f8fdcedb01680427328d710594facef7a0092c Mon Sep 17 00:00:00 2001 -From: Tomasz Maciej Nowak -Date: Thu, 14 Jun 2018 14:40:26 +0200 -Subject: [PATCH 2/2] arm64: dts: armada-3720-espressobin: set max link to gen1 - -Since the beginning there's been an issue with initializing the Atheros -based MiniPCIe wireless cards. Here's an example of kerenel log: - - OF: PCI: host bridge /soc/pcie@d0070000 ranges: - OF: PCI: MEM 0xe8000000..0xe8ffffff -> 0xe8000000 - OF: PCI: IO 0xe9000000..0xe900ffff -> 0xe9000000 - advk-pcie d0070000.pcie: link up - advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00 - pci_bus 0000:00: root bus resource [bus 00-ff] - pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff] - pci_bus 0000:00: root bus resource [io 0x0000-0xffff](bus address [0xe9000000-0xe900ffff]) - pci 0000:00:00.0: BAR 0: assigned [mem0xe8000000-0xe801ffff 64bit] - pci 0000:00:00.0: BAR 6: assigned [mem0xe8020000-0xe802ffff pref] - [...] - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x44 - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 - ath9k 0000:00:00.0: enabling device (0000 -> 0002) - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0xc - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x40 - ath9k 0000:00:00.0: request_irq failed - advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 - ath9k: probe of 0000:00:00.0 failed with error -22 - -The same happens for ath5k cards, while ath10k card didn't appear at -all (not detected): - - OF: PCI: host bridge /soc/pcie@d0070000 ranges: - OF: PCI: MEM 0xe8000000..0xe8ffffff -> 0xe8000000 - OF: PCI: IO 0xe9000000..0xe900ffff -> 0xe9000000 - advk-pcie d0070000.pcie: link never came up - advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00 - pci_bus 0000:00: root bus resource [bus 00-ff] - pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff] - pci_bus 0000:00: root bus resource [io 0x0000-0xffff](bus address [0xe9000000-0xe900ffff]) - advk-pcie d0070000.pcie: config read/write timed out - -Following the issue on esppressobin.net forum [1] the workaround seems -to be limiting the speed of PCIe bridge to 1st generation. This fixed -the initialisation of all tested Atheros wireless cards. -The patch in the forum thread swaped registers which would limit speed -for all Armada 3700 based boards. The approach in this patch, in -conjunction with "PCI: aardvark: allow to specify link capability" patch -is less invasive, it only touches the affected board. - -For the record, the iwlwifi and mt76 cards were not affected by this -issue. - -1. http://espressobin.net/forums/topic/which-pcie-wlan-cards-are-supported - -Signed-off-by: Tomasz Maciej Nowak ---- - arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts -@@ -46,6 +46,8 @@ - /* J9 */ - &pcie0 { - status = "okay"; -+ -+ max-link-speed = <1>; - }; - - /* J6 */ diff --git a/target/linux/mvebu/patches-4.19/531-net-mvneta-Add-support-for-2500Mbps-SGMII.patch b/target/linux/mvebu/patches-4.19/531-net-mvneta-Add-support-for-2500Mbps-SGMII.patch deleted file mode 100644 index f56d726a28..0000000000 --- a/target/linux/mvebu/patches-4.19/531-net-mvneta-Add-support-for-2500Mbps-SGMII.patch +++ /dev/null @@ -1,104 +0,0 @@ -From da58a931f248f423f917c3a0b3c94303aa30a738 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Tue, 25 Sep 2018 15:59:39 +0200 -Subject: [PATCH] net: mvneta: Add support for 2500Mbps SGMII - -The mvneta controller can handle speeds up to 2500Mbps on the SGMII -interface. This relies on serdes configuration, the lane must be -configured at 3.125Gbps and we can't use in-band autoneg at that speed. - -The main issue when supporting that speed on this particular controller -is that the link partner can send ethernet frames with a shortened -preamble, which if not explicitly enabled in the controller will cause -unexpected behaviours. - -This was tested on Armada 385, with the comphy configuration done in -bootloader. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 27 +++++++++++++++++++++++---- - 1 file changed, 23 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -221,6 +221,8 @@ - #define MVNETA_GMAC_AN_FLOW_CTRL_EN BIT(11) - #define MVNETA_GMAC_CONFIG_FULL_DUPLEX BIT(12) - #define MVNETA_GMAC_AN_DUPLEX_EN BIT(13) -+#define MVNETA_GMAC_CTRL_4 0x2c90 -+#define MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE BIT(1) - #define MVNETA_MIB_COUNTERS_BASE 0x3000 - #define MVNETA_MIB_LATE_COLLISION 0x7c - #define MVNETA_DA_FILT_SPEC_MCAST 0x3400 -@@ -3358,6 +3360,7 @@ static void mvneta_validate(struct net_d - if (state->interface != PHY_INTERFACE_MODE_NA && - state->interface != PHY_INTERFACE_MODE_QSGMII && - state->interface != PHY_INTERFACE_MODE_SGMII && -+ state->interface != PHY_INTERFACE_MODE_2500BASEX && - !phy_interface_mode_is_8023z(state->interface) && - !phy_interface_mode_is_rgmii(state->interface)) { - bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); -@@ -3370,9 +3373,15 @@ static void mvneta_validate(struct net_d - - /* Asymmetric pause is unsupported */ - phylink_set(mask, Pause); -- /* Half-duplex at speeds higher than 100Mbit is unsupported */ -- phylink_set(mask, 1000baseT_Full); -- phylink_set(mask, 1000baseX_Full); -+ -+ /* We cannot use 1Gbps when using the 2.5G interface. */ -+ if (state->interface == PHY_INTERFACE_MODE_2500BASEX) { -+ phylink_set(mask, 2500baseT_Full); -+ phylink_set(mask, 2500baseX_Full); -+ } else { -+ phylink_set(mask, 1000baseT_Full); -+ phylink_set(mask, 1000baseX_Full); -+ } - - if (!phy_interface_mode_is_8023z(state->interface)) { - /* 10M and 100M are only supported in non-802.3z mode */ -@@ -3433,12 +3442,14 @@ static void mvneta_mac_config(struct net - struct mvneta_port *pp = netdev_priv(ndev); - u32 new_ctrl0, gmac_ctrl0 = mvreg_read(pp, MVNETA_GMAC_CTRL_0); - u32 new_ctrl2, gmac_ctrl2 = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -+ u32 new_ctrl4, gmac_ctrl4 = mvreg_read(pp, MVNETA_GMAC_CTRL_4); - u32 new_clk, gmac_clk = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); - u32 new_an, gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); - - new_ctrl0 = gmac_ctrl0 & ~MVNETA_GMAC0_PORT_1000BASE_X; - new_ctrl2 = gmac_ctrl2 & ~(MVNETA_GMAC2_INBAND_AN_ENABLE | - MVNETA_GMAC2_PORT_RESET); -+ new_ctrl4 = gmac_ctrl4 & ~(MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE); - new_clk = gmac_clk & ~MVNETA_GMAC_1MS_CLOCK_ENABLE; - new_an = gmac_an & ~(MVNETA_GMAC_INBAND_AN_ENABLE | - MVNETA_GMAC_INBAND_RESTART_AN | -@@ -3471,7 +3482,7 @@ static void mvneta_mac_config(struct net - if (state->duplex) - new_an |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; - -- if (state->speed == SPEED_1000) -+ if (state->speed == SPEED_1000 || state->speed == SPEED_2500) - new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED; - else if (state->speed == SPEED_100) - new_an |= MVNETA_GMAC_CONFIG_MII_SPEED; -@@ -3510,10 +3521,18 @@ static void mvneta_mac_config(struct net - MVNETA_GMAC_FORCE_LINK_DOWN); - } - -+ /* When at 2.5G, the link partner can send frames with shortened -+ * preambles. -+ */ -+ if (state->speed == SPEED_2500) -+ new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE; -+ - if (new_ctrl0 != gmac_ctrl0) - mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0); - if (new_ctrl2 != gmac_ctrl2) - mvreg_write(pp, MVNETA_GMAC_CTRL_2, new_ctrl2); -+ if (new_ctrl4 != gmac_ctrl4) -+ mvreg_write(pp, MVNETA_GMAC_CTRL_4, new_ctrl4); - if (new_clk != gmac_clk) - mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, new_clk); - if (new_an != gmac_an) diff --git a/target/linux/mvebu/patches-4.19/532-net-mvneta-correct-typo.patch b/target/linux/mvebu/patches-4.19/532-net-mvneta-correct-typo.patch deleted file mode 100644 index b6e16c54a4..0000000000 --- a/target/linux/mvebu/patches-4.19/532-net-mvneta-correct-typo.patch +++ /dev/null @@ -1,33 +0,0 @@ -From fbd1d5245372e48b494120a30fe0b34b304576c4 Mon Sep 17 00:00:00 2001 -From: Alexandre Belloni -Date: Fri, 9 Nov 2018 17:37:20 +0100 -Subject: [PATCH] net: mvneta: correct typo - -The reserved variable should be named reserved1. - -Signed-off-by: Alexandre Belloni -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -495,7 +495,7 @@ struct mvneta_port { - #if defined(__LITTLE_ENDIAN) - struct mvneta_tx_desc { - u32 command; /* Options used by HW for packet transmitting.*/ -- u16 reserverd1; /* csum_l4 (for future use) */ -+ u16 reserved1; /* csum_l4 (for future use) */ - u16 data_size; /* Data size of transmitted packet in bytes */ - u32 buf_phys_addr; /* Physical addr of transmitted buffer */ - u32 reserved2; /* hw_cmd - (for future use, PMT) */ -@@ -520,7 +520,7 @@ struct mvneta_rx_desc { - #else - struct mvneta_tx_desc { - u16 data_size; /* Data size of transmitted packet in bytes */ -- u16 reserverd1; /* csum_l4 (for future use) */ -+ u16 reserved1; /* csum_l4 (for future use) */ - u32 command; /* Options used by HW for packet transmitting.*/ - u32 reserved2; /* hw_cmd - (for future use, PMT) */ - u32 buf_phys_addr; /* Physical addr of transmitted buffer */ diff --git a/target/linux/mvebu/patches-4.19/533-net-mvneta-Dont-advertise-2.5G-modes.patch b/target/linux/mvebu/patches-4.19/533-net-mvneta-Dont-advertise-2.5G-modes.patch deleted file mode 100644 index e85a61d197..0000000000 --- a/target/linux/mvebu/patches-4.19/533-net-mvneta-Dont-advertise-2.5G-modes.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 83e65df6dfece9eb588735459428f221eb930c0c Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 9 Nov 2018 09:17:33 +0100 -Subject: [PATCH] net: mvneta: Don't advertise 2.5G modes - -Using 2.5G speed relies on the SerDes lanes being configured -accordingly. The lanes have to be reconfigured to switch between -1G and 2.5G, and for now only the bootloader does this configuration. - -In the case we add a Comphy driver to handle switching the lanes -dynamically, it's better for now to stick with supporting only 1G and -add advertisement for 2.5G once we really are capable of handling both -speeds without problem. - -Since the interface mode is initialy taken from the DT, we want to make -sure that adding comphy support won't break boards that don't update -their dtb. - -Fixes: da58a931f248 ("net: mvneta: Add support for 2500Mbps SGMII") -Reported-by: Andrew Lunn -Reported-by: Russell King -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 12 +++--------- - 1 file changed, 3 insertions(+), 9 deletions(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3360,7 +3360,6 @@ static void mvneta_validate(struct net_d - if (state->interface != PHY_INTERFACE_MODE_NA && - state->interface != PHY_INTERFACE_MODE_QSGMII && - state->interface != PHY_INTERFACE_MODE_SGMII && -- state->interface != PHY_INTERFACE_MODE_2500BASEX && - !phy_interface_mode_is_8023z(state->interface) && - !phy_interface_mode_is_rgmii(state->interface)) { - bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); -@@ -3374,14 +3373,9 @@ static void mvneta_validate(struct net_d - /* Asymmetric pause is unsupported */ - phylink_set(mask, Pause); - -- /* We cannot use 1Gbps when using the 2.5G interface. */ -- if (state->interface == PHY_INTERFACE_MODE_2500BASEX) { -- phylink_set(mask, 2500baseT_Full); -- phylink_set(mask, 2500baseX_Full); -- } else { -- phylink_set(mask, 1000baseT_Full); -- phylink_set(mask, 1000baseX_Full); -- } -+ /* Half-duplex at speeds higher than 100Mbit is unsupported */ -+ phylink_set(mask, 1000baseT_Full); -+ phylink_set(mask, 1000baseX_Full); - - if (!phy_interface_mode_is_8023z(state->interface)) { - /* 10M and 100M are only supported in non-802.3z mode */ diff --git a/target/linux/mvebu/patches-4.19/534-net-mvneta-remove-redundant-check-for.patch b/target/linux/mvebu/patches-4.19/534-net-mvneta-remove-redundant-check-for.patch deleted file mode 100644 index 435ef92a12..0000000000 --- a/target/linux/mvebu/patches-4.19/534-net-mvneta-remove-redundant-check-for.patch +++ /dev/null @@ -1,30 +0,0 @@ -From e4a3e9ff5ba9f6b67595ec2768ed4be2054c2aa5 Mon Sep 17 00:00:00 2001 -From: YueHaibing -Date: Thu, 22 Nov 2018 14:42:00 +0800 -Subject: [PATCH] net: mvneta: remove redundant check for - eee->tx_lpi_timer < 0 - -fixes the smatch warning: - -drivers/net/ethernet/marvell/mvneta.c:4252 mvneta_ethtool_set_eee() warn: - unsigned 'eee->tx_lpi_timer' is never less than zero. - -Signed-off-by: YueHaibing -Acked-by: Thomas Petazzoni -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -4267,8 +4267,7 @@ static int mvneta_ethtool_set_eee(struct - - /* The Armada 37x documents do not give limits for this other than - * it being an 8-bit register. */ -- if (eee->tx_lpi_enabled && -- (eee->tx_lpi_timer < 0 || eee->tx_lpi_timer > 255)) -+ if (eee->tx_lpi_enabled && eee->tx_lpi_timer > 255) - return -EINVAL; - - lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); diff --git a/target/linux/mvebu/patches-4.19/535-net-marvell-neta-add-comphy-support.patch b/target/linux/mvebu/patches-4.19/535-net-marvell-neta-add-comphy-support.patch deleted file mode 100644 index ecd38e3baa..0000000000 --- a/target/linux/mvebu/patches-4.19/535-net-marvell-neta-add-comphy-support.patch +++ /dev/null @@ -1,159 +0,0 @@ -From a10c1c8191e04c21769656c2ca8e1c69a6218954 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 7 Feb 2019 16:19:26 +0000 -Subject: [PATCH] net: marvell: neta: add comphy support - -Add support for the common phy binding, so that we can reconfigure the -comphy according to the desired ethernet speed. This will allow us to -support 1000base-X and 2500base-X SFPs dynamically on SolidRun Clearfog. - -Signed-off-by: Russell King -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 45 +++++++++++++++++++++++++++++++---- - 1 file changed, 41 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -438,6 +439,7 @@ struct mvneta_port { - struct device_node *dn; - unsigned int tx_csum_limit; - struct phylink *phylink; -+ struct phy *comphy; - - struct mvneta_bm *bm_priv; - struct mvneta_bm_pool *pool_long; -@@ -3167,6 +3169,8 @@ static void mvneta_start_dev(struct mvne - { - int cpu; - -+ WARN_ON(phy_power_on(pp->comphy)); -+ - mvneta_max_rx_size_set(pp, pp->pkt_size); - mvneta_txq_max_tx_size_set(pp, pp->pkt_size); - -@@ -3229,6 +3233,8 @@ static void mvneta_stop_dev(struct mvnet - - mvneta_tx_reset(pp); - mvneta_rx_reset(pp); -+ -+ WARN_ON(phy_power_off(pp->comphy)); - } - - static void mvneta_percpu_enable(void *arg) -@@ -3354,6 +3360,7 @@ static int mvneta_set_mac_addr(struct ne - static void mvneta_validate(struct net_device *ndev, unsigned long *supported, - struct phylink_link_state *state) - { -+ struct mvneta_port *pp = netdev_priv(ndev); - __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; - - /* We only support QSGMII, SGMII, 802.3z and RGMII modes */ -@@ -3374,8 +3381,13 @@ static void mvneta_validate(struct net_d - phylink_set(mask, Pause); - - /* Half-duplex at speeds higher than 100Mbit is unsupported */ -- phylink_set(mask, 1000baseT_Full); -- phylink_set(mask, 1000baseX_Full); -+ if (pp->comphy || state->interface != PHY_INTERFACE_MODE_2500BASEX) { -+ phylink_set(mask, 1000baseT_Full); -+ phylink_set(mask, 1000baseX_Full); -+ } -+ if (pp->comphy || state->interface == PHY_INTERFACE_MODE_2500BASEX) { -+ phylink_set(mask, 2500baseX_Full); -+ } - - if (!phy_interface_mode_is_8023z(state->interface)) { - /* 10M and 100M are only supported in non-802.3z mode */ -@@ -3389,6 +3401,11 @@ static void mvneta_validate(struct net_d - __ETHTOOL_LINK_MODE_MASK_NBITS); - bitmap_and(state->advertising, state->advertising, mask, - __ETHTOOL_LINK_MODE_MASK_NBITS); -+ -+ /* We can only operate at 2500BaseX or 1000BaseX. If requested -+ * to advertise both, only report advertising at 2500BaseX. -+ */ -+ phylink_helper_basex_speed(state); - } - - static int mvneta_mac_link_state(struct net_device *ndev, -@@ -3400,7 +3417,9 @@ static int mvneta_mac_link_state(struct - gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS); - - if (gmac_stat & MVNETA_GMAC_SPEED_1000) -- state->speed = SPEED_1000; -+ state->speed = -+ state->interface == PHY_INTERFACE_MODE_2500BASEX ? -+ SPEED_2500 : SPEED_1000; - else if (gmac_stat & MVNETA_GMAC_SPEED_100) - state->speed = SPEED_100; - else -@@ -3515,12 +3534,20 @@ static void mvneta_mac_config(struct net - MVNETA_GMAC_FORCE_LINK_DOWN); - } - -+ - /* When at 2.5G, the link partner can send frames with shortened - * preambles. - */ - if (state->speed == SPEED_2500) - new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE; - -+ if (pp->comphy && -+ (state->interface == PHY_INTERFACE_MODE_SGMII || -+ state->interface == PHY_INTERFACE_MODE_1000BASEX || -+ state->interface == PHY_INTERFACE_MODE_2500BASEX)) -+ WARN_ON(phy_set_mode_ext(pp->comphy, PHY_MODE_ETHERNET, -+ state->interface)); -+ - if (new_ctrl0 != gmac_ctrl0) - mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0); - if (new_ctrl2 != gmac_ctrl2) -@@ -4433,7 +4460,7 @@ static int mvneta_port_power_up(struct m - if (phy_mode == PHY_INTERFACE_MODE_QSGMII) - mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO); - else if (phy_mode == PHY_INTERFACE_MODE_SGMII || -- phy_mode == PHY_INTERFACE_MODE_1000BASEX) -+ phy_interface_mode_is_8023z(phy_mode)) - mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO); - else if (!phy_interface_mode_is_rgmii(phy_mode)) - return -EINVAL; -@@ -4450,6 +4477,7 @@ static int mvneta_probe(struct platform_ - struct mvneta_port *pp; - struct net_device *dev; - struct phylink *phylink; -+ struct phy *comphy; - const char *dt_mac_addr; - char hw_mac_addr[ETH_ALEN]; - const char *mac_from; -@@ -4475,6 +4503,14 @@ static int mvneta_probe(struct platform_ - goto err_free_irq; - } - -+ comphy = devm_of_phy_get(&pdev->dev, dn, NULL); -+ if (comphy == ERR_PTR(-EPROBE_DEFER)) { -+ err = -EPROBE_DEFER; -+ goto err_free_irq; -+ } else if (IS_ERR(comphy)) { -+ comphy = NULL; -+ } -+ - phylink = phylink_create(dev, pdev->dev.fwnode, phy_mode, - &mvneta_phylink_ops); - if (IS_ERR(phylink)) { -@@ -4491,6 +4527,7 @@ static int mvneta_probe(struct platform_ - pp = netdev_priv(dev); - spin_lock_init(&pp->lock); - pp->phylink = phylink; -+ pp->comphy = comphy; - pp->phy_interface = phy_mode; - pp->dn = dn; - diff --git a/target/linux/mvebu/patches-4.19/536-net-marvell-neta-disable-comphy-when-setting-mode.patch b/target/linux/mvebu/patches-4.19/536-net-marvell-neta-disable-comphy-when-setting-mode.patch deleted file mode 100644 index dcaeb18fa3..0000000000 --- a/target/linux/mvebu/patches-4.19/536-net-marvell-neta-disable-comphy-when-setting-mode.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 031b922bfd60c771588911112f8632783de08e5c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Mon, 25 Feb 2019 17:43:03 +0100 -Subject: [PATCH] net: marvell: neta: disable comphy when setting mode -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The comphy driver for Armada 3700 by Miquèl Raynal (which is currently -in linux-next) does not actually set comphy mode when phy_set_mode_ext -is called. The mode is set at next call of phy_power_on. - -Update the driver to semantics similar to mvpp2: helper -mvneta_comphy_init sets comphy mode and powers it on. -When mode is to be changed in mvneta_mac_config, first power the comphy -off, then call mvneta_comphy_init (which sets the mode to new one). - -Only do this when new mode is different from old mode. - -This should also work for Armada 38x, since in that comphy driver -methods power_on and power_off are unimplemented. - -Signed-off-by: Marek Behún -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 28 +++++++++++++++++++++++----- - 1 file changed, 23 insertions(+), 5 deletions(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3165,11 +3165,26 @@ static int mvneta_setup_txqs(struct mvne - return 0; - } - -+static int mvneta_comphy_init(struct mvneta_port *pp) -+{ -+ int ret; -+ -+ if (!pp->comphy) -+ return 0; -+ -+ ret = phy_set_mode_ext(pp->comphy, PHY_MODE_ETHERNET, -+ pp->phy_interface); -+ if (ret) -+ return ret; -+ -+ return phy_power_on(pp->comphy); -+} -+ - static void mvneta_start_dev(struct mvneta_port *pp) - { - int cpu; - -- WARN_ON(phy_power_on(pp->comphy)); -+ WARN_ON(mvneta_comphy_init(pp)); - - mvneta_max_rx_size_set(pp, pp->pkt_size); - mvneta_txq_max_tx_size_set(pp, pp->pkt_size); -@@ -3541,12 +3556,15 @@ static void mvneta_mac_config(struct net - if (state->speed == SPEED_2500) - new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE; - -- if (pp->comphy && -+ if (pp->comphy && pp->phy_interface != state->interface && - (state->interface == PHY_INTERFACE_MODE_SGMII || - state->interface == PHY_INTERFACE_MODE_1000BASEX || -- state->interface == PHY_INTERFACE_MODE_2500BASEX)) -- WARN_ON(phy_set_mode_ext(pp->comphy, PHY_MODE_ETHERNET, -- state->interface)); -+ state->interface == PHY_INTERFACE_MODE_2500BASEX)) { -+ pp->phy_interface = state->interface; -+ -+ WARN_ON(phy_power_off(pp->comphy)); -+ WARN_ON(mvneta_comphy_init(pp)); -+ } - - if (new_ctrl0 != gmac_ctrl0) - mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0); diff --git a/target/linux/mvebu/patches-4.19/537-net-mvneta-add-2500baset-support.patch b/target/linux/mvebu/patches-4.19/537-net-mvneta-add-2500baset-support.patch deleted file mode 100644 index 639d5541fe..0000000000 --- a/target/linux/mvebu/patches-4.19/537-net-mvneta-add-2500baset-support.patch +++ /dev/null @@ -1,34 +0,0 @@ -From eda3d1b0228484fb52b7244a68fd4cc8a985ed10 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Wed, 27 Mar 2019 17:31:06 +0100 -Subject: [PATCH] net: mvneta: Add 2500BaseT support - -Some PHYs will use the 2500BaseX PHY_INTERFACE_MODE when being linked -with a partner using 2.5GBaseT. - -Since we can't autonegotiate this speed between the MAC and the PHY, we -need to have the proper comphy support enabled, to make sure we can -safely advertise 2.5G and 1G in BaseT and be able to switch between both -corresponding PHY interface modes. This is now possible since comphy -support was added to this driver. - -This commit adds the 2500BaseT mode to the list of supported modes when -using 2500BaseX, and was tested on a setup with an Armada385 and a -88E2010 PHY, both with and without the comphy node in the DT. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3401,6 +3401,7 @@ static void mvneta_validate(struct net_d - phylink_set(mask, 1000baseX_Full); - } - if (pp->comphy || state->interface == PHY_INTERFACE_MODE_2500BASEX) { -+ phylink_set(mask, 2500baseT_Full); - phylink_set(mask, 2500baseX_Full); - } - diff --git a/target/linux/mvebu/patches-4.19/538-phy-add-QSGMII-and-PCIE-modes.patch b/target/linux/mvebu/patches-4.19/538-phy-add-QSGMII-and-PCIE-modes.patch deleted file mode 100644 index b759b9fb25..0000000000 --- a/target/linux/mvebu/patches-4.19/538-phy-add-QSGMII-and-PCIE-modes.patch +++ /dev/null @@ -1,28 +0,0 @@ -From c2a90025ad09d830c8d8ae69f485eac6aaaa2472 Mon Sep 17 00:00:00 2001 -From: Quentin Schulz -Date: Thu, 4 Oct 2018 14:22:03 +0200 -Subject: [PATCH] phy: add QSGMII and PCIE modes - -Prepare for upcoming phys that'll handle QSGMII or PCIe. - -Reviewed-by: Florian Fainelli -Signed-off-by: Quentin Schulz -Signed-off-by: David S. Miller ---- - include/linux/phy/phy.h | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/include/linux/phy/phy.h -+++ b/include/linux/phy/phy.h -@@ -37,9 +37,11 @@ enum phy_mode { - PHY_MODE_USB_OTG, - PHY_MODE_SGMII, - PHY_MODE_2500SGMII, -+ PHY_MODE_QSGMII, - PHY_MODE_10GKR, - PHY_MODE_UFS_HS_A, - PHY_MODE_UFS_HS_B, -+ PHY_MODE_PCIE, - }; - - /** diff --git a/target/linux/mvebu/patches-4.19/539-phy-core-add-PHY_MODE_ETHERNET.patch b/target/linux/mvebu/patches-4.19/539-phy-core-add-PHY_MODE_ETHERNET.patch deleted file mode 100644 index 68fecadce8..0000000000 --- a/target/linux/mvebu/patches-4.19/539-phy-core-add-PHY_MODE_ETHERNET.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 2af8caeee47846a84bc96abc3a72f7c991153040 Mon Sep 17 00:00:00 2001 -From: Grygorii Strashko -Date: Mon, 19 Nov 2018 19:24:21 -0600 -Subject: [PATCH] phy: core: add PHY_MODE_ETHERNET - -Add new PHY's mode to be used by Ethernet PHY interface drivers or -multipurpose PHYs like serdes. It will be reused in further changes. - -Signed-off-by: Grygorii Strashko -Signed-off-by: Kishon Vijay Abraham I ---- - include/linux/phy/phy.h | 1 + - 1 file changed, 1 insertion(+) - ---- a/include/linux/phy/phy.h -+++ b/include/linux/phy/phy.h -@@ -42,6 +42,7 @@ enum phy_mode { - PHY_MODE_UFS_HS_A, - PHY_MODE_UFS_HS_B, - PHY_MODE_PCIE, -+ PHY_MODE_ETHERNET, - }; - - /** diff --git a/target/linux/mvebu/patches-4.19/540-phy-fix-build-breakage-add-PHY_MODE_SATA.patch b/target/linux/mvebu/patches-4.19/540-phy-fix-build-breakage-add-PHY_MODE_SATA.patch deleted file mode 100644 index 83908af19e..0000000000 --- a/target/linux/mvebu/patches-4.19/540-phy-fix-build-breakage-add-PHY_MODE_SATA.patch +++ /dev/null @@ -1,45 +0,0 @@ -From e1706720408e72fb883f6b151c2b3b23d8e7e5b2 Mon Sep 17 00:00:00 2001 -From: John Hubbard -Date: Sat, 12 Jan 2019 17:29:09 -0800 -Subject: [PATCH] phy: fix build breakage: add PHY_MODE_SATA - -Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses -the PHY_MODE_SATA, but that enum had not yet been added. This caused a -build failure for me, with today's linux.git. - -Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding -in the Marvell Berlin SATA PHY driver. - -Fix the build by: - - 1) Renaming Marvell's defined value to a more scoped name, - in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA. - - 2) Adding the missing enum, which was going to be added anyway as part - of [1]. - -[1] https://lkml.kernel.org/r/20190108163124.6409-3-miquel.raynal@bootlin.com - -Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") - -Signed-off-by: John Hubbard -Acked-by: Jens Axboe -Acked-by: Olof Johansson -Cc: Grzegorz Jaszczyk -Cc: Miquel Raynal -Cc: Hans de Goede -Signed-off-by: Linus Torvalds ---- - include/linux/phy/phy.h | 1 + - 1 file changed, 1 insertion(+) - ---- a/include/linux/phy/phy.h -+++ b/include/linux/phy/phy.h -@@ -43,6 +43,7 @@ enum phy_mode { - PHY_MODE_UFS_HS_B, - PHY_MODE_PCIE, - PHY_MODE_ETHERNET, -+ PHY_MODE_SATA - }; - - /** diff --git a/target/linux/mvebu/patches-4.19/541-phy-core-rework-phy_set_mode-to-accept-phy-mode-and-.patch b/target/linux/mvebu/patches-4.19/541-phy-core-rework-phy_set_mode-to-accept-phy-mode-and-.patch deleted file mode 100644 index e02f203912..0000000000 --- a/target/linux/mvebu/patches-4.19/541-phy-core-rework-phy_set_mode-to-accept-phy-mode-and-.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 79a5a18aa9d1062205cdcfa183d4cd5241d1b8da Mon Sep 17 00:00:00 2001 -From: Grygorii Strashko -Date: Mon, 19 Nov 2018 19:24:20 -0600 -Subject: [PATCH] phy: core: rework phy_set_mode to accept phy mode and submode - -Currently the attempt to add support for Ethernet interface mode PHY -(MII/GMII/RGMII) will lead to the necessity of extending enum phy_mode and -duplicate there values from phy_interface_t enum (or introduce more PHY -callbacks) [1]. Both approaches are ineffective and would lead to fast -bloating of enum phy_mode or struct phy_ops in the process of adding more -PHYs for different subsystems which will make them unmaintainable. - -As discussed in [1] the solution could be to introduce dual level PHYs mode -configuration - PHY mode and PHY submode. The PHY mode will define generic -PHY type (subsystem - PCIE/ETHERNET/USB_) while the PHY submode - subsystem -specific interface mode. The last is usually already defined in -corresponding subsystem headers (phy_interface_t for Ethernet, enum -usb_device_speed for USB). - -This patch is cumulative change which refactors PHY framework code to -support dual level PHYs mode configuration - PHY mode and PHY submode. It -extends .set_mode() callback to support additional parameter "int submode" -and converts all corresponding PHY drivers to support new .set_mode() -callback declaration. -The new extended PHY API - int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) -is introduced to support dual level PHYs mode configuration and existing -phy_set_mode() API is converted to macros, so PHY framework consumers do -not need to be changed (~21 matches). - -[1] http://lkml.kernel.org/r/d63588f6-9ab0-848a-5ad4-8073143bd95d@ti.com -Signed-off-by: Grygorii Strashko -Signed-off-by: Kishon Vijay Abraham I ---- - drivers/phy/allwinner/phy-sun4i-usb.c | 3 ++- - drivers/phy/amlogic/phy-meson-gxl-usb2.c | 5 +++-- - drivers/phy/amlogic/phy-meson-gxl-usb3.c | 5 +++-- - drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 3 ++- - drivers/phy/mediatek/phy-mtk-tphy.c | 2 +- - drivers/phy/mediatek/phy-mtk-xsphy.c | 2 +- - drivers/phy/mscc/phy-ocelot-serdes.c | 2 +- - drivers/phy/phy-core.c | 6 +++--- - drivers/phy/qualcomm/phy-qcom-qmp.c | 3 ++- - drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 ++- - drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c | 3 ++- - drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c | 3 ++- - drivers/phy/qualcomm/phy-qcom-usb-hs.c | 3 ++- - drivers/phy/ti/phy-da8xx-usb.c | 3 ++- - drivers/phy/ti/phy-tusb1210.c | 2 +- - include/linux/phy/phy.h | 13 ++++++++++--- - 16 files changed, 39 insertions(+), 22 deletions(-) - ---- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c -+++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c -@@ -512,7 +512,8 @@ static int mvebu_comphy_power_on(struct - return ret; - } - --static int mvebu_comphy_set_mode(struct phy *phy, enum phy_mode mode) -+static int mvebu_comphy_set_mode(struct phy *phy, -+ enum phy_mode mode, int submode) - { - struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); - ---- a/drivers/phy/phy-core.c -+++ b/drivers/phy/phy-core.c -@@ -360,7 +360,7 @@ int phy_power_off(struct phy *phy) - } - EXPORT_SYMBOL_GPL(phy_power_off); - --int phy_set_mode(struct phy *phy, enum phy_mode mode) -+int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) - { - int ret; - -@@ -368,14 +368,14 @@ int phy_set_mode(struct phy *phy, enum p - return 0; - - mutex_lock(&phy->mutex); -- ret = phy->ops->set_mode(phy, mode); -+ ret = phy->ops->set_mode(phy, mode, submode); - if (!ret) - phy->attrs.mode = mode; - mutex_unlock(&phy->mutex); - - return ret; - } --EXPORT_SYMBOL_GPL(phy_set_mode); -+EXPORT_SYMBOL_GPL(phy_set_mode_ext); - - int phy_reset(struct phy *phy) - { ---- a/include/linux/phy/phy.h -+++ b/include/linux/phy/phy.h -@@ -62,7 +62,7 @@ struct phy_ops { - int (*exit)(struct phy *phy); - int (*power_on)(struct phy *phy); - int (*power_off)(struct phy *phy); -- int (*set_mode)(struct phy *phy, enum phy_mode mode); -+ int (*set_mode)(struct phy *phy, enum phy_mode mode, int submode); - int (*reset)(struct phy *phy); - int (*calibrate)(struct phy *phy); - struct module *owner; -@@ -166,7 +166,10 @@ int phy_init(struct phy *phy); - int phy_exit(struct phy *phy); - int phy_power_on(struct phy *phy); - int phy_power_off(struct phy *phy); --int phy_set_mode(struct phy *phy, enum phy_mode mode); -+int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode); -+#define phy_set_mode(phy, mode) \ -+ phy_set_mode_ext(phy, mode, 0) -+ - static inline enum phy_mode phy_get_mode(struct phy *phy) - { - return phy->attrs.mode; -@@ -280,13 +283,17 @@ static inline int phy_power_off(struct p - return -ENOSYS; - } - --static inline int phy_set_mode(struct phy *phy, enum phy_mode mode) -+static inline int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, -+ int submode) - { - if (!phy) - return 0; - return -ENOSYS; - } - -+#define phy_set_mode(phy, mode) \ -+ phy_set_mode_ext(phy, mode, 0) -+ - static inline enum phy_mode phy_get_mode(struct phy *phy) - { - return PHY_MODE_INVALID; diff --git a/target/linux/mvebu/patches-4.19/542-phy-add-A3700-COMPHY-support.patch b/target/linux/mvebu/patches-4.19/542-phy-add-A3700-COMPHY-support.patch deleted file mode 100644 index 0964da03a8..0000000000 --- a/target/linux/mvebu/patches-4.19/542-phy-add-A3700-COMPHY-support.patch +++ /dev/null @@ -1,381 +0,0 @@ -From 9695375a3f4a604406f2e61f2b735eca1de931ed Mon Sep 17 00:00:00 2001 -From: Miquel Raynal -Date: Tue, 8 Jan 2019 17:31:20 +0100 -Subject: [PATCH] phy: add A3700 COMPHY support - -Add a driver to support COMPHY, a hardware block providing shared -serdes PHYs on Marvell Armada 3700. This driver uses SMC calls and -rely on having an up-to-date firmware. - -SATA, PCie and USB3 host mode have been tested successfully with an -ESPRESSObin. (HS)SGMII mode cannot be tested with this platform. - -Evan worked on the original driver structure and Grzegorz on the SMC -calls rework. The structure of this driver has been copied from -Antoine Tenart work on CP110 COMPHY driver. - -Signed-off-by: Miquel Raynal -Co-developed-by: Evan Wang -Signed-off-by: Evan Wang -Co-developed-by: Grzegorz Jaszczyk -Signed-off-by: Grzegorz Jaszczyk -Signed-off-by: Kishon Vijay Abraham I ---- - drivers/phy/marvell/Kconfig | 12 + - drivers/phy/marvell/Makefile | 1 + - drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 318 +++++++++++++++++++++++++++ - 3 files changed, 331 insertions(+) - create mode 100644 drivers/phy/marvell/phy-mvebu-a3700-comphy.c - ---- a/drivers/phy/marvell/Kconfig -+++ b/drivers/phy/marvell/Kconfig -@@ -21,6 +21,18 @@ config PHY_BERLIN_USB - help - Enable this to support the USB PHY on Marvell Berlin SoCs. - -+config PHY_MVEBU_A3700_COMPHY -+ tristate "Marvell A3700 comphy driver" -+ depends on ARCH_MVEBU || COMPILE_TEST -+ depends on OF -+ depends on HAVE_ARM_SMCCC -+ default y -+ select GENERIC_PHY -+ help -+ This driver allows to control the comphy, a hardware block providing -+ shared serdes PHYs on Marvell Armada 3700. Its serdes lanes can be -+ used by various controllers: Ethernet, SATA, USB3, PCIe. -+ - config PHY_MVEBU_CP110_COMPHY - tristate "Marvell CP110 comphy driver" - depends on ARCH_MVEBU || COMPILE_TEST ---- a/drivers/phy/marvell/Makefile -+++ b/drivers/phy/marvell/Makefile -@@ -2,6 +2,7 @@ - obj-$(CONFIG_ARMADA375_USBCLUSTER_PHY) += phy-armada375-usb2.o - obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o - obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o -+obj-$(CONFIG_PHY_MVEBU_A3700_COMPHY) += phy-mvebu-a3700-comphy.o - obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o - obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o - obj-$(CONFIG_PHY_PXA_28NM_HSIC) += phy-pxa-28nm-hsic.o ---- /dev/null -+++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c -@@ -0,0 +1,318 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2018 Marvell -+ * -+ * Authors: -+ * Evan Wang -+ * Miquèl Raynal -+ * -+ * Structure inspired from phy-mvebu-cp110-comphy.c written by Antoine Tenart. -+ * SMC call initial support done by Grzegorz Jaszczyk. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MVEBU_A3700_COMPHY_LANES 3 -+#define MVEBU_A3700_COMPHY_PORTS 2 -+ -+/* COMPHY Fast SMC function identifiers */ -+#define COMPHY_SIP_POWER_ON 0x82000001 -+#define COMPHY_SIP_POWER_OFF 0x82000002 -+#define COMPHY_SIP_PLL_LOCK 0x82000003 -+ -+#define COMPHY_FW_MODE_SATA 0x1 -+#define COMPHY_FW_MODE_SGMII 0x2 -+#define COMPHY_FW_MODE_HS_SGMII 0x3 -+#define COMPHY_FW_MODE_USB3H 0x4 -+#define COMPHY_FW_MODE_USB3D 0x5 -+#define COMPHY_FW_MODE_PCIE 0x6 -+#define COMPHY_FW_MODE_RXAUI 0x7 -+#define COMPHY_FW_MODE_XFI 0x8 -+#define COMPHY_FW_MODE_SFI 0x9 -+#define COMPHY_FW_MODE_USB3 0xa -+ -+#define COMPHY_FW_SPEED_1_25G 0 /* SGMII 1G */ -+#define COMPHY_FW_SPEED_2_5G 1 -+#define COMPHY_FW_SPEED_3_125G 2 /* SGMII 2.5G */ -+#define COMPHY_FW_SPEED_5G 3 -+#define COMPHY_FW_SPEED_5_15625G 4 /* XFI 5G */ -+#define COMPHY_FW_SPEED_6G 5 -+#define COMPHY_FW_SPEED_10_3125G 6 /* XFI 10G */ -+#define COMPHY_FW_SPEED_MAX 0x3F -+ -+#define COMPHY_FW_MODE(mode) ((mode) << 12) -+#define COMPHY_FW_NET(mode, idx, speed) (COMPHY_FW_MODE(mode) | \ -+ ((idx) << 8) | \ -+ ((speed) << 2)) -+#define COMPHY_FW_PCIE(mode, idx, speed, width) (COMPHY_FW_NET(mode, idx, speed) | \ -+ ((width) << 18)) -+ -+struct mvebu_a3700_comphy_conf { -+ unsigned int lane; -+ enum phy_mode mode; -+ int submode; -+ unsigned int port; -+ u32 fw_mode; -+}; -+ -+#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _port, _fw) \ -+ { \ -+ .lane = _lane, \ -+ .mode = _mode, \ -+ .submode = _smode, \ -+ .port = _port, \ -+ .fw_mode = _fw, \ -+ } -+ -+#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _port, _fw) \ -+ MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _port, _fw) -+ -+#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _port, _fw) \ -+ MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _port, _fw) -+ -+static const struct mvebu_a3700_comphy_conf mvebu_a3700_comphy_modes[] = { -+ /* lane 0 */ -+ MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, 0, -+ COMPHY_FW_MODE_USB3H), -+ MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, 1, -+ COMPHY_FW_MODE_SGMII), -+ MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, 1, -+ COMPHY_FW_MODE_HS_SGMII), -+ /* lane 1 */ -+ MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, 0, -+ COMPHY_FW_MODE_PCIE), -+ MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, 0, -+ COMPHY_FW_MODE_SGMII), -+ MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, 0, -+ COMPHY_FW_MODE_HS_SGMII), -+ /* lane 2 */ -+ MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, 0, -+ COMPHY_FW_MODE_SATA), -+ MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, 0, -+ COMPHY_FW_MODE_USB3H), -+}; -+ -+struct mvebu_a3700_comphy_lane { -+ struct device *dev; -+ unsigned int id; -+ enum phy_mode mode; -+ int submode; -+ int port; -+}; -+ -+static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane, -+ unsigned long mode) -+{ -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(function, lane, mode, 0, 0, 0, 0, 0, &res); -+ -+ return res.a0; -+} -+ -+static int mvebu_a3700_comphy_get_fw_mode(int lane, int port, -+ enum phy_mode mode, -+ int submode) -+{ -+ int i, n = ARRAY_SIZE(mvebu_a3700_comphy_modes); -+ -+ /* Unused PHY mux value is 0x0 */ -+ if (mode == PHY_MODE_INVALID) -+ return -EINVAL; -+ -+ for (i = 0; i < n; i++) { -+ if (mvebu_a3700_comphy_modes[i].lane == lane && -+ mvebu_a3700_comphy_modes[i].port == port && -+ mvebu_a3700_comphy_modes[i].mode == mode && -+ mvebu_a3700_comphy_modes[i].submode == submode) -+ break; -+ } -+ -+ if (i == n) -+ return -EINVAL; -+ -+ return mvebu_a3700_comphy_modes[i].fw_mode; -+} -+ -+static int mvebu_a3700_comphy_set_mode(struct phy *phy, enum phy_mode mode, -+ int submode) -+{ -+ struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); -+ int fw_mode; -+ -+ if (submode == PHY_INTERFACE_MODE_1000BASEX) -+ submode = PHY_INTERFACE_MODE_SGMII; -+ -+ fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, mode, -+ submode); -+ if (fw_mode < 0) { -+ dev_err(lane->dev, "invalid COMPHY mode\n"); -+ return fw_mode; -+ } -+ -+ /* Just remember the mode, ->power_on() will do the real setup */ -+ lane->mode = mode; -+ lane->submode = submode; -+ -+ return 0; -+} -+ -+static int mvebu_a3700_comphy_power_on(struct phy *phy) -+{ -+ struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); -+ u32 fw_param; -+ int fw_mode; -+ -+ fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, -+ lane->mode, lane->submode); -+ if (fw_mode < 0) { -+ dev_err(lane->dev, "invalid COMPHY mode\n"); -+ return fw_mode; -+ } -+ -+ switch (lane->mode) { -+ case PHY_MODE_USB_HOST_SS: -+ dev_dbg(lane->dev, "set lane %d to USB3 host mode\n", lane->id); -+ fw_param = COMPHY_FW_MODE(fw_mode); -+ break; -+ case PHY_MODE_SATA: -+ dev_dbg(lane->dev, "set lane %d to SATA mode\n", lane->id); -+ fw_param = COMPHY_FW_MODE(fw_mode); -+ break; -+ case PHY_MODE_ETHERNET: -+ switch (lane->submode) { -+ case PHY_INTERFACE_MODE_SGMII: -+ dev_dbg(lane->dev, "set lane %d to SGMII mode\n", -+ lane->id); -+ fw_param = COMPHY_FW_NET(fw_mode, lane->port, -+ COMPHY_FW_SPEED_1_25G); -+ break; -+ case PHY_INTERFACE_MODE_2500BASEX: -+ dev_dbg(lane->dev, "set lane %d to HS SGMII mode\n", -+ lane->id); -+ fw_param = COMPHY_FW_NET(fw_mode, lane->port, -+ COMPHY_FW_SPEED_3_125G); -+ break; -+ default: -+ dev_err(lane->dev, "unsupported PHY submode (%d)\n", -+ lane->submode); -+ return -ENOTSUPP; -+ } -+ break; -+ case PHY_MODE_PCIE: -+ dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id); -+ fw_param = COMPHY_FW_PCIE(fw_mode, lane->port, -+ COMPHY_FW_SPEED_5G, -+ phy->attrs.bus_width); -+ break; -+ default: -+ dev_err(lane->dev, "unsupported PHY mode (%d)\n", lane->mode); -+ return -ENOTSUPP; -+ } -+ -+ return mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_ON, lane->id, fw_param); -+} -+ -+static int mvebu_a3700_comphy_power_off(struct phy *phy) -+{ -+ struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); -+ -+ return mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_OFF, lane->id, 0); -+} -+ -+static const struct phy_ops mvebu_a3700_comphy_ops = { -+ .power_on = mvebu_a3700_comphy_power_on, -+ .power_off = mvebu_a3700_comphy_power_off, -+ .set_mode = mvebu_a3700_comphy_set_mode, -+ .owner = THIS_MODULE, -+}; -+ -+static struct phy *mvebu_a3700_comphy_xlate(struct device *dev, -+ struct of_phandle_args *args) -+{ -+ struct mvebu_a3700_comphy_lane *lane; -+ struct phy *phy; -+ -+ if (WARN_ON(args->args[0] >= MVEBU_A3700_COMPHY_PORTS)) -+ return ERR_PTR(-EINVAL); -+ -+ phy = of_phy_simple_xlate(dev, args); -+ if (IS_ERR(phy)) -+ return phy; -+ -+ lane = phy_get_drvdata(phy); -+ lane->port = args->args[0]; -+ -+ return phy; -+} -+ -+static int mvebu_a3700_comphy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *provider; -+ struct device_node *child; -+ -+ for_each_available_child_of_node(pdev->dev.of_node, child) { -+ struct mvebu_a3700_comphy_lane *lane; -+ struct phy *phy; -+ int ret; -+ u32 lane_id; -+ -+ ret = of_property_read_u32(child, "reg", &lane_id); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "missing 'reg' property (%d)\n", -+ ret); -+ continue; -+ } -+ -+ if (lane_id >= MVEBU_A3700_COMPHY_LANES) { -+ dev_err(&pdev->dev, "invalid 'reg' property\n"); -+ continue; -+ } -+ -+ lane = devm_kzalloc(&pdev->dev, sizeof(*lane), GFP_KERNEL); -+ if (!lane) -+ return -ENOMEM; -+ -+ phy = devm_phy_create(&pdev->dev, child, -+ &mvebu_a3700_comphy_ops); -+ if (IS_ERR(phy)) -+ return PTR_ERR(phy); -+ -+ lane->dev = &pdev->dev; -+ lane->mode = PHY_MODE_INVALID; -+ lane->submode = PHY_INTERFACE_MODE_NA; -+ lane->id = lane_id; -+ lane->port = -1; -+ phy_set_drvdata(phy, lane); -+ } -+ -+ provider = devm_of_phy_provider_register(&pdev->dev, -+ mvebu_a3700_comphy_xlate); -+ return PTR_ERR_OR_ZERO(provider); -+} -+ -+static const struct of_device_id mvebu_a3700_comphy_of_match_table[] = { -+ { .compatible = "marvell,comphy-a3700" }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, mvebu_a3700_comphy_of_match_table); -+ -+static struct platform_driver mvebu_a3700_comphy_driver = { -+ .probe = mvebu_a3700_comphy_probe, -+ .driver = { -+ .name = "mvebu-a3700-comphy", -+ .of_match_table = mvebu_a3700_comphy_of_match_table, -+ }, -+}; -+module_platform_driver(mvebu_a3700_comphy_driver); -+ -+MODULE_AUTHOR("Miquèl Raynal "); -+MODULE_DESCRIPTION("Common PHY driver for A3700"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/mvebu/patches-4.19/543-arm64-dts-marvell-armada-37xx-declare-the-COMPHY.patch b/target/linux/mvebu/patches-4.19/543-arm64-dts-marvell-armada-37xx-declare-the-COMPHY.patch deleted file mode 100644 index 393f823794..0000000000 --- a/target/linux/mvebu/patches-4.19/543-arm64-dts-marvell-armada-37xx-declare-the-COMPHY.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 2ef303f0fe44feee4a3ca8bd62fca86c105927d2 Mon Sep 17 00:00:00 2001 -From: Miquel Raynal -Date: Tue, 8 Jan 2019 17:31:24 +0100 -Subject: [PATCH] arm64: dts: marvell: armada-37xx: declare the COMPHY - node - -Describe the A3700 COMPHY node. It has three PHYs that can be -configured as follow: -* PCIe or GbE -* USB3 or GbE -* SATA or USB3 -Each of them has its own memory area. - -Suggested-by: Grzegorz Jaszczyk -Signed-off-by: Miquel Raynal -Signed-off-by: Gregory CLEMENT ---- - arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 29 ++++++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi -+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi -@@ -235,6 +235,35 @@ - reg = <0x14000 0x60>; - }; - -+ comphy: phy@18300 { -+ compatible = "marvell,comphy-a3700"; -+ reg = <0x18300 0x300>, -+ <0x1F000 0x400>, -+ <0x5C000 0x400>, -+ <0xe0178 0x8>; -+ reg-names = "comphy", -+ "lane1_pcie_gbe", -+ "lane0_usb3_gbe", -+ "lane2_sata_usb3"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ comphy0: phy@0 { -+ reg = <0>; -+ #phy-cells = <1>; -+ }; -+ -+ comphy1: phy@1 { -+ reg = <1>; -+ #phy-cells = <1>; -+ }; -+ -+ comphy2: phy@2 { -+ reg = <2>; -+ #phy-cells = <1>; -+ }; -+ }; -+ - pinctrl_sb: pinctrl@18800 { - compatible = "marvell,armada3710-sb-pinctrl", - "syscon", "simple-mfd"; diff --git a/target/linux/mvebu/patches-4.19/544-arm64-dts-uDPU-fix-comphy-definitions.patch b/target/linux/mvebu/patches-4.19/544-arm64-dts-uDPU-fix-comphy-definitions.patch deleted file mode 100644 index f72ea93b97..0000000000 --- a/target/linux/mvebu/patches-4.19/544-arm64-dts-uDPU-fix-comphy-definitions.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 9c222a1d78a1700220e38feb270f00d2ddd3c5ab Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Wed, 6 Nov 2019 13:44:21 +0000 -Subject: [PATCH 657/660] arm64: dts: uDPU: fix comphy definitions - -The uDPU uses both ethernet controllers, which ties up COMPHY 0 for -eth1 and COMPHY 1 for eth0, with no USB3 comphy. The addition of -COMPHY support made the kernel override the setup by the boot loader -breaking this platform. Delete the USB3 COMPHY definition at platform -level, and add phy specifications for the ethernet channels. - -Fixes: bd3d25b07342 ("arm64: dts: marvell: armada-37xx: link USB hosts with their PHYs") -Signed-off-by: Russell King ---- - arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -@@ -143,6 +143,7 @@ - status = "okay"; - phy-mode = "sgmii"; - managed = "in-band-status"; -+ phys = <&comphy1 0>; - sfp = <&sfp_eth0>; - }; - -@@ -150,6 +151,7 @@ - status = "okay"; - phy-mode = "sgmii"; - managed = "in-band-status"; -+ phys = <&comphy0 1>; - sfp = <&sfp_eth1>; - }; - diff --git a/target/linux/mvebu/patches-4.19/545-arm64-dts-uDPU-remove-i2c-fast-mode.patch b/target/linux/mvebu/patches-4.19/545-arm64-dts-uDPU-remove-i2c-fast-mode.patch deleted file mode 100644 index b984eb4ba1..0000000000 --- a/target/linux/mvebu/patches-4.19/545-arm64-dts-uDPU-remove-i2c-fast-mode.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 662eb8fc87f982e63ccb9a9df25c7aeabf9fe341 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 14 Nov 2019 00:23:35 +0000 -Subject: [PATCH 658/660] arm64: dts: uDPU: remove i2c-fast-mode - -The I2C bus violates the timing specifications when run in fast mode -on the uDPU, so switch to 100kHz mode. - -Signed-off-by: Russell King ---- - arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -@@ -119,12 +119,14 @@ - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; -+ /delete-property/mrvl,i2c-fast-mode; - }; - - &i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; -+ /delete-property/mrvl,i2c-fast-mode; - - lm75@48 { - status = "okay"; diff --git a/target/linux/mvebu/patches-4.19/546-arm64-dts-uDPU-SFP-cages-support-3W-modules.patch b/target/linux/mvebu/patches-4.19/546-arm64-dts-uDPU-SFP-cages-support-3W-modules.patch deleted file mode 100644 index d025f36a53..0000000000 --- a/target/linux/mvebu/patches-4.19/546-arm64-dts-uDPU-SFP-cages-support-3W-modules.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 1cb114a20854e34324a2cb308f23054ff8227ffa Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 19 Nov 2019 22:48:50 +0000 -Subject: [PATCH 659/660] arm64: dts: uDPU: SFP cages support 3W modules - -The SFP cages are designed to support up to 3W modules, such as G.hn, -G.fast and MoCA modules. Although there is no way for such modules to -declare to software that they consume 3W, we document in DT that this -is the designed power level for these cages. - -Signed-off-by: Russell King ---- - arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -@@ -69,6 +69,7 @@ - mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; -+ maximum-power-milliwatt = <3000>; - }; - - sfp_eth1: sfp-eth1 { -@@ -78,6 +79,7 @@ - mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; -+ maximum-power-milliwatt = <3000>; - }; - }; - diff --git a/target/linux/mvebu/patches-4.19/550-arm64-dts-uDPU-switch-PHY-operation-mode-to-2500base.patch b/target/linux/mvebu/patches-4.19/550-arm64-dts-uDPU-switch-PHY-operation-mode-to-2500base.patch deleted file mode 100644 index 7ed0a54344..0000000000 --- a/target/linux/mvebu/patches-4.19/550-arm64-dts-uDPU-switch-PHY-operation-mode-to-2500base.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -+++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts -@@ -145,7 +145,7 @@ - - ð0 { - status = "okay"; -- phy-mode = "sgmii"; -+ phy-mode = "2500base-x"; - managed = "in-band-status"; - phys = <&comphy1 0>; - sfp = <&sfp_eth0>; -@@ -153,7 +153,7 @@ - - ð1 { - status = "okay"; -- phy-mode = "sgmii"; -+ phy-mode = "2500base-x"; - managed = "in-band-status"; - phys = <&comphy0 1>; - sfp = <&sfp_eth1>; diff --git a/target/linux/mvebu/patches-4.19/560-helios4-dts-status-led-alias.patch b/target/linux/mvebu/patches-4.19/560-helios4-dts-status-led-alias.patch deleted file mode 100644 index 4c4fbec764..0000000000 --- a/target/linux/mvebu/patches-4.19/560-helios4-dts-status-led-alias.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-helios4.dts -+++ b/arch/arm/boot/dts/armada-388-helios4.dts -@@ -15,6 +15,13 @@ - model = "Helios4"; - compatible = "kobol,helios4", "marvell,armada388", - "marvell,armada385", "marvell,armada380"; -+ -+ aliases { -+ led-boot = &led_status; -+ led-failsafe = &led_status; -+ led-running = &led_status; -+ led-upgrade = &led_status; -+ }; - - memory { - device_type = "memory"; -@@ -70,10 +77,9 @@ - - system-leds { - compatible = "gpio-leds"; -- status-led { -+ led_status: status-led { - label = "helios4:green:status"; - gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "heartbeat"; - default-state = "on"; - }; - diff --git a/target/linux/mvebu/patches-4.19/561-mvebu-armada-38x-enable-libata-leds.patch b/target/linux/mvebu/patches-4.19/561-mvebu-armada-38x-enable-libata-leds.patch deleted file mode 100644 index 208703b0ba..0000000000 --- a/target/linux/mvebu/patches-4.19/561-mvebu-armada-38x-enable-libata-leds.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/mach-mvebu/Kconfig -+++ b/arch/arm/mach-mvebu/Kconfig -@@ -68,6 +68,7 @@ config MACH_ARMADA_38X - select HAVE_SMP - select MACH_MVEBU_V7 - select PINCTRL_ARMADA_38X -+ select ARCH_WANT_LIBATA_LEDS - help - Say 'Y' here if you want your kernel to support boards based - on the Marvell Armada 380/385 SoC with device tree. diff --git a/target/linux/octeon/config-4.19 b/target/linux/octeon/config-4.19 deleted file mode 100644 index 3385271bed..0000000000 --- a/target/linux/octeon/config-4.19 +++ /dev/null @@ -1,272 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MMAP_RND_BITS=12 -CONFIG_ARCH_MMAP_RND_BITS_MAX=18 -CONFIG_ARCH_MMAP_RND_BITS_MIN=12 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BUILTIN_DTB=y -# CONFIG_CAVIUM_CN63XXP1 is not set -CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2 -CONFIG_CAVIUM_OCTEON_LOCK_L2=y -CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y -CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y -CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y -CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y -CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y -CONFIG_CAVIUM_OCTEON_SOC=y -CONFIG_CEVT_R4K=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_CAVIUM_OCTEON=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_CPU_MIPSR2=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_R4K_FPU=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CPU_SUPPORTS_HUGEPAGES=y -CONFIG_CRAMFS=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_MD5_OCTEON is not set -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -# CONFIG_CRYPTO_SHA1_OCTEON is not set -# CONFIG_CRYPTO_SHA256_OCTEON is not set -# CONFIG_CRYPTO_SHA512_OCTEON is not set -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_EXT4_FS=y -CONFIG_F2FS_FS=y -CONFIG_FAT_FS=y -CONFIG_FIXED_PHY=y -CONFIG_FRAME_WARN=2048 -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_OCTEON=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAS_RAPIDIO=y -CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HOLES_IN_ZONE=y -# CONFIG_HUGETLBFS is not set -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_OCTEON=y -CONFIG_HZ_PERIODIC=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_CAVIUM=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_OCTEON=y -CONFIG_MEMFD_CREATE=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -# CONFIG_MIPS32_N32 is not set -# CONFIG_MIPS32_O32 is not set -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set -CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_MIPS_CMDLINE_FROM_DTB is not set -CONFIG_MIPS_EBPF_JIT=y -# CONFIG_MIPS_ELF_APPENDED_DTB is not set -CONFIG_MIPS_L1_CACHE_SHIFT=7 -CONFIG_MIPS_L1_CACHE_SHIFT_7=y -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_NR_CPU_NR_MAP=1024 -CONFIG_MIPS_NR_CPU_NR_MAP_1024=y -CONFIG_MIPS_PGD_C0_CONTEXT=y -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MIPS_SPRAM=y -# CONFIG_MIPS_VA_BITS_48 is not set -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CAVIUM_OCTEON=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NR_CPUS=16 -CONFIG_NR_CPUS_DEFAULT_64=y -CONFIG_NVMEM=y -CONFIG_OCTEON_ETHERNET=y -# CONFIG_OCTEON_ILM is not set -CONFIG_OCTEON_MGMT_ETHERNET=y -CONFIG_OCTEON_USB=y -CONFIG_OCTEON_WDT=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_PADATA=y -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RELAY=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_SCSI=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_STATIC=y -CONFIG_SRCU=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_SYS_SUPPORTS_RELOCATABLE=y -CONFIG_SYS_SUPPORTS_SMP=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_OCTEON_EHCI is not set -# CONFIG_USB_OCTEON_OHCI is not set -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VFAT_FS=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_WEAK_ORDERING=y -CONFIG_XPS=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/octeon/patches-4.19/100-ubnt_edgerouter2_support.patch b/target/linux/octeon/patches-4.19/100-ubnt_edgerouter2_support.patch deleted file mode 100644 index 991eb56ce2..0000000000 --- a/target/linux/octeon/patches-4.19/100-ubnt_edgerouter2_support.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h -+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h -@@ -295,6 +295,8 @@ enum cvmx_board_types_enum { - */ - CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001, - CVMX_BOARD_TYPE_UBNT_E100 = 20002, -+ CVMX_BOARD_TYPE_UBNT_E200 = 20003, -+ CVMX_BOARD_TYPE_UBNT_E220 = 20005, - CVMX_BOARD_TYPE_CUST_DSR1000N = 20006, - CVMX_BOARD_TYPE_KONTRON_S1901 = 21901, - CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000, -@@ -396,6 +398,8 @@ static inline const char *cvmx_board_typ - /* Customer private range */ - ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN) - ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100) -+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200) -+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220) - ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N) - ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901) - ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX) ---- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c -+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c -@@ -173,6 +173,8 @@ int cvmx_helper_board_get_mii_address(in - return 7 - ipd_port; - else - return -1; -+ case CVMX_BOARD_TYPE_UBNT_E200: -+ return -1; - case CVMX_BOARD_TYPE_KONTRON_S1901: - if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT) - return 1; diff --git a/target/linux/octeon/patches-4.19/110-er200-ethernet_probe_order.patch b/target/linux/octeon/patches-4.19/110-er200-ethernet_probe_order.patch deleted file mode 100644 index 93d1e93505..0000000000 --- a/target/linux/octeon/patches-4.19/110-er200-ethernet_probe_order.patch +++ /dev/null @@ -1,34 +0,0 @@ ---- a/drivers/staging/octeon/ethernet.c -+++ b/drivers/staging/octeon/ethernet.c -@@ -670,6 +670,7 @@ static int cvm_oct_probe(struct platform - int interface; - int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; - int qos; -+ int i; - struct device_node *pip; - int mtu_overhead = ETH_HLEN + ETH_FCS_LEN; - -@@ -793,13 +794,19 @@ static int cvm_oct_probe(struct platform - } - - num_interfaces = cvmx_helper_get_number_of_interfaces(); -- for (interface = 0; interface < num_interfaces; interface++) { -- cvmx_helper_interface_mode_t imode = -- cvmx_helper_interface_get_mode(interface); -- int num_ports = cvmx_helper_ports_on_interface(interface); -+ for (i = 0; i < num_interfaces; i++) { -+ cvmx_helper_interface_mode_t imode; -+ int interface; -+ int num_ports; - int port; - int port_index; - -+ interface = i; -+ if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_UBNT_E200) -+ interface = num_interfaces - (i + 1); -+ -+ num_ports = cvmx_helper_ports_on_interface(interface); -+ imode = cvmx_helper_interface_get_mode(interface); - for (port_index = 0, - port = cvmx_helper_get_ipd_port(interface, 0); - port < cvmx_helper_get_ipd_port(interface, num_ports); diff --git a/target/linux/octeon/patches-4.19/120-cmdline-hack.patch b/target/linux/octeon/patches-4.19/120-cmdline-hack.patch deleted file mode 100644 index 2b5978c5ee..0000000000 --- a/target/linux/octeon/patches-4.19/120-cmdline-hack.patch +++ /dev/null @@ -1,47 +0,0 @@ ---- a/arch/mips/cavium-octeon/setup.c -+++ b/arch/mips/cavium-octeon/setup.c -@@ -651,6 +651,35 @@ void octeon_user_io_init(void) - write_c0_derraddr1(0); - } - -+#ifdef CONFIG_IMAGE_CMDLINE_HACK -+extern char __image_cmdline[]; -+ -+static int __init octeon_use_image_cmdline(void) -+{ -+ char *p = __image_cmdline; -+ int replace = 0; -+ -+ if (*p == '-') { -+ replace = 1; -+ p++; -+ } -+ -+ if (*p == '\0') -+ return 0; -+ -+ if (replace) { -+ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } else { -+ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); -+ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } -+ -+ return 1; -+} -+#else -+static inline int octeon_use_image_cmdline(void) { return 0; } -+#endif -+ - /** - * Early entry point for arch setup - */ -@@ -895,6 +924,8 @@ void __init prom_init(void) - } - } - -+ octeon_use_image_cmdline(); -+ - if (strstr(arcs_cmdline, "console=") == NULL) { - if (octeon_uart == 1) - strcat(arcs_cmdline, " console=ttyS1,115200"); diff --git a/target/linux/omap/config-4.19 b/target/linux/omap/config-4.19 deleted file mode 100644 index 3ecabead88..0000000000 --- a/target/linux/omap/config-4.19 +++ /dev/null @@ -1,758 +0,0 @@ -# CONFIG_AHCI_DM816 is not set -CONFIG_ALIGNMENT_TRAP=y -CONFIG_AM335X_CONTROL_USB=y -CONFIG_AM335X_PHY_USB=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_BANDGAP=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y -CONFIG_ARCH_OMAP3=y -CONFIG_ARCH_OMAP4=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ATAG_DTB_COMPAT=y -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_ERRATA_430973=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_OMAP2PLUS_CPUFREQ=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -CONFIG_ARM_TI_CPUFREQ=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_AT803X_PHY=y -CONFIG_ATA=y -CONFIG_AUDIT=y -CONFIG_AUDITSYSCALL=y -CONFIG_AUDIT_GENERIC=y -CONFIG_AUDIT_TREE=y -CONFIG_AUDIT_WATCH=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_BACKLIGHT_TPS65217 is not set -CONFIG_BCH=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BOUNCE=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BUILD_BIN2C=y -CONFIG_CACHE_L2X0=y -CONFIG_CC_HAS_ASM_GOTO=y -CONFIG_CEC_CORE=y -# CONFIG_CHARGER_TPS65217 is not set -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_TI_32K=y -CONFIG_CLK_TWL6040=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=16 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200" -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_PALMAS is not set -# CONFIG_COMMON_CLK_TI_ADPLL is not set -CONFIG_CONFIGFS_FS=y -CONFIG_CONNECTOR=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRAMFS=y -CONFIG_CRC16=y -CONFIG_CRC7=y -CONFIG_CRC_CCITT=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC_T10DIF=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_OMAP=y -CONFIG_CRYPTO_DEV_OMAP_AES=y -CONFIG_CRYPTO_DEV_OMAP_DES=y -CONFIG_CRYPTO_DEV_OMAP_SHAM=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ENGINE=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DDR=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_USER is not set -CONFIG_DM9000=y -# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set -CONFIG_DMADEVICES=y -CONFIG_DMA_CMA=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OMAP=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNS_RESOLVER=y -CONFIG_DRM=y -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_OMAP=y -CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=y -CONFIG_DRM_OMAP_CONNECTOR_DVI=y -CONFIG_DRM_OMAP_CONNECTOR_HDMI=y -# CONFIG_DRM_OMAP_ENCODER_OPA362 is not set -CONFIG_DRM_OMAP_ENCODER_TFP410=y -CONFIG_DRM_OMAP_ENCODER_TPD12S015=y -CONFIG_DRM_OMAP_PANEL_DPI=y -CONFIG_DRM_OMAP_PANEL_DSI_CM=y -CONFIG_DRM_OMAP_PANEL_LGPHILIPS_LB035Q02=y -CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=y -CONFIG_DRM_OMAP_PANEL_SHARP_LS037V7DW01=y -CONFIG_DRM_OMAP_PANEL_SONY_ACX565AKM=y -CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1=y -CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_PANEL_SIMPLE is not set -# CONFIG_DRM_TVE200 is not set -CONFIG_DTC=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EEPROM_93CX6=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_EXTCON_PALMAS=y -CONFIG_EXTCON_USB_GPIO=y -CONFIG_F2FS_FS=y -CONFIG_FANOTIFY=y -CONFIG_FAT_FS=y -CONFIG_FB_CMDLINE=y -CONFIG_FHANDLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_OMAP=y -CONFIG_GPIO_PALMAS=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_GPIO_PCF857X=y -# CONFIG_GPIO_TPS65218 is not set -CONFIG_GPIO_TPS65910=y -CONFIG_GPIO_TWL4030=y -CONFIG_GPIO_TWL6040=y -CONFIG_GRACE_PERIOD=y -CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HDMI=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_HSI=y -CONFIG_HSI_BOARDINFO=y -# CONFIG_HSI_CHAR is not set -CONFIG_HWMON=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_OMAP=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_RARP=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_JFFS2_LZO=y -CONFIG_JFFS2_RUBIN=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -CONFIG_KEYS=y -CONFIG_KPROBES=y -CONFIG_KRETPROBES=y -CONFIG_KS8851=y -CONFIG_KS8851_MLL=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_PLATFORM=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_ONESHOT=y -CONFIG_LIBCRC32C=y -CONFIG_LIBFDT=y -CONFIG_LOCKD=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_MACH_OMAP3517EVM is not set -# CONFIG_MACH_OMAP3_PANDORA is not set -CONFIG_MACH_OMAP_GENERIC=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_PALMAS=y -CONFIG_MFD_SYSCON=y -CONFIG_MFD_TI_AM335X_TSCADC=y -CONFIG_MFD_TPS65217=y -CONFIG_MFD_TPS65218=y -CONFIG_MFD_TPS65910=y -CONFIG_MFD_TWL4030_AUDIO=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -# CONFIG_MMC_OMAP is not set -CONFIG_MMC_OMAP_HS=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MSDOS_FS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_BCH=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_BCH=y -CONFIG_MTD_NAND_OMAP2=y -CONFIG_MTD_NAND_OMAP_BCH=y -CONFIG_MTD_NAND_OMAP_BCH_BUILD=y -CONFIG_MTD_ONENAND=y -# CONFIG_MTD_ONENAND_2X_PROGRAM is not set -# CONFIG_MTD_ONENAND_GENERIC is not set -CONFIG_MTD_ONENAND_OMAP2=y -# CONFIG_MTD_ONENAND_OTP is not set -CONFIG_MTD_ONENAND_VERIFY_WRITE=y -CONFIG_MTD_OOPS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -# CONFIG_MTD_UBI_BLOCK is not set -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -# CONFIG_MUSB_PIO_ONLY is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NFS_ACL_SUPPORT=y -CONFIG_NFS_FS=y -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OID_REGISTRY=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OMAP2_DSS=y -CONFIG_OMAP2_DSS_DPI=y -CONFIG_OMAP2_DSS_DSI=y -CONFIG_OMAP2_DSS_HDMI_COMMON=y -CONFIG_OMAP2_DSS_INIT=y -CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 -CONFIG_OMAP2_DSS_SDI=y -CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y -CONFIG_OMAP2_DSS_VENC=y -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set -CONFIG_OMAP3_THERMAL=y -CONFIG_OMAP4_DSS_HDMI=y -CONFIG_OMAP4_DSS_HDMI_CEC=y -CONFIG_OMAP4_THERMAL=y -CONFIG_OMAP5_DSS_HDMI=y -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_CONTROL_PHY=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_OMAP_DSS_BASE=y -CONFIG_OMAP_GPMC=y -# CONFIG_OMAP_GPMC_DEBUG is not set -CONFIG_OMAP_INTERCONNECT=y -CONFIG_OMAP_INTERCONNECT_BARRIER=y -CONFIG_OMAP_IRQCHIP=y -CONFIG_OMAP_OCP2SCP=y -CONFIG_OMAP_RESET_CLOCKS=y -# CONFIG_OMAP_SSI is not set -CONFIG_OMAP_USB2=y -CONFIG_OMAP_WATCHDOG=y -CONFIG_OPROFILE=y -CONFIG_OPTPROBES=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -# CONFIG_PHY_DM816X_USB is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_PALMAS is not set -CONFIG_PL310_ERRATA_588369=y -CONFIG_PL310_ERRATA_727915=y -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_OPP=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POWER_AVS=y -CONFIG_POWER_AVS_OMAP=y -CONFIG_POWER_AVS_OMAP_CLASS3=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PRINTK_TIME=y -CONFIG_PRINT_QUOTA_WARNING=y -CONFIG_PROC_EVENTS=y -CONFIG_PROFILING=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PWM=y -# CONFIG_PWM_OMAP_DMTIMER is not set -CONFIG_PWM_SYSFS=y -CONFIG_PWM_TIECAP=y -CONFIG_PWM_TIEHRPWM=y -CONFIG_PWM_TIPWMSS=y -# CONFIG_PWM_TWL is not set -# CONFIG_PWM_TWL_LED is not set -# CONFIG_QFMT_V1 is not set -CONFIG_QFMT_V2=y -CONFIG_QUOTA=y -CONFIG_QUOTACTL=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_QUOTA_TREE=y -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_IRQ=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_PALMAS=y -CONFIG_REGULATOR_PBIAS=y -CONFIG_REGULATOR_TI_ABB=y -CONFIG_REGULATOR_TPS62360=y -CONFIG_REGULATOR_TPS65023=y -CONFIG_REGULATOR_TPS6507X=y -CONFIG_REGULATOR_TPS65217=y -CONFIG_REGULATOR_TPS65218=y -CONFIG_REGULATOR_TPS65910=y -CONFIG_REGULATOR_TWL4030=y -CONFIG_RFS_ACCEL=y -CONFIG_RING_BUFFER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_ROOT_NFS=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_OMAP=y -CONFIG_RTC_DRV_PALMAS=y -# CONFIG_RTC_DRV_TPS65910 is not set -CONFIG_RTC_DRV_TWL4030=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_SCHEDSTATS=y -CONFIG_SCHED_INFO=y -CONFIG_SCHED_MC=y -CONFIG_SCSI=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_SDIO_UART=y -CONFIG_SECCOMP=y -CONFIG_SECCOMP_FILTER=y -CONFIG_SENSORS_GPIO_FAN=y -CONFIG_SENSORS_LM75=y -CONFIG_SENSORS_TMP102=y -CONFIG_SENSORS_TSL2550=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_NR_UARTS=32 -# CONFIG_SERIAL_8250_OMAP is not set -CONFIG_SERIAL_8250_RSA=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_OMAP=y -CONFIG_SERIAL_OMAP_CONSOLE=y -CONFIG_SERIO=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SG_SPLIT=y -CONFIG_SMC91X=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SMSC911X=y -CONFIG_SMSC_PHY=y -CONFIG_SND=y -CONFIG_SND_AM33XX_SOC_EVM=y -# CONFIG_SND_COMPRESS_OFFLOAD is not set -CONFIG_SND_DAVINCI_SOC_GENERIC_EVM=y -# CONFIG_SND_DAVINCI_SOC_I2S is not set -CONFIG_SND_DAVINCI_SOC_MCASP=y -CONFIG_SND_DMAENGINE_PCM=y -CONFIG_SND_EDMA_SOC=y -CONFIG_SND_JACK=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_OMAP_SOC=y -CONFIG_SND_OMAP_SOC_DMIC=y -CONFIG_SND_OMAP_SOC_HDMI_AUDIO=y -CONFIG_SND_OMAP_SOC_MCBSP=y -CONFIG_SND_OMAP_SOC_MCPDM=y -CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040=y -CONFIG_SND_OMAP_SOC_OMAP_TWL4030=y -# CONFIG_SND_OMAP_SOC_RX51 is not set -CONFIG_SND_PCM=y -CONFIG_SND_PCM_OSS=y -CONFIG_SND_SDMA_SOC=y -CONFIG_SND_SIMPLE_CARD=y -CONFIG_SND_SIMPLE_CARD_UTILS=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_DMIC=y -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -CONFIG_SND_SOC_TLV320AIC3X=y -CONFIG_SND_SOC_TWL4030=y -CONFIG_SND_SOC_TWL6040=y -CONFIG_SND_VERBOSE_PRINTK=y -CONFIG_SOC_AM33XX=y -CONFIG_SOC_AM43XX=y -CONFIG_SOC_BUS=y -CONFIG_SOC_HAS_OMAP2_SDRC=y -CONFIG_SOC_OMAP3430=y -# CONFIG_SOC_TI81XX is not set -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_OMAP24XX=y -CONFIG_SPI_TI_QSPI=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_STACKTRACE=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYNC_FILE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_FAIR_SHARE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TI_CPPI41=y -CONFIG_TI_CPSW=y -CONFIG_TI_CPSW_ALE=y -CONFIG_TI_CPSW_PHY_SEL=y -CONFIG_TI_CPTS=y -CONFIG_TI_CPTS_MOD=y -CONFIG_TI_DAVINCI_CPDMA=y -CONFIG_TI_DAVINCI_EMAC=y -CONFIG_TI_DAVINCI_MDIO=y -CONFIG_TI_DMA_CROSSBAR=y -CONFIG_TI_EDMA=y -CONFIG_TI_EMIF=y -# CONFIG_TI_EMIF_SRAM is not set -CONFIG_TI_PIPE3=y -CONFIG_TI_SOC_THERMAL=y -CONFIG_TI_SYSC=y -CONFIG_TI_THERMAL=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TRACE_CLOCK=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_TWL4030_CORE=y -CONFIG_TWL4030_POWER=y -CONFIG_TWL4030_USB=y -CONFIG_TWL4030_WATCHDOG=y -# CONFIG_TWL6030_USB is not set -CONFIG_TWL6040_CORE=y -CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_DUAL_ROLE=y -# CONFIG_USB_DWC3_GADGET is not set -# CONFIG_USB_DWC3_HOST is not set -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_OMAP=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -CONFIG_USB_GADGET=y -CONFIG_USB_INVENTRA_DMA=y -CONFIG_USB_MUSB_AM335X_CHILD=y -CONFIG_USB_MUSB_AM35X=y -CONFIG_USB_MUSB_DSPS=y -CONFIG_USB_MUSB_DUAL_ROLE=y -# CONFIG_USB_MUSB_GADGET is not set -CONFIG_USB_MUSB_HDRC=y -# CONFIG_USB_MUSB_HOST is not set -CONFIG_USB_MUSB_OMAP2PLUS=y -CONFIG_USB_MUSB_TUSB6010=y -CONFIG_USB_PHY=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_TI_CPPI41_DMA=y -CONFIG_USB_TUSB_OMAP_DMA=y -# CONFIG_USERIO is not set -CONFIG_USE_OF=y -CONFIG_VFAT_FS=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XFRM_ALGO=y -CONFIG_XFRM_MIGRATE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/sunxi/config-4.19 b/target/linux/sunxi/config-4.19 deleted file mode 100644 index c37457a78e..0000000000 --- a/target/linux/sunxi/config-4.19 +++ /dev/null @@ -1,601 +0,0 @@ -# CONFIG_AHCI_SUNXI is not set -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_ARCH_AXXIA is not set -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=416 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUNXI=y -CONFIG_ARCH_SUNXI_MC_SMP=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ATAG_DTB_COMPAT=y -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y -CONFIG_ARM_CCI=y -CONFIG_ARM_CCI400_COMMON=y -CONFIG_ARM_CCI400_PORT_CTRL=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_ERRATA_643719=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_LPAE=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_PMU=y -CONFIG_ARM_PSCI=y -CONFIG_ARM_PSCI_FW=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ATA=y -CONFIG_ATAGS=y -# CONFIG_ATA_SFF is not set -CONFIG_AUTO_ZRELADDR=y -CONFIG_AXP20X_POWER=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BACKLIGHT_PWM=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BOUNCE=y -CONFIG_CACHE_L2X0=y -CONFIG_CAN=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_CONFIGFS_FS=y -CONFIG_CONNECTOR=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_COREDUMP=y -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_SUN4I_SS=y -CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_USER is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_SUN4I=y -CONFIG_DMA_SUN6I=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -# CONFIG_DWMAC_DWC_QOS_ETH is not set -CONFIG_DWMAC_GENERIC=y -# CONFIG_DWMAC_SUN8I is not set -CONFIG_DWMAC_SUNXI=y -CONFIG_DYNAMIC_DEBUG=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ELF_CORE=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FAT_FS=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_FOREIGN_ENDIAN=y -CONFIG_FB_LITTLE_ENDIAN=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FB_TILEBLITTING=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAME_WARN=2048 -CONFIG_FREEZER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y -CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y -CONFIG_HAVE_KVM_EVENTFD=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y -CONFIG_HAVE_KVM_IRQ_BYPASS=y -CONFIG_HAVE_KVM_IRQ_ROUTING=y -CONFIG_HAVE_KVM_MSI=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_HOTPLUG_CPU=y -# CONFIG_HUGETLBFS is not set -CONFIG_HWMON=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_TIMERIOMEM=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_MV64XXX=y -CONFIG_I2C_SUN6I_P2WI=y -CONFIG_IIO=y -# CONFIG_IIO_BUFFER is not set -# CONFIG_IIO_TRIGGER is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_AXP20X_PEK=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_IOSCHED_CFQ=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_BYPASS_MANAGER=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KALLSYMS=y -# CONFIG_KERNEL_MODE_NEON is not set -CONFIG_KEYBOARD_SUN4I_LRADC=y -CONFIG_KSM=y -CONFIG_KVM=y -CONFIG_KVM_ARM_HOST=y -CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y -CONFIG_KVM_MMIO=y -CONFIG_KVM_VFIO=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_PLATFORM=y -CONFIG_LEDS_GPIO=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_MACH_SUN4I=y -CONFIG_MACH_SUN5I=y -CONFIG_MACH_SUN6I=y -CONFIG_MACH_SUN7I=y -CONFIG_MACH_SUN8I=y -CONFIG_MACH_SUN9I=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_SUN4I=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEMFD_CREATE=y -# CONFIG_MFD_AC100 is not set -CONFIG_MFD_AXP20X=y -CONFIG_MFD_AXP20X_I2C=y -CONFIG_MFD_AXP20X_RSB=y -CONFIG_MFD_CORE=y -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_SUNXI=y -CONFIG_MMU_NOTIFIER=y -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MTD_IMPA7 is not set -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIT_FW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_VENDOR_ALLWINNER=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=8 -CONFIG_NVMEM=y -CONFIG_NVMEM_SUNXI_SID=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PARTITION_PERCPU=y -CONFIG_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYLIB=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_SUN4I_USB=y -CONFIG_PHY_SUN9I_USB=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_AXP209=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PINCTRL_SUN4I_A10=y -CONFIG_PINCTRL_SUN5I=y -CONFIG_PINCTRL_SUN6I_A31=y -CONFIG_PINCTRL_SUN6I_A31_R=y -CONFIG_PINCTRL_SUN8I_A23=y -CONFIG_PINCTRL_SUN8I_A23_R=y -CONFIG_PINCTRL_SUN8I_A33=y -CONFIG_PINCTRL_SUN8I_A83T=y -CONFIG_PINCTRL_SUN8I_A83T_R=y -CONFIG_PINCTRL_SUN8I_H3=y -CONFIG_PINCTRL_SUN8I_H3_R=y -CONFIG_PINCTRL_SUN8I_V3S=y -CONFIG_PINCTRL_SUN9I_A80=y -CONFIG_PINCTRL_SUN9I_A80_R=y -CONFIG_PINCTRL_SUNXI=y -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_NOTIFIERS=y -CONFIG_PREEMPT_RCU=y -CONFIG_PRINTK_TIME=y -CONFIG_PROC_EVENTS=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PWM=y -CONFIG_PWM_SUN4I=y -CONFIG_PWM_SYSFS=y -CONFIG_RATIONAL=y -# CONFIG_RCU_BOOST is not set -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_IRQ=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_AXP20X=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_SY8106A=y -CONFIG_RELAY=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_SIMPLE=y -CONFIG_RESET_SUNXI=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SATA_PMP=y -CONFIG_SCSI=y -CONFIG_SDIO_UART=y -CONFIG_SECURITYFS=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=8 -CONFIG_SERIAL_8250_RUNTIME_UARTS=8 -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SND=y -CONFIG_SND_COMPRESS_OFFLOAD=y -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -CONFIG_SND_PCM=y -CONFIG_SND_SIMPLE_CARD=y -CONFIG_SND_SIMPLE_CARD_UTILS=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_I2C_AND_SPI=y -# CONFIG_SND_SUN4I_I2S is not set -# CONFIG_SND_SUN4I_SPDIF is not set -# CONFIG_SND_SUN8I_CODEC is not set -# CONFIG_SND_SUN8I_CODEC_ANALOG is not set -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_SUN4I=y -CONFIG_SPI_SUN6I=y -CONFIG_SRCU=y -CONFIG_STMMAC_ETH=y -CONFIG_STMMAC_PLATFORM=y -CONFIG_SUN4I_A10_CCU=y -# CONFIG_SUN4I_EMAC is not set -CONFIG_SUN4I_TIMER=y -CONFIG_SUN5I_CCU=y -CONFIG_SUN5I_HSTIMER=y -CONFIG_SUN6I_A31_CCU=y -CONFIG_SUN8I_A23_CCU=y -CONFIG_SUN8I_A33_CCU=y -CONFIG_SUN8I_A83T_CCU=y -CONFIG_SUN8I_DE2_CCU=y -CONFIG_SUN8I_H3_CCU=y -CONFIG_SUN8I_R40_CCU=y -CONFIG_SUN8I_R_CCU=y -CONFIG_SUN8I_V3S_CCU=y -CONFIG_SUN9I_A80_CCU=y -CONFIG_SUNXI_CCU=y -CONFIG_SUNXI_RSB=y -CONFIG_SUNXI_SRAM=y -CONFIG_SUNXI_WATCHDOG=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_B53=y -# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set -CONFIG_SWCONFIG_B53_PHY_DRIVER=y -CONFIG_SWCONFIG_B53_PHY_FIXUP=y -# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_TASKS_RCU=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TOUCHSCREEN_PROPERTIES=y -CONFIG_TOUCHSCREEN_SUN4I=y -CONFIG_TREE_SRCU=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWC2=y -CONFIG_USB_DWC2_HOST=y -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_GADGET=y -CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USERIO=y -CONFIG_USE_OF=y -CONFIG_VFAT_FS=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VHOST=y -CONFIG_VHOST_NET=y -CONFIG_VIRTUALIZATION=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 diff --git a/target/linux/sunxi/cortexa53/config-4.19 b/target/linux/sunxi/cortexa53/config-4.19 deleted file mode 100644 index 67ff2c2633..0000000000 --- a/target/linux/sunxi/cortexa53/config-4.19 +++ /dev/null @@ -1,102 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARM64=y -# CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_64K_PAGES is not set -CONFIG_ARM64_CONT_SHIFT=4 -# CONFIG_ARM64_CRYPTO is not set -# CONFIG_ARM64_HW_AFDBM is not set -# CONFIG_ARM64_LSE_ATOMICS is not set -CONFIG_ARM64_PAGE_SHIFT=12 -# CONFIG_ARM64_PAN is not set -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -# CONFIG_ARM64_PMEM is not set -# CONFIG_ARM64_PTDUMP_DEBUGFS is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -CONFIG_ARM64_SSBD=y -# CONFIG_ARM64_UAO is not set -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -# CONFIG_ARM64_VA_BITS_48 is not set -# CONFIG_ARM64_VHE is not set -CONFIG_ARM_AMBA=y -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DWMAC_SUN8I=y -# CONFIG_FLATMEM_MANUAL is not set -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_HOLES_IN_ZONE=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_KERNEL_MODE_NEON=y -CONFIG_KVM_ARM_PMU=y -CONFIG_KVM_INDIRECT_VECTORS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NO_IOPORT_MAP=y -# CONFIG_NUMA is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_H5=y -CONFIG_PINCTRL_SUN50I_H6=y -CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_REALTEK_PHY=y -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SUN50I_DE2_BUS=y -CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H6_R_CCU=y -CONFIG_SWIOTLB=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VMAP_STACK=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/sunxi/cortexa7/config-4.19 b/target/linux/sunxi/cortexa7/config-4.19 deleted file mode 100644 index ff9a1a8e3e..0000000000 --- a/target/linux/sunxi/cortexa7/config-4.19 +++ /dev/null @@ -1,4 +0,0 @@ -CONFIG_DWMAC_SUN8I=y -# CONFIG_MACH_SUN4I is not set -# CONFIG_MACH_SUN5I is not set -CONFIG_MDIO_BUS_MUX=y diff --git a/target/linux/sunxi/cortexa8/config-4.19 b/target/linux/sunxi/cortexa8/config-4.19 deleted file mode 100644 index 63833d858e..0000000000 --- a/target/linux/sunxi/cortexa8/config-4.19 +++ /dev/null @@ -1,10 +0,0 @@ -# CONFIG_ARM_ERRATA_643719 is not set -# CONFIG_ARM_LPAE is not set -# CONFIG_MACH_SUN6I is not set -# CONFIG_MACH_SUN7I is not set -# CONFIG_MACH_SUN8I is not set -# CONFIG_MACH_SUN9I is not set -CONFIG_PGTABLE_LEVELS=2 -# CONFIG_PHY_SUN9I_USB is not set -# CONFIG_SPI_SUN6I is not set -# CONFIG_SUN8I_A83T_CCU is not set diff --git a/target/linux/sunxi/patches-4.19/010-v5.3-drivers-ata-ahci_sunxi-Increased-SATA-AHCI-DMA-TX-RX.patch b/target/linux/sunxi/patches-4.19/010-v5.3-drivers-ata-ahci_sunxi-Increased-SATA-AHCI-DMA-TX-RX.patch deleted file mode 100644 index 74e51c094c..0000000000 --- a/target/linux/sunxi/patches-4.19/010-v5.3-drivers-ata-ahci_sunxi-Increased-SATA-AHCI-DMA-TX-RX.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 120357ea176e420d313cf8cf2ff35fbe233d3bab Mon Sep 17 00:00:00 2001 -From: Uenal Mutlu -Date: Mon, 13 May 2019 16:24:10 +0200 -Subject: [PATCH] drivers: ata: ahci_sunxi: Increased SATA/AHCI DMA TX/RX FIFOs - -Increasing the SATA/AHCI DMA TX/RX FIFOs (P0DMACR.TXTS and .RXTS, ie. -TX_TRANSACTION_SIZE and RX_TRANSACTION_SIZE) from default 0x0 each -to 0x3 each, gives a write performance boost of 120 MiB/s to 132 MiB/s -from lame 36 MiB/s to 45 MiB/s previously. -Read performance is above 200 MiB/s. -[tested on SSD using dd bs=4K/8K/12K/16K/20K/24K/32K: peak-perf at 12K] - -Tested on the SBCs Banana Pi R1 (aka Lamobo R1) and Banana Pi M1 which -are based on the Allwinner A20 32bit-SoC (ARMv7-a / arm-linux-gnueabihf). -These devices are RaspberryPi-like small devices. - -This problem of slow SATA write-speed with these small devices lasts -for about 7 years now (beginning with the A10 SoC). Many commentators -throughout the years wrongly assumed the slow write speed was a -hardware limitation. This patch finally solves the problem, which -in fact was just a hard-to-find software problem due to lack of -SATA/AHCI documentation by the SoC-maker Allwinner Technology. - -Lists of the affected sunxi and other boards and SoCs with SATA using -the ahci_sunxi driver: - $ grep -i -e "^&ahci" arch/arm/boot/dts/sun*dts - and http://linux-sunxi.org/SATA#Devices_with_SATA_ports - See also http://linux-sunxi.org/Category:Devices_with_SATA_port - -Tested-by: Chen-Yu Tsai -Acked-by: Maxime Ripard -Reviewed-by: Hans de Goede -Signed-off-by: Uenal Mutlu -Signed-off-by: Jens Axboe ---- - drivers/ata/ahci_sunxi.c | 47 ++++++++++++++++++++++++++++++++++++++-- - 1 file changed, 45 insertions(+), 2 deletions(-) - ---- a/drivers/ata/ahci_sunxi.c -+++ b/drivers/ata/ahci_sunxi.c -@@ -157,8 +157,51 @@ static void ahci_sunxi_start_engine(stru - void __iomem *port_mmio = ahci_port_base(ap); - struct ahci_host_priv *hpriv = ap->host->private_data; - -- /* Setup DMA before DMA start */ -- sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ff00, 0x00004400); -+ /* Setup DMA before DMA start -+ * -+ * NOTE: A similar SoC with SATA/AHCI by Texas Instruments documents -+ * this Vendor Specific Port (P0DMACR, aka PxDMACR) in its -+ * User's Guide document (TMS320C674x/OMAP-L1x Processor -+ * Serial ATA (SATA) Controller, Literature Number: SPRUGJ8C, -+ * March 2011, Chapter 4.33 Port DMA Control Register (P0DMACR), -+ * p.68, https://www.ti.com/lit/ug/sprugj8c/sprugj8c.pdf) -+ * as equivalent to the following struct: -+ * -+ * struct AHCI_P0DMACR_t -+ * { -+ * unsigned TXTS : 4; -+ * unsigned RXTS : 4; -+ * unsigned TXABL : 4; -+ * unsigned RXABL : 4; -+ * unsigned Reserved : 16; -+ * }; -+ * -+ * TXTS: Transmit Transaction Size (TX_TRANSACTION_SIZE). -+ * This field defines the DMA transaction size in DWORDs for -+ * transmit (system bus read, device write) operation. [...] -+ * -+ * RXTS: Receive Transaction Size (RX_TRANSACTION_SIZE). -+ * This field defines the Port DMA transaction size in DWORDs -+ * for receive (system bus write, device read) operation. [...] -+ * -+ * TXABL: Transmit Burst Limit. -+ * This field allows software to limit the VBUSP master read -+ * burst size. [...] -+ * -+ * RXABL: Receive Burst Limit. -+ * Allows software to limit the VBUSP master write burst -+ * size. [...] -+ * -+ * Reserved: Reserved. -+ * -+ * -+ * NOTE: According to the above document, the following alternative -+ * to the code below could perhaps be a better option -+ * (or preparation) for possible further improvements later: -+ * sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ffff, -+ * 0x00000033); -+ */ -+ sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ffff, 0x00004433); - - /* Start DMA */ - sunxi_setbits(port_mmio + PORT_CMD, PORT_CMD_START); diff --git a/target/linux/sunxi/patches-4.19/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch b/target/linux/sunxi/patches-4.19/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch deleted file mode 100644 index ef7867af81..0000000000 --- a/target/linux/sunxi/patches-4.19/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 55ec26d6a4241363fa94f15377ebd8f1116fbfd7 Mon Sep 17 00:00:00 2001 -From: Samuel Holland -Date: Sat, 12 Jan 2019 20:17:19 -0600 -Subject: [PATCH] arm64: dts: allwinner: a64: Enable A64 timer workaround - -As instability in the architectural timer has been observed on multiple -devices using this SoC, inluding the Pine64 and the Orange Pi Win, -enable the workaround in the SoC's device tree. - -Acked-by: Maxime Ripard -Signed-off-by: Samuel Holland -Signed-off-by: Chen-Yu Tsai ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -159,6 +159,7 @@ - - timer { - compatible = "arm,armv8-timer"; -+ allwinner,erratum-unknown1; - interrupts = , - ; -+ linux,code = ; - gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; - }; - }; -@@ -238,7 +238,7 @@ - }; - - &usb_otg { -- dr_mode = "otg"; -+ dr_mode = "host"; - status = "okay"; - }; - diff --git a/target/linux/sunxi/patches-4.19/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch b/target/linux/sunxi/patches-4.19/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch deleted file mode 100644 index 1d58b7bcba..0000000000 --- a/target/linux/sunxi/patches-4.19/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 49cd9ea6dc8d68eb519ccd9f31c9730dec8a181a Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Thu, 8 Mar 2018 22:14:50 +0100 -Subject: [PATCH] Revert "ARM: dts: sun7i: Add BCM53125 switch nodes to the - lamobo-r1 board" - -This reverts the changes needed for the upstream b53 DSA switch driver -to use the OpenWrt b43 swconfig switch driver. - -This reverts commit 0cdefd5b5485ee6eb3512a75739d09a4090176ed. -This reverts commit d7b9eaff5f0ca00726336b4c0c3c29decf30412a. ---- - arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 60 ++----------------------------- - 1 file changed, 3 insertions(+), 57 deletions(-) - ---- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts -+++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts -@@ -124,67 +124,13 @@ - &gmac { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_pins_rgmii_a>; -+ phy = <&phy1>; - phy-mode = "rgmii"; - phy-supply = <®_gmac_3v3>; - status = "okay"; - -- fixed-link { -- speed = <1000>; -- full-duplex; -- }; -- -- mdio { -- compatible = "snps,dwmac-mdio"; -- #address-cells = <1>; -- #size-cells = <0>; -- -- switch: ethernet-switch@1e { -- compatible = "brcm,bcm53125"; -- reg = <30>; -- #address-cells = <1>; -- #size-cells = <0>; -- -- ports { -- #address-cells = <1>; -- #size-cells = <0>; -- -- port0: port@0 { -- reg = <0>; -- label = "lan2"; -- }; -- -- port1: port@1 { -- reg = <1>; -- label = "lan3"; -- }; -- -- port2: port@2 { -- reg = <2>; -- label = "lan4"; -- }; -- -- port3: port@3 { -- reg = <3>; -- label = "wan"; -- }; -- -- port4: port@4 { -- reg = <4>; -- label = "lan1"; -- }; -- -- port8: port@8 { -- reg = <8>; -- label = "cpu"; -- ethernet = <&gmac>; -- phy-mode = "rgmii-txid"; -- fixed-link { -- speed = <1000>; -- full-duplex; -- }; -- }; -- }; -- }; -+ phy1: ethernet-phy@1 { -+ reg = <1>; - }; - }; - diff --git a/target/linux/sunxi/patches-4.19/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch b/target/linux/sunxi/patches-4.19/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch deleted file mode 100644 index ee70abee27..0000000000 --- a/target/linux/sunxi/patches-4.19/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 7d87d3dafc4b1ea5659eb71ee6c5fd5308490d1f Mon Sep 17 00:00:00 2001 -From: Oskari Lemmela -Date: Mon, 31 Dec 2018 07:44:49 +0200 -Subject: [PATCH] arm64: allwinner: a64-sopine: Add Sopine flash partitions. - -First 896kB to u-boot. Enough space for SPL, u-boot and ATF. -Next 128kB to u-boot environment and rest to firmware. - -Firmware partition is compatible FIT image dynamic splitting. - -Signed-off-by: Oskari Lemmela ---- - .../boot/dts/allwinner/sun50i-a64-sopine.dtsi | 22 +++++++++++++++++++ - 1 file changed, 22 insertions(+) - ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi -@@ -78,6 +78,28 @@ - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <40000000>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "u-boot"; -+ reg = <0x000000 0x0E0000>; -+ }; -+ -+ partition@e0000 { -+ label = "u-boot-env"; -+ reg = <0x0E0000 0x020000>; -+ }; -+ -+ partition@100000 { -+ compatible = "denx,fit"; -+ label = "firmware"; -+ reg = <0x100000 0xF00000>; -+ }; -+ }; - }; - }; - diff --git a/target/linux/tegra/config-4.19 b/target/linux/tegra/config-4.19 deleted file mode 100644 index c5a4c9941d..0000000000 --- a/target/linux/tegra/config-4.19 +++ /dev/null @@ -1,553 +0,0 @@ -CONFIG_AC97_BUS=y -# CONFIG_AHCI_TEGRA is not set -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y -CONFIG_ARCH_NR_GPIO=1024 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_FIRMWARE=y -CONFIG_ARCH_SUPPORTS_TRUSTED_FOUNDATIONS=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_TEGRA=y -# CONFIG_ARCH_TEGRA_114_SOC is not set -# CONFIG_ARCH_TEGRA_124_SOC is not set -CONFIG_ARCH_TEGRA_2x_SOC=y -# CONFIG_ARCH_TEGRA_3x_SOC is not set -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_ARM_ERRATA_754327=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_PL172_MPMC is not set -# CONFIG_ARM_SMMU is not set -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_ARM_TEGRA20_CPUFREQ=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_THUMBEE=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASN1=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BOUNCE=y -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=16 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -CONFIG_COMMON_CLK=y -# CONFIG_CPUFREQ_DT is not set -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -# CONFIG_CPU_FREQ_STAT is not set -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECHAINIV=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LZ4=y -CONFIG_CRYPTO_LZ4HC=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_RSA=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM=y -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_TWOFISH_COMMON=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_ALIGN_RODATA=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_USER is not set -# CONFIG_DEVPORT is not set -CONFIG_DMADEVICES=y -CONFIG_DMA_CMA=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DNOTIFY=y -CONFIG_DRM=y -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -CONFIG_DRM_TEGRA=y -# CONFIG_DRM_TEGRA_DEBUG is not set -# CONFIG_DRM_TEGRA_STAGING is not set -# CONFIG_DRM_TVE200 is not set -CONFIG_DTC=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_SYS_IMAGEBLIT=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_FREEZER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_TEGRA=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HDMI=y -CONFIG_HID=y -CONFIG_HIDRAW=y -CONFIG_HID_GENERIC=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HWMON=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_TEGRA=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_IOMMU_API=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_IOMMU_IOVA=y -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -CONFIG_IOMMU_SUPPORT=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_KEYBOARD_ATKBD=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZ4HC_COMPRESS=y -CONFIG_LZ4_COMPRESS=y -CONFIG_LZ4_DECOMPRESS=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MFD_NVEC is not set -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_TEGRA=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MPILIB=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -# CONFIG_NEON is not set -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NLS=y -CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IOMMU=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEASPM=y -# CONFIG_PCIEASPM_DEBUG is not set -CONFIG_PCIEASPM_DEFAULT=y -# CONFIG_PCIEASPM_PERFORMANCE is not set -# CONFIG_PCIEASPM_POWERSAVE is not set -# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCI_TEGRA=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHY_TEGRA_XUSB=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_TEGRA=y -CONFIG_PINCTRL_TEGRA20=y -CONFIG_PINCTRL_TEGRA_XUSB=y -# CONFIG_PL310_ERRATA_588369 is not set -CONFIG_PL310_ERRATA_727915=y -# CONFIG_PL310_ERRATA_753970 is not set -CONFIG_PL310_ERRATA_769419=y -CONFIG_PM=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_GPIO=y -CONFIG_POWER_SUPPLY=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -CONFIG_PWM_TEGRA=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# CONFIG_RCU_EXPERT is not set -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_TEGRA=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_NVMEM=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SCSI=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SERIAL_8250_FSL=y -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_TEGRA=y -CONFIG_SERIO=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SND=y -# CONFIG_SND_COMPRESS_OFFLOAD is not set -CONFIG_SND_DMAENGINE_PCM=y -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_HDA_TEGRA is not set -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_PCI is not set -CONFIG_SND_PCM=y -# CONFIG_SND_PROC_FS is not set -CONFIG_SND_SIMPLE_CARD=y -CONFIG_SND_SIMPLE_CARD_UTILS=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_AC97_BUS=y -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -CONFIG_SND_SOC_I2C_AND_SPI=y -CONFIG_SND_SOC_TEGRA=y -CONFIG_SND_SOC_TEGRA20_AC97=y -CONFIG_SND_SOC_TEGRA20_DAS=y -CONFIG_SND_SOC_TEGRA20_I2S=y -CONFIG_SND_SOC_TEGRA20_SPDIF=y -# CONFIG_SND_SOC_TEGRA30_AHUB is not set -# CONFIG_SND_SOC_TEGRA30_I2S is not set -# CONFIG_SND_SOC_TEGRA_ALC5632 is not set -# CONFIG_SND_SOC_TEGRA_MAX98090 is not set -# CONFIG_SND_SOC_TEGRA_RT5640 is not set -# CONFIG_SND_SOC_TEGRA_RT5677 is not set -# CONFIG_SND_SOC_TEGRA_SGTL5000 is not set -CONFIG_SND_SOC_TEGRA_TRIMSLICE=y -# CONFIG_SND_SOC_TEGRA_WM8753 is not set -# CONFIG_SND_SOC_TEGRA_WM8903 is not set -# CONFIG_SND_SOC_TEGRA_WM9712 is not set -CONFIG_SND_SOC_TLV320AIC23=y -CONFIG_SND_SOC_TLV320AIC23_I2C=y -# CONFIG_SND_USB is not set -CONFIG_SOC_BUS=y -CONFIG_SOC_TEGRA_FLOWCTRL=y -CONFIG_SOC_TEGRA_FUSE=y -CONFIG_SOC_TEGRA_PMC=y -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -# CONFIG_SPI_TEGRA114 is not set -CONFIG_SPI_TEGRA20_SFLASH=y -CONFIG_SPI_TEGRA20_SLINK=y -CONFIG_SRCU=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWP_EMULATE=y -CONFIG_SYNC_FILE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_TEGRA20_APB_DMA=y -CONFIG_TEGRA_AHB=y -CONFIG_TEGRA_GMI=y -CONFIG_TEGRA_HOST1X=y -CONFIG_TEGRA_HOST1X_FIREWALL=y -CONFIG_TEGRA_IOMMU_GART=y -# CONFIG_TEGRA_IOMMU_SMMU is not set -# CONFIG_TEGRA_IVC is not set -CONFIG_TEGRA_MC=y -CONFIG_TEGRA_TIMER=y -CONFIG_TEGRA_WATCHDOG=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_TRUSTED_FOUNDATIONS=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_XHCI_TEGRA is not set -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -CONFIG_USB_EHCI_TEGRA=y -CONFIG_USB_HID=y -CONFIG_USB_HIDDEV=y -CONFIG_USB_PHY=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_TEGRA_PHY=y -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -# CONFIG_USERIO is not set -CONFIG_USE_OF=y -# CONFIG_VFIO is not set -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/tegra/patches-4.19/100-serial8250-on-tegra-hsuart-recover-from-spurious-interrupts-due-to-tegra2-silicon-bug.patch b/target/linux/tegra/patches-4.19/100-serial8250-on-tegra-hsuart-recover-from-spurious-interrupts-due-to-tegra2-silicon-bug.patch deleted file mode 100644 index 9e8c331934..0000000000 --- a/target/linux/tegra/patches-4.19/100-serial8250-on-tegra-hsuart-recover-from-spurious-interrupts-due-to-tegra2-silicon-bug.patch +++ /dev/null @@ -1,77 +0,0 @@ -From patchwork Fri Jul 13 11:32:42 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: serial8250 on tegra hsuart: recover from spurious interrupts due to - tegra2 silicon bug -X-Patchwork-Submitter: "David R. Piegdon" -X-Patchwork-Id: 943440 -Message-Id: <4676ea34-69ce-5422-1ded-94218b89f7d9@p23q.org> -To: linux-tegra@vger.kernel.org -Date: Fri, 13 Jul 2018 11:32:42 +0000 -From: "David R. Piegdon" -List-Id: - -Hi, -a while back I sent a few mails regarding spurious interrupts in the -UARTA (hsuart) block of the Tegra2 SoC, when using the 8250 driver for -it instead of the hsuart driver. After going down a pretty deep -debugging/testing hole, I think I found a patch that fixes the issue. So -far testing in a reboot-cycle suggests that the error frequency dropped -from >3% of all reboots to at least <0.05% of all reboots. Tests -continue to run over the weekend. - -The patch below already is a second iteration; the first did not reset -the MCR or contain the lines below '// clear interrupts'. This resulted -in no more spurious interrupts, but in a few % of spurious interrupts -that were recovered the UART block did not receive any characters any -more. So further resetting was required to fully reacquire operational -state of the UART block. - -I'd love any comments/suggestions on this! - -Cheers, - -David - ---- a/drivers/tty/serial/8250/8250_core.c -+++ b/drivers/tty/serial/8250/8250_core.c -@@ -136,6 +136,38 @@ static irqreturn_t serial8250_interrupt( - "serial8250: too much work for irq%d\n", irq); - break; - } -+ -+#ifdef CONFIG_ARCH_TEGRA_2x_SOC -+ if (!handled && (port->type == PORT_TEGRA)) { -+ /* -+ * Fix Tegra 2 CPU silicon bug where sometimes -+ * "TX holding register empty" interrupts result in a -+ * bad (metastable?) state in Tegras HSUART IP core. -+ * Only way to recover seems to be to reset all -+ * interrupts as well as the TX queue and the MCR. -+ * But we don't want to loose any outgoing characters, -+ * so only do it if the RX and TX queues are empty. -+ */ -+ unsigned char lsr = port->serial_in(port, UART_LSR); -+ const unsigned char fifo_empty_mask = -+ (UART_LSR_TEMT | UART_LSR_THRE); -+ if (((lsr & (UART_LSR_DR | fifo_empty_mask)) == -+ fifo_empty_mask)) { -+ port->serial_out(port, UART_IER, 0); -+ port->serial_out(port, UART_MCR, 0); -+ serial8250_clear_and_reinit_fifos(up); -+ port->serial_out(port, UART_MCR, up->mcr); -+ port->serial_out(port, UART_IER, up->ier); -+ // clear interrupts -+ serial_port_in(port, UART_LSR); -+ serial_port_in(port, UART_RX); -+ serial_port_in(port, UART_IIR); -+ serial_port_in(port, UART_MSR); -+ up->lsr_saved_flags = 0; -+ up->msr_saved_flags = 0; -+ } -+ } -+#endif - } while (l != end); - - spin_unlock(&i->lock); diff --git a/target/linux/tegra/patches-4.19/101-ARM-dtc-tegra-enable-front-panel-leds-in-TrimSlice.patch b/target/linux/tegra/patches-4.19/101-ARM-dtc-tegra-enable-front-panel-leds-in-TrimSlice.patch deleted file mode 100644 index ae48e8d862..0000000000 --- a/target/linux/tegra/patches-4.19/101-ARM-dtc-tegra-enable-front-panel-leds-in-TrimSlice.patch +++ /dev/null @@ -1,46 +0,0 @@ ---- a/arch/arm/boot/dts/tegra20-trimslice.dts -+++ b/arch/arm/boot/dts/tegra20-trimslice.dts -@@ -200,16 +200,17 @@ - conf_ata { - nvidia,pins = "ata", "atc", "atd", "ate", - "crtp", "dap2", "dap3", "dap4", "dta", -- "dtb", "dtc", "dtd", "dte", "gmb", -- "gme", "i2cp", "pta", "slxc", "slxd", -- "spdi", "spdo", "uda"; -+ "dtb", "dtc", "dtd", "gmb", "gme", -+ "i2cp", "pta", "slxc", "slxd", "spdi", -+ "spdo", "uda"; - nvidia,pull = ; - nvidia,tristate = ; - }; - conf_atb { - nvidia,pins = "atb", "cdev1", "cdev2", "dap1", -- "gma", "gmc", "gmd", "gpu", "gpu7", -- "gpv", "sdio1", "slxa", "slxk", "uac"; -+ "dte", "gma", "gmc", "gmd", "gpu", -+ "gpu7", "gpv", "sdio1", "slxa", "slxk", -+ "uac"; - nvidia,pull = ; - nvidia,tristate = ; - }; -@@ -402,6 +403,20 @@ - }; - }; - -+ gpio-leds { -+ compatible = "gpio-leds"; -+ -+ ds2 { -+ label = "trimslice:green:right"; -+ gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_LOW>; -+ }; -+ -+ ds3 { -+ label = "trimslice:green:left"; -+ gpios = <&gpio TEGRA_GPIO(BB, 5) GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ - poweroff { - compatible = "gpio-poweroff"; - gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; diff --git a/target/linux/x86/64/config-4.19 b/target/linux/x86/64/config-4.19 deleted file mode 100644 index 8de25d556f..0000000000 --- a/target/linux/x86/64/config-4.19 +++ /dev/null @@ -1,516 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ACPI=y -CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y -# CONFIG_ACPI_BGRT is not set -CONFIG_ACPI_BUTTON=y -# CONFIG_ACPI_CMPC is not set -CONFIG_ACPI_CONTAINER=y -CONFIG_ACPI_CPPC_LIB=y -CONFIG_ACPI_CPU_FREQ_PSS=y -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DEBUGGER is not set -# CONFIG_ACPI_DOCK is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -CONFIG_ACPI_FAN=y -CONFIG_ACPI_HOTPLUG_CPU=y -CONFIG_ACPI_HOTPLUG_IOAPIC=y -# CONFIG_ACPI_I2C_OPREGION is not set -CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -CONFIG_ACPI_LPIT=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_PROCESSOR_CSTATE=y -CONFIG_ACPI_PROCESSOR_IDLE=y -# CONFIG_ACPI_PROCFS_POWER is not set -CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SPCR_TABLE=y -CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y -# CONFIG_ACPI_TAD is not set -CONFIG_ACPI_THERMAL=y -CONFIG_ACPI_VIDEO=y -# CONFIG_ACPI_WMI is not set -CONFIG_AGP=y -# CONFIG_AGP_ALI is not set -# CONFIG_AGP_AMD is not set -# CONFIG_AGP_AMD64 is not set -# CONFIG_AGP_ATI is not set -# CONFIG_AGP_EFFICEON is not set -CONFIG_AGP_INTEL=y -# CONFIG_AGP_NVIDIA is not set -# CONFIG_AGP_SIS is not set -# CONFIG_AGP_SWORKS is not set -# CONFIG_AGP_VIA is not set -# CONFIG_APM is not set -CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y -CONFIG_ARCH_HAS_ADD_PAGES=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_PMEM_API=y -CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y -CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y -CONFIG_ARCH_HAS_UACCESS_MCSAFE=y -CONFIG_ARCH_HAS_ZONE_DEVICE=y -CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y -CONFIG_ARCH_MMAP_RND_BITS=28 -CONFIG_ARCH_MMAP_RND_BITS_MAX=32 -CONFIG_ARCH_MMAP_RND_BITS_MIN=28 -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SUPPORTS_INT128=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANTS_THP_SWAP=y -CONFIG_AUDIT_ARCH=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BALLOON_COMPACTION=y -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_NVME=y -CONFIG_NVME_MULTIPATH=y -CONFIG_BLK_MQ_VIRTIO=y -# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set -CONFIG_BTT=y -CONFIG_CDROM=y -# CONFIG_CALGARY_IOMMU is not set -# CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT is not set -CONFIG_CONNECTOR=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -CONFIG_CPU_RMAP=y -# CONFIG_CHASH_STATS is not set -# CONFIG_CHASH_SELFTEST is not set -CONFIG_CRC_T10DIF=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_NI_INTEL=y -CONFIG_CRYPTO_AES_X86_64=y -# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set -# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set -# CONFIG_CRYPTO_CHACHA20_X86_64 is not set -CONFIG_CRYPTO_CRCT10DIF=y -# CONFIG_CRYPTO_CRCT10DIF_PCLMUL is not set -CONFIG_CRYPTO_CRYPTD=y -# CONFIG_CRYPTO_DES3_EDE_X86_64 is not set -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_GLUE_HELPER_X86=y -CONFIG_CRYPTO_LRW=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_CRYPTO_POLY1305_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set -# CONFIG_CRYPTO_SHA1_MB is not set -# CONFIG_CRYPTO_SHA1_SSSE3 is not set -# CONFIG_CRYPTO_SHA256_MB is not set -# CONFIG_CRYPTO_SHA256_SSSE3 is not set -# CONFIG_CRYPTO_SHA512_MB is not set -# CONFIG_CRYPTO_SHA512_SSSE3 is not set -CONFIG_CRYPTO_SIMD=y -# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set -CONFIG_CRYPTO_XTS=y -# CONFIG_DEBUG_HOTPLUG_CPU0 is not set -# CONFIG_DPTF_POWER is not set -CONFIG_DRM=y -# CONFIG_DRM_AMDGPU is not set -# CONFIG_DRM_AMDGPU_CIK is not set -# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set -# CONFIG_DRM_AMDGPU_SI is not set -# CONFIG_DRM_AMDGPU_USERPTR is not set -# CONFIG_DRM_AMD_ACP is not set -# CONFIG_DRM_AMD_DC is not set -CONFIG_DRM_BOCHS=y -CONFIG_DRM_BRIDGE=y -# CONFIG_DRM_DEBUG_SELFTEST is not set -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set -# CONFIG_DRM_GMA500 is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -CONFIG_DRM_I915=y -# CONFIG_DRM_I915_ALPHA_SUPPORT is not set -CONFIG_DRM_I915_CAPTURE_ERROR=y -CONFIG_DRM_I915_COMPRESS_ERROR=y -# CONFIG_DRM_I915_DEBUG is not set -# CONFIG_DRM_I915_DEBUG_GUC is not set -# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set -CONFIG_DRM_I915_GVT=y -# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set -# CONFIG_DRM_I915_SELFTEST is not set -# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set -# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set -CONFIG_DRM_I915_USERPTR=y -# CONFIG_DRM_I915_WERROR is not set -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_RADEON is not set -# CONFIG_DRM_RADEON_USERPTR is not set -CONFIG_DRM_SCHED=y -CONFIG_DRM_TTM=y -CONFIG_DRM_VIRTIO_GPU=y -# CONFIG_HSA_AMD is not set -# CONFIG_DRM_VKMS is not set -# CONFIG_DRM_VMWGFX is not set -CONFIG_EARLY_PRINTK_EFI=y -CONFIG_EFI=y -CONFIG_EFIVAR_FS=m -# CONFIG_EFI_CAPSULE_LOADER is not set -CONFIG_EFI_ESRT=y -# CONFIG_EFI_FAKE_MEMMAP is not set -# CONFIG_EFI_MIXED is not set -# CONFIG_EFI_PGT_DUMP is not set -CONFIG_EFI_RUNTIME_MAP=y -CONFIG_EFI_RUNTIME_WRAPPERS=y -CONFIG_EFI_STUB=y -# CONFIG_EFI_TEST is not set -# CONFIG_EFI_VARS is not set -CONFIG_FAILOVER=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_EFI=y -CONFIG_FB_HYPERV=y -# CONFIG_FB_I810 is not set -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_SIMPLE=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_SYS_IMAGEBLIT=y -CONFIG_FB_TILEBLITTING=y -# CONFIG_FB_VESA is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_FREEZER=y -CONFIG_GART_IOMMU=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CPU=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_PENDING_IRQ=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_ACPI=y -CONFIG_GPIO_ICH=y -# CONFIG_GPIO_IT87 is not set -CONFIG_GPIO_LYNXPOINT=y -CONFIG_GPIO_SCH=y -CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y -CONFIG_HAVE_ACPI_APEI=y -CONFIG_HAVE_ACPI_APEI_NMI=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_SOFT_DIRTY=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_FENTRY=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_LIVEPATCH=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HAVE_RCU_TABLE_INVALIDATE=y -CONFIG_HAVE_RELIABLE_STACKTRACE=y -CONFIG_HAVE_STACK_VALIDATION=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HDMI=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HID_GENERIC=y -CONFIG_HID_HYPERV_MOUSE=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HOTPLUG_PCI=y -CONFIG_HOTPLUG_PCI_ACPI=y -# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set -# CONFIG_HOTPLUG_PCI_CPCI is not set -# CONFIG_HOTPLUG_PCI_PCIE is not set -# CONFIG_HOTPLUG_PCI_SHPC is not set -CONFIG_HOTPLUG_SMT=y -CONFIG_HPET=y -CONFIG_HPET_MMAP=y -# CONFIG_HP_ACCEL is not set -CONFIG_HVC_DRIVER=y -CONFIG_HVC_IRQ=y -CONFIG_HVC_XEN=y -CONFIG_HVC_XEN_FRONTEND=y -CONFIG_HWMON=y -CONFIG_HWMON_VID=y -CONFIG_HW_RANDOM_AMD=y -CONFIG_HW_RANDOM_INTEL=y -CONFIG_HW_RANDOM_VIRTIO=y -CONFIG_HYPERV=y -CONFIG_HYPERVISOR_GUEST=y -CONFIG_HYPERV_BALLOON=y -CONFIG_HYPERV_KEYBOARD=y -CONFIG_HYPERV_NET=y -CONFIG_HYPERV_STORAGE=y -CONFIG_HYPERV_TSCPAGE=y -CONFIG_HYPERV_UTILS=y -# CONFIG_HYPERV_VSOCKETS is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_MULTI_INSTANTIATE is not set -# CONFIG_IA32_EMULATION is not set -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y -CONFIG_INTEL_GTT=y -CONFIG_INTEL_IDLE=y -# CONFIG_INTEL_INT0002_VGPIO is not set -# CONFIG_INTEL_IPS is not set -# CONFIG_INTEL_MENLOW is not set -# CONFIG_INTEL_MIC_BUS is not set -CONFIG_INTEL_PCH_THERMAL=y -# CONFIG_INTEL_PMC_IPC is not set -CONFIG_INTEL_SOC_DTS_IOSF_CORE=y -CONFIG_INTEL_SOC_DTS_THERMAL=y -# CONFIG_INTEL_TURBO_MAX_3 is not set -# CONFIG_IOMMU_DEBUG is not set -CONFIG_IOMMU_HELPER=y -CONFIG_IOSF_MBI=y -# CONFIG_IOSF_MBI_DEBUG is not set -# CONFIG_ISCSI_IBFT is not set -# CONFIG_ISCSI_IBFT_FIND is not set -CONFIG_ISO9660_FS=y -CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y -# CONFIG_KVM_DEBUG_FS is not set -CONFIG_KVM_GUEST=y -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEGACY_VSYSCALL_EMULATE is not set -CONFIG_LEGACY_VSYSCALL_NONE=y -CONFIG_LIBNVDIMM=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LPC_ICH=y -CONFIG_LPC_SCH=y -CONFIG_MAILBOX=y -# CONFIG_MAXSMP is not set -CONFIG_MEMORY_BALLOON=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_MFD_CORE=y -# CONFIG_MFD_INTEL_LPSS_ACPI is not set -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -CONFIG_MMC_RICOH_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PCI=y -# CONFIG_MMC_SDHCI_PLTFM is not set -# CONFIG_MMC_TIFM_SD is not set -# CONFIG_MMC_WBSD is not set -CONFIG_MMU_NOTIFIER=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MPSC is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_ND_BLK=y -CONFIG_ND_BTT=y -CONFIG_ND_CLAIM=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_FAILOVER=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NR_CPUS=8 -CONFIG_NR_CPUS_DEFAULT=64 -CONFIG_NR_CPUS_RANGE_BEGIN=2 -CONFIG_NR_CPUS_RANGE_END=512 -# CONFIG_NUMA is not set -CONFIG_OUTPUT_FORMAT="elf64-x86-64" -CONFIG_PADATA=y -CONFIG_PAGE_TABLE_ISOLATION=y -CONFIG_PARAVIRT=y -CONFIG_PARAVIRT_CLOCK=y -# CONFIG_PARAVIRT_DEBUG is not set -CONFIG_PARAVIRT_SPINLOCKS=y -CONFIG_PATA_AMD=y -CONFIG_PATA_ATIIXP=y -CONFIG_PATA_MPIIX=y -CONFIG_PATA_OLDPIIX=y -CONFIG_PATA_PLATFORM=y -CONFIG_PATA_VIA=y -CONFIG_PCC=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_PME=y -CONFIG_PCI_HYPERV=y -# CONFIG_PCI_MMCONFIG is not set -CONFIG_PCI_XEN=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_PHYSICAL_ALIGN=0x1000000 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_BAYTRAIL is not set -# CONFIG_PINCTRL_BROXTON is not set -# CONFIG_PINCTRL_CANNONLAKE is not set -# CONFIG_PINCTRL_CHERRYVIEW is not set -# CONFIG_PINCTRL_DENVERTON is not set -# CONFIG_PINCTRL_GEMINILAKE is not set -# CONFIG_PINCTRL_LEWISBURG is not set -# CONFIG_PINCTRL_SUNRISEPOINT is not set -CONFIG_PM=y -# CONFIG_PMIC_OPREGION is not set -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PNP=y -CONFIG_PNPACPI=y -CONFIG_PNP_DEBUG_MESSAGES=y -CONFIG_PROC_EVENTS=y -# CONFIG_PVPANIC is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_RAS=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_RELOCATABLE=y -CONFIG_RESET_ATTACK_MITIGATION=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -# CONFIG_SAMSUNG_Q10 is not set -CONFIG_SATA_AHCI=y -CONFIG_SCHED_MC=y -CONFIG_SCHED_MC_PRIO=y -CONFIG_SCHED_SMT=y -# CONFIG_SCIF_BUS is not set -CONFIG_SCSI_VIRTIO=y -CONFIG_SENSORS_CORETEMP=y -CONFIG_SENSORS_FAM15H_POWER=y -CONFIG_SENSORS_I5500=y -CONFIG_SENSORS_K10TEMP=y -CONFIG_SENSORS_K8TEMP=y -CONFIG_SENSORS_VIA_CPUTEMP=y -CONFIG_SERIAL_8250_PNP=y -CONFIG_SMP=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -# CONFIG_SPARSEMEM_VMEMMAP is not set -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_STACK_VALIDATION=y -# CONFIG_SURFACE_PRO3_BUTTON is not set -CONFIG_SWIOTLB=y -CONFIG_SWIOTLB_XEN=y -CONFIG_SYS_HYPERVISOR=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -# CONFIG_TOSHIBA_BT_RFKILL is not set -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UCS2_STRING=y -# CONFIG_UNWINDER_ORC is not set -CONFIG_USB_STORAGE=y -CONFIG_VGACON_SOFT_SCROLLBACK=y -# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -CONFIG_VIRTIO=y -CONFIG_VIRTIO_BALLOON=y -CONFIG_VIRTIO_BLK=y -CONFIG_VIRTIO_CONSOLE=y -CONFIG_VIRTIO_MMIO=y -# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set -CONFIG_VIRTIO_NET=y -CONFIG_VIRTIO_PCI=y -CONFIG_VIRTIO_PCI_LEGACY=y -# CONFIG_VIRTIO_VSOCKETS is not set -CONFIG_VIRT_DRIVERS=y -CONFIG_VMAP_STACK=y -# CONFIG_VMD is not set -CONFIG_VMWARE_BALLOON=y -CONFIG_VMWARE_PVSCSI=y -CONFIG_VMWARE_VMCI=y -CONFIG_VMWARE_VMCI_VSOCKETS=y -CONFIG_VMXNET3=y -CONFIG_VSOCKETS=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_X86_5LEVEL is not set -CONFIG_X86_64=y -CONFIG_X86_64_SMP=y -CONFIG_X86_ACPI_CPUFREQ=y -# CONFIG_X86_ACPI_CPUFREQ_CPB is not set -CONFIG_X86_AMD_FREQ_SENSITIVITY=y -# CONFIG_X86_AMD_PLATFORM_DEVICE is not set -CONFIG_X86_CMOV=y -CONFIG_X86_CPUID=y -CONFIG_X86_DEBUGCTLMSR=y -CONFIG_X86_DEV_DMA_OPS=y -CONFIG_X86_DIRECT_GBPAGES=y -CONFIG_X86_INTEL_LPSS=y -# CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set -# CONFIG_X86_INTEL_MPX is not set -CONFIG_X86_INTEL_PSTATE=y -CONFIG_X86_MINIMUM_CPU_FAMILY=64 -# CONFIG_X86_PCC_CPUFREQ is not set -CONFIG_X86_PKG_TEMP_THERMAL=y -# CONFIG_X86_PMEM_LEGACY is not set -CONFIG_X86_PM_TIMER=y -# CONFIG_X86_POWERNOW_K8 is not set -# CONFIG_X86_VSYSCALL_EMULATION is not set -CONFIG_X86_X2APIC=y -# CONFIG_X86_X32 is not set -CONFIG_XEN=y -CONFIG_XENFS=y -CONFIG_XEN_512GB=y -CONFIG_XEN_ACPI=y -CONFIG_XEN_ACPI_PROCESSOR=y -CONFIG_XEN_AUTO_XLATE=y -# CONFIG_XEN_BACKEND is not set -CONFIG_XEN_BALLOON=y -CONFIG_XEN_BLKDEV_FRONTEND=y -CONFIG_XEN_COMPAT_XENFS=y -CONFIG_XEN_DEBUG_FS=y -CONFIG_XEN_DEV_EVTCHN=y -CONFIG_XEN_DOM0=y -CONFIG_XEN_EFI=y -CONFIG_XEN_FBDEV_FRONTEND=y -CONFIG_XEN_GNTDEV=y -CONFIG_XEN_GRANT_DEV_ALLOC=y -CONFIG_XEN_HAVE_PVMMU=y -CONFIG_XEN_HAVE_VPMU=y -# CONFIG_XEN_MCE_LOG is not set -CONFIG_XEN_NETDEV_FRONTEND=y -CONFIG_XEN_PCIDEV_FRONTEND=y -CONFIG_XEN_PRIVCMD=y -CONFIG_XEN_PV=y -CONFIG_XEN_PVH=y -CONFIG_XEN_PVHVM=y -CONFIG_XEN_PVHVM_SMP=y -CONFIG_XEN_PV_SMP=y -CONFIG_XEN_SAVE_RESTORE=y -CONFIG_XEN_SCSI_FRONTEND=y -CONFIG_XEN_SYMS=y -CONFIG_XEN_SYS_HYPERVISOR=y -CONFIG_XEN_WDT=y -CONFIG_XEN_XENBUS_FRONTEND=y -CONFIG_XPS=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/x86/config-4.19 b/target/linux/x86/config-4.19 deleted file mode 100644 index fad10dfef4..0000000000 --- a/target/linux/x86/config-4.19 +++ /dev/null @@ -1,502 +0,0 @@ -# CONFIG_60XX_WDT is not set -# CONFIG_64BIT is not set -# CONFIG_ACPI is not set -# CONFIG_ACQUIRE_WDT is not set -# CONFIG_ADVANTECH_WDT is not set -# CONFIG_ALIM1535_WDT is not set -# CONFIG_ALIX is not set -CONFIG_AMD_NB=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_FILTER_PGPROT=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_MEM_ENCRYPT=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_REFCOUNT=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_RANDOM=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_ACPI=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USES_PG_UNCACHED=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y -CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ATA=y -CONFIG_ATA_GENERIC=y -CONFIG_ATA_PIIX=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BOUNCE=y -CONFIG_CC_HAS_SANE_STACKPROTECTOR=y -CONFIG_CLKBLD_I8253=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKEVT_I8253=y -CONFIG_CLKSRC_I8253=y -CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y -CONFIG_CLOCKSOURCE_WATCHDOG=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32=y -# CONFIG_COMPAT_VDSO is not set -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_CPU5_WDT is not set -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_SUP_AMD=y -CONFIG_CPU_SUP_CENTAUR=y -CONFIG_CPU_SUP_CYRIX_32=y -CONFIG_CPU_SUP_INTEL=y -CONFIG_CPU_SUP_TRANSMETA_32=y -CONFIG_CPU_SUP_UMC_32=y -# CONFIG_CRASHLOG is not set -CONFIG_CRASH_CORE=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_586=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_CRC32_PCLMUL is not set -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -# CONFIG_CRYPTO_SERPENT_SSE2_586 is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CX_ECAT is not set -CONFIG_DCACHE_WORD_ACCESS=y -# CONFIG_DCDBAS is not set -# CONFIG_DEBUG_BOOT_PARAMS is not set -# CONFIG_DEBUG_ENTRY is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_NMI_SELFTEST is not set -# CONFIG_DEBUG_TLBFLUSH is not set -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DEFAULT_IO_DELAY_TYPE=0 -# CONFIG_DELL_RBU is not set -CONFIG_DMA_DIRECT_OPS=y -CONFIG_DMI=y -CONFIG_DMIID=y -CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y -CONFIG_DMI_SYSFS=y -CONFIG_DNOTIFY=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EARLY_PRINTK=y -# CONFIG_EARLY_PRINTK_DBGP is not set -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -# CONFIG_EDD is not set -# CONFIG_EUROTECH_WDT is not set -CONFIG_EXT4_FS=y -CONFIG_F2FS_FS=y -# CONFIG_F71808E_WDT is not set -CONFIG_FIRMWARE_MEMMAP=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FUSION=y -# CONFIG_FUSION_CTL is not set -# CONFIG_FUSION_LOGGING is not set -CONFIG_FUSION_MAX_SGE=128 -CONFIG_FUSION_SPI=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y -CONFIG_GENERIC_IRQ_RESERVATION_MODE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GEOS is not set -CONFIG_GLOB=y -# CONFIG_HANGCHECK_TIMER is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_AOUT=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ATOMIC_IOMAP=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_GENERIC_GUP=y -CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KPROBES_ON_FTRACE=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y -CONFIG_HAVE_MMIOTRACE_SUPPORT=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PCSPKR_PLATFORM=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_EVENTS_NMI=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y -CONFIG_HAVE_USER_RETURN_NOTIFIER=y -CONFIG_HID=y -CONFIG_HIGHMEM=y -CONFIG_HIGHMEM4G=y -# CONFIG_HIGHPTE is not set -CONFIG_HPET_EMULATE_RTC=y -CONFIG_HPET_TIMER=y -# CONFIG_HP_WATCHDOG is not set -# CONFIG_HUGETLBFS is not set -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_GEODE=y -CONFIG_HW_RANDOM_VIA=y -# CONFIG_HYPERVISOR_GUEST is not set -CONFIG_HZ_PERIODIC=y -CONFIG_I8253_LOCK=y -# CONFIG_I8K is not set -# CONFIG_IB700_WDT is not set -# CONFIG_IBMASR is not set -# CONFIG_IBM_RTL is not set -# CONFIG_IE6XX_WDT is not set -CONFIG_ILLEGAL_POINTER_VALUE=0 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_INSTRUCTION_DECODER=y -# CONFIG_INTEL_PCH_THERMAL is not set -# CONFIG_INTEL_POWERCLAMP is not set -# CONFIG_INTEL_RDT is not set -# CONFIG_IOSF_MBI is not set -CONFIG_IO_DELAY_0X80=y -# CONFIG_IO_DELAY_0XED is not set -# CONFIG_IO_DELAY_NONE is not set -CONFIG_IO_DELAY_TYPE_0X80=0 -CONFIG_IO_DELAY_TYPE_0XED=1 -CONFIG_IO_DELAY_TYPE_NONE=3 -CONFIG_IO_DELAY_TYPE_UDELAY=2 -# CONFIG_IO_DELAY_UDELAY is not set -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_ISA is not set -CONFIG_ISA_DMA_API=y -# CONFIG_IT8712F_WDT is not set -# CONFIG_IT87_WDT is not set -# CONFIG_ITCO_WDT is not set -CONFIG_JBD2=y -CONFIG_KALLSYMS=y -CONFIG_KEXEC=y -CONFIG_KEXEC_CORE=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_LEDS_CLEVO_MAIL is not set -CONFIG_LOCK_DEBUGGING_SUPPORT=y -# CONFIG_M486 is not set -# CONFIG_M586 is not set -CONFIG_M586MMX=y -# CONFIG_M586TSC is not set -# CONFIG_M686 is not set -# CONFIG_MACHZ_WDT is not set -# CONFIG_MATOM is not set -# CONFIG_MCORE2 is not set -# CONFIG_MCRUSOE is not set -# CONFIG_MCYRIXIII is not set -# CONFIG_MEFFICEON is not set -# CONFIG_MELAN is not set -CONFIG_MEMFD_CREATE=y -# CONFIG_MFD_INTEL_LPSS_PCI is not set -# CONFIG_MGEODEGX1 is not set -# CONFIG_MGEODE_LX is not set -CONFIG_MICROCODE=y -CONFIG_MICROCODE_AMD=y -CONFIG_MICROCODE_INTEL=y -CONFIG_MICROCODE_OLD_INTERFACE=y -CONFIG_MIGRATION=y -# CONFIG_MK6 is not set -# CONFIG_MK7 is not set -# CONFIG_MK8 is not set -# CONFIG_MODIFY_LDT_SYSCALL is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MPENTIUM4 is not set -# CONFIG_MPENTIUMII is not set -# CONFIG_MPENTIUMIII is not set -# CONFIG_MPENTIUMM is not set -# CONFIG_MTD is not set -CONFIG_MTRR=y -# CONFIG_MTRR_SANITIZER is not set -# CONFIG_MVIAC3_2 is not set -# CONFIG_MVIAC7 is not set -# CONFIG_MWINCHIP3D is not set -# CONFIG_MWINCHIPC6 is not set -CONFIG_NAMESPACES=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y -CONFIG_NEED_SG_DMA_LENGTH=y -# CONFIG_NET5501 is not set -# CONFIG_NET_NS is not set -CONFIG_NLS=y -# CONFIG_NOHIGHMEM is not set -CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=1 -CONFIG_NR_CPUS_DEFAULT=1 -CONFIG_NR_CPUS_RANGE_BEGIN=1 -CONFIG_NR_CPUS_RANGE_END=1 -# CONFIG_NSC_GPIO is not set -CONFIG_NVRAM=y -# CONFIG_OF is not set -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -# CONFIG_OLPC is not set -CONFIG_OPROFILE_NMI_TIMER=y -CONFIG_OUTPUT_FORMAT="elf32-i386" -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PC104=y -# CONFIG_PC8736x_GPIO is not set -# CONFIG_PC87413_WDT is not set -CONFIG_PCI=y -CONFIG_PCI_BIOS=y -CONFIG_PCI_DIRECT=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_GOANY=y -# CONFIG_PCI_GOBIOS is not set -# CONFIG_PCI_GODIRECT is not set -# CONFIG_PCI_GOMMCONFIG is not set -CONFIG_PCI_IOV=y -CONFIG_PCI_LABEL=y -CONFIG_PCI_LOCKLESS_CONFIG=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCSPKR_PLATFORM=y -CONFIG_PERF_EVENTS=y -CONFIG_PERF_EVENTS_INTEL_CSTATE=y -CONFIG_PERF_EVENTS_INTEL_RAPL=y -CONFIG_PERF_EVENTS_INTEL_UNCORE=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYSICAL_ALIGN=0x100000 -CONFIG_PHYSICAL_START=0x1000000 -CONFIG_PMC_ATOM=y -CONFIG_POWER_SUPPLY=y -# CONFIG_PROCESSOR_SELECT is not set -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -# CONFIG_PUNIT_ATOM_DEBUG is not set -CONFIG_RATIONAL=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RETPOLINE=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SBC7240_WDT is not set -# CONFIG_SBC8360_WDT is not set -# CONFIG_SBC_EPX_C3_WATCHDOG is not set -# CONFIG_SC1200_WDT is not set -CONFIG_SCSI=y -CONFIG_SCSI_SPI_ATTRS=y -CONFIG_SCx200=y -CONFIG_SCx200HR_TIMER=y -# CONFIG_SCx200_GPIO is not set -# CONFIG_SCx200_WDT is not set -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_SERPORT=y -CONFIG_SG_POOL=y -# CONFIG_SMSC37B787_WDT is not set -# CONFIG_SMSC_SCH311X_WDT is not set -CONFIG_SPARSEMEM_STATIC=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -# CONFIG_TELCLOCK is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -# CONFIG_TOSHIBA is not set -CONFIG_UNWINDER_FRAME_POINTER=y -# CONFIG_UNWINDER_GUESS is not set -CONFIG_UP_LATE_INIT=y -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_HID=y -CONFIG_USB_HIDDEV=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PCI=y -# CONFIG_USB_OHCI_HCD_PLATFORM is not set -CONFIG_USB_PCI=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_UHCI_HCD=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PCI=y -# CONFIG_USB_XHCI_PLATFORM is not set -# CONFIG_USERIO is not set -# CONFIG_USER_NS is not set -CONFIG_USER_STACKTRACE_SUPPORT=y -# CONFIG_VGACON_SOFT_SCROLLBACK is not set -CONFIG_VGA_CONSOLE=y -# CONFIG_VIA_WDT is not set -# CONFIG_VMWARE_VMCI is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_WAFER_WDT is not set -CONFIG_X86=y -CONFIG_X86_32=y -# CONFIG_X86_32_IRIS is not set -CONFIG_X86_32_LAZY_GS=y -CONFIG_X86_ALIGNMENT_16=y -# CONFIG_X86_ANCIENT_MCE is not set -# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set -CONFIG_X86_CMPXCHG64=y -# CONFIG_X86_CPUFREQ_NFORCE2 is not set -# CONFIG_X86_CPUID is not set -# CONFIG_X86_DEBUG_FPU is not set -# CONFIG_X86_DECODER_SELFTEST is not set -# CONFIG_X86_EXTENDED_PLATFORM is not set -CONFIG_X86_F00F_BUG=y -CONFIG_X86_FEATURE_NAMES=y -CONFIG_X86_GENERIC=y -# CONFIG_X86_GX_SUSPMOD is not set -# CONFIG_X86_INTEL_MPX is not set -# CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set -# CONFIG_X86_INTEL_PSTATE is not set -CONFIG_X86_INTEL_TSX_MODE_OFF=y -# CONFIG_X86_INTEL_TSX_MODE_ON is not set -# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set -CONFIG_X86_INTEL_UMIP=y -CONFIG_X86_INTEL_USERCOPY=y -CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_IO_APIC=y -CONFIG_X86_L1_CACHE_SHIFT=6 -# CONFIG_X86_LEGACY_VM86 is not set -CONFIG_X86_LOCAL_APIC=y -# CONFIG_X86_LONGRUN is not set -CONFIG_X86_MCE=y -# CONFIG_X86_MCELOG_LEGACY is not set -CONFIG_X86_MCE_AMD=y -# CONFIG_X86_MCE_INJECT is not set -CONFIG_X86_MCE_INTEL=y -CONFIG_X86_MCE_THRESHOLD=y -CONFIG_X86_MINIMUM_CPU_FAMILY=5 -CONFIG_X86_MPPARSE=y -CONFIG_X86_MSR=y -# CONFIG_X86_P4_CLOCKMOD is not set -CONFIG_X86_PAT=y -CONFIG_X86_PLATFORM_DEVICES=y -# CONFIG_X86_POWERNOW_K6 is not set -# CONFIG_X86_POWERNOW_K7 is not set -# CONFIG_X86_PTDUMP is not set -# CONFIG_X86_REBOOTFIXUPS is not set -CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y -CONFIG_X86_RESERVE_LOW=64 -CONFIG_X86_SMAP=y -# CONFIG_X86_SPEEDSTEP_CENTRINO is not set -# CONFIG_X86_SPEEDSTEP_ICH is not set -# CONFIG_X86_SPEEDSTEP_SMI is not set -CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y -CONFIG_X86_THERMAL_VECTOR=y -CONFIG_X86_TSC=y -CONFIG_X86_UP_APIC=y -CONFIG_X86_UP_IOAPIC=y -CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_X86=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/x86/generic/config-4.19 b/target/linux/x86/generic/config-4.19 deleted file mode 100644 index ada81ce04e..0000000000 --- a/target/linux/x86/generic/config-4.19 +++ /dev/null @@ -1,463 +0,0 @@ -# CONFIG_3C515 is not set -CONFIG_ACPI=y -CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y -# CONFIG_ACPI_BGRT is not set -CONFIG_ACPI_BUTTON=y -# CONFIG_ACPI_CMPC is not set -CONFIG_ACPI_CONTAINER=y -CONFIG_ACPI_CPU_FREQ_PSS=y -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DEBUGGER is not set -# CONFIG_ACPI_DOCK is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -# CONFIG_ACPI_FAN is not set -CONFIG_ACPI_HOTPLUG_CPU=y -CONFIG_ACPI_HOTPLUG_IOAPIC=y -# CONFIG_ACPI_I2C_OPREGION is not set -CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_PROCESSOR_CSTATE=y -CONFIG_ACPI_PROCESSOR_IDLE=y -# CONFIG_ACPI_PROCFS_POWER is not set -CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SPCR_TABLE=y -CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y -CONFIG_ACPI_TAD=y -CONFIG_ACPI_THERMAL=y -CONFIG_ACPI_VIDEO=y -# CONFIG_ACPI_WMI is not set -CONFIG_AGP=y -# CONFIG_AGP_ALI is not set -# CONFIG_AGP_AMD is not set -# CONFIG_AGP_AMD64 is not set -# CONFIG_AGP_ATI is not set -# CONFIG_AGP_EFFICEON is not set -CONFIG_AGP_INTEL=y -# CONFIG_AGP_NVIDIA is not set -# CONFIG_AGP_SIS is not set -# CONFIG_AGP_SWORKS is not set -# CONFIG_AGP_VIA is not set -# CONFIG_APM is not set -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y -CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BALLOON_COMPACTION=y -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_BLK_MQ_VIRTIO=y -# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set -CONFIG_BTT=y -CONFIG_CDROM=y -CONFIG_CHASH=y -# CONFIG_CHASH_SELFTEST is not set -# CONFIG_CHASH_STATS is not set -CONFIG_CONNECTOR=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_RMAP=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -# CONFIG_DEBUG_HOTPLUG_CPU0 is not set -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DPTF_POWER is not set -CONFIG_DRM=y -# CONFIG_DRM_AMDGPU is not set -# CONFIG_DRM_AMDGPU_CIK is not set -# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set -# CONFIG_DRM_AMDGPU_SI is not set -# CONFIG_DRM_AMDGPU_USERPTR is not set -# CONFIG_DRM_AMD_ACP is not set -# CONFIG_DRM_AMD_DC is not set -CONFIG_DRM_BOCHS=y -CONFIG_DRM_BRIDGE=y -# CONFIG_DRM_DEBUG_SELFTEST is not set -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set -# CONFIG_DRM_GMA500 is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -CONFIG_DRM_I915=y -# CONFIG_DRM_I915_ALPHA_SUPPORT is not set -CONFIG_DRM_I915_CAPTURE_ERROR=y -CONFIG_DRM_I915_COMPRESS_ERROR=y -# CONFIG_DRM_I915_DEBUG is not set -# CONFIG_DRM_I915_DEBUG_GUC is not set -# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set -# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set -# CONFIG_DRM_I915_SELFTEST is not set -# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set -# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set -CONFIG_DRM_I915_USERPTR=y -# CONFIG_DRM_I915_WERROR is not set -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_RADEON is not set -# CONFIG_DRM_RADEON_USERPTR is not set -CONFIG_DRM_SCHED=y -CONFIG_DRM_TTM=y -CONFIG_DRM_VIRTIO_GPU=y -# CONFIG_DRM_VKMS is not set -# CONFIG_DRM_VMWGFX is not set -CONFIG_EARLY_PRINTK_EFI=y -CONFIG_EFI=y -CONFIG_EFIVAR_FS=m -# CONFIG_EFI_BOOTLOADER_CONTROL is not set -# CONFIG_EFI_CAPSULE_LOADER is not set -# CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH is not set -CONFIG_EFI_ESRT=y -# CONFIG_EFI_FAKE_MEMMAP is not set -# CONFIG_EFI_PGT_DUMP is not set -CONFIG_EFI_RUNTIME_MAP=y -CONFIG_EFI_RUNTIME_WRAPPERS=y -CONFIG_EFI_STUB=y -# CONFIG_EFI_TEST is not set -CONFIG_EFI_VARS=y -# CONFIG_EISA is not set -# CONFIG_EL3 is not set -CONFIG_FAILOVER=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_EFI=y -CONFIG_FB_HYPERV=y -# CONFIG_FB_I810 is not set -CONFIG_FB_SIMPLE=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_VESA is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_FREEZER=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_PENDING_IRQ=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_ACPI=y -CONFIG_HAVE_ACPI_APEI=y -CONFIG_HAVE_ACPI_APEI_NMI=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y -CONFIG_HAVE_KVM_EVENTFD=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y -CONFIG_HAVE_KVM_IRQ_BYPASS=y -CONFIG_HAVE_KVM_IRQ_ROUTING=y -CONFIG_HAVE_KVM_MSI=y -CONFIG_HAVE_RCU_TABLE_FREE=y -CONFIG_HAVE_RCU_TABLE_INVALIDATE=y -CONFIG_HDMI=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HID_GENERIC=y -CONFIG_HID_HYPERV_MOUSE=y -# CONFIG_HIGHMEM4G is not set -CONFIG_HIGHMEM64G=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HOTPLUG_PCI=y -CONFIG_HOTPLUG_PCI_ACPI=y -# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set -# CONFIG_HOTPLUG_PCI_COMPAQ is not set -# CONFIG_HOTPLUG_PCI_CPCI is not set -# CONFIG_HOTPLUG_PCI_IBM is not set -CONFIG_HOTPLUG_PCI_PCIE=y -# CONFIG_HOTPLUG_PCI_SHPC is not set -CONFIG_HOTPLUG_SMT=y -CONFIG_HPET=y -CONFIG_HPET_MMAP=y -# CONFIG_HP_ACCEL is not set -CONFIG_HVC_DRIVER=y -CONFIG_HVC_IRQ=y -CONFIG_HVC_XEN=y -CONFIG_HVC_XEN_FRONTEND=y -CONFIG_HWMON=y -CONFIG_HWMON_VID=y -CONFIG_HW_RANDOM_VIRTIO=y -CONFIG_HYPERV=y -CONFIG_HYPERVISOR_GUEST=y -CONFIG_HYPERV_BALLOON=y -CONFIG_HYPERV_KEYBOARD=y -CONFIG_HYPERV_NET=y -CONFIG_HYPERV_STORAGE=y -CONFIG_HYPERV_UTILS=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_MULTI_INSTANTIATE is not set -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y -CONFIG_INTEL_GTT=y -CONFIG_INTEL_IDLE=y -# CONFIG_INTEL_INT0002_VGPIO is not set -# CONFIG_INTEL_IPS is not set -# CONFIG_INTEL_MENLOW is not set -CONFIG_INTEL_PCH_THERMAL=y -# CONFIG_INTEL_PMC_IPC is not set -CONFIG_INTEL_SOC_DTS_IOSF_CORE=y -CONFIG_INTEL_SOC_DTS_THERMAL=y -CONFIG_INTERVAL_TREE=y -CONFIG_IOSF_MBI=y -# CONFIG_IOSF_MBI_DEBUG is not set -CONFIG_IRQ_BYPASS_MANAGER=y -CONFIG_ISA=y -CONFIG_ISAPNP=y -CONFIG_ISA_BUS_API=y -# CONFIG_ISCSI_IBFT is not set -# CONFIG_ISCSI_IBFT_FIND is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -CONFIG_KVM=y -CONFIG_KVM_AMD=y -CONFIG_KVM_ASYNC_PF=y -# CONFIG_KVM_DEBUG_FS is not set -CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y -CONFIG_KVM_GUEST=y -CONFIG_KVM_INTEL=y -CONFIG_KVM_MMIO=y -CONFIG_KVM_VFIO=y -# CONFIG_LANCE is not set -# CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_LIBNVDIMM=y -CONFIG_LOCK_SPIN_ON_OWNER=y -# CONFIG_M586MMX is not set -# CONFIG_MDA_CONSOLE is not set -CONFIG_MEMORY_BALLOON=y -CONFIG_MFD_CORE=y -CONFIG_MFD_INTEL_LPSS=y -CONFIG_MFD_INTEL_LPSS_ACPI=y -# CONFIG_MIXCOMWD is not set -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -CONFIG_MMC_RICOH_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PCI=y -# CONFIG_MMC_SDHCI_PLTFM is not set -# CONFIG_MMC_TIFM_SD is not set -# CONFIG_MMC_WBSD is not set -CONFIG_MMU_NOTIFIER=y -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -# CONFIG_MOUSE_PS2_BYD is not set -# CONFIG_MOUSE_PS2_CYPRESS is not set -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SMBUS=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_VMMOUSE is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -CONFIG_MPENTIUM4=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_ND_BLK=y -CONFIG_ND_BTT=y -CONFIG_ND_CLAIM=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NET_FAILOVER=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NO_HZ=y -CONFIG_NR_CPUS=4 -CONFIG_NR_CPUS_DEFAULT=8 -CONFIG_NR_CPUS_RANGE_BEGIN=2 -CONFIG_NR_CPUS_RANGE_END=8 -CONFIG_PADATA=y -CONFIG_PAGE_TABLE_ISOLATION=y -CONFIG_PARAVIRT=y -CONFIG_PARAVIRT_CLOCK=y -# CONFIG_PARAVIRT_DEBUG is not set -CONFIG_PARAVIRT_SPINLOCKS=y -CONFIG_PATA_AMD=y -CONFIG_PATA_ATIIXP=y -CONFIG_PATA_MPIIX=y -CONFIG_PATA_OLDPIIX=y -CONFIG_PATA_PLATFORM=y -CONFIG_PATA_SC1200=y -CONFIG_PATA_VIA=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_PME=y -CONFIG_PCI_MMCONFIG=y -CONFIG_PCI_XEN=y -# CONFIG_PCWATCHDOG is not set -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_BAYTRAIL=y -CONFIG_PINCTRL_BROXTON=y -CONFIG_PINCTRL_CANNONLAKE=y -CONFIG_PINCTRL_CHERRYVIEW=y -CONFIG_PINCTRL_DENVERTON=y -CONFIG_PINCTRL_GEMINILAKE=y -CONFIG_PINCTRL_INTEL=y -# CONFIG_PINCTRL_LEWISBURG is not set -CONFIG_PINCTRL_SUNRISEPOINT=y -CONFIG_PM=y -# CONFIG_PMIC_OPREGION is not set -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_PNP=y -CONFIG_PNPACPI=y -# CONFIG_PNPBIOS is not set -CONFIG_PNP_DEBUG_MESSAGES=y -CONFIG_PREEMPT_NOTIFIERS=y -CONFIG_PROC_EVENTS=y -# CONFIG_PVPANIC is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_RAS=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_RELAY=y -CONFIG_RELOCATABLE=y -CONFIG_RESET_ATTACK_MITIGATION=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -# CONFIG_SAMSUNG_Q10 is not set -CONFIG_SATA_AHCI=y -CONFIG_SATA_VIA=y -CONFIG_SCHED_INFO=y -CONFIG_SCHED_SMT=y -CONFIG_SCSI_VIRTIO=y -CONFIG_SENSORS_CORETEMP=y -CONFIG_SENSORS_FAM15H_POWER=y -CONFIG_SENSORS_I5500=y -CONFIG_SENSORS_K10TEMP=y -CONFIG_SENSORS_K8TEMP=y -CONFIG_SENSORS_VIA_CPUTEMP=y -CONFIG_SERIAL_8250_PNP=y -CONFIG_SMP=y -# CONFIG_SURFACE_PRO3_BUTTON is not set -CONFIG_SWIOTLB=y -CONFIG_SWIOTLB_XEN=y -CONFIG_SYNC_FILE=y -CONFIG_SYS_HYPERVISOR=y -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_THERMAL_GOV_USER_SPACE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -# CONFIG_TOSHIBA_BT_RFKILL is not set -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UCS2_STRING=y -CONFIG_USB_STORAGE=y -CONFIG_USER_RETURN_NOTIFIER=y -CONFIG_VGACON_SOFT_SCROLLBACK=y -# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -CONFIG_VHOST=y -CONFIG_VHOST_NET=y -CONFIG_VIRTIO=y -CONFIG_VIRTIO_BALLOON=y -CONFIG_VIRTIO_BLK=y -CONFIG_VIRTIO_CONSOLE=y -CONFIG_VIRTIO_INPUT=y -CONFIG_VIRTIO_MMIO=y -# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set -CONFIG_VIRTIO_NET=y -CONFIG_VIRTIO_PCI=y -CONFIG_VIRTIO_PCI_LEGACY=y -CONFIG_VIRTUALIZATION=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WDT is not set -CONFIG_X86_32_SMP=y -CONFIG_X86_ACPI_CPUFREQ=y -# CONFIG_X86_ACPI_CPUFREQ_CPB is not set -CONFIG_X86_AMD_FREQ_SENSITIVITY=y -# CONFIG_X86_AMD_PLATFORM_DEVICE is not set -# CONFIG_X86_BIGSMP is not set -CONFIG_X86_CMOV=y -CONFIG_X86_CPUID=y -CONFIG_X86_DEBUGCTLMSR=y -# CONFIG_X86_E_POWERSAVER is not set -CONFIG_X86_INTEL_LPSS=y -CONFIG_X86_INTEL_PSTATE=y -CONFIG_X86_INTERNODE_CACHE_SHIFT=7 -CONFIG_X86_L1_CACHE_SHIFT=7 -# CONFIG_X86_LONGHAUL is not set -CONFIG_X86_MINIMUM_CPU_FAMILY=6 -CONFIG_X86_NEED_RELOCS=y -CONFIG_X86_PAE=y -# CONFIG_X86_PCC_CPUFREQ is not set -CONFIG_X86_PKG_TEMP_THERMAL=y -# CONFIG_X86_PMEM_LEGACY is not set -CONFIG_X86_PM_TIMER=y -# CONFIG_X86_POWERNOW_K8 is not set -CONFIG_X86_USE_PPRO_CHECKSUM=y -CONFIG_XEN=y -CONFIG_XENFS=y -CONFIG_XEN_ACPI=y -CONFIG_XEN_ACPI_PROCESSOR=y -CONFIG_XEN_AUTO_XLATE=y -# CONFIG_XEN_BACKEND is not set -CONFIG_XEN_BALLOON=y -CONFIG_XEN_BLKDEV_FRONTEND=y -CONFIG_XEN_COMPAT_XENFS=y -CONFIG_XEN_DEBUG_FS=y -CONFIG_XEN_DEV_EVTCHN=y -CONFIG_XEN_DOM0=y -CONFIG_XEN_FBDEV_FRONTEND=y -CONFIG_XEN_GNTDEV=y -CONFIG_XEN_GRANT_DEV_ALLOC=y -CONFIG_XEN_HAVE_PVMMU=y -CONFIG_XEN_HAVE_VPMU=y -CONFIG_XEN_NETDEV_FRONTEND=y -CONFIG_XEN_PCIDEV_FRONTEND=y -CONFIG_XEN_PRIVCMD=y -CONFIG_XEN_PV=y -CONFIG_XEN_PVH=y -CONFIG_XEN_PVHVM=y -CONFIG_XEN_PVHVM_SMP=y -CONFIG_XEN_PV_SMP=y -CONFIG_XEN_SAVE_RESTORE=y -CONFIG_XEN_SCSI_FRONTEND=y -CONFIG_XEN_SYMS=y -CONFIG_XEN_SYS_HYPERVISOR=y -CONFIG_XEN_WDT=y -CONFIG_XEN_XENBUS_FRONTEND=y -CONFIG_XPS=y -CONFIG_ZLIB_DEFLATE=y diff --git a/target/linux/x86/geode/config-4.19 b/target/linux/x86/geode/config-4.19 deleted file mode 100644 index 651c369178..0000000000 --- a/target/linux/x86/geode/config-4.19 +++ /dev/null @@ -1,135 +0,0 @@ -# CONFIG_3C515 is not set -CONFIG_8139CP=y -CONFIG_8139TOO=y -CONFIG_8139TOO_8129=y -CONFIG_8139TOO_PIO=y -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139_OLD_RX_RESET is not set -CONFIG_ACPI=y -CONFIG_ACPI_AC=y -# CONFIG_ACPI_BATTERY is not set -# CONFIG_ACPI_CMPC is not set -# CONFIG_ACPI_CONTAINER is not set -CONFIG_ACPI_CPU_FREQ_PSS=y -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DEBUGGER is not set -# CONFIG_ACPI_DOCK is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -CONFIG_ACPI_FAN=y -CONFIG_ACPI_HOTPLUG_IOAPIC=y -CONFIG_ACPI_I2C_OPREGION=y -CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_PROCESSOR_CSTATE=y -CONFIG_ACPI_PROCESSOR_IDLE=y -# CONFIG_ACPI_PROCFS_POWER is not set -CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SPCR_TABLE=y -CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y -CONFIG_ACPI_THERMAL=y -# CONFIG_ACPI_WMI is not set -CONFIG_ALIX=y -CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y -CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y -# CONFIG_ATA_PIIX is not set -CONFIG_CS5535_CLOCK_EVENT_SRC=y -CONFIG_CS5535_MFGPT=y -CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -# CONFIG_DPTF_POWER is not set -# CONFIG_EISA is not set -# CONFIG_EL3 is not set -CONFIG_GEODE_WDT=y -CONFIG_GEOS=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_ACPI=y -CONFIG_GPIO_CS5535=y -CONFIG_HAVE_ACPI_APEI=y -CONFIG_HAVE_ACPI_APEI_NMI=y -# CONFIG_HPET is not set -# CONFIG_HP_ACCEL is not set -CONFIG_HWMON=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_ALGOPCA=y -CONFIG_I2C_ALGOPCF=y -CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_MULTI_INSTANTIATE is not set -# CONFIG_INTEL_INT0002_VGPIO is not set -# CONFIG_INTEL_IPS is not set -# CONFIG_INTEL_MENLOW is not set -# CONFIG_INTEL_PMC_IPC is not set -# CONFIG_INTEL_SOC_DTS_THERMAL is not set -CONFIG_IOSF_MBI=y -# CONFIG_IOSF_MBI_DEBUG is not set -CONFIG_ISA=y -# CONFIG_ISAPNP is not set -CONFIG_ISA_BUS_API=y -# CONFIG_ISCSI_IBFT is not set -# CONFIG_ISCSI_IBFT_FIND is not set -# CONFIG_LANCE is not set -CONFIG_LEDS_GPIO=y -# CONFIG_M586MMX is not set -# CONFIG_MDA_CONSOLE is not set -CONFIG_MFD_CORE=y -CONFIG_MFD_CS5535=y -# CONFIG_MFD_INTEL_LPSS_ACPI is not set -CONFIG_MGEODEGX1=y -# CONFIG_MIXCOMWD is not set -CONFIG_NATSEMI=y -CONFIG_NET5501=y -CONFIG_NSC_GPIO=y -CONFIG_PATA_CS5520=y -CONFIG_PATA_CS5530=y -CONFIG_PATA_CS5535=y -CONFIG_PATA_CS5536=y -CONFIG_PATA_SC1200=y -CONFIG_PC8736x_GPIO=y -CONFIG_PCI_MMCONFIG=y -# CONFIG_PCWATCHDOG is not set -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_BAYTRAIL is not set -# CONFIG_PINCTRL_BROXTON is not set -# CONFIG_PINCTRL_CANNONLAKE is not set -# CONFIG_PINCTRL_CHERRYVIEW is not set -# CONFIG_PINCTRL_DENVERTON is not set -# CONFIG_PINCTRL_GEMINILAKE is not set -# CONFIG_PINCTRL_LEWISBURG is not set -# CONFIG_PINCTRL_SUNRISEPOINT is not set -# CONFIG_PMIC_OPREGION is not set -CONFIG_PNP=y -CONFIG_PNPACPI=y -# CONFIG_PNPBIOS is not set -CONFIG_PNP_DEBUG_MESSAGES=y -# CONFIG_PVPANIC is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_RTC_I2C_AND_SPI=y -# CONFIG_SAMSUNG_Q10 is not set -CONFIG_SC1200_WDT=y -CONFIG_SCx200_ACB=y -CONFIG_SCx200_WDT=y -CONFIG_SENSORS_LM90=y -CONFIG_SERIAL_8250_PNP=y -# CONFIG_SURFACE_PRO3_BUTTON is not set -# CONFIG_TOSHIBA_BT_RFKILL is not set -# CONFIG_USB_UHCI_HCD is not set -CONFIG_VGACON_SOFT_SCROLLBACK=y -# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -CONFIG_VIA_RHINE=y -CONFIG_VIA_RHINE_MMIO=y -# CONFIG_WDT is not set -# CONFIG_X86_ACPI_CPUFREQ is not set -# CONFIG_X86_AMD_PLATFORM_DEVICE is not set -CONFIG_X86_CPUID=y -CONFIG_X86_DEBUGCTLMSR=y -# CONFIG_X86_E_POWERSAVER is not set -CONFIG_X86_INTEL_LPSS=y -# CONFIG_X86_LONGHAUL is not set -# CONFIG_X86_MCE is not set -# CONFIG_X86_PCC_CPUFREQ is not set -CONFIG_X86_PM_TIMER=y -CONFIG_X86_REBOOTFIXUPS=y diff --git a/target/linux/x86/legacy/config-4.19 b/target/linux/x86/legacy/config-4.19 deleted file mode 100644 index 2e5199185a..0000000000 --- a/target/linux/x86/legacy/config-4.19 +++ /dev/null @@ -1,221 +0,0 @@ -# CONFIG_3C515 is not set -CONFIG_ACPI=y -CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y -CONFIG_ACPI_BUTTON=y -# CONFIG_ACPI_CMPC is not set -# CONFIG_ACPI_CONTAINER is not set -CONFIG_ACPI_CPU_FREQ_PSS=y -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DEBUGGER is not set -# CONFIG_ACPI_DOCK is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -# CONFIG_ACPI_FAN is not set -CONFIG_ACPI_HOTPLUG_IOAPIC=y -# CONFIG_ACPI_I2C_OPREGION is not set -CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_PROCESSOR_CSTATE=y -CONFIG_ACPI_PROCESSOR_IDLE=y -# CONFIG_ACPI_PROCFS_POWER is not set -CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SPCR_TABLE=y -CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y -CONFIG_ACPI_THERMAL=y -CONFIG_ACPI_VIDEO=y -# CONFIG_ACPI_WMI is not set -CONFIG_AGP=y -# CONFIG_AGP_ALI is not set -# CONFIG_AGP_AMD is not set -# CONFIG_AGP_AMD64 is not set -# CONFIG_AGP_ATI is not set -# CONFIG_AGP_EFFICEON is not set -CONFIG_AGP_INTEL=y -# CONFIG_AGP_NVIDIA is not set -# CONFIG_AGP_SIS is not set -# CONFIG_AGP_SWORKS is not set -# CONFIG_AGP_VIA is not set -CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y -CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_CDROM=y -CONFIG_CHASH=y -# CONFIG_CHASH_SELFTEST is not set -# CONFIG_CHASH_STATS is not set -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_DMA_SHARED_BUFFER=y -# CONFIG_DPTF_POWER is not set -CONFIG_DRM=y -CONFIG_DRM_AMDGPU=y -# CONFIG_DRM_AMDGPU_CIK is not set -# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set -# CONFIG_DRM_AMDGPU_SI is not set -# CONFIG_DRM_AMDGPU_USERPTR is not set -# CONFIG_DRM_AMD_ACP is not set -# CONFIG_DRM_AMD_DC is not set -CONFIG_DRM_BOCHS=y -CONFIG_DRM_BRIDGE=y -# CONFIG_DRM_DEBUG_SELFTEST is not set -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_GMA500 is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -CONFIG_DRM_I915=y -# CONFIG_DRM_I915_ALPHA_SUPPORT is not set -CONFIG_DRM_I915_CAPTURE_ERROR=y -CONFIG_DRM_I915_COMPRESS_ERROR=y -# CONFIG_DRM_I915_DEBUG is not set -# CONFIG_DRM_I915_DEBUG_GUC is not set -# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set -# CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set -# CONFIG_DRM_I915_SELFTEST is not set -# CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set -# CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set -CONFIG_DRM_I915_USERPTR=y -# CONFIG_DRM_I915_WERROR is not set -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -CONFIG_DRM_RADEON=y -# CONFIG_DRM_RADEON_USERPTR is not set -CONFIG_DRM_SCHED=y -CONFIG_DRM_TTM=y -# CONFIG_DRM_VKMS is not set -# CONFIG_DRM_VMWGFX is not set -# CONFIG_EISA is not set -# CONFIG_EL3 is not set -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_I810 is not set -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_VESA is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -CONFIG_FONT_SUPPORT=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_HAVE_ACPI_APEI=y -CONFIG_HAVE_ACPI_APEI_NMI=y -CONFIG_HDMI=y -CONFIG_HID_BATTERY_STRENGTH=y -# CONFIG_HIGHMEM4G is not set -CONFIG_HPET=y -CONFIG_HPET_MMAP=y -# CONFIG_HP_ACCEL is not set -CONFIG_HWMON=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_MULTI_INSTANTIATE is not set -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INTEL_GTT=y -CONFIG_INTEL_IDLE=y -# CONFIG_INTEL_IPS is not set -# CONFIG_INTEL_MENLOW is not set -# CONFIG_INTEL_PMC_IPC is not set -# CONFIG_INTEL_SOC_DTS_THERMAL is not set -CONFIG_INTERVAL_TREE=y -CONFIG_IOSF_MBI=y -# CONFIG_IOSF_MBI_DEBUG is not set -CONFIG_ISA=y -CONFIG_ISAPNP=y -CONFIG_ISA_BUS_API=y -# CONFIG_ISCSI_IBFT is not set -# CONFIG_ISCSI_IBFT_FIND is not set -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_LANCE is not set -# CONFIG_LCD_CLASS_DEVICE is not set -# CONFIG_MDA_CONSOLE is not set -CONFIG_MFD_CORE=y -CONFIG_MFD_INTEL_LPSS=y -CONFIG_MFD_INTEL_LPSS_ACPI=y -# CONFIG_MIXCOMWD is not set -CONFIG_MMU_NOTIFIER=y -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -# CONFIG_MOUSE_PS2_BYD is not set -# CONFIG_MOUSE_PS2_CYPRESS is not set -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SMBUS=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -CONFIG_NOHIGHMEM=y -CONFIG_NO_HZ=y -CONFIG_PATA_AMD=y -CONFIG_PATA_ATIIXP=y -CONFIG_PATA_LEGACY=y -CONFIG_PATA_MPIIX=y -CONFIG_PATA_OLDPIIX=y -CONFIG_PATA_PLATFORM=y -CONFIG_PATA_SC1200=y -CONFIG_PATA_VIA=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCI_MMCONFIG=y -# CONFIG_PCWATCHDOG is not set -# CONFIG_PMIC_OPREGION is not set -CONFIG_PNP=y -CONFIG_PNPACPI=y -# CONFIG_PNPBIOS is not set -CONFIG_PNP_DEBUG_MESSAGES=y -# CONFIG_PVPANIC is not set -CONFIG_RAS=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_RELAY=y -CONFIG_RTC_I2C_AND_SPI=y -# CONFIG_SAMSUNG_Q10 is not set -CONFIG_SATA_AHCI=y -CONFIG_SERIAL_8250_PNP=y -# CONFIG_SURFACE_PRO3_BUTTON is not set -CONFIG_SYNC_FILE=y -# CONFIG_TOSHIBA_BT_RFKILL is not set -CONFIG_USB_STORAGE=y -CONFIG_VGACON_SOFT_SCROLLBACK=y -# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -# CONFIG_WDT is not set -CONFIG_X86_ACPI_CPUFREQ=y -# CONFIG_X86_ACPI_CPUFREQ_CPB is not set -# CONFIG_X86_AMD_FREQ_SENSITIVITY is not set -# CONFIG_X86_AMD_PLATFORM_DEVICE is not set -# CONFIG_X86_E_POWERSAVER is not set -# CONFIG_X86_INTEL_LPSS is not set -# CONFIG_X86_LONGHAUL is not set -# CONFIG_X86_PAE is not set -# CONFIG_X86_PCC_CPUFREQ is not set -CONFIG_X86_PM_TIMER=y -# CONFIG_X86_POWERNOW_K8 is not set -CONFIG_ZLIB_DEFLATE=y diff --git a/target/linux/x86/patches-4.19/011-tune_lzma_options.patch b/target/linux/x86/patches-4.19/011-tune_lzma_options.patch deleted file mode 100644 index 09d3c6c7ce..0000000000 --- a/target/linux/x86/patches-4.19/011-tune_lzma_options.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -325,7 +325,7 @@ cmd_bzip2 = (cat $(filter-out FORCE,$^) - - quiet_cmd_lzma = LZMA $@ - cmd_lzma = (cat $(filter-out FORCE,$^) | \ -- lzma e -d20 -lc1 -lp2 -pb2 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ -+ lzma e -lc8 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ - (rm -f $@ ; false) - - quiet_cmd_lzo = LZO $@ ---- a/arch/x86/include/asm/boot.h -+++ b/arch/x86/include/asm/boot.h -@@ -24,7 +24,7 @@ - # error "Invalid value for CONFIG_PHYSICAL_ALIGN" - #endif - --#ifdef CONFIG_KERNEL_BZIP2 -+#if defined(CONFIG_KERNEL_BZIP2) || defined(CONFIG_KERNEL_LZMA) - # define BOOT_HEAP_SIZE 0x400000 - #else /* !CONFIG_KERNEL_BZIP2 */ - # define BOOT_HEAP_SIZE 0x10000 diff --git a/target/linux/x86/patches-4.19/100-fix_cs5535_clockevt.patch b/target/linux/x86/patches-4.19/100-fix_cs5535_clockevt.patch deleted file mode 100644 index c3a7fce9ce..0000000000 --- a/target/linux/x86/patches-4.19/100-fix_cs5535_clockevt.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/clocksource/cs5535-clockevt.c -+++ b/drivers/clocksource/cs5535-clockevt.c -@@ -130,7 +130,8 @@ static irqreturn_t mfgpt_tick(int irq, v - cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, - MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2); - -- cs5535_clockevent.event_handler(&cs5535_clockevent); -+ if (cs5535_clockevent.event_handler) -+ cs5535_clockevent.event_handler(&cs5535_clockevent); - return IRQ_HANDLED; - } - diff --git a/target/linux/x86/patches-4.19/200-pcengines-apu2-reboot.patch b/target/linux/x86/patches-4.19/200-pcengines-apu2-reboot.patch deleted file mode 100644 index bc57806c74..0000000000 --- a/target/linux/x86/patches-4.19/200-pcengines-apu2-reboot.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/x86/kernel/reboot.c -+++ b/arch/x86/kernel/reboot.c -@@ -477,6 +477,16 @@ static const struct dmi_system_id reboot - }, - }, - -+ /* PC Engines */ -+ { /* Handle problems with rebooting on PC Engines apu2 */ -+ .callback = set_pci_reboot, -+ .ident = "PC Engines apu2", -+ .matches = { -+ DMI_MATCH(DMI_BOARD_VENDOR, "PC Engines"), -+ DMI_MATCH(DMI_BOARD_NAME, "apu2"), -+ }, -+ }, -+ - /* Sony */ - { /* Handle problems with rebooting on Sony VGN-Z540N */ - .callback = set_bios_reboot, diff --git a/target/linux/x86/patches-4.19/800-hwmon-w83627ehf-dont-claim-nct677x.patch b/target/linux/x86/patches-4.19/800-hwmon-w83627ehf-dont-claim-nct677x.patch deleted file mode 100644 index ef2e1333e7..0000000000 --- a/target/linux/x86/patches-4.19/800-hwmon-w83627ehf-dont-claim-nct677x.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/drivers/hwmon/w83627ehf.c -+++ b/drivers/hwmon/w83627ehf.c -@@ -2717,8 +2717,8 @@ static int __init w83627ehf_find(int sio - static const char sio_name_W83627UHG[] __initconst = "W83627UHG"; - static const char sio_name_W83667HG[] __initconst = "W83667HG"; - static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B"; -- static const char sio_name_NCT6775[] __initconst = "NCT6775F"; -- static const char sio_name_NCT6776[] __initconst = "NCT6776F"; -+/* static const char sio_name_NCT6775[] __initconst = "NCT6775F"; -+ static const char sio_name_NCT6776[] __initconst = "NCT6776F"; */ - - u16 val; - const char *sio_name; -@@ -2762,14 +2762,14 @@ static int __init w83627ehf_find(int sio - sio_data->kind = w83667hg_b; - sio_name = sio_name_W83667HG_B; - break; -- case SIO_NCT6775_ID: -+/* case SIO_NCT6775_ID: - sio_data->kind = nct6775; - sio_name = sio_name_NCT6775; - break; - case SIO_NCT6776_ID: - sio_data->kind = nct6776; - sio_name = sio_name_NCT6776; -- break; -+ break; */ - default: - if (val != 0xffff) - pr_debug("unsupported chip ID: 0x%04x\n", val); diff --git a/target/linux/zynq/config-4.19 b/target/linux/zynq/config-4.19 deleted file mode 100644 index 1581521d89..0000000000 --- a/target/linux/zynq/config-4.19 +++ /dev/null @@ -1,650 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_ALTERA_PR_IP_CORE is not set -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=1024 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_VEXPRESS=y -CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y -# CONFIG_ARCH_VEXPRESS_SPC is not set -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_ZYNQ=y -CONFIG_ARM=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_CCI=y -CONFIG_ARM_CCI400_COMMON=y -CONFIG_ARM_CCI400_PMU=y -CONFIG_ARM_CCI_PMU=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_ERRATA_643719=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_754327=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GLOBAL_TIMER=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_ARM_PMU=y -# CONFIG_ARM_SMMU is not set -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_TIMER_SP804=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ARM_ZYNQ_CPUIDLE=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -# CONFIG_AXI_DMAC is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_BLK_MQ_PCI=y -CONFIG_BOUNCE=y -CONFIG_BUILD_BIN2C=y -CONFIG_CACHE_L2X0=y -CONFIG_CADENCE_TTC_TIMER=y -CONFIG_CADENCE_WATCHDOG=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_VERSATILE=y -CONFIG_CLK_SP810=y -CONFIG_CLK_VEXPRESS_OSC=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=16 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_AXI_CLKGEN is not set -CONFIG_COMMON_CLK_SI570=y -CONFIG_COMMON_CLK_VERSATILE=y -CONFIG_CONNECTOR=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_COREDUMP=y -# CONFIG_CPUFREQ_DT is not set -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_USER is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_DMADEVICES=y -CONFIG_DMA_CMA=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DRM=y -CONFIG_DRM_BRIDGE=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -CONFIG_DRM_KMS_FB_HELPER=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_PANEL=y -CONFIG_DRM_PANEL_BRIDGE=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y -# CONFIG_DRM_TVE200 is not set -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_E1000E=y -CONFIG_EDAC=y -CONFIG_EDAC_ATOMIC_SCRUB=y -# CONFIG_EDAC_DEBUG is not set -CONFIG_EDAC_LEGACY_SYSFS=y -CONFIG_EDAC_SUPPORT=y -# CONFIG_EDAC_SYNOPSYS is not set -CONFIG_EEPROM_AT24=y -CONFIG_EEPROM_AT25=y -CONFIG_ELF_CORE=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FB=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_CMDLINE=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_XILINX is not set -CONFIG_FHANDLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FPGA=y -CONFIG_FPGA_BRIDGE=y -# CONFIG_FPGA_DFL is not set -# CONFIG_FPGA_MGR_ALTERA_CVP is not set -# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set -# CONFIG_FPGA_MGR_ICE40_SPI is not set -# CONFIG_FPGA_MGR_MACHXO2_SPI is not set -# CONFIG_FPGA_MGR_XILINX_SPI is not set -CONFIG_FPGA_MGR_ZYNQ_FPGA=y -CONFIG_FPGA_REGION=y -CONFIG_FREEZER=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_ZYNQ=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HDMI=y -CONFIG_HID=y -CONFIG_HID_GENERIC=y -CONFIG_HID_MICROSOFT=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HOTPLUG_CPU=y -CONFIG_HWMON=y -CONFIG_HW_CONSOLE=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CADENCE=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_ICST=y -CONFIG_IIO=y -CONFIG_IIO_BUFFER=y -CONFIG_IIO_KFIFO_BUF=y -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_TRIGGERED_BUFFER=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_KEYBOARD=y -# CONFIG_INPUT_MISC is not set -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_POLLDEV=y -CONFIG_INPUT_SPARSEKMAP=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -CONFIG_IOMMU_SUPPORT=y -CONFIG_IOSCHED_CFQ=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_RARP=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_ISDN is not set -CONFIG_JBD2=y -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_MODE_NEON is not set -# CONFIG_KERNEL_XZ is not set -CONFIG_KEYBOARD_ATKBD=y -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_GPIO_POLLED=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGER_BACKLIGHT=y -CONFIG_LEDS_TRIGGER_CAMERA=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_NETDEV is not set -CONFIG_LEDS_TRIGGER_ONESHOT=y -CONFIG_LEDS_TRIGGER_TRANSIENT=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_MACB=y -# CONFIG_MACB_PCI is not set -CONFIG_MACB_USE_HWSTAMP=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -# CONFIG_MDIO_GPIO is not set -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_SYSCON=y -CONFIG_MFD_VEXPRESS_SYSREG=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_OF_ARASAN=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MODULE_STRIPPED is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_BYD=y -CONFIG_MOUSE_PS2_CYPRESS=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_FOCALTECH=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SMBUS=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -CONFIG_MTD_SPLIT_FIRMWARE=y -# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -# CONFIG_NET_VENDOR_CIRRUS is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NI_XGE_MANAGEMENT_ENET is not set -CONFIG_NLS=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NO_IOPORT_MAP=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -# CONFIG_OF_FPGA_REGION is not set -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PCI=y -CONFIG_PCIE_XILINX=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -# CONFIG_PCI_V3_SEMI is not set -CONFIG_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PINCTRL_ZYNQ=y -CONFIG_PL310_ERRATA_588369=y -CONFIG_PL310_ERRATA_727915=y -CONFIG_PL310_ERRATA_753970=y -CONFIG_PL310_ERRATA_769419=y -CONFIG_PL330_DMA=y -CONFIG_PLAT_VERSATILE=y -CONFIG_PLUGIN_HOSTCC="g++" -CONFIG_PM=y -CONFIG_PMBUS=y -CONFIG_PM_CLK=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_VEXPRESS=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PROC_EVENTS=y -# CONFIG_PROC_STRIPPED is not set -CONFIG_PTP_1588_CLOCK=y -CONFIG_R8169=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REALTEK_PHY=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VEXPRESS is not set -CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_ZYNQ=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_PCF8563=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SCHED_MC=y -CONFIG_SCHED_SMT=y -CONFIG_SENSORS_PMBUS=y -CONFIG_SENSORS_UCD9000=y -CONFIG_SENSORS_UCD9200=y -# CONFIG_SERIAL_8250 is not set -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -CONFIG_SERIO=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_SERPORT=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_CADENCE=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_XILINX=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -# CONFIG_STAGING is not set -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYNC_FILE=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_TCP_CONG_ADVANCED is not set -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -# CONFIG_TMPFS_XATTR is not set -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UIO=y -# CONFIG_UIO_AEC is not set -# CONFIG_UIO_CIF is not set -# CONFIG_UIO_DMEM_GENIRQ is not set -# CONFIG_UIO_MF624 is not set -# CONFIG_UIO_NETX is not set -# CONFIG_UIO_PCI_GENERIC is not set -CONFIG_UIO_PDRV_GENIRQ=y -# CONFIG_UIO_PRUSS is not set -# CONFIG_UIO_SERCOS3 is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_OF=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_EHCI_TT_NEWSCHED is not set -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_XILINX=y -CONFIG_USB_HID=y -CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_OTG=y -CONFIG_USB_OTG_FSM=y -CONFIG_USB_PHY=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USB_ULPI_VIEWPORT=y -# CONFIG_USERIO is not set -CONFIG_USE_OF=y -CONFIG_VEXPRESS_CONFIG=y -CONFIG_VEXPRESS_SYSCFG=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VGA_ARB=y -CONFIG_VGA_ARB_MAX_GPUS=16 -CONFIG_VITESSE_PHY=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_WATCHDOG_CORE=y -# CONFIG_WEXT_PRIV is not set -# CONFIG_WEXT_SPY is not set -# CONFIG_WIRELESS_EXT is not set -# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set -CONFIG_XILINX_EMACLITE=y -# CONFIG_XILINX_PR_DECOUPLER is not set -CONFIG_XILINX_WATCHDOG=y -CONFIG_XILINX_XADC=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_X86=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -- cgit v1.2.3