From c30220d458c0771013f21a16148baa4ea723027b Mon Sep 17 00:00:00 2001 From: Pawel Dembicki Date: Mon, 9 Mar 2020 21:16:43 +0100 Subject: ipq40xx: add support for Cell C RTL30VW Cell C RTL30VW is a LTE router with tho gigabit ethernets and integrated QMI mPCIE modem. This is stripped version of ASKEY RTL0030VW. Hardware: Specification: -CPU: IPQ4019 -RAM: 256MB -Flash: NAND 128MB + NOR 16MB -WiFi: Integrated bgn/ac -LTE: mPCIe card (Modem chipset MDM9230) -LAN: 2 Gigabit Ports -USB: 2x USB2.0 -Serial console: RJ-45 115200 8n1 -Unsupported VoIP Known issues: None so far. Instruction install: There are two methods: Factory web-gui and serial + tftp. Web-gui: 1. Apply factory image via stock web-gui. Serial + initramfs: 1. Rename OpenWrt initramfs image to "image" 2. Connect serial console (115200,8n1) 3. Set IP to different than 192.168.1.11, but 24 bit mask, eg. 192.168.1.4. 4. U-Boot commands: sf probe && sf read 0x80000000 0x180000 0x10000 setenv serverip 192.168.1.4 set fdt_high 0x85000000 tftpboot 0x84000000 image bootm 0x84000000 5. Install sysupgrade image via "sysupgrade -n" Back to stock: All is needed is swap 0x4c byte in mtd8 from 0 to 1 or 1 to 0, do firstboot and factory reset with OFW: 1. read mtd8: dd if=/dev/mtd8 of=/tmp/mtd8 2. go to tmp: cd /tmp/ 3. write first part of partition: dd if=mtd8 of=mtd8.new bs=1 count=76 4. check which layout uses bootloader: cat /proc/mtd 5a. If first are kernel_1 and rootfs_1 write 0: echo -n -e '\x00' >> mtd8.new 5b. If first are kernel and rootfs write 1: echo -n -e '\x01' >> mtd8.new 6. fill with rest of data: dd if=mtd8 bs=1 skip=77 >> mtd8.new 7. CHECK IF mtd8.new HAVE CHANGED ONLY ONE BYTE! e.g with: hexdump mtd8.new 8. write new mtd8 to flash: mtd write mtd8.new /dev/mtd8 9. do firstboot 10.reboot 11. Do back to factory defaults in OFW GUI. Based on work: Cezary Jackiewicz Signed-off-by: Pawel Dembicki --- .../arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts | 385 +++++++++++++++++++++ 1 file changed, 385 insertions(+) create mode 100644 target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts (limited to 'target/linux/ipq40xx/files-5.4') diff --git a/target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts b/target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts new file mode 100644 index 0000000000..2f17424e55 --- /dev/null +++ b/target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts @@ -0,0 +1,385 @@ +// SPDX-License-Identifier: ISC +// Copyright (c) 2015, The Linux Foundation. All rights reserved. +// Copyright (c) 2019, Cezary Jackiewicz . +// Copyright (c) 2020, Pawel Dembicki . + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Cell C RTL30VW"; + compatible = "cellc,rtl30vw"; + + aliases { + led-boot = &led_power_blue; + led-failsafe = &led_power_red; + led-running = &led_power_blue; + led-upgrade = &led_power_red; + }; + + chosen { + bootargs-append = "ubi.mtd=ubifs root=/dev/ubiblock0_0 rootfstype=squashfs ro"; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + num-chipselects = <1>; + + mosi-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + cs-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + sck-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + + led_gpio: led_gpio@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <2>; + spi-max-frequency = <1000000>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power_blue: power_blue { + gpios = <&led_gpio 0 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:power"; + default-state = "on"; + }; + + led_power_red: power_red { + gpios = <&led_gpio 1 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:red:power"; + }; + + tp28 { + gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>; + label = "rtl30vw:ext:tp28"; + default-state = "keep"; + }; + + tp27 { + gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>; + label = "rtl30vw:ext:tp27"; + default-state = "keep"; + }; + + wlan2g { + gpios = <&led_gpio 8 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:wlan2g"; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + gpios = <&led_gpio 9 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:wlan5g"; + linux,default-trigger = "phy1tpt"; + }; + + wps { + gpios = <&led_gpio 10 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:wps"; + }; + + voip { + gpios = <&led_gpio 11 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:voip"; + }; + + s1 { + gpios = <&led_gpio 12 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:s1"; + }; + + s2 { + gpios = <&led_gpio 13 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:s2"; + }; + + s3 { + gpios = <&led_gpio 14 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:s3"; + }; + + s4 { + gpios = <&led_gpio 15 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:blue:s4"; + }; + + signal { + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + label = "rtl30vw:red:signal"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + ess-switch@c000000 { + status = "okay"; + }; + + edma@c080000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + /*"n25q128a11" is required for proper nand recognition in u-boot. */ + compatible = "jedec,spi-nor", "n25q128a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x10000>; + read-only; + }; + + partition@180000 { + label = "0:BOOTCONFIG"; + reg = <0x180000 0x10000>; + read-only; + }; + }; + }; + + flash@1 { + /* + * Factory U-boot looks in 0:BOOTCONFIG partition for active + * partitions settings and mangle partition config. So kernel + * /kernel_1 and rootfs/rootfs_1 pairs can be swaped. + * It isn't a problem but we never can be sure where OFW put + * factory images. "spinand,mt29f" value is required for proper + * nand recognition in u-boot. + */ + compatible = "spi-nand","spinand,mt29f"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x400000>; + }; + + partition@400000 { + label = "rootfs"; + reg = <0x400000 0x2000000>; + }; + + partition@2400000 { + label = "kernel_1"; + reg = <0x2400000 0x400000>; + }; + + partition@2800000 { + label = "rootfs_1"; + reg = <0x2800000 0x2000000>; + }; + + partition@4800000 { + label = "ubifs"; + reg = <0x4800000 0x3800000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "cellc,rtl30vw"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "cellc,rtl30vw"; +}; -- cgit v1.2.3