From ca2d0c15cc9984515e4e262f8af331e7b38ce015 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Thu, 27 Nov 2014 16:24:32 +0000 Subject: cns3xxx: add experimental 3.18 support Signed-off-by: Felix Fietkau SVN-Revision: 43406 --- target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch (limited to 'target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch') diff --git a/target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch b/target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch new file mode 100644 index 0000000000..45c73cb756 --- /dev/null +++ b/target/linux/cns3xxx/patches-3.18/030-pcie_clock.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/mach-cns3xxx/pcie.c ++++ b/arch/arm/mach-cns3xxx/pcie.c +@@ -331,8 +331,6 @@ void __init cns3xxx_pcie_init_late(void) + "imprecise external abort"); + + for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { +- cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i)); +- cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i)); + cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); + cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); + pci_common_init(&cns3xxx_pcie[i].hw_pci); -- cgit v1.2.3