From fbbad9a9a629b388626b477e6cd692c160f63fb3 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Thu, 1 Apr 2021 01:20:45 +0200 Subject: ath79: force SGMII SerDes mode to MAC operation The mode on the SGMII SerDes on the QCA9563 is 1000 Base-X by default. This only allows for 1000 Mbit/s links, however when used with an SGMII PHY in 100 Mbit/s link mode, the link remains dead. This strictly has nothing to do with the SerDes calibration, however it is done at the same point in the QCA reference U-Boot which is the blueprint for everything happening here. As the current state is more or less a hack, this should be fine. This fixes the issues outlined above on a TP-Link EAP-225 Outdoor. Reported-by: Tom Herbers Tested-by: Tom Herbers Signed-off-by: David Bauer --- target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch (limited to 'target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch') diff --git a/target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch b/target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch new file mode 100644 index 0000000000..bf7cbf2716 --- /dev/null +++ b/target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch @@ -0,0 +1,9 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1376,5 +1376,6 @@ + + #define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 + #define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 ++#define QCA956X_SGMII_CONFIG_MODE_CTRL_SGMII_MAC 0x2 + + #endif /* __ASM_MACH_AR71XX_REGS_H */ -- cgit v1.2.3