From b14e529dd7f10646e3f9a6b36cd3d93fd6c36dc8 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Tue, 10 Dec 2019 13:52:02 +0300 Subject: ath79: add D-Link DIR-615 E4 Specifications: - FCC ID: KA2IR615E3 - SoC: MIPS32 24K 400 MHz Atheros AR7240 - RAM: 32 MiB DDR SDRAM ESMT M13S2561616A-5T - Flash: 4 MiB NOR SPI Macronix MX25L3208E - Wireless: AR9287 2.4 GHz 802.11n 2T2R, 2x RP-SMA connectors - Ethernet: 5x 100BASE-TX Fast Ethernet - LEDs: 9x GPIO, 1x ath9k - Buttons: 2x tactile switches - UART: 3.3 V, 115200 8n1 - USB: simple hardware modification required, 1x USB 1.1 Full Speed Partitioning notes: Vendor firmware (based on CameoAP99) defines two additional partitions: "mac" @0x3b0000, size 0x10000 and "lp" @0x3c0000, size 0x30000. The "mac" partition stores LAN MAC address and hardware board name. However, the vendor firmware uses addresses from "nvram" partition, and the board name is used only for informational purposes in the Web interface (included in the pages' header), not affecting the firmware image check. The "lp" partition is supposed to contain a "language pack" (which can be used to add an additional language support to the Web interface) and is flashed separately, using the vendor firmware upgrade page. Since these partitions are absolutely useless for OpenWrt and overwriting them doesn't prevent downgrading to obsolete vendor firmware, this patch appends the valueable space to "firmware". Installation instructions: - Upgrade from OpenWrt ar71xx with "sysupgrade -f -n" or - Upload as a firmware update via the vendor Web-interface or - Connect UART and use "loady" to upload and run OpenWrt initramfs image, then sysupgrade from it (TFTP client doesn't work) or - Before powering up hold "reset" button and keep it pressed for about 15 seconds after, then access fail safe Web server on 192.168.0.1 (the old uIP TCP/IP protocol stack is not compatible with modern Linux, the kernel, so you'll need to use some other OS to do this). Can be performed without a Web-browser too: curl http://192.168.0.1/cgi/index \ -F Send=@openwrt-ath79-tiny-dlink_dir-615-e4-squashfs-factory.bin Signed-off-by: Paul Fertser --- target/linux/ath79/dts/ar7240_dlink_dir-615-e4.dts | 170 +++++++++++++++++++++ 1 file changed, 170 insertions(+) create mode 100644 target/linux/ath79/dts/ar7240_dlink_dir-615-e4.dts (limited to 'target/linux/ath79/dts') diff --git a/target/linux/ath79/dts/ar7240_dlink_dir-615-e4.dts b/target/linux/ath79/dts/ar7240_dlink_dir-615-e4.dts new file mode 100644 index 0000000000..537a99b8db --- /dev/null +++ b/target/linux/ath79/dts/ar7240_dlink_dir-615-e4.dts @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "ar7240.dtsi" + +/ { + model = "D-Link DIR-615 E4"; + compatible = "dlink,dir-615-e4", "qca,ar7240"; + + aliases { + led-boot = &led_power_amber; + led-failsafe = &led_power_amber; + led-running = &led_power_green; + led-upgrade = &led_power_amber; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&switch_led_pins>; + + led_power_green: power_green { + label = "d-link:green:power"; + gpios = <&gpio 6 GPIO_ACTIVE_HIGH>; + }; + + led_power_amber: power_amber { + label = "d-link:amber:power"; + gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + }; + + wps { + label = "d-link:blue:wps"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + }; + + lan1 { + label = "d-link:green:lan1"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + }; + + lan2 { + label = "d-link:green:lan2"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + lan3 { + label = "d-link:green:lan3"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + lan4 { + label = "d-link:green:lan4"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + wan_amber { + label = "d-link:amber:wan"; + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + }; + + wan_green { + label = "d-link:green:wan"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + }; + + ath9k-leds { + compatible = "gpio-leds"; + + wlan { + label = "d-link:green:wlan"; + gpios = <&ath9k 1 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + }; +}; + +&spi { + status = "okay"; + + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <33000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x30000>; + label = "u-boot"; + read-only; + }; + + partition@30000 { + reg = <0x30000 0x10000>; + label = "nvram"; + read-only; + }; + + partition@40000 { + compatible = "denx,uimage"; + reg = <0x40000 0x3b0000>; + label = "firmware"; + }; + + partition@3f0000 { + reg = <0x3f0000 0x10000>; + label = "art"; + read-only; + }; + }; + }; +}; + +ð0 { + status = "okay"; +}; + +ð1 { + status = "okay"; +}; + +&pcie { + status = "okay"; + + ath9k: wifi@0,0 { + compatible = "pci168c,002b"; + reg = <0x0000 0 0 0 0>; + qca,no-eeprom; + #gpio-cells = <2>; + gpio-controller; + }; +}; + +&pinmux { + switch_led_pins: pinmux_switch_led_pins { + pinctrl-single,bits = <0x0 0x0 0xf8>; + }; +}; + +&uart { + status = "okay"; +}; -- cgit v1.2.3