From 66eb88edb66d49939bda444ff36ea4bf0aaf9ae1 Mon Sep 17 00:00:00 2001 From: Tobias Schramm Date: Wed, 1 Jan 2020 10:01:48 +0100 Subject: ath79: add support for Ubiquiti EdgeSwitch/ToughSwitch 5XP The Ubiquiti ToughSwitch 5XP is a 5-port PoE Gigabit switch with a single Fast-Ethernet management port. It supports both 24V passive PoE out on all five ports. Flash: 8 MB RAM: 64 MB SoC: AR7242 Switch: ar8327 USB: 1x USB 2.0 Ethernet: 5x GbE, 1x FE Installation of the firmware is possible either via serial + tftpboot or the factory firmware update function via webinterface. By default the single Fast-Ethernet port labeled "MGMT" is configured as the WAN port. Thus access to the device is only possible via the five switch ports. Serial: 3v3 115200 8n1 The serial header is located in the lower left corner of the switches PCB: ``` | | | | o | o RX | o TX | o GND | | ++ +-++-+ ++ ++ + +--+ ++ +--++--++--+ ``` Signed-off-by: Tobias Schramm [remove ubnt,sw compatible - fix spelling - wrap commit message - remove superfluous phy-mode property] Signed-off-by: David Bauer --- .../linux/ath79/dts/ar7242_ubnt_edgeswitch-5xp.dts | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 target/linux/ath79/dts/ar7242_ubnt_edgeswitch-5xp.dts (limited to 'target/linux/ath79/dts/ar7242_ubnt_edgeswitch-5xp.dts') diff --git a/target/linux/ath79/dts/ar7242_ubnt_edgeswitch-5xp.dts b/target/linux/ath79/dts/ar7242_ubnt_edgeswitch-5xp.dts new file mode 100644 index 0000000000..f524b2e88e --- /dev/null +++ b/target/linux/ath79/dts/ar7242_ubnt_edgeswitch-5xp.dts @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "ar7242_ubnt_sw.dtsi" + +/ { + compatible = "ubnt,edgeswitch-5xp", "qca,ar7242"; + model = "Ubiquiti EdgeSwitch 5XP"; + + gpio-export { + compatible = "gpio-export"; + + poe_24v_port1 { + gpio-export,name = "ubnt:24v-poe:port1"; + gpio-export,output = <0>; + gpios = <&gpio_hc595 1 GPIO_ACTIVE_HIGH>; + }; + + poe_24v_port2 { + gpio-export,name = "ubnt:24v-poe:port2"; + gpio-export,output = <0>; + gpios = <&gpio_hc595 3 GPIO_ACTIVE_HIGH>; + }; + + poe_24v_port3 { + gpio-export,name = "ubnt:24v-poe:port3"; + gpio-export,output = <0>; + gpios = <&gpio_hc595 5 GPIO_ACTIVE_HIGH>; + }; + + poe_24v_port4 { + gpio-export,name = "ubnt:24v-poe:port4"; + gpio-export,output = <0>; + gpios = <&gpio_hc595 7 GPIO_ACTIVE_HIGH>; + }; + + poe_24v_port5 { + gpio-export,name = "ubnt:24v-poe:port5"; + gpio-export,output = <0>; + gpios = <&gpio_hc595 9 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-switch@0 { + compatible = "qca,ar8327"; + reg = <0x0>; + + qca,ar8327-initvals = < + 0x04 0x05100000 /* PORT0 PAD MODE CTRL */ + 0x0c 0x05100000 /* PORT6 PAD MODE CTRL */ + 0x50 0x40004000 /* LED_CTRL0 */ + 0x54 0x40004000 /* LED_CTRL1 */ + 0x58 0x40004000 /* LED_CTRL2 */ + 0x5c 0x03ffff00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + 0x94 0x0000007e /* PORT6_STATUS */ + >; + }; +}; + +ð0 { + status = "okay"; + + phy-handle = <&phy0>; + phy-mode = "rgmii"; + + mtd-mac-address = <&art 0x0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; -- cgit v1.2.3