From 45699993fb5ef0adf901ebfb8694a1dd979f1348 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 9 Mar 2010 16:59:08 +0000 Subject: [ar7] fix missing bits in ar7.h after r20037 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20086 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h index 19b5289fdd..f37e82f5cb 100644 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h +++ b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h @@ -44,8 +44,10 @@ #define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00) #define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00) -#define TITAN_REGS_MAC0 (0x08640000) -#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800) +#define TITAN_REGS_ESWITCH_BASE (0x08640000) +#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0) +#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800) +#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000) #define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00) #define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300) -- cgit v1.2.3