From 18d7edb82e76e1b56ec8a4b6f7766758cc85815a Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 1 Jul 2009 19:32:48 +0000
Subject: add AR7240 specific definitions
SVN-Revision: 16644
---
target/linux/ar71xx/files/arch/mips/ar71xx/setup.c | 73 ++++++++++++++--------
.../arch/mips/include/asm/mach-ar71xx/ar71xx.h | 30 ++++++---
2 files changed, 67 insertions(+), 36 deletions(-)
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
index 2e1a7f6a56..f35444901d 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
@@ -103,45 +103,66 @@ static void __init ar71xx_detect_mem_size(void)
static void __init ar71xx_detect_sys_type(void)
{
- char *chip;
+ char *chip = "????";
u32 id;
- u32 rev;
-
- id = ar71xx_reset_rr(AR71XX_RESET_REG_REV_ID) & REV_ID_MASK;
- rev = (id >> REV_ID_REVISION_SHIFT) & REV_ID_REVISION_MASK;
+ u32 major;
+ u32 minor;
+ u32 rev = 0;
+
+ id = ar71xx_reset_rr(AR71XX_RESET_REG_REV_ID);
+ major = id & REV_ID_MAJOR_MASK;
+
+ switch (major) {
+ case REV_ID_MAJOR_AR71XX:
+ minor = id & AR71XX_REV_ID_MINOR_MASK;
+ rev = id >> AR71XX_REV_ID_REVISION_SHIFT;
+ rev &= AR71XX_REV_ID_REVISION_MASK;
+ switch (minor) {
+ case AR71XX_REV_ID_MINOR_AR7130:
+ ar71xx_soc = AR71XX_SOC_AR7130;
+ chip = "7130";
+ break;
- switch (id & REV_ID_CHIP_MASK) {
- case REV_ID_CHIP_AR7130:
- ar71xx_soc = AR71XX_SOC_AR7130;
- chip = "7130";
- break;
+ case AR71XX_REV_ID_MINOR_AR7141:
+ ar71xx_soc = AR71XX_SOC_AR7141;
+ chip = "7141";
+ break;
- case REV_ID_CHIP_AR7141:
- ar71xx_soc = AR71XX_SOC_AR7141;
- chip = "7141";
+ case AR71XX_REV_ID_MINOR_AR7161:
+ ar71xx_soc = AR71XX_SOC_AR7161;
+ chip = "7161";
+ break;
+ }
break;
- case REV_ID_CHIP_AR7161:
- ar71xx_soc = AR71XX_SOC_AR7161;
- chip = "7161";
+ case REV_ID_MAJOR_AR724X:
+ ar71xx_soc = AR71XX_SOC_AR7240;
+ chip = "7240";
+ rev = (id & AR724X_REV_ID_REVISION_MASK);
break;
- case REV_ID_CHIP_AR9130:
- ar71xx_soc = AR71XX_SOC_AR9130;
- chip = "9130";
- break;
+ case REV_ID_MAJOR_AR913X:
+ minor = id & AR91XX_REV_ID_MINOR_MASK;
+ rev = id >> AR91XX_REV_ID_REVISION_SHIFT;
+ rev &= AR91XX_REV_ID_REVISION_MASK;
+ switch (minor) {
+ case AR91XX_REV_ID_MINOR_AR9130:
+ ar71xx_soc = AR71XX_SOC_AR9130;
+ chip = "9130";
+ break;
- case REV_ID_CHIP_AR9132:
- ar71xx_soc = AR71XX_SOC_AR9132;
- chip = "9132";
+ case AR91XX_REV_ID_MINOR_AR9132:
+ ar71xx_soc = AR71XX_SOC_AR9132;
+ chip = "9132";
+ break;
+ }
break;
default:
- panic("ar71xx: unknown chip id:0x%02x\n", id);
+ panic("ar71xx: unknown chip id:0x%08x\n", id);
}
- sprintf(ar71xx_sys_type, "Atheros AR%s rev %u (id:0x%02x)",
- chip, rev, id);
+ sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev);
}
static void __init ar91xx_detect_sys_frequency(void)
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 145ea21308..198c4bfc01 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -103,6 +103,7 @@ enum ar71xx_soc_type {
AR71XX_SOC_AR7130,
AR71XX_SOC_AR7141,
AR71XX_SOC_AR7161,
+ AR71XX_SOC_AR7240,
AR71XX_SOC_AR9130,
AR71XX_SOC_AR9132
};
@@ -389,16 +390,25 @@ void ar71xx_ddr_flush(u32 reg);
#define RESET_MODULE_PCI_BUS BIT(1)
#define RESET_MODULE_PCI_CORE BIT(0)
-#define REV_ID_MASK 0xff
-#define REV_ID_CHIP_MASK 0xf3
-#define REV_ID_CHIP_AR7130 0xa0
-#define REV_ID_CHIP_AR7141 0xa1
-#define REV_ID_CHIP_AR7161 0xa2
-#define REV_ID_CHIP_AR9130 0xb0
-#define REV_ID_CHIP_AR9132 0xb1
-
-#define REV_ID_REVISION_MASK 0x3
-#define REV_ID_REVISION_SHIFT 2
+#define REV_ID_MAJOR_MASK 0xf0
+#define REV_ID_MAJOR_AR71XX 0xa0
+#define REV_ID_MAJOR_AR913X 0xb0
+#define REV_ID_MAJOR_AR724X 0xc0
+
+#define AR71XX_REV_ID_MINOR_MASK 0x3
+#define AR71XX_REV_ID_MINOR_AR7130 0x0
+#define AR71XX_REV_ID_MINOR_AR7141 0x1
+#define AR71XX_REV_ID_MINOR_AR7161 0x2
+#define AR71XX_REV_ID_REVISION_MASK 0x3
+#define AR71XX_REV_ID_REVISION_SHIFT 2
+
+#define AR91XX_REV_ID_MINOR_MASK 0x3
+#define AR91XX_REV_ID_MINOR_AR9130 0x0
+#define AR91XX_REV_ID_MINOR_AR9132 0x1
+#define AR91XX_REV_ID_REVISION_MASK 0x3
+#define AR91XX_REV_ID_REVISION_SHIFT 2
+
+#define AR724X_REV_ID_REVISION_MASK 0x3
extern void __iomem *ar71xx_reset_base;
--
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