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* kernel: bump 5.4 to 5.4.211Hauke Mehrtens2022-09-0483-251/+190
| | | | | | | | | | | | | | Similar version was upstreamed: bcm27xx/patches-5.4/950-0392-tty-amba-pl011-Add-un-throttle-support.patch Manually adapted: ipq806x/patches-5.4/0063-2-tsens-support-configurable-interrupts.patch layerscape/patches-5.4/301-arch-0008-arm-add-new-non-shareable-ioremap.patch Compile-tested: x86/64 Run-tested: x86/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* kernel: rename 5.20 patches to 6.0Rafał Miłecki2022-09-025-0/+0
| | | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 372ee1919d281dd3e86121996805291a6948c982)
* bcm4908: enable & setup packet steeringRafał Miłecki2022-09-022-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without packet steering NAT masquarade speed on BCM4908 /jumps/ between two speeds: 1. 826 Mb/s (±3 Mb/s) 2. 909 Mb/s (±8 Mb/s) and it never reaches ~940 Mb/s. Proper packet steering can improve it. Below are testing results for running iperf TCP traffic from LAN to WAN. They were used to pick up golden values. ┌──────────┬──────────┬───────────┐ │ eth0 │ br-lan │ speed │ │ rps_cpus │ rps_cpus │ [Mbps] │ ├──────────┼──────────┼───────────┤ │ 0 │ 0 │ 743 / 804 │ │ 0 │ 1 │ 738 / 821 │ │ 0 │ 2 │ ✓ 940 │ │ 0 │ 4 │ ✓ 938 │ │ 0 │ 8 │ ✓ 941 │ ├──────────┼──────────┼───────────┤ │ 1 │ 0 │ 829 │ │ 1 │ 1 │ 829 │ │ 1 │ 2 │ ✓ 942 │ │ 1 │ 4 │ ✓ 941 │ │ 1 │ 8 │ ✓ 941 │ ├──────────┼──────────┼───────────┤ │ 2 │ 0 │ ✓ 942 │ │ 2 │ 1 │ 926 │ │ 2 │ 2 │ ✓ 942 │ │ 2 │ 4 │ ✓ 942 │ │ 2 │ 8 │ ✓ 941 │ ├──────────┼──────────┼───────────┤ │ 4 │ 0 │ ✓ 941 │ │ 4 │ 1 │ 925 │ │ 4 │ 2 │ ✓ 941 │ │ 4 │ 4 │ ✓ 941 │ │ 4 │ 8 │ ✓ 941 │ ├──────────┼──────────┼───────────┤ │ 8 │ 0 │ ✓ 942 │ │ 8 │ 1 │ 925 │ │ 8 │ 2 │ ✓ 941 │ │ 8 │ 4 │ ✓ 942 │ │ 8 │ 8 │ ✓ 942 │ └──────────┴──────────┴───────────┘ Ref: fcbd39689ebfe ("bcm53xx: enable & setup packet steering") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 57cad53f4e52be987cdd61308ff7d2704baca539)
* bcm4908: build bootfs image per-SoCRafał Miłecki2022-09-024-59/+92
| | | | | | | | | | | | | | | | | In theory we could have just 1 bootfs image for all devices as each device has its own entry in the "configurations" node. It doesn't work well with default configuration though. If something goes wrong U-Boot SPL can be interrupted (by pressing A) to enter its minimalistic menu. It allows ignoring boardid. In such case bootfs default configuration is used. For above reason each SoC family (BCM4908, BCM4912) should have its own bootfs built. It allows each of them to have working default configuration. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 6ae2f7ff4737ec8dbec026fc6c02f7d1850b521c)
* bcm4908: prepare for Asus GT-AX6000 supportRafał Miłecki2022-09-021-0/+10
| | | | | | | It isn't tested & Linux DT will surely need more work. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 3f2b2fe084c0019221a17e3217a01c41d003f6fd)
* bcm4908: backport bcmbca DT patches queued for 5.20Rafał Miłecki2022-09-0210-0/+1161
| | | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit d63ef7c90f75393270ec4f5ff1b2563d6bd52066)
* bcm4908: include U-Boot DTB files for ASUS GT-AX6000 & Netgear RAX220Rafał Miłecki2022-09-011-0/+34
| | | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 2de86691b67ea73d858ec1c78757faae795691e4)
* ath79: add support for RouterBOARD mAPThibaut VARÈNE2022-08-285-0/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MikroTik mAP-2nd (sold as mAP) is an indoor 2.4Ghz AP with 802.3af/at PoE input and passive PoE passthrough. See https://mikrotik.com/product/RBmAP2nD for more details. Specifications: - SoC: QCA9533 - RAM: 64MB - Storage: 16MB NOR - Wireless: QCA9533 802.11b/g/n 2x2 - Ethernet: 2x 10/100 ports, 802.3af/at PoE in port 1, 500 mA passive PoE out on port 2 - 7 user-controllable LEDs Note: the device is a tiny AP and does not distinguish between both ethernet ports roles, so they are both assigned to lan. With the current setup, ETH1 is connected to eth1 and ETH2 is connected to eth0 via the embedded switch port 2. Flashing: TFTP boot initramfs image and then perform sysupgrade. The "ETH1" port must be used to upload the TFTP image. Follow common MikroTik procedure as in https://openwrt.org/toh/mikrotik/common. Tested-By: Andrew Powers-Holmes <aholmes@omnom.net> Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> (cherry picked from commit e1223dbee332b89caf71850eb909104529595c31)
* ath79: add support for MikroTik RouterBOARD hAP ac liteThibaut VARÈNE2022-08-287-0/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The MikroTik RB952Ui-5ac2nD (sold as hAP ac lite) is an indoor 2.4Ghz and 5GHz AP/router with a 2 dBi integrated antenna. See https://mikrotik.com/product/RB952Ui-5ac2nD for more details. Specifications: - SoC: QCA9533 - RAM: 64MB - Storage: 16MB NOR - Wireless: QCA9533 802.11b/g/n 2x2 / QCA9887 802.11a/n/ac 2x2 - Ethernet: AR934X switch, 5x 10/100 ports, 10-28 V passive PoE in port 1, 500 mA PoE out on port 5 - 6 user-controllable LEDs: - 1x user (green) - 5x port status (green) Flashing: TFTP boot initramfs image and then perform sysupgrade. The "Internet" port (port number 1) must be used to upload the TFTP image, then connect to any other port to access the OpenWRT system. Follow common MikroTik procedure as in https://openwrt.org/toh/mikrotik/common. Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> (cherry picked from commit 2bd33e8626bd04fd7115ee1a42aaf03aae2fffb8)
* ipq40xx: add Linksys MR8300 WAN portJulien Cassette2022-08-281-2/+6
| | | | | | | | | | | This makes the WAN interface and port appear in LuCi -> Network -> Switch on Linksys MR8300. This allows to configure a VLAN on WAN. Fixes: FS#4227 Signed-off-by: Julien Cassette <julien.cassette@gmail.com> (cherry picked from commit 2c1f8a665eb3dce27deb4f9f9b718eb8baf997bd)
* ramips: add support for YunCore AX820/HWAP-AX820Clemens Hopfer2022-08-284-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two versions which are identical apart from the enclosure: YunCore AX820: indoor ceiling mount AP with integrated antennas YunCore HWAP-AX820: outdoor enclosure with external (N) connectors Hardware specs: SoC: MediaTek MT7621DAT Flash: 16 MiB SPI NOR RAM: 128MiB (DDR3, integrated) WiFi: MT7905DAN+MT7975DN 2.4/5GHz 2T2R 802.11ax Ethernet: 10/100/1000 Mbps x2 (WAN/PoE+LAN) LED: Status (green) Button: Reset Power: 802.11af/at PoE; DC 12V,1A Antennas: AX820(indoor): 4dBi internal; HWAP-AX820(outdoor): external Flash instructions: The "OpenWRT support" version of the AX820 comes with a LEDE-based firmware with proprietary MTK drivers and a luci webinterface and ssh accessible under 192.168.1.1 on LAN; user root, no password. The sysupgrade.bin can be flashed using luci or sysupgrade via ssh, you will have to force the upgrade due to a different factory name. Remember: Do *not* preserve factory configuration! MAC addresses as used by OEM firmware: use address source 2g 44:D1:FA:*:0b Factory 0x0004 (label) 5g 46:D1:FA:*:0b LAA of 2g lan 44:D1:FA:*:0c Factory 0xe000 wan 44:D1:FA:*:0d Factory 0xe000 + 1 The wan MAC can also be found in 0xe006 but is not used by OEM dtb. Due to different MAC handling in mt76 the LAA derived from lan is used for 2g to prevent duplicate MACs when creating multiple interfaces. Signed-off-by: Clemens Hopfer <openwrt@wireloss.net> (cherry picked from commit 4891b865380e2b7f32acf0893df9c1ca9db8d4ea) [switch to mtd-mac-address instead of nvmem-cells]
* sunxi: add support for Banana Pi M2 BerryZoltan HERPAI2022-08-281-0/+10
| | | | | | | | | | | | | | | | | | | CPU: Allwinner V40 quad-core Cortex A7 @ 1.2GHz Memory: 1GB DDR3 Storage: SDcard, native SATA Network: 10/100/1000M ethernet, Ampak AP6212 wifi + BT USB: 4x USB 2.0 Installation: Use the standard sunxi installation to an SD-card. While the board is very similar to the M2 Ultra board (the V40 is the automotive version of the R40), as both the u-boot and kernel supports them separately, and some pins are different, let's add a separate device spec. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> (cherry picked from commit 9aa66b8ce730aebff76d353392151708a897a3a0)
* ramips: add support for Sitecom WLR-4100 v1 002Andrea Poletti2022-08-283-1/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sitecom WLR-4100 v1 002 (marked as X4 N300) is a wireless router Specification: SoC: MT7620A RAM: 64 MB DDR2 Flash: MX25L6405D SPI NOR 8 MB WIFI: 2.4 GHz integrated Ethernet: 5x 10/100/1000 Mbps QCA8337 USB: 1x 2.0 LEDS: 2x GPIO controlled, 5x switch Buttons: 1x GPIO controlled UART: row of 4 unpopulated holes near USB port, starting count from white triangle on PCB: VCC 3.3V GND TX RX baud: 115200, parity: none, flow control: none Installation Connect to one of LAN (yellow) ethernet ports, Open router configuration interface, Go to Toolbox > Firmware, Browse for OpenWrt factory image with dlf extension and hit Apply, Wait few minutes, after the Power LED will stop blinking, the router is ready for configuration. Known issues Some USB 2.0 devices work at full speed mode 1.1 only MAC addresses factory partition only contains one (binary) MAC address in 0x4. u-boot-env contains four (ascii) MAC addresses, of which two appear to be valid. factory 0x4 **:**:**:**:b9:84 binary u-boot-env ethaddr **:**:**:**:b9:84 ascii u-boot-env wanaddr **:**:**:**:b9:85 ascii u-boot-env wlanaddr 00:AA:BB:CC:DD:12 ascii u-boot-env iNICaddr 00:AA:BB:CC:DD:22 ascii The factory firmware only assigns ethaddr. Thus, we take the binary value which we can use directly in DTS. Additional information OEM firmware shell password is: SitecomSenao useful for creating backup of original firmware. There is also another revision of this device (v1 001), based on RT3352 SoC The nvmem feature (commit 06bb4a5) was introduced in master after the splitting of the 21.02 branch. It need to be reverted in 21.02.. Signed-off-by: Andrea Poletti <polex73@yahoo.it> [remove config DT label, convert to nvmem, remove MAC address setup from u-boot-env, add MAC address info to commit message] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit de0c380a5f8289839ab970e794a45f0e04a466a3) Signed-off-by: Petr Štetiar <ynezz@true.cz>
* octeon: add SUPPORTED_DEVICES to er/erlitePaul Spooren2022-07-291-0/+2
| | | | | | | | | | | | | | | | | Using the BOARD_NAME variable results for both er and erlite devices to identify themselfs as `er` and `erlite` (via `ubus call system board`). This is problematic when devices search for firmware upgrades since the OpenWrt profile is actually called `ubnt_edgerouter` and `ubnt_edgerouter-lite`. By adding the `SUPPORTED_DEVICE` a mapping is created to point devices called `er` or `erlite` to the corresponding profile. FIXES: https://github.com/openwrt/asu/issues/348 Signed-off-by: Paul Spooren <mail@aparcar.org> (cherry picked from commit 2a07270180ed0e295d854d6e9e59c78c40549efc)
* ipq806x: Archer VR2600: fix switch ports numberingChristian Lamparter2022-07-231-3/+3
| | | | | | | | | The order of LAN ports shown in Luci is reversed compared to what is written on the case of the device. Fix the order so that they match. Fixes: #10275 Signed-off-by: Christian Lamparter <chunkeey@gmail.com> (cherry picked from commit 69ea671320c936e72f554348475eeebcab383b42)
* bcm4908: use upstream-accepted watchdog patchesRafał Miłecki2022-07-182-1/+11
| | | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 864fdf2bf3f4b5c71e57a27c514672b966580148)
* bcm4908: backport latest DT patchesRafał Miłecki2022-07-187-1/+363
| | | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 001856fa51eaa704a254955138f76907eb02c2b4)
* kernel: update leds-bcm63138 driverRafał Miłecki2022-07-183-0/+85
| | | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit bb2a2b1dbe9c03d2abbb6989b6c4041e765543b0)
* kernel: backport LEDs driver for BCMBCA devicesRafał Miłecki2022-07-185-0/+499
| | | | | | | This includes BCM63xx and BCM4908 families. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit d9ab1e56d8d16182bd292f393c012d7e6873ed89)
* mediatek: mt7623: fixes kconfig for hwcryptoChukun Pan2022-07-151-1/+1
| | | | | | | | | | | The MediaTek's Crypto Engine driver has been replaced with the upstream Inside Secure's SafeXcel cryptographic engine driver, however kconfig has not been changed accordingly, this commit fixes it. Fixes: 127ad76 ("mediatek: switch over to extended upstream eip97 driver") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
* mediatek: remove crypto-hw-mtk packageEneas U de Queiroz2022-07-151-23/+0
| | | | | | | | The MediaTek's Crypto Engine module is only available for mt7623, in which case it is built into the kernel. Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> (cherry picked from commit 3f2d0703b60357e3ff1865783335be9f51528eb8)
* bcm53xx: enable & setup packet steeringRafał Miłecki2022-07-082-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Packet steering can improve NAT masquarade performance on Northstar by 40-50%. It makes reaching 940-942 Mb/s possible on BCM4708 (and obviously BCM47094 too). Add scripts setting up the most optimal Northstar setup. Below are testing results for running iperf TCP traffic from LAN to WAN. They were used to pick up golden values. ┌──────────┬──────────┬────────────────────┬────────────────────┐ │ eth0 │ br-lan │ flow_offloading=0 │ flow_offloading=1 │ │ │ ├─────────┬──────────┼─────────┬──────────┤ │ rps_cpus │ rps_cpus │ BCM4708 │ BCM47094 │ BCM4708 │ BCM47094 │ ├──────────┼──────────┼─────────┼──────────┼─────────┼──────────┤ │ 0 │ 0 │ 387 │ 671 │ 707 │ 941 │ │ 0 │ 1 │ 343 │ 576 │ 705 │ 941 │ │ 0 │ 2 │ ✓ 574 │ ✓ 941 │ 704 │ 940 │ │ 1 │ 0 │ 320 │ 549 │ 561 │ 941 │ │ 1 │ 1 │ 327 │ 551 │ 553 │ 941 │ │ 1 │ 2 │ 523 │ ✓ 940 │ 559 │ 940 │ │ 2 │ 0 │ 383 │ 652 │ ✓ 940 │ 941 │ │ 2 │ 1 │ 448 │ 754 │ ✓ 942 │ 941 │ │ 2 │ 2 │ 404 │ 655 │ ✓ 941 │ 941 │ └──────────┴──────────┴─────────┴──────────┴─────────┴──────────┘ Above tests were performed with all eth0 interrupts handled by CPU0. Setting "echo 2 > /proc/irq/38/smp_affinity" was tested on BCM4708 but it didn't increased speeds (just required different steering): ┌──────────┬──────────┬───────────┐ │ eth0 │ br-lan │ flow_offl │ │ rx-0 │ rx-0 │ oading=0 │ │ rps_cpus │ rps_cpus │ BCM4708 │ ├──────────┼──────────┼───────────┤ │ 0 │ 0 │ 384 │ │ 0 │ 1 │ ✓ 574 │ │ 0 │ 2 │ 348 │ │ 1 │ 0 │ 383 │ │ 1 │ 1 │ 412 │ │ 1 │ 2 │ 448 │ │ 2 │ 0 │ 321 │ │ 2 │ 1 │ 520 │ │ 2 │ 2 │ 327 │ └──────────┴──────────┴───────────┘ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit fcbd39689ebfef20c62fe3882d51f3af765e8028)
* bcm53xx: disable GRO by default at kernel levelRafał Miłecki2022-07-081-0/+32
| | | | | | | | | | | This improves NAT masquarade network performance. An alternative to kernel change would be runtime setup but that requires ethtool and identifying relevant network interface and all related switch ports interfaces. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 82d0dd8f8aa11249944fe39cd0d75a1524ec22ec)
* kernel: drop patch adding hardcoded kernel compilation flagsRafał Miłecki2022-07-081-25/+0
| | | | | | | | | | | | | | | | | | | | 1. KCFLAGS should be used for custom flags 2. Optimization flags are arch / SoC specific 3. -fno-reorder-blocks may *worsen* network performace on some SoCs 4. Usage of flags was *reversed* since 5.4 and noone reported that If we really need custom flags then CONFIG_KERNEL_CFLAGS should get default value adjusted properly (per target). Ref: 4e0c54bc5bc8 ("kernel: add support for kernel 5.4") Link: http://lists.openwrt.org/pipermail/openwrt-devel/2022-June/038853.html Link: https://patchwork.ozlabs.org/project/openwrt/patch/20190409093046.13401-1-zajec5@gmail.com/ Cc: Felix Fietkau <nbd@nbd.name> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Rui Salvaterra <rsalvaterra@gmail.com> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> (cherry picked from commit 22168ae68101b95d03741b0e9e8ad20b8a5ae5b7)
* kernel: use KCFLAGS for passing EXTRA_OPTIMIZATION flagsRafał Miłecki2022-07-081-9/+3
| | | | | | | | | | This uses kernel's generic variable and doesn't require patching it with a custom Makefile change. It's expected *not* to change any behaviour. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 1d42af720c6b6dcfcdd0b89bce386fca1607dcb3) Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk> (cherry picked from commit 24e27bec9a6df1511a504cf04cd9578a23e74657)
* kernel: Remove kmod-crypto-lib-blake2sHauke Mehrtens2022-07-042-1/+1
| | | | | | | Delete the crypto-lib-blake2s kmod package, as BLAKE2s is now built-in. Fixes: be0639063a70 ("kernel: bump 5.4 to 5.4.203") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* kernel: backport wireguard blake2s patchHauke Mehrtens2022-07-031-0/+108
| | | | | | | | | This patch was backported to kernel 5.4.200, but without the wireguard change, because wireguard is not available in upstream kernel 5.4. This adds the missing changes for wireguard too. Fixes: be0639063a70 ("kernel: bump 5.4 to 5.4.203") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* mvebu: move upstreamed DTS files (ESPRESSObin) to files-5.4Adrian Schmutzler2022-07-033-0/+0
| | | | | | | | | | | | | | | | | | | | | Since kernel 5.5-rc1 [1], there are upstreamed DTS files related to ESPRESSObin variants. Move these to files-5.4. This helps if you want to use a newer kernel version than used in OpenWrt 21.02 (= LTS kernel 5.4), you would end up with duplicate files (one outdated, one up to date from newer Linux versions). Fixes: Error: arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts:19.1-7: Label or path ports not found FATAL ERROR: Syntax error parsing input tree [1] https://github.com/torvalds/linux/commit/447b8789359f9a5e6567c4044d18abaa7de68930 Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit 7be8ab4f7b582924bca6594103735d888989d804) Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com> [reword commit subject and commit description]
* kernel: check dst of flow offloading tableRitaro Takenaka2022-07-038-22/+119
| | | | | | | Flow offload dst can become invalid after the route cache is created. dst_check() in packet path is necessary to prevent packet drop. Signed-off-by: Ritaro Takenaka <ritarot634@gmail.com>
* kernel: bump 5.4 to 5.4.203Hauke Mehrtens2022-07-03108-1412/+260
| | | | | | | | | | | | | | | Merged upstream: bcm27xx/patches-5.4/950-1014-Revert-mailbox-avoid-timer-start-from-callback.patch generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch Manually adapted: layerscape/patches-5.4/801-audio-0005-Revert-ASoC-fsl_sai-Add-support-for-SAI-new-version.patch oxnas/patches-5.4/100-oxnas-clk-plla-pllb.patch Compile-tested: lantiq/xrx200 Run-tested: lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: fix booting on ZyXEL NBG-419N v2Piotr Dymacz2022-06-201-0/+1
| | | | | | | | | | | | | | This fixes a well known "LZMA ERROR 1" error, reported previously on numerous of other devices from 'ramips' target. Fixes: #9842 Fixes: #8964 Reported-by: Juergen Hench <jurgen.hench@gmail.com> Tested-by: Juergen Hench <jurgen.hench@gmail.com> Signed-off-by: Demetris Ierokipides <ierokipides.dem@gmail.com> Signed-off-by: Piotr Dymacz <pepe2k@gmail.com> (cherry picked from commit fd72e595c2b2a46bab8cbc7e9415fbfeae7b5b0d)
* ramips: fix RT-AC57U button levelDavid Bauer2022-06-181-1/+1
| | | | | | | | Both buttons on the RT-AC57U are active-low. Fix the GPIO flag for the WPS cutton to fix button behavior. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 535b0c70b1c466733b009144f81f5207f1ecd311)
* kernel: bump 5.4 to 5.4.194Hauke Mehrtens2022-05-188-11/+11
| | | | | | | Compile-tested: lantiq/xrx200, armvirt/64 Run-tested: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* kernel: bump 5.4 to 5.4.192Hauke Mehrtens2022-05-1810-19/+19
| | | | | | | Compile-tested: armvirt/64 Run-tested: armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* kernel: bump 5.4 to 5.4.191Hauke Mehrtens2022-05-1859-217/+111
| | | | | | | | | | | | | | | | Merged upstream: apm821xx/patches-5.4/150-ata-sata_dwc_460ex-Fix-crash-due-to-OOB-write.patch Similar patch merged upstream: bcm27xx/patches-5.4/950-0210-usb-xhci-Disable-the-XHCI-5-second-timeout.patch Manually adapted: layerscape/patches-5.4/801-audio-0008-Revert-ASoC-Remove-dev_err-usage-after-platform_get_.patch Compile-tested: armvirt/64 Run-tested: armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: zbt-wg2626: Add the reset gpio for PCIe port 1Alban Bedel2022-05-011-0/+3
| | | | | | | | | | | | | | The 2.4GHz interface doesn't come up properly with the log showing: mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK) As seen on other MT7621 boards this is caused by a missing reset GPIO. The MT7621 dtsi set GPIO 19 as PCIe reset GPIO, which on this board reset the 5GHz interface on port 0. Add GPIO 8 to the PCIe reset GPIO list to also reset the 2.4GHz interface on port 1. Signed-off-by: Alban Bedel <albeu@free.fr> (cherry picked from commit f953a1a4bfba2fa70c12bb80938aa66481a673b6)
* ipq40xx: fix ar40xx driverNick Hainke2022-04-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is completely based on the work of adron-s: https://github.com/openwrt/openwrt/pull/4721#issuecomment-1101108651 The commit fixes the data corruption on TX packets. Packets are transmitted, but their contents are replaced with zeros. This error is caused by the lack of guard (50 ms) intervals between calibration phases. This error is treated by adding mdelay(50) to the calibration function code. In the original qca-ssda code [0], these mdelays were existing, but in the ar41xx.c they are gone. Tested on: - Fritz!Box 4040 - Fritz!Box 7530 - Mikrotik SXTsq 5AC - ZyXEL NBG6617 - [0] https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk/-/blob/NHSS.QSDK.11.4/src/init/ssdk_init.c#L2072 Suggested-by: Serhii Serhieiev <adron@mstnt.com> Reviewed-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Nick Hainke <vincent@systemli.org> (cherry picked from commit ab7e53e5cce703c7a62efbe1d41fb94c2228a178) [Deleted 5.10 from commit title] Signed-off-by: Nick Hainke <vincent@systemli.org>
* kernel: add missing config symbolsFelix Fietkau2022-04-201-0/+2
| | | | | | | | | MPLS feature symbols are normally only set when kmod-mpls is enabled, but the CONFIG_MPLS symbol they depend on could also have been selected by openvswitch instead Signed-off-by: Felix Fietkau <nbd@nbd.name> (cherry-picked from commit 92add80414c2f39ba8fd0d221d0f37e75fb19951)
* ramips: mt7620: disable SOC VLANs for external switchesMichael Pratt2022-04-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | These boards have AR8327 or QCA8337 external ethernet switch. The SOC also has it's own internal switch where VLAN is now enabled by default. Changes to preinit caused all switches to have VLANs enabled by default even if they are not configured with a topology in uci_defaults (see commit f017f617aecbd47debd4d3a734dc0e471342db96) When both internal and external switches have VLANs, and the external switch has both LAN and WAN, the TX traffic from the SOC cannot flow to the tagged port on the external switch because the VLAN IDs are not matching. So disable the internal switch VLANs by default on these boards. Also, add a topology for the internal switch, so that on LuCI there is not an "unknown topology" warning. In theory, it may be possible to have LAN ports on both switches through internal and external PHYs, but there are no known boards that have this. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 2adeada04558848058105cdad8195848d10d1486)
* ramips: mt7620: ethernet: use more macros and bump versionMichael Pratt2022-04-194-7/+11
| | | | | | | | | | | | | | | | Define and use some missing macros, and use them instead of BIT() or numbers for more readable code. Add comment for a bit change that seems unrelated to ethernet but is actually needed (PCIe Root Complex mode). Remove unknown and unused macro RST_CTRL_MCM (probably from MT7621 / MT7622) This is the last of a series of fixes, so bump version. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 88a0cebadfecb6ebb9f5f535e74f7f7574f513f3)
* ramips: mt7620: fix RGMII TXID PHY modeMichael Pratt2022-04-191-1/+1
| | | | | | | | | | | | | | | the register bits for TX delay and RX delay are opposites: when TX delay bit is set, delay is enabled when RX delay bit is set, delay is disabled So, when both bits are unset, it is RX delay and when both bits are set, it is TX delay Note: TXID is the default RGMII mode of the SOC Fixes: 5410a8e2959a ("ramips: mt7620: add rgmii delays support") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 26c84b2e46caba1ae17bc82a533c99eee65e7004)
* ramips: mt7620: add ephy-disable option to switch driverMichael Pratt2022-04-192-2/+13
| | | | | | | | | | | | | | | Add back the register write to disable internal PHYs as a separate option in the code that can be set using a DTS property. Set the option to true by default when an external mt7530 switch is identified. This makes the driver more in sync with original SDK code while keeping the lines separated into different options to accommodate any board with any PHY layout. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit cc6fd6fbb505071e08011f7998afaffefcf08fd3)
* ramips: mt7620: move mt7620_mdio_mode() to ethernet driverMichael Pratt2022-04-195-74/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function mt7620_mdio_mode is only called once and both the function and mdio_mode block have been named incorrectly, leading to confusion and useless commits. These lines in the mdio_mode block of mt7620_hw_init are only intended for boards with an external mt7530 switch. (see commit 194ca6127ee18cd3a95da4d03f02e43b5428c0bb) Therefore, move lines from mdio_mode to the place in soc_mt7620.c where the type of mt7530 switch is identified, and move lines from mt7620_mdio_mode to a main function. mt7620_mdio_mode was called from mt7620_gsw_init where the priv struct is available, so the lines must stay in mt7620_gsw_init function. In order to keep things as simple as possible, keep the DTS property related function calls together, by moving them from mt7620_gsw_probe to init. Remove the now useless DTS properties and extra phy nodes. Fixes: 5a6229a93df8 ("ramips: remove superfluous & confusing DT binding") Fixes: b85fe43ec8c4 ("ramips: mt7620: add force use of mdio-mode") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 6972e498d33ec896c676b7af91e3bfb00aa846a1)
* ramips: mt7620: use DTS to set PHY base address for external PHYsMichael Pratt2022-04-1924-7/+60
| | | | | | | | | | | | | | | | | | | | | | | | Set the PHY base address to 12 for mt7530 and 8 for others, which is based on the default setting for some devices from printing the register with the following command after it is written to by uboot during the boot cycle. `md 0x10117014 1` PHY_BASE option only uses 5 bits of the register, bits 16 to 20, so use 8-bit integer type. Set the option using the DTS property mediatek,ephy-base and create the gsw node if missing. Also, added a kernel message to display the EPHY base address. Note: If anything is written to a PHY address that is greater than 1 hex char (greater than 0xf) then there is adverse effects with Atheros switches. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 0976b6c4262a11a8d0dab9aeb64f5cdee266c44a)
* ramips: mt7620: allow both internal and external PHYsMichael Pratt2022-04-191-62/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the new variable ephy_base was introduced, it was not applied to the if block for mdio_mode. The first line in the mdio_mode if block sets the EPHY base address to 12 in the SOC by writing a register, but the corresponding variable in the driver was still set to the default of 0. This causes subsequent lines that write registers with the function _mt7620_mii_write to write to PHY addresses 0 through 4 while internal PHYs have been moved to addresses 12 through 16. All of these lines are intended only for PHYs on the SOC internal switch, however, they are being written to external ethernet switches if they exist at those PHY addresses 0 through 4. This causes some ethernet ports to be broken on boards with AR8327 or QCA8337 switch. Other suggested fixes move those lines to the else block of mdio_mode, but removing the else block completely also fixes it. Therefore, move the lines to the mt7620_hw_init function main block, and have only one instance of the function mtk_switch_w32 for writing the register with the EPHY base address. In theory, this also allows for boards that have both external switches and internal PHYs that lead to ethernet ports to be supported. Fixes: 391df3782914 ("ramips: mt7620: add EPHY base mdio address changing possibility") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit de5394a29dae9356a830d043e76591698411e97a)
* ramips: mt7620: fix ethernet driver GMAC port initMichael Pratt2022-04-192-15/+9
| | | | | | | | | | | | | | | | | | | | | | | | A workaround was added to the switch driver to set SOC port 4 as an RGMII GMAC interface based on the DTS property mediatek,port4-gmac. (previously mediatek,port4) However, the ethernet driver already does this, but is being blocked by a return statement whenever the phy-handle and fixed-link properties are both missing from nodes that define the port properties. Revert the workaround, so that both the switch driver and ethernet driver are not doing the same thing and move the phy-handle related lines down so nothing is ending the function prematurely. While at it, clean up kernel messages and delete useless return statements. Fixes: f6d81e2fa1f1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit afd60d650e769e9578eac5bb3647807f683aaf7c)
* ramips: mt7620: remove useless GMAC nodesMichael Pratt2022-04-194-27/+4
| | | | | | | | | | | | | | | | | | | | These nodes are used for configuring a GMAC interface and for defining external PHYs to be accessed with MDIO. None of this is possible on MT7620N, only MT7620A, so remove them from all MT7620N DTS. When the mdio-bus node is missing, the driver returns -NODEV which causes the internal switch to not initialize. Replace that return so that everything works without the DTS node. Also, an extra kernel message to indicate for all error conditions that mdio-bus is disabled. Fixes: d482356322c9 ("ramips: mt7620n: add mdio node and disable port4 by default") Fixes: aa5014dd1a58 ("ramips: mt7620n: enable port 4 as EPHY by default") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit a2acdf9607045e5669c305c57dd7c77be8351ba0)
* ramips: mt7620: simplify DTS properties for GMACMichael Pratt2022-04-1941-125/+23
| | | | | | | | | | | | | | | | | | | | There are only 2 options in the driver for the function of mt7620 internal switch port 4: EPHY mode (RJ-45, internal PHY) GMAC mode (RGMII, external PHY) Let the DTS property be boolean instead of string where EPHY mode is the default. Fix how the properties are written for all DTS that use them, and add missing nodes where applicable, and remove useless nodes, and minor DTS formatting. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 953bfe2eb3b7236a72fa41ab2204fdaa9fd09f65)
* ramips: mt7620: enable autonegotiation for all portsGaspare Bruno2022-04-191-0/+1
| | | | | | | | | | This enables autonegotiation for all ephy ports on probe. Some devices do not configure the ports, particularly port 4. Signed-off-by: Gaspare Bruno <gaspare@anlix.io> [replace magic values ; reword commit message] Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 0056ffb468f40f34bea006eb889b70c9a4f562e0)
* ramips: make PHY initialization more descriptiveDavid Bauer2022-04-191-3/+4
| | | | | | | | The basic mode control register of the ESW PHYs is modified in this codeblock. Use the respective macros to make this code more readable. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 6a15abbc753ca728d798cec9153fc532fce3791d)
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-28 04:06:14 +0000