aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux
Commit message (Collapse)AuthorAgeFilesLines
* kernel: generic: fix problem with w1-gpio-customPawel Dembicki2018-07-302-0/+86
| | | | | | | | | | In boards with fdt is impossible to use kmod-w1-gpio-custom. w1-gpio-custom create platform structure for w1-gpio module, but if board use fdt, data is ignored in w1-gpio probe. This workaround fix the problem. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
* ramips: fix RBM11G nameThibaut VARÈNE2018-07-301-1/+1
| | | | | | | | The device name is corrected to match the hardware-stored (in hard config flash space) device name. Tested-by: Tobias Schramm <tobleminer@gmail.com> Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
* ramips: fix RBM33G nameThibaut VARÈNE2018-07-301-1/+1
| | | | | | | | The device name is corrected to match the hardware-stored (in hard config flash space) device name. Tested-by: Tobias Schramm <tobleminer@gmail.com> Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
* ramips: mmc: Add SD card support to HC5661ALoveSy2018-07-302-0/+5
| | | | | | | | | | Tested on HC5661A and it now fixes the issue that when enabling sd card in HC5661A, the wan and 3 lan ports will down. Known issue: - When enabling SD card support, the led light of system will down and the rest 2 lights keep working. Signed-off-by: LoveSy <shana@zju.edu.cn>
* ramips: mmc: Fix init for MT7628ANLoveSy2018-07-302-1/+16
| | | | | | | | There is another thing about crc to do when initialize SD card on MT7628. This commit is to fix this init issue. Signed-off-by: LoveSy <shana@zju.edu.cn>
* ar71xx:add support for E750G v8张鹏2018-07-3012-2/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qxwlan E750G v8 is based on Qualcomm QCA9344. Specification: - 560/450/225 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 8/16 MB of FLASH (SPI NOR) - 2T2R 2.4G GHz (AR9344) - 2x 10/100 Mbps Ethernet (PoE support) - 2x 10/100/1000 Mbps Ethernet - 7x LED (6 driven by GPIO) - 1x button (reset) - 1x DC jack for main power input (9-48 V) - UART (J23) and LEDs (J2) headers on PCB Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "sysupgrade" image and click the upgrade button. Signed-off-by: 张鹏 <sd20@qxwlan.com>
* ar71xx:add support for E750A v4张鹏2018-07-3011-1/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qxwlan E750A v4 is based on Qualcomm QCA9344. Specification: - 560/450/225 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 8/16 MB of FLASH (SPI NOR) - 2T2R 5G GHz (AR9344) - 2x 10/100 Mbps Ethernet (one port with PoE support) - 1x miniPCIe slot (USB 2.0 bus only) - 7x LED (6 driven by GPIO) - 1x button (reset) - 1x DC jack for main power input (9-48 V) - UART (J23) and LEDs (J2) headers on PCB Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "sysupgrade" image and click the upgrade button. Signed-off-by: 张鹏 <sd20@qxwlan.com>
* ar71xx:add support for E558 v2张鹏2018-07-3012-0/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327. Specification: - 720/600/200 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 8/16 MB of FLASH (SPI NOR) - 2T2R 2.4 GHz (QCA9558) - 3x 10/100/1000 Mbps Ethernet (one port with PoE support) - 4x miniPCIe slot (USB 2.0 bus only) - 1x microSIM slot - 5x LED (4 driven by GPIO) - 1x button (reset) - 1x 3-pos switch - 1x DC jack for main power input (9-48 V) - UART (JP5) and LEDs (J8) headers on PCB Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "sysupgrade" image and click the upgrade button. Signed-off-by: 张鹏 <sd20@qxwlan.com>
* ar71xx: ag71xx: Prevent kernel oops for board defDaniel F. Dickinson2018-07-301-1/+15
| | | | | | | | | | | The driver is written in such a way that with a board defintion that connects a fixed phy, mdio, and switch in a certain way, a kernel oops could result because of lack of previously probed mdio bus. This commit allows for easier debugging in this case by casting the correct blame with serial console messages. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: ag71xx: Add connect message: fixed phyDaniel F. Dickinson2018-07-301-0/+7
| | | | | | | | It's a little noisier but makes it obvious when the ar7240 switch was connected to the MDIO bus, and to which phy device (or the failure to do so). Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: ag71xx_phy: Fix compilation for debug messagesDaniel F. Dickinson2018-07-301-2/+4
| | | | | | | | | | | NB: Error only appears with ag71xx debug messages and dynamic printk enabled. This is probably why no one has caught it before. Previously phy probe debug messages used old (now wrong) functions to get the phy name for printing. There was also the chance of a NULL pointer in the event no phy_device was found. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ath79: Add switch reset definition in dtsChuanhong Guo2018-07-307-0/+14
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: assert a switch reset if defined in dts.Chuanhong Guo2018-07-301-0/+9
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar724x: Fix reset definition for gmac0/gmac1Chuanhong Guo2018-07-303-12/+12
| | | | | | reset bit 8 is for builtin switch and bit 12 is marked 'reserved' on datasheet. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar7240: Update dts for current ag71xx driverChuanhong Guo2018-07-303-26/+20
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Explicitly register mdio bus after ag71xx_hw_init() for ar7240Chuanhong Guo2018-07-301-0/+8
| | | | | | | | | | mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?) Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0 For ar7240 and older chips, manually create platform device after ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between ag71xx_hw_init() and ag71xx_phy_connect(). Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Rework mdio clock settingsChuanhong Guo2018-07-302-26/+63
| | | | | | | Allow specifying desired mdio clock frequency in dts. Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar7242: Update dts for current ag71xx driverChuanhong Guo2018-07-301-2/+16
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar7241: Update dts for current ag71xx driverChuanhong Guo2018-07-306-44/+23
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: Fix support for TP-LINK Archer C7 v2Chuanhong Guo2018-07-303-46/+41
| | | | | | | | | | | | | | | | Remove mdio1 and phy1 handle. AR8327N is controlled through mdio0. Add gmac-config for Archer C7. Remove ucidef_set_interfaces_lan_wan. They can be determined by config_generate automatically. The following are for adding support for WDR4900 v2/Archer C7 v1 and other devices that shared the same machine file in ar71xx: Move mtd partitions to archer-c7-v2.dts. Only Archer C7 v2 has 16M flash. Flash on Archer C7 v1/TL-WDR4900 v2 is 8M. Add label for wlan leds. The default trigger for archer c7/wdr4900 is different. Move wlan5g led to archer-c7-v2.dts. 5G led on WDR4900 is connected to ar9380. Move rfkill definition to archer-c7-v2.dts. There is no such a button on wdr4900 v2. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: qca955x: Update dts for current ag71xx driverChuanhong Guo2018-07-301-2/+2
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: qca956x: Update dts for current ag71xx driverChuanhong Guo2018-07-302-4/+31
| | | | | | | | enable mdio1 by default because mdio1 node is a subnode of eth1 and eth1 node is a "simple-mfd", which makes mdio1 disabled when eth1 isn't enabled. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: qca953x: Add chosen node and specify console in bootargsChuanhong Guo2018-07-301-0/+4
| | | | | | | Most qca devices use 115200n8 as it's default uart baudrate. Add 'chosen' node for qca953x like other SoCs in ath79 target. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: qca953x: Update dts for current ag71xx driverChuanhong Guo2018-07-302-30/+36
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: update qca9533 to new irq driverLucian Cristian2018-07-302-24/+28
| | | | | | | | | | | | | | | | Commit c7efc93 renamed controller name to qca,ar9340-intc and added some functions but qca9533.dtsi was overlooked. Correct the dtsi and adust it to the new format Add gmac and correct reset for cascaded irq and build-in switch Also add the reference clock to soc dtsi so we don't have to have it in every dts Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com> Remove switch reset definition Fix gmac compatible string (We only need SW_PHY_SWAP and SW_PHY_ADDR_SWAP on qca953x so use ar9330-gmac instead of ar9340-gmac.) Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar933x: Update dts for current ag71xx driverChuanhong Guo2018-07-307-81/+42
| | | | | | | | gmac0 is always connected to switch phy4 and mdio1 is always needed. So add phy handle for eth0 and enable mdio1 by default. Move fixed-link for gmac1 from device dts to ar9331.dtsi because gmac1 is always connected to builtin switch. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar934x: Update dts for current ag71xx driverChuanhong Guo2018-07-303-4/+42
| | | | | | | | | Enable mdio1 by default because mdio1 is needed when eth1 is enabled. PS: If a ar9341 device has only one port and you only want to use gmac0, change compatible of gmac1 to "syscon", "simple-mfd" in dts. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Make builtin switch driver a separated moduleChuanhong Guo2018-07-302-68/+84
| | | | | | | | | This patch did several things: 1. Probe the builtin switch as a separated mdio device. 2. Register a separated mdio bus for builtin switch. 3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Split mdio driver into an independent platform device.Chuanhong Guo2018-07-304-84/+78
| | | | | | | We need to have mdio1 belonging to gmac1 initialized before gmac0. Split it into a separated mdio device to get both mdios ready before probing gmac. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Remove ar7240_set_addr and ag71xx_ar7240_startChuanhong Guo2018-07-303-29/+1
| | | | | | | | The builtin switch has it's initial valid mac address(00:00:01:00:00:00). Since the builtin switch is an independent device, setting mac address of gmac1 to builtin switch isn't a good idea and this makes it impossilbe to split builtin switch apart as an independent platform device. Remove these functions and apply default VLAN during initialization as a preparation for further driver splitting. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Split gmac config into separated file and add support for ↵Chuanhong Guo2018-07-305-58/+121
| | | | | | ar934x/qca955x. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: Fix mac reset and gmac compatible in ar934x.dtsiChuanhong Guo2018-07-301-5/+11
| | | | | | | Also add phy-mode and fixed-link as gmac1 is always connected to the builtin switch. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ar71xx: cap324: Drop support for defunct cloudDaniel F. Dickinson2018-07-301-11/+2
| | | | | | | | | Only build images for straight OpenWrt (using all flash; wipes out partitions that contain information only important for accessing a now defunct cloud service with the stock firmware) since the stock firmware is now irrelevant. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cap324: Use correct company nameDaniel F. Dickinson2018-07-304-5/+5
| | | | | | It's 'PowerCloud Systems' not just 'PowerCloud' Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cap324: Use correct MAC addressesDaniel F. Dickinson2018-07-301-3/+3
| | | | | | | The wrong MAC addresses (from the point of view of the physical device label) were being assigned to the wrong interfaces. Fix that. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cap324: Use standard eth as static lanDaniel F. Dickinson2018-07-301-1/+1
| | | | | | | | | | While the stock firmware and previous ar71xx versions of openwrt used the single ethernet port as a DHCP client, for unmodified openwrt usage it makes more sense to do the standard openwrt thing and make the ethernet port a static lan with known address so that users can find the device on the network more easily. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cr5000: use correct company nameDaniel F. Dickinson2018-07-302-3/+3
| | | | | | It's 'PowerCloud Systems' not just 'PowerCloud' Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cr5000: Drop support for defunct cloudDaniel F. Dickinson2018-07-301-12/+2
| | | | | | | The Skydog cloud service no longer exists hence supporting going back to stock firmware with cloud support is no longer applicable. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cr5000: Tweak switch LED settingsDaniel F. Dickinson2018-07-301-4/+4
| | | | | | | This is basically cosmetic and sets the Port 1-4 LEDs to blink on 10/100/1000M. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cr5000: Fix the reset button as KEY_RESTARTDaniel F. Dickinson2018-07-301-1/+1
| | | | | | | The reset button was incorrectly returning KEY_WPS_BUTTON as the key code. We want KEY_RESTART., so make that fix. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: cr5000: board data: Use better macro nameDaniel F. Dickinson2018-07-301-2/+2
| | | | | | | The PCIe wireless MAC address address is better labelled as WMAC than MAC to emphasize that it is for a wireless interface. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ath79: Port PowerCloud Systems CAP324 supportDaniel F. Dickinson2018-07-305-0/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CAP324 was an AP for a NaaS offering that is now defunct. While previously supported in the ar71xx arch, there were some errata (to be fixed shortly). Notable differences from ar71xx support: 1) The method of getting the ath9k firmware for the PCIe 2ghz wifi has changed (due to changes in how the arch handles this), since this device doesn't use the EEPROM except to get the MAC address of the wifi. 2) /etc/config/wireless will need to be regenerated as the path(s) to the wireless device(s) have changed. 3) ath79 OpenWrt firmware no longer supports build an image that allows reverting to stock firmware (as the cloud service no longer exists, the stock firmware is useless), instead using all of the flash for image and overlay (less u-boot/env and art). 4) Initial network config treats the ethernet port as a Lan port with the standard default address (192.168.1.1 unless changed in .config --e.g. via menuconfig) instead of using DHCP (this was the default for the stock firmware, however for openwrt use this is rather confusion and counter-productive as the user has a harder time finding the device on the network. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ath79: Port PowerCloud Systems CR5000 supportDaniel F. Dickinson2018-07-304-0/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ath79 arch support for PowerCloud Systems CR5000. Previously supported under ar71xx (however there are some errors in that support; to be fixed shortly). Info: * This board is based on the Atheros DB120 reference design, but doesn't use the on-board switch. Instead it attachs GMAC0 to an AR8327 switch. * It only uses GMAC0 and the WAN is simply a VLAN in the stock firmware. * It has 64MB RAM and 8MB flash. * In the dts version we get rid of using 'open-drain' for the AR8327 LED controls. * As with the platform data version we disable JTAG as this conflicts with one of the pair of GPIO's required for the power/status LED (GPIO2 and GPIO4 are used for this LED). * The pcie card wifi has an EEPROM but gets it's MAC address from the ART partition. * The SoC wifi (2.4 GHz) is all from the ART. * The USB is support comes from the SoC. NB. This is actually an AR9342 rather than AR9344 but we use the 9344 definitions because there are no relevant differences for this board. NB: Building only images that don't support reverting to the old cloud-based firmware as the Skydog cloud service for the CR5000 no longer exists. Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: improve MikroTik wAP R supportThibaut VARÈNE2018-07-303-2/+67
| | | | | | | | | | | | | 81d446b045176e3e25bb0ef74e3d060b51a0a353 introduced incomplete support for this device. This patch attempts to correct the situation based on OEM source code. LED1-3 are GSM mode on OFW (2G/3G/4G) hence unassigned here. Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> Tested-by: David Ehrmann <ehrmann@gmail.com>
* ar71xx: add missing diag LED support for RB wAP 2nDThibaut VARÈNE2018-07-301-1/+2
| | | | | | | 3b15eb06c366cf3805590a61f22e966a95bf8101 did not include diag.sh edit Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
* ar71xx: rbspi: mark rb911L user led as active lowThibaut VARÈNE2018-07-301-1/+4
| | | | | | | | | | | | The active_low flag was missing for the user LED. This LED is open drain (confirmed in OEM source) and open drain only makes sense for active low GPIOs. The two wireless LEDs mentioned in the comments are also #defined for future reference. Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> Tested-by: Ryan Mounce <ryan@mounce.com.au>
* ar71xx: rbspi: fix RB wAP AC gpio conflict and LEDThibaut VARÈNE2018-07-302-11/+9
| | | | | | | | | | | | | | | e15c63a37574bd15ce3a6636c2f04741ab76f7b9 introduced code that was trying to register GPIO 1 as both an LED and a button. The OEM source makes it clear that LED1 is not wired to the SoC GPIOs. GPIO 1 is the reset button. Furthermore the (green) power led default state should also be defined, (matching OEM source), and it should be used by diag.sh since it's currently the only software-controllable LED. This patch fixes these issues and renames the corresponding #defines for clarity Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
* ar71xx: rbspi: clarify USB power gpios actionThibaut VARÈNE2018-07-301-10/+9
| | | | | | | | | | | | | | | The gpios that control power toggle for USB on the RouterBOARD devices are active low _off_ switches. When they are active (low), power is off. When they are inactive (high), power is on. Rename GPIO defines, set gpios to GPIOF_ACTIVE_LOW for consistency and reflect their true action in the display name. This brings openwrt code in line with OEM. Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> Tested-by: Ryan Mounce <ryan@mounce.com.au>
* kernel: add DT binding support to the mtd redboot parserRafał Miłecki2018-07-302-0/+62
| | | | | | It allows using that parser with the "compatible" set in DT. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* apm821xx: clean up gpio-hogsChristian Lamparter2018-07-302-30/+31
| | | | | | | | | | | convert the usb and both sata port power related gpio-hogs to what they really are: fixed-regulators. The ethernet phy-reset gpio-hog is replaced by a proper upstream (4.15+) reset-gpios property in the mdio-node. So this will work eventually. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 00:48:05 +0000