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* ipq806x: fix EA8500 switch controlPavel Kubelun2018-05-222-8/+36
* ipq806x: move mmc specific nodes into v1.0 dtsiPavel Kubelun2018-05-224-150/+150
* ipq806x: fix pcie tx termination offsetPavel Kubelun2018-05-222-0/+24
* ipq806x: apply updated USB PHY settings to v2.0 SoCPavel Kubelun2018-05-224-22/+34
* ipq806x: reference ipq8065 as ipq8064 v3.0Pavel Kubelun2018-05-228-8/+6
* ipq806x: move mass market ipq8064 to v2 dtsiPavel Kubelun2018-05-2210-10/+10
* ipq806x: introduce ipq8064 SoC v2 dtsiPavel Kubelun2018-05-222-0/+2
* kernel: iqp806x low latency kernel does not bootMarc Benoit2018-05-222-4/+4
* ipq806x: define KERNEL_SIZE in KB instead of byte for the image generationStefan Lippers-Hollmann2018-05-221-5/+5
* ipq806x: increase kernel partition size for the Netgear Nighthawk X4 R7500v2Stefan Lippers-Hollmann2018-05-223-7/+7
* ipq806x: increase kernel partition size for the Netgear Nighthawk X4 R7500Stefan Lippers-Hollmann2018-05-223-7/+7
* ipq806x: increase kernel partition size for the Netgear Nighthawk X4 D7800Stefan Lippers-Hollmann2018-05-223-7/+7
* ipq806x: increase kernel partition size for the TP-Link Archer VR2600vStefan Lippers-Hollmann2018-05-223-7/+7
* ipq806x: increase kernel partition size for the TP-Link Archer C2600Stefan Lippers-Hollmann2018-05-222-5/+10
* ipq806x: increase kernel partition size for the Netgear r7800Stefan Lippers-Hollmann2018-05-223-7/+7
* ipq806x: cleanup kernel configRam Chandra Jangir2018-05-221-14/+8
* ipq806x: add kernel 4.14 supportRam Chandra Jangir2018-05-2268-0/+25602
* ipq40xx: add eva-image for FRITZ!Box 4040David Bauer2018-05-221-1/+4
* build: add apend-uboot commandDavid Bauer2018-05-221-0/+4
* ramips: change wifi led trigger for Archer C50v3David Bauer2018-05-221-2/+2
* ramips: fix Archer C50v3 LED mappingDavid Bauer2018-05-221-4/+4
* ath79: enable rtl8366rb phyLucian Cristian2018-05-221-0/+1
* ath79: fix loader-okli, lzma-loaderLucian Cristian2018-05-221-0/+1
* build: prevent spurious package rebuilds under CONFIG_AUTOREMOVEJo-Philipp Wich2018-05-221-1/+1
* ar71xx: Add support for PISEN TS-D084Chuanhong Guo2018-05-2211-0/+117
* kernel: enable THIN_ARCHIVES by defaultSergey Ryazanov2018-05-2225-24/+1
* kernel: enable FUTEX_PI by defaultSergey Ryazanov2018-05-2225-24/+1
* kernel: enable EXPORTFS by defaultSergey Ryazanov2018-05-2225-25/+1
* kernel: disable DRM_LIB_RANDOM by defaultSergey Ryazanov2018-05-2225-24/+1
* kernel: disable DMA_{NOOP|VIRT}_OPS by defaultSergey Ryazanov2018-05-2225-48/+2
* kernel: disable ARCH_WANTS_THP_SWAP by defaultSergey Ryazanov2018-05-2225-24/+1
* arc770: remove source-onlyEvgeniy Didin2018-05-221-1/+1
* uClibc-ng: update to 1.0.30Evgeniy Didin2018-05-221-2/+2
* ar71xx: Fix build for dap-1330-a1 boardHauke Mehrtens2018-05-221-1/+1
* ath25: drop 4.9 kernel supportSergey Ryazanov2018-05-2212-3850/+0
* ath25: switch to 4.14 kernelSergey Ryazanov2018-05-221-1/+1
* ath25: add kernel 4.14 supportSergey Ryazanov2018-05-2212-0/+3865
* kernel: merge kmod-fbcon with kmod-fbTomasz Maciej Nowak2018-05-211-36/+14
* build: use busybox gzip compatible force optionMathew McBride2018-05-211-1/+1
* nftables: bump to 0.8.5 versionRosy Song2018-05-218-1594/+8
* libnftnl: bump to 1.1.0Rosy Song2018-05-213-1706/+3
* mvebu: initial support for Marvell Armada 7k and 8k DB boardsDamir Samardzic2018-05-213-0/+38
* mvebu: initial support for Marvell Armada 3720 DB boardDamir Samardzic2018-05-214-0/+29
* kernel: Add support spi-nor, Eon EN25QH32YuheiOKAWA2018-05-214-0/+40
* kernel: Add configfs support for USB HID gadgetHarvey Phillips2018-05-211-0/+17
* ath10k-firmware: Fix mirror hash sumHauke Mehrtens2018-05-211-1/+1
* openwrt-keyring: bundle latest usign certificatesJo-Philipp Wich2018-05-201-3/+3
* base-files: depend on openwrt-keyringJo-Philipp Wich2018-05-201-1/+1
* openwrt-keyring: rename from lede-keyringJo-Philipp Wich2018-05-201-7/+8
* wireguard: bump to 20180519Jason A. Donenfeld2018-05-191-2/+2
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-11 03:20:04 +0000
TA_DTIMEOUT | \ SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR) /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ /** * @name Configuration options * @{ */ /** * @brief SDIO DMA priority (0..3|lowest..highest). */ #if !defined(STM32_SDC_SDIO_DMA_PRIORITY) || defined(__DOXYGEN__) #define STM32_SDC_SDIO_DMA_PRIORITY 3 #endif /** * @brief SDIO interrupt priority level setting. */ #if !defined(STM32_SDC_SDIO_IRQ_PRIORITY) || defined(__DOXYGEN__) #define STM32_SDC_SDIO_IRQ_PRIORITY 9 #endif /** * @brief Write timeout in milliseconds. */ #if !defined(STM32_SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__) #define STM32_SDC_WRITE_TIMEOUT_MS 250 #endif /** * @brief Read timeout in milliseconds. */ #if !defined(STM32_SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__) #define STM32_SDC_READ_TIMEOUT_MS 25 #endif /** * @brief Card clock activation delay in milliseconds. */ #if !defined(STM32_SDC_CLOCK_ACTIVATION_DELAY) || defined(__DOXYGEN__) #define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 #endif /** * @brief Support for unaligned transfers. * @note Unaligned transfers are much slower. */ #if !defined(STM32_SDC_SDIO_UNALIGNED_SUPPORT) || defined(__DOXYGEN__) #define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE #endif /** @} */ /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ #if !STM32_HAS_SDIO #error "SDIO not present in the selected device" #endif #if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SDC_SDIO_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SDIO" #endif #if !STM32_DMA_IS_VALID_PRIORITY(STM32_SDC_SDIO_DMA_PRIORITY) #error "Invalid DMA priority assigned to SDIO" #endif /* The following checks are only required when there is a DMA able to reassign streams to different channels.*/ #if STM32_ADVANCED_DMA /* Check on the presence of the DMA streams settings in mcuconf.h.*/ #if !defined(STM32_SDC_SDIO_DMA_STREAM) #error "SDIO DMA streams not defined" #endif /* Check on the validity of the assigned DMA channels.*/ #if !STM32_DMA_IS_VALID_ID(STM32_SDC_SDIO_DMA_STREAM, STM32_SDC_SDIO_DMA_MSK) #error "invalid DMA stream associated to SDIO" #endif #endif /* STM32_ADVANCED_DMA */ #if !defined(STM32_DMA_REQUIRED) #define STM32_DMA_REQUIRED #endif /* * SDIO clock divider. */ #if (defined(STM32F4XX) || defined(STM32F2XX)) #define STM32_SDIO_DIV_HS 0 #define STM32_SDIO_DIV_LS 120 #elif STM32_HCLK > 48000000 #define STM32_SDIO_DIV_HS 1 #define STM32_SDIO_DIV_LS 178 #else #define STM32_SDIO_DIV_HS 0 #define STM32_SDIO_DIV_LS 118 #endif /** * @brief SDIO data timeouts in SDIO clock cycles. */ #if (defined(STM32F4XX) || defined(STM32F2XX)) #if !STM32_CLOCK48_REQUIRED #error "SDIO requires STM32_CLOCK48_REQUIRED to be enabled" #endif #if STM32_PLL48CLK != 48000000 #error "invalid STM32_PLL48CLK clock value" #endif #define STM32_SDC_WRITE_TIMEOUT \ (((STM32_PLL48CLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ STM32_SDC_WRITE_TIMEOUT_MS) #define STM32_SDC_READ_TIMEOUT \ (((STM32_PLL48CLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ STM32_SDC_READ_TIMEOUT_MS) #else /* !(defined(STM32F4XX) || defined(STM32F2XX)) */ #define STM32_SDC_WRITE_TIMEOUT \ (((STM32_HCLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ STM32_SDC_WRITE_TIMEOUT_MS) #define STM32_SDC_READ_TIMEOUT \ (((STM32_HCLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * \ STM32_SDC_READ_TIMEOUT_MS) #endif /* !(defined(STM32F4XX) || defined(STM32F2XX)) */ /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ /** * @brief Type of card flags. */ typedef uint32_t sdcmode_t; /** * @brief SDC Driver condition flags type. */ typedef uint32_t sdcflags_t; /** * @brief Type of a structure representing an SDC driver. */ typedef struct SDCDriver SDCDriver; /** * @brief Driver configuration structure. * @note It could be empty on some architectures. */ typedef struct { /** * @brief Working area for memory consuming operations. * @note Buffer must be word aligned and big enough to store 512 bytes. * @note It is mandatory for detecting MMC cards bigger than 2GB else it * can be @p NULL. SD cards do NOT need it. * @note Memory pointed by this buffer is only used by @p sdcConnect(), * afterward it can be reused for other purposes. */ uint8_t *scratchpad; /** * @brief Bus width. */ sdcbusmode_t bus_width; /* End of the mandatory fields.*/ } SDCConfig; /** * @brief @p SDCDriver specific methods. */ #define _sdc_driver_methods \ _mmcsd_block_device_methods /** * @extends MMCSDBlockDeviceVMT * * @brief @p SDCDriver virtual methods table. */ struct SDCDriverVMT { _sdc_driver_methods }; /** * @brief Structure representing an SDC driver. */ struct SDCDriver { /** * @brief Virtual Methods Table. */ const struct SDCDriverVMT *vmt; _mmcsd_block_device_data /** * @brief Current configuration data. */ const SDCConfig *config; /** * @brief Various flags regarding the mounted card. */ sdcmode_t cardmode; /** * @brief Errors flags. */ sdcflags_t errors; /** * @brief Card RCA. */ uint32_t rca; /* End of the mandatory fields.*/ /** * @brief Thread waiting for I/O completion IRQ. */ thread_reference_t thread; /** * @brief DMA mode bit mask. */ uint32_t dmamode; /** * @brief Transmit DMA channel. */ const stm32_dma_stream_t *dma; /** * @brief Pointer to the SDIO registers block. * @note Needed for debugging aid. */ SDIO_TypeDef *sdio; }; /*===========================================================================*/ /* Driver macros. */ /*===========================================================================*/ /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ #if !defined(__DOXYGEN__) extern SDCDriver SDCD1; #endif #ifdef __cplusplus extern "C" { #endif void sdc_lld_init(void); void sdc_lld_start(SDCDriver *sdcp); void sdc_lld_stop(SDCDriver *sdcp); void sdc_lld_start_clk(SDCDriver *sdcp); void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk); void sdc_lld_stop_clk(SDCDriver *sdcp); void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode); void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg); bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, uint32_t *resp); bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, uint32_t *resp); bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, uint32_t *resp); bool sdc_lld_read_special(SDCDriver *sdcp, uint8_t *buf, size_t bytes, uint8_t cmd, uint32_t argument); bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, uint8_t *buf, uint32_t blocks); bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, const uint8_t *buf, uint32_t blocks); bool sdc_lld_sync(SDCDriver *sdcp); bool sdc_lld_is_card_inserted(SDCDriver *sdcp); bool sdc_lld_is_write_protected(SDCDriver *sdcp); #ifdef __cplusplus } #endif #endif /* HAL_USE_SDC */ #endif /* _SDC_LLD_H_ */ /** @} */
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-11 03:20:04 +0000