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Diffstat (limited to 'target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch')
-rw-r--r--target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch84
1 files changed, 84 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch b/target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch
new file mode 100644
index 0000000000..f96570c858
--- /dev/null
+++ b/target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch
@@ -0,0 +1,84 @@
+From a004ee350177ece3c059831ea49293d62aea7ca6 Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <icenowy@aosc.xyz>
+Date: Tue, 22 Nov 2016 23:58:29 +0800
+Subject: arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
+
+Allwinner A64 have two HCI USB controllers, a OTG controller and a USB
+PHY device which have two ports. One of the port is wired to both a HCI
+USB controller and the OTG controller, which is currently not supported.
+The another one is only wired to a HCI controller, and the device node of
+OHCI/EHCI controller of the port can be added now.
+
+Also the A64 USB PHY device node is also added for the HCI controllers to
+work.
+
+Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 46 +++++++++++++++++++++++++++
+ 1 file changed, 46 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -42,8 +42,10 @@
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
++#include <dt-bindings/clock/sun50i-a64-ccu.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/pinctrl/sun4i-a10.h>
++#include <dt-bindings/reset/sun50i-a64-ccu.h>
+
+ / {
+ interrupt-parent = <&gic>;
+@@ -120,6 +122,50 @@
+ #size-cells = <1>;
+ ranges;
+
++ usbphy: phy@01c19400 {
++ compatible = "allwinner,sun50i-a64-usb-phy";
++ reg = <0x01c19400 0x14>,
++ <0x01c1b800 0x4>;
++ reg-names = "phy_ctrl",
++ "pmu1";
++ clocks = <&ccu CLK_USB_PHY0>,
++ <&ccu CLK_USB_PHY1>;
++ clock-names = "usb0_phy",
++ "usb1_phy";
++ resets = <&ccu RST_USB_PHY0>,
++ <&ccu RST_USB_PHY1>;
++ reset-names = "usb0_reset",
++ "usb1_reset";
++ status = "disabled";
++ #phy-cells = <1>;
++ };
++
++ ehci1: usb@01c1b000 {
++ compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
++ reg = <0x01c1b000 0x100>;
++ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_OHCI1>,
++ <&ccu CLK_BUS_EHCI1>,
++ <&ccu CLK_USB_OHCI1>;
++ resets = <&ccu RST_BUS_OHCI1>,
++ <&ccu RST_BUS_EHCI1>;
++ phys = <&usbphy 1>;
++ phy-names = "usb";
++ status = "disabled";
++ };
++
++ ohci1: usb@01c1b400 {
++ compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
++ reg = <0x01c1b400 0x100>;
++ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_OHCI1>,
++ <&ccu CLK_USB_OHCI1>;
++ resets = <&ccu RST_BUS_OHCI1>;
++ phys = <&usbphy 1>;
++ phy-names = "usb";
++ status = "disabled";
++ };
++
+ ccu: clock@01c20000 {
+ compatible = "allwinner,sun50i-a64-ccu";
+ reg = <0x01c20000 0x400>;