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-rw-r--r--target/linux/sunxi/patches-3.13/146-4-dt-sun6i-a31-add-hstimer.patch37
1 files changed, 0 insertions, 37 deletions
diff --git a/target/linux/sunxi/patches-3.13/146-4-dt-sun6i-a31-add-hstimer.patch b/target/linux/sunxi/patches-3.13/146-4-dt-sun6i-a31-add-hstimer.patch
deleted file mode 100644
index 7014b48bc9..0000000000
--- a/target/linux/sunxi/patches-3.13/146-4-dt-sun6i-a31-add-hstimer.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 28a9c5d93113cab73dd3a4b4a74a983151c08b9d Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Fri, 20 Dec 2013 22:41:09 +0100
-Subject: [PATCH] ARM: sun6i: a31: Add support for the High Speed Timers
-
-The Allwinner A31 has support for four high speed timers. Apart for the
-number of timers (4 vs 2), it's basically the same logic than the high
-speed timers found in the sun5i chips.
-
-Now that we have a driver to support it, we can enable them in the
-device tree.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun6i-a31.dtsi | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/arch/arm/boot/dts/sun6i-a31.dtsi
-+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
-@@ -312,6 +312,17 @@
- status = "disabled";
- };
-
-+ hstimer@01c60000 {
-+ compatible = "allwinner,sun7i-a20-hstimer";
-+ reg = <0x01c60000 0x1000>;
-+ interrupts = <0 51 4>,
-+ <0 52 4>,
-+ <0 53 4>,
-+ <0 54 4>;
-+ clocks = <&ahb1_gates 19>;
-+ resets = <&ahb1_rst 19>;
-+ };
-+
- gic: interrupt-controller@01c81000 {
- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
- reg = <0x01c81000 0x1000>,