1 files changed, 0 insertions, 60 deletions
diff --git a/target/linux/mvebu/patches-5.10/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch b/target/linux/mvebu/patches-5.10/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch
deleted file mode 100644
index c9e49ac2f1..0000000000
--- a/target/linux/mvebu/patches-5.10/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 6964494582f56a3882c2c53b0edbfe99eb32b2e1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
-Date: Thu, 30 Apr 2020 10:06:14 +0200
-Subject: [PATCH] PCI: aardvark: Train link immediately after enabling training
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Adding even 100ms (PCI_PM_D3COLD_WAIT) delay between enabling link
-training and starting link training causes detection issues with some
-buggy cards (such as Compex WLE900VX).
-
-Move the code which enables link training immediately before the one
-which starts link traning.
-
-This fixes detection issues of Compex WLE900VX card on Turris MOX after
-cold boot.
-
-Link: https://lore.kernel.org/r/20200430080625.26070-2-pali@kernel.org
-Fixes: f4c7d053d7f7 ("PCI: aardvark: Wait for endpoint to be ready...")
-Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
-Signed-off-by: Pali Rohár <pali@kernel.org>
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
----
- drivers/pci/controller/pci-aardvark.c | 15 +++++++++------
- 1 file changed, 9 insertions(+), 6 deletions(-)
-
---- a/drivers/pci/controller/pci-aardvark.c
-+++ b/drivers/pci/controller/pci-aardvark.c
-@@ -300,11 +300,6 @@ static void advk_pcie_setup_hw(struct ad
- 	reg |= LANE_COUNT_1;
- 	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
- 
--	/* Enable link training */
--	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
--	reg |= LINK_TRAINING_EN;
--	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
--
- 	/* Enable MSI */
- 	reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
- 	reg |= PCIE_CORE_CTRL2_MSI_ENABLE;
-@@ -346,7 +341,15 @@ static void advk_pcie_setup_hw(struct ad
- 	 */
- 	msleep(PCI_PM_D3COLD_WAIT);
- 
--	/* Start link training */
-+	/* Enable link training */
-+	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
-+	reg |= LINK_TRAINING_EN;
-+	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
-+
-+	/*
-+	 * Start link training immediately after enabling it.
-+	 * This solves problems for some buggy cards.
-+	 */
- 	reg = advk_readl(pcie, PCIE_CORE_LINK_CTRL_STAT_REG);
- 	reg |= PCIE_CORE_LINK_TRAINING;
- 	advk_writel(pcie, reg, PCIE_CORE_LINK_CTRL_STAT_REG);