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Diffstat (limited to 'target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch')
-rw-r--r--target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch94
1 files changed, 94 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch b/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch
new file mode 100644
index 0000000000..58687f36ad
--- /dev/null
+++ b/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch
@@ -0,0 +1,94 @@
+From: Marcin Wojtas <mw@semihalf.com>
+Date: Mon, 14 Mar 2016 09:39:02 +0100
+Subject: [PATCH] bus: mvebu-mbus: provide api for obtaining IO and DRAM window
+ information
+
+This commit enables finding appropriate mbus window and obtaining its
+target id and attribute for given physical address in two separate
+routines, both for IO and DRAM windows. This functionality
+is needed for Armada XP/38x Network Controller's Buffer Manager and
+PnC configuration.
+
+[gregory.clement@free-electrons.com: Fix size test for
+mvebu_mbus_get_dram_win_info]
+
+Signed-off-by: Marcin Wojtas <mw@semihalf.com>
+[DRAM window information reference in LKv3.10]
+Signed-off-by: Evan Wang <xswang@marvell.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+
+--- a/drivers/bus/mvebu-mbus.c
++++ b/drivers/bus/mvebu-mbus.c
+@@ -948,6 +948,58 @@ void mvebu_mbus_get_pcie_io_aperture(str
+ *res = mbus_state.pcie_io_aperture;
+ }
+
++int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr)
++{
++ const struct mbus_dram_target_info *dram;
++ int i;
++
++ /* Get dram info */
++ dram = mv_mbus_dram_info();
++ if (!dram) {
++ pr_err("missing DRAM information\n");
++ return -ENODEV;
++ }
++
++ /* Try to find matching DRAM window for phyaddr */
++ for (i = 0; i < dram->num_cs; i++) {
++ const struct mbus_dram_window *cs = dram->cs + i;
++
++ if (cs->base <= phyaddr &&
++ phyaddr <= (cs->base + cs->size - 1)) {
++ *target = dram->mbus_dram_target_id;
++ *attr = cs->mbus_attr;
++ return 0;
++ }
++ }
++
++ pr_err("invalid dram address 0x%x\n", phyaddr);
++ return -EINVAL;
++}
++EXPORT_SYMBOL_GPL(mvebu_mbus_get_dram_win_info);
++
++int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
++ u8 *attr)
++{
++ int win;
++
++ for (win = 0; win < mbus_state.soc->num_wins; win++) {
++ u64 wbase;
++ int enabled;
++
++ mvebu_mbus_read_window(&mbus_state, win, &enabled, &wbase,
++ size, target, attr, NULL);
++
++ if (!enabled)
++ continue;
++
++ if (wbase <= phyaddr && phyaddr <= wbase + *size)
++ return win;
++ }
++
++ return -EINVAL;
++}
++EXPORT_SYMBOL_GPL(mvebu_mbus_get_io_win_info);
++
+ static __init int mvebu_mbus_debugfs_init(void)
+ {
+ struct mvebu_mbus_state *s = &mbus_state;
+--- a/include/linux/mbus.h
++++ b/include/linux/mbus.h
+@@ -69,6 +69,9 @@ static inline const struct mbus_dram_tar
+ int mvebu_mbus_save_cpu_target(u32 *store_addr);
+ void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
+ void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
++int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr);
++int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
++ u8 *attr);
+ int mvebu_mbus_add_window_remap_by_id(unsigned int target,
+ unsigned int attribute,
+ phys_addr_t base, size_t size,