diff options
Diffstat (limited to 'target/linux/mediatek/patches/0040-clocksource-mediatek-Use-GPT-as-sched-clock-source.patch')
| -rw-r--r-- | target/linux/mediatek/patches/0040-clocksource-mediatek-Use-GPT-as-sched-clock-source.patch | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches/0040-clocksource-mediatek-Use-GPT-as-sched-clock-source.patch b/target/linux/mediatek/patches/0040-clocksource-mediatek-Use-GPT-as-sched-clock-source.patch new file mode 100644 index 0000000000..c6b66afc05 --- /dev/null +++ b/target/linux/mediatek/patches/0040-clocksource-mediatek-Use-GPT-as-sched-clock-source.patch @@ -0,0 +1,51 @@ +From 3b3c2406dd9797bc806e0ce756142a33d209c4e8 Mon Sep 17 00:00:00 2001 +From: "Joe.C" <yingjoe.chen@mediatek.com> +Date: Fri, 1 May 2015 15:43:25 +0800 +Subject: [PATCH 40/76] clocksource: mediatek: Use GPT as sched clock source + +When cpu is in deep idle, arch timer will stop counting. Setup GPT as +sched clock source so it can keep counting in idle. + +Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> +--- + drivers/clocksource/mtk_timer.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c +index 85e0ab5..9a90c7b 100644 +--- a/drivers/clocksource/mtk_timer.c ++++ b/drivers/clocksource/mtk_timer.c +@@ -24,6 +24,7 @@ + #include <linux/of.h> + #include <linux/of_address.h> + #include <linux/of_irq.h> ++#include <linux/sched_clock.h> + #include <linux/slab.h> + + #define GPT_IRQ_EN_REG 0x00 +@@ -59,6 +60,13 @@ struct mtk_clock_event_device { + struct clock_event_device dev; + }; + ++static void __iomem *gpt_base __read_mostly; ++ ++static u64 notrace mtk_read_sched_clock(void) ++{ ++ return readl_relaxed(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC)); ++} ++ + static inline struct mtk_clock_event_device *to_mtk_clk( + struct clock_event_device *c) + { +@@ -239,6 +247,8 @@ static void __init mtk_timer_init(struct device_node *node) + mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN); + clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), + node->name, rate, 300, 32, clocksource_mmio_readl_up); ++ gpt_base = evt->gpt_base; ++ sched_clock_register(mtk_read_sched_clock, 32, rate); + + /* Configure clock event */ + mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT); +-- +1.7.10.4 + |