diff options
Diffstat (limited to 'target/linux/mediatek/patches/0006-soc-mediatek-Add-infracfg-misc-driver-support.patch')
| -rw-r--r-- | target/linux/mediatek/patches/0006-soc-mediatek-Add-infracfg-misc-driver-support.patch | 179 |
1 files changed, 179 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches/0006-soc-mediatek-Add-infracfg-misc-driver-support.patch b/target/linux/mediatek/patches/0006-soc-mediatek-Add-infracfg-misc-driver-support.patch new file mode 100644 index 0000000000..f47c19373e --- /dev/null +++ b/target/linux/mediatek/patches/0006-soc-mediatek-Add-infracfg-misc-driver-support.patch @@ -0,0 +1,179 @@ +From d6d7a7dc1b7db2e3d496bf67b30abc894edbc4bd Mon Sep 17 00:00:00 2001 +From: Sascha Hauer <s.hauer@pengutronix.de> +Date: Tue, 9 Jun 2015 10:46:59 +0200 +Subject: [PATCH 06/76] soc: mediatek: Add infracfg misc driver support + +This adds support for some miscellaneous bits of the infracfg controller. +The mtk_infracfg_set/clear_bus_protection functions are necessary for +the scpsys power domain driver to handle the bus protection bits which +are contained in the infacfg register space. + +Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> +--- + drivers/soc/mediatek/Kconfig | 9 ++++ + drivers/soc/mediatek/Makefile | 1 + + drivers/soc/mediatek/mtk-infracfg.c | 91 +++++++++++++++++++++++++++++++++ + include/linux/soc/mediatek/infracfg.h | 26 ++++++++++ + 4 files changed, 127 insertions(+) + create mode 100644 drivers/soc/mediatek/mtk-infracfg.c + create mode 100644 include/linux/soc/mediatek/infracfg.h + +diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig +index 3c18503..09da41e 100644 +--- a/drivers/soc/mediatek/Kconfig ++++ b/drivers/soc/mediatek/Kconfig +@@ -1,6 +1,15 @@ + # + # MediaTek SoC drivers + # ++config MTK_INFRACFG ++ bool "MediaTek INFRACFG Support" ++ depends on ARCH_MEDIATEK ++ select REGMAP ++ help ++ Say yes here to add support for the MediaTek INFRACFG controller. The ++ INFRACFG controller contains various infrastructure registers not ++ directly associated to any device. ++ + config MTK_PMIC_WRAP + tristate "MediaTek PMIC Wrapper Support" + depends on ARCH_MEDIATEK +diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile +index ecaf4de..3fa940f 100644 +--- a/drivers/soc/mediatek/Makefile ++++ b/drivers/soc/mediatek/Makefile +@@ -1 +1,2 @@ ++obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o + obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o +diff --git a/drivers/soc/mediatek/mtk-infracfg.c b/drivers/soc/mediatek/mtk-infracfg.c +new file mode 100644 +index 0000000..ca786e0 +--- /dev/null ++++ b/drivers/soc/mediatek/mtk-infracfg.c +@@ -0,0 +1,91 @@ ++/* ++ * Copyright (c) 2015 Pengutronix, Sascha Hauer <kernel@pengutronix.de> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include <linux/export.h> ++#include <linux/jiffies.h> ++#include <linux/regmap.h> ++#include <linux/soc/mediatek/infracfg.h> ++#include <asm/processor.h> ++ ++#define INFRA_TOPAXI_PROTECTEN 0x0220 ++#define INFRA_TOPAXI_PROTECTSTA1 0x0228 ++ ++/** ++ * mtk_infracfg_set_bus_protection - enable bus protection ++ * @regmap: The infracfg regmap ++ * @mask: The mask containing the protection bits to be enabled. ++ * ++ * This function enables the bus protection bits for disabled power ++ * domains so that the system does not hanf when some unit accesses the ++ * bus while in power down. ++ */ ++int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask) ++{ ++ unsigned long expired; ++ u32 val; ++ int ret; ++ ++ regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, mask); ++ ++ expired = jiffies + HZ; ++ ++ while (1) { ++ ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val); ++ if (ret) ++ return ret; ++ ++ if ((val & mask) == mask) ++ break; ++ ++ cpu_relax(); ++ if (time_after(jiffies, expired)) ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++/** ++ * mtk_infracfg_clear_bus_protection - disable bus protection ++ * @regmap: The infracfg regmap ++ * @mask: The mask containing the protection bits to be disabled. ++ * ++ * This function disables the bus protection bits previously enabled with ++ * mtk_infracfg_set_bus_protection. ++ */ ++int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask) ++{ ++ unsigned long expired; ++ int ret; ++ ++ regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0); ++ ++ expired = jiffies + HZ; ++ ++ while (1) { ++ u32 val; ++ ++ ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val); ++ if (ret) ++ return ret; ++ ++ if (!(val & mask)) ++ break; ++ ++ cpu_relax(); ++ if (time_after(jiffies, expired)) ++ return -EIO; ++ } ++ ++ return 0; ++} +diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h +new file mode 100644 +index 0000000..a5714e9 +--- /dev/null ++++ b/include/linux/soc/mediatek/infracfg.h +@@ -0,0 +1,26 @@ ++#ifndef __SOC_MEDIATEK_INFRACFG_H ++#define __SOC_MEDIATEK_INFRACFG_H ++ ++#define MT8173_TOP_AXI_PROT_EN_MCI_M2 BIT(0) ++#define MT8173_TOP_AXI_PROT_EN_MM_M0 BIT(1) ++#define MT8173_TOP_AXI_PROT_EN_MM_M1 BIT(2) ++#define MT8173_TOP_AXI_PROT_EN_MMAPB_S BIT(6) ++#define MT8173_TOP_AXI_PROT_EN_L2C_M2 BIT(9) ++#define MT8173_TOP_AXI_PROT_EN_L2SS_SMI BIT(11) ++#define MT8173_TOP_AXI_PROT_EN_L2SS_ADD BIT(12) ++#define MT8173_TOP_AXI_PROT_EN_CCI_M2 BIT(13) ++#define MT8173_TOP_AXI_PROT_EN_MFG_S BIT(14) ++#define MT8173_TOP_AXI_PROT_EN_PERI_M0 BIT(15) ++#define MT8173_TOP_AXI_PROT_EN_PERI_M1 BIT(16) ++#define MT8173_TOP_AXI_PROT_EN_DEBUGSYS BIT(17) ++#define MT8173_TOP_AXI_PROT_EN_CQ_DMA BIT(18) ++#define MT8173_TOP_AXI_PROT_EN_GCPU BIT(19) ++#define MT8173_TOP_AXI_PROT_EN_IOMMU BIT(20) ++#define MT8173_TOP_AXI_PROT_EN_MFG_M0 BIT(21) ++#define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22) ++#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23) ++ ++int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask); ++int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask); ++ ++#endif /* __SOC_MEDIATEK_INFRACFG_H */ +-- +1.7.10.4 + |