diff options
Diffstat (limited to 'target/linux/mediatek/patches-5.4/0600-3-6-dt-bindings-net-dsa-add-new-MT7531-binding-to-support-MT7531.patch')
| -rw-r--r-- | target/linux/mediatek/patches-5.4/0600-3-6-dt-bindings-net-dsa-add-new-MT7531-binding-to-support-MT7531.patch | 181 |
1 files changed, 181 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.4/0600-3-6-dt-bindings-net-dsa-add-new-MT7531-binding-to-support-MT7531.patch b/target/linux/mediatek/patches-5.4/0600-3-6-dt-bindings-net-dsa-add-new-MT7531-binding-to-support-MT7531.patch new file mode 100644 index 0000000000..3ca12b9172 --- /dev/null +++ b/target/linux/mediatek/patches-5.4/0600-3-6-dt-bindings-net-dsa-add-new-MT7531-binding-to-support-MT7531.patch @@ -0,0 +1,181 @@ +From patchwork Tue Dec 10 08:14:39 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Landen Chao <landen.chao@mediatek.com> +X-Patchwork-Id: 1206955 +X-Patchwork-Delegate: davem@davemloft.net +Return-Path: <netdev-owner@vger.kernel.org> +X-Original-To: patchwork-incoming-netdev@ozlabs.org +Delivered-To: patchwork-incoming-netdev@ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; + helo=vger.kernel.org; + envelope-from=netdev-owner@vger.kernel.org; + receiver=<UNKNOWN>) +Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) + header.from=mediatek.com +Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; + unprotected) header.d=mediatek.com header.i=@mediatek.com + header.b="SuczJHZp"; dkim-atps=neutral +Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) + by ozlabs.org (Postfix) with ESMTP id 47XCXj3BBNz9sPh + for <patchwork-incoming-netdev@ozlabs.org>; + Tue, 10 Dec 2019 19:15:01 +1100 (AEDT) +Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand + id S1727133AbfLJIPA (ORCPT + <rfc822;patchwork-incoming-netdev@ozlabs.org>); + Tue, 10 Dec 2019 03:15:00 -0500 +Received: from mailgw02.mediatek.com ([210.61.82.184]:45567 "EHLO + mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by + vger.kernel.org with ESMTP id S1727022AbfLJIO7 (ORCPT + <rfc822;netdev@vger.kernel.org>); Tue, 10 Dec 2019 03:14:59 -0500 +X-UUID: a1d9a42928d44d63b201d5ad84c05baa-20191210 +DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; + d=mediatek.com; s=dk; + h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; + bh=KJqQ2m7z9H4vre+SZyxgKEGRWb9Edp5pJlYnepJNMyM=; + b=SuczJHZpeY7vF8UsCGorYUAcT2lEUX2E0ciiyQBS1rDLPzTYnufK8OXyAw5Uq8U1m72TGWYCaq1o0VWtI1meJpEmCL2TVK/d+Y+IaacHlO716BmX77+0MU0crczE8zx1Nz2pNh+GicsB6AoC9qbBU+p5egbKDMBhpRaGQNAeBww=; +X-UUID: a1d9a42928d44d63b201d5ad84c05baa-20191210 +Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by + mailgw02.mediatek.com (envelope-from <landen.chao@mediatek.com>) + (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) + with ESMTP id 297826603; Tue, 10 Dec 2019 16:14:47 +0800 +Received: from mtkcas08.mediatek.inc (172.21.101.126) by + mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server + (TLS) id 15.0.1395.4; Tue, 10 Dec 2019 16:14:38 +0800 +Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc + (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via + Frontend Transport; Tue, 10 Dec 2019 16:14:26 +0800 +From: Landen Chao <landen.chao@mediatek.com> +To: <andrew@lunn.ch>, <f.fainelli@gmail.com>, + <vivien.didelot@savoirfairelinux.com>, <matthias.bgg@gmail.com>, + <robh+dt@kernel.org>, <mark.rutland@arm.com> +CC: <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>, + <linux-kernel@vger.kernel.org>, + <linux-mediatek@lists.infradead.org>, <davem@davemloft.net>, + <sean.wang@mediatek.com>, <opensource@vdorst.com>, + <frank-w@public-files.de>, Landen Chao <landen.chao@mediatek.com> +Subject: [PATCH net-next 3/6] dt-bindings: net: dsa: add new MT7531 binding + to support MT7531 +Date: Tue, 10 Dec 2019 16:14:39 +0800 +Message-ID: <1c382fd916b66bfe3ce8ef18c12f954dbcbddbbc.1575914275.git.landen.chao@mediatek.com> +X-Mailer: git-send-email 2.18.0 +In-Reply-To: <cover.1575914275.git.landen.chao@mediatek.com> +References: <cover.1575914275.git.landen.chao@mediatek.com> +MIME-Version: 1.0 +X-MTK: N +Sender: netdev-owner@vger.kernel.org +Precedence: bulk +List-ID: <netdev.vger.kernel.org> +X-Mailing-List: netdev@vger.kernel.org + +Add devicetree binding to support the compatible mt7531 switch as used +in the MediaTek MT7531 switch. + +Signed-off-by: Sean Wang <sean.wang@mediatek.com> +Signed-off-by: Landen Chao <landen.chao@mediatek.com> +--- + .../devicetree/bindings/net/dsa/mt7530.txt | 77 ++++++++++++++++++- + 1 file changed, 74 insertions(+), 3 deletions(-) + +diff --git a/Documentation/devicetree/bindings/net/dsa/mt7530.txt b/Documentation/devicetree/bindings/net/dsa/mt7530.txt
+index c5ed5d25f642..dc226a4e402a 100644
+--- a/Documentation/devicetree/bindings/net/dsa/mt7530.txt
++++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt
+@@ -5,6 +5,7 @@ Required properties:
+
+ - compatible: may be compatible = "mediatek,mt7530"
+ or compatible = "mediatek,mt7621"
++ or compatible = "mediatek,mt7531"
+ - #address-cells: Must be 1.
+ - #size-cells: Must be 0.
+ - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
+@@ -32,10 +33,13 @@ Required properties for the child nodes within ports container:
+
+ - reg: Port address described must be 6 for CPU port and from 0 to 5 for
+ user ports.
+-- phy-mode: String, must be either "trgmii" or "rgmii" for port labeled
+- "cpu".
++- phy-mode: String, the follow value would be acceptable for port labeled "cpu"
++ If compatible mediatek,mt7530 or mediatek,mt7621 is set,
++ must be either "trgmii" or "rgmii"
++ If compatible mediatek,mt7531 is set,
++ must be either "sgmii", "1000base-x" or "2500base-x"
+
+-Port 5 of the switch is muxed between:
++Port 5 of mt7530 and mt7621 switch is muxed between:
+ 1. GMAC5: GMAC5 can interface with another external MAC or PHY.
+ 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
+ of the SOC. Used in many setups where port 0/4 becomes the WAN port.
+@@ -308,3 +312,70 @@ Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY.
+ };
+ };
+ };
++
++Example 4:
++
++ð {
++ gmac0: mac@0 {
++ compatible = "mediatek,eth-mac";
++ reg = <0>;
++ phy-mode = "2500base-x";
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ pause;
++ };
++ };
++
++ &mdio0 {
++ switch@0 {
++ compatible = "mediatek,mt7531";
++ reg = <0>;
++ reset-gpios = <&pio 54 0>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++
++ port@0 {
++ reg = <0>;
++ label = "lan0";
++ };
++
++ port@1 {
++ reg = <1>;
++ label = "lan1";
++ };
++
++ port@2 {
++ reg = <2>;
++ label = "lan2";
++ };
++
++ port@3 {
++ reg = <3>;
++ label = "lan3";
++ };
++
++ port@4 {
++ reg = <4>;
++ label = "wan";
++ };
++
++ port@6 {
++ reg = <6>;
++ label = "cpu";
++ ethernet = <&gmac0>;
++ phy-mode = "2500base-x";
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ pause;
++ };
++ };
++ };
++ };
++ };
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