diff options
Diffstat (limited to 'target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch b/target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch new file mode 100644 index 0000000000..ae0614681f --- /dev/null +++ b/target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch @@ -0,0 +1,91 @@ +From dcb751a52b2ee69c16db2fef8f92a96ab13b6bb4 Mon Sep 17 00:00:00 2001 +From: John Crispin <john@phrozen.org> +Date: Thu, 10 Aug 2017 14:45:34 +0200 +Subject: [PATCH 34/57] net: dsa: mediatek: add dual gmac support + +Signed-off-by: John Crispin <john@phrozen.org> +--- + drivers/net/dsa/mt7530.c | 22 ++++++++++++++++------ + 1 file changed, 16 insertions(+), 6 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -627,7 +627,7 @@ mt7530_setup(struct dsa_switch *ds) + + /* Enable Port 6 only; P5 as GMAC5 which currently is not supported */ + val = mt7530_read(priv, MT7530_MHWTRAP); +- val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; ++ val &= ~MHWTRAP_P5_DIS & ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; + val |= MHWTRAP_MANUAL; + if (!dsa_is_cpu_port(ds, 5)) { + val |= MHWTRAP_P5_DIS; +@@ -735,6 +735,9 @@ static int + mt7530_cpu_port_enable(struct mt7530_priv *priv, + int port) + { ++ u8 port_mask = 0; ++ int i; ++ + /* Enable Mediatek header mode on the cpu port */ + mt7530_write(priv, MT7530_PVC_P(port), + PORT_SPEC_TAG); +@@ -751,8 +754,12 @@ mt7530_cpu_port_enable(struct mt7530_pri + /* CPU port gets connected to all user ports of + * the switch + */ ++ for (i = 0; i < MT7530_NUM_PORTS; i++) ++ if ((priv->ds->enabled_port_mask & BIT(i)) && ++ (dsa_port_upstream_port(priv->ds, i) == port)) ++ port_mask |= BIT(i); + mt7530_write(priv, MT7530_PCR_P(port), +- PCR_MATRIX(priv->ds->enabled_port_mask)); ++ PCR_MATRIX(port_mask)); + + return 0; + } +@@ -762,6 +769,7 @@ mt7530_port_enable(struct dsa_switch *ds + struct phy_device *phy) + { + struct mt7530_priv *priv = ds->priv; ++ u8 upstream = dsa_port_upstream_port(ds, port); + + mutex_lock(&priv->reg_mutex); + +@@ -772,7 +780,7 @@ mt7530_port_enable(struct dsa_switch *ds + * restore the port matrix if the port is the member of a certain + * bridge. + */ +- priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT)); ++ priv->ports[port].pm |= PCR_MATRIX(BIT(upstream)); + priv->ports[port].enable = true; + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, + priv->ports[port].pm); +@@ -835,7 +843,8 @@ mt7530_port_bridge_join(struct dsa_switc + struct net_device *bridge) + { + struct mt7530_priv *priv = ds->priv; +- u32 port_bitmap = BIT(MT7530_CPU_PORT); ++ u8 upstream = dsa_port_upstream_port(ds, port); ++ u32 port_bitmap = BIT(upstream); + int i; + + mutex_lock(&priv->reg_mutex); +@@ -873,6 +882,7 @@ static void + mt7530_port_bridge_leave(struct dsa_switch *ds, int port) + { + struct mt7530_priv *priv = ds->priv; ++ u8 upstream = dsa_port_upstream_port(ds, port); + int i; + + mutex_lock(&priv->reg_mutex); +@@ -898,8 +908,8 @@ mt7530_port_bridge_leave(struct dsa_swit + priv->bridge_dev[port] = NULL; + if (priv->ports[port].enable) + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, +- PCR_MATRIX(BIT(MT7530_CPU_PORT))); +- priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT)); ++ PCR_MATRIX(BIT(upstream))); ++ priv->ports[port].pm = PCR_MATRIX(BIT(upstream)); + + mutex_unlock(&priv->reg_mutex); + } |