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Diffstat (limited to 'target/linux/mediatek/patches-4.4/0017-clk-add-hifsys-reset.patch')
-rw-r--r--target/linux/mediatek/patches-4.4/0017-clk-add-hifsys-reset.patch13
1 files changed, 10 insertions, 3 deletions
diff --git a/target/linux/mediatek/patches-4.4/0017-clk-add-hifsys-reset.patch b/target/linux/mediatek/patches-4.4/0017-clk-add-hifsys-reset.patch
index 79647d31ff..d443971aa7 100644
--- a/target/linux/mediatek/patches-4.4/0017-clk-add-hifsys-reset.patch
+++ b/target/linux/mediatek/patches-4.4/0017-clk-add-hifsys-reset.patch
@@ -1,7 +1,7 @@
-From 294cf90337d70ad74edf147180bbeef837298bd0 Mon Sep 17 00:00:00 2001
+From f7121d2b19ddad33a09408a2c5923bfd95da8533 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 6 Jan 2016 20:06:49 +0100
-Subject: [PATCH 17/91] clk: add hifsys reset
+Subject: [PATCH 017/102] clk: add hifsys reset
Hi,
@@ -18,9 +18,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
include/dt-bindings/reset-controller/mt2701-resets.h | 9 +++++++++
2 files changed, 11 insertions(+)
+diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
+index 39472e4..0e40bb8 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
-@@ -1000,6 +1000,8 @@ static void __init mtk_hifsys_init(struc
+@@ -1000,6 +1000,8 @@ static void __init mtk_hifsys_init(struct device_node *node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
@@ -29,6 +31,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
}
CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init);
+diff --git a/include/dt-bindings/reset-controller/mt2701-resets.h b/include/dt-bindings/reset-controller/mt2701-resets.h
+index 00efeb0..aaf0305 100644
--- a/include/dt-bindings/reset-controller/mt2701-resets.h
+++ b/include/dt-bindings/reset-controller/mt2701-resets.h
@@ -71,4 +71,13 @@
@@ -45,3 +49,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+#define MT2701_HIFSYS_PCIE2_RST 26
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT2701 */
+--
+1.7.10.4
+