diff options
Diffstat (limited to 'target/linux/lantiq/patches-4.14/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch')
| -rw-r--r-- | target/linux/lantiq/patches-4.14/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch | 130 |
1 files changed, 130 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-4.14/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch b/target/linux/lantiq/patches-4.14/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch new file mode 100644 index 0000000000..4d18443943 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0061-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch @@ -0,0 +1,130 @@ +From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens <hauke@hauke-m.de> +Date: Fri, 6 Jan 2017 17:55:24 +0100 +Subject: [PATCH 2/2] usb: dwc2: add support for other Lantiq SoCs + +The size of the internal RAM of the DesignWare USB controller changed +between the different Lantiq SoCs. We have the following sizes: + +Amazon + Danube: 8 KByte +Amazon SE + arx100: 2 KByte +xrx200 + xrx300: 2.5 KByte + +For Danube SoC we do not provide the params and let the driver decide +to use sane defaults, for the Amazon SE and arx100 we use small fifos +and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo. +The auto detection of max_transfer_size and max_packet_count should +work, so remove it. + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> +--- + drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++------- + 1 file changed, 39 insertions(+), 7 deletions(-) + +--- a/drivers/usb/dwc2/platform.c ++++ b/drivers/usb/dwc2/platform.c +@@ -151,7 +151,38 @@ static const struct dwc2_core_params par + .hibernation = -1, + }; + +-static const struct dwc2_core_params params_ltq = { ++static const struct dwc2_core_params params_danube = { ++ .otg_cap = 2, /* non-HNP/non-SRP */ ++ .otg_ver = -1, ++ .dma_enable = -1, ++ .dma_desc_enable = -1, ++ .dma_desc_fs_enable = -1, ++ .speed = -1, ++ .enable_dynamic_fifo = -1, ++ .en_multiple_tx_fifo = -1, ++ .host_rx_fifo_size = -1, ++ .host_nperio_tx_fifo_size = -1, ++ .host_perio_tx_fifo_size = -1, ++ .max_transfer_size = -1, ++ .max_packet_count = -1, ++ .host_channels = -1, ++ .phy_type = -1, ++ .phy_utmi_width = -1, ++ .phy_ulpi_ddr = -1, ++ .phy_ulpi_ext_vbus = -1, ++ .i2c_enable = -1, ++ .ulpi_fs_ls = -1, ++ .host_support_fs_ls_low_power = -1, ++ .host_ls_low_power_phy_clk = -1, ++ .ts_dline = -1, ++ .reload_ctl = -1, ++ .ahbcfg = -1, ++ .uframe_sched = -1, ++ .external_id_pin_ctl = -1, ++ .hibernation = -1, ++}; ++ ++static const struct dwc2_core_params params_ase = { + .otg_cap = 2, /* non-HNP/non-SRP */ + .otg_ver = -1, + .dma_enable = -1, +@@ -163,8 +194,8 @@ static const struct dwc2_core_params par + .host_rx_fifo_size = 288, /* 288 DWORDs */ + .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */ + .host_perio_tx_fifo_size = 96, /* 96 DWORDs */ +- .max_transfer_size = 65535, +- .max_packet_count = 511, ++ .max_transfer_size = -1, ++ .max_packet_count = -1, + .host_channels = -1, + .phy_type = -1, + .phy_utmi_width = -1, +@@ -176,8 +207,37 @@ static const struct dwc2_core_params par + .host_ls_low_power_phy_clk = -1, + .ts_dline = -1, + .reload_ctl = -1, +- .ahbcfg = GAHBCFG_HBSTLEN_INCR16 << +- GAHBCFG_HBSTLEN_SHIFT, ++ .ahbcfg = -1, ++ .uframe_sched = -1, ++ .external_id_pin_ctl = -1, ++ .hibernation = -1, ++}; ++ ++static const struct dwc2_core_params params_xrx200 = { ++ .otg_cap = 2, /* non-HNP/non-SRP */ ++ .otg_ver = -1, ++ .dma_enable = -1, ++ .dma_desc_enable = -1, ++ .speed = -1, ++ .enable_dynamic_fifo = -1, ++ .en_multiple_tx_fifo = -1, ++ .host_rx_fifo_size = 288, /* 288 DWORDs */ ++ .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */ ++ .host_perio_tx_fifo_size = 136, /* 136 DWORDs */ ++ .max_transfer_size = -1, ++ .max_packet_count = -1, ++ .host_channels = -1, ++ .phy_type = -1, ++ .phy_utmi_width = -1, ++ .phy_ulpi_ddr = -1, ++ .phy_ulpi_ext_vbus = -1, ++ .i2c_enable = -1, ++ .ulpi_fs_ls = -1, ++ .host_support_fs_ls_low_power = -1, ++ .host_ls_low_power_phy_clk = -1, ++ .ts_dline = -1, ++ .reload_ctl = -1, ++ .ahbcfg = -1, + .uframe_sched = -1, + .external_id_pin_ctl = -1, + .hibernation = -1, +@@ -515,8 +575,11 @@ static const struct of_device_id dwc2_of + { .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 }, + { .compatible = "hisilicon,hi6220-usb", .data = ¶ms_hi6220 }, + { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 }, +- { .compatible = "lantiq,arx100-usb", .data = ¶ms_ltq }, +- { .compatible = "lantiq,xrx200-usb", .data = ¶ms_ltq }, ++ { .compatible = "lantiq,danube-usb", .data = ¶ms_danube }, ++ { .compatible = "lantiq,ase-usb", .data = ¶ms_ase }, ++ { .compatible = "lantiq,arx100-usb", .data = ¶ms_ase }, ++ { .compatible = "lantiq,xrx200-usb", .data = ¶ms_xrx200 }, ++ { .compatible = "lantiq,xrx300-usb", .data = ¶ms_xrx200 }, + { .compatible = "snps,dwc2", .data = NULL }, + { .compatible = "samsung,s3c6400-hsotg", .data = NULL}, + { .compatible = "amlogic,meson8b-usb", .data = ¶ms_amlogic }, |