diff options
Diffstat (limited to 'target/linux/lantiq/patches-3.2/0007-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.2/0007-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch | 69 |
1 files changed, 0 insertions, 69 deletions
diff --git a/target/linux/lantiq/patches-3.2/0007-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch b/target/linux/lantiq/patches-3.2/0007-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch deleted file mode 100644 index 7ececd4675..0000000000 --- a/target/linux/lantiq/patches-3.2/0007-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 318b9c6242418e1568430c7768371d2bd556109a Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Thu, 11 Aug 2011 12:25:55 +0200 -Subject: [PATCH 07/73] MIPS: lantiq: make irq.c support the FALC-ON - -There are minor differences in how irqs work on xway and falcon socs. -Xway needs 2 quirks that we need to disable for falcon to also work with -this code. - -* EBU irq does not need to send a special ack to the EBU -* The EIU does not exist - -Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - arch/mips/lantiq/irq.c | 24 +++++++++++++----------- - 1 files changed, 13 insertions(+), 11 deletions(-) - ---- a/arch/mips/lantiq/irq.c -+++ b/arch/mips/lantiq/irq.c -@@ -195,7 +195,7 @@ static void ltq_hw_irqdispatch(int modul - do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module)); - - /* if this is a EBU irq, we need to ack it or get a deadlock */ -- if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0)) -+ if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT) - ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_ISTAT) | 0x10, - LTQ_EBU_PCC_ISTAT); - } -@@ -260,17 +260,19 @@ void __init arch_init_irq(void) - if (!ltq_icu_membase) - panic("Failed to remap icu memory\n"); - -- if (insert_resource(&iomem_resource, <q_eiu_resource) < 0) -- panic("Failed to insert eiu memory\n"); -+ if (LTQ_EIU_BASE_ADDR) { -+ if (insert_resource(&iomem_resource, <q_eiu_resource) < 0) -+ panic("Failed to insert eiu memory\n"); -+ -+ if (request_mem_region(ltq_eiu_resource.start, -+ resource_size(<q_eiu_resource), "eiu") < 0) -+ panic("Failed to request eiu memory\n"); - -- if (request_mem_region(ltq_eiu_resource.start, -- resource_size(<q_eiu_resource), "eiu") < 0) -- panic("Failed to request eiu memory\n"); -- -- ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start, -+ ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start, - resource_size(<q_eiu_resource)); -- if (!ltq_eiu_membase) -- panic("Failed to remap eiu memory\n"); -+ if (!ltq_eiu_membase) -+ panic("Failed to remap eiu memory\n"); -+ } - - /* make sure all irqs are turned off by default */ - for (i = 0; i < 5; i++) -@@ -296,8 +298,8 @@ void __init arch_init_irq(void) - - for (i = INT_NUM_IRQ0; - i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); i++) -- if ((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) || -- (i == LTQ_EIU_IR2)) -+ if (((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) || -+ (i == LTQ_EIU_IR2)) && LTQ_EIU_BASE_ADDR) - irq_set_chip_and_handler(i, <q_eiu_type, - handle_level_irq); - /* EIU3-5 only exist on ar9 and vr9 */ |