diff options
Diffstat (limited to 'target/linux/ipq40xx/patches-4.14/071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch')
| -rw-r--r-- | target/linux/ipq40xx/patches-4.14/071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch | 109 |
1 files changed, 0 insertions, 109 deletions
diff --git a/target/linux/ipq40xx/patches-4.14/071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch b/target/linux/ipq40xx/patches-4.14/071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch deleted file mode 100644 index d0d08af286..0000000000 --- a/target/linux/ipq40xx/patches-4.14/071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch +++ /dev/null @@ -1,109 +0,0 @@ -From 364123029d8d547336323fbd3d659ecd0bba913f Mon Sep 17 00:00:00 2001 -From: Matthew McClintock <mmcclint@codeaurora.org> -Date: Mon, 23 Jul 2018 08:41:02 +0200 -Subject: [PATCH 5/8] qcom: ipq4019: use v2 of the kpss bringup mechanism - -v1 was the incorrect choice here and sometimes the board -would not come up properly. - -Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> -Signed-off-by: Christian Lamparter <chunkeey@gmail.com> -Signed-off-by: John Crispin <john@phrozen.org> ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 25 +++++++++++++++++-------- - 1 file changed, 17 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -34,7 +34,8 @@ - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc0>; - qcom,saw = <&saw0>; - reg = <0x0>; -@@ -53,7 +54,8 @@ - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc1>; - qcom,saw = <&saw1>; - reg = <0x1>; -@@ -64,7 +66,8 @@ - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc2>; - qcom,saw = <&saw2>; - reg = <0x2>; -@@ -75,13 +78,20 @@ - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc3>; - qcom,saw = <&saw3>; - reg = <0x3>; - clocks = <&gcc GCC_APPS_CLK_SRC>; - clock-frequency = <0>; - }; -+ -+ L2: l2-cache { -+ compatible = "cache"; -+ cache-level = <2>; -+ qcom,saw = <&saw_l2>; -+ }; - }; - - pmu { -@@ -213,22 +223,22 @@ - }; - - acc0: clock-controller@b088000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b088000 0x1000>, <0xb008000 0x1000>; - }; - - acc1: clock-controller@b098000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b098000 0x1000>, <0xb008000 0x1000>; - }; - - acc2: clock-controller@b0a8000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>; - }; - - acc3: clock-controller@b0b8000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>; - }; - -@@ -256,6 +266,12 @@ - regulator; - }; - -+ saw_l2: regulator@b012000 { -+ compatible = "qcom,saw2"; -+ reg = <0xb012000 0x1000>; -+ regulator; -+ }; -+ - serial@78af000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x78af000 0x200>; |