diff options
Diffstat (limited to 'target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch')
| -rw-r--r-- | target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch | 141 |
1 files changed, 0 insertions, 141 deletions
diff --git a/target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch b/target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch deleted file mode 100644 index 64172acb44..0000000000 --- a/target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch +++ /dev/null @@ -1,141 +0,0 @@ -From ce81398dccb984855de606b75db25eddecdaa9e5 Mon Sep 17 00:00:00 2001 -From: Linus Walleij <linus.walleij@linaro.org> -Date: Wed, 10 Oct 2018 20:25:39 +0200 -Subject: [PATCH 02/18] pinctrl: gemini: Fix up TVC clock group - -The previous fix made the TVC clock get muxed in on the -D-Link DIR-685 instead of giving nagging warnings of this -not working. Not good. We didn't want that, as it breaks -video. - -Create a specific group for the TVC CLK, and break out -a specific GPIO group for it on the SL3516 so we can use -that line as GPIO if we don't need the TVC CLK. - -Fixes: d17f477c5bc6 ("pinctrl: gemini: Mask and set properly") -Signed-off-by: Linus Walleij <linus.walleij@linaro.org> ---- - drivers/pinctrl/pinctrl-gemini.c | 44 ++++++++++++++++++++++++++------ - 1 file changed, 36 insertions(+), 8 deletions(-) - ---- a/drivers/pinctrl/pinctrl-gemini.c -+++ b/drivers/pinctrl/pinctrl-gemini.c -@@ -591,13 +591,16 @@ static const unsigned int tvc_3512_pins[ - 319, /* TVC_DATA[1] */ - 301, /* TVC_DATA[2] */ - 283, /* TVC_DATA[3] */ -- 265, /* TVC_CLK */ - 320, /* TVC_DATA[4] */ - 302, /* TVC_DATA[5] */ - 284, /* TVC_DATA[6] */ - 266, /* TVC_DATA[7] */ - }; - -+static const unsigned int tvc_clk_3512_pins[] = { -+ 265, /* TVC_CLK */ -+}; -+ - /* NAND flash pins */ - static const unsigned int nflash_3512_pins[] = { - 199, 200, 201, 202, 216, 217, 218, 219, 220, 234, 235, 236, 237, 252, -@@ -629,7 +632,7 @@ static const unsigned int pflash_3512_pi - /* Serial flash pins CE0, CE1, DI, DO, CK */ - static const unsigned int sflash_3512_pins[] = { 230, 231, 232, 233, 211 }; - --/* The GPIO0A (0) pin overlap with TVC and extended parallel flash */ -+/* The GPIO0A (0) pin overlap with TVC CLK and extended parallel flash */ - static const unsigned int gpio0a_3512_pins[] = { 265 }; - - /* The GPIO0B (1-4) pins overlap with TVC and ICE */ -@@ -823,7 +826,13 @@ static const struct gemini_pin_group gem - .num_pins = ARRAY_SIZE(tvc_3512_pins), - /* Conflict with character LCD and ICE */ - .mask = LCD_PADS_ENABLE, -- .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE, -+ .value = TVC_PADS_ENABLE, -+ }, -+ { -+ .name = "tvcclkgrp", -+ .pins = tvc_clk_3512_pins, -+ .num_pins = ARRAY_SIZE(tvc_clk_3512_pins), -+ .value = TVC_CLK_PAD_ENABLE, - }, - /* - * The construction is done such that it is possible to use a serial -@@ -860,8 +869,8 @@ static const struct gemini_pin_group gem - .name = "gpio0agrp", - .pins = gpio0a_3512_pins, - .num_pins = ARRAY_SIZE(gpio0a_3512_pins), -- /* Conflict with TVC */ -- .mask = TVC_PADS_ENABLE, -+ /* Conflict with TVC CLK */ -+ .mask = TVC_CLK_PAD_ENABLE, - }, - { - .name = "gpio0bgrp", -@@ -1531,13 +1540,16 @@ static const unsigned int tvc_3516_pins[ - 311, /* TVC_DATA[1] */ - 394, /* TVC_DATA[2] */ - 374, /* TVC_DATA[3] */ -- 333, /* TVC_CLK */ - 354, /* TVC_DATA[4] */ - 395, /* TVC_DATA[5] */ - 312, /* TVC_DATA[6] */ - 334, /* TVC_DATA[7] */ - }; - -+static const unsigned int tvc_clk_3516_pins[] = { -+ 333, /* TVC_CLK */ -+}; -+ - /* NAND flash pins */ - static const unsigned int nflash_3516_pins[] = { - 243, 260, 261, 224, 280, 262, 281, 264, 300, 263, 282, 301, 320, 283, -@@ -1570,7 +1582,7 @@ static const unsigned int pflash_3516_pi - static const unsigned int sflash_3516_pins[] = { 296, 338, 295, 359, 339 }; - - /* The GPIO0A (0-4) pins overlap with TVC and extended parallel flash */ --static const unsigned int gpio0a_3516_pins[] = { 333, 354, 395, 312, 334 }; -+static const unsigned int gpio0a_3516_pins[] = { 354, 395, 312, 334 }; - - /* The GPIO0B (5-7) pins overlap with ICE */ - static const unsigned int gpio0b_3516_pins[] = { 375, 396, 376 }; -@@ -1602,6 +1614,9 @@ static const unsigned int gpio0j_3516_pi - /* The GPIO0K (30,31) pins overlap with NAND flash */ - static const unsigned int gpio0k_3516_pins[] = { 275, 298 }; - -+/* The GPIO0L (0) pins overlap with TVC_CLK */ -+static const unsigned int gpio0l_3516_pins[] = { 333 }; -+ - /* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */ - static const unsigned int gpio1a_3516_pins[] = { 221, 200, 222, 201, 220 }; - -@@ -1761,7 +1776,13 @@ static const struct gemini_pin_group gem - .num_pins = ARRAY_SIZE(tvc_3516_pins), - /* Conflict with character LCD */ - .mask = LCD_PADS_ENABLE, -- .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE, -+ .value = TVC_PADS_ENABLE, -+ }, -+ { -+ .name = "tvcclkgrp", -+ .pins = tvc_clk_3516_pins, -+ .num_pins = ARRAY_SIZE(tvc_clk_3516_pins), -+ .value = TVC_CLK_PAD_ENABLE, - }, - /* - * The construction is done such that it is possible to use a serial -@@ -1873,6 +1894,13 @@ static const struct gemini_pin_group gem - .value = PFLASH_PADS_DISABLE | NAND_PADS_DISABLE, - }, - { -+ .name = "gpio0lgrp", -+ .pins = gpio0l_3516_pins, -+ .num_pins = ARRAY_SIZE(gpio0l_3516_pins), -+ /* Conflict with TVE CLK */ -+ .mask = TVC_CLK_PAD_ENABLE, -+ }, -+ { - .name = "gpio1agrp", - .pins = gpio1a_3516_pins, - .num_pins = ARRAY_SIZE(gpio1a_3516_pins), |