diff options
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch | 33 |
1 files changed, 14 insertions, 19 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch b/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch index 94f4be61a1..2a6cfba67a 100644 --- a/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch +++ b/target/linux/brcm2708/patches-4.4/0584-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch @@ -21,8 +21,6 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> drivers/clk/bcm/clk-bcm2835.c | 42 ++++++++++++++++++++++++++++-------------- 1 file changed, 28 insertions(+), 14 deletions(-) -diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c -index 89dad97..54cb4e1 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -449,6 +449,7 @@ struct bcm2835_pll_divider_data { @@ -33,7 +31,7 @@ index 89dad97..54cb4e1 100644 }; struct bcm2835_clock_data { -@@ -1286,7 +1287,7 @@ bcm2835_register_pll_divider(struct bcm2835_cprman *cprman, +@@ -1286,7 +1287,7 @@ bcm2835_register_pll_divider(struct bcm2 init.num_parents = 1; init.name = divider_name; init.ops = &bcm2835_pll_divider_clk_ops; @@ -42,7 +40,7 @@ index 89dad97..54cb4e1 100644 divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL); if (!divider) -@@ -1525,7 +1526,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1525,7 +1526,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_CORE, .load_mask = CM_PLLA_LOADCORE, .hold_mask = CM_PLLA_HOLDCORE, @@ -52,7 +50,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLA_PER] = REGISTER_PLL_DIV( .name = "plla_per", .source_pll = "plla", -@@ -1533,7 +1535,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1533,7 +1535,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_PER, .load_mask = CM_PLLA_LOADPER, .hold_mask = CM_PLLA_HOLDPER, @@ -62,7 +60,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( .name = "plla_dsi0", .source_pll = "plla", -@@ -1549,7 +1552,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1549,7 +1552,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_CCP2, .load_mask = CM_PLLA_LOADCCP2, .hold_mask = CM_PLLA_HOLDCCP2, @@ -72,7 +70,7 @@ index 89dad97..54cb4e1 100644 /* PLLB is used for the ARM's clock. */ [BCM2835_PLLB] = REGISTER_PLL( -@@ -1573,7 +1577,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1573,7 +1577,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLB_ARM, .load_mask = CM_PLLB_LOADARM, .hold_mask = CM_PLLB_HOLDARM, @@ -82,7 +80,7 @@ index 89dad97..54cb4e1 100644 /* * PLLC is the core PLL, used to drive the core VPU clock. -@@ -1602,7 +1607,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1602,7 +1607,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE0, .load_mask = CM_PLLC_LOADCORE0, .hold_mask = CM_PLLC_HOLDCORE0, @@ -92,7 +90,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV( .name = "pllc_core1", .source_pll = "pllc", -@@ -1610,7 +1616,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1610,7 +1616,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE1, .load_mask = CM_PLLC_LOADCORE1, .hold_mask = CM_PLLC_HOLDCORE1, @@ -102,7 +100,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV( .name = "pllc_core2", .source_pll = "pllc", -@@ -1618,7 +1625,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1618,7 +1625,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE2, .load_mask = CM_PLLC_LOADCORE2, .hold_mask = CM_PLLC_HOLDCORE2, @@ -112,7 +110,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLC_PER] = REGISTER_PLL_DIV( .name = "pllc_per", .source_pll = "pllc", -@@ -1626,7 +1634,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1626,7 +1634,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_PER, .load_mask = CM_PLLC_LOADPER, .hold_mask = CM_PLLC_HOLDPER, @@ -122,7 +120,7 @@ index 89dad97..54cb4e1 100644 /* * PLLD is the display PLL, used to drive DSI display panels. -@@ -1655,7 +1664,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1655,7 +1664,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLD_CORE, .load_mask = CM_PLLD_LOADCORE, .hold_mask = CM_PLLD_HOLDCORE, @@ -132,7 +130,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLD_PER] = REGISTER_PLL_DIV( .name = "plld_per", .source_pll = "plld", -@@ -1663,7 +1673,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1663,7 +1673,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLD_PER, .load_mask = CM_PLLD_LOADPER, .hold_mask = CM_PLLD_HOLDPER, @@ -142,7 +140,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV( .name = "plld_dsi0", .source_pll = "plld", -@@ -1708,7 +1719,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1708,7 +1719,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_RCAL, .load_mask = CM_PLLH_LOADRCAL, .hold_mask = 0, @@ -152,7 +150,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV( .name = "pllh_aux", .source_pll = "pllh", -@@ -1716,7 +1728,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1716,7 +1728,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_AUX, .load_mask = CM_PLLH_LOADAUX, .hold_mask = 0, @@ -162,7 +160,7 @@ index 89dad97..54cb4e1 100644 [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV( .name = "pllh_pix", .source_pll = "pllh", -@@ -1724,7 +1737,8 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { +@@ -1724,7 +1737,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_PIX, .load_mask = CM_PLLH_LOADPIX, .hold_mask = 0, @@ -172,6 +170,3 @@ index 89dad97..54cb4e1 100644 /* the clocks */ --- -2.1.4 - |