diff options
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0332-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch')
| -rw-r--r-- | target/linux/bcm27xx/patches-5.4/950-0332-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0332-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch b/target/linux/bcm27xx/patches-5.4/950-0332-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch new file mode 100644 index 0000000000..a4a9dc817b --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0332-drm-v3d-Don-t-clear-MMU-control-bits-on-exception.patch @@ -0,0 +1,34 @@ +From e2d8a52d3ade83f5c114b1edba601ebcf2c39517 Mon Sep 17 00:00:00 2001 +From: Phil Elwell <phil@raspberrypi.org> +Date: Mon, 11 Nov 2019 14:01:41 +0000 +Subject: [PATCH] drm/v3d: Don't clear MMU control bits on exception + +MMU exception conditions are reported in the V3D_MMU_CTRL register as +write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any +exceptions, but does so by masking out any other bits and writing the +result back. There are some important control bits in that register, +including MMU_ENABLE, so a safer approach is to simply write back the +value just read unaltered. + +This patch doesn't remove the cause of the apparent PTE errors, but it +does reduce the impact to just an error in the kernel log. + +Signed-off-by: Phil Elwell <phil@raspberrypi.org> +--- + drivers/gpu/drm/v3d/v3d_irq.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg) + }; + const char *client = "?"; + +- V3D_WRITE(V3D_MMU_CTL, +- V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED | +- V3D_MMU_CTL_PT_INVALID | +- V3D_MMU_CTL_WRITE_VIOLATION)); ++ V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL)); + + if (v3d->ver >= 41) { + axi_id = axi_id >> 5; |