diff options
Diffstat (limited to 'target/linux/at91/patches-5.15/245-clk-at91-sama7g5-remove-prescaler-part-of-master-clo.patch')
| -rw-r--r-- | target/linux/at91/patches-5.15/245-clk-at91-sama7g5-remove-prescaler-part-of-master-clo.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/target/linux/at91/patches-5.15/245-clk-at91-sama7g5-remove-prescaler-part-of-master-clo.patch b/target/linux/at91/patches-5.15/245-clk-at91-sama7g5-remove-prescaler-part-of-master-clo.patch new file mode 100644 index 0000000000..1ae5076da9 --- /dev/null +++ b/target/linux/at91/patches-5.15/245-clk-at91-sama7g5-remove-prescaler-part-of-master-clo.patch @@ -0,0 +1,45 @@ +From 91a49481af7332853c4c921d46aded8210572210 Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea <claudiu.beznea@microchip.com> +Date: Mon, 11 Oct 2021 14:27:17 +0300 +Subject: [PATCH 245/247] clk: at91: sama7g5: remove prescaler part of master + clock + +On SAMA7G5 the prescaler part of master clock has been implemented as a +changeable one. Everytime the prescaler is changed the PMC_SR.MCKRDY bit +must be polled. Value 1 for PMC_SR.MCKRDY means the prescaler update is +done. Driver polls for this bit until it becomes 1. On SAMA7G5 it has +been discovered that in some conditions the PMC_SR.MCKRDY is not rising +but the rate it provides it's stable. The workaround is to add a timeout +when polling for PMC_SR.MCKRDY. At the moment, for SAMA7G5, the prescaler +will be removed from Linux clock tree as all the frequencies for CPU could +be obtained from PLL and also there will be less overhead when changing +frequency via DVFS. + +Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> +Link: https://lore.kernel.org/r/20211011112719.3951784-14-claudiu.beznea@microchip.com +Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> +Signed-off-by: Stephen Boyd <sboyd@kernel.org> +--- + drivers/clk/at91/sama7g5.c | 11 +---------- + 1 file changed, 1 insertion(+), 10 deletions(-) + +--- a/drivers/clk/at91/sama7g5.c ++++ b/drivers/clk/at91/sama7g5.c +@@ -992,16 +992,7 @@ static void __init sama7g5_pmc_setup(str + } + + parent_names[0] = "cpupll_divpmcck"; +- hw = at91_clk_register_master_pres(regmap, "cpuck", 1, parent_names, +- &mck0_layout, &mck0_characteristics, +- &pmc_mck0_lock, +- CLK_SET_RATE_PARENT, 0); +- if (IS_ERR(hw)) +- goto err_free; +- +- sama7g5_pmc->chws[PMC_CPU] = hw; +- +- hw = at91_clk_register_master_div(regmap, "mck0", "cpuck", ++ hw = at91_clk_register_master_div(regmap, "mck0", "cpupll_divpmcck", + &mck0_layout, &mck0_characteristics, + &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5); + if (IS_ERR(hw)) |