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Diffstat (limited to 'target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch')
-rw-r--r--target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch34
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch b/target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch
new file mode 100644
index 0000000000..64bb3ec5d6
--- /dev/null
+++ b/target/linux/at91/patches-2.6.25/009-fdl-uartinit.patch
@@ -0,0 +1,34 @@
+--- linux-2.6.25.10.old/arch/arm/mach-at91/at91rm9200_devices.c 2008-07-04 15:04:13.000000000 +0200
++++ linux-2.6.25.10/arch/arm/mach-at91/at91rm9200_devices.c 2008-07-04 15:11:44.000000000 +0200
+@@ -981,7 +981,15 @@
+ * We need to drive the pin manually. Default is off (RTS is active low).
+ */
+ at91_set_gpio_output(AT91_PIN_PA21, 1);
+- }
++ }
++ if (pins & ATMEL_UART_DTR)
++ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
++ if (pins & ATMEL_UART_RI)
++ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
++ if (pins & ATMEL_UART_DCD) {
++ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
++ at91_set_deglitch(AT91_PIN_PA19, 1);
++ }
+ }
+
+ static struct resource uart1_resources[] = {
+@@ -1119,6 +1127,14 @@
+ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
+ if (pins & ATMEL_UART_RTS)
+ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
++ if (pins & ATMEL_UART_DTR)
++ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
++ if (pins & ATMEL_UART_RI)
++ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
++ if (pins & ATMEL_UART_DCD) {
++ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
++ at91_set_deglitch(AT91_PIN_PA24, 1);
++ }
+ }
+
+ static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */