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-rw-r--r--package/ifxmips-dsl-api/patches/100-dsl_compat.patch43
-rw-r--r--package/ifxmips-dsl-api/patches/200-mei_compat.patch95
-rw-r--r--package/ifxmips-dsl-api/patches/300-atm_compat.patch168
3 files changed, 306 insertions, 0 deletions
diff --git a/package/ifxmips-dsl-api/patches/100-dsl_compat.patch b/package/ifxmips-dsl-api/patches/100-dsl_compat.patch
new file mode 100644
index 0000000000..a3b9930c20
--- /dev/null
+++ b/package/ifxmips-dsl-api/patches/100-dsl_compat.patch
@@ -0,0 +1,43 @@
+Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/include/drv_dsl_cpe_device_danube.h 2009-05-12 20:02:16.000000000 +0200
++++ drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h 2009-11-01 00:57:23.000000000 +0100
+@@ -24,7 +24,7 @@
+ #include "drv_dsl_cpe_simulator_danube.h"
+ #else
+ /* Include for the low level driver interface header file */
+-#include "asm/ifx/ifx_mei_bsp.h"
++#include "mei/ifxmips_mei_interface.h"
+ #endif /* defined(DSL_CPE_SIMULATOR_DRIVER) && defined(WIN32)*/
+
+ #define DSL_MAX_LINE_NUMBER 1
+Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/common/drv_dsl_cpe_os_linux.c 2009-11-01 01:00:08.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c 2009-11-01 01:03:51.000000000 +0100
+@@ -11,6 +11,7 @@
+ #ifdef __LINUX__
+
+ #define DSL_INTERN
++#include <linux/device.h>
+
+ #include "drv_dsl_cpe_api.h"
+ #include "drv_dsl_cpe_api_ioctl.h"
+@@ -1058,6 +1059,7 @@
+ /* Entry point of driver */
+ int __init DSL_ModuleInit(void)
+ {
++ struct class *dsl_class;
+ DSL_int_t i;
+
+ printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF,
+@@ -1104,7 +1106,8 @@
+ }
+
+ DSL_DRV_DevNodeInit();
+-
++ dsl_class = class_create(THIS_MODULE, "dsl_cpe_api");
++ device_create(dsl_class, NULL, MKDEV(DRV_DSL_CPE_API_DEV_MAJOR, 0), NULL, "dsl_cpe_api");
+ return 0;
+ }
+
diff --git a/package/ifxmips-dsl-api/patches/200-mei_compat.patch b/package/ifxmips-dsl-api/patches/200-mei_compat.patch
new file mode 100644
index 0000000000..ae2d593505
--- /dev/null
+++ b/package/ifxmips-dsl-api/patches/200-mei_compat.patch
@@ -0,0 +1,95 @@
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_mei.c 2009-10-31 23:30:20.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c 2009-11-01 04:41:58.000000000 +0100
+@@ -41,18 +41,19 @@
+ #include <linux/init.h>
+ #include <linux/ioport.h>
+ #include <linux/delay.h>
++#include <linux/device.h>
+ #include <asm/uaccess.h>
+ #include <asm/hardirq.h>
+-#include <asm/ifx/ifx_regs.h>
+-#include <asm/ifx/irq.h>
+-#include <asm/ifx/ifx_gpio.h>
+-//#include <asm/ifx/ifx_led.h>
+-#include <asm/ifx/ifx_pmu.h>
+-#include <asm/ifx/ifx_atm.h>
++
++#include <ifxmips.h>
++#include <ifxmips_irq.h>
++#include <ifxmips_gpio.h>
++#include <ifxmips_pmu.h>
++#include "ifxmips_atm.h"
+ #define IFX_MEI_BSP
+ #include "ifxmips_mei_interface.h"
+
+-#define IFXMIPS_RCU_RST IFX_RCU_RST_REQ
++/*#define IFXMIPS_RCU_RST IFX_RCU_RST_REQ
+ #define IFXMIPS_RCU_RST_REQ_ARC_JTAG IFX_RCU_RST_REQ_ARC_JTAG
+ #define IFXMIPS_RCU_RST_REQ_DFE IFX_RCU_RST_REQ_DFE
+ #define IFXMIPS_RCU_RST_REQ_AFE IFX_RCU_RST_REQ_AFE
+@@ -76,7 +77,7 @@
+ #define ifxmips_r32(reg) __raw_readl(reg)
+ #define ifxmips_w32(val, reg) __raw_writel(val, reg)
+ #define ifxmips_w32_mask(clear, set, reg) ifxmips_w32((ifxmips_r32(reg) & ~clear) | set, reg)
+-
++*/
+ #define IFX_MEI_EMSG(fmt, args...) printk(KERN_ERR "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args)
+ #define IFX_MEI_DMSG(fmt, args...) printk(KERN_INFO "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args)
+
+@@ -173,7 +174,8 @@
+ extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr);
+ #define MEI_MASK_AND_ACK_IRQ ifxmips_mask_and_ack_irq
+
+-static int dev_major = 105;
++#define MEI_MAJOR 105
++static int dev_major = MEI_MAJOR;
+
+ static struct file_operations bsp_mei_operations = {
+ owner:THIS_MODULE,
+@@ -2294,10 +2296,10 @@
+ IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DFEIR]);
+ return -1;
+ }
+- if (request_irq (pDev->nIrq[IFX_DYING_GASP], IFX_MEI_Dying_Gasp_IrqHandle, 0, "DYING_GASP", pDev) != 0) {
++ /*if (request_irq (pDev->nIrq[IFX_DYING_GASP], IFX_MEI_Dying_Gasp_IrqHandle, 0, "DYING_GASP", pDev) != 0) {
+ IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DYING_GASP]);
+ return -1;
+- }
++ }*/
+ // IFX_MEI_DMSG("Device %d initialized. IER %#x\n", num, bsp_get_irq_ier(pDev->nIrq[IFX_DYING_GASP]));
+ return 0;
+ }
+@@ -2922,6 +2924,7 @@
+ IFX_MEI_ModuleInit (void)
+ {
+ int i = 0;
++ static struct class *dsl_class;
+
+ printk ("IFX MEI Version %ld.%02ld.%02ld", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision);
+
+@@ -2935,14 +2938,15 @@
+ IFX_MEI_InitProcFS (i);
+ #endif
+ }
+- for (i = 0; i <= DSL_BSP_CB_LAST ; i++)
++ for (i = 0; i <= DSL_BSP_CB_LAST ; i++)
+ dsl_bsp_event_callback[i].function = NULL;
+
+ #ifdef CONFIG_IFXMIPS_MEI_FW_LOOPBACK
+ printk(KERN_INFO "[%s %s %d]: Start loopback test...\n", __FILE__, __func__, __LINE__);
+ DFE_Loopback_Test ();
+ #endif
+-
++ dsl_class = class_create(THIS_MODULE, "ifx_mei");
++ device_create(dsl_class, NULL, MKDEV(MEI_MAJOR, 0), NULL, "ifx_mei");
+ return 0;
+ }
+
+@@ -2996,3 +3000,5 @@
+
+ module_init (IFX_MEI_ModuleInit);
+ module_exit (IFX_MEI_ModuleExit);
++
++MODULE_LICENSE("Dual BSD/GPL");
diff --git a/package/ifxmips-dsl-api/patches/300-atm_compat.patch b/package/ifxmips-dsl-api/patches/300-atm_compat.patch
new file mode 100644
index 0000000000..35c7b13f80
--- /dev/null
+++ b/package/ifxmips-dsl-api/patches/300-atm_compat.patch
@@ -0,0 +1,168 @@
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.c 2009-11-01 14:29:05.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c 2009-11-01 16:07:46.000000000 +0100
+@@ -58,9 +58,8 @@
+ /*
+ * Chip Specific Head File
+ */
+-#include <asm/ifx/ifx_types.h>
+-#include <asm/ifx/ifx_regs.h>
+-#include <asm/ifx/common_routines.h>
++#include <ifxmips.h>
++#include <ifxmips_cgu.h>
+ #include "ifxmips_atm_core.h"
+
+
+@@ -1146,7 +1145,7 @@
+
+ static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue)
+ {
+- unsigned int qsb_clk = ifx_get_fpi_hz();
++ unsigned int qsb_clk = ifxmips_get_fpi_hz();
+ unsigned int qsb_qid = queue + FIRST_QSB_QID;
+ union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}};
+ union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}};
+@@ -1318,7 +1317,7 @@
+
+ static void qsb_global_set(void)
+ {
+- unsigned int qsb_clk = ifx_get_fpi_hz();
++ unsigned int qsb_clk = ifxmips_get_fpi_hz();
+ int i;
+ unsigned int tmp1, tmp2, tmp3;
+
+@@ -2505,3 +2504,4 @@
+
+ module_init(ifx_atm_init);
+ module_exit(ifx_atm_exit);
++MODULE_LICENSE("Dual BSD/GPL");
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_common.h 2009-11-01 14:30:55.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h 2009-11-01 15:58:50.000000000 +0100
+@@ -1,9 +1,10 @@
+ #ifndef IFXMIPS_ATM_PPE_COMMON_H
+ #define IFXMIPS_ATM_PPE_COMMON_H
+
+-
+-
+-#if defined(CONFIG_DANUBE)
++#if defined(CONFIG_IFXMIPS)
++ #include "ifxmips_atm_ppe_danube.h"
++ #define CONFIG_DANUBE
++#elif defined(CONFIG_DANUBE)
+ #include "ifxmips_atm_ppe_danube.h"
+ #elif defined(CONFIG_AMAZON_SE)
+ #include "ifxmips_atm_ppe_amazon_se.h"
+@@ -16,7 +17,6 @@
+ #endif
+
+
+-
+ /*
+ * Code/Data Memory (CDM) Interface Configuration Register
+ */
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.h 2009-11-01 14:30:55.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h 2009-11-01 15:58:50.000000000 +0100
+@@ -25,8 +25,8 @@
+ #define IFXMIPS_ATM_CORE_H
+
+
+-
+-#include <asm/ifx/ifx_atm.h>
++#include "ifxmips_compat.h"
++#include "ifx_atm.h"
+ #include "ifxmips_atm_ppe_common.h"
+ #include "ifxmips_atm_fw_regs_common.h"
+
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h 2009-11-01 15:58:50.000000000 +0100
+@@ -0,0 +1,43 @@
++#ifndef _IFXMIPS_COMPAT_H__
++#define _IFXMIPS_COMPAT_H__
++
++#define IFX_SUCCESS 0
++#define IFX_ERROR (-1)
++
++#define ATM_VBR_NRT ATM_VBR
++#define ATM_VBR_RT 6
++#define ATM_UBR_PLUS 7
++#define ATM_GFR 8
++
++#define NUM_ENTITY(x) (sizeof(x) / sizeof(*(x)))
++
++#define SET_BITS(x, msb, lsb, value) \
++ (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
++
++
++#define IFX_PMU_ENABLE 1
++#define IFX_PMU_DISABLE 0
++
++#define IFX_PMU_MODULE_DSL_DFE (1 << 9)
++#define IFX_PMU_MODULE_AHBS (1 << 13)
++#define IFX_PMU_MODULE_PPE_QSB (1 << 18)
++#define IFX_PMU_MODULE_PPE_SLL01 (1 << 19)
++#define IFX_PMU_MODULE_PPE_TC (1 << 21)
++#define IFX_PMU_MODULE_PPE_EMA (1 << 22)
++#define IFX_PMU_MODULE_PPE_TOP (1 << 29)
++
++#define ifx_pmu_set(a,b) {if(a == IFX_PMU_ENABLE) ifxmips_pmu_enable(b); else ifxmips_pmu_disable(b);}
++
++#define PPE_TOP_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))
++#define PPE_SLL01_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_SLL01, (__x))
++#define PPE_TC_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TC, (__x))
++#define PPE_EMA_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_EMA, (__x))
++#define PPE_QSB_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_QSB, (__x))
++#define PPE_TPE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_AHBS, (__x))
++#define DSL_DFE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_DSL_DFE, (__x))
++
++#define IFX_REG_W32(_v, _r) __raw_writel((_v), (_r))
++
++#define CONFIG_IFXMIPS_DSL_CPE_MEI y
++
++#endif
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_danube.h 2009-11-01 14:30:55.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h 2009-11-01 15:58:50.000000000 +0100
+@@ -1,7 +1,7 @@
+ #ifndef IFXMIPS_ATM_PPE_DANUBE_H
+ #define IFXMIPS_ATM_PPE_DANUBE_H
+
+-
++#include <ifxmips_irq.h>
+
+ /*
+ * FPI Configuration Bus Register and Memory Address Mapping
+@@ -93,7 +93,7 @@
+ /*
+ * Mailbox IGU1 Interrupt
+ */
+-#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24
++#define PPE_MAILBOX_IGU1_INT IFXMIPS_PPE_MBOX_INT
+
+
+
+Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c
+===================================================================
+--- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_danube.c 2009-11-01 14:29:18.000000000 +0100
++++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c 2009-11-01 15:58:50.000000000 +0100
+@@ -45,10 +45,9 @@
+ /*
+ * Chip Specific Head File
+ */
+-#include <asm/ifx/ifx_types.h>
+-#include <asm/ifx/ifx_regs.h>
+-#include <asm/ifx/common_routines.h>
+-#include <asm/ifx/ifx_pmu.h>
++#include <ifxmips.h>
++#include <ifxmips_pmu.h>
++#include "ifxmips_compat.h"
+ #include "ifxmips_atm_core.h"
+ #include "ifxmips_atm_fw_danube.h"
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 22:35:25 +0000