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-rw-r--r--package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch69
1 files changed, 69 insertions, 0 deletions
diff --git a/package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch b/package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch
new file mode 100644
index 0000000000..17542dd54d
--- /dev/null
+++ b/package/boot/uboot-layerscape/patches/0042-DNCPE-138-Rest-external-PHYs.patch
@@ -0,0 +1,69 @@
+From 63acb257c32bd86abbad5abcc002d6c78b72f0ab Mon Sep 17 00:00:00 2001
+From: Anji J <anji.jagarlmudi@freescale.com>
+Date: Mon, 16 May 2016 20:21:38 +0530
+Subject: [PATCH 42/93] DNCPE-138 Rest external PHYs
+
+Need to reset external PHYs through IO expander for proper function.
+
+Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>>
+Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
+---
+ board/freescale/ls1012ardb/eth.c | 14 ++++++++++++++
+ include/configs/ls1012ardb.h | 9 +++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
+index 29830e8..24fdd83 100644
+--- a/board/freescale/ls1012ardb/eth.c
++++ b/board/freescale/ls1012ardb/eth.c
+@@ -20,6 +20,20 @@
+
+ #define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
+
++
++void reset_phy(void)
++{
++
++ /*Through reset IO expander reset both RGMII and SGMII PHYs */
++ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 6, __PHY_MASK);
++ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, __PHY_ETH2_MASK);
++ mdelay(10);
++ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, __PHY_ETH1_MASK);
++ mdelay(10);
++ i2c_reg_write(CONFIG_SYS_I2C_RESET_IO_EXPANDER, 2, 0xFF);
++ mdelay(50);
++}
++
+ int board_eth_init(bd_t *bis)
+ {
+ #ifdef CONFIG_FSL_PPFE
+diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
+index 1b72bf1..23722e0 100644
+--- a/include/configs/ls1012ardb.h
++++ b/include/configs/ls1012ardb.h
+@@ -24,6 +24,7 @@
+ #define EMAC2_PHY_ADDR 0x1
+ #define CONFIG_PHYLIB
+ #define CONFIG_PHY_REALTEK
++#define CONFIG_RESET_PHY_R
+ #endif
+
+ /*
+@@ -128,6 +129,14 @@
+ #define __SW_REV_A 0xF8
+ #define __SW_REV_B 0xF0
+
++/*
++ *I2C RESET expander
++ */
++#define CONFIG_SYS_I2C_RESET_IO_EXPANDER 0x25
++#define __PHY_MASK 0xF9
++#define __PHY_ETH2_MASK 0xFB
++#define __PHY_ETH1_MASK 0xFD
++
+ #define CONFIG_CMD_MEMINFO
+ #define CONFIG_CMD_MEMTEST
+ #define CONFIG_SYS_MEMTEST_START 0x80000000
+--
+1.7.9.5
+