diff options
7 files changed, 955 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/860-brcmsmac-use-bcma-PCIe-up-and-down-functions.patch b/package/kernel/mac80211/patches/860-brcmsmac-use-bcma-PCIe-up-and-down-functions.patch new file mode 100644 index 0000000000..d89b9847a3 --- /dev/null +++ b/package/kernel/mac80211/patches/860-brcmsmac-use-bcma-PCIe-up-and-down-functions.patch @@ -0,0 +1,84 @@ +brcmsmac: use bcma PCIe up and down functions + +replace the calls to bcma_core_pci_extend_L1timer() by calls to the +newly introduced bcma_core_pci_ip() and bcma_core_pci_down() + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + +--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c ++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c +@@ -679,27 +679,6 @@ bool ai_clkctl_cc(struct si_pub *sih, en + return mode == BCMA_CLKMODE_FAST; + } + +-void ai_pci_up(struct si_pub *sih) +-{ +- struct si_info *sii; +- +- sii = container_of(sih, struct si_info, pub); +- +- if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI) +- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true); +-} +- +-/* Unconfigure and/or apply various WARs when going down */ +-void ai_pci_down(struct si_pub *sih) +-{ +- struct si_info *sii; +- +- sii = container_of(sih, struct si_info, pub); +- +- if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI) +- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false); +-} +- + /* Enable BT-COEX & Ex-PA for 4313 */ + void ai_epa_4313war(struct si_pub *sih) + { +--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h ++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h +@@ -183,9 +183,6 @@ extern u16 ai_clkctl_fast_pwrup_delay(st + extern bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode); + extern bool ai_deviceremoved(struct si_pub *sih); + +-extern void ai_pci_down(struct si_pub *sih); +-extern void ai_pci_up(struct si_pub *sih); +- + /* Enable Ex-PA for 4313 */ + extern void ai_epa_4313war(struct si_pub *sih); + +--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c ++++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c +@@ -4667,7 +4667,7 @@ static int brcms_b_attach(struct brcms_c + brcms_c_coredisable(wlc_hw); + + /* Match driver "down" state */ +- ai_pci_down(wlc_hw->sih); ++ bcma_core_pci_down(wlc_hw->d11core->bus); + + /* turn off pll and xtal to match driver "down" state */ + brcms_b_xtal(wlc_hw, OFF); +@@ -5010,12 +5010,12 @@ static int brcms_b_up_prep(struct brcms_ + */ + if (brcms_b_radio_read_hwdisabled(wlc_hw)) { + /* put SB PCI in down state again */ +- ai_pci_down(wlc_hw->sih); ++ bcma_core_pci_down(wlc_hw->d11core->bus); + brcms_b_xtal(wlc_hw, OFF); + return -ENOMEDIUM; + } + +- ai_pci_up(wlc_hw->sih); ++ bcma_core_pci_up(wlc_hw->d11core->bus); + + /* reset the d11 core */ + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); +@@ -5212,7 +5212,7 @@ static int brcms_b_down_finish(struct br + + /* turn off primary xtal and pll */ + if (!wlc_hw->noreset) { +- ai_pci_down(wlc_hw->sih); ++ bcma_core_pci_down(wlc_hw->d11core->bus); + brcms_b_xtal(wlc_hw, OFF); + } + } diff --git a/package/kernel/mac80211/patches/861-b43-call-PCIe-up-and-down-functions.patch b/package/kernel/mac80211/patches/861-b43-call-PCIe-up-and-down-functions.patch new file mode 100644 index 0000000000..f09cc3ee89 --- /dev/null +++ b/package/kernel/mac80211/patches/861-b43-call-PCIe-up-and-down-functions.patch @@ -0,0 +1,36 @@ +b43: call PCIe up and down functions + +Tell the PCIe host core when the wifi is activated. + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + +--- a/drivers/net/wireless/b43/main.c ++++ b/drivers/net/wireless/b43/main.c +@@ -4670,6 +4670,19 @@ static void b43_wireless_core_exit(struc + b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN, + B43_MACCTL_PSM_JMP0); + ++ switch (dev->dev->bus_type) { ++#ifdef CPTCFG_B43_BCMA ++ case B43_BUS_BCMA: ++ bcma_core_pci_down(dev->dev->bdev->bus); ++ break; ++#endif ++#ifdef CPTCFG_B43_SSB ++ case B43_BUS_SSB: ++ /* TODO */ ++ break; ++#endif ++ } ++ + b43_dma_free(dev); + b43_pio_free(dev); + b43_chip_exit(dev); +@@ -4709,6 +4722,7 @@ static int b43_wireless_core_init(struct + case B43_BUS_BCMA: + bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci[0], + dev->dev->bdev, true); ++ bcma_core_pci_up(dev->dev->bdev->bus); + break; + #endif + #ifdef CPTCFG_B43_SSB diff --git a/target/linux/generic/patches-3.10/026-bcma_pcie_up_down.patch b/target/linux/generic/patches-3.10/026-bcma_pcie_up_down.patch new file mode 100644 index 0000000000..4dbf685b94 --- /dev/null +++ b/target/linux/generic/patches-3.10/026-bcma_pcie_up_down.patch @@ -0,0 +1,167 @@ +bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets +called by b43 and brcmsmac + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + +--- a/drivers/bcma/driver_pci.c ++++ b/drivers/bcma/driver_pci.c +@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_ + pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); + } + +-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) ++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) + { + u32 v; + int i; +@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc + } + } + +-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) ++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) + { + int max_retries = 10; + u16 ret = 0; +@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc + return ret; + } + +-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, ++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, + u8 address, u16 data) + { + int max_retries = 10; +@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); + } + ++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device, ++ u8 address, u16 data) ++{ ++ bcma_pcie_mdio_write(pc, device, address, data); ++ return bcma_pcie_mdio_read(pc, device, address); ++} ++ + /************************************************** + * Workarounds. + **************************************************/ +@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s + } + } + ++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) ++{ ++ u16 data; ++ ++ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { ++ data = up ? 0x74 : 0x7C; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { ++ data = up ? 0x75 : 0x7D; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } ++} ++ + /************************************************** + * Init. + **************************************************/ +@@ -262,7 +288,7 @@ out: + } + EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); + +-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) ++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) + { + u32 w; + +@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct + bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); + bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); + } +-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer); ++ ++void bcma_core_pci_up(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_power_save(pc, true); ++ ++ bcma_core_pci_extend_L1timer(pc, true); ++ ++ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) && ++ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) { ++ pcie_set_readrq(bus->host_pci, 128); ++ } ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_up); ++ ++void bcma_core_pci_down(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_extend_L1timer(pc, false); ++ ++ bcma_core_pci_power_save(pc, false); ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_down); +--- a/include/linux/bcma/bcma_driver_pci.h ++++ b/include/linux/bcma/bcma_driver_pci.h +@@ -181,10 +181,31 @@ struct pci_dev; + + #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 + ++#define BCMA_CORE_PCI_ ++ ++/* MDIO devices (SERDES modules) */ ++#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 ++#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 ++#define BCMA_CORE_PCI_MDIO_BLK0 0x800 ++#define BCMA_CORE_PCI_MDIO_BLK1 0x801 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A ++#define BCMA_CORE_PCI_MDIO_BLK2 0x802 ++#define BCMA_CORE_PCI_MDIO_BLK3 0x803 ++#define BCMA_CORE_PCI_MDIO_BLK4 0x804 ++#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ ++#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 ++#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 ++#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 ++ + /* PCIE Root Capability Register bits (Host mode only) */ + #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 + + struct bcma_drv_pci; ++struct bcma_bus; + + #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE + struct bcma_drv_pci_host { +@@ -219,7 +240,8 @@ struct bcma_drv_pci { + extern void bcma_core_pci_init(struct bcma_drv_pci *pc); + extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, + struct bcma_device *core, bool enable); +-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); ++extern void bcma_core_pci_up(struct bcma_bus *bus); ++extern void bcma_core_pci_down(struct bcma_bus *bus); + + extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); + extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev); diff --git a/target/linux/generic/patches-3.3/026-bcma_pcie_up_down.patch b/target/linux/generic/patches-3.3/026-bcma_pcie_up_down.patch new file mode 100644 index 0000000000..3f5ab444b7 --- /dev/null +++ b/target/linux/generic/patches-3.3/026-bcma_pcie_up_down.patch @@ -0,0 +1,167 @@ +bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets +called by b43 and brcmsmac + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + +--- a/drivers/bcma/driver_pci.c ++++ b/drivers/bcma/driver_pci.c +@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_ + pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); + } + +-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) ++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) + { + u32 v; + int i; +@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc + } + } + +-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) ++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) + { + int max_retries = 10; + u16 ret = 0; +@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc + return ret; + } + +-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, ++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, + u8 address, u16 data) + { + int max_retries = 10; +@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); + } + ++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device, ++ u8 address, u16 data) ++{ ++ bcma_pcie_mdio_write(pc, device, address, data); ++ return bcma_pcie_mdio_read(pc, device, address); ++} ++ + /************************************************** + * Workarounds. + **************************************************/ +@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s + } + } + ++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) ++{ ++ u16 data; ++ ++ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { ++ data = up ? 0x74 : 0x7C; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { ++ data = up ? 0x75 : 0x7D; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } ++} ++ + /************************************************** + * Init. + **************************************************/ +@@ -262,7 +288,7 @@ out: + } + EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); + +-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) ++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) + { + u32 w; + +@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct + bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); + bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); + } +-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer); ++ ++void bcma_core_pci_up(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_power_save(pc, true); ++ ++ bcma_core_pci_extend_L1timer(pc, true); ++ ++ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) && ++ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) { ++ pcie_set_readrq(bus->host_pci, 128); ++ } ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_up); ++ ++void bcma_core_pci_down(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_extend_L1timer(pc, false); ++ ++ bcma_core_pci_power_save(pc, false); ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_down); +--- a/include/linux/bcma/bcma_driver_pci.h ++++ b/include/linux/bcma/bcma_driver_pci.h +@@ -181,10 +181,31 @@ struct pci_dev; + + #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 + ++#define BCMA_CORE_PCI_ ++ ++/* MDIO devices (SERDES modules) */ ++#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 ++#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 ++#define BCMA_CORE_PCI_MDIO_BLK0 0x800 ++#define BCMA_CORE_PCI_MDIO_BLK1 0x801 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A ++#define BCMA_CORE_PCI_MDIO_BLK2 0x802 ++#define BCMA_CORE_PCI_MDIO_BLK3 0x803 ++#define BCMA_CORE_PCI_MDIO_BLK4 0x804 ++#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ ++#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 ++#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 ++#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 ++ + /* PCIE Root Capability Register bits (Host mode only) */ + #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 + + struct bcma_drv_pci; ++struct bcma_bus; + + #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE + struct bcma_drv_pci_host { +@@ -219,7 +240,8 @@ struct bcma_drv_pci { + extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc); + extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, + struct bcma_device *core, bool enable); +-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); ++extern void bcma_core_pci_up(struct bcma_bus *bus); ++extern void bcma_core_pci_down(struct bcma_bus *bus); + + extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); + extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev); diff --git a/target/linux/generic/patches-3.6/026-bcma_pcie_up_down.patch b/target/linux/generic/patches-3.6/026-bcma_pcie_up_down.patch new file mode 100644 index 0000000000..4dbf685b94 --- /dev/null +++ b/target/linux/generic/patches-3.6/026-bcma_pcie_up_down.patch @@ -0,0 +1,167 @@ +bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets +called by b43 and brcmsmac + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + +--- a/drivers/bcma/driver_pci.c ++++ b/drivers/bcma/driver_pci.c +@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_ + pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); + } + +-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) ++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) + { + u32 v; + int i; +@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc + } + } + +-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) ++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) + { + int max_retries = 10; + u16 ret = 0; +@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc + return ret; + } + +-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, ++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, + u8 address, u16 data) + { + int max_retries = 10; +@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); + } + ++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device, ++ u8 address, u16 data) ++{ ++ bcma_pcie_mdio_write(pc, device, address, data); ++ return bcma_pcie_mdio_read(pc, device, address); ++} ++ + /************************************************** + * Workarounds. + **************************************************/ +@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s + } + } + ++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) ++{ ++ u16 data; ++ ++ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { ++ data = up ? 0x74 : 0x7C; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { ++ data = up ? 0x75 : 0x7D; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } ++} ++ + /************************************************** + * Init. + **************************************************/ +@@ -262,7 +288,7 @@ out: + } + EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); + +-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) ++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) + { + u32 w; + +@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct + bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); + bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); + } +-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer); ++ ++void bcma_core_pci_up(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_power_save(pc, true); ++ ++ bcma_core_pci_extend_L1timer(pc, true); ++ ++ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) && ++ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) { ++ pcie_set_readrq(bus->host_pci, 128); ++ } ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_up); ++ ++void bcma_core_pci_down(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_extend_L1timer(pc, false); ++ ++ bcma_core_pci_power_save(pc, false); ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_down); +--- a/include/linux/bcma/bcma_driver_pci.h ++++ b/include/linux/bcma/bcma_driver_pci.h +@@ -181,10 +181,31 @@ struct pci_dev; + + #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 + ++#define BCMA_CORE_PCI_ ++ ++/* MDIO devices (SERDES modules) */ ++#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 ++#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 ++#define BCMA_CORE_PCI_MDIO_BLK0 0x800 ++#define BCMA_CORE_PCI_MDIO_BLK1 0x801 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A ++#define BCMA_CORE_PCI_MDIO_BLK2 0x802 ++#define BCMA_CORE_PCI_MDIO_BLK3 0x803 ++#define BCMA_CORE_PCI_MDIO_BLK4 0x804 ++#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ ++#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 ++#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 ++#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 ++ + /* PCIE Root Capability Register bits (Host mode only) */ + #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 + + struct bcma_drv_pci; ++struct bcma_bus; + + #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE + struct bcma_drv_pci_host { +@@ -219,7 +240,8 @@ struct bcma_drv_pci { + extern void bcma_core_pci_init(struct bcma_drv_pci *pc); + extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, + struct bcma_device *core, bool enable); +-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); ++extern void bcma_core_pci_up(struct bcma_bus *bus); ++extern void bcma_core_pci_down(struct bcma_bus *bus); + + extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); + extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev); diff --git a/target/linux/generic/patches-3.8/026-bcma_pcie_up_down.patch b/target/linux/generic/patches-3.8/026-bcma_pcie_up_down.patch new file mode 100644 index 0000000000..4dbf685b94 --- /dev/null +++ b/target/linux/generic/patches-3.8/026-bcma_pcie_up_down.patch @@ -0,0 +1,167 @@ +bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets +called by b43 and brcmsmac + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + +--- a/drivers/bcma/driver_pci.c ++++ b/drivers/bcma/driver_pci.c +@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_ + pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); + } + +-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) ++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) + { + u32 v; + int i; +@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc + } + } + +-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) ++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) + { + int max_retries = 10; + u16 ret = 0; +@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc + return ret; + } + +-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, ++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, + u8 address, u16 data) + { + int max_retries = 10; +@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); + } + ++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device, ++ u8 address, u16 data) ++{ ++ bcma_pcie_mdio_write(pc, device, address, data); ++ return bcma_pcie_mdio_read(pc, device, address); ++} ++ + /************************************************** + * Workarounds. + **************************************************/ +@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s + } + } + ++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) ++{ ++ u16 data; ++ ++ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { ++ data = up ? 0x74 : 0x7C; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { ++ data = up ? 0x75 : 0x7D; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } ++} ++ + /************************************************** + * Init. + **************************************************/ +@@ -262,7 +288,7 @@ out: + } + EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); + +-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) ++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) + { + u32 w; + +@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct + bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); + bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); + } +-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer); ++ ++void bcma_core_pci_up(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_power_save(pc, true); ++ ++ bcma_core_pci_extend_L1timer(pc, true); ++ ++ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) && ++ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) { ++ pcie_set_readrq(bus->host_pci, 128); ++ } ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_up); ++ ++void bcma_core_pci_down(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_extend_L1timer(pc, false); ++ ++ bcma_core_pci_power_save(pc, false); ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_down); +--- a/include/linux/bcma/bcma_driver_pci.h ++++ b/include/linux/bcma/bcma_driver_pci.h +@@ -181,10 +181,31 @@ struct pci_dev; + + #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 + ++#define BCMA_CORE_PCI_ ++ ++/* MDIO devices (SERDES modules) */ ++#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 ++#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 ++#define BCMA_CORE_PCI_MDIO_BLK0 0x800 ++#define BCMA_CORE_PCI_MDIO_BLK1 0x801 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A ++#define BCMA_CORE_PCI_MDIO_BLK2 0x802 ++#define BCMA_CORE_PCI_MDIO_BLK3 0x803 ++#define BCMA_CORE_PCI_MDIO_BLK4 0x804 ++#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ ++#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 ++#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 ++#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 ++ + /* PCIE Root Capability Register bits (Host mode only) */ + #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 + + struct bcma_drv_pci; ++struct bcma_bus; + + #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE + struct bcma_drv_pci_host { +@@ -219,7 +240,8 @@ struct bcma_drv_pci { + extern void bcma_core_pci_init(struct bcma_drv_pci *pc); + extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, + struct bcma_device *core, bool enable); +-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); ++extern void bcma_core_pci_up(struct bcma_bus *bus); ++extern void bcma_core_pci_down(struct bcma_bus *bus); + + extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); + extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev); diff --git a/target/linux/generic/patches-3.9/026-bcma_pcie_up_down.patch b/target/linux/generic/patches-3.9/026-bcma_pcie_up_down.patch new file mode 100644 index 0000000000..4dbf685b94 --- /dev/null +++ b/target/linux/generic/patches-3.9/026-bcma_pcie_up_down.patch @@ -0,0 +1,167 @@ +bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets +called by b43 and brcmsmac + +Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + +--- a/drivers/bcma/driver_pci.c ++++ b/drivers/bcma/driver_pci.c +@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_ + pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); + } + +-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) ++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) + { + u32 v; + int i; +@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc + } + } + +-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) ++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) + { + int max_retries = 10; + u16 ret = 0; +@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc + return ret; + } + +-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, ++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, + u8 address, u16 data) + { + int max_retries = 10; +@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); + } + ++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device, ++ u8 address, u16 data) ++{ ++ bcma_pcie_mdio_write(pc, device, address, data); ++ return bcma_pcie_mdio_read(pc, device, address); ++} ++ + /************************************************** + * Workarounds. + **************************************************/ +@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s + } + } + ++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) ++{ ++ u16 data; ++ ++ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { ++ data = up ? 0x74 : 0x7C; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { ++ data = up ? 0x75 : 0x7D; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } ++} ++ + /************************************************** + * Init. + **************************************************/ +@@ -262,7 +288,7 @@ out: + } + EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); + +-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) ++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) + { + u32 w; + +@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct + bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); + bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); + } +-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer); ++ ++void bcma_core_pci_up(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_power_save(pc, true); ++ ++ bcma_core_pci_extend_L1timer(pc, true); ++ ++ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) && ++ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) { ++ pcie_set_readrq(bus->host_pci, 128); ++ } ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_up); ++ ++void bcma_core_pci_down(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_extend_L1timer(pc, false); ++ ++ bcma_core_pci_power_save(pc, false); ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_down); +--- a/include/linux/bcma/bcma_driver_pci.h ++++ b/include/linux/bcma/bcma_driver_pci.h +@@ -181,10 +181,31 @@ struct pci_dev; + + #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 + ++#define BCMA_CORE_PCI_ ++ ++/* MDIO devices (SERDES modules) */ ++#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 ++#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 ++#define BCMA_CORE_PCI_MDIO_BLK0 0x800 ++#define BCMA_CORE_PCI_MDIO_BLK1 0x801 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A ++#define BCMA_CORE_PCI_MDIO_BLK2 0x802 ++#define BCMA_CORE_PCI_MDIO_BLK3 0x803 ++#define BCMA_CORE_PCI_MDIO_BLK4 0x804 ++#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ ++#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 ++#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 ++#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 ++ + /* PCIE Root Capability Register bits (Host mode only) */ + #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 + + struct bcma_drv_pci; ++struct bcma_bus; + + #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE + struct bcma_drv_pci_host { +@@ -219,7 +240,8 @@ struct bcma_drv_pci { + extern void bcma_core_pci_init(struct bcma_drv_pci *pc); + extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, + struct bcma_device *core, bool enable); +-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); ++extern void bcma_core_pci_up(struct bcma_bus *bus); ++extern void bcma_core_pci_down(struct bcma_bus *bus); + + extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); + extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev); |