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| author | Petr Štetiar <ynezz@true.cz> | 2018-11-20 00:16:27 +0100 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2019-03-05 03:15:52 +0100 |
| commit | 368b6d1a52e57e9cce3b92fcef6928bee995617b (patch) | |
| tree | 199224602356ef7f11d34151c23e2bade5e62640 /target | |
| parent | 47f0be676fb700a8ab071fd0fe6f5d818548a852 (diff) | |
| download | upstream-368b6d1a52e57e9cce3b92fcef6928bee995617b.tar.gz upstream-368b6d1a52e57e9cce3b92fcef6928bee995617b.tar.bz2 upstream-368b6d1a52e57e9cce3b92fcef6928bee995617b.zip | |
ath79: gmac: ar934x: Add parser for mii-gmac0-slave
While converting Nanostation M XW from current ar71xx code to ath79 I've
hit one issue, where the ethernet networking wasn't working, so I was
checking every bit in the networking setup path between ar71xx and
ath79.
I've came to the following code in ar71xx/mach-ubnt-xm.c:
static void __init ubnt_xw_init(void) {
...
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 |
AR934X_ETH_CFG_MII_GMAC0_SLAVE);
...
}
Where this code is setting AR934X_ETH_CFG_MII_GMAC0_SLAVE bit in
AR934X_GMAC_REG_ETH_CFG register, but I couldn't find a way of setting
this bit from DTS, so this patch adds `mii-gmac0-slave` DTS property
which allows setting of this bit in `gmac-config`, which is then used in
Nanostation M XW DTS.
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c index e69abb6438..cc0a15d3a4 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c @@ -53,6 +53,7 @@ static void ag71xx_setup_gmac_934x(struct device_node *np, void __iomem *base) ag71xx_of_bit(np, "rgmii-gmac0", &val, AR934X_ETH_CFG_RGMII_GMAC0); ag71xx_of_bit(np, "mii-gmac0", &val, AR934X_ETH_CFG_MII_GMAC0); + ag71xx_of_bit(np, "mii-gmac0-slave", &val, AR934X_ETH_CFG_MII_GMAC0_SLAVE); ag71xx_of_bit(np, "gmii-gmac0", &val, AR934X_ETH_CFG_GMII_GMAC0); ag71xx_of_bit(np, "switch-phy-swap", &val, AR934X_ETH_CFG_SW_PHY_SWAP); ag71xx_of_bit(np, "switch-only-mode", &val, |