diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2011-04-07 20:53:00 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2011-04-07 20:53:00 +0000 |
| commit | 25693b4769fe42cc518ba865f835f61341e80d30 (patch) | |
| tree | e421dfef02a63ad8666eb53326b579891517c1bd /target | |
| parent | 334a5ec36e95a8f0e037a5ffe70b223f112ca491 (diff) | |
| download | upstream-25693b4769fe42cc518ba865f835f61341e80d30.tar.gz upstream-25693b4769fe42cc518ba865f835f61341e80d30.tar.bz2 upstream-25693b4769fe42cc518ba865f835f61341e80d30.zip | |
ar71xx: enable GPIO support for the AR934x SoCs
Signed-off-by: Jaiganesh Narayanan <jnarayanan@atheros.com>
SVN-Revision: 26513
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c | 6 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c index cdb614bbe1..0ee6847003 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c @@ -172,6 +172,12 @@ void __init ar71xx_gpio_init(void) ar71xx_gpio_chip.ngpio = AR91XX_GPIO_COUNT; break; + case AR71XX_SOC_AR9341: + case AR71XX_SOC_AR9342: + case AR71XX_SOC_AR9344: + ar71xx_gpio_chip.ngpio = AR934X_GPIO_COUNT; + break; + default: BUG(); } diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h index ab00d19e18..e671f58ed7 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -427,6 +427,12 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg) #define AR91XX_GPIO_COUNT 22 +#define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14) +#define AR934X_GPIO_FUNC_SPI_CS_0_EN BIT(13) + +#define AR934X_GPIO_COUNT 32 +#define AR934X_GPIO_FUNC_DDR_DQOE_EN BIT(17) + extern void __iomem *ar71xx_gpio_base; static inline void ar71xx_gpio_wr(unsigned reg, u32 value) |