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author | John Crispin <john@openwrt.org> | 2015-08-17 06:15:44 +0000 |
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committer | John Crispin <john@openwrt.org> | 2015-08-17 06:15:44 +0000 |
commit | 09851afd33145dc293f0e2900a6f61d0c90f1980 (patch) | |
tree | 7e4c6760fc772305280a151bbc41a40fd0eefda5 /target | |
parent | 9ed654e389efe969785f7b0e4c40c9c63fed9bbe (diff) | |
download | upstream-09851afd33145dc293f0e2900a6f61d0c90f1980.tar.gz upstream-09851afd33145dc293f0e2900a6f61d0c90f1980.tar.bz2 upstream-09851afd33145dc293f0e2900a6f61d0c90f1980.zip |
ramips: Fix amount of MT7621 pins controlled by spi group
The PINS conntrolled by the SPI bits in the GPIO_MODE register is always
7 and not 8 for nand mode.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46644
Diffstat (limited to 'target')
-rw-r--r-- | target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch index f08ecb0326..7c29fbeedb 100644 --- a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch +++ b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch @@ -593,7 +593,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +static struct rt2880_pmx_func rgmii2_grp[] = { FUNC("rgmii", 0, 22, 12) }; +static struct rt2880_pmx_func spi_grp[] = { + FUNC("spi", 0, 34, 7), -+ FUNC("nand", 2, 34, 8), ++ FUNC("nand", 2, 34, 7), +}; +static struct rt2880_pmx_func sdhci_grp[] = { + FUNC("sdhci", 0, 41, 8), |