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| author | Chuanhong Guo <gch981213@gmail.com> | 2020-02-09 23:05:04 +0800 |
|---|---|---|
| committer | Chuanhong Guo <gch981213@gmail.com> | 2020-02-10 11:59:20 +0800 |
| commit | 9c19c35d1ee3af7dc4f173871ab774d8d30a4e18 (patch) | |
| tree | 4dba41a60dc548c1e2c4b92502ad1efa4b8617c0 /target/linux | |
| parent | 7df120b1b0e8ea37ac6112f3cd0813bed1e286f5 (diff) | |
| download | upstream-9c19c35d1ee3af7dc4f173871ab774d8d30a4e18.tar.gz upstream-9c19c35d1ee3af7dc4f173871ab774d8d30a4e18.tar.bz2 upstream-9c19c35d1ee3af7dc4f173871ab774d8d30a4e18.zip | |
ath79: restore pin state on probe for ar934x-spi
If bootloader doesn't terminate its last spi operation properly
before starting kernel, our first transfer in kernel becomes a
continuous transfer to that request instead of a new one.
Fix this flaw by restoring IOC register, which restored all pin
state to default.
Fixes: ebf0d8dade ("ath79: add new ar934x spi driver")
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch b/target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch index 9dbc3dbd4e..9feea723f3 100644 --- a/target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch +++ b/target/linux/ath79/patches-4.19/0051-spi-add-driver-for-ar934x-spi-controller.patch @@ -1,7 +1,7 @@ -From b518f18f89dbd49fe9403a8c92230f1af59219bc Mon Sep 17 00:00:00 2001 +From 7e161c423a232ef7ddf6c11b09ebe471dd5a23cf Mon Sep 17 00:00:00 2001 From: Chuanhong Guo <gch981213@gmail.com> Date: Wed, 5 Feb 2020 18:25:37 +0800 -Subject: [PATCH 1/2] spi: add driver for ar934x spi controller +Subject: [PATCH v4 1/2] spi: add driver for ar934x spi controller This patch adds driver for SPI controller found in Qualcomm Atheros AR934x/QCA95xx SoCs. @@ -13,8 +13,8 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com> --- drivers/spi/Kconfig | 7 ++ drivers/spi/Makefile | 1 + - drivers/spi/spi-ar934x.c | 229 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 237 insertions(+) + drivers/spi/spi-ar934x.c | 235 +++++++++++++++++++++++++++++++++++++++ + 3 files changed, 243 insertions(+) create mode 100644 drivers/spi/spi-ar934x.c --- a/drivers/spi/Kconfig @@ -45,7 +45,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com> obj-$(CONFIG_SPI_ATH79) += spi-ath79.o --- /dev/null +++ b/drivers/spi/spi-ar934x.c -@@ -0,0 +1,229 @@ +@@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs @@ -70,6 +70,9 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com> +#define AR934X_SPI_REG_FS 0x00 +#define AR934X_SPI_ENABLE BIT(0) + ++#define AR934X_SPI_REG_IOC 0x08 ++#define AR934X_SPI_IOC_INITVAL 0x70000 ++ +#define AR934X_SPI_REG_CTRL 0x04 +#define AR934X_SPI_CLK_MASK GENMASK(5, 0) + @@ -227,7 +230,10 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com> + return -ENOMEM; + } + ++ /* disable flash mapping and expose spi controller registers */ + iowrite32(AR934X_SPI_ENABLE, base + AR934X_SPI_REG_FS); ++ /* restore pins to default state: CSn=1 DO=CLK=0 */ ++ iowrite32(AR934X_SPI_IOC_INITVAL, base + AR934X_SPI_REG_IOC); + + ctlr->mode_bits = SPI_LSB_FIRST; + ctlr->setup = ar934x_spi_setup; |