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author | Florian Fainelli <florian@openwrt.org> | 2013-04-05 12:36:41 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2013-04-05 12:36:41 +0000 |
commit | 5eb8ba7f192988669482fe51c68d394ed72cc6ec (patch) | |
tree | 9be3bd1dd9d2eb96fc70bb94d346f4d766d81920 /target/linux | |
parent | f4c09ea5545313d555adf10357d7209950e977c4 (diff) | |
download | upstream-5eb8ba7f192988669482fe51c68d394ed72cc6ec.tar.gz upstream-5eb8ba7f192988669482fe51c68d394ed72cc6ec.tar.bz2 upstream-5eb8ba7f192988669482fe51c68d394ed72cc6ec.zip |
malta: move endianness kernel configuration to subtarget
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 36209
Diffstat (limited to 'target/linux')
-rw-r--r-- | target/linux/malta/config-3.8 | 1 | ||||
-rw-r--r-- | target/linux/malta/le/config-default | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/target/linux/malta/config-3.8 b/target/linux/malta/config-3.8 index 80fbe60fcd..54caec7a43 100644 --- a/target/linux/malta/config-3.8 +++ b/target/linux/malta/config-3.8 @@ -35,7 +35,6 @@ CONFIG_CPU_GENERIC_DUMP_TLB=y CONFIG_CPU_HAS_PREFETCH=y # CONFIG_CPU_HAS_SMARTMIPS is not set CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_MIPS32=y # CONFIG_CPU_MIPS32_R1 is not set CONFIG_CPU_MIPS32_R2=y diff --git a/target/linux/malta/le/config-default b/target/linux/malta/le/config-default new file mode 100644 index 0000000000..396e1b75f9 --- /dev/null +++ b/target/linux/malta/le/config-default @@ -0,0 +1,2 @@ +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y |