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| author | Zoltan Herpai <wigyori@uid0.hu> | 2016-01-09 16:20:39 +0000 |
|---|---|---|
| committer | Zoltan Herpai <wigyori@uid0.hu> | 2016-01-09 16:20:39 +0000 |
| commit | a6611a92d5f4d3bab43feb1abf36924caf3ecc87 (patch) | |
| tree | bb29022fd41ba5d5bae6022bfab6f48d2c2da574 /target/linux/sunxi/patches-4.4/111-2-dt-sun7i-add-ve-clock-module.patch | |
| parent | 24894e52bc688844dfc96fc80073f2ac3196f992 (diff) | |
| download | upstream-a6611a92d5f4d3bab43feb1abf36924caf3ecc87.tar.gz upstream-a6611a92d5f4d3bab43feb1abf36924caf3ecc87.tar.bz2 upstream-a6611a92d5f4d3bab43feb1abf36924caf3ecc87.zip | |
sunxi: initial 4.4 support
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
SVN-Revision: 48161
Diffstat (limited to 'target/linux/sunxi/patches-4.4/111-2-dt-sun7i-add-ve-clock-module.patch')
| -rw-r--r-- | target/linux/sunxi/patches-4.4/111-2-dt-sun7i-add-ve-clock-module.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-4.4/111-2-dt-sun7i-add-ve-clock-module.patch b/target/linux/sunxi/patches-4.4/111-2-dt-sun7i-add-ve-clock-module.patch new file mode 100644 index 0000000000..bac58d088e --- /dev/null +++ b/target/linux/sunxi/patches-4.4/111-2-dt-sun7i-add-ve-clock-module.patch @@ -0,0 +1,34 @@ +From f0571ab140723f9a898d4a404118580534dcc468 Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai <wens@csie.org> +Date: Sat, 5 Dec 2015 21:16:47 +0800 +Subject: [PATCH] ARM: dts: sun7i: Add VE (Video Engine) module clock node + +The video engine has its own module clock, which also includes a +reset control for it. + +Signed-off-by: Chen-Yu Tsai <wens@csie.org> +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> +--- + arch/arm/boot/dts/sun7i-a20.dtsi | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi +index 21169c0..0940a78 100644 +--- a/arch/arm/boot/dts/sun7i-a20.dtsi ++++ b/arch/arm/boot/dts/sun7i-a20.dtsi +@@ -527,6 +527,15 @@ + "dram_de_mp", "dram_ace"; + }; + ++ ve_clk: clk@01c2013c { ++ #clock-cells = <0>; ++ #reset-cells = <0>; ++ compatible = "allwinner,sun4i-a10-ve-clk"; ++ reg = <0x01c2013c 0x4>; ++ clocks = <&pll4>; ++ clock-output-names = "ve"; ++ }; ++ + codec_clk: clk@01c20140 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-codec-clk"; |