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author | Jonas Gorski <jogo@openwrt.org> | 2015-08-14 13:06:33 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2015-08-14 13:06:33 +0000 |
commit | 6be2305da83471c442dab83366c25be4dfb38793 (patch) | |
tree | 30cfe6f3fc964dca1936646468c87367b509e929 /target/linux/sunxi/patches-4.1/164-1-dt-add-pll2-into-dtsi.patch | |
parent | 8e69c9f7ef2e1ca40b33a4a33c76b460c1f62861 (diff) | |
download | upstream-6be2305da83471c442dab83366c25be4dfb38793.tar.gz upstream-6be2305da83471c442dab83366c25be4dfb38793.tar.bz2 upstream-6be2305da83471c442dab83366c25be4dfb38793.zip |
kernel: update 4.1 to 4.1.5
Changelog:
* https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.5
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46598
Diffstat (limited to 'target/linux/sunxi/patches-4.1/164-1-dt-add-pll2-into-dtsi.patch')
-rw-r--r-- | target/linux/sunxi/patches-4.1/164-1-dt-add-pll2-into-dtsi.patch | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/target/linux/sunxi/patches-4.1/164-1-dt-add-pll2-into-dtsi.patch b/target/linux/sunxi/patches-4.1/164-1-dt-add-pll2-into-dtsi.patch index 0d3de3c203..f7ddfa142d 100644 --- a/target/linux/sunxi/patches-4.1/164-1-dt-add-pll2-into-dtsi.patch +++ b/target/linux/sunxi/patches-4.1/164-1-dt-add-pll2-into-dtsi.patch @@ -17,11 +17,9 @@ Signed-off-by: Hans de Goede <hdegoede@redhat.com> arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++ 3 files changed, 24 insertions(+) -diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi -index 30f663a..fab13af 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi -@@ -195,6 +195,14 @@ +@@ -162,6 +162,14 @@ clock-output-names = "pll1"; }; @@ -36,11 +34,9 @@ index 30f663a..fab13af 100644 pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; -diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi -index 53d3ead..a4b6a66 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi -@@ -102,6 +102,14 @@ +@@ -136,6 +136,14 @@ clock-output-names = "pll1"; }; @@ -55,11 +51,9 @@ index 53d3ead..a4b6a66 100644 pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; -diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi -index 7549f1b..12d9ffd 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi -@@ -199,6 +199,14 @@ +@@ -203,6 +203,14 @@ clock-output-names = "pll1"; }; |