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| author | Jianhui Zhao <jianhuizhao329@gmail.com> | 2018-04-17 11:09:14 +0800 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-07-30 14:10:00 +0200 |
| commit | 84c212da44cf5df210ae166ed7e64adf764ccf3f (patch) | |
| tree | 2351260a551bca0f71fbf482671a7da70d5842f0 /target/linux/samsung/patches-4.14 | |
| parent | 4caab808300ad75575d778bae6e184caa26aeabc (diff) | |
| download | upstream-84c212da44cf5df210ae166ed7e64adf764ccf3f.tar.gz upstream-84c212da44cf5df210ae166ed7e64adf764ccf3f.tar.bz2 upstream-84c212da44cf5df210ae166ed7e64adf764ccf3f.zip | |
samsung/s5pv210: New target
Signed-off-by: Jianhui Zhao <jianhuizhao329@gmail.com>
Diffstat (limited to 'target/linux/samsung/patches-4.14')
| -rw-r--r-- | target/linux/samsung/patches-4.14/001-s5pv210-nand.patch | 44 | ||||
| -rw-r--r-- | target/linux/samsung/patches-4.14/002-dm9000-clk.patch | 37 |
2 files changed, 81 insertions, 0 deletions
diff --git a/target/linux/samsung/patches-4.14/001-s5pv210-nand.patch b/target/linux/samsung/patches-4.14/001-s5pv210-nand.patch new file mode 100644 index 0000000000..3a35e26f39 --- /dev/null +++ b/target/linux/samsung/patches-4.14/001-s5pv210-nand.patch @@ -0,0 +1,44 @@ +--- a/arch/arm/boot/dts/s5pv210.dtsi ++++ b/arch/arm/boot/dts/s5pv210.dtsi +@@ -95,6 +95,16 @@ + status = "disabled"; + }; + ++ nand: nand@b0000000 { ++ compatible = "samsung,s5pv210-nand"; ++ reg = <0xb0e00000 0x40>, <0xb0e20000 0x200>; ++ clocks = <&clocks CLK_NANDXL>, <&clocks CLK_NFCON>; ++ clock-names = "nandxl", "nand"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ status = "disabled"; ++ }; ++ + chipid@e0000000 { + compatible = "samsung,s5pv210-chipid"; + reg = <0xe0000000 0x1000>; +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -181,6 +181,12 @@ config MTD_NAND_S3C2410_CLKSTOP + when the is NAND chip selected or released, but will save + approximately 5mA of power when there is nothing happening. + ++config MTD_NAND_S5PXX ++ tristate "NAND Flash support for Samsung S5Pxx SoCs" ++ depends on ARCH_S5PV210 ++ help ++ This enables the NAND flash controller on the S5Pxx SoCs ++ + config MTD_NAND_TANGO + tristate "NAND Flash support for Tango chips" + depends on ARCH_TANGO || COMPILE_TEST +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_NAND_DENALI_DT) += dena + obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o + obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o + obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o ++obj-$(CONFIG_MTD_NAND_S5PXX) += s5pxx_nand.o + obj-$(CONFIG_MTD_NAND_TANGO) += tango_nand.o + obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o + obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o diff --git a/target/linux/samsung/patches-4.14/002-dm9000-clk.patch b/target/linux/samsung/patches-4.14/002-dm9000-clk.patch new file mode 100644 index 0000000000..1bf2a7ab20 --- /dev/null +++ b/target/linux/samsung/patches-4.14/002-dm9000-clk.patch @@ -0,0 +1,37 @@ +--- a/drivers/net/ethernet/davicom/dm9000.c ++++ b/drivers/net/ethernet/davicom/dm9000.c +@@ -39,6 +39,7 @@ + #include <linux/regulator/consumer.h> + #include <linux/gpio.h> + #include <linux/of_gpio.h> ++#include <linux/clk.h> + + #include <asm/delay.h> + #include <asm/irq.h> +@@ -1436,6 +1437,7 @@ dm9000_probe(struct platform_device *pde + enum of_gpio_flags flags; + struct regulator *power; + bool inv_mac_addr = false; ++ const char *clk_name; + + power = devm_regulator_get(dev, "vcc"); + if (IS_ERR(power)) { +@@ -1573,6 +1575,18 @@ dm9000_probe(struct platform_device *pde + goto out; + } + ++ /* Enable clock if specified */ ++ if (!of_property_read_string(dev->of_node, "clock-names", &clk_name)) { ++ struct clk *clk = devm_clk_get(dev, clk_name); ++ if (IS_ERR(clk)) { ++ dev_err(dev, "cannot get clock of %s\n", clk_name); ++ ret = PTR_ERR(clk); ++ goto out; ++ } ++ clk_prepare_enable(clk); ++ dev_info(dev, "enable clock '%s'\n", clk_name); ++ } ++ + /* fill in parameters for net-dev structure */ + ndev->base_addr = (unsigned long)db->io_addr; + |